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| author | sayantn <sayantn05@gmail.com> | 2025-06-03 20:37:10 +0530 |
|---|---|---|
| committer | sayantn <sayantn05@gmail.com> | 2025-06-03 20:37:10 +0530 |
| commit | d91c1af24b551d5fead9fb7b9e2125574aab8b5c (patch) | |
| tree | 89a79b9fa53423df8e5301ca34a37cf4d6e8f0b4 /compiler/rustc_codegen_cranelift/src | |
| parent | 41fdc80dcecded3eb4716eefbe17680db9b37e22 (diff) | |
| download | rust-d91c1af24b551d5fead9fb7b9e2125574aab8b5c.tar.gz rust-d91c1af24b551d5fead9fb7b9e2125574aab8b5c.zip | |
Add impl for `llvm.roundeven` in cg_clif
- remove unused `llvm.aarch64.neon.frintn` from cg_clif
Diffstat (limited to 'compiler/rustc_codegen_cranelift/src')
| -rw-r--r-- | compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs | 8 | ||||
| -rw-r--r-- | compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs index 2e02e85a997..81dc038a551 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs @@ -62,6 +62,14 @@ pub(crate) fn codegen_llvm_intrinsic_call<'tcx>( }); } + _ if intrinsic.starts_with("llvm.roundeven.v") => { + intrinsic_args!(fx, args => (v); intrinsic); + + simd_for_each_lane(fx, v, ret, &|fx, _lane_ty, _res_lane_ty, lane| { + fx.bcx.ins().nearest(lane) + }); + } + _ => { fx.tcx .dcx() diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs index d22483cf177..5448f1b1e90 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs @@ -264,14 +264,6 @@ pub(super) fn codegen_aarch64_llvm_intrinsic_call<'tcx>( simd_reduce(fx, v, None, ret, &|fx, _ty, a, b| fx.bcx.ins().fadd(a, b)); } - _ if intrinsic.starts_with("llvm.aarch64.neon.frintn.v") => { - intrinsic_args!(fx, args => (v); intrinsic); - - simd_for_each_lane(fx, v, ret, &|fx, _lane_ty, _res_lane_ty, lane| { - fx.bcx.ins().nearest(lane) - }); - } - _ if intrinsic.starts_with("llvm.aarch64.neon.smaxv.i") => { intrinsic_args!(fx, args => (v); intrinsic); |
