diff options
| author | Antoni Boucher <bouanto@zoho.com> | 2023-10-26 17:42:02 -0400 |
|---|---|---|
| committer | Antoni Boucher <bouanto@zoho.com> | 2023-10-26 17:42:02 -0400 |
| commit | c797cccda61e1116fa4a2e8feb0fb43432add599 (patch) | |
| tree | 0c135dadf0e67d118d77ddb06e449d0014f6f22a /compiler/rustc_codegen_gcc/example | |
| parent | 8396efecf7d30ca9f7edcf76aba2ea388300f6ab (diff) | |
| parent | e4fe941b11a55c5005630696e9b6d81c65f7bd04 (diff) | |
| download | rust-c797cccda61e1116fa4a2e8feb0fb43432add599.tar.gz rust-c797cccda61e1116fa4a2e8feb0fb43432add599.zip | |
Merge commit 'e4fe941b11a55c5005630696e9b6d81c65f7bd04' into subtree-update_cg_gcc_2023-10-25
Diffstat (limited to 'compiler/rustc_codegen_gcc/example')
| -rw-r--r-- | compiler/rustc_codegen_gcc/example/alloc_system.rs | 1 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs | 6 | ||||
| -rw-r--r-- | compiler/rustc_codegen_gcc/example/std_example.rs | 13 |
3 files changed, 19 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_gcc/example/alloc_system.rs b/compiler/rustc_codegen_gcc/example/alloc_system.rs index 56ff84e4bdf..201e4c73675 100644 --- a/compiler/rustc_codegen_gcc/example/alloc_system.rs +++ b/compiler/rustc_codegen_gcc/example/alloc_system.rs @@ -9,6 +9,7 @@ // add fast paths for low alignment values. #[cfg(any(target_arch = "x86", target_arch = "arm", + target_arch = "m68k", target_arch = "mips", target_arch = "mips32r6", target_arch = "powerpc", diff --git a/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs b/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs index c3aea571815..40a1ad22c0e 100644 --- a/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs +++ b/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs @@ -152,7 +152,8 @@ fn main() { let slice = &[0, 1] as &[i32]; let slice_ptr = slice as *const [i32] as *const i32; - assert_eq!(slice_ptr as usize % 4, 0); + let align = intrinsics::min_align_of::<*const i32>(); + assert_eq!(slice_ptr as usize % align, 0); //return; @@ -186,7 +187,10 @@ fn main() { let a: &dyn SomeTrait = &"abc\0"; a.object_safe(); + #[cfg(target_arch="x86_64")] assert_eq!(intrinsics::size_of_val(a) as u8, 16); + #[cfg(target_arch="m68k")] + assert_eq!(intrinsics::size_of_val(a) as u8, 8); assert_eq!(intrinsics::size_of_val(&0u32) as u8, 4); assert_eq!(intrinsics::min_align_of::<u16>() as u8, 2); diff --git a/compiler/rustc_codegen_gcc/example/std_example.rs b/compiler/rustc_codegen_gcc/example/std_example.rs index dc0aad04a78..0f6325c8980 100644 --- a/compiler/rustc_codegen_gcc/example/std_example.rs +++ b/compiler/rustc_codegen_gcc/example/std_example.rs @@ -1,6 +1,7 @@ #![feature(core_intrinsics, coroutines, coroutine_trait, is_sorted)] #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] use std::arch::x86_64::*; use std::io::Write; use std::ops::Coroutine; @@ -95,6 +96,7 @@ fn main() { println!("{:?}", std::intrinsics::caller_location()); + #[cfg(target_arch="x86_64")] #[cfg(feature="master")] unsafe { test_simd(); @@ -108,6 +110,7 @@ fn main() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] unsafe fn test_simd() { let x = _mm_setzero_si128(); @@ -136,6 +139,7 @@ unsafe fn test_simd() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] unsafe fn test_mm_slli_si128() { #[rustfmt::skip] @@ -164,6 +168,7 @@ unsafe fn test_mm_slli_si128() { #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] unsafe fn test_mm_movemask_epi8() { #[rustfmt::skip] @@ -178,6 +183,7 @@ unsafe fn test_mm_movemask_epi8() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "avx2")] unsafe fn test_mm256_movemask_epi8() { let a = _mm256_set1_epi8(-1); @@ -187,6 +193,7 @@ unsafe fn test_mm256_movemask_epi8() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] unsafe fn test_mm_add_epi8() { let a = _mm_setr_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); @@ -203,6 +210,7 @@ unsafe fn test_mm_add_epi8() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] unsafe fn test_mm_add_pd() { let a = _mm_setr_pd(1.0, 2.0); @@ -212,6 +220,7 @@ unsafe fn test_mm_add_pd() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] fn assert_eq_m128i(x: std::arch::x86_64::__m128i, y: std::arch::x86_64::__m128i) { unsafe { assert_eq!(std::mem::transmute::<_, [u8; 16]>(x), std::mem::transmute::<_, [u8; 16]>(y)); @@ -219,6 +228,7 @@ fn assert_eq_m128i(x: std::arch::x86_64::__m128i, y: std::arch::x86_64::__m128i) } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) { if _mm_movemask_pd(_mm_cmpeq_pd(a, b)) != 0b11 { @@ -227,6 +237,7 @@ pub unsafe fn assert_eq_m128d(a: __m128d, b: __m128d) { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse2")] unsafe fn test_mm_cvtsi128_si64() { let r = _mm_cvtsi128_si64(std::mem::transmute::<[i64; 2], _>([5, 0])); @@ -234,6 +245,7 @@ unsafe fn test_mm_cvtsi128_si64() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse4.1")] unsafe fn test_mm_cvtepi8_epi16() { let a = _mm_set1_epi8(10); @@ -247,6 +259,7 @@ unsafe fn test_mm_cvtepi8_epi16() { } #[cfg(feature="master")] +#[cfg(target_arch="x86_64")] #[target_feature(enable = "sse4.1")] unsafe fn test_mm_extract_epi8() { #[rustfmt::skip] |
