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| author | Matthias Krüger <matthias.krueger@famsik.de> | 2024-01-04 15:33:59 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-01-04 15:33:59 +0100 |
| commit | 12c102ec5366a0df3c05b2b829d1ca08f46435b6 (patch) | |
| tree | b33ebdd6af470007af95ad14302c281e9c031571 /compiler/rustc_codegen_gcc | |
| parent | 3d8d10d4ea2a74be154aada58eeec8ad3b346f99 (diff) | |
| parent | ee41651d2f1378bda0126070fb9d3996caaa26a7 (diff) | |
| download | rust-12c102ec5366a0df3c05b2b829d1ca08f46435b6.tar.gz rust-12c102ec5366a0df3c05b2b829d1ca08f46435b6.zip | |
Rollup merge of #119431 - taiki-e:asm-s390x-reg-addr, r=Amanieu
Support reg_addr register class in s390x inline assembly In s390x, `r0` cannot be used as an address register (it is evaluated as zero in an address context). Therefore, currently, in assemblies involving memory accesses, `r0` must be [marked as clobbered](https://github.com/taiki-e/atomic-maybe-uninit/blob/1a1155653a26667396c805954ab61c8cbb14de8c/src/arch/s390x.rs#L58) or [explicitly used to a non-address](https://github.com/taiki-e/atomic-maybe-uninit/blob/1a1155653a26667396c805954ab61c8cbb14de8c/src/arch/s390x.rs#L135) or explicitly use an address register to prevent `r0` from being allocated to a register for the address. This patch adds a register class for allocating general-purpose registers, except `r0`, to make it easier to use address registers. (powerpc already has a register class (reg_nonzero) for a similar purpose.) This is identical to the `a` constraint in LLVM and GCC: https://llvm.org/docs/LangRef.html#supported-constraint-code-list > a: A 32, 64, or 128-bit integer address register (excludes R0, which in an address context evaluates as zero). https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html > a > Address register (general purpose register except r0) cc ``@uweigand`` r? ``@Amanieu``
Diffstat (limited to 'compiler/rustc_codegen_gcc')
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/asm.rs | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_gcc/src/asm.rs b/compiler/rustc_codegen_gcc/src/asm.rs index ddd67a994c9..78e8e32b972 100644 --- a/compiler/rustc_codegen_gcc/src/asm.rs +++ b/compiler/rustc_codegen_gcc/src/asm.rs @@ -634,6 +634,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister { } InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r", InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a", InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f", InlineAsmRegClass::Err => unreachable!(), } @@ -704,7 +705,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("LLVM backend does not support SPIR-V") }, - InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::S390x( + S390xInlineAsmRegClass::reg | S390xInlineAsmRegClass::reg_addr + ) => cx.type_i32(), InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(), InlineAsmRegClass::Err => unreachable!(), } |
