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| author | bors <bors@rust-lang.org> | 2025-02-25 19:36:17 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2025-02-25 19:36:17 +0000 |
| commit | 85abb276361c424d64743c0965242dd0e7b866d1 (patch) | |
| tree | 092a4e454cea341c9a94f145d8cbb19b50174b44 /compiler/rustc_codegen_gcc | |
| parent | 4ecd70ddd1039a3954056c1071e40278048476fa (diff) | |
| parent | 9fda3e6c6b4c7c5c01c7851aaab06564855f52f3 (diff) | |
| download | rust-85abb276361c424d64743c0965242dd0e7b866d1.tar.gz rust-85abb276361c424d64743c0965242dd0e7b866d1.zip | |
Auto merge of #137608 - fmease:rollup-h4siso6, r=fmease
Rollup of 8 pull requests Successful merges: - #137370 (adjust_abi: make fallback logic for ABIs a bit easier to read) - #137444 (Improve behavior of `IF_LET_RESCOPE` around temporaries and place expressions) - #137464 (Fix invalid suggestion from type error for derive macro) - #137539 ( Add rustdoc-gui regression test for #137082 ) - #137576 (Don't doc-comment BTreeMap<K, SetValZST, A>) - #137595 (remove `simd_fpow` and `simd_fpowi`) - #137600 (type_ir: remove redundant part of comment) - #137602 (feature: fix typo in attribute description) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_gcc')
| -rw-r--r-- | compiler/rustc_codegen_gcc/src/intrinsic/simd.rs | 28 |
1 files changed, 8 insertions, 20 deletions
diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs b/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs index 84cd5b002fb..8b454ab2a42 100644 --- a/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs +++ b/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs @@ -772,8 +772,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>( sym::simd_floor => "floor", sym::simd_fma => "fma", sym::simd_relaxed_fma => "fma", // FIXME: this should relax to non-fused multiply-add when necessary - sym::simd_fpowi => "__builtin_powi", - sym::simd_fpow => "pow", sym::simd_fsin => "sin", sym::simd_fsqrt => "sqrt", sym::simd_round => "round", @@ -788,24 +786,16 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>( let mut vector_elements = vec![]; for i in 0..in_len { let index = bx.context.new_rvalue_from_long(bx.ulong_type, i as i64); - // we have to treat fpowi specially, since fpowi's second argument is always an i32 let mut arguments = vec![]; - if name == sym::simd_fpowi { - arguments = vec![ - bx.extract_element(args[0].immediate(), index).to_rvalue(), - args[1].immediate(), - ]; - } else { - for arg in args { - let mut element = bx.extract_element(arg.immediate(), index).to_rvalue(); - // FIXME: it would probably be better to not have casts here and use the proper - // instructions. - if let Some(typ) = cast_type { - element = bx.context.new_cast(None, element, typ); - } - arguments.push(element); + for arg in args { + let mut element = bx.extract_element(arg.immediate(), index).to_rvalue(); + // FIXME: it would probably be better to not have casts here and use the proper + // instructions. + if let Some(typ) = cast_type { + element = bx.context.new_cast(None, element, typ); } - }; + arguments.push(element); + } let mut result = bx.context.new_call(None, function, &arguments); if cast_type.is_some() { result = bx.context.new_cast(None, result, elem_ty); @@ -829,8 +819,6 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>( | sym::simd_floor | sym::simd_fma | sym::simd_relaxed_fma - | sym::simd_fpow - | sym::simd_fpowi | sym::simd_fsin | sym::simd_fsqrt | sym::simd_round |
