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authorbors <bors@rust-lang.org>2025-02-21 00:16:10 +0000
committerbors <bors@rust-lang.org>2025-02-21 00:16:10 +0000
commita18bd8acfc32dbfbbe150cd52eecf24e67fb69b6 (patch)
tree92d2257f931521792d2f2b51a779776fe8a3d3ae /compiler/rustc_codegen_gcc
parentf04bbc60f8c353ee5ba0677bc583ac4a88b2c180 (diff)
parent4d479f9c804b97c9a0aa82166872746c9941d78d (diff)
downloadrust-a18bd8acfc32dbfbbe150cd52eecf24e67fb69b6.tar.gz
rust-a18bd8acfc32dbfbbe150cd52eecf24e67fb69b6.zip
Auto merge of #137346 - workingjubilee:rollup-sxu05ms, r=workingjubilee
Rollup of 12 pull requests

Successful merges:

 - #131651 (Create a generic AVR target: avr-none)
 - #134340 (Stabilize `num_midpoint_signed` feature)
 - #136473 (infer linker flavor by linker name if it's sufficiently specific)
 - #136608 (Pass through of target features to llvm-bitcode-linker and handling them)
 - #136985 (Do not ignore uninhabited types for function-call ABI purposes. (Remove BackendRepr::Uninhabited))
 - #137270 (Fix `*-win7-windows-msvc` target since 26eeac1a1e9fe46ffd80dd0d3dafdd2c2a644306)
 - #137312 (Update references to cc_detect.rs)
 - #137318 (Workaround Cranelift not yet properly supporting vectors smaller than 128bit)
 - #137322 (Update docs for default features of wasm targets)
 - #137324 (Make x86 QNX target name consistent with other Rust targets)
 - #137338 (skip submodule updating logics on tarballs)
 - #137340 (Add a notice about missing GCC sources into source tarballs)

r? `@ghost`
`@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_gcc')
-rw-r--r--compiler/rustc_codegen_gcc/src/intrinsic/mod.rs2
-rw-r--r--compiler/rustc_codegen_gcc/src/type_of.rs13
2 files changed, 6 insertions, 9 deletions
diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs b/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
index 5322b731d8b..433868e238a 100644
--- a/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
+++ b/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
@@ -315,7 +315,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
                 let layout = self.layout_of(tp_ty).layout;
                 let _use_integer_compare = match layout.backend_repr() {
                     Scalar(_) | ScalarPair(_, _) => true,
-                    Uninhabited | Vector { .. } => false,
+                    Vector { .. } => false,
                     Memory { .. } => {
                         // For rusty ABIs, small aggregates are actually passed
                         // as `RegKind::Integer` (see `FnAbi::adjust_for_abi`),
diff --git a/compiler/rustc_codegen_gcc/src/type_of.rs b/compiler/rustc_codegen_gcc/src/type_of.rs
index 8b8b54753e7..bac4fc51300 100644
--- a/compiler/rustc_codegen_gcc/src/type_of.rs
+++ b/compiler/rustc_codegen_gcc/src/type_of.rs
@@ -84,7 +84,7 @@ fn uncached_gcc_type<'gcc, 'tcx>(
                 false,
             );
         }
-        BackendRepr::Uninhabited | BackendRepr::Memory { .. } => {}
+        BackendRepr::Memory { .. } => {}
     }
 
     let name = match *layout.ty.kind() {
@@ -179,19 +179,16 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
     fn is_gcc_immediate(&self) -> bool {
         match self.backend_repr {
             BackendRepr::Scalar(_) | BackendRepr::Vector { .. } => true,
-            BackendRepr::ScalarPair(..) | BackendRepr::Uninhabited | BackendRepr::Memory { .. } => {
-                false
-            }
+            BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => false,
         }
     }
 
     fn is_gcc_scalar_pair(&self) -> bool {
         match self.backend_repr {
             BackendRepr::ScalarPair(..) => true,
-            BackendRepr::Uninhabited
-            | BackendRepr::Scalar(_)
-            | BackendRepr::Vector { .. }
-            | BackendRepr::Memory { .. } => false,
+            BackendRepr::Scalar(_) | BackendRepr::Vector { .. } | BackendRepr::Memory { .. } => {
+                false
+            }
         }
     }