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| author | bors <bors@rust-lang.org> | 2020-10-10 17:32:28 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2020-10-10 17:32:28 +0000 |
| commit | 7bc5839e99411aad9061a632b62075d1346cbb3b (patch) | |
| tree | 97beb238b58e124bba9cd8599fea132f38885b8f /compiler/rustc_codegen_llvm/src/asm.rs | |
| parent | 87b71ed68b69361ab0d45653a972ad4cf7a65cba (diff) | |
| parent | 4d570fb45e7650f274853a2f47f86d17c2aa0784 (diff) | |
| download | rust-7bc5839e99411aad9061a632b62075d1346cbb3b.tar.gz rust-7bc5839e99411aad9061a632b62075d1346cbb3b.zip | |
Auto merge of #77337 - lzutao:asm-mips64, r=Amanieu
Add asm! support for mips64 - [x] Updated `src/doc/unstable-book/src/library-features/asm.md`. - [ ] No vector type support. I don't know much about those types. cc #76839
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/asm.rs')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/asm.rs | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index f801f845ac1..1eb852e6b01 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -259,7 +259,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> { InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {} InlineAsmArch::Nvptx64 => {} InlineAsmArch::Hexagon => {} - InlineAsmArch::Mips => {} + InlineAsmArch::Mips | InlineAsmArch::Mips64 => {} } } if !options.contains(InlineAsmOptions::NOMEM) { @@ -710,6 +710,7 @@ fn llvm_fixup_input( // MIPS only supports register-length arithmetics. Primitive::Int(Integer::I8 | Integer::I16, _) => bx.zext(value, bx.cx.type_i32()), Primitive::F32 => bx.bitcast(value, bx.cx.type_i32()), + Primitive::F64 => bx.bitcast(value, bx.cx.type_i64()), _ => value, }, _ => value, @@ -785,6 +786,7 @@ fn llvm_fixup_output( Primitive::Int(Integer::I8, _) => bx.trunc(value, bx.cx.type_i8()), Primitive::Int(Integer::I16, _) => bx.trunc(value, bx.cx.type_i16()), Primitive::F32 => bx.bitcast(value, bx.cx.type_f32()), + Primitive::F64 => bx.bitcast(value, bx.cx.type_f64()), _ => value, }, _ => value, @@ -854,6 +856,7 @@ fn llvm_fixup_output_type( // MIPS only supports register-length arithmetics. Primitive::Int(Integer::I8 | Integer::I16, _) => cx.type_i32(), Primitive::F32 => cx.type_i32(), + Primitive::F64 => cx.type_i64(), _ => layout.llvm_type(cx), }, _ => layout.llvm_type(cx), |