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authorJohnathan Van Why <jrvanwhy@google.com>2021-02-14 22:05:33 -0800
committerJohnathan Van Why <jrvanwhy@google.com>2021-02-14 23:41:10 -0800
commitfd21eb18e96db98ff4f354f51d91051cf1533433 (patch)
treeff17f9e1fbea583c6d668faadff232be425c1d17 /compiler/rustc_codegen_llvm/src/asm.rs
parent9503ea19edbf01b9435e80e17d60ce1b88390116 (diff)
downloadrust-fd21eb18e96db98ff4f354f51d91051cf1533433.tar.gz
rust-fd21eb18e96db98ff4f354f51d91051cf1533433.zip
32-bit ARM: Emit `lr` instead of `r14` when specified as an `asm!` output register.
On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/asm.rs')
-rw-r--r--compiler/rustc_codegen_llvm/src/asm.rs3
1 files changed, 3 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs
index 8801211d51b..4aa25aae747 100644
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@ -487,6 +487,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
             } else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) {
                 // LLVM doesn't recognize x30
                 "{lr}".to_string()
+            } else if reg == InlineAsmReg::Arm(ArmInlineAsmReg::r14) {
+                // LLVM doesn't recognize r14
+                "{lr}".to_string()
             } else {
                 format!("{{{}}}", reg.name())
             }