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| author | Daniel Paoliello <danpao@microsoft.com> | 2021-08-31 11:16:10 -0700 |
|---|---|---|
| committer | Daniel Paoliello <danpao@microsoft.com> | 2021-08-31 15:24:20 -0700 |
| commit | 77a96ed5646f7c3ee8897693decc4626fe380643 (patch) | |
| tree | c865c4236b8532d76f89f51310ac5afe7e0024ae /compiler/rustc_codegen_llvm/src/lib.rs | |
| parent | 6cfa773583bb5123e630668f5bfe466716225546 (diff) | |
| download | rust-77a96ed5646f7c3ee8897693decc4626fe380643.tar.gz rust-77a96ed5646f7c3ee8897693decc4626fe380643.zip | |
Include debug info for the allocator shim
Issue Details: In some cases it is necessary to generate an "allocator shim" to forward various Rust allocation functions (e.g., `__rust_alloc`) to an underlying function (e.g., `malloc`). However, since this allocator shim is a manually created LLVM module it is not processed via the normal module processing code and so no debug info is generated for it (if debugging info is enabled). Fix Details: * Modify the `debuginfo` code to allow creating debug info for a module without a `CodegenCx` (since it is difficult, and expensive, to create one just to emit some debug info). * After creating the allocator shim add in basic debug info.
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/lib.rs')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/lib.rs | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/compiler/rustc_codegen_llvm/src/lib.rs b/compiler/rustc_codegen_llvm/src/lib.rs index 1e6e5252b25..1da14344b1d 100644 --- a/compiler/rustc_codegen_llvm/src/lib.rs +++ b/compiler/rustc_codegen_llvm/src/lib.rs @@ -92,11 +92,12 @@ impl ExtraBackendMethods for LlvmCodegenBackend { fn codegen_allocator<'tcx>( &self, tcx: TyCtxt<'tcx>, - mods: &mut ModuleLlvm, + module_llvm: &mut ModuleLlvm, + module_name: &str, kind: AllocatorKind, has_alloc_error_handler: bool, ) { - unsafe { allocator::codegen(tcx, mods, kind, has_alloc_error_handler) } + unsafe { allocator::codegen(tcx, module_llvm, module_name, kind, has_alloc_error_handler) } } fn compile_codegen_unit( &self, |
