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authorJonas Schievink <jonasschievink@gmail.com>2021-02-15 16:07:11 +0100
committerGitHub <noreply@github.com>2021-02-15 16:07:11 +0100
commit1a2675fe26f934d4bd3b24fc1a1d3acd0a76f6e8 (patch)
treea964e743d5857301ffa09d4daeacfadc34d9ff1f /compiler/rustc_codegen_llvm/src
parent1ee4a7bba6e3f8ee873f7690fd3096758fe0cd78 (diff)
parentfd21eb18e96db98ff4f354f51d91051cf1533433 (diff)
downloadrust-1a2675fe26f934d4bd3b24fc1a1d3acd0a76f6e8.tar.gz
rust-1a2675fe26f934d4bd3b24fc1a1d3acd0a76f6e8.zip
Rollup merge of #82141 - jrvanwhy:issue-82052, r=sanxiyn
32-bit ARM: Emit `lr` instead of `r14` when specified as an `asm!` output register.

On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.

closes #82052

r? ``@nagisa``
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
-rw-r--r--compiler/rustc_codegen_llvm/src/asm.rs3
1 files changed, 3 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs
index 8801211d51b..4aa25aae747 100644
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@ -487,6 +487,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
             } else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) {
                 // LLVM doesn't recognize x30
                 "{lr}".to_string()
+            } else if reg == InlineAsmReg::Arm(ArmInlineAsmReg::r14) {
+                // LLVM doesn't recognize r14
+                "{lr}".to_string()
             } else {
                 format!("{{{}}}", reg.name())
             }