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authorbors <bors@rust-lang.org>2021-09-01 09:06:24 +0000
committerbors <bors@rust-lang.org>2021-09-01 09:06:24 +0000
commit3ed6c1d23fd40f4367259a531465e809eb00ec27 (patch)
treee2bba4bf1319aca82d661cee190109aa018f7603 /compiler/rustc_codegen_llvm/src
parent608b5e1c209ffb4d6d0cf83817c823b12bbb7659 (diff)
parentd31352961c30a123f2ccdb07d843d23943cf0bc4 (diff)
downloadrust-3ed6c1d23fd40f4367259a531465e809eb00ec27.tar.gz
rust-3ed6c1d23fd40f4367259a531465e809eb00ec27.zip
Auto merge of #88556 - m-ou-se:rollup-q636wyd, r=m-ou-se
Rollup of 9 pull requests

Successful merges:

 - #86376 (Emit specific warning to clarify that `#[no_mangle]` should not be applied on foreign statics or functions)
 - #88040 (BTree: remove Ord bound from new)
 - #88053 (Fix the flock fallback implementation)
 - #88350 (add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC)
 - #88410 (Remove bolding on associated constants)
 - #88525 (fix(rustc_typeck): produce better errors for dyn auto trait)
 - #88542 (Use the return value of readdir_r() instead of errno)
 - #88548 (Stabilize `Iterator::intersperse()`)
 - #88551 (Stabilize `UnsafeCell::raw_get()`)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
-rw-r--r--compiler/rustc_codegen_llvm/src/asm.rs8
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs
index 1689fdd4f2e..e0d312727a5 100644
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@ -616,6 +616,10 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
             InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => "r",
             InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => "b",
             InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
+            InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
+            | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
+                unreachable!("clobber-only")
+            }
             InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
             InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
             InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
@@ -755,6 +759,10 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
         InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::reg_nonzero) => cx.type_i32(),
         InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(),
+        InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::cr)
+        | InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::xer) => {
+            unreachable!("clobber-only")
+        }
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => cx.type_f32(),
         InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {