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authorbors <bors@rust-lang.org>2025-02-16 07:54:08 +0000
committerbors <bors@rust-lang.org>2025-02-16 07:54:08 +0000
commit4229b80f506d5c1e6267f27e69f10fa3bd3c8f9e (patch)
treea2546d3abab28ddf1436222de35bb9605eb6e8d1 /compiler/rustc_codegen_llvm/src
parentc3fe9e7e4d259759589f3431aaadf7ab35b9269f (diff)
parent7884e171f78a8ab8cb7c3c1effd1c37a4cc30666 (diff)
downloadrust-4229b80f506d5c1e6267f27e69f10fa3bd3c8f9e.tar.gz
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Auto merge of #137111 - jhpratt:rollup-izd98sx, r=jhpratt
Rollup of 5 pull requests

Successful merges:

 - #135797 (Import initial generated 1.85 relnotes)
 - #135909 (Export kernel descriptor for amdgpu kernels)
 - #136545 (nvptx64: update default alignment to match LLVM 21)
 - #137092 (abi_unsupported_vector_types: say which type is the problem)
 - #137097 (Ignore Self in bounds check for associated types with Self:Sized)

r? `@ghost`
`@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
-rw-r--r--compiler/rustc_codegen_llvm/src/context.rs6
1 files changed, 6 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/context.rs b/compiler/rustc_codegen_llvm/src/context.rs
index 7fe527a4c07..e7952bc95e7 100644
--- a/compiler/rustc_codegen_llvm/src/context.rs
+++ b/compiler/rustc_codegen_llvm/src/context.rs
@@ -194,6 +194,12 @@ pub(crate) unsafe fn create_module<'ll>(
             target_data_layout = target_data_layout.replace("-i128:128", "");
         }
     }
+    if llvm_version < (21, 0, 0) {
+        if sess.target.arch == "nvptx64" {
+            // LLVM 21 updated the default layout on nvptx: https://github.com/llvm/llvm-project/pull/124961
+            target_data_layout = target_data_layout.replace("e-p6:32:32-i64", "e-i64");
+        }
+    }
 
     // Ensure the data-layout values hardcoded remain the defaults.
     {