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authorbors <bors@rust-lang.org>2021-02-16 02:14:13 +0000
committerbors <bors@rust-lang.org>2021-02-16 02:14:13 +0000
commit42a4673fbd40b09a99d057eaa9b3e5579b54c184 (patch)
tree5ab393dcc74c0ab38a4cdf58f513e8eb94bb9420 /compiler/rustc_codegen_llvm/src
parentd1206f950ffb76c76e1b74a19ae33c2b7d949454 (diff)
parenta105280a067891b557498cf9131843a75c20829a (diff)
downloadrust-42a4673fbd40b09a99d057eaa9b3e5579b54c184.tar.gz
rust-42a4673fbd40b09a99d057eaa9b3e5579b54c184.zip
Auto merge of #82153 - jonas-schievink:rollup-ls5r943, r=jonas-schievink
Rollup of 19 pull requests

Successful merges:

 - #81503 (Suggest to create a new `const` item if the `fn` in the array is a `const fn`)
 - #81897 (Add match pattern diagnostics regression test)
 - #81975 (Seal the CommandExt, OsStrExt and OsStringExt traits)
 - #82009 (const_generics: Dont evaluate array length const when handling errors)
 - #82060 (Fix typos in BTreeSet::{first, last} docs)
 - #82061 (CTFE validation: catch ReadPointerAsBytes and better error)
 - #82063 (Fixed minor typo in catch_unwind docs)
 - #82067 (const_generics: Fix incorrect ty::ParamEnv::empty() usage)
 - #82077 (Edit `rustc_arena::DropArena` docs)
 - #82096 (Fix a typo)
 - #82106 (Remove unnecessary `Option` in `default_doc`)
 - #82107 (expand: Some cleanup)
 - #82118 (Add missing env!-decl variant)
 - #82119 (Fix typo in link to CreateSymbolicLinkW documentation.)
 - #82120 (Stabilize Arguments::as_str)
 - #82129 (Remove redundant bool_to_option feature gate)
 - #82133 (Update link for extern prelude.)
 - #82141 (32-bit ARM: Emit `lr` instead of `r14` when specified as an `asm!` output register.)
 - #82147 (:arrow_up: rust-analyzer)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
-rw-r--r--compiler/rustc_codegen_llvm/src/asm.rs3
1 files changed, 3 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs
index 8801211d51b..4aa25aae747 100644
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@ -487,6 +487,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
             } else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) {
                 // LLVM doesn't recognize x30
                 "{lr}".to_string()
+            } else if reg == InlineAsmReg::Arm(ArmInlineAsmReg::r14) {
+                // LLVM doesn't recognize r14
+                "{lr}".to_string()
             } else {
                 format!("{{{}}}", reg.name())
             }