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authorbors <bors@rust-lang.org>2024-08-05 09:25:50 +0000
committerbors <bors@rust-lang.org>2024-08-05 09:25:50 +0000
commit9179d9b334e3f5e8772e1a563308dc95a1cde960 (patch)
tree11366ba48f6b11c94fcc1d9f875a5bcbaef50a35 /compiler/rustc_codegen_llvm/src
parent4d48a6be74d46304cacb93cb8eb60d70d733b862 (diff)
parent80b74d397fffc9deaafd2b44552ba3a9107b4d5b (diff)
downloadrust-9179d9b334e3f5e8772e1a563308dc95a1cde960.tar.gz
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Auto merge of #117468 - daxpedda:wasm-relaxed-simd, r=alexcrichton
Stabilize Wasm relaxed SIMD

This PR stabilizes [Wasm relaxed SIMD](https://github.com/WebAssembly/relaxed-simd) which has already reached [phase 4](https://github.com/WebAssembly/proposals/tree/04fa8c810e1dc99ab399e41052a6e427ee988180?tab=readme-ov-file#phase-4---standardize-the-feature-wg).

Tracking issue: #111196
Implementation PR: https://github.com/rust-lang/stdarch/pull/1393
Documentation: https://github.com/rust-lang/reference/pull/1421
Stdarch: https://github.com/rust-lang/stdarch/pull/1494

Closes #111196.
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
-rw-r--r--compiler/rustc_codegen_llvm/src/llvm_util.rs16
1 files changed, 16 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs
index dc21b92a95f..af8a9be1ccb 100644
--- a/compiler/rustc_codegen_llvm/src/llvm_util.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs
@@ -646,6 +646,22 @@ pub(crate) fn global_llvm_features(sess: &Session, diagnostics: bool) -> Vec<Str
         }
     }
 
+    // This is a workaround for a LLVM bug that doesn't implicitly enable
+    // `simd128` when `relaxed-simd` is.
+    // See <https://github.com/llvm/llvm-project/pull/99803>, which didn't make
+    // it into a released version of LLVM yet.
+    //
+    // This doesn't use the "implicit target feature" system because it is only
+    // used for function attributes in other targets, which fixes this bug as
+    // well on the function attribute level.
+    if sess.target.families.contains(&"wasm".into()) {
+        if features.iter().any(|f| f == "+relaxed-simd")
+            && !features.iter().any(|f| f == "+simd128")
+        {
+            features.push("+simd128".into());
+        }
+    }
+
     if diagnostics && let Some(f) = check_tied_features(sess, &featsmap) {
         sess.dcx().emit_err(TargetFeatureDisableOrEnable {
             features: f,