diff options
| author | Matthias Krüger <476013+matthiaskrgr@users.noreply.github.com> | 2025-09-15 22:09:47 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-15 22:09:47 +0200 |
| commit | f34e30affa126c807f9f97ea63487ce3985aff40 (patch) | |
| tree | 3abe701d9f6b44d301c17ec645dbce4313d81ac1 /compiler/rustc_codegen_llvm/src | |
| parent | bcdb3eeeffe94fb0de01aa7527856e4c05a7e8f6 (diff) | |
| parent | 5ebdec5ac2908b0bae42adbe451beeadbe8fa5de (diff) | |
| download | rust-f34e30affa126c807f9f97ea63487ce3985aff40.tar.gz rust-f34e30affa126c807f9f97ea63487ce3985aff40.zip | |
Rollup merge of #146530 - a4lg:riscv-inline-asm-default-clobber-float-flags, r=Amanieu
rustc_codegen_llvm: Adjust RISC-V inline assembly's clobber list Despite that the `fflags` register (representing floating point exception flags) is stated as a flag register [in the reference](https://doc.rust-lang.org/reference/inline-assembly.html#r-asm.rules.preserved-registers), it's not in the default clobber list of the RISC-V inline assembly and it would be better to fix it.
Diffstat (limited to 'compiler/rustc_codegen_llvm/src')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/asm.rs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index 38c1d3b53e8..b79176e9098 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -240,6 +240,7 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> { } InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => { constraints.extend_from_slice(&[ + "~{fflags}".to_string(), "~{vtype}".to_string(), "~{vl}".to_string(), "~{vxsat}".to_string(), |