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| author | Taiki Endo <te316e89@gmail.com> | 2024-11-25 23:11:17 +0900 |
|---|---|---|
| committer | Taiki Endo <te316e89@gmail.com> | 2024-11-25 23:11:17 +0900 |
| commit | 59f01cdbf48795ab8d6752b8a4bbe0e4540c30a5 (patch) | |
| tree | ba4096408b0f8cac2c3a08b24c6f1646a7bddd57 /compiler/rustc_codegen_llvm | |
| parent | 1278dad1e9a46a3a6fb5de80a5620cd2e58196cb (diff) | |
| download | rust-59f01cdbf48795ab8d6752b8a4bbe0e4540c30a5.tar.gz rust-59f01cdbf48795ab8d6752b8a4bbe0e4540c30a5.zip | |
Support predicate registers (clobber-only) in Hexagon inline assembly
Diffstat (limited to 'compiler/rustc_codegen_llvm')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/asm.rs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index 6ee80c08d4a..9aa01bd1b95 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -645,6 +645,7 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) -> | Arm(ArmInlineAsmRegClass::qreg_low4) => "x", Arm(ArmInlineAsmRegClass::dreg) | Arm(ArmInlineAsmRegClass::qreg) => "w", Hexagon(HexagonInlineAsmRegClass::reg) => "r", + Hexagon(HexagonInlineAsmRegClass::preg) => unreachable!("clobber-only"), LoongArch(LoongArchInlineAsmRegClass::reg) => "r", LoongArch(LoongArchInlineAsmRegClass::freg) => "f", Mips(MipsInlineAsmRegClass::reg) => "r", @@ -813,6 +814,7 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &' | Arm(ArmInlineAsmRegClass::qreg_low8) | Arm(ArmInlineAsmRegClass::qreg_low4) => cx.type_vector(cx.type_i64(), 2), Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(), + Hexagon(HexagonInlineAsmRegClass::preg) => unreachable!("clobber-only"), LoongArch(LoongArchInlineAsmRegClass::reg) => cx.type_i32(), LoongArch(LoongArchInlineAsmRegClass::freg) => cx.type_f32(), Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(), |