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| author | bors <bors@rust-lang.org> | 2025-06-29 13:02:15 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2025-06-29 13:02:15 +0000 |
| commit | 5e749eb66f93ee998145399fbdde337e57cd72ef (patch) | |
| tree | d65258dfb97ff2deeeb4a313b107ec2eef0e20dd /compiler/rustc_codegen_llvm | |
| parent | 5ca574e85b67cec0a6fc3fddfe398cbe676c9c69 (diff) | |
| parent | f9f3935fa7052430e64496d7501b8fc46e861aac (diff) | |
| download | rust-5e749eb66f93ee998145399fbdde337e57cd72ef.tar.gz rust-5e749eb66f93ee998145399fbdde337e57cd72ef.zip | |
Auto merge of #143183 - GuillaumeGomez:rollup-g60lr91, r=GuillaumeGomez
Rollup of 4 pull requests Successful merges: - rust-lang/rust#142078 (Add SIMD funnel shift and round-to-even intrinsics) - rust-lang/rust#142214 (`tests/ui`: A New Order [9/N]) - rust-lang/rust#142417 (`tests/ui`: A New Order [12/N]) - rust-lang/rust#143030 (Fix suggestion spans inside macros for the `unused_must_use` lint) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm')
| -rw-r--r-- | compiler/rustc_codegen_llvm/src/intrinsic.rs | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_llvm/src/intrinsic.rs b/compiler/rustc_codegen_llvm/src/intrinsic.rs index f7f062849a8..9930eae3fe7 100644 --- a/compiler/rustc_codegen_llvm/src/intrinsic.rs +++ b/compiler/rustc_codegen_llvm/src/intrinsic.rs @@ -1537,6 +1537,7 @@ fn generic_simd_intrinsic<'ll, 'tcx>( sym::simd_fsin => "llvm.sin", sym::simd_fsqrt => "llvm.sqrt", sym::simd_round => "llvm.round", + sym::simd_round_ties_even => "llvm.rint", sym::simd_trunc => "llvm.trunc", _ => return_error!(InvalidMonomorphization::UnrecognizedIntrinsic { span, name }), }; @@ -1563,6 +1564,7 @@ fn generic_simd_intrinsic<'ll, 'tcx>( | sym::simd_fsqrt | sym::simd_relaxed_fma | sym::simd_round + | sym::simd_round_ties_even | sym::simd_trunc ) { return simd_simple_float_intrinsic(name, in_elem, in_ty, in_len, bx, span, args); @@ -2309,7 +2311,13 @@ fn generic_simd_intrinsic<'ll, 'tcx>( // Unary integer intrinsics if matches!( name, - sym::simd_bswap | sym::simd_bitreverse | sym::simd_ctlz | sym::simd_ctpop | sym::simd_cttz + sym::simd_bswap + | sym::simd_bitreverse + | sym::simd_ctlz + | sym::simd_ctpop + | sym::simd_cttz + | sym::simd_funnel_shl + | sym::simd_funnel_shr ) { let vec_ty = bx.cx.type_vector( match *in_elem.kind() { @@ -2330,6 +2338,8 @@ fn generic_simd_intrinsic<'ll, 'tcx>( sym::simd_ctlz => "llvm.ctlz", sym::simd_ctpop => "llvm.ctpop", sym::simd_cttz => "llvm.cttz", + sym::simd_funnel_shl => "llvm.fshl", + sym::simd_funnel_shr => "llvm.fshr", _ => unreachable!(), }; let int_size = in_elem.int_size_and_signed(bx.tcx()).0.bits(); @@ -2350,6 +2360,11 @@ fn generic_simd_intrinsic<'ll, 'tcx>( // simple unary argument cases Ok(bx.call_intrinsic(llvm_intrinsic, &[vec_ty], &[args[0].immediate()])) } + sym::simd_funnel_shl | sym::simd_funnel_shr => Ok(bx.call_intrinsic( + llvm_intrinsic, + &[vec_ty], + &[args[0].immediate(), args[1].immediate(), args[2].immediate()], + )), _ => unreachable!(), }; } |
