Auto merge of #81678 - jackh726:rollup-3nerni4, r=jackh726

Rollup of 14 pull requests

Successful merges:

 - #80593 (Upgrade Chalk)
 - #81260 (Add .editorconfig)
 - #81455 (Add AArch64 big-endian and ILP32 targets)
 - #81517 (Remove remnants of the santizer runtime crates from bootstrap)
 - #81530 (sys: use `process::abort()` instead of `arch::wasm32::unreachable()`)
 - #81544 (Add better diagnostic for unbounded Abst. Const)
 - #81588 (Add doc aliases for "delete")
 - #81603 (rustbuild: Don't build compiler twice for error-index-generator.)
 - #81634 (Add long explanation e0521)
 - #81636 (Directly use `Option<&[T]>` instead of converting from `Option<&Vec<T>>` later on)
 - #81647 (Fix bug with assert!() calling the wrong edition of panic!().)
 - #81655 (Improve wording of suggestion about accessing field)
 - #81665 (Fix out of date `Scalar` documentation)
 - #81671 (Add more associated type tests)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup

1 files changed, 8 insertions, 4 deletions

diff --git a/compiler/rustc_codegen_llvm/src/va_arg.rs b/compiler/rustc_codegen_llvm/src/va_arg.rs
index 07fde27b5a3..39d08fbee3b 100644
--- a/compiler/rustc_codegen_llvm/src/va_arg.rs
+++ b/compiler/rustc_codegen_llvm/src/va_arg.rs
@@ -105,7 +105,6 @@ fn emit_aapcs_va_arg(
     let mut end = bx.build_sibling_block("va_arg.end");
     let zero = bx.const_i32(0);
     let offset_align = Align::from_bytes(4).unwrap();
-    assert_eq!(bx.tcx().sess.target.endian, Endian::Little);
 
     let gr_type = target_ty.is_any_ptr() || target_ty.is_integral();
     let (reg_off, reg_top_index, slot_size) = if gr_type {
@@ -144,9 +143,14 @@ fn emit_aapcs_va_arg(
     let top = in_reg.load(top, bx.tcx().data_layout.pointer_align.abi);
 
     // reg_value = *(@top + reg_off_v);
-    let top = in_reg.gep(top, &[reg_off_v]);
-    let top = in_reg.bitcast(top, bx.cx.type_ptr_to(layout.llvm_type(bx)));
-    let reg_value = in_reg.load(top, layout.align.abi);
+    let mut reg_addr = in_reg.gep(top, &[reg_off_v]);
+    if bx.tcx().sess.target.endian == Endian::Big && layout.size.bytes() != slot_size {
+        // On big-endian systems the value is right-aligned in its slot.
+        let offset = bx.const_i32((slot_size - layout.size.bytes()) as i32);
+        reg_addr = in_reg.gep(reg_addr, &[offset]);
+    }
+    let reg_addr = in_reg.bitcast(reg_addr, bx.cx.type_ptr_to(layout.llvm_type(bx)));
+    let reg_value = in_reg.load(reg_addr, layout.align.abi);
     in_reg.br(&end.llbb());
 
     // On Stack block