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| author | bors <bors@rust-lang.org> | 2025-02-21 00:16:10 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2025-02-21 00:16:10 +0000 |
| commit | a18bd8acfc32dbfbbe150cd52eecf24e67fb69b6 (patch) | |
| tree | 92d2257f931521792d2f2b51a779776fe8a3d3ae /compiler/rustc_codegen_ssa/src/back | |
| parent | f04bbc60f8c353ee5ba0677bc583ac4a88b2c180 (diff) | |
| parent | 4d479f9c804b97c9a0aa82166872746c9941d78d (diff) | |
| download | rust-a18bd8acfc32dbfbbe150cd52eecf24e67fb69b6.tar.gz rust-a18bd8acfc32dbfbbe150cd52eecf24e67fb69b6.zip | |
Auto merge of #137346 - workingjubilee:rollup-sxu05ms, r=workingjubilee
Rollup of 12 pull requests Successful merges: - #131651 (Create a generic AVR target: avr-none) - #134340 (Stabilize `num_midpoint_signed` feature) - #136473 (infer linker flavor by linker name if it's sufficiently specific) - #136608 (Pass through of target features to llvm-bitcode-linker and handling them) - #136985 (Do not ignore uninhabited types for function-call ABI purposes. (Remove BackendRepr::Uninhabited)) - #137270 (Fix `*-win7-windows-msvc` target since 26eeac1a1e9fe46ffd80dd0d3dafdd2c2a644306) - #137312 (Update references to cc_detect.rs) - #137318 (Workaround Cranelift not yet properly supporting vectors smaller than 128bit) - #137322 (Update docs for default features of wasm targets) - #137324 (Make x86 QNX target name consistent with other Rust targets) - #137338 (skip submodule updating logics on tarballs) - #137340 (Add a notice about missing GCC sources into source tarballs) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_ssa/src/back')
| -rw-r--r-- | compiler/rustc_codegen_ssa/src/back/link.rs | 7 | ||||
| -rw-r--r-- | compiler/rustc_codegen_ssa/src/back/linker.rs | 12 |
2 files changed, 19 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_ssa/src/back/link.rs b/compiler/rustc_codegen_ssa/src/back/link.rs index 105a4cb81f0..a8d917f0fdb 100644 --- a/compiler/rustc_codegen_ssa/src/back/link.rs +++ b/compiler/rustc_codegen_ssa/src/back/link.rs @@ -1990,6 +1990,7 @@ fn add_pre_link_args(cmd: &mut dyn Linker, sess: &Session, flavor: LinkerFlavor) if let Some(args) = sess.target.pre_link_args.get(&flavor) { cmd.verbatim_args(args.iter().map(Deref::deref)); } + cmd.verbatim_args(&sess.opts.unstable_opts.pre_link_args); } @@ -2518,6 +2519,12 @@ fn add_order_independent_options( "--target-cpu", &codegen_results.crate_info.target_cpu, ]); + if codegen_results.crate_info.target_features.len() > 0 { + cmd.link_arg(&format!( + "--target-feature={}", + &codegen_results.crate_info.target_features.join(",") + )); + } } else if flavor == LinkerFlavor::Ptx { cmd.link_args(&["--fallback-arch", &codegen_results.crate_info.target_cpu]); } else if flavor == LinkerFlavor::Bpf { diff --git a/compiler/rustc_codegen_ssa/src/back/linker.rs b/compiler/rustc_codegen_ssa/src/back/linker.rs index e3ace01c1eb..8900405c1b8 100644 --- a/compiler/rustc_codegen_ssa/src/back/linker.rs +++ b/compiler/rustc_codegen_ssa/src/back/linker.rs @@ -153,6 +153,7 @@ pub(crate) fn get_linker<'a>( hinted_static: None, is_ld: cc == Cc::No, is_gnu: flavor.is_gnu(), + uses_lld: flavor.uses_lld(), }) as Box<dyn Linker>, LinkerFlavor::Msvc(..) => Box::new(MsvcLinker { cmd, sess }) as Box<dyn Linker>, LinkerFlavor::EmCc => Box::new(EmLinker { cmd, sess }) as Box<dyn Linker>, @@ -361,6 +362,7 @@ struct GccLinker<'a> { // Link as ld is_ld: bool, is_gnu: bool, + uses_lld: bool, } impl<'a> GccLinker<'a> { @@ -552,6 +554,7 @@ impl<'a> Linker for GccLinker<'a> { self.link_args(&["--entry", "_initialize"]); } } + // VxWorks compiler driver introduced `--static-crt` flag specifically for rustc, // it switches linking for libc and similar system libraries to static without using // any `#[link]` attributes in the `libc` crate, see #72782 for details. @@ -567,6 +570,15 @@ impl<'a> Linker for GccLinker<'a> { { self.cc_arg("--static-crt"); } + + // avr-none doesn't have default ISA, users must specify which specific + // CPU (well, microcontroller) they are targetting using `-Ctarget-cpu`. + // + // Currently this makes sense only when using avr-gcc as a linker, since + // it brings a couple of hand-written important intrinsics from libgcc. + if self.sess.target.arch == "avr" && !self.uses_lld { + self.verbatim_arg(format!("-mmcu={}", self.target_cpu)); + } } fn link_dylib_by_name(&mut self, name: &str, verbatim: bool, as_needed: bool) { |
