Auto merge of #92816 - tmiasko:rm-llvm-asm, r=Amanieu

Remove deprecated LLVM-style inline assembly

The `llvm_asm!` was deprecated back in #87590 1.56.0, with intention to remove
it once `asm!` was stabilized, which already happened in #91728 1.59.0. Now it
is time to remove `llvm_asm!` to avoid continued maintenance cost.

Closes #70173.
Closes #92794.
Closes #87612.
Closes #82065.

cc `@rust-lang/wg-inline-asm`

r? `@Amanieu`

3 files changed, 0 insertions, 58 deletions

diff --git a/compiler/rustc_codegen_ssa/src/mir/analyze.rs b/compiler/rustc_codegen_ssa/src/mir/analyze.rs
index b1b3f1d6d81..d768d4920c5 100644
--- a/compiler/rustc_codegen_ssa/src/mir/analyze.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/analyze.rs
@@ -211,7 +211,6 @@ impl<'mir, 'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> Visitor<'tcx>
 
             PlaceContext::MutatingUse(
                 MutatingUseContext::Store
-                | MutatingUseContext::LlvmAsmOutput
                 | MutatingUseContext::AsmOutput
                 | MutatingUseContext::Borrow
                 | MutatingUseContext::AddressOf
diff --git a/compiler/rustc_codegen_ssa/src/mir/statement.rs b/compiler/rustc_codegen_ssa/src/mir/statement.rs
index 2c96987d339..773dc2adcfa 100644
--- a/compiler/rustc_codegen_ssa/src/mir/statement.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/statement.rs
@@ -1,9 +1,7 @@
-use rustc_errors::struct_span_err;
 use rustc_middle::mir;
 
 use super::FunctionCx;
 use super::LocalRef;
-use super::OperandValue;
 use crate::traits::BuilderMethods;
 use crate::traits::*;
 
@@ -66,51 +64,6 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
                 }
                 bx
             }
-            mir::StatementKind::LlvmInlineAsm(ref asm) => {
-                let outputs = asm
-                    .outputs
-                    .iter()
-                    .map(|output| self.codegen_place(&mut bx, output.as_ref()))
-                    .collect();
-
-                let input_vals = asm.inputs.iter().fold(
-                    Vec::with_capacity(asm.inputs.len()),
-                    |mut acc, (span, input)| {
-                        let op = self.codegen_operand(&mut bx, input);
-                        if let OperandValue::Immediate(_) = op.val {
-                            acc.push(op.immediate());
-                        } else {
-                            struct_span_err!(
-                                bx.sess(),
-                                span.to_owned(),
-                                E0669,
-                                "invalid value for constraint in inline assembly"
-                            )
-                            .emit();
-                        }
-                        acc
-                    },
-                );
-
-                if input_vals.len() == asm.inputs.len() {
-                    let res = bx.codegen_llvm_inline_asm(
-                        &asm.asm,
-                        outputs,
-                        input_vals,
-                        statement.source_info.span,
-                    );
-                    if !res {
-                        struct_span_err!(
-                            bx.sess(),
-                            statement.source_info.span,
-                            E0668,
-                            "malformed inline assembly"
-                        )
-                        .emit();
-                    }
-                }
-                bx
-            }
             mir::StatementKind::Coverage(box ref coverage) => {
                 self.codegen_coverage(&mut bx, coverage.clone(), statement.source_info.scope);
                 bx
diff --git a/compiler/rustc_codegen_ssa/src/traits/asm.rs b/compiler/rustc_codegen_ssa/src/traits/asm.rs
index 65f3c754d2d..11111a79744 100644
--- a/compiler/rustc_codegen_ssa/src/traits/asm.rs
+++ b/compiler/rustc_codegen_ssa/src/traits/asm.rs
@@ -3,7 +3,6 @@ use crate::mir::operand::OperandRef;
 use crate::mir::place::PlaceRef;
 use rustc_ast::{InlineAsmOptions, InlineAsmTemplatePiece};
 use rustc_hir::def_id::DefId;
-use rustc_hir::LlvmInlineAsmInner;
 use rustc_middle::ty::Instance;
 use rustc_span::Span;
 use rustc_target::asm::InlineAsmRegOrRegClass;
@@ -43,15 +42,6 @@ pub enum GlobalAsmOperandRef {
 
 pub trait AsmBuilderMethods<'tcx>: BackendTypes {
     /// Take an inline assembly expression and splat it out via LLVM
-    fn codegen_llvm_inline_asm(
-        &mut self,
-        ia: &LlvmInlineAsmInner,
-        outputs: Vec<PlaceRef<'tcx, Self::Value>>,
-        inputs: Vec<Self::Value>,
-        span: Span,
-    ) -> bool;
-
-    /// Take an inline assembly expression and splat it out via LLVM
     fn codegen_inline_asm(
         &mut self,
         template: &[InlineAsmTemplatePiece],