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authorDylan DPC <99973273+Dylan-DPC@users.noreply.github.com>2022-07-13 19:32:36 +0530
committerGitHub <noreply@github.com>2022-07-13 19:32:36 +0530
commit68cfdbb5c1a6f5c7d796df65701edfd0abee89f4 (patch)
treefeec2d8fddb9c59fcc2018d9cca71399b6eacb59 /compiler/rustc_interface
parent980579a5e9f5fcad63ef71f536efec15ccd56511 (diff)
parentdfe68eede3cef45c8a420aeb8ab4a57426662e04 (diff)
downloadrust-68cfdbb5c1a6f5c7d796df65701edfd0abee89f4.tar.gz
rust-68cfdbb5c1a6f5c7d796df65701edfd0abee89f4.zip
Rollup merge of #99155 - Amanieu:unstable-target-features, r=davidtwco
Keep unstable target features for asm feature checking

Inline assembly uses the target features to determine which registers
are available on the current target. However it needs to be able to
access unstable target features for this.

Fixes #99071
Diffstat (limited to 'compiler/rustc_interface')
-rw-r--r--compiler/rustc_interface/src/util.rs5
1 files changed, 4 insertions, 1 deletions
diff --git a/compiler/rustc_interface/src/util.rs b/compiler/rustc_interface/src/util.rs
index 8796ad5a33c..f4b51b5a442 100644
--- a/compiler/rustc_interface/src/util.rs
+++ b/compiler/rustc_interface/src/util.rs
@@ -48,7 +48,10 @@ pub fn add_configuration(
 ) {
     let tf = sym::target_feature;
 
-    let target_features = codegen_backend.target_features(sess);
+    let unstable_target_features = codegen_backend.target_features(sess, true);
+    sess.unstable_target_features.extend(unstable_target_features.iter().cloned());
+
+    let target_features = codegen_backend.target_features(sess, false);
     sess.target_features.extend(target_features.iter().cloned());
 
     cfg.extend(target_features.into_iter().map(|feat| (tf, Some(feat))));