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| author | Matthias Krüger <matthias.krueger@famsik.de> | 2023-08-07 16:47:55 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-08-07 16:47:55 +0200 |
| commit | b0a5126f068e954ebe8164d8b7bf3c533f747bff (patch) | |
| tree | 8c2f4f27b5c088aa7dfc321c3aecd04f6584b7c6 /compiler/rustc_llvm/llvm-wrapper/CoverageMappingWrapper.cpp | |
| parent | 7a52fe53965f6922eaae7e97c0d1bd536e692982 (diff) | |
| parent | c9e83c02a2bc0b1e240733d78abca4e58953b6af (diff) | |
| download | rust-b0a5126f068e954ebe8164d8b7bf3c533f747bff.tar.gz rust-b0a5126f068e954ebe8164d8b7bf3c533f747bff.zip | |
Rollup merge of #114495 - taiki-e:avr-atomic, r=Amanieu
Set max_atomic_width for AVR to 16
This is currently set to 0
https://github.com/rust-lang/rust/blob/90f0b24ad3e7fc0dc0e419c9da30d74629cd5736/compiler/rustc_target/src/spec/avr_gnu_base.rs#L26-L27
However, LLVM supports {8,16}-bit atomic load/store on AVR (support for RMW is still quite incomplete and only partially supported).
https://github.com/llvm/llvm-project/blob/llvmorg-15.0.0/llvm/test/CodeGen/AVR/atomics/load8.ll#L5-L13
https://github.com/llvm/llvm-project/blob/llvmorg-15.0.0/llvm/test/CodeGen/AVR/atomics/load16.ll#L3-L12
https://github.com/llvm/llvm-project/blob/llvmorg-15.0.0/llvm/test/CodeGen/AVR/atomics/store.ll#L3-L22
cc #99668
r? `@Amanieu`
Diffstat (limited to 'compiler/rustc_llvm/llvm-wrapper/CoverageMappingWrapper.cpp')
0 files changed, 0 insertions, 0 deletions