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authorJakob Degen <jakob.e.degen@gmail.com>2022-12-03 23:54:55 -0800
committerJakob Degen <jakob.e.degen@gmail.com>2022-12-14 01:02:35 -0800
commitc1b27eea45ef1fe330dd24dc3aa7028cb4d98e8c (patch)
treeeb09e5d2f4c69153bff0d1882c85da4d661a695b /compiler/rustc_middle/src
parent21ee03e0621c70b894e1bfdd8c82ba5aeaabc812 (diff)
Fix unsafetyck disabling for custom MIR
Diffstat (limited to 'compiler/rustc_middle/src')
-rw-r--r--compiler/rustc_middle/src/mir/mod.rs5
1 files changed, 5 insertions, 0 deletions
diff --git a/compiler/rustc_middle/src/mir/mod.rs b/compiler/rustc_middle/src/mir/mod.rs
index db4fe6f886b..77293ea6b22 100644
--- a/compiler/rustc_middle/src/mir/mod.rs
+++ b/compiler/rustc_middle/src/mir/mod.rs
@@ -533,6 +533,11 @@ impl<'tcx> Body<'tcx> {
         };
         injection_phase > self.phase
     }
+
+    #[inline]
+    pub fn is_custom_mir(&self) -> bool {
+        self.injection_phase.is_some()
+    }
 }
 
 #[derive(Copy, Clone, PartialEq, Eq, Debug, TyEncodable, TyDecodable, HashStable)]