summary refs log tree commit diff
path: root/compiler/rustc_mir_transform
diff options
context:
space:
mode:
authorbors <bors@rust-lang.org>2023-08-23 19:48:39 +0000
committerbors <bors@rust-lang.org>2023-08-23 19:48:39 +0000
commit5680fa18feaa87f3ff04063800aec256c3d4b4be (patch)
treef0daae2bd1d2aea53a44c261bd4f3e359a436567 /compiler/rustc_mir_transform
parentf155f8c3d9b6f63f1752dc205665869c475d3c1f (diff)
parent298ec5258f8e5f1211734bcb43c89aa184d3ca1b (diff)
downloadrust-1.72.0.tar.gz
rust-1.72.0.zip
Auto merge of #115140 - wesleywiser:turn_off_mir_sroa, r=cuviper 1.72.0
Disable MIR SROA optimization by default

Turn off the MIR SROA optimization by default to prevent incorrect debuginfo generation and rustc ICEs caused by invalid LLVM IR being created.

Related to #115113

r? `@cuviper`
cc `@saethlin`
Diffstat (limited to 'compiler/rustc_mir_transform')
-rw-r--r--compiler/rustc_mir_transform/src/sroa.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/rustc_mir_transform/src/sroa.rs b/compiler/rustc_mir_transform/src/sroa.rs
index 881a1547c52..94e1da8e145 100644
--- a/compiler/rustc_mir_transform/src/sroa.rs
+++ b/compiler/rustc_mir_transform/src/sroa.rs
@@ -12,7 +12,7 @@ pub struct ScalarReplacementOfAggregates;
 
 impl<'tcx> MirPass<'tcx> for ScalarReplacementOfAggregates {
     fn is_enabled(&self, sess: &rustc_session::Session) -> bool {
-        sess.mir_opt_level() >= 2
+        sess.mir_opt_level() >= 3
     }
 
     #[instrument(level = "debug", skip(self, tcx, body))]