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authorbeetrees <b@beetr.ee>2024-08-25 00:13:25 +0100
committerbeetrees <b@beetr.ee>2024-08-25 00:13:25 +0100
commitabd44fc5f4211a0684da4b37a15c3d07b17a436e (patch)
treeb178fc869b8c53ad7d9bf0229999f0c1652f50d2 /compiler/rustc_target/src/asm
parentec67cdf98ac081e1392a324ec47a0543743f697e (diff)
downloadrust-abd44fc5f4211a0684da4b37a15c3d07b17a436e.tar.gz
rust-abd44fc5f4211a0684da4b37a15c3d07b17a436e.zip
Add `f16` and `f128` inline ASM support for `aarch64`
Diffstat (limited to 'compiler/rustc_target/src/asm')
-rw-r--r--compiler/rustc_target/src/asm/aarch64.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/compiler/rustc_target/src/asm/aarch64.rs b/compiler/rustc_target/src/asm/aarch64.rs
index 041582b7df9..daf5162e8ac 100644
--- a/compiler/rustc_target/src/asm/aarch64.rs
+++ b/compiler/rustc_target/src/asm/aarch64.rs
@@ -61,9 +61,9 @@ impl AArch64InlineAsmRegClass {
         match self {
             Self::reg => types! { _: I8, I16, I32, I64, F16, F32, F64; },
             Self::vreg | Self::vreg_low16 => types! {
-                neon: I8, I16, I32, I64, F16, F32, F64,
-                    VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF32(2), VecF64(1),
-                    VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF16(4),VecF16(8), VecF32(4), VecF64(2);
+                neon: I8, I16, I32, I64, F16, F32, F64, F128,
+                    VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF16(4), VecF32(2), VecF64(1),
+                    VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF16(8), VecF32(4), VecF64(2);
             },
             Self::preg => &[],
         }