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authorFolkert de Vries <folkert@folkertdev.nl>2024-08-15 09:55:56 +0200
committerFolkert de Vries <folkert@folkertdev.nl>2024-09-21 13:04:14 +0200
commit1ddd67a79a77590504ba04f5d9528edf9d319df5 (patch)
tree1aed52d3b0bc4fed3f5a0f92b636a69bad132ac2 /compiler/rustc_target/src/spec/mod.rs
parent74fd001cdae0321144a20133f2216ea8a97da476 (diff)
downloadrust-1ddd67a79a77590504ba04f5d9528edf9d319df5.tar.gz
rust-1ddd67a79a77590504ba04f5d9528edf9d319df5.zip
add `C-cmse-nonsecure-entry` ABI
Diffstat (limited to 'compiler/rustc_target/src/spec/mod.rs')
-rw-r--r--compiler/rustc_target/src/spec/mod.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs
index 1d478f84c43..508baa7da07 100644
--- a/compiler/rustc_target/src/spec/mod.rs
+++ b/compiler/rustc_target/src/spec/mod.rs
@@ -2725,6 +2725,7 @@ impl Target {
             X86Interrupt => ["x86", "x86_64"].contains(&&self.arch[..]),
             Aapcs { .. } => "arm" == self.arch,
             CCmseNonSecureCall => ["arm", "aarch64"].contains(&&self.arch[..]),
+            CCmseNonSecureEntry => ["arm", "aarch64"].contains(&&self.arch[..]),
             Win64 { .. } | SysV64 { .. } => self.arch == "x86_64",
             PtxKernel => self.arch == "nvptx64",
             Msp430Interrupt => self.arch == "msp430",