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| author | bors <bors@rust-lang.org> | 2025-05-06 06:37:30 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2025-05-06 06:37:30 +0000 |
| commit | 651e9cf327358b28db7e37a2ae61727f4a2ef232 (patch) | |
| tree | 9e08a2741b303e04c0f4b98a180efd01d8716f1d /compiler/rustc_target/src/spec/mod.rs | |
| parent | 7295b08a17d1107155acd4b552069e3705b0ab1f (diff) | |
| parent | 546c1c2dd48ba6eded56a9ee74d78cab8e7ad204 (diff) | |
| download | rust-651e9cf327358b28db7e37a2ae61727f4a2ef232.tar.gz rust-651e9cf327358b28db7e37a2ae61727f4a2ef232.zip | |
Auto merge of #140695 - Zalathar:rollup-i32gzbo, r=Zalathar
Rollup of 12 pull requests Successful merges: - #139550 (Fix `-Zremap-path-scope` rmeta handling) - #139764 (Consistent trait bounds for ExtractIf Debug impls) - #139773 (Implement `Iterator::last` for `vec::IntoIter`) - #140035 (Implement RFC 3503: frontmatters) - #140251 (coverage-dump: Resolve global file IDs to filenames) - #140393 (std: get rid of `sys_common::process`) - #140532 (Fix RustAnalyzer discovery of rustc's `stable_mir` crate) - #140598 (Steer docs to `utf8_chunks` and `Iterator::take`) - #140634 (Use more accurate ELF flags on MIPS) - #140673 (Clean rustdoc tests folder) - #140678 (Be a bit more relaxed about not yet constrained infer vars in closure upvar analysis) - #140687 (Update mdbook to 0.4.49) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_target/src/spec/mod.rs')
| -rw-r--r-- | compiler/rustc_target/src/spec/mod.rs | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 37ea0d6e7b5..303be54a6d7 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -3567,7 +3567,19 @@ impl Target { "x86" => (Architecture::I386, None), "s390x" => (Architecture::S390x, None), "mips" | "mips32r6" => (Architecture::Mips, None), - "mips64" | "mips64r6" => (Architecture::Mips64, None), + "mips64" | "mips64r6" => ( + // While there are currently no builtin targets + // using the N32 ABI, it is possible to specify + // it using a custom target specification. N32 + // is an ILP32 ABI like the Aarch64_Ilp32 + // and X86_64_X32 cases above and below this one. + if self.options.llvm_abiname.as_ref() == "n32" { + Architecture::Mips64_N32 + } else { + Architecture::Mips64 + }, + None, + ), "x86_64" => ( if self.pointer_width == 32 { Architecture::X86_64_X32 |