Merge from rustc

422 files changed, 19716 insertions, 15380 deletions

diff --git a/compiler/rustc_abi/src/canon_abi.rs b/compiler/rustc_abi/src/canon_abi.rs
index 03eeb645489..7c020be6761 100644
--- a/compiler/rustc_abi/src/canon_abi.rs
+++ b/compiler/rustc_abi/src/canon_abi.rs
@@ -28,6 +28,9 @@ pub enum CanonAbi {
     Rust,
     RustCold,
 
+    /// An ABI that rustc does not know how to call or define.
+    Custom,
+
     /// ABIs relevant to 32-bit Arm targets
     Arm(ArmCall),
     /// ABI relevant to GPUs: the entry point for a GPU kernel
@@ -57,6 +60,7 @@ impl fmt::Display for CanonAbi {
             CanonAbi::C => ExternAbi::C { unwind: false },
             CanonAbi::Rust => ExternAbi::Rust,
             CanonAbi::RustCold => ExternAbi::RustCold,
+            CanonAbi::Custom => ExternAbi::Custom,
             CanonAbi::Arm(arm_call) => match arm_call {
                 ArmCall::Aapcs => ExternAbi::Aapcs { unwind: false },
                 ArmCall::CCmseNonSecureCall => ExternAbi::CCmseNonSecureCall,
diff --git a/compiler/rustc_abi/src/extern_abi.rs b/compiler/rustc_abi/src/extern_abi.rs
index 0bc1c8a0930..7457ae1f033 100644
--- a/compiler/rustc_abi/src/extern_abi.rs
+++ b/compiler/rustc_abi/src/extern_abi.rs
@@ -40,6 +40,11 @@ pub enum ExternAbi {
     /// Even normally-compatible Rust types can become ABI-incompatible with this ABI!
     Unadjusted,
 
+    /// An ABI that rustc does not know how to call or define. Functions with this ABI can
+    /// only be created using `#[naked]` functions or `extern "custom"` blocks, and can only
+    /// be called from inline assembly.
+    Custom,
+
     /// UEFI ABI, usually an alias of C, but sometimes an arch-specific alias
     /// and only valid on platforms that have a UEFI standard
     EfiApi,
@@ -141,6 +146,7 @@ abi_impls! {
             AvrNonBlockingInterrupt =><= "avr-non-blocking-interrupt",
             Cdecl { unwind: false } =><= "cdecl",
             Cdecl { unwind: true } =><= "cdecl-unwind",
+            Custom =><= "custom",
             EfiApi =><= "efiapi",
             Fastcall { unwind: false } =><= "fastcall",
             Fastcall { unwind: true } =><= "fastcall-unwind",
diff --git a/compiler/rustc_ast/src/ast.rs b/compiler/rustc_ast/src/ast.rs
index cf40c3f7f6f..11afd359e5a 100644
--- a/compiler/rustc_ast/src/ast.rs
+++ b/compiler/rustc_ast/src/ast.rs
@@ -97,12 +97,12 @@ pub struct Path {
     pub tokens: Option<LazyAttrTokenStream>,
 }
 
+// Succeeds if the path has a single segment that is arg-free and matches the given symbol.
 impl PartialEq<Symbol> for Path {
     #[inline]
     fn eq(&self, name: &Symbol) -> bool {
         if let [segment] = self.segments.as_ref()
-            && segment.args.is_none()
-            && segment.ident.name == *name
+            && segment == name
         {
             true
         } else {
@@ -111,6 +111,15 @@ impl PartialEq<Symbol> for Path {
     }
 }
 
+// Succeeds if the path has segments that are arg-free and match the given symbols.
+impl PartialEq<&[Symbol]> for Path {
+    #[inline]
+    fn eq(&self, names: &&[Symbol]) -> bool {
+        self.segments.len() == names.len()
+            && self.segments.iter().zip(names.iter()).all(|(s1, s2)| s1 == s2)
+    }
+}
+
 impl<CTX: rustc_span::HashStableContext> HashStable<CTX> for Path {
     fn hash_stable(&self, hcx: &mut CTX, hasher: &mut StableHasher) {
         self.segments.len().hash_stable(hcx, hasher);
@@ -166,6 +175,14 @@ pub struct PathSegment {
     pub args: Option<P<GenericArgs>>,
 }
 
+// Succeeds if the path segment is arg-free and matches the given symbol.
+impl PartialEq<Symbol> for PathSegment {
+    #[inline]
+    fn eq(&self, name: &Symbol) -> bool {
+        self.args.is_none() && self.ident.name == *name
+    }
+}
+
 impl PathSegment {
     pub fn from_ident(ident: Ident) -> Self {
         PathSegment { ident, id: DUMMY_NODE_ID, args: None }
@@ -693,6 +710,12 @@ impl Pat {
     }
 }
 
+impl From<P<Pat>> for Pat {
+    fn from(value: P<Pat>) -> Self {
+        *value
+    }
+}
+
 /// A single field in a struct pattern.
 ///
 /// Patterns like the fields of `Foo { x, ref y, ref mut z }`
@@ -1433,19 +1456,32 @@ impl Expr {
     }
 
     pub fn precedence(&self) -> ExprPrecedence {
+        fn prefix_attrs_precedence(attrs: &AttrVec) -> ExprPrecedence {
+            for attr in attrs {
+                if let AttrStyle::Outer = attr.style {
+                    return ExprPrecedence::Prefix;
+                }
+            }
+            ExprPrecedence::Unambiguous
+        }
+
         match &self.kind {
             ExprKind::Closure(closure) => {
                 match closure.fn_decl.output {
                     FnRetTy::Default(_) => ExprPrecedence::Jump,
-                    FnRetTy::Ty(_) => ExprPrecedence::Unambiguous,
+                    FnRetTy::Ty(_) => prefix_attrs_precedence(&self.attrs),
                 }
             }
 
-            ExprKind::Break(..)
-            | ExprKind::Ret(..)
-            | ExprKind::Yield(..)
-            | ExprKind::Yeet(..)
-            | ExprKind::Become(..) => ExprPrecedence::Jump,
+            ExprKind::Break(_ /*label*/, value)
+            | ExprKind::Ret(value)
+            | ExprKind::Yield(YieldKind::Prefix(value))
+            | ExprKind::Yeet(value) => match value {
+                Some(_) => ExprPrecedence::Jump,
+                None => prefix_attrs_precedence(&self.attrs),
+            },
+
+            ExprKind::Become(_) => ExprPrecedence::Jump,
 
             // `Range` claims to have higher precedence than `Assign`, but `x .. x = x` fails to
             // parse, instead of parsing as `(x .. x) = x`. Giving `Range` a lower precedence
@@ -1469,7 +1505,7 @@ impl Expr {
             | ExprKind::Let(..)
             | ExprKind::Unary(..) => ExprPrecedence::Prefix,
 
-            // Never need parens
+            // Need parens if and only if there are prefix attributes.
             ExprKind::Array(_)
             | ExprKind::Await(..)
             | ExprKind::Use(..)
@@ -1502,8 +1538,9 @@ impl Expr {
             | ExprKind::Underscore
             | ExprKind::UnsafeBinderCast(..)
             | ExprKind::While(..)
+            | ExprKind::Yield(YieldKind::Postfix(..))
             | ExprKind::Err(_)
-            | ExprKind::Dummy => ExprPrecedence::Unambiguous,
+            | ExprKind::Dummy => prefix_attrs_precedence(&self.attrs),
         }
     }
 
@@ -1522,17 +1559,23 @@ impl Expr {
         )
     }
 
-    /// Creates a dummy `P<Expr>`.
+    /// Creates a dummy `Expr`.
     ///
     /// Should only be used when it will be replaced afterwards or as a return value when an error was encountered.
-    pub fn dummy() -> P<Expr> {
-        P(Expr {
+    pub fn dummy() -> Expr {
+        Expr {
             id: DUMMY_NODE_ID,
             kind: ExprKind::Dummy,
             span: DUMMY_SP,
             attrs: ThinVec::new(),
             tokens: None,
-        })
+        }
+    }
+}
+
+impl From<P<Expr>> for Expr {
+    fn from(value: P<Expr>) -> Self {
+        *value
     }
 }
 
@@ -2343,6 +2386,12 @@ impl Clone for Ty {
     }
 }
 
+impl From<P<Ty>> for Ty {
+    fn from(value: P<Ty>) -> Self {
+        *value
+    }
+}
+
 impl Ty {
     pub fn peel_refs(&self) -> &Self {
         let mut final_ty = self;
@@ -3520,6 +3569,38 @@ impl FnHeader {
             || matches!(constness, Const::Yes(_))
             || !matches!(ext, Extern::None)
     }
+
+    /// Return a span encompassing the header, or none if all options are default.
+    pub fn span(&self) -> Option<Span> {
+        fn append(a: &mut Option<Span>, b: Span) {
+            *a = match a {
+                None => Some(b),
+                Some(x) => Some(x.to(b)),
+            }
+        }
+
+        let mut full_span = None;
+
+        match self.safety {
+            Safety::Unsafe(span) | Safety::Safe(span) => append(&mut full_span, span),
+            Safety::Default => {}
+        };
+
+        if let Some(coroutine_kind) = self.coroutine_kind {
+            append(&mut full_span, coroutine_kind.span());
+        }
+
+        if let Const::Yes(span) = self.constness {
+            append(&mut full_span, span);
+        }
+
+        match self.ext {
+            Extern::Implicit(span) | Extern::Explicit(_, span) => append(&mut full_span, span),
+            Extern::None => {}
+        }
+
+        full_span
+    }
 }
 
 impl Default for FnHeader {
diff --git a/compiler/rustc_ast/src/expand/allocator.rs b/compiler/rustc_ast/src/expand/allocator.rs
index dd8d5ae624a..7dee2ed17b4 100644
--- a/compiler/rustc_ast/src/expand/allocator.rs
+++ b/compiler/rustc_ast/src/expand/allocator.rs
@@ -22,7 +22,7 @@ pub fn alloc_error_handler_name(alloc_error_handler_kind: AllocatorKind) -> &'st
     }
 }
 
-pub const NO_ALLOC_SHIM_IS_UNSTABLE: &str = "__rust_no_alloc_shim_is_unstable";
+pub const NO_ALLOC_SHIM_IS_UNSTABLE: &str = "__rust_no_alloc_shim_is_unstable_v2";
 
 pub enum AllocatorTy {
     Layout,
diff --git a/compiler/rustc_ast/src/mut_visit.rs b/compiler/rustc_ast/src/mut_visit.rs
index 71a47dcfcba..07fbe8045fc 100644
--- a/compiler/rustc_ast/src/mut_visit.rs
+++ b/compiler/rustc_ast/src/mut_visit.rs
@@ -168,7 +168,7 @@ pub trait MutVisitor: Sized + MutVisitorResult<Result = ()> {
         walk_flat_map_arm(self, arm)
     }
 
-    fn visit_pat(&mut self, p: &mut P<Pat>) {
+    fn visit_pat(&mut self, p: &mut Pat) {
         walk_pat(self, p);
     }
 
@@ -176,7 +176,7 @@ pub trait MutVisitor: Sized + MutVisitorResult<Result = ()> {
         walk_anon_const(self, c);
     }
 
-    fn visit_expr(&mut self, e: &mut P<Expr>) {
+    fn visit_expr(&mut self, e: &mut Expr) {
         walk_expr(self, e);
     }
 
@@ -194,7 +194,7 @@ pub trait MutVisitor: Sized + MutVisitorResult<Result = ()> {
         walk_generic_arg(self, arg);
     }
 
-    fn visit_ty(&mut self, t: &mut P<Ty>) {
+    fn visit_ty(&mut self, t: &mut Ty) {
         walk_ty(self, t);
     }
 
diff --git a/compiler/rustc_ast/src/visit.rs b/compiler/rustc_ast/src/visit.rs
index c88aa5c33ea..bd2ab34bfc1 100644
--- a/compiler/rustc_ast/src/visit.rs
+++ b/compiler/rustc_ast/src/visit.rs
@@ -884,7 +884,7 @@ macro_rules! common_visitor_and_walkers {
                 TyKind::BareFn(function_declaration) => {
                     let BareFnTy { safety, ext: _, generic_params, decl, decl_span } =
                         &$($mut)? **function_declaration;
-                    visit_safety(vis, safety);
+                    try_visit!(visit_safety(vis, safety));
                     try_visit!(visit_generic_params(vis, generic_params));
                     try_visit!(vis.visit_fn_decl(decl));
                     try_visit!(visit_span(vis, decl_span));
@@ -1235,7 +1235,7 @@ macro_rules! common_visitor_and_walkers {
                     bounds,
                     bound_generic_params,
                 }) => {
-                    visit_generic_params(vis, bound_generic_params);
+                    try_visit!(visit_generic_params(vis, bound_generic_params));
                     try_visit!(vis.visit_ty(bounded_ty));
                     walk_list!(vis, visit_param_bound, bounds, BoundKind::Bound);
                 }
@@ -1420,7 +1420,7 @@ macro_rules! common_visitor_and_walkers {
                     let StructExpr { qself, path, fields, rest } = &$($mut)?**se;
                     try_visit!(vis.visit_qself(qself));
                     try_visit!(vis.visit_path(path));
-                    visit_expr_fields(vis, fields);
+                    try_visit!(visit_expr_fields(vis, fields));
                     match rest {
                         StructRest::Base(expr) => try_visit!(vis.visit_expr(expr)),
                         StructRest::Rest(_span) => {}
@@ -1700,7 +1700,8 @@ fn visit_nested_use_tree<'a, V: Visitor<'a>>(
 }
 
 pub fn walk_stmt<'a, V: Visitor<'a>>(visitor: &mut V, statement: &'a Stmt) -> V::Result {
-    let Stmt { id: _, kind, span: _ } = statement;
+    let Stmt { id, kind, span: _ } = statement;
+    try_visit!(visit_id(visitor, id));
     match kind {
         StmtKind::Let(local) => try_visit!(visitor.visit_local(local)),
         StmtKind::Item(item) => try_visit!(visitor.visit_item(item)),
diff --git a/compiler/rustc_ast_lowering/messages.ftl b/compiler/rustc_ast_lowering/messages.ftl
index 5ef76fb64aa..c6472fd45fa 100644
--- a/compiler/rustc_ast_lowering/messages.ftl
+++ b/compiler/rustc_ast_lowering/messages.ftl
@@ -172,13 +172,12 @@ ast_lowering_template_modifier = template modifier
 
 ast_lowering_this_not_async = this is not `async`
 
-ast_lowering_underscore_array_length_unstable =
-    using `_` for array lengths is unstable
-
 ast_lowering_underscore_expr_lhs_assign =
     in expressions, `_` can only be used on the left-hand side of an assignment
     .label = `_` not allowed here
 
+ast_lowering_union_default_field_values = unions cannot have default field values
+
 ast_lowering_unstable_inline_assembly = inline assembly is not stable yet on this architecture
 ast_lowering_unstable_inline_assembly_label_operand_with_outputs =
     using both label and output operands for inline assembly is unstable
diff --git a/compiler/rustc_ast_lowering/src/errors.rs b/compiler/rustc_ast_lowering/src/errors.rs
index 576fa9731e9..b444324ef91 100644
--- a/compiler/rustc_ast_lowering/src/errors.rs
+++ b/compiler/rustc_ast_lowering/src/errors.rs
@@ -475,3 +475,10 @@ pub(crate) struct UseConstGenericArg {
     #[suggestion_part(code = "{other_args}")]
     pub call_args: Span,
 }
+
+#[derive(Diagnostic)]
+#[diag(ast_lowering_union_default_field_values)]
+pub(crate) struct UnionWithDefault {
+    #[primary_span]
+    pub span: Span,
+}
diff --git a/compiler/rustc_ast_lowering/src/expr.rs b/compiler/rustc_ast_lowering/src/expr.rs
index 537d4a2a6af..718edad0cc6 100644
--- a/compiler/rustc_ast_lowering/src/expr.rs
+++ b/compiler/rustc_ast_lowering/src/expr.rs
@@ -73,16 +73,15 @@ impl<'hir> LoweringContext<'_, 'hir> {
                     // Merge attributes into the inner expression.
                     if !e.attrs.is_empty() {
                         let old_attrs = self.attrs.get(&ex.hir_id.local_id).copied().unwrap_or(&[]);
-                        let attrs = &*self.arena.alloc_from_iter(
-                            self.lower_attrs_vec(&e.attrs, e.span)
-                                .into_iter()
-                                .chain(old_attrs.iter().cloned()),
-                        );
-                        if attrs.is_empty() {
+                        let new_attrs = self
+                            .lower_attrs_vec(&e.attrs, e.span, ex.hir_id)
+                            .into_iter()
+                            .chain(old_attrs.iter().cloned());
+                        let new_attrs = &*self.arena.alloc_from_iter(new_attrs);
+                        if new_attrs.is_empty() {
                             return ex;
                         }
-
-                        self.attrs.insert(ex.hir_id.local_id, attrs);
+                        self.attrs.insert(ex.hir_id.local_id, new_attrs);
                     }
                     return ex;
                 }
@@ -2035,7 +2034,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
                 let ret_expr = self.checked_return(Some(from_residual_expr));
                 self.arena.alloc(self.expr(try_span, ret_expr))
             };
-            self.lower_attrs(ret_expr.hir_id, &attrs, ret_expr.span);
+            self.lower_attrs(ret_expr.hir_id, &attrs, span);
 
             let break_pat = self.pat_cf_break(try_span, residual_local);
             self.arm(break_pat, ret_expr)
diff --git a/compiler/rustc_ast_lowering/src/item.rs b/compiler/rustc_ast_lowering/src/item.rs
index d1a2ddbdb34..ef27d0ef69b 100644
--- a/compiler/rustc_ast_lowering/src/item.rs
+++ b/compiler/rustc_ast_lowering/src/item.rs
@@ -17,6 +17,7 @@ use tracing::instrument;
 
 use super::errors::{
     InvalidAbi, InvalidAbiSuggestion, MisplacedRelaxTraitBound, TupleStructWithDefault,
+    UnionWithDefault,
 };
 use super::stability::{enabled_names, gate_unstable_abi};
 use super::{
@@ -63,7 +64,7 @@ impl<'a, 'hir> ItemLowerer<'a, 'hir> {
 
         for (def_id, info) in lctx.children {
             let owner = self.owners.ensure_contains_elem(def_id, || hir::MaybeOwner::Phantom);
-            debug_assert!(
+            assert!(
                 matches!(owner, hir::MaybeOwner::Phantom),
                 "duplicate copy of {def_id:?} in lctx.children"
             );
@@ -78,7 +79,7 @@ impl<'a, 'hir> ItemLowerer<'a, 'hir> {
             match node {
                 AstOwner::NonOwner => {}
                 AstOwner::Crate(c) => {
-                    debug_assert_eq!(self.resolver.node_id_to_def_id[&CRATE_NODE_ID], CRATE_DEF_ID);
+                    assert_eq!(self.resolver.node_id_to_def_id[&CRATE_NODE_ID], CRATE_DEF_ID);
                     self.with_lctx(CRATE_NODE_ID, |lctx| {
                         let module = lctx.lower_mod(&c.items, &c.spans);
                         // FIXME(jdonszelman): is dummy span ever a problem here?
@@ -145,6 +146,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
             kind,
             vis_span,
             span: self.lower_span(i.span),
+            has_delayed_lints: !self.delayed_lints.is_empty(),
         };
         self.arena.alloc(item)
     }
@@ -315,7 +317,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
                     ImplTraitContext::Disallowed(ImplTraitPosition::Generic),
                     |this| {
                         this.arena.alloc_from_iter(
-                            enum_definition.variants.iter().map(|x| this.lower_variant(x)),
+                            enum_definition.variants.iter().map(|x| this.lower_variant(i, x)),
                         )
                     },
                 );
@@ -327,7 +329,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
                     generics,
                     id,
                     ImplTraitContext::Disallowed(ImplTraitPosition::Generic),
-                    |this| this.lower_variant_data(hir_id, struct_def),
+                    |this| this.lower_variant_data(hir_id, i, struct_def),
                 );
                 hir::ItemKind::Struct(ident, generics, struct_def)
             }
@@ -337,7 +339,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
                     generics,
                     id,
                     ImplTraitContext::Disallowed(ImplTraitPosition::Generic),
-                    |this| this.lower_variant_data(hir_id, vdata),
+                    |this| this.lower_variant_data(hir_id, i, vdata),
                 );
                 hir::ItemKind::Union(ident, generics, vdata)
             }
@@ -599,6 +601,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
                             kind,
                             vis_span,
                             span: this.lower_span(use_tree.span),
+                            has_delayed_lints: !this.delayed_lints.is_empty(),
                         };
                         hir::OwnerNode::Item(this.arena.alloc(item))
                     });
@@ -697,6 +700,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
             kind,
             vis_span: self.lower_span(i.vis.span),
             span: self.lower_span(i.span),
+            has_delayed_lints: !self.delayed_lints.is_empty(),
         };
         self.arena.alloc(item)
     }
@@ -711,13 +715,13 @@ impl<'hir> LoweringContext<'_, 'hir> {
         }
     }
 
-    fn lower_variant(&mut self, v: &Variant) -> hir::Variant<'hir> {
+    fn lower_variant(&mut self, item_kind: &ItemKind, v: &Variant) -> hir::Variant<'hir> {
         let hir_id = self.lower_node_id(v.id);
         self.lower_attrs(hir_id, &v.attrs, v.span);
         hir::Variant {
             hir_id,
             def_id: self.local_def_id(v.id),
-            data: self.lower_variant_data(hir_id, &v.data),
+            data: self.lower_variant_data(hir_id, item_kind, &v.data),
             disr_expr: v.disr_expr.as_ref().map(|e| self.lower_anon_const_to_anon_const(e)),
             ident: self.lower_ident(v.ident),
             span: self.lower_span(v.span),
@@ -727,15 +731,36 @@ impl<'hir> LoweringContext<'_, 'hir> {
     fn lower_variant_data(
         &mut self,
         parent_id: hir::HirId,
+        item_kind: &ItemKind,
         vdata: &VariantData,
     ) -> hir::VariantData<'hir> {
         match vdata {
-            VariantData::Struct { fields, recovered } => hir::VariantData::Struct {
-                fields: self
+            VariantData::Struct { fields, recovered } => {
+                let fields = self
                     .arena
-                    .alloc_from_iter(fields.iter().enumerate().map(|f| self.lower_field_def(f))),
-                recovered: *recovered,
-            },
+                    .alloc_from_iter(fields.iter().enumerate().map(|f| self.lower_field_def(f)));
+
+                if let ItemKind::Union(..) = item_kind {
+                    for field in &fields[..] {
+                        if let Some(default) = field.default {
+                            // Unions cannot derive `Default`, and it's not clear how to use default
+                            // field values of unions if that was supported. Therefore, blanket reject
+                            // trying to use field values with unions.
+                            if self.tcx.features().default_field_values() {
+                                self.dcx().emit_err(UnionWithDefault { span: default.span });
+                            } else {
+                                let _ = self.dcx().span_delayed_bug(
+                                default.span,
+                                "expected union default field values feature gate error but none \
+                                was produced",
+                            );
+                            }
+                        }
+                    }
+                }
+
+                hir::VariantData::Struct { fields, recovered: *recovered }
+            }
             VariantData::Tuple(fields, id) => {
                 let ctor_id = self.lower_node_id(*id);
                 self.alias_attrs(ctor_id, parent_id);
@@ -941,6 +966,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
             kind,
             span: self.lower_span(i.span),
             defaultness: hir::Defaultness::Default { has_value: has_default },
+            has_delayed_lints: !self.delayed_lints.is_empty(),
         };
         self.arena.alloc(item)
     }
@@ -1100,6 +1126,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
             vis_span: self.lower_span(i.vis.span),
             span: self.lower_span(i.span),
             defaultness,
+            has_delayed_lints: !self.delayed_lints.is_empty(),
         };
         self.arena.alloc(item)
     }
@@ -1160,7 +1187,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
     ) -> hir::BodyId {
         let body = hir::Body { params, value: self.arena.alloc(value) };
         let id = body.id();
-        debug_assert_eq!(id.hir_id.owner, self.current_hir_id_owner);
+        assert_eq!(id.hir_id.owner, self.current_hir_id_owner);
         self.bodies.push((id.hir_id.local_id, self.arena.alloc(body)));
         id
     }
@@ -1673,8 +1700,8 @@ impl<'hir> LoweringContext<'_, 'hir> {
         itctx: ImplTraitContext,
         f: impl FnOnce(&mut Self) -> T,
     ) -> (&'hir hir::Generics<'hir>, T) {
-        debug_assert!(self.impl_trait_defs.is_empty());
-        debug_assert!(self.impl_trait_bounds.is_empty());
+        assert!(self.impl_trait_defs.is_empty());
+        assert!(self.impl_trait_bounds.is_empty());
 
         // Error if `?Trait` bounds in where clauses don't refer directly to type parameters.
         // Note: we used to clone these bounds directly onto the type parameter (and avoid lowering
diff --git a/compiler/rustc_ast_lowering/src/lib.rs b/compiler/rustc_ast_lowering/src/lib.rs
index b99df8bd7e5..e74fd1db15b 100644
--- a/compiler/rustc_ast_lowering/src/lib.rs
+++ b/compiler/rustc_ast_lowering/src/lib.rs
@@ -48,9 +48,10 @@ use rustc_data_structures::sorted_map::SortedMap;
 use rustc_data_structures::stable_hasher::{HashStable, StableHasher};
 use rustc_data_structures::sync::spawn;
 use rustc_data_structures::tagged_ptr::TaggedRef;
-use rustc_errors::{DiagArgFromDisplay, DiagCtxtHandle, StashKey};
+use rustc_errors::{DiagArgFromDisplay, DiagCtxtHandle};
 use rustc_hir::def::{DefKind, LifetimeRes, Namespace, PartialRes, PerNS, Res};
 use rustc_hir::def_id::{CRATE_DEF_ID, LOCAL_CRATE, LocalDefId};
+use rustc_hir::lints::DelayedLint;
 use rustc_hir::{
     self as hir, AngleBrackets, ConstArg, GenericArg, HirId, ItemLocalMap, LangItem,
     LifetimeSource, LifetimeSyntax, ParamName, TraitCandidate,
@@ -59,7 +60,7 @@ use rustc_index::{Idx, IndexSlice, IndexVec};
 use rustc_macros::extension;
 use rustc_middle::span_bug;
 use rustc_middle::ty::{ResolverAstLowering, TyCtxt};
-use rustc_session::parse::{add_feature_diagnostics, feature_err};
+use rustc_session::parse::add_feature_diagnostics;
 use rustc_span::symbol::{Ident, Symbol, kw, sym};
 use rustc_span::{DUMMY_SP, DesugaringKind, Span};
 use smallvec::SmallVec;
@@ -141,6 +142,8 @@ struct LoweringContext<'a, 'hir> {
     allow_for_await: Arc<[Symbol]>,
     allow_async_fn_traits: Arc<[Symbol]>,
 
+    delayed_lints: Vec<DelayedLint>,
+
     attribute_parser: AttributeParser<'hir>,
 }
 
@@ -190,6 +193,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
             allow_async_iterator: [sym::gen_future, sym::async_iterator].into(),
 
             attribute_parser: AttributeParser::new(tcx.sess, tcx.features(), registered_tools),
+            delayed_lints: Vec::new(),
         }
     }
 
@@ -198,6 +202,22 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
     }
 }
 
+struct SpanLowerer {
+    is_incremental: bool,
+    def_id: LocalDefId,
+}
+
+impl SpanLowerer {
+    fn lower(&self, span: Span) -> Span {
+        if self.is_incremental {
+            span.with_parent(Some(self.def_id))
+        } else {
+            // Do not make spans relative when not using incremental compilation.
+            span
+        }
+    }
+}
+
 #[extension(trait ResolverAstLoweringExt)]
 impl ResolverAstLowering {
     fn legacy_const_generic_args(&self, expr: &Expr) -> Option<Vec<usize>> {
@@ -503,7 +523,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         span: Span,
     ) -> LocalDefId {
         let parent = self.current_hir_id_owner.def_id;
-        debug_assert_ne!(node_id, ast::DUMMY_NODE_ID);
+        assert_ne!(node_id, ast::DUMMY_NODE_ID);
         assert!(
             self.opt_local_def_id(node_id).is_none(),
             "adding a def'n for node-id {:?} and def kind {:?} but a previous def'n exists: {:?}",
@@ -573,6 +593,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
             std::mem::replace(&mut self.item_local_id_counter, hir::ItemLocalId::new(1));
         let current_impl_trait_defs = std::mem::take(&mut self.impl_trait_defs);
         let current_impl_trait_bounds = std::mem::take(&mut self.impl_trait_bounds);
+        let current_delayed_lints = std::mem::take(&mut self.delayed_lints);
 
         // Do not reset `next_node_id` and `node_id_to_def_id`:
         // we want `f` to be able to refer to the `LocalDefId`s that the caller created.
@@ -586,10 +607,10 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         }
 
         let item = f(self);
-        debug_assert_eq!(owner_id, item.def_id());
+        assert_eq!(owner_id, item.def_id());
         // `f` should have consumed all the elements in these vectors when constructing `item`.
-        debug_assert!(self.impl_trait_defs.is_empty());
-        debug_assert!(self.impl_trait_bounds.is_empty());
+        assert!(self.impl_trait_defs.is_empty());
+        assert!(self.impl_trait_bounds.is_empty());
         let info = self.make_owner_info(item);
 
         self.attrs = current_attrs;
@@ -606,6 +627,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         self.item_local_id_counter = current_local_counter;
         self.impl_trait_defs = current_impl_trait_defs;
         self.impl_trait_bounds = current_impl_trait_bounds;
+        self.delayed_lints = current_delayed_lints;
 
         debug_assert!(!self.children.iter().any(|(id, _)| id == &owner_id.def_id));
         self.children.push((owner_id.def_id, hir::MaybeOwner::Owner(info)));
@@ -616,6 +638,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         let mut bodies = std::mem::take(&mut self.bodies);
         let define_opaque = std::mem::take(&mut self.define_opaque);
         let trait_map = std::mem::take(&mut self.trait_map);
+        let delayed_lints = std::mem::take(&mut self.delayed_lints).into_boxed_slice();
 
         #[cfg(debug_assertions)]
         for (id, attrs) in attrs.iter() {
@@ -629,14 +652,16 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         let bodies = SortedMap::from_presorted_elements(bodies);
 
         // Don't hash unless necessary, because it's expensive.
-        let (opt_hash_including_bodies, attrs_hash) =
-            self.tcx.hash_owner_nodes(node, &bodies, &attrs, define_opaque);
+        let (opt_hash_including_bodies, attrs_hash, delayed_lints_hash) =
+            self.tcx.hash_owner_nodes(node, &bodies, &attrs, &delayed_lints, define_opaque);
         let num_nodes = self.item_local_id_counter.as_usize();
         let (nodes, parenting) = index::index_hir(self.tcx, node, &bodies, num_nodes);
         let nodes = hir::OwnerNodes { opt_hash_including_bodies, nodes, bodies };
         let attrs = hir::AttributeMap { map: attrs, opt_hash: attrs_hash, define_opaque };
+        let delayed_lints =
+            hir::lints::DelayedLints { lints: delayed_lints, opt_hash: delayed_lints_hash };
 
-        self.arena.alloc(hir::OwnerInfo { nodes, parenting, attrs, trait_map })
+        self.arena.alloc(hir::OwnerInfo { nodes, parenting, attrs, trait_map, delayed_lints })
     }
 
     /// This method allocates a new `HirId` for the given `NodeId`.
@@ -759,15 +784,17 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         })
     }
 
+    fn span_lowerer(&self) -> SpanLowerer {
+        SpanLowerer {
+            is_incremental: self.tcx.sess.opts.incremental.is_some(),
+            def_id: self.current_hir_id_owner.def_id,
+        }
+    }
+
     /// Intercept all spans entering HIR.
     /// Mark a span as relative to the current owning item.
     fn lower_span(&self, span: Span) -> Span {
-        if self.tcx.sess.opts.incremental.is_some() {
-            span.with_parent(Some(self.current_hir_id_owner.def_id))
-        } else {
-            // Do not make spans relative when not using incremental compilation.
-            span
-        }
+        self.span_lowerer().lower(span)
     }
 
     fn lower_ident(&self, ident: Ident) -> Ident {
@@ -889,9 +916,9 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         if attrs.is_empty() {
             &[]
         } else {
-            let lowered_attrs = self.lower_attrs_vec(attrs, self.lower_span(target_span));
+            let lowered_attrs = self.lower_attrs_vec(attrs, self.lower_span(target_span), id);
 
-            debug_assert_eq!(id.owner, self.current_hir_id_owner);
+            assert_eq!(id.owner, self.current_hir_id_owner);
             let ret = self.arena.alloc_from_iter(lowered_attrs);
 
             // this is possible if an item contained syntactical attribute,
@@ -909,16 +936,30 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         }
     }
 
-    fn lower_attrs_vec(&self, attrs: &[Attribute], target_span: Span) -> Vec<hir::Attribute> {
-        self.attribute_parser
-            .parse_attribute_list(attrs, target_span, OmitDoc::Lower, |s| self.lower_span(s))
+    fn lower_attrs_vec(
+        &mut self,
+        attrs: &[Attribute],
+        target_span: Span,
+        target_hir_id: HirId,
+    ) -> Vec<hir::Attribute> {
+        let l = self.span_lowerer();
+        self.attribute_parser.parse_attribute_list(
+            attrs,
+            target_span,
+            target_hir_id,
+            OmitDoc::Lower,
+            |s| l.lower(s),
+            |l| {
+                self.delayed_lints.push(DelayedLint::AttributeParsing(l));
+            },
+        )
     }
 
     fn alias_attrs(&mut self, id: HirId, target_id: HirId) {
-        debug_assert_eq!(id.owner, self.current_hir_id_owner);
-        debug_assert_eq!(target_id.owner, self.current_hir_id_owner);
+        assert_eq!(id.owner, self.current_hir_id_owner);
+        assert_eq!(target_id.owner, self.current_hir_id_owner);
         if let Some(&a) = self.attrs.get(&target_id.local_id) {
-            debug_assert!(!a.is_empty());
+            assert!(!a.is_empty());
             self.attrs.insert(id.local_id, a);
         }
     }
@@ -1397,7 +1438,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
                 let id = if let Some(LifetimeRes::ElidedAnchor { start, end }) =
                     self.resolver.get_lifetime_res(t.id)
                 {
-                    debug_assert_eq!(start.plus(1), end);
+                    assert_eq!(start.plus(1), end);
                     start
                 } else {
                     self.next_node_id()
@@ -1805,16 +1846,16 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         let res = match res {
             LifetimeRes::Param { param, .. } => hir::LifetimeKind::Param(param),
             LifetimeRes::Fresh { param, .. } => {
-                debug_assert_eq!(ident.name, kw::UnderscoreLifetime);
+                assert_eq!(ident.name, kw::UnderscoreLifetime);
                 let param = self.local_def_id(param);
                 hir::LifetimeKind::Param(param)
             }
             LifetimeRes::Infer => {
-                debug_assert_eq!(ident.name, kw::UnderscoreLifetime);
+                assert_eq!(ident.name, kw::UnderscoreLifetime);
                 hir::LifetimeKind::Infer
             }
             LifetimeRes::Static { .. } => {
-                debug_assert!(matches!(ident.name, kw::StaticLifetime | kw::UnderscoreLifetime));
+                assert!(matches!(ident.name, kw::StaticLifetime | kw::UnderscoreLifetime));
                 hir::LifetimeKind::Static
             }
             LifetimeRes::Error => hir::LifetimeKind::Error,
@@ -2068,15 +2109,6 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
         // `ExprKind::Paren(ExprKind::Underscore)` and should also be lowered to `GenericArg::Infer`
         match c.value.peel_parens().kind {
             ExprKind::Underscore => {
-                if !self.tcx.features().generic_arg_infer() {
-                    feature_err(
-                        &self.tcx.sess,
-                        sym::generic_arg_infer,
-                        c.value.span,
-                        fluent_generated::ast_lowering_underscore_array_length_unstable,
-                    )
-                    .stash(c.value.span, StashKey::UnderscoreForArrayLengths);
-                }
                 let ct_kind = hir::ConstArgKind::Infer(self.lower_span(c.value.span), ());
                 self.arena.alloc(hir::ConstArg { hir_id: self.lower_node_id(c.id), kind: ct_kind })
             }
@@ -2106,7 +2138,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
                 ty_id,
                 &None,
                 path,
-                ParamMode::Optional,
+                ParamMode::Explicit,
                 AllowReturnTypeNotation::No,
                 // FIXME(mgca): update for `fn foo() -> Bar<FOO<impl Trait>>` support
                 ImplTraitContext::Disallowed(ImplTraitPosition::Path),
@@ -2178,7 +2210,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
                 expr.id,
                 qself,
                 path,
-                ParamMode::Optional,
+                ParamMode::Explicit,
                 AllowReturnTypeNotation::No,
                 // FIXME(mgca): update for `fn foo() -> Bar<FOO<impl Trait>>` support
                 ImplTraitContext::Disallowed(ImplTraitPosition::Path),
@@ -2244,7 +2276,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
     ) -> hir::Stmt<'hir> {
         let hir_id = self.next_id();
         if let Some(a) = attrs {
-            debug_assert!(!a.is_empty());
+            assert!(!a.is_empty());
             self.attrs.insert(hir_id.local_id, a);
         }
         let local = hir::LetStmt {
diff --git a/compiler/rustc_ast_lowering/src/stability.rs b/compiler/rustc_ast_lowering/src/stability.rs
index eb052ba1c6d..b8fa2dd3dd6 100644
--- a/compiler/rustc_ast_lowering/src/stability.rs
+++ b/compiler/rustc_ast_lowering/src/stability.rs
@@ -134,5 +134,8 @@ pub fn extern_abi_stability(abi: ExternAbi) -> Result<(), UnstableAbi> {
             feature: sym::cmse_nonsecure_entry,
             explain: GateReason::Experimental,
         }),
+        ExternAbi::Custom => {
+            Err(UnstableAbi { abi, feature: sym::abi_custom, explain: GateReason::Experimental })
+        }
     }
 }
diff --git a/compiler/rustc_ast_passes/messages.ftl b/compiler/rustc_ast_passes/messages.ftl
index 80754a8f65a..9a267501230 100644
--- a/compiler/rustc_ast_passes/messages.ftl
+++ b/compiler/rustc_ast_passes/messages.ftl
@@ -1,3 +1,20 @@
+ast_passes_abi_custom_coroutine =
+    functions with the `"custom"` ABI cannot be `{$coroutine_kind_str}`
+    .suggestion = remove the `{$coroutine_kind_str}` keyword from this definiton
+
+ast_passes_abi_custom_invalid_signature =
+    invalid signature for `extern "custom"` function
+    .note = functions with the `"custom"` ABI cannot have any parameters or return type
+    .suggestion = remove the parameters and return type
+
+ast_passes_abi_custom_safe_foreign_function =
+    foreign functions with the `"custom"` ABI cannot be safe
+    .suggestion = remove the `safe` keyword from this definition
+
+ast_passes_abi_custom_safe_function =
+    functions with the `"custom"` ABI must be unsafe
+    .suggestion = add the `unsafe` keyword to this definition
+
 ast_passes_assoc_const_without_body =
     associated constant in `impl` without body
     .suggestion = provide a definition for the constant
diff --git a/compiler/rustc_ast_passes/src/ast_validation.rs b/compiler/rustc_ast_passes/src/ast_validation.rs
index d6fe04d2994..b69a91e2f5f 100644
--- a/compiler/rustc_ast_passes/src/ast_validation.rs
+++ b/compiler/rustc_ast_passes/src/ast_validation.rs
@@ -18,6 +18,7 @@
 
 use std::mem;
 use std::ops::{Deref, DerefMut};
+use std::str::FromStr;
 
 use itertools::{Either, Itertools};
 use rustc_abi::ExternAbi;
@@ -81,6 +82,7 @@ struct AstValidator<'a> {
 
     /// Used to ban explicit safety on foreign items when the extern block is not marked as unsafe.
     extern_mod_safety: Option<Safety>,
+    extern_mod_abi: Option<ExternAbi>,
 
     lint_node_id: NodeId,
 
@@ -121,10 +123,17 @@ impl<'a> AstValidator<'a> {
         self.outer_trait_or_trait_impl = old;
     }
 
-    fn with_in_extern_mod(&mut self, extern_mod_safety: Safety, f: impl FnOnce(&mut Self)) {
-        let old = mem::replace(&mut self.extern_mod_safety, Some(extern_mod_safety));
+    fn with_in_extern_mod(
+        &mut self,
+        extern_mod_safety: Safety,
+        abi: Option<ExternAbi>,
+        f: impl FnOnce(&mut Self),
+    ) {
+        let old_safety = mem::replace(&mut self.extern_mod_safety, Some(extern_mod_safety));
+        let old_abi = mem::replace(&mut self.extern_mod_abi, abi);
         f(self);
-        self.extern_mod_safety = old;
+        self.extern_mod_safety = old_safety;
+        self.extern_mod_abi = old_abi;
     }
 
     fn with_tilde_const(
@@ -215,20 +224,6 @@ impl<'a> AstValidator<'a> {
         }
     }
 
-    fn visit_struct_field_def(&mut self, field: &'a FieldDef) {
-        if let Some(ref ident) = field.ident
-            && ident.name == kw::Underscore
-        {
-            self.visit_vis(&field.vis);
-            self.visit_ident(ident);
-            self.visit_ty_common(&field.ty);
-            self.walk_ty(&field.ty);
-            walk_list!(self, visit_attribute, &field.attrs);
-        } else {
-            self.visit_field_def(field);
-        }
-    }
-
     fn dcx(&self) -> DiagCtxtHandle<'a> {
         self.sess.dcx()
     }
@@ -370,6 +365,65 @@ impl<'a> AstValidator<'a> {
         }
     }
 
+    /// An `extern "custom"` function must be unsafe, and must not have any parameters or return
+    /// type.
+    fn check_custom_abi(&self, ctxt: FnCtxt, ident: &Ident, sig: &FnSig) {
+        let dcx = self.dcx();
+
+        // An `extern "custom"` function must be unsafe.
+        match sig.header.safety {
+            Safety::Unsafe(_) => { /* all good */ }
+            Safety::Safe(safe_span) => {
+                let safe_span =
+                    self.sess.psess.source_map().span_until_non_whitespace(safe_span.to(sig.span));
+                dcx.emit_err(errors::AbiCustomSafeForeignFunction { span: sig.span, safe_span });
+            }
+            Safety::Default => match ctxt {
+                FnCtxt::Foreign => { /* all good */ }
+                FnCtxt::Free | FnCtxt::Assoc(_) => {
+                    self.dcx().emit_err(errors::AbiCustomSafeFunction {
+                        span: sig.span,
+                        unsafe_span: sig.span.shrink_to_lo(),
+                    });
+                }
+            },
+        }
+
+        // An `extern "custom"` function cannot be `async` and/or `gen`.
+        if let Some(coroutine_kind) = sig.header.coroutine_kind {
+            let coroutine_kind_span = self
+                .sess
+                .psess
+                .source_map()
+                .span_until_non_whitespace(coroutine_kind.span().to(sig.span));
+
+            self.dcx().emit_err(errors::AbiCustomCoroutine {
+                span: sig.span,
+                coroutine_kind_span,
+                coroutine_kind_str: coroutine_kind.as_str(),
+            });
+        }
+
+        // An `extern "custom"` function must not have any parameters or return type.
+        let mut spans: Vec<_> = sig.decl.inputs.iter().map(|p| p.span).collect();
+        if let FnRetTy::Ty(ref ret_ty) = sig.decl.output {
+            spans.push(ret_ty.span);
+        }
+
+        if !spans.is_empty() {
+            let header_span = sig.header.span().unwrap_or(sig.span.shrink_to_lo());
+            let suggestion_span = header_span.shrink_to_hi().to(sig.decl.output.span());
+            let padding = if header_span.is_empty() { "" } else { " " };
+
+            self.dcx().emit_err(errors::AbiCustomInvalidSignature {
+                spans,
+                symbol: ident.name,
+                suggestion_span,
+                padding,
+            });
+        }
+    }
+
     /// This ensures that items can only be `unsafe` (or unmarked) outside of extern
     /// blocks.
     ///
@@ -1005,7 +1059,9 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
                 if abi.is_none() {
                     self.handle_missing_abi(*extern_span, item.id);
                 }
-                self.with_in_extern_mod(*safety, |this| {
+
+                let extern_abi = abi.and_then(|abi| ExternAbi::from_str(abi.symbol.as_str()).ok());
+                self.with_in_extern_mod(*safety, extern_abi, |this| {
                     visit::walk_item(this, item);
                 });
                 self.extern_mod_span = old_item;
@@ -1065,8 +1121,7 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
                 VariantData::Struct { fields, .. } => {
                     self.visit_attrs_vis_ident(&item.attrs, &item.vis, ident);
                     self.visit_generics(generics);
-                    // Permit `Anon{Struct,Union}` as field type.
-                    walk_list!(self, visit_struct_field_def, fields);
+                    walk_list!(self, visit_field_def, fields);
                 }
                 _ => visit::walk_item(self, item),
             },
@@ -1078,8 +1133,7 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
                     VariantData::Struct { fields, .. } => {
                         self.visit_attrs_vis_ident(&item.attrs, &item.vis, ident);
                         self.visit_generics(generics);
-                        // Permit `Anon{Struct,Union}` as field type.
-                        walk_list!(self, visit_struct_field_def, fields);
+                        walk_list!(self, visit_field_def, fields);
                     }
                     _ => visit::walk_item(self, item),
                 }
@@ -1145,6 +1199,9 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
                 self.check_foreign_fn_bodyless(*ident, body.as_deref());
                 self.check_foreign_fn_headerless(sig.header);
                 self.check_foreign_item_ascii_only(*ident);
+                if self.extern_mod_abi == Some(ExternAbi::Custom) {
+                    self.check_custom_abi(FnCtxt::Foreign, ident, sig);
+                }
             }
             ForeignItemKind::TyAlias(box TyAlias {
                 defaultness,
@@ -1352,6 +1409,13 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
             self.check_item_safety(span, safety);
         }
 
+        if let FnKind::Fn(ctxt, _, fun) = fk
+            && let Extern::Explicit(str_lit, _) = fun.sig.header.ext
+            && let Ok(ExternAbi::Custom) = ExternAbi::from_str(str_lit.symbol.as_str())
+        {
+            self.check_custom_abi(ctxt, &fun.ident, &fun.sig);
+        }
+
         self.check_c_variadic_type(fk);
 
         // Functions cannot both be `const async` or `const gen`
@@ -1703,6 +1767,7 @@ pub fn check_crate(
         outer_impl_trait_span: None,
         disallow_tilde_const: Some(TildeConstReason::Item),
         extern_mod_safety: None,
+        extern_mod_abi: None,
         lint_node_id: CRATE_NODE_ID,
         is_sdylib_interface,
         lint_buffer: lints,
diff --git a/compiler/rustc_ast_passes/src/errors.rs b/compiler/rustc_ast_passes/src/errors.rs
index 6f9737e0831..c437e62f4d3 100644
--- a/compiler/rustc_ast_passes/src/errors.rs
+++ b/compiler/rustc_ast_passes/src/errors.rs
@@ -824,3 +824,67 @@ pub(crate) struct MissingAbi {
     #[suggestion(code = "extern \"<abi>\"", applicability = "has-placeholders")]
     pub span: Span,
 }
+
+#[derive(Diagnostic)]
+#[diag(ast_passes_abi_custom_safe_foreign_function)]
+pub(crate) struct AbiCustomSafeForeignFunction {
+    #[primary_span]
+    pub span: Span,
+
+    #[suggestion(
+        ast_passes_suggestion,
+        applicability = "maybe-incorrect",
+        code = "",
+        style = "verbose"
+    )]
+    pub safe_span: Span,
+}
+
+#[derive(Diagnostic)]
+#[diag(ast_passes_abi_custom_safe_function)]
+pub(crate) struct AbiCustomSafeFunction {
+    #[primary_span]
+    pub span: Span,
+
+    #[suggestion(
+        ast_passes_suggestion,
+        applicability = "maybe-incorrect",
+        code = "unsafe ",
+        style = "verbose"
+    )]
+    pub unsafe_span: Span,
+}
+
+#[derive(Diagnostic)]
+#[diag(ast_passes_abi_custom_coroutine)]
+pub(crate) struct AbiCustomCoroutine {
+    #[primary_span]
+    pub span: Span,
+
+    #[suggestion(
+        ast_passes_suggestion,
+        applicability = "maybe-incorrect",
+        code = "",
+        style = "verbose"
+    )]
+    pub coroutine_kind_span: Span,
+    pub coroutine_kind_str: &'static str,
+}
+
+#[derive(Diagnostic)]
+#[diag(ast_passes_abi_custom_invalid_signature)]
+#[note]
+pub(crate) struct AbiCustomInvalidSignature {
+    #[primary_span]
+    pub spans: Vec<Span>,
+
+    #[suggestion(
+        ast_passes_suggestion,
+        applicability = "maybe-incorrect",
+        code = "{padding}fn {symbol}()",
+        style = "verbose"
+    )]
+    pub suggestion_span: Span,
+    pub symbol: Symbol,
+    pub padding: &'static str,
+}
diff --git a/compiler/rustc_ast_passes/src/feature_gate.rs b/compiler/rustc_ast_passes/src/feature_gate.rs
index 3682d25d341..1ec56868f37 100644
--- a/compiler/rustc_ast_passes/src/feature_gate.rs
+++ b/compiler/rustc_ast_passes/src/feature_gate.rs
@@ -36,6 +36,16 @@ macro_rules! gate_alt {
             feature_err(&$visitor.sess, $name, $span, $explain).emit();
         }
     }};
+    ($visitor:expr, $has_feature:expr, $name:expr, $span:expr, $explain:expr, $notes: expr) => {{
+        if !$has_feature && !$span.allows_unstable($name) {
+            #[allow(rustc::untranslatable_diagnostic)] // FIXME: make this translatable
+            let mut diag = feature_err(&$visitor.sess, $name, $span, $explain);
+            for note in $notes {
+                diag.note(*note);
+            }
+            diag.emit();
+        }
+    }};
 }
 
 /// The case involving a multispan.
@@ -154,11 +164,11 @@ impl<'a> Visitor<'a> for PostExpansionVisitor<'a> {
         let attr_info = attr.ident().and_then(|ident| BUILTIN_ATTRIBUTE_MAP.get(&ident.name));
         // Check feature gates for built-in attributes.
         if let Some(BuiltinAttribute {
-            gate: AttributeGate::Gated(_, name, descr, has_feature),
+            gate: AttributeGate::Gated { feature, message, check, notes, .. },
             ..
         }) = attr_info
         {
-            gate_alt!(self, has_feature(self.features), *name, attr.span, *descr);
+            gate_alt!(self, check(self.features), *feature, attr.span, *message, *notes);
         }
         // Check unstable flavors of the `#[doc]` attribute.
         if attr.has_name(sym::doc) {
diff --git a/compiler/rustc_ast_pretty/src/pprust/mod.rs b/compiler/rustc_ast_pretty/src/pprust/mod.rs
index a05e2bd6a5d..a766e2006e5 100644
--- a/compiler/rustc_ast_pretty/src/pprust/mod.rs
+++ b/compiler/rustc_ast_pretty/src/pprust/mod.rs
@@ -53,6 +53,18 @@ pub fn item_to_string(i: &ast::Item) -> String {
     State::new().item_to_string(i)
 }
 
+pub fn assoc_item_to_string(i: &ast::AssocItem) -> String {
+    State::new().assoc_item_to_string(i)
+}
+
+pub fn foreign_item_to_string(i: &ast::ForeignItem) -> String {
+    State::new().foreign_item_to_string(i)
+}
+
+pub fn stmt_to_string(s: &ast::Stmt) -> String {
+    State::new().stmt_to_string(s)
+}
+
 pub fn path_to_string(p: &ast::Path) -> String {
     State::new().path_to_string(p)
 }
diff --git a/compiler/rustc_ast_pretty/src/pprust/state.rs b/compiler/rustc_ast_pretty/src/pprust/state.rs
index 0990c9b27eb..3d738fa31f2 100644
--- a/compiler/rustc_ast_pretty/src/pprust/state.rs
+++ b/compiler/rustc_ast_pretty/src/pprust/state.rs
@@ -1063,6 +1063,14 @@ pub trait PrintState<'a>: std::ops::Deref<Target = pp::Printer> + std::ops::Dere
         Self::to_string(|s| s.print_item(i))
     }
 
+    fn assoc_item_to_string(&self, i: &ast::AssocItem) -> String {
+        Self::to_string(|s| s.print_assoc_item(i))
+    }
+
+    fn foreign_item_to_string(&self, i: &ast::ForeignItem) -> String {
+        Self::to_string(|s| s.print_foreign_item(i))
+    }
+
     fn path_to_string(&self, p: &ast::Path) -> String {
         Self::to_string(|s| s.print_path(p, false, 0))
     }
diff --git a/compiler/rustc_ast_pretty/src/pprust/state/expr.rs b/compiler/rustc_ast_pretty/src/pprust/state/expr.rs
index c9a7e2aebd0..ee49246a4bb 100644
--- a/compiler/rustc_ast_pretty/src/pprust/state/expr.rs
+++ b/compiler/rustc_ast_pretty/src/pprust/state/expr.rs
@@ -7,8 +7,8 @@ use rustc_ast::util::classify;
 use rustc_ast::util::literal::escape_byte_str_symbol;
 use rustc_ast::util::parser::{self, ExprPrecedence, Fixity};
 use rustc_ast::{
-    self as ast, BlockCheckMode, FormatAlignment, FormatArgPosition, FormatArgsPiece, FormatCount,
-    FormatDebugHex, FormatSign, FormatTrait, YieldKind, token,
+    self as ast, BinOpKind, BlockCheckMode, FormatAlignment, FormatArgPosition, FormatArgsPiece,
+    FormatCount, FormatDebugHex, FormatSign, FormatTrait, YieldKind, token,
 };
 
 use crate::pp::Breaks::Inconsistent;
@@ -214,13 +214,6 @@ impl<'a> State<'a> {
     }
 
     fn print_expr_call(&mut self, func: &ast::Expr, args: &[P<ast::Expr>], fixup: FixupContext) {
-        let needs_paren = match func.kind {
-            // In order to call a named field, needs parens: `(self.fun)()`
-            // But not for an unnamed field: `self.0()`
-            ast::ExprKind::Field(_, name) => !name.is_numeric(),
-            _ => func.precedence() < ExprPrecedence::Unambiguous,
-        };
-
         // Independent of parenthesization related to precedence, we must
         // parenthesize `func` if this is a statement context in which without
         // parentheses, a statement boundary would occur inside `func` or
@@ -237,8 +230,16 @@ impl<'a> State<'a> {
         // because the latter is valid syntax but with the incorrect meaning.
         // It's a match-expression followed by tuple-expression, not a function
         // call.
-        self.print_expr_cond_paren(func, needs_paren, fixup.leftmost_subexpression());
+        let func_fixup = fixup.leftmost_subexpression_with_operator(true);
+
+        let needs_paren = match func.kind {
+            // In order to call a named field, needs parens: `(self.fun)()`
+            // But not for an unnamed field: `self.0()`
+            ast::ExprKind::Field(_, name) => !name.is_numeric(),
+            _ => func_fixup.precedence(func) < ExprPrecedence::Unambiguous,
+        };
 
+        self.print_expr_cond_paren(func, needs_paren, func_fixup);
         self.print_call_post(args)
     }
 
@@ -281,9 +282,24 @@ impl<'a> State<'a> {
         rhs: &ast::Expr,
         fixup: FixupContext,
     ) {
+        let operator_can_begin_expr = match op {
+            | BinOpKind::Sub     // -x
+            | BinOpKind::Mul     // *x
+            | BinOpKind::And     // &&x
+            | BinOpKind::Or      // || x
+            | BinOpKind::BitAnd  // &x
+            | BinOpKind::BitOr   // |x| x
+            | BinOpKind::Shl     // <<T as Trait>::Type as Trait>::CONST
+            | BinOpKind::Lt      // <T as Trait>::CONST
+              => true,
+            _ => false,
+        };
+
+        let left_fixup = fixup.leftmost_subexpression_with_operator(operator_can_begin_expr);
+
         let binop_prec = op.precedence();
-        let left_prec = lhs.precedence();
-        let right_prec = rhs.precedence();
+        let left_prec = left_fixup.precedence(lhs);
+        let right_prec = fixup.precedence(rhs);
 
         let (mut left_needs_paren, right_needs_paren) = match op.fixity() {
             Fixity::Left => (left_prec < binop_prec, right_prec <= binop_prec),
@@ -312,18 +328,18 @@ impl<'a> State<'a> {
             _ => {}
         }
 
-        self.print_expr_cond_paren(lhs, left_needs_paren, fixup.leftmost_subexpression());
+        self.print_expr_cond_paren(lhs, left_needs_paren, left_fixup);
         self.space();
         self.word_space(op.as_str());
-        self.print_expr_cond_paren(rhs, right_needs_paren, fixup.subsequent_subexpression());
+        self.print_expr_cond_paren(rhs, right_needs_paren, fixup.rightmost_subexpression());
     }
 
     fn print_expr_unary(&mut self, op: ast::UnOp, expr: &ast::Expr, fixup: FixupContext) {
         self.word(op.as_str());
         self.print_expr_cond_paren(
             expr,
-            expr.precedence() < ExprPrecedence::Prefix,
-            fixup.subsequent_subexpression(),
+            fixup.precedence(expr) < ExprPrecedence::Prefix,
+            fixup.rightmost_subexpression(),
         );
     }
 
@@ -344,8 +360,8 @@ impl<'a> State<'a> {
         }
         self.print_expr_cond_paren(
             expr,
-            expr.precedence() < ExprPrecedence::Prefix,
-            fixup.subsequent_subexpression(),
+            fixup.precedence(expr) < ExprPrecedence::Prefix,
+            fixup.rightmost_subexpression(),
         );
     }
 
@@ -590,8 +606,8 @@ impl<'a> State<'a> {
                 self.word_space("=");
                 self.print_expr_cond_paren(
                     rhs,
-                    rhs.precedence() < ExprPrecedence::Assign,
-                    fixup.subsequent_subexpression(),
+                    fixup.precedence(rhs) < ExprPrecedence::Assign,
+                    fixup.rightmost_subexpression(),
                 );
             }
             ast::ExprKind::AssignOp(op, lhs, rhs) => {
@@ -604,8 +620,8 @@ impl<'a> State<'a> {
                 self.word_space(op.node.as_str());
                 self.print_expr_cond_paren(
                     rhs,
-                    rhs.precedence() < ExprPrecedence::Assign,
-                    fixup.subsequent_subexpression(),
+                    fixup.precedence(rhs) < ExprPrecedence::Assign,
+                    fixup.rightmost_subexpression(),
                 );
             }
             ast::ExprKind::Field(expr, ident) => {
@@ -618,10 +634,11 @@ impl<'a> State<'a> {
                 self.print_ident(*ident);
             }
             ast::ExprKind::Index(expr, index, _) => {
+                let expr_fixup = fixup.leftmost_subexpression_with_operator(true);
                 self.print_expr_cond_paren(
                     expr,
-                    expr.precedence() < ExprPrecedence::Unambiguous,
-                    fixup.leftmost_subexpression(),
+                    expr_fixup.precedence(expr) < ExprPrecedence::Unambiguous,
+                    expr_fixup,
                 );
                 self.word("[");
                 self.print_expr(index, FixupContext::default());
@@ -634,10 +651,11 @@ impl<'a> State<'a> {
                 // a "normal" binop gets parenthesized. (`LOr` is the lowest-precedence binop.)
                 let fake_prec = ExprPrecedence::LOr;
                 if let Some(e) = start {
+                    let start_fixup = fixup.leftmost_subexpression_with_operator(true);
                     self.print_expr_cond_paren(
                         e,
-                        e.precedence() < fake_prec,
-                        fixup.leftmost_subexpression(),
+                        start_fixup.precedence(e) < fake_prec,
+                        start_fixup,
                     );
                 }
                 match limits {
@@ -647,8 +665,8 @@ impl<'a> State<'a> {
                 if let Some(e) = end {
                     self.print_expr_cond_paren(
                         e,
-                        e.precedence() < fake_prec,
-                        fixup.subsequent_subexpression(),
+                        fixup.precedence(e) < fake_prec,
+                        fixup.rightmost_subexpression(),
                     );
                 }
             }
@@ -665,11 +683,10 @@ impl<'a> State<'a> {
                     self.space();
                     self.print_expr_cond_paren(
                         expr,
-                        // Parenthesize if required by precedence, or in the
-                        // case of `break 'inner: loop { break 'inner 1 } + 1`
-                        expr.precedence() < ExprPrecedence::Jump
-                            || (opt_label.is_none() && classify::leading_labeled_expr(expr)),
-                        fixup.subsequent_subexpression(),
+                        // Parenthesize `break 'inner: loop { break 'inner 1 } + 1`
+                        //                     ^---------------------------------^
+                        opt_label.is_none() && classify::leading_labeled_expr(expr),
+                        fixup.rightmost_subexpression(),
                     );
                 }
             }
@@ -684,11 +701,7 @@ impl<'a> State<'a> {
                 self.word("return");
                 if let Some(expr) = result {
                     self.word(" ");
-                    self.print_expr_cond_paren(
-                        expr,
-                        expr.precedence() < ExprPrecedence::Jump,
-                        fixup.subsequent_subexpression(),
-                    );
+                    self.print_expr(expr, fixup.rightmost_subexpression());
                 }
             }
             ast::ExprKind::Yeet(result) => {
@@ -697,21 +710,13 @@ impl<'a> State<'a> {
                 self.word("yeet");
                 if let Some(expr) = result {
                     self.word(" ");
-                    self.print_expr_cond_paren(
-                        expr,
-                        expr.precedence() < ExprPrecedence::Jump,
-                        fixup.subsequent_subexpression(),
-                    );
+                    self.print_expr(expr, fixup.rightmost_subexpression());
                 }
             }
             ast::ExprKind::Become(result) => {
                 self.word("become");
                 self.word(" ");
-                self.print_expr_cond_paren(
-                    result,
-                    result.precedence() < ExprPrecedence::Jump,
-                    fixup.subsequent_subexpression(),
-                );
+                self.print_expr(result, fixup.rightmost_subexpression());
             }
             ast::ExprKind::InlineAsm(a) => {
                 // FIXME: Print `builtin # asm` once macro `asm` uses `builtin_syntax`.
@@ -761,11 +766,7 @@ impl<'a> State<'a> {
 
                 if let Some(expr) = e {
                     self.space();
-                    self.print_expr_cond_paren(
-                        expr,
-                        expr.precedence() < ExprPrecedence::Jump,
-                        fixup.subsequent_subexpression(),
-                    );
+                    self.print_expr(expr, fixup.rightmost_subexpression());
                 }
             }
             ast::ExprKind::Yield(YieldKind::Postfix(e)) => {
diff --git a/compiler/rustc_ast_pretty/src/pprust/state/fixup.rs b/compiler/rustc_ast_pretty/src/pprust/state/fixup.rs
index 3ef21f5cb29..eb5ac8b78a8 100644
--- a/compiler/rustc_ast_pretty/src/pprust/state/fixup.rs
+++ b/compiler/rustc_ast_pretty/src/pprust/state/fixup.rs
@@ -1,5 +1,6 @@
-use rustc_ast::Expr;
-use rustc_ast::util::{classify, parser};
+use rustc_ast::util::classify;
+use rustc_ast::util::parser::{self, ExprPrecedence};
+use rustc_ast::{Expr, ExprKind, YieldKind};
 
 // The default amount of fixing is minimal fixing, so all fixups are set to `false` by `Default`.
 // Fixups should be turned on in a targeted fashion where needed.
@@ -93,6 +94,24 @@ pub(crate) struct FixupContext {
     /// }
     /// ```
     parenthesize_exterior_struct_lit: bool,
+
+    /// This is the difference between:
+    ///
+    /// ```ignore (illustrative)
+    /// let _ = (return) - 1;  // without paren, this would return -1
+    ///
+    /// let _ = return + 1;  // no paren because '+' cannot begin expr
+    /// ```
+    next_operator_can_begin_expr: bool,
+
+    /// This is the difference between:
+    ///
+    /// ```ignore (illustrative)
+    /// let _ = 1 + return 1;  // no parens if rightmost subexpression
+    ///
+    /// let _ = 1 + (return 1) + 1;  // needs parens
+    /// ```
+    next_operator_can_continue_expr: bool,
 }
 
 impl FixupContext {
@@ -134,6 +153,8 @@ impl FixupContext {
             match_arm: false,
             leftmost_subexpression_in_match_arm: self.match_arm
                 || self.leftmost_subexpression_in_match_arm,
+            next_operator_can_begin_expr: false,
+            next_operator_can_continue_expr: true,
             ..self
         }
     }
@@ -148,19 +169,34 @@ impl FixupContext {
             leftmost_subexpression_in_stmt: false,
             match_arm: self.match_arm || self.leftmost_subexpression_in_match_arm,
             leftmost_subexpression_in_match_arm: false,
+            next_operator_can_begin_expr: false,
+            next_operator_can_continue_expr: true,
             ..self
         }
     }
 
-    /// Transform this fixup into the one that should apply when printing any
-    /// subexpression that is neither a leftmost subexpression nor surrounded in
-    /// delimiters.
+    /// Transform this fixup into the one that should apply when printing a
+    /// leftmost subexpression followed by punctuation that is legal as the
+    /// first token of an expression.
+    pub(crate) fn leftmost_subexpression_with_operator(
+        self,
+        next_operator_can_begin_expr: bool,
+    ) -> Self {
+        FixupContext { next_operator_can_begin_expr, ..self.leftmost_subexpression() }
+    }
+
+    /// Transform this fixup into the one that should apply when printing the
+    /// rightmost subexpression of the current expression.
+    ///
+    /// The rightmost subexpression is any subexpression that has a different
+    /// first token than the current expression, but has the same last token.
+    ///
+    /// For example in `$a + $b` and `-$b`, the subexpression `$b` is a
+    /// rightmost subexpression.
     ///
-    /// This is for any subexpression that has a different first token than the
-    /// current expression, and is not surrounded by a paren/bracket/brace. For
-    /// example the `$b` in `$a + $b` and `-$b`, but not the one in `[$b]` or
-    /// `$a.f($b)`.
-    pub(crate) fn subsequent_subexpression(self) -> Self {
+    /// Not every expression has a rightmost subexpression. For example neither
+    /// `[$b]` nor `$a.f($b)` have one.
+    pub(crate) fn rightmost_subexpression(self) -> Self {
         FixupContext {
             stmt: false,
             leftmost_subexpression_in_stmt: false,
@@ -193,6 +229,39 @@ impl FixupContext {
     ///     "let chain".
     pub(crate) fn needs_par_as_let_scrutinee(self, expr: &Expr) -> bool {
         self.parenthesize_exterior_struct_lit && parser::contains_exterior_struct_lit(expr)
-            || parser::needs_par_as_let_scrutinee(expr.precedence())
+            || parser::needs_par_as_let_scrutinee(self.precedence(expr))
+    }
+
+    /// Determines the effective precedence of a subexpression. Some expressions
+    /// have higher or lower precedence when adjacent to particular operators.
+    pub(crate) fn precedence(self, expr: &Expr) -> ExprPrecedence {
+        if self.next_operator_can_begin_expr {
+            // Decrease precedence of value-less jumps when followed by an
+            // operator that would otherwise get interpreted as beginning a
+            // value for the jump.
+            if let ExprKind::Break(..)
+            | ExprKind::Ret(..)
+            | ExprKind::Yeet(..)
+            | ExprKind::Yield(YieldKind::Prefix(..)) = expr.kind
+            {
+                return ExprPrecedence::Jump;
+            }
+        }
+
+        if !self.next_operator_can_continue_expr {
+            // Increase precedence of expressions that extend to the end of
+            // current statement or group.
+            if let ExprKind::Break(..)
+            | ExprKind::Closure(..)
+            | ExprKind::Ret(..)
+            | ExprKind::Yeet(..)
+            | ExprKind::Yield(YieldKind::Prefix(..))
+            | ExprKind::Range(None, ..) = expr.kind
+            {
+                return ExprPrecedence::Prefix;
+            }
+        }
+
+        expr.precedence()
     }
 }
diff --git a/compiler/rustc_ast_pretty/src/pprust/state/item.rs b/compiler/rustc_ast_pretty/src/pprust/state/item.rs
index 3638eb31c61..6c442553976 100644
--- a/compiler/rustc_ast_pretty/src/pprust/state/item.rs
+++ b/compiler/rustc_ast_pretty/src/pprust/state/item.rs
@@ -28,7 +28,7 @@ impl<'a> State<'a> {
         }
     }
 
-    fn print_foreign_item(&mut self, item: &ast::ForeignItem) {
+    pub(crate) fn print_foreign_item(&mut self, item: &ast::ForeignItem) {
         let ast::Item { id, span, ref attrs, ref kind, ref vis, tokens: _ } = *item;
         self.ann.pre(self, AnnNode::SubItem(id));
         self.hardbreak_if_not_bol();
@@ -548,7 +548,7 @@ impl<'a> State<'a> {
         }
     }
 
-    fn print_assoc_item(&mut self, item: &ast::AssocItem) {
+    pub(crate) fn print_assoc_item(&mut self, item: &ast::AssocItem) {
         let ast::Item { id, span, ref attrs, ref kind, ref vis, tokens: _ } = *item;
         self.ann.pre(self, AnnNode::SubItem(id));
         self.hardbreak_if_not_bol();
diff --git a/compiler/rustc_attr_data_structures/src/attributes.rs b/compiler/rustc_attr_data_structures/src/attributes.rs
index 845e4d5e5d0..d4c43456049 100644
--- a/compiler/rustc_attr_data_structures/src/attributes.rs
+++ b/compiler/rustc_attr_data_structures/src/attributes.rs
@@ -8,7 +8,7 @@ use thin_vec::ThinVec;
 
 use crate::{DefaultBodyStability, PartialConstStability, PrintAttribute, RustcVersion, Stability};
 
-#[derive(Copy, Clone, PartialEq, Encodable, Decodable, Debug, HashStable_Generic)]
+#[derive(Copy, Clone, PartialEq, Encodable, Decodable, Debug, HashStable_Generic, PrintAttribute)]
 pub enum InlineAttr {
     None,
     Hint,
@@ -130,24 +130,54 @@ impl Deprecation {
     }
 }
 
-/// Represent parsed, *built in*, inert attributes.
+/// Represents parsed *built-in* inert attributes.
 ///
-/// That means attributes that are not actually ever expanded.
-/// For more information on this, see the module docs on the [`rustc_attr_parsing`] crate.
-/// They're instead used as markers, to guide the compilation process in various way in most every stage of the compiler.
-/// These are kept around after the AST, into the HIR and further on.
+/// ## Overview
+/// These attributes are markers that guide the compilation process and are never expanded into other code.
+/// They persist throughout the compilation phases, from AST to HIR and beyond.
 ///
-/// The word "parsed" could be a little misleading here, because the parser already parses
-/// attributes early on. However, the result, an [`ast::Attribute`]
-/// is only parsed at a high level, still containing a token stream in many cases. That is
-/// because the structure of the contents varies from attribute to attribute.
-/// With a parsed attribute I mean that each attribute is processed individually into a
-/// final structure, which on-site (the place where the attribute is useful for, think the
-/// the place where `must_use` is checked) little to no extra parsing or validating needs to
-/// happen.
+/// ## Attribute Processing
+/// While attributes are initially parsed by [`rustc_parse`] into [`ast::Attribute`], they still contain raw token streams
+/// because different attributes have different internal structures. This enum represents the final,
+/// fully parsed form of these attributes, where each variant contains contains all the information and
+/// structure relevant for the specific attribute.
 ///
-/// For more docs, look in [`rustc_attr_parsing`].
+/// Some attributes can be applied multiple times to the same item, and they are "collapsed" into a single
+/// semantic attribute. For example:
+/// ```rust
+/// #[repr(C)]
+/// #[repr(packed)]
+/// struct S { }
+/// ```
+/// This is equivalent to `#[repr(C, packed)]` and results in a single [`AttributeKind::Repr`] containing
+/// both `C` and `packed` annotations. This collapsing happens during parsing and is reflected in the
+/// data structures defined in this enum.
 ///
+/// ## Usage
+/// These parsed attributes are used throughout the compiler to:
+/// - Control code generation (e.g., `#[repr]`)
+/// - Mark API stability (`#[stable]`, `#[unstable]`)
+/// - Provide documentation (`#[doc]`)
+/// - Guide compiler behavior (e.g., `#[allow_internal_unstable]`)
+///
+/// ## Note on Attribute Organization
+/// Some attributes like `InlineAttr`, `OptimizeAttr`, and `InstructionSetAttr` are defined separately
+/// from this enum because they are used in specific compiler phases (like code generation) and don't
+/// need to persist throughout the entire compilation process. They are typically processed and
+/// converted into their final form earlier in the compilation pipeline.
+///
+/// For example:
+/// - `InlineAttr` is used during code generation to control function inlining
+/// - `OptimizeAttr` is used to control optimization levels
+/// - `InstructionSetAttr` is used for target-specific code generation
+///
+/// These attributes are handled by their respective compiler passes in the [`rustc_codegen_ssa`] crate
+/// and don't need to be preserved in the same way as the attributes in this enum.
+///
+/// For more details on attribute parsing, see the [`rustc_attr_parsing`] crate.
+///
+/// [`rustc_parse`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_parse/index.html
+/// [`rustc_codegen_ssa`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_codegen_ssa/index.html
 /// [`rustc_attr_parsing`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_attr_parsing/index.html
 #[derive(Clone, Debug, HashStable_Generic, Encodable, Decodable, PrintAttribute)]
 pub enum AttributeKind {
@@ -158,6 +188,9 @@ pub enum AttributeKind {
     /// Represents `#[allow_internal_unstable]`.
     AllowInternalUnstable(ThinVec<(Symbol, Span)>),
 
+    /// Represents `#[rustc_as_ptr]` (used by the `dangling_pointers_from_temporaries` lint).
+    AsPtr(Span),
+
     /// Represents `#[rustc_default_body_unstable]`.
     BodyStability {
         stability: DefaultBodyStability,
@@ -188,6 +221,9 @@ pub enum AttributeKind {
     /// Represents [`#[doc]`](https://doc.rust-lang.org/stable/rustdoc/write-documentation/the-doc-attribute.html).
     DocComment { style: AttrStyle, kind: CommentKind, span: Span, comment: Symbol },
 
+    /// Represents `#[inline]` and `#[rustc_force_inline]`.
+    Inline(InlineAttr, Span),
+
     /// Represents `#[rustc_macro_transparency]`.
     MacroTransparency(Transparency),
 
diff --git a/compiler/rustc_attr_data_structures/src/lib.rs b/compiler/rustc_attr_data_structures/src/lib.rs
index dbfc95b047a..f8355be09ad 100644
--- a/compiler/rustc_attr_data_structures/src/lib.rs
+++ b/compiler/rustc_attr_data_structures/src/lib.rs
@@ -1,3 +1,7 @@
+//! Data structures for representing parsed attributes in the Rust compiler.
+//! For detailed documentation about attribute processing,
+//! see [rustc_attr_parsing](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_attr_parsing/index.html).
+
 // tidy-alphabetical-start
 #![allow(internal_features)]
 #![doc(rust_logo)]
@@ -8,6 +12,8 @@ mod attributes;
 mod stability;
 mod version;
 
+pub mod lints;
+
 use std::num::NonZero;
 
 pub use attributes::*;
diff --git a/compiler/rustc_attr_data_structures/src/lints.rs b/compiler/rustc_attr_data_structures/src/lints.rs
new file mode 100644
index 00000000000..e34c54c6d32
--- /dev/null
+++ b/compiler/rustc_attr_data_structures/src/lints.rs
@@ -0,0 +1,15 @@
+use rustc_macros::HashStable_Generic;
+use rustc_span::Span;
+
+#[derive(Clone, Debug, HashStable_Generic)]
+pub struct AttributeLint<Id> {
+    pub id: Id,
+    pub span: Span,
+    pub kind: AttributeLintKind,
+}
+
+#[derive(Clone, Debug, HashStable_Generic)]
+pub enum AttributeLintKind {
+    UnusedDuplicate { this: Span, other: Span, warning: bool },
+    IllFormedAttributeInput { suggestions: Vec<String> },
+}
diff --git a/compiler/rustc_attr_data_structures/src/stability.rs b/compiler/rustc_attr_data_structures/src/stability.rs
index c0ca08a60f8..218e771c745 100644
--- a/compiler/rustc_attr_data_structures/src/stability.rs
+++ b/compiler/rustc_attr_data_structures/src/stability.rs
@@ -132,6 +132,7 @@ pub enum StabilityLevel {
         /// fn foobar() {}
         /// ```
         implied_by: Option<Symbol>,
+        old_name: Option<Symbol>,
     },
     /// `#[stable]`
     Stable {
diff --git a/compiler/rustc_attr_parsing/messages.ftl b/compiler/rustc_attr_parsing/messages.ftl
index 45174c9582d..b9b386635f6 100644
--- a/compiler/rustc_attr_parsing/messages.ftl
+++ b/compiler/rustc_attr_parsing/messages.ftl
@@ -23,8 +23,10 @@ attr_parsing_expects_feature_list =
 attr_parsing_expects_features =
     `{$name}` expects feature names
 
-attr_parsing_incorrect_meta_item = expected a quoted string literal
-attr_parsing_incorrect_meta_item_suggestion = consider surrounding this with quotes
+attr_parsing_ill_formed_attribute_input = {$num_suggestions ->
+        [1] attribute must be of the form {$suggestions}
+        *[other] valid forms for the attribute are {$suggestions}
+    }
 
 attr_parsing_incorrect_repr_format_align_one_arg =
     incorrect `repr(align)` attribute format: `align` takes exactly one argument in parentheses
@@ -81,9 +83,6 @@ attr_parsing_missing_note =
 attr_parsing_missing_since =
     missing 'since'
 
-attr_parsing_multiple_item =
-    multiple '{$item}' items
-
 attr_parsing_multiple_stability_levels =
     multiple stability levels
 
@@ -122,16 +121,21 @@ attr_parsing_unsupported_literal_cfg_boolean =
     literal in `cfg` predicate value must be a boolean
 attr_parsing_unsupported_literal_cfg_string =
     literal in `cfg` predicate value must be a string
-attr_parsing_unsupported_literal_deprecated_kv_pair =
-    item in `deprecated` must be a key/value pair
-attr_parsing_unsupported_literal_deprecated_string =
-    literal in `deprecated` value must be a string
 attr_parsing_unsupported_literal_generic =
     unsupported literal
 attr_parsing_unsupported_literal_suggestion =
     consider removing the prefix
 
+attr_parsing_unused_duplicate =
+    unused attribute
+    .suggestion = remove this attribute
+    .note = attribute also specified here
+    .warn = {-passes_previously_accepted}
+
 attr_parsing_unused_multiple =
     multiple `{$name}` attributes
     .suggestion = remove this attribute
     .note = attribute also specified here
+
+-attr_parsing_perviously_accepted =
+    this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release!
diff --git a/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs b/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs
index d0465546b73..21b01a8d071 100644
--- a/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/allow_unstable.rs
@@ -1,44 +1,49 @@
 use std::iter;
 
 use rustc_attr_data_structures::AttributeKind;
+use rustc_feature::{AttributeTemplate, template};
 use rustc_span::{Span, Symbol, sym};
 
 use super::{CombineAttributeParser, ConvertFn};
-use crate::context::AcceptContext;
+use crate::context::{AcceptContext, Stage};
 use crate::parser::ArgParser;
 use crate::session_diagnostics;
 
 pub(crate) struct AllowInternalUnstableParser;
-impl CombineAttributeParser for AllowInternalUnstableParser {
-    const PATH: &'static [Symbol] = &[sym::allow_internal_unstable];
+impl<S: Stage> CombineAttributeParser<S> for AllowInternalUnstableParser {
+    const PATH: &[Symbol] = &[sym::allow_internal_unstable];
     type Item = (Symbol, Span);
     const CONVERT: ConvertFn<Self::Item> = AttributeKind::AllowInternalUnstable;
+    const TEMPLATE: AttributeTemplate = template!(Word, List: "feat1, feat2, ...");
 
-    fn extend<'a>(
-        cx: &'a AcceptContext<'a>,
-        args: &'a ArgParser<'a>,
-    ) -> impl IntoIterator<Item = Self::Item> + 'a {
-        parse_unstable(cx, args, Self::PATH[0]).into_iter().zip(iter::repeat(cx.attr_span))
+    fn extend<'c>(
+        cx: &'c mut AcceptContext<'_, '_, S>,
+        args: &'c ArgParser<'_>,
+    ) -> impl IntoIterator<Item = Self::Item> {
+        parse_unstable(cx, args, <Self as CombineAttributeParser<S>>::PATH[0])
+            .into_iter()
+            .zip(iter::repeat(cx.attr_span))
     }
 }
 
 pub(crate) struct AllowConstFnUnstableParser;
-impl CombineAttributeParser for AllowConstFnUnstableParser {
-    const PATH: &'static [Symbol] = &[sym::rustc_allow_const_fn_unstable];
+impl<S: Stage> CombineAttributeParser<S> for AllowConstFnUnstableParser {
+    const PATH: &[Symbol] = &[sym::rustc_allow_const_fn_unstable];
     type Item = Symbol;
     const CONVERT: ConvertFn<Self::Item> = AttributeKind::AllowConstFnUnstable;
+    const TEMPLATE: AttributeTemplate = template!(Word, List: "feat1, feat2, ...");
 
-    fn extend<'a>(
-        cx: &'a AcceptContext<'a>,
-        args: &'a ArgParser<'a>,
-    ) -> impl IntoIterator<Item = Self::Item> + 'a {
-        parse_unstable(cx, args, Self::PATH[0])
+    fn extend<'c>(
+        cx: &'c mut AcceptContext<'_, '_, S>,
+        args: &'c ArgParser<'_>,
+    ) -> impl IntoIterator<Item = Self::Item> + 'c {
+        parse_unstable(cx, args, <Self as CombineAttributeParser<S>>::PATH[0])
     }
 }
 
-fn parse_unstable<'a>(
-    cx: &AcceptContext<'_>,
-    args: &'a ArgParser<'a>,
+fn parse_unstable<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
+    args: &ArgParser<'_>,
     symbol: Symbol,
 ) -> impl IntoIterator<Item = Symbol> {
     let mut res = Vec::new();
diff --git a/compiler/rustc_attr_parsing/src/attributes/confusables.rs b/compiler/rustc_attr_parsing/src/attributes/confusables.rs
index 6cff952fcf2..c911908dfb3 100644
--- a/compiler/rustc_attr_parsing/src/attributes/confusables.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/confusables.rs
@@ -1,9 +1,10 @@
 use rustc_attr_data_structures::AttributeKind;
+use rustc_feature::template;
 use rustc_span::{Span, Symbol, sym};
 use thin_vec::ThinVec;
 
 use super::{AcceptMapping, AttributeParser};
-use crate::context::FinalizeContext;
+use crate::context::{FinalizeContext, Stage};
 use crate::session_diagnostics;
 
 #[derive(Default)]
@@ -12,40 +13,36 @@ pub(crate) struct ConfusablesParser {
     first_span: Option<Span>,
 }
 
-impl AttributeParser for ConfusablesParser {
-    const ATTRIBUTES: AcceptMapping<Self> = &[(&[sym::rustc_confusables], |this, cx, args| {
-        let Some(list) = args.list() else {
-            // FIXME(jdonszelmann): error when not a list? Bring validation code here.
-            //       NOTE: currently subsequent attributes are silently ignored using
-            //       tcx.get_attr().
-            return;
-        };
-
-        if list.is_empty() {
-            cx.emit_err(session_diagnostics::EmptyConfusables { span: cx.attr_span });
-        }
-
-        for param in list.mixed() {
-            let span = param.span();
-
-            let Some(lit) = param.lit() else {
-                cx.emit_err(session_diagnostics::IncorrectMetaItem {
-                    span,
-                    suggestion: Some(session_diagnostics::IncorrectMetaItemSuggestion {
-                        lo: span.shrink_to_lo(),
-                        hi: span.shrink_to_hi(),
-                    }),
-                });
-                continue;
+impl<S: Stage> AttributeParser<S> for ConfusablesParser {
+    const ATTRIBUTES: AcceptMapping<Self, S> = &[(
+        &[sym::rustc_confusables],
+        template!(List: r#""name1", "name2", ..."#),
+        |this, cx, args| {
+            let Some(list) = args.list() else {
+                cx.expected_list(cx.attr_span);
+                return;
             };
 
-            this.confusables.push(lit.symbol);
-        }
+            if list.is_empty() {
+                cx.emit_err(session_diagnostics::EmptyConfusables { span: cx.attr_span });
+            }
+
+            for param in list.mixed() {
+                let span = param.span();
+
+                let Some(lit) = param.lit().and_then(|i| i.value_str()) else {
+                    cx.expected_string_literal(span, param.lit());
+                    continue;
+                };
+
+                this.confusables.push(lit);
+            }
 
-        this.first_span.get_or_insert(cx.attr_span);
-    })];
+            this.first_span.get_or_insert(cx.attr_span);
+        },
+    )];
 
-    fn finalize(self, _cx: &FinalizeContext<'_>) -> Option<AttributeKind> {
+    fn finalize(self, _cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind> {
         if self.confusables.is_empty() {
             return None;
         }
diff --git a/compiler/rustc_attr_parsing/src/attributes/deprecation.rs b/compiler/rustc_attr_parsing/src/attributes/deprecation.rs
index 006c1fe3b9c..702ad66f578 100644
--- a/compiler/rustc_attr_parsing/src/attributes/deprecation.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/deprecation.rs
@@ -1,59 +1,50 @@
 use rustc_attr_data_structures::{AttributeKind, DeprecatedSince, Deprecation};
+use rustc_feature::{AttributeTemplate, template};
 use rustc_span::{Span, Symbol, sym};
 
-use super::SingleAttributeParser;
 use super::util::parse_version;
-use crate::context::AcceptContext;
+use super::{AttributeOrder, OnDuplicate, SingleAttributeParser};
+use crate::context::{AcceptContext, Stage};
 use crate::parser::ArgParser;
 use crate::session_diagnostics;
-use crate::session_diagnostics::UnsupportedLiteralReason;
 
 pub(crate) struct DeprecationParser;
 
-fn get(
-    cx: &AcceptContext<'_>,
+fn get<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
     name: Symbol,
     param_span: Span,
     arg: &ArgParser<'_>,
     item: &Option<Symbol>,
 ) -> Option<Symbol> {
     if item.is_some() {
-        cx.emit_err(session_diagnostics::MultipleItem { span: param_span, item: name.to_string() });
+        cx.duplicate_key(param_span, name);
         return None;
     }
     if let Some(v) = arg.name_value() {
         if let Some(value_str) = v.value_as_str() {
             Some(value_str)
         } else {
-            let lit = v.value_as_lit();
-            cx.emit_err(session_diagnostics::UnsupportedLiteral {
-                span: v.value_span,
-                reason: UnsupportedLiteralReason::DeprecatedString,
-                is_bytestr: lit.kind.is_bytestr(),
-                start_point_span: cx.sess().source_map().start_point(lit.span),
-            });
+            cx.expected_string_literal(v.value_span, Some(&v.value_as_lit()));
             None
         }
     } else {
-        // FIXME(jdonszelmann): suggestion?
-        cx.emit_err(session_diagnostics::IncorrectMetaItem { span: param_span, suggestion: None });
+        cx.expected_name_value(param_span, Some(name));
         None
     }
 }
 
-impl SingleAttributeParser for DeprecationParser {
-    const PATH: &'static [Symbol] = &[sym::deprecated];
+impl<S: Stage> SingleAttributeParser<S> for DeprecationParser {
+    const PATH: &[Symbol] = &[sym::deprecated];
+    const ATTRIBUTE_ORDER: AttributeOrder = AttributeOrder::KeepFirst;
+    const ON_DUPLICATE: OnDuplicate<S> = OnDuplicate::Error;
+    const TEMPLATE: AttributeTemplate = template!(
+        Word,
+        List: r#"/*opt*/ since = "version", /*opt*/ note = "reason""#,
+        NameValueStr: "reason"
+    );
 
-    fn on_duplicate(cx: &AcceptContext<'_>, first_span: Span) {
-        // FIXME(jdonszelmann): merge with errors from check_attrs.rs
-        cx.emit_err(session_diagnostics::UnusedMultiple {
-            this: cx.attr_span,
-            other: first_span,
-            name: sym::deprecated,
-        });
-    }
-
-    fn convert(cx: &AcceptContext<'_>, args: &ArgParser<'_>) -> Option<AttributeKind> {
+    fn convert(cx: &mut AcceptContext<'_, '_, S>, args: &ArgParser<'_>) -> Option<AttributeKind> {
         let features = cx.features();
 
         let mut since = None;
@@ -62,57 +53,60 @@ impl SingleAttributeParser for DeprecationParser {
 
         let is_rustc = features.staged_api();
 
-        if let Some(value) = args.name_value()
-            && let Some(value_str) = value.value_as_str()
-        {
-            note = Some(value_str)
-        } else if let Some(list) = args.list() {
-            for param in list.mixed() {
-                let param_span = param.span();
-                let Some(param) = param.meta_item() else {
-                    cx.emit_err(session_diagnostics::UnsupportedLiteral {
-                        span: param_span,
-                        reason: UnsupportedLiteralReason::DeprecatedKvPair,
-                        is_bytestr: false,
-                        start_point_span: cx.sess().source_map().start_point(param_span),
-                    });
-                    return None;
-                };
+        match args {
+            ArgParser::NoArgs => {
+                // ok
+            }
+            ArgParser::List(list) => {
+                for param in list.mixed() {
+                    let Some(param) = param.meta_item() else {
+                        cx.unexpected_literal(param.span());
+                        return None;
+                    };
 
-                let ident_name = param.path().word_sym();
+                    let ident_name = param.path().word_sym();
 
-                match ident_name {
-                    Some(name @ sym::since) => {
-                        since = Some(get(cx, name, param_span, param.args(), &since)?);
-                    }
-                    Some(name @ sym::note) => {
-                        note = Some(get(cx, name, param_span, param.args(), &note)?);
-                    }
-                    Some(name @ sym::suggestion) => {
-                        if !features.deprecated_suggestion() {
-                            cx.emit_err(session_diagnostics::DeprecatedItemSuggestion {
-                                span: param_span,
-                                is_nightly: cx.sess().is_nightly_build(),
-                                details: (),
-                            });
+                    match ident_name {
+                        Some(name @ sym::since) => {
+                            since = Some(get(cx, name, param.span(), param.args(), &since)?);
                         }
+                        Some(name @ sym::note) => {
+                            note = Some(get(cx, name, param.span(), param.args(), &note)?);
+                        }
+                        Some(name @ sym::suggestion) => {
+                            if !features.deprecated_suggestion() {
+                                cx.emit_err(session_diagnostics::DeprecatedItemSuggestion {
+                                    span: param.span(),
+                                    is_nightly: cx.sess().is_nightly_build(),
+                                    details: (),
+                                });
+                            }
 
-                        suggestion = Some(get(cx, name, param_span, param.args(), &suggestion)?);
-                    }
-                    _ => {
-                        cx.emit_err(session_diagnostics::UnknownMetaItem {
-                            span: param_span,
-                            item: param.path().to_string(),
-                            expected: if features.deprecated_suggestion() {
-                                &["since", "note", "suggestion"]
-                            } else {
-                                &["since", "note"]
-                            },
-                        });
-                        return None;
+                            suggestion =
+                                Some(get(cx, name, param.span(), param.args(), &suggestion)?);
+                        }
+                        _ => {
+                            cx.unknown_key(
+                                param.span(),
+                                param.path().to_string(),
+                                if features.deprecated_suggestion() {
+                                    &["since", "note", "suggestion"]
+                                } else {
+                                    &["since", "note"]
+                                },
+                            );
+                            return None;
+                        }
                     }
                 }
             }
+            ArgParser::NameValue(v) => {
+                let Some(value) = v.value_as_str() else {
+                    cx.expected_string_literal(v.value_span, Some(v.value_as_lit()));
+                    return None;
+                };
+                note = Some(value);
+            }
         }
 
         let since = if let Some(since) = since {
diff --git a/compiler/rustc_attr_parsing/src/attributes/inline.rs b/compiler/rustc_attr_parsing/src/attributes/inline.rs
new file mode 100644
index 00000000000..25efc3ae49b
--- /dev/null
+++ b/compiler/rustc_attr_parsing/src/attributes/inline.rs
@@ -0,0 +1,97 @@
+// FIXME(jdonszelmann): merge these two parsers and error when both attributes are present here.
+//                      note: need to model better how duplicate attr errors work when not using
+//                      SingleAttributeParser which is what we have two of here.
+
+use rustc_attr_data_structures::lints::AttributeLintKind;
+use rustc_attr_data_structures::{AttributeKind, InlineAttr};
+use rustc_feature::{AttributeTemplate, template};
+use rustc_span::{Symbol, sym};
+
+use super::{AcceptContext, AttributeOrder, OnDuplicate};
+use crate::attributes::SingleAttributeParser;
+use crate::context::Stage;
+use crate::parser::ArgParser;
+
+pub(crate) struct InlineParser;
+
+impl<S: Stage> SingleAttributeParser<S> for InlineParser {
+    const PATH: &'static [Symbol] = &[sym::inline];
+    const ATTRIBUTE_ORDER: AttributeOrder = AttributeOrder::KeepLast;
+    const ON_DUPLICATE: OnDuplicate<S> = OnDuplicate::WarnButFutureError;
+    const TEMPLATE: AttributeTemplate = template!(Word, List: "always|never");
+
+    fn convert(cx: &mut AcceptContext<'_, '_, S>, args: &ArgParser<'_>) -> Option<AttributeKind> {
+        match args {
+            ArgParser::NoArgs => Some(AttributeKind::Inline(InlineAttr::Hint, cx.attr_span)),
+            ArgParser::List(list) => {
+                let Some(l) = list.single() else {
+                    cx.expected_single_argument(list.span);
+                    return None;
+                };
+
+                match l.meta_item().and_then(|i| i.path().word_sym()) {
+                    Some(sym::always) => {
+                        Some(AttributeKind::Inline(InlineAttr::Always, cx.attr_span))
+                    }
+                    Some(sym::never) => {
+                        Some(AttributeKind::Inline(InlineAttr::Never, cx.attr_span))
+                    }
+                    _ => {
+                        cx.expected_specific_argument(l.span(), vec!["always", "never"]);
+                        return None;
+                    }
+                }
+            }
+            ArgParser::NameValue(_) => {
+                let suggestions =
+                    <Self as SingleAttributeParser<S>>::TEMPLATE.suggestions(false, "inline");
+                cx.emit_lint(
+                    AttributeLintKind::IllFormedAttributeInput { suggestions },
+                    cx.attr_span,
+                );
+                return None;
+            }
+        }
+    }
+}
+
+pub(crate) struct RustcForceInlineParser;
+
+impl<S: Stage> SingleAttributeParser<S> for RustcForceInlineParser {
+    const PATH: &'static [Symbol] = &[sym::rustc_force_inline];
+    const ATTRIBUTE_ORDER: AttributeOrder = AttributeOrder::KeepLast;
+    const ON_DUPLICATE: OnDuplicate<S> = OnDuplicate::WarnButFutureError;
+    const TEMPLATE: AttributeTemplate = template!(Word, List: "reason", NameValueStr: "reason");
+
+    fn convert(cx: &mut AcceptContext<'_, '_, S>, args: &ArgParser<'_>) -> Option<AttributeKind> {
+        let reason = match args {
+            ArgParser::NoArgs => None,
+            ArgParser::List(list) => {
+                let Some(l) = list.single() else {
+                    cx.expected_single_argument(list.span);
+                    return None;
+                };
+
+                let Some(reason) = l.lit().and_then(|i| i.kind.str()) else {
+                    cx.expected_string_literal(l.span(), l.lit());
+                    return None;
+                };
+
+                Some(reason)
+            }
+            ArgParser::NameValue(v) => {
+                let Some(reason) = v.value_as_str() else {
+                    cx.expected_string_literal(v.value_span, Some(v.value_as_lit()));
+                    return None;
+                };
+
+                Some(reason)
+            }
+        };
+
+        Some(AttributeKind::Inline(
+            InlineAttr::Force { attr_span: cx.attr_span, reason },
+            cx.attr_span,
+        ))
+    }
+}
diff --git a/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs b/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs
new file mode 100644
index 00000000000..d4c846de56e
--- /dev/null
+++ b/compiler/rustc_attr_parsing/src/attributes/lint_helpers.rs
@@ -0,0 +1,21 @@
+use rustc_attr_data_structures::AttributeKind;
+use rustc_feature::{AttributeTemplate, template};
+use rustc_span::{Symbol, sym};
+
+use crate::attributes::{AttributeOrder, OnDuplicate, SingleAttributeParser};
+use crate::context::{AcceptContext, Stage};
+use crate::parser::ArgParser;
+
+pub(crate) struct AsPtrParser;
+
+impl<S: Stage> SingleAttributeParser<S> for AsPtrParser {
+    const PATH: &[Symbol] = &[sym::rustc_as_ptr];
+    const ATTRIBUTE_ORDER: AttributeOrder = AttributeOrder::KeepFirst;
+    const ON_DUPLICATE: OnDuplicate<S> = OnDuplicate::Error;
+    const TEMPLATE: AttributeTemplate = template!(Word);
+
+    fn convert(cx: &mut AcceptContext<'_, '_, S>, _args: &ArgParser<'_>) -> Option<AttributeKind> {
+        // FIXME: check that there's no args (this is currently checked elsewhere)
+        Some(AttributeKind::AsPtr(cx.attr_span))
+    }
+}
diff --git a/compiler/rustc_attr_parsing/src/attributes/mod.rs b/compiler/rustc_attr_parsing/src/attributes/mod.rs
index 7cceca3c24d..fa2a6087506 100644
--- a/compiler/rustc_attr_parsing/src/attributes/mod.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/mod.rs
@@ -12,28 +12,33 @@
 //! - [`CombineAttributeParser`]: makes it easy to implement an attribute which should combine the
 //! contents of attributes, if an attribute appear multiple times in a list
 //!
-//! Attributes should be added to [`ATTRIBUTE_PARSERS`](crate::context::ATTRIBUTE_PARSERS) to be parsed.
+//! Attributes should be added to `crate::context::ATTRIBUTE_PARSERS` to be parsed.
 
 use std::marker::PhantomData;
 
 use rustc_attr_data_structures::AttributeKind;
+use rustc_attr_data_structures::lints::AttributeLintKind;
+use rustc_feature::AttributeTemplate;
 use rustc_span::{Span, Symbol};
 use thin_vec::ThinVec;
 
-use crate::context::{AcceptContext, FinalizeContext};
+use crate::context::{AcceptContext, FinalizeContext, Stage};
 use crate::parser::ArgParser;
+use crate::session_diagnostics::UnusedMultiple;
 
 pub(crate) mod allow_unstable;
 pub(crate) mod cfg;
 pub(crate) mod confusables;
 pub(crate) mod deprecation;
+pub(crate) mod inline;
+pub(crate) mod lint_helpers;
 pub(crate) mod repr;
 pub(crate) mod stability;
 pub(crate) mod transparency;
 pub(crate) mod util;
 
-type AcceptFn<T> = fn(&mut T, &AcceptContext<'_>, &ArgParser<'_>);
-type AcceptMapping<T> = &'static [(&'static [Symbol], AcceptFn<T>)];
+type AcceptFn<T, S> = for<'sess> fn(&mut T, &mut AcceptContext<'_, 'sess, S>, &ArgParser<'_>);
+type AcceptMapping<T, S> = &'static [(&'static [Symbol], AttributeTemplate, AcceptFn<T, S>)];
 
 /// An [`AttributeParser`] is a type which searches for syntactic attributes.
 ///
@@ -54,11 +59,11 @@ type AcceptMapping<T> = &'static [(&'static [Symbol], AcceptFn<T>)];
 ///
 /// For a simpler attribute parsing interface, consider using [`SingleAttributeParser`]
 /// or [`CombineAttributeParser`] instead.
-pub(crate) trait AttributeParser: Default + 'static {
+pub(crate) trait AttributeParser<S: Stage>: Default + 'static {
     /// The symbols for the attributes that this parser is interested in.
     ///
     /// If an attribute has this symbol, the `accept` function will be called on it.
-    const ATTRIBUTES: AcceptMapping<Self>;
+    const ATTRIBUTES: AcceptMapping<Self, S>;
 
     /// The parser has gotten a chance to accept the attributes on an item,
     /// here it can produce an attribute.
@@ -68,7 +73,7 @@ pub(crate) trait AttributeParser: Default + 'static {
     /// that'd be equivalent to unconditionally applying an attribute to
     /// every single syntax item that could have attributes applied to it.
     /// Your accept mappings should determine whether this returns something.
-    fn finalize(self, cx: &FinalizeContext<'_>) -> Option<AttributeKind>;
+    fn finalize(self, cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind>;
 }
 
 /// Alternative to [`AttributeParser`] that automatically handles state management.
@@ -80,44 +85,137 @@ pub(crate) trait AttributeParser: Default + 'static {
 ///
 /// [`SingleAttributeParser`] can only convert attributes one-to-one, and cannot combine multiple
 /// attributes together like is necessary for `#[stable()]` and `#[unstable()]` for example.
-pub(crate) trait SingleAttributeParser: 'static {
-    const PATH: &'static [Symbol];
+pub(crate) trait SingleAttributeParser<S: Stage>: 'static {
+    const PATH: &[Symbol];
+    const ATTRIBUTE_ORDER: AttributeOrder;
+    const ON_DUPLICATE: OnDuplicate<S>;
 
-    /// Called when a duplicate attribute is found.
-    ///
-    /// `first_span` is the span of the first occurrence of this attribute.
-    // FIXME(jdonszelmann): default error
-    fn on_duplicate(cx: &AcceptContext<'_>, first_span: Span);
+    /// The template this attribute parser should implement. Used for diagnostics.
+    const TEMPLATE: AttributeTemplate;
 
     /// Converts a single syntactical attribute to a single semantic attribute, or [`AttributeKind`]
-    fn convert(cx: &AcceptContext<'_>, args: &ArgParser<'_>) -> Option<AttributeKind>;
+    fn convert(cx: &mut AcceptContext<'_, '_, S>, args: &ArgParser<'_>) -> Option<AttributeKind>;
 }
 
-pub(crate) struct Single<T: SingleAttributeParser>(PhantomData<T>, Option<(AttributeKind, Span)>);
+pub(crate) struct Single<T: SingleAttributeParser<S>, S: Stage>(
+    PhantomData<(S, T)>,
+    Option<(AttributeKind, Span)>,
+);
 
-impl<T: SingleAttributeParser> Default for Single<T> {
+impl<T: SingleAttributeParser<S>, S: Stage> Default for Single<T, S> {
     fn default() -> Self {
         Self(Default::default(), Default::default())
     }
 }
 
-impl<T: SingleAttributeParser> AttributeParser for Single<T> {
-    const ATTRIBUTES: AcceptMapping<Self> = &[(T::PATH, |group: &mut Single<T>, cx, args| {
-        if let Some((_, s)) = group.1 {
-            T::on_duplicate(cx, s);
-            return;
-        }
+impl<T: SingleAttributeParser<S>, S: Stage> AttributeParser<S> for Single<T, S> {
+    const ATTRIBUTES: AcceptMapping<Self, S> = &[(
+        T::PATH,
+        <T as SingleAttributeParser<S>>::TEMPLATE,
+        |group: &mut Single<T, S>, cx, args| {
+            if let Some(pa) = T::convert(cx, args) {
+                match T::ATTRIBUTE_ORDER {
+                    // keep the first and report immediately. ignore this attribute
+                    AttributeOrder::KeepFirst => {
+                        if let Some((_, unused)) = group.1 {
+                            T::ON_DUPLICATE.exec::<T>(cx, cx.attr_span, unused);
+                            return;
+                        }
+                    }
+                    // keep the new one and warn about the previous,
+                    // then replace
+                    AttributeOrder::KeepLast => {
+                        if let Some((_, used)) = group.1 {
+                            T::ON_DUPLICATE.exec::<T>(cx, used, cx.attr_span);
+                        }
+                    }
+                }
 
-        if let Some(pa) = T::convert(cx, args) {
-            group.1 = Some((pa, cx.attr_span));
-        }
-    })];
+                group.1 = Some((pa, cx.attr_span));
+            }
+        },
+    )];
 
-    fn finalize(self, _cx: &FinalizeContext<'_>) -> Option<AttributeKind> {
+    fn finalize(self, _cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind> {
         Some(self.1?.0)
     }
 }
 
+// FIXME(jdonszelmann): logic is implemented but the attribute parsers needing
+// them will be merged in another PR
+#[allow(unused)]
+pub(crate) enum OnDuplicate<S: Stage> {
+    /// Give a default warning
+    Warn,
+
+    /// Duplicates will be a warning, with a note that this will be an error in the future.
+    WarnButFutureError,
+
+    /// Give a default error
+    Error,
+
+    /// Ignore duplicates
+    Ignore,
+
+    /// Custom function called when a duplicate attribute is found.
+    ///
+    /// - `unused` is the span of the attribute that was unused or bad because of some
+    ///   duplicate reason (see [`AttributeOrder`])
+    /// - `used` is the span of the attribute that was used in favor of the unused attribute
+    Custom(fn(cx: &AcceptContext<'_, '_, S>, used: Span, unused: Span)),
+}
+
+impl<S: Stage> OnDuplicate<S> {
+    fn exec<P: SingleAttributeParser<S>>(
+        &self,
+        cx: &mut AcceptContext<'_, '_, S>,
+        used: Span,
+        unused: Span,
+    ) {
+        match self {
+            OnDuplicate::Warn => cx.emit_lint(
+                AttributeLintKind::UnusedDuplicate { this: unused, other: used, warning: false },
+                unused,
+            ),
+            OnDuplicate::WarnButFutureError => cx.emit_lint(
+                AttributeLintKind::UnusedDuplicate { this: unused, other: used, warning: true },
+                unused,
+            ),
+            OnDuplicate::Error => {
+                cx.emit_err(UnusedMultiple {
+                    this: used,
+                    other: unused,
+                    name: Symbol::intern(
+                        &P::PATH.into_iter().map(|i| i.to_string()).collect::<Vec<_>>().join(".."),
+                    ),
+                });
+            }
+            OnDuplicate::Ignore => {}
+            OnDuplicate::Custom(f) => f(cx, used, unused),
+        }
+    }
+}
+//
+// FIXME(jdonszelmann): logic is implemented but the attribute parsers needing
+// them will be merged in another PR
+#[allow(unused)]
+pub(crate) enum AttributeOrder {
+    /// Duplicates after the first attribute will be an error.
+    ///
+    /// This should be used where duplicates would be ignored, but carry extra
+    /// meaning that could cause confusion. For example, `#[stable(since="1.0")]
+    /// #[stable(since="2.0")]`, which version should be used for `stable`?
+    KeepFirst,
+
+    /// Duplicates preceding the last instance of the attribute will be a
+    /// warning, with a note that this will be an error in the future.
+    ///
+    /// This is the same as `FutureWarnFollowing`, except the last attribute is
+    /// the one that is "used". Ideally these can eventually migrate to
+    /// `ErrorPreceding`.
+    KeepLast,
+}
+
 type ConvertFn<E> = fn(ThinVec<E>) -> AttributeKind;
 
 /// Alternative to [`AttributeParser`] that automatically handles state management.
@@ -127,35 +225,41 @@ type ConvertFn<E> = fn(ThinVec<E>) -> AttributeKind;
 ///
 /// [`CombineAttributeParser`] can only convert a single kind of attribute, and cannot combine multiple
 /// attributes together like is necessary for `#[stable()]` and `#[unstable()]` for example.
-pub(crate) trait CombineAttributeParser: 'static {
-    const PATH: &'static [Symbol];
+pub(crate) trait CombineAttributeParser<S: Stage>: 'static {
+    const PATH: &[rustc_span::Symbol];
 
     type Item;
     const CONVERT: ConvertFn<Self::Item>;
 
+    /// The template this attribute parser should implement. Used for diagnostics.
+    const TEMPLATE: AttributeTemplate;
+
     /// Converts a single syntactical attribute to a number of elements of the semantic attribute, or [`AttributeKind`]
-    fn extend<'a>(
-        cx: &'a AcceptContext<'a>,
-        args: &'a ArgParser<'a>,
-    ) -> impl IntoIterator<Item = Self::Item> + 'a;
+    fn extend<'c>(
+        cx: &'c mut AcceptContext<'_, '_, S>,
+        args: &'c ArgParser<'_>,
+    ) -> impl IntoIterator<Item = Self::Item> + 'c;
 }
 
-pub(crate) struct Combine<T: CombineAttributeParser>(
-    PhantomData<T>,
-    ThinVec<<T as CombineAttributeParser>::Item>,
+pub(crate) struct Combine<T: CombineAttributeParser<S>, S: Stage>(
+    PhantomData<(S, T)>,
+    ThinVec<<T as CombineAttributeParser<S>>::Item>,
 );
 
-impl<T: CombineAttributeParser> Default for Combine<T> {
+impl<T: CombineAttributeParser<S>, S: Stage> Default for Combine<T, S> {
     fn default() -> Self {
         Self(Default::default(), Default::default())
     }
 }
 
-impl<T: CombineAttributeParser> AttributeParser for Combine<T> {
-    const ATTRIBUTES: AcceptMapping<Self> =
-        &[(T::PATH, |group: &mut Combine<T>, cx, args| group.1.extend(T::extend(cx, args)))];
+impl<T: CombineAttributeParser<S>, S: Stage> AttributeParser<S> for Combine<T, S> {
+    const ATTRIBUTES: AcceptMapping<Self, S> = &[(
+        T::PATH,
+        <T as CombineAttributeParser<S>>::TEMPLATE,
+        |group: &mut Combine<T, S>, cx, args| group.1.extend(T::extend(cx, args)),
+    )];
 
-    fn finalize(self, _cx: &FinalizeContext<'_>) -> Option<AttributeKind> {
+    fn finalize(self, _cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind> {
         if self.1.is_empty() { None } else { Some(T::CONVERT(self.1)) }
     }
 }
diff --git a/compiler/rustc_attr_parsing/src/attributes/repr.rs b/compiler/rustc_attr_parsing/src/attributes/repr.rs
index 69316541e19..ae9e7871874 100644
--- a/compiler/rustc_attr_parsing/src/attributes/repr.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/repr.rs
@@ -1,10 +1,11 @@
 use rustc_abi::Align;
 use rustc_ast::{IntTy, LitIntType, LitKind, UintTy};
 use rustc_attr_data_structures::{AttributeKind, IntType, ReprAttr};
+use rustc_feature::{AttributeTemplate, template};
 use rustc_span::{DUMMY_SP, Span, Symbol, sym};
 
 use super::{CombineAttributeParser, ConvertFn};
-use crate::context::AcceptContext;
+use crate::context::{AcceptContext, Stage};
 use crate::parser::{ArgParser, MetaItemListParser, MetaItemParser};
 use crate::session_diagnostics;
 use crate::session_diagnostics::IncorrectReprFormatGenericCause;
@@ -19,18 +20,21 @@ use crate::session_diagnostics::IncorrectReprFormatGenericCause;
 // FIXME(jdonszelmann): is a vec the right representation here even? isn't it just a struct?
 pub(crate) struct ReprParser;
 
-impl CombineAttributeParser for ReprParser {
+impl<S: Stage> CombineAttributeParser<S> for ReprParser {
     type Item = (ReprAttr, Span);
-    const PATH: &'static [Symbol] = &[sym::repr];
+    const PATH: &[Symbol] = &[sym::repr];
     const CONVERT: ConvertFn<Self::Item> = AttributeKind::Repr;
+    // FIXME(jdonszelmann): never used
+    const TEMPLATE: AttributeTemplate = template!(List: "C");
 
-    fn extend<'a>(
-        cx: &'a AcceptContext<'a>,
-        args: &'a ArgParser<'a>,
-    ) -> impl IntoIterator<Item = Self::Item> + 'a {
+    fn extend<'c>(
+        cx: &'c mut AcceptContext<'_, '_, S>,
+        args: &'c ArgParser<'_>,
+    ) -> impl IntoIterator<Item = Self::Item> + 'c {
         let mut reprs = Vec::new();
 
         let Some(list) = args.list() else {
+            cx.expected_list(cx.attr_span);
             return reprs;
         };
 
@@ -91,7 +95,10 @@ fn int_type_of_word(s: Symbol) -> Option<IntType> {
     }
 }
 
-fn parse_repr(cx: &AcceptContext<'_>, param: &MetaItemParser<'_>) -> Option<ReprAttr> {
+fn parse_repr<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
+    param: &MetaItemParser<'_>,
+) -> Option<ReprAttr> {
     use ReprAttr::*;
 
     // FIXME(jdonszelmann): invert the parsing here to match on the word first and then the
@@ -180,8 +187,8 @@ enum AlignKind {
     Align,
 }
 
-fn parse_repr_align(
-    cx: &AcceptContext<'_>,
+fn parse_repr_align<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
     list: &MetaItemListParser<'_>,
     param_span: Span,
     align_kind: AlignKind,
diff --git a/compiler/rustc_attr_parsing/src/attributes/stability.rs b/compiler/rustc_attr_parsing/src/attributes/stability.rs
index ce69a54513d..6871ff4ec9f 100644
--- a/compiler/rustc_attr_parsing/src/attributes/stability.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/stability.rs
@@ -5,11 +5,12 @@ use rustc_attr_data_structures::{
     StableSince, UnstableReason, VERSION_PLACEHOLDER,
 };
 use rustc_errors::ErrorGuaranteed;
-use rustc_span::{Span, Symbol, sym};
+use rustc_feature::{AttributeTemplate, template};
+use rustc_span::{Ident, Span, Symbol, sym};
 
 use super::util::parse_version;
-use super::{AcceptMapping, AttributeParser, SingleAttributeParser};
-use crate::context::{AcceptContext, FinalizeContext};
+use super::{AcceptMapping, AttributeOrder, AttributeParser, OnDuplicate, SingleAttributeParser};
+use crate::context::{AcceptContext, FinalizeContext, Stage};
 use crate::parser::{ArgParser, MetaItemParser};
 use crate::session_diagnostics::{self, UnsupportedLiteralReason};
 
@@ -31,7 +32,7 @@ pub(crate) struct StabilityParser {
 
 impl StabilityParser {
     /// Checks, and emits an error when a stability (or unstability) was already set, which would be a duplicate.
-    fn check_duplicate(&self, cx: &AcceptContext<'_>) -> bool {
+    fn check_duplicate<S: Stage>(&self, cx: &AcceptContext<'_, '_, S>) -> bool {
         if let Some((_, _)) = self.stability {
             cx.emit_err(session_diagnostics::MultipleStabilityLevels { span: cx.attr_span });
             true
@@ -41,31 +42,44 @@ impl StabilityParser {
     }
 }
 
-impl AttributeParser for StabilityParser {
-    const ATTRIBUTES: AcceptMapping<Self> = &[
-        (&[sym::stable], |this, cx, args| {
-            reject_outside_std!(cx);
-            if !this.check_duplicate(cx)
-                && let Some((feature, level)) = parse_stability(cx, args)
-            {
-                this.stability = Some((Stability { level, feature }, cx.attr_span));
-            }
-        }),
-        (&[sym::unstable], |this, cx, args| {
-            reject_outside_std!(cx);
-            if !this.check_duplicate(cx)
-                && let Some((feature, level)) = parse_unstability(cx, args)
-            {
-                this.stability = Some((Stability { level, feature }, cx.attr_span));
-            }
-        }),
-        (&[sym::rustc_allowed_through_unstable_modules], |this, cx, args| {
-            reject_outside_std!(cx);
-            this.allowed_through_unstable_modules = args.name_value().and_then(|i| i.value_as_str())
-        }),
+impl<S: Stage> AttributeParser<S> for StabilityParser {
+    const ATTRIBUTES: AcceptMapping<Self, S> = &[
+        (
+            &[sym::stable],
+            template!(List: r#"feature = "name", since = "version""#),
+            |this, cx, args| {
+                reject_outside_std!(cx);
+                if !this.check_duplicate(cx)
+                    && let Some((feature, level)) = parse_stability(cx, args)
+                {
+                    this.stability = Some((Stability { level, feature }, cx.attr_span));
+                }
+            },
+        ),
+        (
+            &[sym::unstable],
+            template!(List: r#"feature = "name", reason = "...", issue = "N""#),
+            |this, cx, args| {
+                reject_outside_std!(cx);
+                if !this.check_duplicate(cx)
+                    && let Some((feature, level)) = parse_unstability(cx, args)
+                {
+                    this.stability = Some((Stability { level, feature }, cx.attr_span));
+                }
+            },
+        ),
+        (
+            &[sym::rustc_allowed_through_unstable_modules],
+            template!(NameValueStr: "deprecation message"),
+            |this, cx, args| {
+                reject_outside_std!(cx);
+                this.allowed_through_unstable_modules =
+                    args.name_value().and_then(|i| i.value_as_str())
+            },
+        ),
     ];
 
-    fn finalize(mut self, cx: &FinalizeContext<'_>) -> Option<AttributeKind> {
+    fn finalize(mut self, cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind> {
         if let Some(atum) = self.allowed_through_unstable_modules {
             if let Some((
                 Stability {
@@ -95,9 +109,11 @@ pub(crate) struct BodyStabilityParser {
     stability: Option<(DefaultBodyStability, Span)>,
 }
 
-impl AttributeParser for BodyStabilityParser {
-    const ATTRIBUTES: AcceptMapping<Self> =
-        &[(&[sym::rustc_default_body_unstable], |this, cx, args| {
+impl<S: Stage> AttributeParser<S> for BodyStabilityParser {
+    const ATTRIBUTES: AcceptMapping<Self, S> = &[(
+        &[sym::rustc_default_body_unstable],
+        template!(List: r#"feature = "name", reason = "...", issue = "N""#),
+        |this, cx, args| {
             reject_outside_std!(cx);
             if this.stability.is_some() {
                 cx.dcx()
@@ -105,9 +121,10 @@ impl AttributeParser for BodyStabilityParser {
             } else if let Some((feature, level)) = parse_unstability(cx, args) {
                 this.stability = Some((DefaultBodyStability { level, feature }, cx.attr_span));
             }
-        })];
+        },
+    )];
 
-    fn finalize(self, _cx: &FinalizeContext<'_>) -> Option<AttributeKind> {
+    fn finalize(self, _cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind> {
         let (stability, span) = self.stability?;
 
         Some(AttributeKind::BodyStability { stability, span })
@@ -116,13 +133,13 @@ impl AttributeParser for BodyStabilityParser {
 
 pub(crate) struct ConstStabilityIndirectParser;
 // FIXME(jdonszelmann): single word attribute group when we have these
-impl SingleAttributeParser for ConstStabilityIndirectParser {
-    const PATH: &'static [Symbol] = &[sym::rustc_const_stable_indirect];
-
-    // ignore
-    fn on_duplicate(_cx: &AcceptContext<'_>, _first_span: Span) {}
+impl<S: Stage> SingleAttributeParser<S> for ConstStabilityIndirectParser {
+    const PATH: &[Symbol] = &[sym::rustc_const_stable_indirect];
+    const ATTRIBUTE_ORDER: AttributeOrder = AttributeOrder::KeepFirst;
+    const ON_DUPLICATE: OnDuplicate<S> = OnDuplicate::Ignore;
+    const TEMPLATE: AttributeTemplate = template!(Word);
 
-    fn convert(_cx: &AcceptContext<'_>, _args: &ArgParser<'_>) -> Option<AttributeKind> {
+    fn convert(_cx: &mut AcceptContext<'_, '_, S>, _args: &ArgParser<'_>) -> Option<AttributeKind> {
         Some(AttributeKind::ConstStabilityIndirect)
     }
 }
@@ -135,7 +152,7 @@ pub(crate) struct ConstStabilityParser {
 
 impl ConstStabilityParser {
     /// Checks, and emits an error when a stability (or unstability) was already set, which would be a duplicate.
-    fn check_duplicate(&self, cx: &AcceptContext<'_>) -> bool {
+    fn check_duplicate<S: Stage>(&self, cx: &AcceptContext<'_, '_, S>) -> bool {
         if let Some((_, _)) = self.stability {
             cx.emit_err(session_diagnostics::MultipleStabilityLevels { span: cx.attr_span });
             true
@@ -145,9 +162,9 @@ impl ConstStabilityParser {
     }
 }
 
-impl AttributeParser for ConstStabilityParser {
-    const ATTRIBUTES: AcceptMapping<Self> = &[
-        (&[sym::rustc_const_stable], |this, cx, args| {
+impl<S: Stage> AttributeParser<S> for ConstStabilityParser {
+    const ATTRIBUTES: AcceptMapping<Self, S> = &[
+        (&[sym::rustc_const_stable], template!(List: r#"feature = "name""#), |this, cx, args| {
             reject_outside_std!(cx);
 
             if !this.check_duplicate(cx)
@@ -159,7 +176,7 @@ impl AttributeParser for ConstStabilityParser {
                 ));
             }
         }),
-        (&[sym::rustc_const_unstable], |this, cx, args| {
+        (&[sym::rustc_const_unstable], template!(List: r#"feature = "name""#), |this, cx, args| {
             reject_outside_std!(cx);
             if !this.check_duplicate(cx)
                 && let Some((feature, level)) = parse_unstability(cx, args)
@@ -170,13 +187,13 @@ impl AttributeParser for ConstStabilityParser {
                 ));
             }
         }),
-        (&[sym::rustc_promotable], |this, cx, _| {
+        (&[sym::rustc_promotable], template!(Word), |this, cx, _| {
             reject_outside_std!(cx);
             this.promotable = true;
         }),
     ];
 
-    fn finalize(mut self, cx: &FinalizeContext<'_>) -> Option<AttributeKind> {
+    fn finalize(mut self, cx: &FinalizeContext<'_, '_, S>) -> Option<AttributeKind> {
         if self.promotable {
             if let Some((ref mut stab, _)) = self.stability {
                 stab.promotable = true;
@@ -196,16 +213,14 @@ impl AttributeParser for ConstStabilityParser {
 ///
 /// Emits an error when either the option was already Some, or the arguments weren't of form
 /// `name = value`
-fn insert_value_into_option_or_error(
-    cx: &AcceptContext<'_>,
+fn insert_value_into_option_or_error<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
     param: &MetaItemParser<'_>,
     item: &mut Option<Symbol>,
+    name: Ident,
 ) -> Option<()> {
     if item.is_some() {
-        cx.emit_err(session_diagnostics::MultipleItem {
-            span: param.span(),
-            item: param.path().to_string(),
-        });
+        cx.duplicate_key(name.span, name.name);
         None
     } else if let Some(v) = param.args().name_value()
         && let Some(s) = v.value_as_str()
@@ -213,18 +228,15 @@ fn insert_value_into_option_or_error(
         *item = Some(s);
         Some(())
     } else {
-        cx.emit_err(session_diagnostics::IncorrectMetaItem {
-            span: param.span(),
-            suggestion: None,
-        });
+        cx.expected_name_value(param.span(), Some(name.name));
         None
     }
 }
 
 /// Read the content of a `stable`/`rustc_const_stable` attribute, and return the feature name and
 /// its stability information.
-pub(crate) fn parse_stability(
-    cx: &AcceptContext<'_>,
+pub(crate) fn parse_stability<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
     args: &ArgParser<'_>,
 ) -> Option<(Symbol, StabilityLevel)> {
     let mut feature = None;
@@ -242,9 +254,14 @@ pub(crate) fn parse_stability(
             return None;
         };
 
-        match param.path().word_sym() {
-            Some(sym::feature) => insert_value_into_option_or_error(cx, &param, &mut feature)?,
-            Some(sym::since) => insert_value_into_option_or_error(cx, &param, &mut since)?,
+        let word = param.path().word();
+        match word.map(|i| i.name) {
+            Some(sym::feature) => {
+                insert_value_into_option_or_error(cx, &param, &mut feature, word.unwrap())?
+            }
+            Some(sym::since) => {
+                insert_value_into_option_or_error(cx, &param, &mut since, word.unwrap())?
+            }
             _ => {
                 cx.emit_err(session_diagnostics::UnknownMetaItem {
                     span: param_span,
@@ -289,8 +306,8 @@ pub(crate) fn parse_stability(
 
 // Read the content of a `unstable`/`rustc_const_unstable`/`rustc_default_body_unstable`
 /// attribute, and return the feature name and its stability information.
-pub(crate) fn parse_unstability(
-    cx: &AcceptContext<'_>,
+pub(crate) fn parse_unstability<S: Stage>(
+    cx: &AcceptContext<'_, '_, S>,
     args: &ArgParser<'_>,
 ) -> Option<(Symbol, StabilityLevel)> {
     let mut feature = None;
@@ -299,6 +316,7 @@ pub(crate) fn parse_unstability(
     let mut issue_num = None;
     let mut is_soft = false;
     let mut implied_by = None;
+    let mut old_name = None;
     for param in args.list()?.mixed() {
         let Some(param) = param.meta_item() else {
             cx.emit_err(session_diagnostics::UnsupportedLiteral {
@@ -310,11 +328,16 @@ pub(crate) fn parse_unstability(
             return None;
         };
 
-        match param.path().word_sym() {
-            Some(sym::feature) => insert_value_into_option_or_error(cx, &param, &mut feature)?,
-            Some(sym::reason) => insert_value_into_option_or_error(cx, &param, &mut reason)?,
+        let word = param.path().word();
+        match word.map(|i| i.name) {
+            Some(sym::feature) => {
+                insert_value_into_option_or_error(cx, &param, &mut feature, word.unwrap())?
+            }
+            Some(sym::reason) => {
+                insert_value_into_option_or_error(cx, &param, &mut reason, word.unwrap())?
+            }
             Some(sym::issue) => {
-                insert_value_into_option_or_error(cx, &param, &mut issue)?;
+                insert_value_into_option_or_error(cx, &param, &mut issue, word.unwrap())?;
 
                 // These unwraps are safe because `insert_value_into_option_or_error` ensures the meta item
                 // is a name/value pair string literal.
@@ -344,13 +367,16 @@ pub(crate) fn parse_unstability(
                 is_soft = true;
             }
             Some(sym::implied_by) => {
-                insert_value_into_option_or_error(cx, &param, &mut implied_by)?
+                insert_value_into_option_or_error(cx, &param, &mut implied_by, word.unwrap())?
+            }
+            Some(sym::old_name) => {
+                insert_value_into_option_or_error(cx, &param, &mut old_name, word.unwrap())?
             }
             _ => {
                 cx.emit_err(session_diagnostics::UnknownMetaItem {
                     span: param.span(),
                     item: param.path().to_string(),
-                    expected: &["feature", "reason", "issue", "soft", "implied_by"],
+                    expected: &["feature", "reason", "issue", "soft", "implied_by", "old_name"],
                 });
                 return None;
             }
@@ -375,6 +401,7 @@ pub(crate) fn parse_unstability(
                 issue: issue_num,
                 is_soft,
                 implied_by,
+                old_name,
             };
             Some((feature, level))
         }
diff --git a/compiler/rustc_attr_parsing/src/attributes/transparency.rs b/compiler/rustc_attr_parsing/src/attributes/transparency.rs
index d229fc09740..ce5ceb9139a 100644
--- a/compiler/rustc_attr_parsing/src/attributes/transparency.rs
+++ b/compiler/rustc_attr_parsing/src/attributes/transparency.rs
@@ -1,8 +1,10 @@
 use rustc_attr_data_structures::AttributeKind;
+use rustc_feature::{AttributeTemplate, template};
 use rustc_span::hygiene::Transparency;
-use rustc_span::{Span, Symbol, sym};
+use rustc_span::{Symbol, sym};
 
-use super::{AcceptContext, SingleAttributeParser};
+use super::{AttributeOrder, OnDuplicate, SingleAttributeParser};
+use crate::context::{AcceptContext, Stage};
 use crate::parser::ArgParser;
 
 pub(crate) struct TransparencyParser;
@@ -10,20 +12,29 @@ pub(crate) struct TransparencyParser;
 // FIXME(jdonszelmann): make these proper diagnostics
 #[allow(rustc::untranslatable_diagnostic)]
 #[allow(rustc::diagnostic_outside_of_impl)]
-impl SingleAttributeParser for TransparencyParser {
-    const PATH: &'static [Symbol] = &[sym::rustc_macro_transparency];
+impl<S: Stage> SingleAttributeParser<S> for TransparencyParser {
+    const PATH: &[Symbol] = &[sym::rustc_macro_transparency];
+    const ATTRIBUTE_ORDER: AttributeOrder = AttributeOrder::KeepFirst;
+    const ON_DUPLICATE: OnDuplicate<S> = OnDuplicate::Custom(|cx, used, unused| {
+        cx.dcx().span_err(vec![used, unused], "multiple macro transparency attributes");
+    });
+    const TEMPLATE: AttributeTemplate =
+        template!(NameValueStr: "transparent|semitransparent|opaque");
 
-    fn on_duplicate(cx: &crate::context::AcceptContext<'_>, first_span: Span) {
-        cx.dcx().span_err(vec![first_span, cx.attr_span], "multiple macro transparency attributes");
-    }
-
-    fn convert(cx: &AcceptContext<'_>, args: &ArgParser<'_>) -> Option<AttributeKind> {
-        match args.name_value().and_then(|nv| nv.value_as_str()) {
+    fn convert(cx: &mut AcceptContext<'_, '_, S>, args: &ArgParser<'_>) -> Option<AttributeKind> {
+        let Some(nv) = args.name_value() else {
+            cx.expected_name_value(cx.attr_span, None);
+            return None;
+        };
+        match nv.value_as_str() {
             Some(sym::transparent) => Some(Transparency::Transparent),
             Some(sym::semiopaque | sym::semitransparent) => Some(Transparency::SemiOpaque),
             Some(sym::opaque) => Some(Transparency::Opaque),
-            Some(other) => {
-                cx.dcx().span_err(cx.attr_span, format!("unknown macro transparency: `{other}`"));
+            Some(_) => {
+                cx.expected_specific_argument_strings(
+                    nv.value_span,
+                    vec!["transparent", "semitransparent", "opaque"],
+                );
                 None
             }
             None => None,
diff --git a/compiler/rustc_attr_parsing/src/context.rs b/compiler/rustc_attr_parsing/src/context.rs
index 35fb768ad0b..51c1760da30 100644
--- a/compiler/rustc_attr_parsing/src/context.rs
+++ b/compiler/rustc_attr_parsing/src/context.rs
@@ -1,19 +1,24 @@
 use std::cell::RefCell;
 use std::collections::BTreeMap;
-use std::ops::Deref;
+use std::marker::PhantomData;
+use std::ops::{Deref, DerefMut};
 use std::sync::LazyLock;
 
-use rustc_ast as ast;
+use private::Sealed;
+use rustc_ast::{self as ast, MetaItemLit, NodeId};
 use rustc_attr_data_structures::AttributeKind;
+use rustc_attr_data_structures::lints::{AttributeLint, AttributeLintKind};
 use rustc_errors::{DiagCtxtHandle, Diagnostic};
-use rustc_feature::Features;
-use rustc_hir::{AttrArgs, AttrItem, AttrPath, Attribute, HashIgnoredAttrId};
+use rustc_feature::{AttributeTemplate, Features};
+use rustc_hir::{AttrArgs, AttrItem, AttrPath, Attribute, HashIgnoredAttrId, HirId};
 use rustc_session::Session;
 use rustc_span::{DUMMY_SP, ErrorGuaranteed, Span, Symbol, sym};
 
 use crate::attributes::allow_unstable::{AllowConstFnUnstableParser, AllowInternalUnstableParser};
 use crate::attributes::confusables::ConfusablesParser;
 use crate::attributes::deprecation::DeprecationParser;
+use crate::attributes::inline::{InlineParser, RustcForceInlineParser};
+use crate::attributes::lint_helpers::AsPtrParser;
 use crate::attributes::repr::ReprParser;
 use crate::attributes::stability::{
     BodyStabilityParser, ConstStabilityIndirectParser, ConstStabilityParser, StabilityParser,
@@ -21,34 +26,54 @@ use crate::attributes::stability::{
 use crate::attributes::transparency::TransparencyParser;
 use crate::attributes::{AttributeParser as _, Combine, Single};
 use crate::parser::{ArgParser, MetaItemParser};
+use crate::session_diagnostics::{AttributeParseError, AttributeParseErrorReason, UnknownMetaItem};
+
+macro_rules! group_type {
+    ($stage: ty) => {
+         LazyLock<(
+            BTreeMap<&'static [Symbol], Vec<(AttributeTemplate, Box<dyn for<'sess, 'a> Fn(&mut AcceptContext<'_, 'sess, $stage>, &ArgParser<'a>) + Send + Sync>)>>,
+            Vec<Box<dyn Send + Sync + Fn(&mut FinalizeContext<'_, '_, $stage>) -> Option<AttributeKind>>>
+        )>
+    };
+}
 
 macro_rules! attribute_parsers {
     (
         pub(crate) static $name: ident = [$($names: ty),* $(,)?];
     ) => {
-        type Accepts = BTreeMap<
-            &'static [Symbol],
-            Box<dyn Send + Sync + Fn(&AcceptContext<'_>, &ArgParser<'_>)>
-        >;
-        type Finalizes = Vec<
-            Box<dyn Send + Sync + Fn(&FinalizeContext<'_>) -> Option<AttributeKind>>
-        >;
-        pub(crate) static $name: LazyLock<(Accepts, Finalizes)> = LazyLock::new(|| {
-            let mut accepts = Accepts::new();
-            let mut finalizes = Finalizes::new();
+        mod early {
+            use super::*;
+            type Combine<T> = super::Combine<T, Early>;
+            type Single<T> = super::Single<T, Early>;
+
+            attribute_parsers!(@[Early] pub(crate) static $name = [$($names),*];);
+        }
+        mod late {
+            use super::*;
+            type Combine<T> = super::Combine<T, Late>;
+            type Single<T> = super::Single<T, Late>;
+
+            attribute_parsers!(@[Late] pub(crate) static $name = [$($names),*];);
+        }
+    };
+    (
+        @[$ty: ty] pub(crate) static $name: ident = [$($names: ty),* $(,)?];
+    ) => {
+        pub(crate) static $name: group_type!($ty) = LazyLock::new(|| {
+            let mut accepts = BTreeMap::<_, Vec<(AttributeTemplate, Box<dyn for<'sess, 'a> Fn(&mut AcceptContext<'_, 'sess, $ty>, &ArgParser<'a>) + Send + Sync>)>>::new();
+            let mut finalizes = Vec::<Box<dyn Send + Sync + Fn(&mut FinalizeContext<'_, '_, $ty>) -> Option<AttributeKind>>>::new();
             $(
                 {
                     thread_local! {
                         static STATE_OBJECT: RefCell<$names> = RefCell::new(<$names>::default());
                     };
 
-                    for (k, v) in <$names>::ATTRIBUTES {
-                        let old = accepts.insert(*k, Box::new(|cx, args| {
+                    for (path, template, accept_fn) in <$names>::ATTRIBUTES {
+                        accepts.entry(*path).or_default().push((*template, Box::new(|cx, args| {
                             STATE_OBJECT.with_borrow_mut(|s| {
-                                v(s, cx, args)
+                                accept_fn(s, cx, args)
                             })
-                        }));
-                        assert!(old.is_none());
+                        })));
                     }
 
                     finalizes.push(Box::new(|cx| {
@@ -62,7 +87,6 @@ macro_rules! attribute_parsers {
         });
     };
 }
-
 attribute_parsers!(
     pub(crate) static ATTRIBUTE_PARSERS = [
         // tidy-alphabetical-start
@@ -79,57 +103,255 @@ attribute_parsers!(
         // tidy-alphabetical-end
 
         // tidy-alphabetical-start
+        Single<AsPtrParser>,
         Single<ConstStabilityIndirectParser>,
         Single<DeprecationParser>,
+        Single<InlineParser>,
+        Single<RustcForceInlineParser>,
         Single<TransparencyParser>,
         // tidy-alphabetical-end
     ];
 );
 
+mod private {
+    pub trait Sealed {}
+    impl Sealed for super::Early {}
+    impl Sealed for super::Late {}
+}
+
+// allow because it's a sealed trait
+#[allow(private_interfaces)]
+pub trait Stage: Sized + 'static + Sealed {
+    type Id: Copy;
+
+    fn parsers() -> &'static group_type!(Self);
+
+    fn emit_err<'sess>(sess: &'sess Session, diag: impl for<'x> Diagnostic<'x>) -> ErrorGuaranteed;
+}
+
+// allow because it's a sealed trait
+#[allow(private_interfaces)]
+impl Stage for Early {
+    type Id = NodeId;
+
+    fn parsers() -> &'static group_type!(Self) {
+        &early::ATTRIBUTE_PARSERS
+    }
+    fn emit_err<'sess>(sess: &'sess Session, diag: impl for<'x> Diagnostic<'x>) -> ErrorGuaranteed {
+        sess.dcx().create_err(diag).delay_as_bug()
+    }
+}
+
+// allow because it's a sealed trait
+#[allow(private_interfaces)]
+impl Stage for Late {
+    type Id = HirId;
+
+    fn parsers() -> &'static group_type!(Self) {
+        &late::ATTRIBUTE_PARSERS
+    }
+    fn emit_err<'sess>(tcx: &'sess Session, diag: impl for<'x> Diagnostic<'x>) -> ErrorGuaranteed {
+        tcx.dcx().emit_err(diag)
+    }
+}
+
+/// used when parsing attributes for miscelaneous things *before* ast lowering
+pub struct Early;
+/// used when parsing attributes during ast lowering
+pub struct Late;
+
 /// Context given to every attribute parser when accepting
 ///
 /// Gives [`AttributeParser`]s enough information to create errors, for example.
-pub(crate) struct AcceptContext<'a> {
-    pub(crate) finalize_cx: &'a FinalizeContext<'a>,
+pub(crate) struct AcceptContext<'f, 'sess, S: Stage> {
+    pub(crate) finalize_cx: FinalizeContext<'f, 'sess, S>,
     /// The span of the attribute currently being parsed
     pub(crate) attr_span: Span,
+
+    /// The expected structure of the attribute.
+    ///
+    /// Used in reporting errors to give a hint to users what the attribute *should* look like.
+    pub(crate) template: &'f AttributeTemplate,
+
+    /// The name of the attribute we're currently accepting.
+    pub(crate) attr_path: AttrPath,
 }
 
-impl<'a> AcceptContext<'a> {
-    pub(crate) fn emit_err(&self, diag: impl Diagnostic<'a>) -> ErrorGuaranteed {
-        if self.limit_diagnostics {
-            self.dcx().create_err(diag).delay_as_bug()
-        } else {
-            self.dcx().emit_err(diag)
-        }
+impl<'f, 'sess: 'f, S: Stage> AcceptContext<'f, 'sess, S> {
+    pub(crate) fn emit_err(&self, diag: impl for<'x> Diagnostic<'x>) -> ErrorGuaranteed {
+        S::emit_err(&self.sess, diag)
+    }
+
+    /// Emit a lint. This method is somewhat special, since lints emitted during attribute parsing
+    /// must be delayed until after HIR is built. This method will take care of the details of
+    /// that.
+    pub(crate) fn emit_lint(&mut self, lint: AttributeLintKind, span: Span) {
+        let id = self.target_id;
+        (self.emit_lint)(AttributeLint { id, span, kind: lint });
+    }
+
+    pub(crate) fn unknown_key(
+        &self,
+        span: Span,
+        found: String,
+        options: &'static [&'static str],
+    ) -> ErrorGuaranteed {
+        self.emit_err(UnknownMetaItem { span, item: found, expected: options })
+    }
+
+    /// error that a string literal was expected.
+    /// You can optionally give the literal you did find (which you found not to be a string literal)
+    /// which can make better errors. For example, if the literal was a byte string it will suggest
+    /// removing the `b` prefix.
+    pub(crate) fn expected_string_literal(
+        &self,
+        span: Span,
+        actual_literal: Option<&MetaItemLit>,
+    ) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::ExpectedStringLiteral {
+                byte_string: actual_literal.and_then(|i| {
+                    i.kind.is_bytestr().then(|| self.sess().source_map().start_point(i.span))
+                }),
+            },
+        })
+    }
+
+    pub(crate) fn expected_list(&self, span: Span) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::ExpectedList,
+        })
+    }
+
+    /// emit an error that a `name = value` pair was expected at this span. The symbol can be given for
+    /// a nicer error message talking about the specific name that was found lacking a value.
+    pub(crate) fn expected_name_value(&self, span: Span, name: Option<Symbol>) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::ExpectedNameValue(name),
+        })
+    }
+
+    /// emit an error that a `name = value` pair was found where that name was already seen.
+    pub(crate) fn duplicate_key(&self, span: Span, key: Symbol) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::DuplicateKey(key),
+        })
+    }
+
+    /// an error that should be emitted when a [`MetaItemOrLitParser`](crate::parser::MetaItemOrLitParser)
+    /// was expected *not* to be a literal, but instead a meta item.
+    pub(crate) fn unexpected_literal(&self, span: Span) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::UnexpectedLiteral,
+        })
+    }
+
+    pub(crate) fn expected_single_argument(&self, span: Span) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::ExpectedSingleArgument,
+        })
+    }
+
+    pub(crate) fn expected_specific_argument(
+        &self,
+        span: Span,
+        possibilities: Vec<&'static str>,
+    ) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::ExpectedSpecificArgument {
+                possibilities,
+                strings: false,
+            },
+        })
+    }
+
+    pub(crate) fn expected_specific_argument_strings(
+        &self,
+        span: Span,
+        possibilities: Vec<&'static str>,
+    ) -> ErrorGuaranteed {
+        self.emit_err(AttributeParseError {
+            span,
+            attr_span: self.attr_span,
+            template: self.template.clone(),
+            attribute: self.attr_path.clone(),
+            reason: AttributeParseErrorReason::ExpectedSpecificArgument {
+                possibilities,
+                strings: true,
+            },
+        })
     }
 }
 
-impl<'a> Deref for AcceptContext<'a> {
-    type Target = FinalizeContext<'a>;
+impl<'f, 'sess, S: Stage> Deref for AcceptContext<'f, 'sess, S> {
+    type Target = FinalizeContext<'f, 'sess, S>;
 
     fn deref(&self) -> &Self::Target {
         &self.finalize_cx
     }
 }
 
+impl<'f, 'sess, S: Stage> DerefMut for AcceptContext<'f, 'sess, S> {
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.finalize_cx
+    }
+}
+
 /// Context given to every attribute parser during finalization.
 ///
 /// Gives [`AttributeParser`](crate::attributes::AttributeParser)s enough information to create
 /// errors, for example.
-pub(crate) struct FinalizeContext<'a> {
+pub(crate) struct FinalizeContext<'p, 'sess, S: Stage> {
     /// The parse context, gives access to the session and the
     /// diagnostics context.
-    pub(crate) cx: &'a AttributeParser<'a>,
+    pub(crate) cx: &'p mut AttributeParser<'sess, S>,
     /// The span of the syntactical component this attribute was applied to
     pub(crate) target_span: Span,
+    /// The id ([`NodeId`] if `S` is `Early`, [`HirId`] if `S` is `Late`) of the syntactical component this attribute was applied to
+    pub(crate) target_id: S::Id,
+
+    pub(crate) emit_lint: &'p mut dyn FnMut(AttributeLint<S::Id>),
 }
 
-impl<'a> Deref for FinalizeContext<'a> {
-    type Target = AttributeParser<'a>;
+impl<'p, 'sess: 'p, S: Stage> Deref for FinalizeContext<'p, 'sess, S> {
+    type Target = AttributeParser<'sess, S>;
 
     fn deref(&self) -> &Self::Target {
-        &self.cx
+        self.cx
+    }
+}
+
+impl<'p, 'sess: 'p, S: Stage> DerefMut for FinalizeContext<'p, 'sess, S> {
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        self.cx
     }
 }
 
@@ -141,23 +363,20 @@ pub enum OmitDoc {
 
 /// Context created once, for example as part of the ast lowering
 /// context, through which all attributes can be lowered.
-pub struct AttributeParser<'sess> {
+pub struct AttributeParser<'sess, S: Stage = Late> {
     #[expect(dead_code)] // FIXME(jdonszelmann): needed later to verify we parsed all attributes
     tools: Vec<Symbol>,
-    sess: &'sess Session,
     features: Option<&'sess Features>,
+    sess: &'sess Session,
+    stage: PhantomData<S>,
 
     /// *Only* parse attributes with this symbol.
     ///
     /// Used in cases where we want the lowering infrastructure for parse just a single attribute.
     parse_only: Option<Symbol>,
-
-    /// Can be used to instruct parsers to reduce the number of diagnostics it emits.
-    /// Useful when using `parse_limited` and you know the attr will be reparsed later.
-    pub(crate) limit_diagnostics: bool,
 }
 
-impl<'sess> AttributeParser<'sess> {
+impl<'sess> AttributeParser<'sess, Early> {
     /// This method allows you to parse attributes *before* you have access to features or tools.
     /// One example where this is necessary, is to parse `feature` attributes themselves for
     /// example.
@@ -168,33 +387,53 @@ impl<'sess> AttributeParser<'sess> {
     ///
     /// To make sure use is limited, supply a `Symbol` you'd like to parse. Only attributes with
     /// that symbol are picked out of the list of instructions and parsed. Those are returned.
+    ///
+    /// No diagnostics will be emitted when parsing limited. Lints are not emitted at all, while
+    /// errors will be emitted as a delayed bugs. in other words, we *expect* attributes parsed
+    /// with `parse_limited` to be reparsed later during ast lowering where we *do* emit the errors
     pub fn parse_limited(
         sess: &'sess Session,
         attrs: &[ast::Attribute],
         sym: Symbol,
         target_span: Span,
-        limit_diagnostics: bool,
+        target_node_id: NodeId,
     ) -> Option<Attribute> {
-        let mut parsed = Self {
-            sess,
+        let mut p = Self {
             features: None,
             tools: Vec::new(),
             parse_only: Some(sym),
-            limit_diagnostics,
-        }
-        .parse_attribute_list(attrs, target_span, OmitDoc::Skip, std::convert::identity);
-
+            sess,
+            stage: PhantomData,
+        };
+        let mut parsed = p.parse_attribute_list(
+            attrs,
+            target_span,
+            target_node_id,
+            OmitDoc::Skip,
+            std::convert::identity,
+            |_lint| {
+                panic!("can't emit lints here for now (nothing uses this atm)");
+            },
+        );
         assert!(parsed.len() <= 1);
 
         parsed.pop()
     }
 
+    pub fn new_early(sess: &'sess Session, features: &'sess Features, tools: Vec<Symbol>) -> Self {
+        Self { features: Some(features), tools, parse_only: None, sess, stage: PhantomData }
+    }
+}
+
+impl<'sess> AttributeParser<'sess, Late> {
     pub fn new(sess: &'sess Session, features: &'sess Features, tools: Vec<Symbol>) -> Self {
-        Self { sess, features: Some(features), tools, parse_only: None, limit_diagnostics: false }
+        Self { features: Some(features), tools, parse_only: None, sess, stage: PhantomData }
     }
+}
 
+impl<'sess, S: Stage> AttributeParser<'sess, S> {
     pub(crate) fn sess(&self) -> &'sess Session {
-        self.sess
+        &self.sess
     }
 
     pub(crate) fn features(&self) -> &'sess Features {
@@ -202,25 +441,25 @@ impl<'sess> AttributeParser<'sess> {
     }
 
     pub(crate) fn dcx(&self) -> DiagCtxtHandle<'sess> {
-        self.sess.dcx()
+        self.sess().dcx()
     }
 
     /// Parse a list of attributes.
     ///
     /// `target_span` is the span of the thing this list of attributes is applied to,
     /// and when `omit_doc` is set, doc attributes are filtered out.
-    pub fn parse_attribute_list<'a>(
-        &'a self,
-        attrs: &'a [ast::Attribute],
+    pub fn parse_attribute_list(
+        &mut self,
+        attrs: &[ast::Attribute],
         target_span: Span,
+        target_id: S::Id,
         omit_doc: OmitDoc,
 
         lower_span: impl Copy + Fn(Span) -> Span,
+        mut emit_lint: impl FnMut(AttributeLint<S::Id>),
     ) -> Vec<Attribute> {
         let mut attributes = Vec::new();
 
-        let finalize_cx = FinalizeContext { cx: self, target_span };
-
         for attr in attrs {
             // If we're only looking for a single attribute, skip all the ones we don't care about.
             if let Some(expected) = self.parse_only {
@@ -268,13 +507,22 @@ impl<'sess> AttributeParser<'sess> {
                     let args = parser.args();
                     let parts = path.segments().map(|i| i.name).collect::<Vec<_>>();
 
-                    if let Some(accept) = ATTRIBUTE_PARSERS.0.get(parts.as_slice()) {
-                        let cx = AcceptContext {
-                            finalize_cx: &finalize_cx,
-                            attr_span: lower_span(attr.span),
-                        };
-
-                        accept(&cx, &args)
+                    if let Some(accepts) = S::parsers().0.get(parts.as_slice()) {
+                        for (template, accept) in accepts {
+                            let mut cx: AcceptContext<'_, 'sess, S> = AcceptContext {
+                                finalize_cx: FinalizeContext {
+                                    cx: self,
+                                    target_span,
+                                    target_id,
+                                    emit_lint: &mut emit_lint,
+                                },
+                                attr_span: lower_span(attr.span),
+                                template,
+                                attr_path: path.get_attribute_path(),
+                            };
+
+                            accept(&mut cx, args)
+                        }
                     } else {
                         // If we're here, we must be compiling a tool attribute... Or someone
                         // forgot to parse their fancy new attribute. Let's warn them in any case.
@@ -304,8 +552,13 @@ impl<'sess> AttributeParser<'sess> {
         }
 
         let mut parsed_attributes = Vec::new();
-        for f in &ATTRIBUTE_PARSERS.1 {
-            if let Some(attr) = f(&finalize_cx) {
+        for f in &S::parsers().1 {
+            if let Some(attr) = f(&mut FinalizeContext {
+                cx: self,
+                target_span,
+                target_id,
+                emit_lint: &mut emit_lint,
+            }) {
                 parsed_attributes.push(Attribute::Parsed(attr));
             }
         }
diff --git a/compiler/rustc_attr_parsing/src/lib.rs b/compiler/rustc_attr_parsing/src/lib.rs
index 15037e802ff..47eeb63bad3 100644
--- a/compiler/rustc_attr_parsing/src/lib.rs
+++ b/compiler/rustc_attr_parsing/src/lib.rs
@@ -85,7 +85,8 @@
 
 #[macro_use]
 mod attributes;
-mod context;
+pub(crate) mod context;
+mod lints;
 pub mod parser;
 mod session_diagnostics;
 
@@ -93,6 +94,7 @@ pub use attributes::cfg::*;
 pub use attributes::util::{
     find_crate_name, is_builtin_attr, is_doc_alias_attrs_contain_symbol, parse_version,
 };
-pub use context::{AttributeParser, OmitDoc};
+pub use context::{AttributeParser, Early, Late, OmitDoc};
+pub use lints::emit_attribute_lint;
 
 rustc_fluent_macro::fluent_messages! { "../messages.ftl" }
diff --git a/compiler/rustc_attr_parsing/src/lints.rs b/compiler/rustc_attr_parsing/src/lints.rs
new file mode 100644
index 00000000000..fee22293b47
--- /dev/null
+++ b/compiler/rustc_attr_parsing/src/lints.rs
@@ -0,0 +1,32 @@
+use rustc_attr_data_structures::lints::{AttributeLint, AttributeLintKind};
+use rustc_errors::{DiagArgValue, LintEmitter};
+use rustc_hir::HirId;
+
+use crate::session_diagnostics;
+
+pub fn emit_attribute_lint<L: LintEmitter>(lint: &AttributeLint<HirId>, lint_emitter: L) {
+    let AttributeLint { id, span, kind } = lint;
+
+    match kind {
+        &AttributeLintKind::UnusedDuplicate { this, other, warning } => lint_emitter
+            .emit_node_span_lint(
+                rustc_session::lint::builtin::UNUSED_ATTRIBUTES,
+                *id,
+                *span,
+                session_diagnostics::UnusedDuplicate { this, other, warning },
+            ),
+        AttributeLintKind::IllFormedAttributeInput { suggestions } => {
+            lint_emitter.emit_node_span_lint(
+                rustc_session::lint::builtin::ILL_FORMED_ATTRIBUTE_INPUT,
+                *id,
+                *span,
+                session_diagnostics::IllFormedAttributeInput {
+                    num_suggestions: suggestions.len(),
+                    suggestions: DiagArgValue::StrListSepByAnd(
+                        suggestions.into_iter().map(|s| format!("`{s}`").into()).collect(),
+                    ),
+                },
+            );
+        }
+    }
+}
diff --git a/compiler/rustc_attr_parsing/src/parser.rs b/compiler/rustc_attr_parsing/src/parser.rs
index e10e3b511db..1edbe3a9d27 100644
--- a/compiler/rustc_attr_parsing/src/parser.rs
+++ b/compiler/rustc_attr_parsing/src/parser.rs
@@ -115,7 +115,7 @@ impl<'a> ArgParser<'a> {
         }
     }
 
-    pub fn from_attr_args(value: &'a AttrArgs, dcx: DiagCtxtHandle<'a>) -> Self {
+    pub fn from_attr_args<'sess>(value: &'a AttrArgs, dcx: DiagCtxtHandle<'sess>) -> Self {
         match value {
             AttrArgs::Empty => Self::NoArgs,
             AttrArgs::Delimited(args) if args.delim == Delimiter::Parenthesis => {
@@ -235,7 +235,7 @@ impl<'a> Debug for MetaItemParser<'a> {
 impl<'a> MetaItemParser<'a> {
     /// Create a new parser from a [`NormalAttr`], which is stored inside of any
     /// [`ast::Attribute`](rustc_ast::Attribute)
-    pub fn from_attr(attr: &'a NormalAttr, dcx: DiagCtxtHandle<'a>) -> Self {
+    pub fn from_attr<'sess>(attr: &'a NormalAttr, dcx: DiagCtxtHandle<'sess>) -> Self {
         Self {
             path: PathParser::Ast(&attr.item.path),
             args: ArgParser::from_attr_args(&attr.item.args, dcx),
@@ -320,13 +320,13 @@ fn expr_to_lit(dcx: DiagCtxtHandle<'_>, expr: &Expr, span: Span) -> MetaItemLit
     }
 }
 
-struct MetaItemListParserContext<'a> {
+struct MetaItemListParserContext<'a, 'sess> {
     // the tokens inside the delimiters, so `#[some::attr(a b c)]` would have `a b c` inside
     inside_delimiters: Peekable<TokenStreamIter<'a>>,
-    dcx: DiagCtxtHandle<'a>,
+    dcx: DiagCtxtHandle<'sess>,
 }
 
-impl<'a> MetaItemListParserContext<'a> {
+impl<'a, 'sess> MetaItemListParserContext<'a, 'sess> {
     fn done(&mut self) -> bool {
         self.inside_delimiters.peek().is_none()
     }
@@ -507,11 +507,11 @@ pub struct MetaItemListParser<'a> {
 }
 
 impl<'a> MetaItemListParser<'a> {
-    fn new(delim: &'a DelimArgs, dcx: DiagCtxtHandle<'a>) -> MetaItemListParser<'a> {
+    fn new<'sess>(delim: &'a DelimArgs, dcx: DiagCtxtHandle<'sess>) -> Self {
         MetaItemListParser::new_tts(delim.tokens.iter(), delim.dspan.entire(), dcx)
     }
 
-    fn new_tts(tts: TokenStreamIter<'a>, span: Span, dcx: DiagCtxtHandle<'a>) -> Self {
+    fn new_tts<'sess>(tts: TokenStreamIter<'a>, span: Span, dcx: DiagCtxtHandle<'sess>) -> Self {
         MetaItemListParserContext { inside_delimiters: tts.peekable(), dcx }.parse(span)
     }
 
diff --git a/compiler/rustc_attr_parsing/src/session_diagnostics.rs b/compiler/rustc_attr_parsing/src/session_diagnostics.rs
index 2c434175b4b..57ac92a0ca1 100644
--- a/compiler/rustc_attr_parsing/src/session_diagnostics.rs
+++ b/compiler/rustc_attr_parsing/src/session_diagnostics.rs
@@ -2,8 +2,12 @@ use std::num::IntErrorKind;
 
 use rustc_ast as ast;
 use rustc_errors::codes::*;
-use rustc_errors::{Applicability, Diag, DiagCtxtHandle, Diagnostic, EmissionGuarantee, Level};
-use rustc_macros::{Diagnostic, Subdiagnostic};
+use rustc_errors::{
+    Applicability, Diag, DiagArgValue, DiagCtxtHandle, Diagnostic, EmissionGuarantee, Level,
+};
+use rustc_feature::AttributeTemplate;
+use rustc_hir::AttrPath;
+use rustc_macros::{Diagnostic, LintDiagnostic, Subdiagnostic};
 use rustc_span::{Span, Symbol};
 
 use crate::fluent_generated as fluent;
@@ -12,8 +16,6 @@ pub(crate) enum UnsupportedLiteralReason {
     Generic,
     CfgString,
     CfgBoolean,
-    DeprecatedString,
-    DeprecatedKvPair,
 }
 
 #[derive(Diagnostic)]
@@ -32,37 +34,6 @@ pub(crate) struct InvalidPredicate {
     pub predicate: String,
 }
 
-#[derive(Diagnostic)]
-#[diag(attr_parsing_multiple_item, code = E0538)]
-pub(crate) struct MultipleItem {
-    #[primary_span]
-    pub span: Span,
-
-    pub item: String,
-}
-
-#[derive(Diagnostic)]
-#[diag(attr_parsing_incorrect_meta_item, code = E0539)]
-pub(crate) struct IncorrectMetaItem {
-    #[primary_span]
-    pub span: Span,
-
-    #[subdiagnostic]
-    pub suggestion: Option<IncorrectMetaItemSuggestion>,
-}
-
-#[derive(Subdiagnostic)]
-#[multipart_suggestion(
-    attr_parsing_incorrect_meta_item_suggestion,
-    applicability = "maybe-incorrect"
-)]
-pub(crate) struct IncorrectMetaItemSuggestion {
-    #[suggestion_part(code = "\"")]
-    pub lo: Span,
-    #[suggestion_part(code = "\"")]
-    pub hi: Span,
-}
-
 /// Error code: E0541
 pub(crate) struct UnknownMetaItem<'a> {
     pub span: Span,
@@ -217,6 +188,7 @@ pub(crate) struct InvalidReprHintNoValue {
 }
 
 /// Error code: E0565
+// FIXME(jdonszelmann): slowly phased out
 pub(crate) struct UnsupportedLiteral {
     pub span: Span,
     pub reason: UnsupportedLiteralReason,
@@ -239,12 +211,6 @@ impl<'a, G: EmissionGuarantee> Diagnostic<'a, G> for UnsupportedLiteral {
                 UnsupportedLiteralReason::CfgBoolean => {
                     fluent::attr_parsing_unsupported_literal_cfg_boolean
                 }
-                UnsupportedLiteralReason::DeprecatedString => {
-                    fluent::attr_parsing_unsupported_literal_deprecated_string
-                }
-                UnsupportedLiteralReason::DeprecatedKvPair => {
-                    fluent::attr_parsing_unsupported_literal_deprecated_kv_pair
-                }
             },
         );
         diag.span(self.span);
@@ -451,6 +417,25 @@ pub(crate) struct UnusedMultiple {
     pub name: Symbol,
 }
 
+#[derive(LintDiagnostic)]
+#[diag(attr_parsing_unused_duplicate)]
+pub(crate) struct UnusedDuplicate {
+    #[suggestion(code = "", applicability = "machine-applicable")]
+    pub this: Span,
+    #[note]
+    pub other: Span,
+    #[warning]
+    pub warning: bool,
+}
+
+// FIXME(jdonszelmann): duplicated in rustc_lints, should be moved here completely.
+#[derive(LintDiagnostic)]
+#[diag(attr_parsing_ill_formed_attribute_input)]
+pub(crate) struct IllFormedAttributeInput {
+    pub num_suggestions: usize,
+    pub suggestions: DiagArgValue,
+}
+
 #[derive(Diagnostic)]
 #[diag(attr_parsing_stability_outside_std, code = E0734)]
 pub(crate) struct StabilityOutsideStd {
@@ -479,3 +464,115 @@ pub(crate) struct UnrecognizedReprHint {
     #[primary_span]
     pub span: Span,
 }
+
+pub(crate) enum AttributeParseErrorReason {
+    ExpectedStringLiteral { byte_string: Option<Span> },
+    ExpectedSingleArgument,
+    ExpectedList,
+    UnexpectedLiteral,
+    ExpectedNameValue(Option<Symbol>),
+    DuplicateKey(Symbol),
+    ExpectedSpecificArgument { possibilities: Vec<&'static str>, strings: bool },
+}
+
+pub(crate) struct AttributeParseError {
+    pub(crate) span: Span,
+    pub(crate) attr_span: Span,
+    pub(crate) template: AttributeTemplate,
+    pub(crate) attribute: AttrPath,
+    pub(crate) reason: AttributeParseErrorReason,
+}
+
+impl<'a, G: EmissionGuarantee> Diagnostic<'a, G> for AttributeParseError {
+    fn into_diag(self, dcx: DiagCtxtHandle<'a>, level: Level) -> Diag<'a, G> {
+        let name = self.attribute.to_string();
+
+        let mut diag = Diag::new(dcx, level, format!("malformed `{name}` attribute input"));
+        diag.span(self.attr_span);
+        diag.code(E0539);
+        match self.reason {
+            AttributeParseErrorReason::ExpectedStringLiteral { byte_string } => {
+                if let Some(start_point_span) = byte_string {
+                    diag.span_suggestion(
+                        start_point_span,
+                        fluent::attr_parsing_unsupported_literal_suggestion,
+                        "",
+                        Applicability::MaybeIncorrect,
+                    );
+                    diag.note("expected a normal string literal, not a byte string literal");
+
+                    return diag;
+                } else {
+                    diag.span_label(self.span, "expected a string literal here");
+                }
+            }
+            AttributeParseErrorReason::ExpectedSingleArgument => {
+                diag.span_label(self.span, "expected a single argument here");
+                diag.code(E0805);
+            }
+            AttributeParseErrorReason::ExpectedList => {
+                diag.span_label(self.span, "expected this to be a list");
+            }
+            AttributeParseErrorReason::DuplicateKey(key) => {
+                diag.span_label(self.span, format!("found `{key}` used as a key more than once"));
+                diag.code(E0538);
+            }
+            AttributeParseErrorReason::UnexpectedLiteral => {
+                diag.span_label(self.span, format!("didn't expect a literal here"));
+                diag.code(E0565);
+            }
+            AttributeParseErrorReason::ExpectedNameValue(None) => {
+                diag.span_label(
+                    self.span,
+                    format!("expected this to be of the form `{name} = \"...\"`"),
+                );
+            }
+            AttributeParseErrorReason::ExpectedNameValue(Some(name)) => {
+                diag.span_label(
+                    self.span,
+                    format!("expected this to be of the form `{name} = \"...\"`"),
+                );
+            }
+            AttributeParseErrorReason::ExpectedSpecificArgument { possibilities, strings } => {
+                let quote = if strings { '"' } else { '`' };
+                match possibilities.as_slice() {
+                    &[] => {}
+                    &[x] => {
+                        diag.span_label(
+                            self.span,
+                            format!("the only valid argument here is {quote}{x}{quote}"),
+                        );
+                    }
+                    [first, second] => {
+                        diag.span_label(self.span, format!("valid arguments are {quote}{first}{quote} or {quote}{second}{quote}"));
+                    }
+                    [first @ .., second_to_last, last] => {
+                        let mut res = String::new();
+                        for i in first {
+                            res.push_str(&format!("{quote}{i}{quote}, "));
+                        }
+                        res.push_str(&format!(
+                            "{quote}{second_to_last}{quote} or {quote}{last}{quote}"
+                        ));
+
+                        diag.span_label(self.span, format!("valid arguments are {res}"));
+                    }
+                }
+            }
+        }
+
+        let suggestions = self.template.suggestions(false, &name);
+        diag.span_suggestions(
+            self.attr_span,
+            if suggestions.len() == 1 {
+                "must be of the form"
+            } else {
+                "try changing it to one of the following valid forms of the attribute"
+            },
+            suggestions,
+            Applicability::HasPlaceholders,
+        );
+
+        diag
+    }
+}
diff --git a/compiler/rustc_borrowck/src/dataflow.rs b/compiler/rustc_borrowck/src/dataflow.rs
index 7511a55b03a..57db2e9fb57 100644
--- a/compiler/rustc_borrowck/src/dataflow.rs
+++ b/compiler/rustc_borrowck/src/dataflow.rs
@@ -2,7 +2,7 @@ use std::fmt;
 
 use rustc_data_structures::fx::FxIndexMap;
 use rustc_data_structures::graph;
-use rustc_index::bit_set::DenseBitSet;
+use rustc_index::bit_set::{DenseBitSet, MixedBitSet};
 use rustc_middle::mir::{
     self, BasicBlock, Body, CallReturnPlaces, Location, Place, TerminatorEdges,
 };
@@ -548,7 +548,7 @@ impl<'a, 'tcx> Borrows<'a, 'tcx> {
     }
 }
 
-type BorrowsDomain = DenseBitSet<BorrowIndex>;
+type BorrowsDomain = MixedBitSet<BorrowIndex>;
 
 /// Forward dataflow computation of the set of borrows that are in scope at a particular location.
 /// - we gen the introduced loans
@@ -564,7 +564,7 @@ impl<'tcx> rustc_mir_dataflow::Analysis<'tcx> for Borrows<'_, 'tcx> {
 
     fn bottom_value(&self, _: &mir::Body<'tcx>) -> Self::Domain {
         // bottom = nothing is reserved or activated yet;
-        DenseBitSet::new_empty(self.borrow_set.len())
+        MixedBitSet::new_empty(self.borrow_set.len())
     }
 
     fn initialize_start_block(&self, _: &mir::Body<'tcx>, _: &mut Self::Domain) {
diff --git a/compiler/rustc_borrowck/src/diagnostics/conflict_errors.rs b/compiler/rustc_borrowck/src/diagnostics/conflict_errors.rs
index 1b4bb11d87b..34d36849939 100644
--- a/compiler/rustc_borrowck/src/diagnostics/conflict_errors.rs
+++ b/compiler/rustc_borrowck/src/diagnostics/conflict_errors.rs
@@ -3229,8 +3229,20 @@ impl<'infcx, 'tcx> MirBorrowckCtxt<'_, 'infcx, 'tcx> {
                                     Applicability::MaybeIncorrect,
                                 );
                             }
+
+                            let mutability = if matches!(borrow.kind(), BorrowKind::Mut { .. }) {
+                                "mut "
+                            } else {
+                                ""
+                            };
+
                             if !is_format_arguments_item {
-                                let addition = format!("let binding = {};\n{}", s, " ".repeat(p));
+                                let addition = format!(
+                                    "let {}binding = {};\n{}",
+                                    mutability,
+                                    s,
+                                    " ".repeat(p)
+                                );
                                 err.multipart_suggestion_verbose(
                                     msg,
                                     vec![
diff --git a/compiler/rustc_borrowck/src/diagnostics/explain_borrow.rs b/compiler/rustc_borrowck/src/diagnostics/explain_borrow.rs
index a845431faca..095c0df98ac 100644
--- a/compiler/rustc_borrowck/src/diagnostics/explain_borrow.rs
+++ b/compiler/rustc_borrowck/src/diagnostics/explain_borrow.rs
@@ -342,6 +342,7 @@ impl<'tcx> BorrowExplanation<'tcx> {
                                 }
                             }
                         } else if let LocalInfo::BlockTailTemp(info) = local_decl.local_info() {
+                            let sp = info.span.find_oldest_ancestor_in_same_ctxt();
                             if info.tail_result_is_ignored {
                                 // #85581: If the first mutable borrow's scope contains
                                 // the second borrow, this suggestion isn't helpful.
@@ -349,7 +350,7 @@ impl<'tcx> BorrowExplanation<'tcx> {
                                     old.to(info.span.shrink_to_hi()).contains(new)
                                 }) {
                                     err.span_suggestion_verbose(
-                                        info.span.shrink_to_hi(),
+                                        sp.shrink_to_hi(),
                                         "consider adding semicolon after the expression so its \
                                         temporaries are dropped sooner, before the local variables \
                                         declared by the block are dropped",
@@ -368,8 +369,8 @@ impl<'tcx> BorrowExplanation<'tcx> {
                                      local variable `x` and then make `x` be the expression at the \
                                      end of the block",
                                     vec![
-                                        (info.span.shrink_to_lo(), "let x = ".to_string()),
-                                        (info.span.shrink_to_hi(), "; x".to_string()),
+                                        (sp.shrink_to_lo(), "let x = ".to_string()),
+                                        (sp.shrink_to_hi(), "; x".to_string()),
                                     ],
                                     Applicability::MaybeIncorrect,
                                 );
diff --git a/compiler/rustc_borrowck/src/lib.rs b/compiler/rustc_borrowck/src/lib.rs
index e6eae7d4f5a..4d85f109020 100644
--- a/compiler/rustc_borrowck/src/lib.rs
+++ b/compiler/rustc_borrowck/src/lib.rs
@@ -29,7 +29,7 @@ use rustc_errors::LintDiagnostic;
 use rustc_hir as hir;
 use rustc_hir::CRATE_HIR_ID;
 use rustc_hir::def_id::LocalDefId;
-use rustc_index::bit_set::{DenseBitSet, MixedBitSet};
+use rustc_index::bit_set::MixedBitSet;
 use rustc_index::{IndexSlice, IndexVec};
 use rustc_infer::infer::{
     InferCtxt, NllRegionVariableOrigin, RegionVariableOrigin, TyCtxtInferExt,
@@ -1151,11 +1151,11 @@ impl<'a, 'tcx> MirBorrowckCtxt<'a, '_, 'tcx> {
         &self,
         location: Location,
         state: &'s BorrowckDomain,
-    ) -> Cow<'s, DenseBitSet<BorrowIndex>> {
+    ) -> Cow<'s, MixedBitSet<BorrowIndex>> {
         if let Some(polonius) = &self.polonius_output {
             // Use polonius output if it has been enabled.
             let location = self.location_table.start_index(location);
-            let mut polonius_output = DenseBitSet::new_empty(self.borrow_set.len());
+            let mut polonius_output = MixedBitSet::new_empty(self.borrow_set.len());
             for &idx in polonius.errors_at(location) {
                 polonius_output.insert(idx);
             }
diff --git a/compiler/rustc_borrowck/src/type_check/mod.rs b/compiler/rustc_borrowck/src/type_check/mod.rs
index 4f75dd7e992..9b6dcfd17c6 100644
--- a/compiler/rustc_borrowck/src/type_check/mod.rs
+++ b/compiler/rustc_borrowck/src/type_check/mod.rs
@@ -373,8 +373,7 @@ impl<'a, 'tcx> TypeChecker<'a, 'tcx> {
     }
 
     fn unsized_feature_enabled(&self) -> bool {
-        let features = self.tcx().features();
-        features.unsized_locals() || features.unsized_fn_params()
+        self.tcx().features().unsized_fn_params()
     }
 
     /// Equate the inferred type and the annotated type for user type annotations
@@ -957,7 +956,7 @@ impl<'a, 'tcx> Visitor<'tcx> for TypeChecker<'a, 'tcx> {
             }
         }
 
-        // When `unsized_fn_params` or `unsized_locals` is enabled, only function calls
+        // When `unsized_fn_params` is enabled, only function calls
         // and nullary ops are checked in `check_call_dest`.
         if !self.unsized_feature_enabled() {
             match self.body.local_kind(local) {
@@ -1941,7 +1940,7 @@ impl<'a, 'tcx> TypeChecker<'a, 'tcx> {
                     );
                 }
 
-                // When `unsized_fn_params` and `unsized_locals` are both not enabled,
+                // When `unsized_fn_params` is not enabled,
                 // this check is done at `check_local`.
                 if self.unsized_feature_enabled() {
                     let span = term.source_info.span;
diff --git a/compiler/rustc_builtin_macros/src/cfg_eval.rs b/compiler/rustc_builtin_macros/src/cfg_eval.rs
index da01e3e9607..fe44350863c 100644
--- a/compiler/rustc_builtin_macros/src/cfg_eval.rs
+++ b/compiler/rustc_builtin_macros/src/cfg_eval.rs
@@ -155,7 +155,7 @@ impl CfgEval<'_> {
 
 impl MutVisitor for CfgEval<'_> {
     #[instrument(level = "trace", skip(self))]
-    fn visit_expr(&mut self, expr: &mut P<ast::Expr>) {
+    fn visit_expr(&mut self, expr: &mut ast::Expr) {
         self.0.configure_expr(expr, false);
         mut_visit::walk_expr(self, expr);
     }
diff --git a/compiler/rustc_builtin_macros/src/deriving/coerce_pointee.rs b/compiler/rustc_builtin_macros/src/deriving/coerce_pointee.rs
index 0794192621a..3a20b39798d 100644
--- a/compiler/rustc_builtin_macros/src/deriving/coerce_pointee.rs
+++ b/compiler/rustc_builtin_macros/src/deriving/coerce_pointee.rs
@@ -1,5 +1,4 @@
 use ast::HasAttrs;
-use ast::ptr::P;
 use rustc_ast::mut_visit::MutVisitor;
 use rustc_ast::visit::BoundKind;
 use rustc_ast::{
@@ -378,11 +377,11 @@ struct TypeSubstitution<'a> {
 }
 
 impl<'a> ast::mut_visit::MutVisitor for TypeSubstitution<'a> {
-    fn visit_ty(&mut self, ty: &mut P<ast::Ty>) {
+    fn visit_ty(&mut self, ty: &mut ast::Ty) {
         if let Some(name) = ty.kind.is_simple_path()
             && name == self.from_name
         {
-            **ty = self.to_ty.clone();
+            *ty = self.to_ty.clone();
             self.rewritten = true;
         } else {
             ast::mut_visit::walk_ty(self, ty);
diff --git a/compiler/rustc_builtin_macros/src/deriving/generic/mod.rs b/compiler/rustc_builtin_macros/src/deriving/generic/mod.rs
index 6dd3adf750d..d642851bb77 100644
--- a/compiler/rustc_builtin_macros/src/deriving/generic/mod.rs
+++ b/compiler/rustc_builtin_macros/src/deriving/generic/mod.rs
@@ -484,7 +484,7 @@ impl<'a> TraitDef<'a> {
         match item {
             Annotatable::Item(item) => {
                 let is_packed = matches!(
-                    AttributeParser::parse_limited(cx.sess, &item.attrs, sym::repr, item.span, true),
+                    AttributeParser::parse_limited(cx.sess, &item.attrs, sym::repr, item.span, item.id),
                     Some(Attribute::Parsed(AttributeKind::Repr(r))) if r.iter().any(|(x, _)| matches!(x, ReprPacked(..)))
                 );
 
diff --git a/compiler/rustc_builtin_macros/src/test.rs b/compiler/rustc_builtin_macros/src/test.rs
index b439fa34f5b..b067578794b 100644
--- a/compiler/rustc_builtin_macros/src/test.rs
+++ b/compiler/rustc_builtin_macros/src/test.rs
@@ -118,10 +118,7 @@ pub(crate) fn expand_test_or_bench(
 
     let (item, is_stmt) = match item {
         Annotatable::Item(i) => (i, false),
-        Annotatable::Stmt(stmt) if matches!(stmt.kind, ast::StmtKind::Item(_)) => {
-            // FIXME: Use an 'if let' guard once they are implemented
-            if let ast::StmtKind::Item(i) = stmt.kind { (i, true) } else { unreachable!() }
-        }
+        Annotatable::Stmt(box ast::Stmt { kind: ast::StmtKind::Item(i), .. }) => (i, true),
         other => {
             not_testable_error(cx, attr_sp, None);
             return vec![other];
diff --git a/compiler/rustc_codegen_cranelift/example/arbitrary_self_types_pointers_and_wrappers.rs b/compiler/rustc_codegen_cranelift/example/arbitrary_self_types_pointers_and_wrappers.rs
index 5479b0c617b..f0d1f6e2215 100644
--- a/compiler/rustc_codegen_cranelift/example/arbitrary_self_types_pointers_and_wrappers.rs
+++ b/compiler/rustc_codegen_cranelift/example/arbitrary_self_types_pointers_and_wrappers.rs
@@ -32,10 +32,6 @@ impl<T: CoerceUnsized<U>, U> CoerceUnsized<Wrapper<U>> for Wrapper<T> {}
 impl<T: DispatchFromDyn<U>, U> DispatchFromDyn<Wrapper<U>> for Wrapper<T> {}
 
 trait Trait {
-    // This method isn't object-safe yet. Unsized by-value `self` is object-safe (but not callable
-    // without unsized_locals), but wrappers around `Self` currently are not.
-    // FIXME (mikeyhew) uncomment this when unsized rvalues object-safety is implemented
-    // fn wrapper(self: Wrapper<Self>) -> i32;
     fn ptr_wrapper(self: Ptr<Wrapper<Self>>) -> i32;
     fn wrapper_ptr(self: Wrapper<Ptr<Self>>) -> i32;
     fn wrapper_ptr_wrapper(self: Wrapper<Ptr<Wrapper<Self>>>) -> i32;
diff --git a/compiler/rustc_codegen_cranelift/example/mini_core.rs b/compiler/rustc_codegen_cranelift/example/mini_core.rs
index 1dc799c0aee..524ebde1c74 100644
--- a/compiler/rustc_codegen_cranelift/example/mini_core.rs
+++ b/compiler/rustc_codegen_cranelift/example/mini_core.rs
@@ -14,8 +14,14 @@
 #![no_core]
 #![allow(dead_code, internal_features, ambiguous_wide_pointer_comparisons)]
 
+#[lang = "pointee_sized"]
+pub trait PointeeSized {}
+
+#[lang = "meta_sized"]
+pub trait MetaSized: PointeeSized {}
+
 #[lang = "sized"]
-pub trait Sized {}
+pub trait Sized: MetaSized {}
 
 #[lang = "destruct"]
 pub trait Destruct {}
@@ -24,35 +30,35 @@ pub trait Destruct {}
 pub trait Tuple {}
 
 #[lang = "unsize"]
-pub trait Unsize<T: ?Sized> {}
+pub trait Unsize<T: PointeeSized>: PointeeSized {}
 
 #[lang = "coerce_unsized"]
 pub trait CoerceUnsized<T> {}
 
-impl<'a, 'b: 'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a U> for &'b T {}
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a mut U> for &'a mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*const U> for *const T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*mut U> for *mut T {}
+impl<'a, 'b: 'a, T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<&'a U> for &'b T {}
+impl<'a, T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<&'a mut U> for &'a mut T {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<*const U> for *const T {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<*mut U> for *mut T {}
 
 #[lang = "dispatch_from_dyn"]
 pub trait DispatchFromDyn<T> {}
 
 // &T -> &U
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<&'a U> for &'a T {}
+impl<'a, T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<&'a U> for &'a T {}
 // &mut T -> &mut U
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<&'a mut U> for &'a mut T {}
+impl<'a, T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<&'a mut U> for &'a mut T {}
 // *const T -> *const U
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<*const U> for *const T {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<*const U> for *const T {}
 // *mut T -> *mut U
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<*mut U> for *mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<Box<U>> for Box<T> {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<*mut U> for *mut T {}
+impl<T: MetaSized + Unsize<U>, U: MetaSized> DispatchFromDyn<Box<U>> for Box<T> {}
 
 #[lang = "legacy_receiver"]
 pub trait LegacyReceiver {}
 
-impl<T: ?Sized> LegacyReceiver for &T {}
-impl<T: ?Sized> LegacyReceiver for &mut T {}
-impl<T: ?Sized> LegacyReceiver for Box<T> {}
+impl<T: PointeeSized> LegacyReceiver for &T {}
+impl<T: PointeeSized> LegacyReceiver for &mut T {}
+impl<T: MetaSized> LegacyReceiver for Box<T> {}
 
 #[lang = "copy"]
 pub trait Copy {}
@@ -74,9 +80,9 @@ impl Copy for isize {}
 impl Copy for f32 {}
 impl Copy for f64 {}
 impl Copy for char {}
-impl<'a, T: ?Sized> Copy for &'a T {}
-impl<T: ?Sized> Copy for *const T {}
-impl<T: ?Sized> Copy for *mut T {}
+impl<'a, T: PointeeSized> Copy for &'a T {}
+impl<T: PointeeSized> Copy for *const T {}
+impl<T: PointeeSized> Copy for *mut T {}
 impl<T: Copy> Copy for Option<T> {}
 
 #[lang = "sync"]
@@ -94,17 +100,17 @@ unsafe impl Sync for i32 {}
 unsafe impl Sync for isize {}
 unsafe impl Sync for char {}
 unsafe impl Sync for f32 {}
-unsafe impl<'a, T: ?Sized> Sync for &'a T {}
+unsafe impl<'a, T: PointeeSized> Sync for &'a T {}
 unsafe impl<T: Sync, const N: usize> Sync for [T; N] {}
 
 #[lang = "freeze"]
 unsafe auto trait Freeze {}
 
-unsafe impl<T: ?Sized> Freeze for PhantomData<T> {}
-unsafe impl<T: ?Sized> Freeze for *const T {}
-unsafe impl<T: ?Sized> Freeze for *mut T {}
-unsafe impl<T: ?Sized> Freeze for &T {}
-unsafe impl<T: ?Sized> Freeze for &mut T {}
+unsafe impl<T: PointeeSized> Freeze for PhantomData<T> {}
+unsafe impl<T: PointeeSized> Freeze for *const T {}
+unsafe impl<T: PointeeSized> Freeze for *mut T {}
+unsafe impl<T: PointeeSized> Freeze for &T {}
+unsafe impl<T: PointeeSized> Freeze for &mut T {}
 
 #[lang = "structural_peq"]
 pub trait StructuralPartialEq {}
@@ -443,7 +449,7 @@ pub enum Option<T> {
 pub use Option::*;
 
 #[lang = "phantom_data"]
-pub struct PhantomData<T: ?Sized>;
+pub struct PhantomData<T: PointeeSized>;
 
 #[lang = "fn_once"]
 #[rustc_paren_sugar]
@@ -564,18 +570,18 @@ pub trait Deref {
 #[repr(transparent)]
 #[rustc_layout_scalar_valid_range_start(1)]
 #[rustc_nonnull_optimization_guaranteed]
-pub struct NonNull<T: ?Sized>(pub *const T);
+pub struct NonNull<T: PointeeSized>(pub *const T);
 
-impl<T: ?Sized, U: ?Sized> CoerceUnsized<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
-impl<T: ?Sized, U: ?Sized> DispatchFromDyn<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> CoerceUnsized<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> DispatchFromDyn<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
 
-pub struct Unique<T: ?Sized> {
+pub struct Unique<T: PointeeSized> {
     pub pointer: NonNull<T>,
     pub _marker: PhantomData<T>,
 }
 
-impl<T: ?Sized, U: ?Sized> CoerceUnsized<Unique<U>> for Unique<T> where T: Unsize<U> {}
-impl<T: ?Sized, U: ?Sized> DispatchFromDyn<Unique<U>> for Unique<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> CoerceUnsized<Unique<U>> for Unique<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> DispatchFromDyn<Unique<U>> for Unique<T> where T: Unsize<U> {}
 
 #[lang = "global_alloc_ty"]
 pub struct Global;
@@ -644,9 +650,9 @@ pub mod intrinsics {
     #[rustc_intrinsic]
     pub unsafe fn size_of_val<T: ?::Sized>(val: *const T) -> usize;
     #[rustc_intrinsic]
-    pub fn min_align_of<T>() -> usize;
+    pub fn align_of<T>() -> usize;
     #[rustc_intrinsic]
-    pub unsafe fn min_align_of_val<T: ?::Sized>(val: *const T) -> usize;
+    pub unsafe fn align_of_val<T: ?::Sized>(val: *const T) -> usize;
     #[rustc_intrinsic]
     pub unsafe fn copy<T>(src: *const T, dst: *mut T, count: usize);
     #[rustc_intrinsic]
diff --git a/compiler/rustc_codegen_cranelift/example/mini_core_hello_world.rs b/compiler/rustc_codegen_cranelift/example/mini_core_hello_world.rs
index 93ca2e0e421..1499f948deb 100644
--- a/compiler/rustc_codegen_cranelift/example/mini_core_hello_world.rs
+++ b/compiler/rustc_codegen_cranelift/example/mini_core_hello_world.rs
@@ -204,11 +204,8 @@ fn main() {
         assert_eq!(intrinsics::size_of_val(a) as u8, 16);
         assert_eq!(intrinsics::size_of_val(&0u32) as u8, 4);
 
-        assert_eq!(intrinsics::min_align_of::<u16>() as u8, 2);
-        assert_eq!(
-            intrinsics::min_align_of_val(&a) as u8,
-            intrinsics::min_align_of::<&str>() as u8
-        );
+        assert_eq!(intrinsics::align_of::<u16>() as u8, 2);
+        assert_eq!(intrinsics::align_of_val(&a) as u8, intrinsics::align_of::<&str>() as u8);
 
         assert!(!intrinsics::needs_drop::<u8>());
         assert!(!intrinsics::needs_drop::<[u8]>());
diff --git a/compiler/rustc_codegen_cranelift/src/abi/mod.rs b/compiler/rustc_codegen_cranelift/src/abi/mod.rs
index fe5b220117f..4c6fd907815 100644
--- a/compiler/rustc_codegen_cranelift/src/abi/mod.rs
+++ b/compiler/rustc_codegen_cranelift/src/abi/mod.rs
@@ -51,6 +51,11 @@ pub(crate) fn conv_to_call_conv(
         CanonAbi::Rust | CanonAbi::C => default_call_conv,
         CanonAbi::RustCold => CallConv::Cold,
 
+        // Functions with this calling convention can only be called from assembly, but it is
+        // possible to declare an `extern "custom"` block, so the backend still needs a calling
+        // convention for declaring foreign functions.
+        CanonAbi::Custom => default_call_conv,
+
         CanonAbi::X86(x86_call) => match x86_call {
             X86Call::SysV64 => CallConv::SystemV,
             X86Call::Win64 => CallConv::WindowsFastcall,
diff --git a/compiler/rustc_codegen_cranelift/src/abi/pass_mode.rs b/compiler/rustc_codegen_cranelift/src/abi/pass_mode.rs
index 6d8614aca69..cd0afee0cfb 100644
--- a/compiler/rustc_codegen_cranelift/src/abi/pass_mode.rs
+++ b/compiler/rustc_codegen_cranelift/src/abi/pass_mode.rs
@@ -1,6 +1,6 @@
 //! Argument passing
 
-use cranelift_codegen::ir::{ArgumentExtension, ArgumentPurpose};
+use cranelift_codegen::ir::ArgumentPurpose;
 use rustc_abi::{Reg, RegKind};
 use rustc_target::callconv::{
     ArgAbi, ArgAttributes, ArgExtension as RustcArgExtension, CastTarget, PassMode,
@@ -32,16 +32,26 @@ fn reg_to_abi_param(reg: Reg) -> AbiParam {
     AbiParam::new(clif_ty)
 }
 
-fn apply_arg_attrs_to_abi_param(mut param: AbiParam, arg_attrs: ArgAttributes) -> AbiParam {
+fn apply_attrs_to_abi_param(param: AbiParam, arg_attrs: ArgAttributes) -> AbiParam {
     match arg_attrs.arg_ext {
-        RustcArgExtension::None => {}
-        RustcArgExtension::Zext => param.extension = ArgumentExtension::Uext,
-        RustcArgExtension::Sext => param.extension = ArgumentExtension::Sext,
+        RustcArgExtension::None => param,
+        RustcArgExtension::Zext => param.uext(),
+        RustcArgExtension::Sext => param.sext(),
     }
-    param
 }
 
-fn cast_target_to_abi_params(cast: &CastTarget) -> SmallVec<[AbiParam; 2]> {
+fn cast_target_to_abi_params(cast: &CastTarget) -> SmallVec<[(Size, AbiParam); 2]> {
+    if let Some(offset_from_start) = cast.rest_offset {
+        assert!(cast.prefix[1..].iter().all(|p| p.is_none()));
+        assert_eq!(cast.rest.unit.size, cast.rest.total);
+        let first = cast.prefix[0].unwrap();
+        let second = cast.rest.unit;
+        return smallvec![
+            (Size::ZERO, reg_to_abi_param(first)),
+            (offset_from_start, reg_to_abi_param(second))
+        ];
+    }
+
     let (rest_count, rem_bytes) = if cast.rest.unit.size.bytes() == 0 {
         (0, 0)
     } else {
@@ -56,25 +66,32 @@ fn cast_target_to_abi_params(cast: &CastTarget) -> SmallVec<[AbiParam; 2]> {
     // different types in Cranelift IR. Instead a single array of primitive types is used.
 
     // Create list of fields in the main structure
-    let mut args = cast
+    let args = cast
         .prefix
         .iter()
         .flatten()
         .map(|&reg| reg_to_abi_param(reg))
-        .chain((0..rest_count).map(|_| reg_to_abi_param(cast.rest.unit)))
-        .collect::<SmallVec<_>>();
+        .chain((0..rest_count).map(|_| reg_to_abi_param(cast.rest.unit)));
+
+    let mut res = SmallVec::new();
+    let mut offset = Size::ZERO;
+
+    for arg in args {
+        res.push((offset, arg));
+        offset += Size::from_bytes(arg.value_type.bytes());
+    }
 
     // Append final integer
     if rem_bytes != 0 {
         // Only integers can be really split further.
         assert_eq!(cast.rest.unit.kind, RegKind::Integer);
-        args.push(reg_to_abi_param(Reg {
-            kind: RegKind::Integer,
-            size: Size::from_bytes(rem_bytes),
-        }));
+        res.push((
+            offset,
+            reg_to_abi_param(Reg { kind: RegKind::Integer, size: Size::from_bytes(rem_bytes) }),
+        ));
     }
 
-    args
+    res
 }
 
 impl<'tcx> ArgAbiExt<'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
@@ -82,7 +99,7 @@ impl<'tcx> ArgAbiExt<'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
         match self.mode {
             PassMode::Ignore => smallvec![],
             PassMode::Direct(attrs) => match self.layout.backend_repr {
-                BackendRepr::Scalar(scalar) => smallvec![apply_arg_attrs_to_abi_param(
+                BackendRepr::Scalar(scalar) => smallvec![apply_attrs_to_abi_param(
                     AbiParam::new(scalar_to_clif_type(tcx, scalar)),
                     attrs
                 )],
@@ -97,34 +114,34 @@ impl<'tcx> ArgAbiExt<'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
                     let a = scalar_to_clif_type(tcx, a);
                     let b = scalar_to_clif_type(tcx, b);
                     smallvec![
-                        apply_arg_attrs_to_abi_param(AbiParam::new(a), attrs_a),
-                        apply_arg_attrs_to_abi_param(AbiParam::new(b), attrs_b),
+                        apply_attrs_to_abi_param(AbiParam::new(a), attrs_a),
+                        apply_attrs_to_abi_param(AbiParam::new(b), attrs_b),
                     ]
                 }
                 _ => unreachable!("{:?}", self.layout.backend_repr),
             },
             PassMode::Cast { ref cast, pad_i32 } => {
                 assert!(!pad_i32, "padding support not yet implemented");
-                cast_target_to_abi_params(cast)
+                cast_target_to_abi_params(cast).into_iter().map(|(_, param)| param).collect()
             }
             PassMode::Indirect { attrs, meta_attrs: None, on_stack } => {
                 if on_stack {
                     // Abi requires aligning struct size to pointer size
                     let size = self.layout.size.align_to(tcx.data_layout.pointer_align.abi);
                     let size = u32::try_from(size.bytes()).unwrap();
-                    smallvec![apply_arg_attrs_to_abi_param(
+                    smallvec![apply_attrs_to_abi_param(
                         AbiParam::special(pointer_ty(tcx), ArgumentPurpose::StructArgument(size),),
                         attrs
                     )]
                 } else {
-                    smallvec![apply_arg_attrs_to_abi_param(AbiParam::new(pointer_ty(tcx)), attrs)]
+                    smallvec![apply_attrs_to_abi_param(AbiParam::new(pointer_ty(tcx)), attrs)]
                 }
             }
             PassMode::Indirect { attrs, meta_attrs: Some(meta_attrs), on_stack } => {
                 assert!(!on_stack);
                 smallvec![
-                    apply_arg_attrs_to_abi_param(AbiParam::new(pointer_ty(tcx)), attrs),
-                    apply_arg_attrs_to_abi_param(AbiParam::new(pointer_ty(tcx)), meta_attrs),
+                    apply_attrs_to_abi_param(AbiParam::new(pointer_ty(tcx)), attrs),
+                    apply_attrs_to_abi_param(AbiParam::new(pointer_ty(tcx)), meta_attrs),
                 ]
             }
         }
@@ -133,30 +150,47 @@ impl<'tcx> ArgAbiExt<'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
     fn get_abi_return(&self, tcx: TyCtxt<'tcx>) -> (Option<AbiParam>, Vec<AbiParam>) {
         match self.mode {
             PassMode::Ignore => (None, vec![]),
-            PassMode::Direct(_) => match self.layout.backend_repr {
-                BackendRepr::Scalar(scalar) => {
-                    (None, vec![AbiParam::new(scalar_to_clif_type(tcx, scalar))])
-                }
+            PassMode::Direct(attrs) => match self.layout.backend_repr {
+                BackendRepr::Scalar(scalar) => (
+                    None,
+                    vec![apply_attrs_to_abi_param(
+                        AbiParam::new(scalar_to_clif_type(tcx, scalar)),
+                        attrs,
+                    )],
+                ),
                 BackendRepr::SimdVector { .. } => {
                     let vector_ty = crate::intrinsics::clif_vector_type(tcx, self.layout);
-                    (None, vec![AbiParam::new(vector_ty)])
+                    (None, vec![apply_attrs_to_abi_param(AbiParam::new(vector_ty), attrs)])
                 }
                 _ => unreachable!("{:?}", self.layout.backend_repr),
             },
-            PassMode::Pair(_, _) => match self.layout.backend_repr {
+            PassMode::Pair(attrs_a, attrs_b) => match self.layout.backend_repr {
                 BackendRepr::ScalarPair(a, b) => {
                     let a = scalar_to_clif_type(tcx, a);
                     let b = scalar_to_clif_type(tcx, b);
-                    (None, vec![AbiParam::new(a), AbiParam::new(b)])
+                    (
+                        None,
+                        vec![
+                            apply_attrs_to_abi_param(AbiParam::new(a), attrs_a),
+                            apply_attrs_to_abi_param(AbiParam::new(b), attrs_b),
+                        ],
+                    )
                 }
                 _ => unreachable!("{:?}", self.layout.backend_repr),
             },
-            PassMode::Cast { ref cast, .. } => {
-                (None, cast_target_to_abi_params(cast).into_iter().collect())
-            }
-            PassMode::Indirect { attrs: _, meta_attrs: None, on_stack } => {
+            PassMode::Cast { ref cast, .. } => (
+                None,
+                cast_target_to_abi_params(cast).into_iter().map(|(_, param)| param).collect(),
+            ),
+            PassMode::Indirect { attrs, meta_attrs: None, on_stack } => {
                 assert!(!on_stack);
-                (Some(AbiParam::special(pointer_ty(tcx), ArgumentPurpose::StructReturn)), vec![])
+                (
+                    Some(apply_attrs_to_abi_param(
+                        AbiParam::special(pointer_ty(tcx), ArgumentPurpose::StructReturn),
+                        attrs,
+                    )),
+                    vec![],
+                )
             }
             PassMode::Indirect { attrs: _, meta_attrs: Some(_), on_stack: _ } => {
                 unreachable!("unsized return value")
@@ -172,12 +206,14 @@ pub(super) fn to_casted_value<'tcx>(
 ) -> SmallVec<[Value; 2]> {
     let (ptr, meta) = arg.force_stack(fx);
     assert!(meta.is_none());
-    let mut offset = 0;
     cast_target_to_abi_params(cast)
         .into_iter()
-        .map(|param| {
-            let val = ptr.offset_i64(fx, offset).load(fx, param.value_type, MemFlags::new());
-            offset += i64::from(param.value_type.bytes());
+        .map(|(offset, param)| {
+            let val = ptr.offset_i64(fx, offset.bytes() as i64).load(
+                fx,
+                param.value_type,
+                MemFlags::new(),
+            );
             val
         })
         .collect()
@@ -190,7 +226,7 @@ pub(super) fn from_casted_value<'tcx>(
     cast: &CastTarget,
 ) -> CValue<'tcx> {
     let abi_params = cast_target_to_abi_params(cast);
-    let abi_param_size: u32 = abi_params.iter().map(|param| param.value_type.bytes()).sum();
+    let abi_param_size: u32 = abi_params.iter().map(|(_, param)| param.value_type.bytes()).sum();
     let layout_size = u32::try_from(layout.size.bytes()).unwrap();
     let ptr = fx.create_stack_slot(
         // Stack slot size may be bigger for example `[u8; 3]` which is packed into an `i32`.
@@ -199,16 +235,13 @@ pub(super) fn from_casted_value<'tcx>(
         std::cmp::max(abi_param_size, layout_size),
         u32::try_from(layout.align.abi.bytes()).unwrap(),
     );
-    let mut offset = 0;
     let mut block_params_iter = block_params.iter().copied();
-    for param in abi_params {
-        let val = ptr.offset_i64(fx, offset).store(
+    for (offset, _) in abi_params {
+        ptr.offset_i64(fx, offset.bytes() as i64).store(
             fx,
             block_params_iter.next().unwrap(),
             MemFlags::new(),
-        );
-        offset += i64::from(param.value_type.bytes());
-        val
+        )
     }
     assert_eq!(block_params_iter.next(), None, "Leftover block param");
     CValue::by_ref(ptr, layout)
diff --git a/compiler/rustc_codegen_cranelift/src/allocator.rs b/compiler/rustc_codegen_cranelift/src/allocator.rs
index 9cff8a84db3..ffb932a3c38 100644
--- a/compiler/rustc_codegen_cranelift/src/allocator.rs
+++ b/compiler/rustc_codegen_cranelift/src/allocator.rs
@@ -1,6 +1,7 @@
 //! Allocator shim
 // Adapted from rustc
 
+use cranelift_frontend::{FunctionBuilder, FunctionBuilderContext};
 use rustc_ast::expand::allocator::{
     ALLOCATOR_METHODS, AllocatorKind, AllocatorTy, NO_ALLOC_SHIM_IS_UNSTABLE,
     alloc_error_handler_name, default_fn_name, global_fn_name,
@@ -97,16 +98,31 @@ fn codegen_inner(
     data.define(Box::new([val]));
     module.define_data(data_id, &data).unwrap();
 
-    let data_id = module
-        .declare_data(
-            &mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE),
-            Linkage::Export,
-            false,
-            false,
-        )
-        .unwrap();
-    let mut data = DataDescription::new();
-    data.set_align(1);
-    data.define(Box::new([0]));
-    module.define_data(data_id, &data).unwrap();
+    {
+        let sig = Signature {
+            call_conv: module.target_config().default_call_conv,
+            params: vec![],
+            returns: vec![],
+        };
+        let func_id = module
+            .declare_function(
+                &mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE),
+                Linkage::Export,
+                &sig,
+            )
+            .unwrap();
+
+        let mut ctx = Context::new();
+        ctx.func.signature = sig;
+        let mut func_ctx = FunctionBuilderContext::new();
+        let mut bcx = FunctionBuilder::new(&mut ctx.func, &mut func_ctx);
+
+        let block = bcx.create_block();
+        bcx.switch_to_block(block);
+        bcx.ins().return_(&[]);
+        bcx.seal_all_blocks();
+        bcx.finalize();
+
+        module.define_function(func_id, &mut ctx).unwrap();
+    }
 }
diff --git a/compiler/rustc_codegen_cranelift/src/driver/aot.rs b/compiler/rustc_codegen_cranelift/src/driver/aot.rs
index 5d07c94859f..442151fe32d 100644
--- a/compiler/rustc_codegen_cranelift/src/driver/aot.rs
+++ b/compiler/rustc_codegen_cranelift/src/driver/aot.rs
@@ -11,7 +11,6 @@ use std::thread::JoinHandle;
 use cranelift_object::{ObjectBuilder, ObjectModule};
 use rustc_codegen_ssa::assert_module_sources::CguReuse;
 use rustc_codegen_ssa::back::link::ensure_removed;
-use rustc_codegen_ssa::back::metadata::create_compressed_metadata_file;
 use rustc_codegen_ssa::base::determine_cgu_reuse;
 use rustc_codegen_ssa::{
     CodegenResults, CompiledModule, CrateInfo, ModuleKind, errors as ssa_errors,
@@ -19,7 +18,6 @@ use rustc_codegen_ssa::{
 use rustc_data_structures::profiling::SelfProfilerRef;
 use rustc_data_structures::stable_hasher::{HashStable, StableHasher};
 use rustc_data_structures::sync::{IntoDynSyncSend, par_map};
-use rustc_metadata::EncodedMetadata;
 use rustc_metadata::fs::copy_to_stdout;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
@@ -61,8 +59,6 @@ impl<HCX> HashStable<HCX> for OngoingModuleCodegen {
 pub(crate) struct OngoingCodegen {
     modules: Vec<OngoingModuleCodegen>,
     allocator_module: Option<CompiledModule>,
-    metadata_module: Option<CompiledModule>,
-    metadata: EncodedMetadata,
     crate_info: CrateInfo,
     concurrency_limiter: ConcurrencyLimiter,
 }
@@ -134,8 +130,6 @@ impl OngoingCodegen {
         let codegen_results = CodegenResults {
             modules,
             allocator_module: self.allocator_module,
-            metadata_module: self.metadata_module,
-            metadata: self.metadata,
             crate_info: self.crate_info,
         };
 
@@ -646,42 +640,6 @@ fn module_codegen(
     }))
 }
 
-fn emit_metadata_module(tcx: TyCtxt<'_>, metadata: &EncodedMetadata) -> CompiledModule {
-    use rustc_middle::mir::mono::CodegenUnitNameBuilder;
-
-    let _timer = tcx.sess.timer("write compressed metadata");
-
-    let cgu_name_builder = &mut CodegenUnitNameBuilder::new(tcx);
-    let metadata_cgu_name = cgu_name_builder
-        .build_cgu_name(LOCAL_CRATE, ["crate"], Some("metadata"))
-        .as_str()
-        .to_string();
-
-    let tmp_file = tcx.output_filenames(()).temp_path_for_cgu(
-        OutputType::Metadata,
-        &metadata_cgu_name,
-        tcx.sess.invocation_temp.as_deref(),
-    );
-
-    let symbol_name = rustc_middle::middle::exported_symbols::metadata_symbol_name(tcx);
-    let obj = create_compressed_metadata_file(tcx.sess, metadata, &symbol_name);
-
-    if let Err(err) = std::fs::write(&tmp_file, obj) {
-        tcx.dcx().fatal(format!("error writing metadata object file: {}", err));
-    }
-
-    CompiledModule {
-        name: metadata_cgu_name,
-        kind: ModuleKind::Metadata,
-        object: Some(tmp_file),
-        dwarf_object: None,
-        bytecode: None,
-        assembly: None,
-        llvm_ir: None,
-        links_from_incr_cache: Vec::new(),
-    }
-}
-
 fn emit_allocator_module(tcx: TyCtxt<'_>) -> Option<CompiledModule> {
     let mut allocator_module = make_module(tcx.sess, "allocator_shim".to_string());
     let created_alloc_shim = crate::allocator::codegen(tcx, &mut allocator_module);
@@ -706,11 +664,7 @@ fn emit_allocator_module(tcx: TyCtxt<'_>) -> Option<CompiledModule> {
     }
 }
 
-pub(crate) fn run_aot(
-    tcx: TyCtxt<'_>,
-    metadata: EncodedMetadata,
-    need_metadata_module: bool,
-) -> Box<OngoingCodegen> {
+pub(crate) fn run_aot(tcx: TyCtxt<'_>) -> Box<OngoingCodegen> {
     // FIXME handle `-Ctarget-cpu=native`
     let target_cpu = match tcx.sess.opts.cg.target_cpu {
         Some(ref name) => name,
@@ -726,8 +680,6 @@ pub(crate) fn run_aot(
         return Box::new(OngoingCodegen {
             modules: vec![],
             allocator_module: None,
-            metadata_module: None,
-            metadata,
             crate_info: CrateInfo::new(tcx, target_cpu),
             concurrency_limiter: ConcurrencyLimiter::new(0),
         });
@@ -787,14 +739,9 @@ pub(crate) fn run_aot(
 
     let allocator_module = emit_allocator_module(tcx);
 
-    let metadata_module =
-        if need_metadata_module { Some(emit_metadata_module(tcx, &metadata)) } else { None };
-
     Box::new(OngoingCodegen {
         modules,
         allocator_module,
-        metadata_module,
-        metadata,
         crate_info: CrateInfo::new(tcx, target_cpu),
         concurrency_limiter: concurrency_limiter.0,
     })
diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs
index 1d1cf884e48..df5748c34d1 100644
--- a/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs
+++ b/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs
@@ -586,7 +586,7 @@ fn codegen_regular_intrinsic_call<'tcx>(
             let (size, _align) = crate::unsize::size_and_align_of(fx, layout, meta);
             ret.write_cvalue(fx, CValue::by_val(size, usize_layout));
         }
-        sym::min_align_of_val => {
+        sym::align_of_val => {
             intrinsic_args!(fx, args => (ptr); intrinsic);
 
             let layout = fx.layout_of(generic_args.type_at(0));
@@ -613,7 +613,7 @@ fn codegen_regular_intrinsic_call<'tcx>(
             intrinsic_args!(fx, args => (vtable); intrinsic);
             let vtable = vtable.load_scalar(fx);
 
-            let align = crate::vtable::min_align_of_obj(fx, vtable);
+            let align = crate::vtable::align_of_obj(fx, vtable);
             ret.write_cvalue(fx, CValue::by_val(align, usize_layout));
         }
 
diff --git a/compiler/rustc_codegen_cranelift/src/lib.rs b/compiler/rustc_codegen_cranelift/src/lib.rs
index 8ef623cde00..07ea29f3024 100644
--- a/compiler/rustc_codegen_cranelift/src/lib.rs
+++ b/compiler/rustc_codegen_cranelift/src/lib.rs
@@ -46,7 +46,6 @@ use cranelift_codegen::isa::TargetIsa;
 use cranelift_codegen::settings::{self, Configurable};
 use rustc_codegen_ssa::traits::CodegenBackend;
 use rustc_codegen_ssa::{CodegenResults, TargetConfig};
-use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_session::Session;
 use rustc_session::config::OutputFilenames;
@@ -238,12 +237,7 @@ impl CodegenBackend for CraneliftCodegenBackend {
         println!("Cranelift version: {}", cranelift_codegen::VERSION);
     }
 
-    fn codegen_crate(
-        &self,
-        tcx: TyCtxt<'_>,
-        metadata: EncodedMetadata,
-        need_metadata_module: bool,
-    ) -> Box<dyn Any> {
+    fn codegen_crate(&self, tcx: TyCtxt<'_>) -> Box<dyn Any> {
         info!("codegen crate {}", tcx.crate_name(LOCAL_CRATE));
         let config = self.config.clone().unwrap_or_else(|| {
             BackendConfig::from_opts(&tcx.sess.opts.cg.llvm_args)
@@ -256,7 +250,7 @@ impl CodegenBackend for CraneliftCodegenBackend {
             #[cfg(not(feature = "jit"))]
             tcx.dcx().fatal("jit support was disabled when compiling rustc_codegen_cranelift");
         } else {
-            driver::aot::run_aot(tcx, metadata, need_metadata_module)
+            driver::aot::run_aot(tcx)
         }
     }
 
diff --git a/compiler/rustc_codegen_cranelift/src/unsize.rs b/compiler/rustc_codegen_cranelift/src/unsize.rs
index 662546e4999..df60b05c463 100644
--- a/compiler/rustc_codegen_cranelift/src/unsize.rs
+++ b/compiler/rustc_codegen_cranelift/src/unsize.rs
@@ -212,7 +212,7 @@ pub(crate) fn size_and_align_of<'tcx>(
             // load size/align from vtable
             (
                 crate::vtable::size_of_obj(fx, info.unwrap()),
-                crate::vtable::min_align_of_obj(fx, info.unwrap()),
+                crate::vtable::align_of_obj(fx, info.unwrap()),
             )
         }
         ty::Slice(_) | ty::Str => {
diff --git a/compiler/rustc_codegen_cranelift/src/vtable.rs b/compiler/rustc_codegen_cranelift/src/vtable.rs
index 05a8e3c3342..1fae56949bc 100644
--- a/compiler/rustc_codegen_cranelift/src/vtable.rs
+++ b/compiler/rustc_codegen_cranelift/src/vtable.rs
@@ -31,7 +31,7 @@ pub(crate) fn size_of_obj(fx: &mut FunctionCx<'_, '_, '_>, vtable: Value) -> Val
     )
 }
 
-pub(crate) fn min_align_of_obj(fx: &mut FunctionCx<'_, '_, '_>, vtable: Value) -> Value {
+pub(crate) fn align_of_obj(fx: &mut FunctionCx<'_, '_, '_>, vtable: Value) -> Value {
     let usize_size = fx.layout_of(fx.tcx.types.usize).size.bytes() as usize;
     fx.bcx.ins().load(
         fx.pointer_type,
diff --git a/compiler/rustc_codegen_gcc/.cspell.json b/compiler/rustc_codegen_gcc/.cspell.json
new file mode 100644
index 00000000000..388ccce2b09
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/.cspell.json
@@ -0,0 +1,27 @@
+{
+    "allowCompoundWords": true,
+    "dictionaries": ["cpp", "rust-extra", "rustc_codegen_gcc"],
+    "dictionaryDefinitions": [
+        {
+            "name": "rust-extra",
+            "path": "tools/cspell_dicts/rust.txt",
+            "addWords": true
+        },
+        {
+            "name": "rustc_codegen_gcc",
+            "path": "tools/cspell_dicts/rustc_codegen_gcc.txt",
+            "addWords": true
+        }
+    ],
+    "files": [
+        "src/**/*.rs"
+    ],
+    "ignorePaths": [
+        "src/intrinsic/archs.rs",
+        "src/intrinsic/llvm.rs"
+    ],
+    "ignoreRegExpList": [
+        "/(FIXME|NOTE|TODO)\\([^)]+\\)/",
+        "__builtin_\\w*"
+    ]
+}
diff --git a/compiler/rustc_codegen_gcc/.github/workflows/ci.yml b/compiler/rustc_codegen_gcc/.github/workflows/ci.yml
index ef024258ffc..5c8e7d62816 100644
--- a/compiler/rustc_codegen_gcc/.github/workflows/ci.yml
+++ b/compiler/rustc_codegen_gcc/.github/workflows/ci.yml
@@ -12,6 +12,8 @@ permissions:
 env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
+  # For the run-make tests.
+  LLVM_BIN_DIR: /usr/bin
 
 jobs:
   build:
@@ -48,7 +50,7 @@ jobs:
 
     - name: Install packages
       # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for asm tests.
-      run: sudo apt-get install ninja-build ripgrep llvm-14-tools
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm
 
     - name: Install rustfmt & clippy
       run: rustup component add rustfmt clippy
@@ -61,11 +63,15 @@ jobs:
           sudo dpkg --force-overwrite -i ${{ matrix.libgccjit_version.gcc }}
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
+    # Some run-make tests fail if we use our forked GCC because it doesn't
+    # bundle libstdc++, so we switch to gcc-14 to have a GCC that has
+    # libstdc++.
+    - name: Set default GCC to gcc-14
+      run: sudo update-alternatives --install /usr/bin/cc cc /usr/bin/gcc-14 30
+
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
@@ -76,12 +82,22 @@ jobs:
         #path: rust
         #key: ${{ runner.os }}-packages-${{ hashFiles('rust/.git/HEAD') }}
 
+    - name: Prepare
+      run: ./y.sh prepare --only-libcore
+
+    - name: Check formatting
+      run: ./y.sh fmt --check
+
+    - name: clippy
+      run: |
+        cargo clippy --all-targets -- -D warnings
+        cargo clippy --all-targets --no-default-features -- -D warnings
+        cargo clippy --manifest-path build_system/Cargo.toml --all-targets -- -D warnings
+
     - name: Build
       run: |
-        ./y.sh prepare --only-libcore
         ./y.sh build --sysroot
-        ./y.sh test --mini-tests
-        cargo test
+        ./y.sh test --cargo-tests
 
     - name: Run y.sh cargo build
       run: |
@@ -101,20 +117,19 @@ jobs:
       run: |
         ./y.sh test --release --clean --build-sysroot ${{ matrix.commands }}
 
-    - name: Check formatting
-      run: ./y.sh fmt --check
-
-    - name: clippy
-      run: |
-        cargo clippy --all-targets -- -D warnings
-        cargo clippy --all-targets --features master -- -D warnings
-
   duplicates:
     runs-on: ubuntu-24.04
     steps:
       - uses: actions/checkout@v4
       - run: python tools/check_intrinsics_duplicates.py
 
+  spell_check:
+    runs-on: ubuntu-24.04
+    steps:
+      - uses: actions/checkout@v4
+      - uses: crate-ci/typos@v1.32.0
+      - uses: streetsidesoftware/cspell-action@v7
+
   build_system:
     runs-on: ubuntu-24.04
     steps:
diff --git a/compiler/rustc_codegen_gcc/.github/workflows/failures.yml b/compiler/rustc_codegen_gcc/.github/workflows/failures.yml
index bc42eb1468e..67b7fbe4478 100644
--- a/compiler/rustc_codegen_gcc/.github/workflows/failures.yml
+++ b/compiler/rustc_codegen_gcc/.github/workflows/failures.yml
@@ -66,8 +66,8 @@ jobs:
       run: |
           sudo dpkg --force-overwrite -i gcc-15.deb
           echo 'gcc-path = "/usr/lib"' > config.toml
-          echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-          echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+          
+          
 
     - name: Set env
       run: |
diff --git a/compiler/rustc_codegen_gcc/.github/workflows/m68k.yml b/compiler/rustc_codegen_gcc/.github/workflows/m68k.yml
index 21731f7087e..245bee7f2a3 100644
--- a/compiler/rustc_codegen_gcc/.github/workflows/m68k.yml
+++ b/compiler/rustc_codegen_gcc/.github/workflows/m68k.yml
@@ -65,8 +65,8 @@ jobs:
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
+        
+        
 
     #- name: Cache rust repository
       ## We only clone the rust repository for rustc tests
@@ -95,7 +95,7 @@ jobs:
         ./y.sh prepare --only-libcore --cross
         ./y.sh build --sysroot --features compiler_builtins/no-f16-f128 --target-triple m68k-unknown-linux-gnu
         ./y.sh test --mini-tests
-        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu cargo test
+        CG_GCC_TEST_TARGET=m68k-unknown-linux-gnu ./y.sh test --cargo-tests
         ./y.sh clean all
 
     - name: Prepare dependencies
diff --git a/compiler/rustc_codegen_gcc/.github/workflows/release.yml b/compiler/rustc_codegen_gcc/.github/workflows/release.yml
index 47a40286554..1d8eaf9a141 100644
--- a/compiler/rustc_codegen_gcc/.github/workflows/release.yml
+++ b/compiler/rustc_codegen_gcc/.github/workflows/release.yml
@@ -12,6 +12,8 @@ permissions:
 env:
   # Enable backtraces for easier debugging
   RUST_BACKTRACE: 1
+  # For the run-make tests.
+  LLVM_BIN_DIR: /usr/bin
 
 jobs:
   build:
@@ -36,7 +38,8 @@ jobs:
       uses: Swatinem/rust-cache@v2
 
     - name: Install packages
-      run: sudo apt-get install ninja-build ripgrep
+      # `llvm-14-tools` is needed to install the `FileCheck` binary which is used for run-make tests.
+      run: sudo apt-get install ninja-build ripgrep llvm-14-tools llvm
 
     - name: Download artifact
       run: curl -LO https://github.com/rust-lang/gcc/releases/latest/download/gcc-15.deb
@@ -46,18 +49,21 @@ jobs:
           sudo dpkg --force-overwrite -i gcc-15.deb
           echo 'gcc-path = "/usr/lib/"' > config.toml
 
+    # Some run-make tests fail if we use our forked GCC because it doesn't
+    # bundle libstdc++, so we switch to gcc-14 to have a GCC that has
+    # libstdc++.
+    - name: Set default GCC to gcc-14
+      run: sudo update-alternatives --install /usr/bin/cc cc /usr/bin/gcc-14 30
+
     - name: Set env
       run: |
         echo "workspace="$GITHUB_WORKSPACE >> $GITHUB_ENV
-        echo "LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
-        echo "LD_LIBRARY_PATH=/usr/lib" >> $GITHUB_ENV
 
     - name: Build
       run: |
         ./y.sh prepare --only-libcore
         EMBED_LTO_BITCODE=1 ./y.sh build --sysroot --release --release-sysroot
-        ./y.sh test --mini-tests
-        cargo test
+        ./y.sh test --cargo-tests
         ./y.sh clean all
 
     - name: Prepare dependencies
diff --git a/compiler/rustc_codegen_gcc/.github/workflows/stdarch.yml b/compiler/rustc_codegen_gcc/.github/workflows/stdarch.yml
index f26ac3b755f..20d009f08a7 100644
--- a/compiler/rustc_codegen_gcc/.github/workflows/stdarch.yml
+++ b/compiler/rustc_codegen_gcc/.github/workflows/stdarch.yml
@@ -90,7 +90,7 @@ jobs:
       if: ${{ !matrix.cargo_runner }}
       run: |
         ./y.sh test --release --clean --release-sysroot --build-sysroot --mini-tests --std-tests --test-libcore
-        cargo test
+        ./y.sh test --cargo-tests
 
     - name: Run stdarch tests
       if: ${{ !matrix.cargo_runner }}
diff --git a/compiler/rustc_codegen_gcc/.gitignore b/compiler/rustc_codegen_gcc/.gitignore
index c1e6631a281..8f73d3eb972 100644
--- a/compiler/rustc_codegen_gcc/.gitignore
+++ b/compiler/rustc_codegen_gcc/.gitignore
@@ -19,4 +19,5 @@ tools/llvmint-2
 llvm
 build_system/target
 config.toml
-build
\ No newline at end of file
+build
+rustlantis
\ No newline at end of file
diff --git a/compiler/rustc_codegen_gcc/CONTRIBUTING.md b/compiler/rustc_codegen_gcc/CONTRIBUTING.md
index 8e313ab08b5..54cba0e6de3 100644
--- a/compiler/rustc_codegen_gcc/CONTRIBUTING.md
+++ b/compiler/rustc_codegen_gcc/CONTRIBUTING.md
@@ -33,7 +33,7 @@ To run specific tests, use appropriate flags such as:
 
 - `./y.sh test --test-libcore`
 - `./y.sh test --std-tests`
-- `cargo test -- <name of test>`
+- `./y.sh test --cargo-tests -- <name of test>`
 
 Additionally, you can run the tests of `libgccjit`:
 
diff --git a/compiler/rustc_codegen_gcc/Cargo.lock b/compiler/rustc_codegen_gcc/Cargo.lock
index 967a51a1cc6..b20c181a8cb 100644
--- a/compiler/rustc_codegen_gcc/Cargo.lock
+++ b/compiler/rustc_codegen_gcc/Cargo.lock
@@ -82,6 +82,18 @@ dependencies = [
 ]
 
 [[package]]
+name = "getrandom"
+version = "0.3.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "26145e563e54f2cadc477553f1ec5ee650b00862f0a58bcd12cbdc5f0ea2d2f4"
+dependencies = [
+ "cfg-if",
+ "libc",
+ "r-efi",
+ "wasi",
+]
+
+[[package]]
 name = "hermit-abi"
 version = "0.3.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
@@ -111,9 +123,9 @@ checksum = "5aaeb2981e0606ca11d79718f8bb01164f1d6ed75080182d3abf017e6d244b6d"
 
 [[package]]
 name = "linux-raw-sys"
-version = "0.4.14"
+version = "0.9.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "78b3ae25bc7c8c38cec158d1f2757ee79e9b3740fbc7ccf0e59e4b08d793fa89"
+checksum = "cd945864f07fe9f5371a27ad7b52a172b4b499999f1d97574c9fa68373937e12"
 
 [[package]]
 name = "memchr"
@@ -138,6 +150,12 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775"
 
 [[package]]
+name = "r-efi"
+version = "5.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "74765f6d916ee2faa39bc8e68e4f3ed8949b48cccdac59983d287a7cb71ce9c5"
+
+[[package]]
 name = "regex"
 version = "1.8.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
@@ -166,9 +184,9 @@ dependencies = [
 
 [[package]]
 name = "rustix"
-version = "0.38.42"
+version = "1.0.7"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f93dc38ecbab2eb790ff964bb77fa94faf256fd3e73285fd7ba0903b76bedb85"
+checksum = "c71e83d6afe7ff64890ec6b71d6a69bb8a610ab78ce364b3352876bb4c801266"
 dependencies = [
  "bitflags",
  "errno",
@@ -188,12 +206,12 @@ dependencies = [
 
 [[package]]
 name = "tempfile"
-version = "3.14.0"
+version = "3.20.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "28cce251fcbc87fac86a866eeb0d6c2d536fc16d06f184bb61aeae11aa4cee0c"
+checksum = "e8a64e3985349f2441a1a9ef0b853f869006c3855f2cda6862a94d26ebb9d6a1"
 dependencies = [
- "cfg-if",
  "fastrand",
+ "getrandom",
  "once_cell",
  "rustix",
  "windows-sys",
@@ -243,6 +261,15 @@ dependencies = [
 ]
 
 [[package]]
+name = "wasi"
+version = "0.14.2+wasi-0.2.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9683f9a5a998d873c0d21fcbe3c083009670149a8fab228644b8bd36b2c48cb3"
+dependencies = [
+ "wit-bindgen-rt",
+]
+
+[[package]]
 name = "winapi"
 version = "0.3.9"
 source = "registry+https://github.com/rust-lang/crates.io-index"
@@ -345,3 +372,12 @@ name = "windows_x86_64_msvc"
 version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec"
+
+[[package]]
+name = "wit-bindgen-rt"
+version = "0.39.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6f42320e61fe2cfd34354ecb597f86f413484a798ba44a8ca1165c58d42da6c1"
+dependencies = [
+ "bitflags",
+]
diff --git a/compiler/rustc_codegen_gcc/Cargo.toml b/compiler/rustc_codegen_gcc/Cargo.toml
index c692a90f0a4..c284e3f060b 100644
--- a/compiler/rustc_codegen_gcc/Cargo.toml
+++ b/compiler/rustc_codegen_gcc/Cargo.toml
@@ -31,7 +31,7 @@ gccjit = "2.7"
 [dev-dependencies]
 boml = "0.3.1"
 lang_tester = "0.8.0"
-tempfile = "3.7.1"
+tempfile = "3.20"
 
 [profile.dev]
 # By compiling dependencies with optimizations, performing tests gets much faster.
diff --git a/compiler/rustc_codegen_gcc/_typos.toml b/compiler/rustc_codegen_gcc/_typos.toml
new file mode 100644
index 00000000000..4a6a506a981
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/_typos.toml
@@ -0,0 +1,9 @@
+[default.extend-words]
+ba = "ba"
+hsa = "hsa"
+olt = "olt"
+seh = "seh"
+typ = "typ"
+
+[files]
+extend-exclude = ["src/intrinsic/archs.rs"]
diff --git a/compiler/rustc_codegen_gcc/build_system/build_sysroot/Cargo.lock b/compiler/rustc_codegen_gcc/build_system/build_sysroot/Cargo.lock
index 51bec5aa9e3..0c75977ee79 100644
--- a/compiler/rustc_codegen_gcc/build_system/build_sysroot/Cargo.lock
+++ b/compiler/rustc_codegen_gcc/build_system/build_sysroot/Cargo.lock
@@ -1,24 +1,24 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
-version = 3
+version = 4
 
 [[package]]
 name = "addr2line"
-version = "0.22.0"
+version = "0.24.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "6e4503c46a5c0c7844e948c9a4d6acd9f50cccb4de1c48eb9e291ea17470c678"
+checksum = "dfbe277e56a376000877090da837660b4427aad530e3028d44e0bffe4f89a1c1"
 dependencies = [
  "compiler_builtins",
- "gimli 0.29.0",
+ "gimli",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
 ]
 
 [[package]]
-name = "adler"
-version = "1.0.2"
+name = "adler2"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe"
+checksum = "512761e0bb2578dd7380c6baaa0f4ce03e84f95e960231d1dec8bf4d7d6e2627"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -33,10 +33,21 @@ dependencies = [
 ]
 
 [[package]]
-name = "allocator-api2"
-version = "0.2.18"
+name = "alloctests"
+version = "0.0.0"
+dependencies = [
+ "rand",
+ "rand_xorshift",
+]
+
+[[package]]
+name = "cc"
+version = "1.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5c6cb57a04249c6480766f7f7cef5467412af1490f8d1e243141daddada3264f"
+checksum = "1aeb932158bd710538c73702db6945cb68a8fb08c519e6e12706b94263b36db8"
+dependencies = [
+ "shlex",
+]
 
 [[package]]
 name = "cfg-if"
@@ -50,10 +61,11 @@ dependencies = [
 
 [[package]]
 name = "compiler_builtins"
-version = "0.1.118"
+version = "0.1.160"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "92afe7344b64cccf3662ca26d5d1c0828ab826f04206b97d856e3625e390e4b5"
+checksum = "6376049cfa92c0aa8b9ac95fae22184b981c658208d4ed8a1dc553cd83612895"
 dependencies = [
+ "cc",
  "rustc-std-workspace-core",
 ]
 
@@ -62,10 +74,18 @@ name = "core"
 version = "0.0.0"
 
 [[package]]
+name = "coretests"
+version = "0.0.0"
+dependencies = [
+ "rand",
+ "rand_xorshift",
+]
+
+[[package]]
 name = "dlmalloc"
-version = "0.2.6"
+version = "0.2.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "3264b043b8e977326c1ee9e723da2c1f8d09a99df52cacf00b4dbce5ac54414d"
+checksum = "8cff88b751e7a276c4ab0e222c3f355190adc6dde9ce39c851db39da34990df7"
 dependencies = [
  "cfg-if",
  "compiler_builtins",
@@ -97,20 +117,9 @@ dependencies = [
 
 [[package]]
 name = "gimli"
-version = "0.29.0"
+version = "0.31.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "40ecd4077b5ae9fd2e9e169b102c6c330d0605168eb0e8bf79952b256dbefffd"
-dependencies = [
- "compiler_builtins",
- "rustc-std-workspace-alloc",
- "rustc-std-workspace-core",
-]
-
-[[package]]
-name = "gimli"
-version = "0.30.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e2e1d97fbe9722ba9bbd0c97051c2956e726562b61f86a25a4360398a40edfc9"
+checksum = "07e28edb80900c19c28f1072f2e8aeca7fa06b23cd4169cefe1af5aa3260783f"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-alloc",
@@ -119,11 +128,10 @@ dependencies = [
 
 [[package]]
 name = "hashbrown"
-version = "0.14.5"
+version = "0.15.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1"
+checksum = "84b26c544d002229e640969970a2e74021aadf6e2f96372b9c58eff97de08eb3"
 dependencies = [
- "allocator-api2",
  "compiler_builtins",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
@@ -131,9 +139,9 @@ dependencies = [
 
 [[package]]
 name = "hermit-abi"
-version = "0.4.0"
+version = "0.5.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "fbf6a919d6cf397374f7dfeeea91d974c7c0a7221d0d0f4f20d859d329e53fcc"
+checksum = "f154ce46856750ed433c8649605bf7ed2de3bc35fd9d2a9f30cddd873c80cb08"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-alloc",
@@ -142,9 +150,9 @@ dependencies = [
 
 [[package]]
 name = "libc"
-version = "0.2.155"
+version = "0.2.172"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "97b3888a4aecf77e811145cadf6eef5901f4782c53886191b2f693f24761847c"
+checksum = "d750af042f7ef4f724306de029d18836c26c1765a54a6a3f094cbd23a7267ffa"
 dependencies = [
  "rustc-std-workspace-core",
 ]
@@ -161,11 +169,11 @@ dependencies = [
 
 [[package]]
 name = "miniz_oxide"
-version = "0.7.4"
+version = "0.8.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "b8a240ddb74feaf34a79a7add65a741f3167852fba007066dcac1ca548d89c08"
+checksum = "3be647b768db090acb35d5ec5db2b0e1f1de11133ca123b9eacf5137868f892a"
 dependencies = [
- "adler",
+ "adler2",
  "compiler_builtins",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
@@ -173,9 +181,9 @@ dependencies = [
 
 [[package]]
 name = "object"
-version = "0.36.3"
+version = "0.36.7"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "27b64972346851a39438c60b341ebc01bba47464ae329e55cf343eb93964efd9"
+checksum = "62948e14d923ea95ea2c7c86c71013138b66525b86bdc08d2dcc262bdb497b87"
 dependencies = [
  "compiler_builtins",
  "memchr",
@@ -188,7 +196,6 @@ name = "panic_abort"
 version = "0.0.0"
 dependencies = [
  "alloc",
- "cfg-if",
  "compiler_builtins",
  "core",
  "libc",
@@ -211,14 +218,22 @@ name = "proc_macro"
 version = "0.0.0"
 dependencies = [
  "core",
+ "rustc-literal-escaper",
  "std",
 ]
 
 [[package]]
+name = "profiler_builtins"
+version = "0.0.0"
+dependencies = [
+ "cc",
+]
+
+[[package]]
 name = "r-efi"
-version = "4.5.0"
+version = "5.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e9e935efc5854715dfc0a4c9ef18dc69dee0ec3bf9cc3ab740db831c0fdd86a3"
+checksum = "74765f6d916ee2faa39bc8e68e4f3ed8949b48cccdac59983d287a7cb71ce9c5"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -226,9 +241,9 @@ dependencies = [
 
 [[package]]
 name = "r-efi-alloc"
-version = "1.0.0"
+version = "2.0.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "31d6f09fe2b6ad044bc3d2c34ce4979796581afd2f1ebc185837e02421e02fd7"
+checksum = "e43c53ff1a01d423d1cb762fd991de07d32965ff0ca2e4f80444ac7804198203"
 dependencies = [
  "compiler_builtins",
  "r-efi",
@@ -236,6 +251,30 @@ dependencies = [
 ]
 
 [[package]]
+name = "rand"
+version = "0.9.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9fbfd9d094a40bf3ae768db9361049ace4c0e04a4fd6b359518bd7b73a73dd97"
+dependencies = [
+ "rand_core",
+]
+
+[[package]]
+name = "rand_core"
+version = "0.9.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "99d9a13982dcf210057a8a78572b2217b667c3beacbf3a0d8b454f6f82837d38"
+
+[[package]]
+name = "rand_xorshift"
+version = "0.4.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "513962919efc330f829edb2535844d1b912b0fbe2ca165d613e4e8788bb05a5a"
+dependencies = [
+ "rand_core",
+]
+
+[[package]]
 name = "rustc-demangle"
 version = "0.1.24"
 source = "registry+https://github.com/rust-lang/crates.io-index"
@@ -246,6 +285,15 @@ dependencies = [
 ]
 
 [[package]]
+name = "rustc-literal-escaper"
+version = "0.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0041b6238913c41fe704213a4a9329e2f685a156d1781998128b4149c230ad04"
+dependencies = [
+ "rustc-std-workspace-std",
+]
+
+[[package]]
 name = "rustc-std-workspace-alloc"
 version = "1.99.0"
 dependencies = [
@@ -267,6 +315,12 @@ dependencies = [
 ]
 
 [[package]]
+name = "shlex"
+version = "1.3.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64"
+
+[[package]]
 name = "std"
 version = "0.0.0"
 dependencies = [
@@ -286,10 +340,13 @@ dependencies = [
  "panic_unwind",
  "r-efi",
  "r-efi-alloc",
+ "rand",
+ "rand_xorshift",
  "rustc-demangle",
  "std_detect",
  "unwind",
  "wasi",
+ "windows-targets 0.0.0",
 ]
 
 [[package]]
@@ -298,6 +355,7 @@ version = "0.1.5"
 dependencies = [
  "cfg-if",
  "compiler_builtins",
+ "libc",
  "rustc-std-workspace-alloc",
  "rustc-std-workspace-core",
 ]
@@ -306,10 +364,8 @@ dependencies = [
 name = "sysroot"
 version = "0.0.0"
 dependencies = [
- "alloc",
- "compiler_builtins",
- "core",
  "proc_macro",
+ "profiler_builtins",
  "std",
  "test",
 ]
@@ -326,9 +382,9 @@ dependencies = [
 
 [[package]]
 name = "unicode-width"
-version = "0.1.13"
+version = "0.1.14"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0336d538f7abc86d282a4189614dfaa90810dfc2c6f6427eaf88e16311dd225d"
+checksum = "7dd6e30e90baa6f72411720665d41d89b9a3d039dc45b8faea1ddd07f617f6af"
 dependencies = [
  "compiler_builtins",
  "rustc-std-workspace-core",
@@ -348,12 +404,12 @@ dependencies = [
 
 [[package]]
 name = "unwinding"
-version = "0.2.2"
+version = "0.2.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dc55842d0db6329a669d55a623c674b02d677b16bfb2d24857d4089d41eba882"
+checksum = "8393f2782b6060a807337ff353780c1ca15206f9ba2424df18cb6e733bd7b345"
 dependencies = [
  "compiler_builtins",
- "gimli 0.30.0",
+ "gimli",
  "rustc-std-workspace-core",
 ]
 
@@ -370,15 +426,19 @@ dependencies = [
 
 [[package]]
 name = "windows-sys"
-version = "0.52.0"
+version = "0.59.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d"
+checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b"
 dependencies = [
- "windows-targets",
+ "windows-targets 0.52.6",
 ]
 
 [[package]]
 name = "windows-targets"
+version = "0.0.0"
+
+[[package]]
+name = "windows-targets"
 version = "0.52.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973"
diff --git a/compiler/rustc_codegen_gcc/build_system/src/build.rs b/compiler/rustc_codegen_gcc/build_system/src/build.rs
index e98377f15a9..ecc4c1b2fe2 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/build.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/build.rs
@@ -33,7 +33,7 @@ impl BuildArg {
                 }
                 arg => {
                     if !build_arg.config_info.parse_argument(arg, &mut args)? {
-                        return Err(format!("Unknown argument `{}`", arg));
+                        return Err(format!("Unknown argument `{arg}`"));
                     }
                 }
             }
@@ -105,14 +105,14 @@ pub fn create_build_sysroot_content(start_dir: &Path) -> Result<(), String> {
     if !start_dir.is_dir() {
         create_dir(start_dir)?;
     }
-    copy_file("build_system/build_sysroot/Cargo.toml", &start_dir.join("Cargo.toml"))?;
-    copy_file("build_system/build_sysroot/Cargo.lock", &start_dir.join("Cargo.lock"))?;
+    copy_file("build_system/build_sysroot/Cargo.toml", start_dir.join("Cargo.toml"))?;
+    copy_file("build_system/build_sysroot/Cargo.lock", start_dir.join("Cargo.lock"))?;
 
     let src_dir = start_dir.join("src");
     if !src_dir.is_dir() {
         create_dir(&src_dir)?;
     }
-    copy_file("build_system/build_sysroot/lib.rs", &start_dir.join("src/lib.rs"))
+    copy_file("build_system/build_sysroot/lib.rs", start_dir.join("src/lib.rs"))
 }
 
 pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Result<(), String> {
@@ -169,7 +169,7 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
         run_command(&[&"cp", &"-r", &dir_to_copy, &sysroot_path], None).map(|_| ())
     };
     walk_dir(
-        start_dir.join(&format!("target/{}/{}/deps", config.target_triple, channel)),
+        start_dir.join(format!("target/{}/{}/deps", config.target_triple, channel)),
         &mut copier.clone(),
         &mut copier,
         false,
diff --git a/compiler/rustc_codegen_gcc/build_system/src/clean.rs b/compiler/rustc_codegen_gcc/build_system/src/clean.rs
index 768a78e789e..a441ed613f9 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/clean.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/clean.rs
@@ -17,12 +17,12 @@ enum CleanArg {
 impl CleanArg {
     fn new() -> Result<Self, String> {
         // We skip the binary and the "clean" option.
-        for arg in std::env::args().skip(2) {
+        if let Some(arg) = std::env::args().nth(2) {
             return match arg.as_str() {
                 "all" => Ok(Self::All),
                 "ui-tests" => Ok(Self::UiTests),
                 "--help" => Ok(Self::Help),
-                a => Err(format!("Unknown argument `{}`", a)),
+                a => Err(format!("Unknown argument `{a}`")),
             };
         }
         Ok(Self::default())
diff --git a/compiler/rustc_codegen_gcc/build_system/src/clone_gcc.rs b/compiler/rustc_codegen_gcc/build_system/src/clone_gcc.rs
index b49dd47f352..ee683df419c 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/clone_gcc.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/clone_gcc.rs
@@ -43,7 +43,7 @@ impl Args {
                 }
                 arg => {
                     if !command_args.config_info.parse_argument(arg, &mut args)? {
-                        return Err(format!("Unknown option {}", arg));
+                        return Err(format!("Unknown option {arg}"));
                     }
                 }
             }
@@ -52,7 +52,7 @@ impl Args {
             Some(p) => p.into(),
             None => PathBuf::from("./gcc"),
         };
-        return Ok(Some(command_args));
+        Ok(Some(command_args))
     }
 }
 
@@ -64,7 +64,7 @@ pub fn run() -> Result<(), String> {
     let result = git_clone("https://github.com/rust-lang/gcc", Some(&args.out_path), false)?;
     if result.ran_clone {
         let gcc_commit = args.config_info.get_gcc_commit()?;
-        println!("Checking out GCC commit `{}`...", gcc_commit);
+        println!("Checking out GCC commit `{gcc_commit}`...");
         run_command_with_output(
             &[&"git", &"checkout", &gcc_commit],
             Some(Path::new(&result.repo_dir)),
diff --git a/compiler/rustc_codegen_gcc/build_system/src/config.rs b/compiler/rustc_codegen_gcc/build_system/src/config.rs
index 4f9fcc97151..650c030ca53 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/config.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/config.rs
@@ -66,7 +66,7 @@ impl ConfigFile {
                         "Expected a boolean for `download-gccjit`",
                     );
                 }
-                _ => return failed_config_parsing(config_file, &format!("Unknown key `{}`", key)),
+                _ => return failed_config_parsing(config_file, &format!("Unknown key `{key}`")),
             }
         }
         match (config.gcc_path.as_mut(), config.download_gccjit) {
@@ -86,9 +86,7 @@ impl ConfigFile {
                 let path = Path::new(gcc_path);
                 *gcc_path = path
                     .canonicalize()
-                    .map_err(|err| {
-                        format!("Failed to get absolute path of `{}`: {:?}", gcc_path, err)
-                    })?
+                    .map_err(|err| format!("Failed to get absolute path of `{gcc_path}`: {err:?}"))?
                     .display()
                     .to_string();
             }
@@ -175,7 +173,7 @@ impl ConfigInfo {
             "--sysroot-panic-abort" => self.sysroot_panic_abort = true,
             "--gcc-path" => match args.next() {
                 Some(arg) if !arg.is_empty() => {
-                    self.gcc_path = Some(arg.into());
+                    self.gcc_path = Some(arg);
                 }
                 _ => {
                     return Err("Expected a value after `--gcc-path`, found nothing".to_string());
@@ -244,7 +242,7 @@ impl ConfigInfo {
         let libgccjit_so = output_dir.join(libgccjit_so_name);
         if !libgccjit_so.is_file() && !self.no_download {
             // Download time!
-            let tempfile_name = format!("{}.download", libgccjit_so_name);
+            let tempfile_name = format!("{libgccjit_so_name}.download");
             let tempfile = output_dir.join(&tempfile_name);
             let is_in_ci = std::env::var("GITHUB_ACTIONS").is_ok();
 
@@ -262,14 +260,14 @@ impl ConfigInfo {
                 )
             })?;
 
-            println!("Downloaded libgccjit.so version {} successfully!", commit);
+            println!("Downloaded libgccjit.so version {commit} successfully!");
             // We need to create a link named `libgccjit.so.0` because that's what the linker is
             // looking for.
-            create_symlink(&libgccjit_so, output_dir.join(&format!("{}.0", libgccjit_so_name)))?;
+            create_symlink(&libgccjit_so, output_dir.join(format!("{libgccjit_so_name}.0")))?;
         }
 
         let gcc_path = output_dir.display().to_string();
-        println!("Using `{}` as path for libgccjit", gcc_path);
+        println!("Using `{gcc_path}` as path for libgccjit");
         self.gcc_path = Some(gcc_path);
         Ok(())
     }
@@ -286,8 +284,7 @@ impl ConfigInfo {
         // since we already have everything we need.
         if let Some(gcc_path) = &self.gcc_path {
             println!(
-                "`--gcc-path` was provided, ignoring config file. Using `{}` as path for libgccjit",
-                gcc_path
+                "`--gcc-path` was provided, ignoring config file. Using `{gcc_path}` as path for libgccjit"
             );
             return Ok(());
         }
@@ -343,7 +340,7 @@ impl ConfigInfo {
         self.dylib_ext = match os_name.as_str() {
             "Linux" => "so",
             "Darwin" => "dylib",
-            os => return Err(format!("unsupported OS `{}`", os)),
+            os => return Err(format!("unsupported OS `{os}`")),
         }
         .to_string();
         let rustc = match env.get("RUSTC") {
@@ -355,10 +352,10 @@ impl ConfigInfo {
             None => return Err("no host found".to_string()),
         };
 
-        if self.target_triple.is_empty() {
-            if let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE") {
-                self.target_triple = overwrite.clone();
-            }
+        if self.target_triple.is_empty()
+            && let Some(overwrite) = env.get("OVERWRITE_TARGET_TRIPLE")
+        {
+            self.target_triple = overwrite.clone();
         }
         if self.target_triple.is_empty() {
             self.target_triple = self.host_triple.clone();
@@ -378,7 +375,7 @@ impl ConfigInfo {
         }
 
         let current_dir =
-            std_env::current_dir().map_err(|error| format!("`current_dir` failed: {:?}", error))?;
+            std_env::current_dir().map_err(|error| format!("`current_dir` failed: {error:?}"))?;
         let channel = if self.channel == Channel::Release {
             "release"
         } else if let Some(channel) = env.get("CHANNEL") {
@@ -391,15 +388,15 @@ impl ConfigInfo {
         self.cg_backend_path = current_dir
             .join("target")
             .join(channel)
-            .join(&format!("librustc_codegen_gcc.{}", self.dylib_ext))
+            .join(format!("librustc_codegen_gcc.{}", self.dylib_ext))
             .display()
             .to_string();
         self.sysroot_path =
-            current_dir.join(&get_sysroot_dir()).join("sysroot").display().to_string();
+            current_dir.join(get_sysroot_dir()).join("sysroot").display().to_string();
         if let Some(backend) = &self.backend {
             // This option is only used in the rust compiler testsuite. The sysroot is handled
             // by its build system directly so no need to set it ourselves.
-            rustflags.push(format!("-Zcodegen-backend={}", backend));
+            rustflags.push(format!("-Zcodegen-backend={backend}"));
         } else {
             rustflags.extend_from_slice(&[
                 "--sysroot".to_string(),
@@ -412,10 +409,10 @@ impl ConfigInfo {
         // We have a different environment variable than RUSTFLAGS to make sure those flags are
         // only sent to rustc_codegen_gcc and not the LLVM backend.
         if let Some(cg_rustflags) = env.get("CG_RUSTFLAGS") {
-            rustflags.extend_from_slice(&split_args(&cg_rustflags)?);
+            rustflags.extend_from_slice(&split_args(cg_rustflags)?);
         }
         if let Some(test_flags) = env.get("TEST_FLAGS") {
-            rustflags.extend_from_slice(&split_args(&test_flags)?);
+            rustflags.extend_from_slice(&split_args(test_flags)?);
         }
 
         if let Some(linker) = linker {
@@ -438,8 +435,8 @@ impl ConfigInfo {
         env.insert("RUSTC_LOG".to_string(), "warn".to_string());
 
         let sysroot = current_dir
-            .join(&get_sysroot_dir())
-            .join(&format!("sysroot/lib/rustlib/{}/lib", self.target_triple));
+            .join(get_sysroot_dir())
+            .join(format!("sysroot/lib/rustlib/{}/lib", self.target_triple));
         let ld_library_path = format!(
             "{target}:{sysroot}:{gcc_path}",
             target = self.cargo_target_dir,
@@ -505,7 +502,7 @@ fn download_gccjit(
     with_progress_bar: bool,
 ) -> Result<(), String> {
     let url = if std::env::consts::OS == "linux" && std::env::consts::ARCH == "x86_64" {
-        format!("https://github.com/rust-lang/gcc/releases/download/master-{}/libgccjit.so", commit)
+        format!("https://github.com/rust-lang/gcc/releases/download/master-{commit}/libgccjit.so")
     } else {
         eprintln!(
             "\
@@ -518,7 +515,7 @@ to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
         ));
     };
 
-    println!("Downloading `{}`...", url);
+    println!("Downloading `{url}`...");
 
     // Try curl. If that fails and we are on windows, fallback to PowerShell.
     let mut ret = run_command_with_output(
@@ -538,7 +535,7 @@ to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
             if with_progress_bar { &"--progress-bar" } else { &"-s" },
             &url.as_str(),
         ],
-        Some(&output_dir),
+        Some(output_dir),
     );
     if ret.is_err() && cfg!(windows) {
         eprintln!("Fallback to PowerShell");
@@ -549,12 +546,11 @@ to `download-gccjit = false` and set `gcc-path` to the appropriate directory."
                 &"-Command",
                 &"[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;",
                 &format!(
-                    "(New-Object System.Net.WebClient).DownloadFile('{}', '{}')",
-                    url, tempfile_name,
+                    "(New-Object System.Net.WebClient).DownloadFile('{url}', '{tempfile_name}')",
                 )
                 .as_str(),
             ],
-            Some(&output_dir),
+            Some(output_dir),
         );
     }
     ret
diff --git a/compiler/rustc_codegen_gcc/build_system/src/fmt.rs b/compiler/rustc_codegen_gcc/build_system/src/fmt.rs
index de310a6a30f..7e6594f50f9 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/fmt.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/fmt.rs
@@ -16,21 +16,21 @@ fn show_usage() {
 pub fn run() -> Result<(), String> {
     let mut check = false;
     // We skip binary name and the `info` command.
-    let mut args = std::env::args().skip(2);
-    while let Some(arg) = args.next() {
+    let args = std::env::args().skip(2);
+    for arg in args {
         match arg.as_str() {
             "--help" => {
                 show_usage();
                 return Ok(());
             }
             "--check" => check = true,
-            _ => return Err(format!("Unknown option {}", arg)),
+            _ => return Err(format!("Unknown option {arg}")),
         }
     }
 
     let cmd: &[&dyn AsRef<OsStr>] =
         if check { &[&"cargo", &"fmt", &"--check"] } else { &[&"cargo", &"fmt"] };
 
-    run_command_with_output(cmd, Some(&Path::new(".")))?;
-    run_command_with_output(cmd, Some(&Path::new("build_system")))
+    run_command_with_output(cmd, Some(Path::new(".")))?;
+    run_command_with_output(cmd, Some(Path::new("build_system")))
 }
diff --git a/compiler/rustc_codegen_gcc/build_system/src/fuzz.rs b/compiler/rustc_codegen_gcc/build_system/src/fuzz.rs
new file mode 100644
index 00000000000..453211366b3
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/build_system/src/fuzz.rs
@@ -0,0 +1,289 @@
+use std::ffi::OsStr;
+use std::path::Path;
+
+mod reduce;
+
+use crate::utils::run_command_with_output;
+
+fn show_usage() {
+    println!(
+        r#"
+`fuzz` command help:
+    --reduce               : Reduces a file generated by rustlantis
+    --help                 : Show this help
+    --start                : Start of the fuzzed range
+    --count                : The number of cases to fuzz
+    -j --jobs              : The number of threads to use during fuzzing"#
+    );
+}
+
+pub fn run() -> Result<(), String> {
+    // We skip binary name and the `fuzz` command.
+    let mut args = std::env::args().skip(2);
+    let mut start = 0;
+    let mut count = 100;
+    let mut threads =
+        std::thread::available_parallelism().map(|threads| threads.get()).unwrap_or(1);
+    while let Some(arg) = args.next() {
+        match arg.as_str() {
+            "--reduce" => {
+                let Some(path) = args.next() else {
+                    return Err("--reduce must be provided with a path".into());
+                };
+                if !std::fs::exists(&path).unwrap_or(false) {
+                    return Err("--reduce must be provided with a valid path".into());
+                }
+                reduce::reduce(&path);
+                return Ok(());
+            }
+            "--help" => {
+                show_usage();
+                return Ok(());
+            }
+            "--start" => {
+                start =
+                    str::parse(&args.next().ok_or_else(|| "Fuzz start not provided!".to_string())?)
+                        .map_err(|err| (format!("Fuzz start not a number {err:?}!")))?;
+            }
+            "--count" => {
+                count =
+                    str::parse(&args.next().ok_or_else(|| "Fuzz count not provided!".to_string())?)
+                        .map_err(|err| (format!("Fuzz count not a number {err:?}!")))?;
+            }
+            "-j" | "--jobs" => {
+                threads = str::parse(
+                    &args.next().ok_or_else(|| "Fuzz thread count not provided!".to_string())?,
+                )
+                .map_err(|err| (format!("Fuzz thread count not a number {err:?}!")))?;
+            }
+            _ => return Err(format!("Unknown option {arg}")),
+        }
+    }
+
+    // Ensure that we have a cloned version of rustlantis on hand.
+    crate::utils::git_clone(
+        "https://github.com/cbeuw/rustlantis.git",
+        Some("clones/rustlantis".as_ref()),
+        true,
+    )
+    .map_err(|err| (format!("Git clone failed with message: {err:?}!")))?;
+
+    // Ensure that we are on the newest rustlantis commit.
+    let cmd: &[&dyn AsRef<OsStr>] = &[&"git", &"pull", &"origin"];
+    run_command_with_output(cmd, Some(Path::new("clones/rustlantis")))?;
+
+    // Build the release version of rustlantis
+    let cmd: &[&dyn AsRef<OsStr>] = &[&"cargo", &"build", &"--release"];
+    run_command_with_output(cmd, Some(Path::new("clones/rustlantis")))?;
+    // Fuzz a given range
+    fuzz_range(start, start + count, threads);
+    Ok(())
+}
+
+/// Fuzzes a range `start..end` with `threads`.
+fn fuzz_range(start: u64, end: u64, threads: usize) {
+    use std::sync::Arc;
+    use std::sync::atomic::{AtomicU64, Ordering};
+    use std::time::{Duration, Instant};
+    // Total amount of files to fuzz
+    let total = end - start;
+    // Currently fuzzed element
+    let start = Arc::new(AtomicU64::new(start));
+    // Count time during fuzzing
+    let start_time = Instant::now();
+    let mut workers = Vec::with_capacity(threads);
+    // Spawn `threads`..
+    for _ in 0..threads {
+        let start = start.clone();
+        // .. which each will ..
+        workers.push(std::thread::spawn(move || {
+            // ... grab the next fuzz seed ...
+            while start.load(Ordering::Relaxed) < end {
+                let next = start.fetch_add(1, Ordering::Relaxed);
+                // .. test that seed .
+                match test(next, false) {
+                    Err(err) => {
+                        // If the test failed at compile-time...
+                        println!("test({next}) failed because {err:?}");
+                        // ... copy that file to the directory `target/fuzz/compiletime_error`...
+                        let mut out_path: std::path::PathBuf =
+                            "target/fuzz/compiletime_error".into();
+                        std::fs::create_dir_all(&out_path).unwrap();
+                        // .. into a file named `fuzz{seed}.rs`.
+                        out_path.push(format!("fuzz{next}.rs"));
+                        std::fs::copy(err, out_path).unwrap();
+                    }
+                    Ok(Err(err)) => {
+                        // If the test failed at run-time...
+                        println!("The LLVM and GCC results don't match for {err:?}");
+                        // ... generate a new file, which prints temporaries(instead of hashing them)...
+                        let mut out_path: std::path::PathBuf = "target/fuzz/runtime_error".into();
+                        std::fs::create_dir_all(&out_path).unwrap();
+                        let Ok(Err(tmp_print_err)) = test(next, true) else {
+                            // ... if that file does not reproduce the issue...
+                            // ... save the original sample in a file named `fuzz{seed}.rs`...
+                            out_path.push(format!("fuzz{next}.rs"));
+                            std::fs::copy(err, &out_path).unwrap();
+                            continue;
+                        };
+                        // ... if that new file still produces the issue, copy it to `fuzz{seed}.rs`..
+                        out_path.push(format!("fuzz{next}.rs"));
+                        std::fs::copy(tmp_print_err, &out_path).unwrap();
+                        // ... and start reducing it, using some properties of `rustlantis` to speed up the process.
+                        reduce::reduce(&out_path);
+                    }
+                    // If the test passed, do nothing
+                    Ok(Ok(())) => (),
+                }
+            }
+        }));
+    }
+    // The "manager" thread loop.
+    while start.load(Ordering::Relaxed) < end || !workers.iter().all(|t| t.is_finished()) {
+        // Every 500 ms...
+        let five_hundred_millis = Duration::from_millis(500);
+        std::thread::sleep(five_hundred_millis);
+        // ... calculate the remaining fuzz iters ...
+        let remaining = end - start.load(Ordering::Relaxed);
+        // ... fix the count(the start counter counts the cases that
+        // begun fuzzing, and not only the ones that are done)...
+        let fuzzed = (total - remaining).saturating_sub(threads as u64);
+        // ... and the fuzz speed ...
+        let iter_per_sec = fuzzed as f64 / start_time.elapsed().as_secs_f64();
+        // .. and use them to display fuzzing stats.
+        println!(
+            "fuzzed {fuzzed} cases({}%), at rate {iter_per_sec} iter/s, remaining ~{}s",
+            (100 * fuzzed) as f64 / total as f64,
+            (remaining as f64) / iter_per_sec
+        )
+    }
+    drop(workers);
+}
+
+/// Builds & runs a file with LLVM.
+fn debug_llvm(path: &std::path::Path) -> Result<Vec<u8>, String> {
+    // Build a file named `llvm_elf`...
+    let exe_path = path.with_extension("llvm_elf");
+    // ... using the LLVM backend ...
+    let output = std::process::Command::new("rustc")
+        .arg(path)
+        .arg("-o")
+        .arg(&exe_path)
+        .output()
+        .map_err(|err| format!("{err:?}"))?;
+    // ... check that the compilation succeeded ...
+    if !output.status.success() {
+        return Err(format!("LLVM compilation failed:{output:?}"));
+    }
+    // ... run the resulting executable ...
+    let output =
+        std::process::Command::new(&exe_path).output().map_err(|err| format!("{err:?}"))?;
+    // ... check it run normally ...
+    if !output.status.success() {
+        return Err(format!(
+            "The program at {path:?}, compiled with LLVM, exited unsuccessfully:{output:?}"
+        ));
+    }
+    // ... cleanup that executable ...
+    std::fs::remove_file(exe_path).map_err(|err| format!("{err:?}"))?;
+    // ... and return the output(stdout + stderr - this allows UB checks to fire).
+    let mut res = output.stdout;
+    res.extend(output.stderr);
+    Ok(res)
+}
+
+/// Builds & runs a file with GCC.
+fn release_gcc(path: &std::path::Path) -> Result<Vec<u8>, String> {
+    // Build a file named `gcc_elf`...
+    let exe_path = path.with_extension("gcc_elf");
+    // ... using the GCC backend ...
+    let output = std::process::Command::new("./y.sh")
+        .arg("rustc")
+        .arg(path)
+        .arg("-O")
+        .arg("-o")
+        .arg(&exe_path)
+        .output()
+        .map_err(|err| format!("{err:?}"))?;
+    // ... check that the compilation succeeded ...
+    if !output.status.success() {
+        return Err(format!("GCC compilation failed:{output:?}"));
+    }
+    // ... run the resulting executable ..
+    let output =
+        std::process::Command::new(&exe_path).output().map_err(|err| format!("{err:?}"))?;
+    // ... check it run normally ...
+    if !output.status.success() {
+        return Err(format!(
+            "The program at {path:?}, compiled with GCC, exited unsuccessfully:{output:?}"
+        ));
+    }
+    // ... cleanup that executable ...
+    std::fs::remove_file(exe_path).map_err(|err| format!("{err:?}"))?;
+    // ... and return the output(stdout + stderr - this allows UB checks to fire).
+    let mut res = output.stdout;
+    res.extend(output.stderr);
+    Ok(res)
+}
+type ResultCache = Option<(Vec<u8>, Vec<u8>)>;
+/// Generates a new rustlantis file, & compares the result of running it with GCC and LLVM.
+fn test(seed: u64, print_tmp_vars: bool) -> Result<Result<(), std::path::PathBuf>, String> {
+    // Generate a Rust source...
+    let source_file = generate(seed, print_tmp_vars)?;
+    test_file(&source_file, true)
+}
+/// Tests a file with a cached LLVM result. Used for reduction, when it is known
+/// that a given transformation should not change the execution result.
+fn test_cached(
+    source_file: &Path,
+    remove_tmps: bool,
+    cache: &mut ResultCache,
+) -> Result<Result<(), std::path::PathBuf>, String> {
+    //  Test `source_file` with release GCC ...
+    let gcc_res = release_gcc(source_file)?;
+    if cache.is_none() {
+        // ...test `source_file` with debug LLVM ...
+        *cache = Some((debug_llvm(source_file)?, gcc_res.clone()));
+    }
+    let (llvm_res, old_gcc) = cache.as_ref().unwrap();
+    // ... compare the results ...
+    if *llvm_res != gcc_res && gcc_res == *old_gcc {
+        // .. if they don't match, report an error.
+        Ok(Err(source_file.to_path_buf()))
+    } else {
+        if remove_tmps {
+            std::fs::remove_file(source_file).map_err(|err| format!("{err:?}"))?;
+        }
+        Ok(Ok(()))
+    }
+}
+fn test_file(
+    source_file: &Path,
+    remove_tmps: bool,
+) -> Result<Result<(), std::path::PathBuf>, String> {
+    let mut uncached = None;
+    test_cached(source_file, remove_tmps, &mut uncached)
+}
+
+/// Generates a new rustlantis file for us to run tests on.
+fn generate(seed: u64, print_tmp_vars: bool) -> Result<std::path::PathBuf, String> {
+    use std::io::Write;
+    let mut out_path = std::env::temp_dir();
+    out_path.push(format!("fuzz{seed}.rs"));
+    // We need to get the command output here.
+    let mut generate = std::process::Command::new("cargo");
+    generate
+        .args(["run", "--release", "--bin", "generate"])
+        .arg(format!("{seed}"))
+        .current_dir("clones/rustlantis");
+    if print_tmp_vars {
+        generate.arg("--debug");
+    }
+    let out = generate.output().map_err(|err| format!("{err:?}"))?;
+    // Stuff the rustlantis output in a source file.
+    std::fs::File::create(&out_path)
+        .map_err(|err| format!("{err:?}"))?
+        .write_all(&out.stdout)
+        .map_err(|err| format!("{err:?}"))?;
+    Ok(out_path)
+}
diff --git a/compiler/rustc_codegen_gcc/build_system/src/fuzz/reduce.rs b/compiler/rustc_codegen_gcc/build_system/src/fuzz/reduce.rs
new file mode 100644
index 00000000000..20715ab0e7c
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/build_system/src/fuzz/reduce.rs
@@ -0,0 +1,432 @@
+use std::io::Write;
+use std::path::{Path, PathBuf};
+
+use super::ResultCache;
+
+/// Saves a reduced file for a given `stage`
+fn save_reduction(lines: &[String], path: &Path, stage: &str) {
+    let mut path = path.to_path_buf();
+    path.set_extension(format!("rs.{stage}"));
+    let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
+    for line in lines {
+        file.write_all(line.as_bytes()).expect("Could not save the reduced example");
+    }
+}
+
+/// Checks if a given reduction is valid.
+fn test_reduction(lines: &[String], path: &Path, cache: &mut ResultCache) -> bool {
+    let mut path = path.to_path_buf();
+    path.set_extension("rs_reduced");
+    let mut file = std::fs::File::create(&path).expect("Could not create the reduced example file");
+    for line in lines {
+        file.write_all(line.as_bytes()).expect("Could not save the reduced example");
+    }
+    let res = super::test_cached(&path, false, cache);
+    let Ok(Err(_)) = res else {
+        return false;
+    };
+    true
+}
+
+/// Removes duplicate assignments in bulk.
+/// If a line A = B is followed directly by A = C,
+/// then removing the first line ought to be fully sound,
+/// and not change the behaviour of the program at all. Detect & remove such lines.
+fn remove_dup_assign(
+    file: &mut Vec<String>,
+    path: &PathBuf,
+    starts: usize,
+    ends: usize,
+    cache: &mut ResultCache,
+) {
+    let mut file_copy = file.clone();
+    let mut reduction_count = 0;
+    // Not worth it.
+    if ends - starts < 8 {
+        return;
+    }
+    for index in starts..ends {
+        let Some((prefix, _)) = file_copy[index].split_once('=') else {
+            continue;
+        };
+        let Some((prefix2, postifx2)) = file_copy[index + 1].split_once('=') else {
+            continue;
+        };
+        let prefix = prefix.trim();
+        let prefix2 = prefix2.trim();
+        // FIXME: Right now, remove_dup_assign cares about assignments to the exact same place.
+        // However, given an assigemnt like this:
+        // ```
+        // A.0 = 1_u32;
+        // A = (2_u32, 3.0);
+        // ```
+        // The first assignment could be safely omitted.
+        // Additionally, we try to check if the second assignment could depend on the first one.
+        // In such cases, the result is likely to change, so we bail.
+        if prefix == prefix2 && !postifx2.contains(prefix) {
+            file_copy[index] = "".into();
+            reduction_count += 1;
+        }
+    }
+    // We have removed no lines - no point in testing.
+    if reduction_count == 0 {
+        return;
+    }
+    // Check if the removed lines affected the execution result in any way, shape or form.
+    if test_reduction(&file_copy, path, cache) {
+        println!("Reduced {path:?} by {reduction_count} lines `remove_dup_assign`");
+        *file = file_copy;
+    } else {
+        // The execution result changed.
+        // This can occur if the second assignment depended on the first one.
+        // Eg.
+        // ```
+        // a = b + c;
+        // a = a + d;
+        // ```
+        remove_dup_assign(file, path, starts, (starts + ends) / 2, cache);
+        remove_dup_assign(file, path, (starts + ends) / 2, ends, cache);
+    }
+    save_reduction(file, path, "remove_dup_assign");
+}
+
+/// Removes all the unneeded calls to `dump_var`. This is not something tools like `cvise` can do,
+/// but it greately speeds up MIR interpretation + native execution.
+fn remove_dump_var(file: &mut Vec<String>, path: &PathBuf) {
+    let mut curr = 0;
+    // ... try disabling `dump_vars` one by one, until only the necessary ones are left.
+    while curr < file.len() {
+        let Some(line) = file[curr..].iter().position(|line| line.contains("dump_var")) else {
+            // No more `dump_var`s to remove - exit early.
+            break;
+        };
+        // Make the line absolute again.
+        let line = line + curr;
+        let mut file_copy = file.clone();
+        // Try removing 3 consecutive lines(the call, block end and block beginning). This effectively removes a `dump_var`.
+        file_copy.remove(line);
+        file_copy.remove(line);
+        file_copy.remove(line);
+        // Not cached - the execution result can change.
+        let mut uncached = None;
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, path, &mut uncached) {
+            println!("Reduced {path:?} by 3 lines `remove_dump_var`");
+            *file = file_copy;
+            curr = line;
+        } else {
+            curr = line + 1;
+        }
+    }
+    save_reduction(file, path, "remove_dump_var");
+}
+
+/// Replaces matches with gotos where possible.
+/// This exploits some properties of rustlantis(match arm order),
+/// and is only soundly applicable to MIR generated by it.
+/// Still, it is not something `cvise` can do, but it simplifies the code a ton.
+fn match_to_goto(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    while curr < file.len() {
+        let Some(match_starts) = file[curr..].iter().position(|line| line.contains("match")) else {
+            // No more `match`es to remove - exit early.
+            break;
+        };
+        let match_starts = match_starts + curr;
+        // Find the end of the match
+        let Some(match_ends) = file[match_starts..].iter().position(|line| line.contains('}'))
+        else {
+            // Can't find match end - exit early.
+            break;
+        };
+        let match_ends = match_ends + match_starts;
+        let match_body = &file[match_starts..match_ends];
+
+        // Find where this match should normally jump to.
+        // This *should* be the second-last arm of the match, as per the paper(the remaining blocks are decoys).
+        // If this ever changes, this reduction may not always be sound.
+        // This is not a problem, however: we NEED to use MIRI for reduction anwyway,
+        // and it will catch this issue.
+        let jumps_to = &match_body[match_body.len() - 2].trim();
+        let Some((_, bb_ident)) = jumps_to.split_once("bb") else {
+            break;
+        };
+        // We now have the number of the block we jump to at runtime.
+        let bb_ident = bb_ident.trim_matches(',');
+        // Try replacing this match with an unconditional jump.
+        let mut file_copy = file.clone();
+        for _ in match_starts..(match_ends + 1) {
+            file_copy.remove(match_starts);
+        }
+        file_copy.insert(match_starts, format!("Goto(bb{bb_ident})\n"));
+        if test_reduction(&file_copy, path, cache) {
+            println!("Reduced {path:?} by {} lines `match_to_goto`", match_ends - match_starts);
+            *file = file_copy;
+            curr = match_starts;
+        } else {
+            curr = match_ends;
+        }
+    }
+    save_reduction(file, path, "match_to_goto");
+}
+
+/// At this point, we can try "killing" blocks, by replacing their bodies with calls to `abort`.
+/// This is always sound(the program aborts, so no UB can occur after the block),
+/// and allows us to safely remove *a lot* of unneeded blocks.
+fn block_abort(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+    while curr < file.len() {
+        let Some(block_starts) = file[curr..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to kill - exit early.
+            break;
+        };
+        let block_starts = block_starts + curr;
+        // Find the beginning of the next block to find the end of this block.
+        let Some(block_ends) = file[(block_starts + 1)..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to kill - exit early.
+            break;
+        };
+        let block_ends = block_starts + block_ends;
+        let block_starts = block_starts + 1;
+        let mut file_copy = file.clone();
+        // Remove the block body...
+        for _ in block_starts..(block_ends) {
+            file_copy.remove(block_starts);
+        }
+        // ..and insert an unconditional call to abort.
+        file_copy.insert(
+            block_starts,
+            "Call(tmp = core::intrinsics::abort(), ReturnTo(bb1), UnwindUnreachable())\n"
+                .to_string(),
+        );
+        file_copy.insert(block_starts, "let tmp = ();\n".to_string());
+
+        if test_reduction(&file_copy, path, cache) {
+            println!("Reduced {path:?} by {} lines `block_abort`", block_ends - block_starts - 2);
+            *file = file_copy;
+            curr = block_starts;
+        } else {
+            curr = block_ends;
+        }
+    }
+    save_reduction(file, path, "block_abort");
+}
+
+/// Removes unreachable basic blocks
+fn remove_block(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    // Next, we try to outright remove blocks.
+    while curr < file.len() {
+        let Some(block_starts) = file[curr..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to remove - exit early.
+            break;
+        };
+        let block_starts = block_starts + curr;
+        // Find the beginning of the next block to find the end of this block.
+        let Some(block_ends) = file[(block_starts + 1)..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to remove - exit early.
+            break;
+        };
+        let block_ends = block_starts + block_ends + 1;
+        // Large blocks are likely to be necessary.
+        if block_ends - block_starts > 6 {
+            curr = block_starts + 1;
+            continue;
+        }
+        let mut file_copy = file.clone();
+        file_copy.drain(block_starts..block_ends);
+        if test_reduction(&file_copy, path, cache) {
+            println!("Reduced {path:?} by {} lines `remove_blocks`", block_ends - block_starts);
+            *file = file_copy;
+            curr = block_starts;
+        } else {
+            curr = block_starts + 1;
+        }
+    }
+    save_reduction(file, path, "remove_block");
+}
+
+/// Merges blocks ending with unconditional jumps.
+fn linearize_cf(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    // Next, we try to linearize the control flow. What the does that mean?
+    // Given a sequence like this:
+    // Goto(bb22)
+    // }
+    // bb22 = {
+    // We remove those 3 lines, merging the blocks together. This is not something `cvise` can do,
+    // and it makes other transformations easier.
+    while curr < file.len() {
+        let Some(block_starts) = file[curr..]
+            .iter()
+            .position(|line| line.starts_with("bb") && line.trim_end().ends_with(" = {"))
+        else {
+            // No more `block`s to remove - exit early.
+            break;
+        };
+        let block_starts = block_starts + curr;
+        // Extract the block id.
+        let Some((block, _)) = file[block_starts].split_once('=') else {
+            curr = block_starts + 1;
+            continue;
+        };
+        let block = block.trim();
+        if file[block_starts - 2].trim() != format!("Goto({block})") {
+            curr = block_starts + 1;
+            continue;
+        }
+        let mut file_copy = file.clone();
+        // Try removing 3 consecutive lines(the goto, block end and block beginning). This effectively removes a `Goto(next)`.
+        file_copy.remove(block_starts - 2);
+        file_copy.remove(block_starts - 2);
+        file_copy.remove(block_starts - 2);
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, path, cache) {
+            println!("Reduced {path:?} by 3 lines `linearize_cf`");
+            *file = file_copy;
+            curr = block_starts;
+        } else {
+            curr = block_starts + 1;
+        }
+    }
+    save_reduction(file, path, "linearize_cf");
+}
+
+/// Replaces a call to a given function with a 0 assignment to the destination place, and a Goto.
+/// This is always sound, because:
+/// 1. All the functions arguments are always initialized
+/// 2. and point to initialized  memory(the operand of &raw must be an initialized place in rustlantis).
+fn remove_fn_calls(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    while curr < file.len() {
+        let Some(fn_call) =
+            file[curr..].iter().position(|line| line.contains("Call(") && line.contains(" = fn"))
+        else {
+            // No more calls to remove - exit early.
+            break;
+        };
+        let fn_call = fn_call + curr;
+        let line = file[fn_call].trim();
+        // Skip the Call(
+        let line = &line["Call(".len()..];
+        // Extract the destination place
+        let Some((place, line)) = line.split_once('=') else {
+            curr = fn_call + 1;
+            continue;
+        };
+        // Skip till the return block id.
+        let Some((_, line)) = line.split_once("ReturnTo(") else {
+            curr = fn_call + 1;
+            continue;
+        };
+        // Extract the full return block
+        let Some((block, _)) = line.split_once(')') else {
+            curr = fn_call + 1;
+            continue;
+        };
+        let mut file_copy = file.clone();
+        // Remove the call.
+        file_copy.remove(fn_call);
+        file_copy.insert(fn_call, format!("Goto({block})\n"));
+        file_copy.insert(fn_call, format!("{place} = 0;\n"));
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, path, cache) {
+            println!("Reduced {path:?} using `remove_fn_calls` {cache:?}");
+            *file = file_copy;
+            curr = fn_call;
+        } else {
+            curr = fn_call + 1;
+        }
+    }
+    save_reduction(file, path, "remove_fn_calls");
+}
+
+/// Fully removes unreachable functions.
+fn remove_fns(file: &mut Vec<String>, path: &PathBuf, cache: &mut ResultCache) {
+    let mut curr = 0;
+
+    while curr < file.len() {
+        // Find a function start
+        let Some(fn_start) = file[curr..].iter().position(|line| {
+            line.contains("#[custom_mir(dialect = \"runtime\", phase = \"initial\")]")
+        }) else {
+            // No more functions to remove - exit early.
+            break;
+        };
+        // Find the next function(and use that to find the end of this one).
+        // FIXME: this check is flawed: it will never remove the very last function(the one before main).
+        // The other checks will turn that function into a single call to abort, but it is still annoying that it is kept.
+        let fn_start = fn_start + curr;
+        let Some(fn_end) = file[(fn_start + 3)..].iter().position(|line| line.contains("fn fn"))
+        else {
+            // No more functions to remove - exit early.
+            break;
+        };
+        let fn_end = fn_start + 2 + fn_end;
+        let mut file_copy = file.clone();
+        // Remove the function.\\
+        file_copy.drain(fn_start..fn_end);
+        // Check if this reduction is valid.
+        if test_reduction(&file_copy, path, cache) {
+            println!("Reduced {path:?} by {} lines `remove_fns`", fn_end - fn_start);
+            *file = file_copy;
+        } else {
+            curr = fn_start + 1;
+        }
+    }
+    save_reduction(file, path, "remove_fns");
+}
+
+pub(super) fn reduce(path: impl AsRef<Path>) {
+    let path = path.as_ref().to_owned();
+    // ... read the file to a buffer ..
+    let file = std::fs::read_to_string(&path).expect("Could not open the file to reduce");
+    let mut file: Vec<_> = file.split_inclusive('\n').map(|s| s.to_string()).collect();
+
+    // ... and run reduction passes.
+    println!("running `remove_dump_var` on {path:?}.");
+    remove_dump_var(&mut file, &path);
+    // After `dump_var`, the execution results ought not to change. Cache them.
+    let mut cache = None;
+    // Fill the cache
+    assert!(
+        test_reduction(&file, &path, &mut cache),
+        "Reduction error: check that the input file is a valid reproducer."
+    );
+    println!("cache:{cache:?}");
+    println!("running `remove_fn_calls` on {path:?}.");
+    remove_fn_calls(&mut file, &path, &mut cache);
+    println!("running `remove_fns` on {path:?}.");
+    remove_fns(&mut file, &path, &mut cache);
+    let len = file.len();
+    println!("running `remove_dup_assign` on {path:?}.");
+    remove_dup_assign(&mut file, &path, 0, len, &mut cache);
+    file.retain(|line| !line.is_empty());
+    println!("running `match_to_goto` on {path:?}.");
+    match_to_goto(&mut file, &path, &mut cache);
+    println!("running `block_abort` on {path:?}.");
+    block_abort(&mut file, &path, &mut cache);
+    println!("running `remove_block` on {path:?}.");
+    remove_block(&mut file, &path, &mut cache);
+    println!("running `linearize_cf` on {path:?}.");
+    linearize_cf(&mut file, &path, &mut cache);
+    let mut out = std::fs::File::create(&path).expect("Could not save the reduction result.");
+    let file = file.into_iter().collect::<String>();
+    out.write_all(file.as_bytes()).expect("failed to write into file");
+}
diff --git a/compiler/rustc_codegen_gcc/build_system/src/info.rs b/compiler/rustc_codegen_gcc/build_system/src/info.rs
index bd891de2eb4..66fdcf88cbb 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/info.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/info.rs
@@ -15,7 +15,7 @@ pub fn run() -> Result<(), String> {
     config.no_download = true;
     config.setup_gcc_path()?;
     if let Some(gcc_path) = config.gcc_path {
-        println!("{}", gcc_path);
+        println!("{gcc_path}");
     }
     Ok(())
 }
diff --git a/compiler/rustc_codegen_gcc/build_system/src/main.rs b/compiler/rustc_codegen_gcc/build_system/src/main.rs
index c70b00e09ae..078a4726ba8 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/main.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/main.rs
@@ -5,6 +5,7 @@ mod clean;
 mod clone_gcc;
 mod config;
 mod fmt;
+mod fuzz;
 mod info;
 mod prepare;
 mod rust_tools;
@@ -42,7 +43,8 @@ Commands:
         test      : Runs tests for the project.
         info      : Displays information about the build environment and project configuration.
         clone-gcc : Clones the GCC compiler from a specified source.
-        fmt       : Runs rustfmt"
+        fmt       : Runs rustfmt
+        fuzz      : Fuzzes `cg_gcc` using rustlantis"
     );
 }
 
@@ -56,6 +58,7 @@ pub enum Command {
     Test,
     Info,
     Fmt,
+    Fuzz,
 }
 
 fn main() {
@@ -75,6 +78,7 @@ fn main() {
         Some("info") => Command::Info,
         Some("clone-gcc") => Command::CloneGcc,
         Some("fmt") => Command::Fmt,
+        Some("fuzz") => Command::Fuzz,
         Some("--help") => {
             usage();
             process::exit(0);
@@ -97,6 +101,7 @@ fn main() {
         Command::Info => info::run(),
         Command::CloneGcc => clone_gcc::run(),
         Command::Fmt => fmt::run(),
+        Command::Fuzz => fuzz::run(),
     } {
         eprintln!("Command failed to run: {e}");
         process::exit(1);
diff --git a/compiler/rustc_codegen_gcc/build_system/src/prepare.rs b/compiler/rustc_codegen_gcc/build_system/src/prepare.rs
index d14639afee5..35a6e20fb86 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/prepare.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/prepare.rs
@@ -18,9 +18,9 @@ fn prepare_libcore(
     if let Some(path) = sysroot_source {
         rustlib_dir = Path::new(&path)
             .canonicalize()
-            .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
+            .map_err(|error| format!("Failed to canonicalize path: {error:?}"))?;
         if !rustlib_dir.is_dir() {
-            return Err(format!("Custom sysroot path {:?} not found", rustlib_dir));
+            return Err(format!("Custom sysroot path {rustlib_dir:?} not found"));
         }
     } else {
         let rustc_path = match get_rustc_path() {
@@ -36,17 +36,17 @@ fn prepare_libcore(
         rustlib_dir = parent
             .join("../lib/rustlib/src/rust")
             .canonicalize()
-            .map_err(|error| format!("Failed to canonicalize path: {:?}", error))?;
+            .map_err(|error| format!("Failed to canonicalize path: {error:?}"))?;
         if !rustlib_dir.is_dir() {
             return Err("Please install `rust-src` component".to_string());
         }
     }
 
     let sysroot_dir = sysroot_path.join("sysroot_src");
-    if sysroot_dir.is_dir() {
-        if let Err(error) = fs::remove_dir_all(&sysroot_dir) {
-            return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), error,));
-        }
+    if sysroot_dir.is_dir()
+        && let Err(error) = fs::remove_dir_all(&sysroot_dir)
+    {
+        return Err(format!("Failed to remove `{}`: {:?}", sysroot_dir.display(), error,));
     }
 
     let sysroot_library_dir = sysroot_dir.join("library");
@@ -122,7 +122,7 @@ fn prepare_rand() -> Result<(), String> {
     // Apply patch for the rand crate.
     let file_path = "patches/crates/0001-Remove-deny-warnings.patch";
     let rand_dir = Path::new("build/rand");
-    println!("[GIT] apply `{}`", file_path);
+    println!("[GIT] apply `{file_path}`");
     let path = Path::new("../..").join(file_path);
     run_command_with_output(&[&"git", &"apply", &path], Some(rand_dir))?;
     run_command_with_output(&[&"git", &"add", &"-A"], Some(rand_dir))?;
@@ -149,7 +149,7 @@ fn clone_and_setup<F>(repo_url: &str, checkout_commit: &str, extra: Option<F>) -
 where
     F: Fn(&Path) -> Result<(), String>,
 {
-    let clone_result = git_clone_root_dir(repo_url, &Path::new(crate::BUILD_DIR), false)?;
+    let clone_result = git_clone_root_dir(repo_url, Path::new(crate::BUILD_DIR), false)?;
     if !clone_result.ran_clone {
         println!("`{}` has already been cloned", clone_result.repo_name);
     }
diff --git a/compiler/rustc_codegen_gcc/build_system/src/rust_tools.rs b/compiler/rustc_codegen_gcc/build_system/src/rust_tools.rs
index 105f5eebe24..b1faa27acc4 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/rust_tools.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/rust_tools.rs
@@ -1,24 +1,22 @@
 use std::collections::HashMap;
 use std::ffi::OsStr;
+#[cfg(unix)]
+use std::os::unix::process::CommandExt;
 use std::path::PathBuf;
 
 use crate::config::ConfigInfo;
-use crate::utils::{
-    get_toolchain, run_command_with_output_and_env_no_err, rustc_toolchain_version_info,
-    rustc_version_info,
-};
+use crate::utils::{get_toolchain, rustc_toolchain_version_info, rustc_version_info};
 
 fn args(command: &str) -> Result<Option<Vec<String>>, String> {
     // We skip the binary and the "cargo"/"rustc" option.
-    if let Some("--help") = std::env::args().skip(2).next().as_deref() {
+    if let Some("--help") = std::env::args().nth(2).as_deref() {
         usage(command);
         return Ok(None);
     }
     let args = std::env::args().skip(2).collect::<Vec<_>>();
     if args.is_empty() {
         return Err(format!(
-            "Expected at least one argument for `{}` subcommand, found none",
-            command
+            "Expected at least one argument for `{command}` subcommand, found none"
         ));
     }
     Ok(Some(args))
@@ -27,12 +25,11 @@ fn args(command: &str) -> Result<Option<Vec<String>>, String> {
 fn usage(command: &str) {
     println!(
         r#"
-`{}` command help:
+`{command}` command help:
 
     [args]     : Arguments to be passed to the cargo command
     --help     : Show this help
 "#,
-        command,
     )
 }
 
@@ -51,10 +48,10 @@ impl RustcTools {
         // expected.
         let current_dir = std::env::current_dir()
             .and_then(|path| path.canonicalize())
-            .map_err(|error| format!("Failed to get current directory path: {:?}", error))?;
+            .map_err(|error| format!("Failed to get current directory path: {error:?}"))?;
         let current_exe = std::env::current_exe()
             .and_then(|path| path.canonicalize())
-            .map_err(|error| format!("Failed to get current exe path: {:?}", error))?;
+            .map_err(|error| format!("Failed to get current exe path: {error:?}"))?;
         let mut parent_dir =
             current_exe.components().map(|comp| comp.as_os_str()).collect::<Vec<_>>();
         // We run this script from "build_system/target/release/y", so we need to remove these elements.
@@ -68,7 +65,7 @@ impl RustcTools {
                 ));
             }
         }
-        let parent_dir = PathBuf::from(parent_dir.join(&OsStr::new("/")));
+        let parent_dir = PathBuf::from(parent_dir.join(OsStr::new("/")));
         std::env::set_current_dir(&parent_dir).map_err(|error| {
             format!("Failed to go to `{}` folder: {:?}", parent_dir.display(), error)
         })?;
@@ -92,11 +89,31 @@ impl RustcTools {
         std::env::set_current_dir(&current_dir).map_err(|error| {
             format!("Failed to go back to `{}` folder: {:?}", current_dir.display(), error)
         })?;
-        let toolchain = format!("+{}", toolchain);
+        let toolchain = format!("+{toolchain}");
         Ok(Some(Self { toolchain, args, env, config }))
     }
 }
 
+fn exec(input: &[&dyn AsRef<OsStr>], env: &HashMap<String, String>) -> Result<(), String> {
+    #[cfg(unix)]
+    {
+        // We use `exec` to call the `execvp` syscall instead of creating a new process where the
+        // command will be executed because very few signals can actually kill a current process,
+        // so if segmentation fault (SIGSEGV signal) happens and we raise to the current process,
+        // it will simply do nothing and we won't have the nice error message for the shell.
+        let error = crate::utils::get_command_inner(input, None, Some(env)).exec();
+        eprintln!("execvp syscall failed: {error:?}");
+        std::process::exit(1);
+    }
+    #[cfg(not(unix))]
+    {
+        if crate::utils::run_command_with_output_and_env_no_err(input, None, Some(env)).is_err() {
+            std::process::exit(1);
+        }
+        Ok(())
+    }
+}
+
 pub fn run_cargo() -> Result<(), String> {
     let Some(mut tools) = RustcTools::new("cargo")? else { return Ok(()) };
     let rustflags = tools.env.get("RUSTFLAGS").cloned().unwrap_or_default();
@@ -105,11 +122,7 @@ pub fn run_cargo() -> Result<(), String> {
     for arg in &tools.args {
         command.push(arg);
     }
-    if run_command_with_output_and_env_no_err(&command, None, Some(&tools.env)).is_err() {
-        std::process::exit(1);
-    }
-
-    Ok(())
+    exec(&command, &tools.env)
 }
 
 pub fn run_rustc() -> Result<(), String> {
@@ -118,8 +131,5 @@ pub fn run_rustc() -> Result<(), String> {
     for arg in &tools.args {
         command.push(arg);
     }
-    if run_command_with_output_and_env_no_err(&command, None, Some(&tools.env)).is_err() {
-        std::process::exit(1);
-    }
-    Ok(())
+    exec(&command, &tools.env)
 }
diff --git a/compiler/rustc_codegen_gcc/build_system/src/test.rs b/compiler/rustc_codegen_gcc/build_system/src/test.rs
index df4ac85233b..bcaab0fb526 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/test.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/test.rs
@@ -9,8 +9,8 @@ use crate::build;
 use crate::config::{Channel, ConfigInfo};
 use crate::utils::{
     create_dir, get_sysroot_dir, get_toolchain, git_clone, git_clone_root_dir, remove_file,
-    run_command, run_command_with_env, run_command_with_output_and_env, rustc_version_info,
-    split_args, walk_dir,
+    run_command, run_command_with_env, run_command_with_output, run_command_with_output_and_env,
+    rustc_version_info, split_args, walk_dir,
 };
 
 type Env = HashMap<String, String>;
@@ -42,7 +42,7 @@ fn get_runners() -> Runners {
     );
     runners.insert("--extended-regex-tests", ("Run extended regex tests", extended_regex_tests));
     runners.insert("--mini-tests", ("Run mini tests", mini_tests));
-
+    runners.insert("--cargo-tests", ("Run cargo tests", cargo_tests));
     runners
 }
 
@@ -53,9 +53,9 @@ fn get_number_after_arg(
     match args.next() {
         Some(nb) if !nb.is_empty() => match usize::from_str(&nb) {
             Ok(nb) => Ok(nb),
-            Err(_) => Err(format!("Expected a number after `{}`, found `{}`", option, nb)),
+            Err(_) => Err(format!("Expected a number after `{option}`, found `{nb}`")),
         },
-        _ => Err(format!("Expected a number after `{}`, found nothing", option)),
+        _ => Err(format!("Expected a number after `{option}`, found nothing")),
     }
 }
 
@@ -76,8 +76,8 @@ fn show_usage() {
     for (option, (doc, _)) in get_runners() {
         // FIXME: Instead of using the hard-coded `23` value, better to compute it instead.
         let needed_spaces = 23_usize.saturating_sub(option.len());
-        let spaces: String = std::iter::repeat(' ').take(needed_spaces).collect();
-        println!("    {}{}: {}", option, spaces, doc);
+        let spaces: String = std::iter::repeat_n(' ', needed_spaces).collect();
+        println!("    {option}{spaces}: {doc}");
     }
     println!("    --help                 : Show this help");
 }
@@ -88,6 +88,8 @@ struct TestArg {
     use_system_gcc: bool,
     runners: Vec<String>,
     flags: Vec<String>,
+    /// Additional arguments, to be passed to commands like `cargo test`.
+    test_args: Vec<String>,
     nb_parts: Option<usize>,
     current_part: Option<usize>,
     sysroot_panic_abort: bool,
@@ -137,13 +139,14 @@ impl TestArg {
                         test_arg.sysroot_features.push(feature);
                     }
                     _ => {
-                        return Err(format!("Expected an argument after `{}`, found nothing", arg));
+                        return Err(format!("Expected an argument after `{arg}`, found nothing"));
                     }
                 },
                 "--help" => {
                     show_usage();
                     return Ok(None);
                 }
+                "--" => test_arg.test_args.extend(&mut args),
                 x if runners.contains_key(x)
                     && !test_arg.runners.iter().any(|runner| runner == x) =>
                 {
@@ -151,7 +154,7 @@ impl TestArg {
                 }
                 arg => {
                     if !test_arg.config_info.parse_argument(arg, &mut args)? {
-                        return Err(format!("Unknown option {}", arg));
+                        return Err(format!("Unknown option {arg}"));
                     }
                 }
             }
@@ -189,7 +192,7 @@ fn build_if_no_backend(env: &Env, args: &TestArg) -> Result<(), String> {
         command.push(&"--release");
         &tmp_env
     } else {
-        &env
+        env
     };
     for flag in args.flags.iter() {
         command.push(flag);
@@ -203,6 +206,33 @@ fn clean(_env: &Env, args: &TestArg) -> Result<(), String> {
     create_dir(&path)
 }
 
+fn cargo_tests(test_env: &Env, test_args: &TestArg) -> Result<(), String> {
+    // First, we call `mini_tests` to build minicore for us. This ensures we are testing with a working `minicore`,
+    // and that any changes we have made affect `minicore`(since it would get rebuilt).
+    mini_tests(test_env, test_args)?;
+    // Then, we copy some of the env vars from `test_env`
+    // We don't want to pass things like `RUSTFLAGS`, since they contain the -Zcodegen-backend flag.
+    // That would force `cg_gcc` to *rebuild itself* and only then run tests, which is undesirable.
+    let mut env = HashMap::new();
+    env.insert(
+        "LD_LIBRARY_PATH".into(),
+        test_env.get("LD_LIBRARY_PATH").expect("LD_LIBRARY_PATH missing!").to_string(),
+    );
+    env.insert(
+        "LIBRARY_PATH".into(),
+        test_env.get("LIBRARY_PATH").expect("LIBRARY_PATH missing!").to_string(),
+    );
+    env.insert(
+        "CG_RUSTFLAGS".into(),
+        test_env.get("CG_RUSTFLAGS").map(|s| s.as_str()).unwrap_or("").to_string(),
+    );
+    // Pass all the default args + the user-specified ones.
+    let mut args: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &"test"];
+    args.extend(test_args.test_args.iter().map(|s| s as &dyn AsRef<OsStr>));
+    run_command_with_output_and_env(&args, None, Some(&env))?;
+    Ok(())
+}
+
 fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] mini_core");
@@ -222,7 +252,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(env))?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[BUILD] example");
@@ -234,7 +264,7 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(env))?;
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
     println!("[AOT] mini_core_hello_world");
@@ -249,14 +279,14 @@ fn mini_tests(env: &Env, args: &TestArg) -> Result<(), String> {
         &"--target",
         &args.config_info.target_triple,
     ]);
-    run_command_with_output_and_env(&command, None, Some(&env))?;
+    run_command_with_output_and_env(&command, None, Some(env))?;
 
     let command: &[&dyn AsRef<OsStr>] = &[
         &Path::new(&args.config_info.cargo_target_dir).join("mini_core_hello_world"),
         &"abc",
         &"bcd",
     ];
-    maybe_run_command_in_vm(&command, env, args)?;
+    maybe_run_command_in_vm(command, env, args)?;
     Ok(())
 }
 
@@ -454,22 +484,47 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
     } else {
         run_command_with_output_and_env(&[&"git", &"checkout"], rust_dir, Some(env))?;
     }
+
+    let mut patches = Vec::new();
+    walk_dir(
+        "patches/tests",
+        &mut |_| Ok(()),
+        &mut |file_path: &Path| {
+            patches.push(file_path.to_path_buf());
+            Ok(())
+        },
+        false,
+    )?;
+    patches.sort();
+    // TODO: remove duplication with prepare.rs by creating a apply_patch function in the utils
+    // module.
+    for file_path in patches {
+        println!("[GIT] apply `{}`", file_path.display());
+        let path = Path::new("../..").join(file_path);
+        run_command_with_output(&[&"git", &"apply", &path], rust_dir)?;
+        run_command_with_output(&[&"git", &"add", &"-A"], rust_dir)?;
+        run_command_with_output(
+            &[&"git", &"commit", &"--no-gpg-sign", &"-m", &format!("Patch {}", path.display())],
+            rust_dir,
+        )?;
+    }
+
     let cargo = String::from_utf8(
         run_command_with_env(&[&"rustup", &"which", &"cargo"], rust_dir, Some(env))?.stdout,
     )
-    .map_err(|error| format!("Failed to retrieve cargo path: {:?}", error))
+    .map_err(|error| format!("Failed to retrieve cargo path: {error:?}"))
     .and_then(|cargo| {
         let cargo = cargo.trim().to_owned();
-        if cargo.is_empty() { Err(format!("`cargo` path is empty")) } else { Ok(cargo) }
+        if cargo.is_empty() { Err("`cargo` path is empty".to_string()) } else { Ok(cargo) }
     })?;
     let rustc = String::from_utf8(
         run_command_with_env(&[&"rustup", &toolchain, &"which", &"rustc"], rust_dir, Some(env))?
             .stdout,
     )
-    .map_err(|error| format!("Failed to retrieve rustc path: {:?}", error))
+    .map_err(|error| format!("Failed to retrieve rustc path: {error:?}"))
     .and_then(|rustc| {
         let rustc = rustc.trim().to_owned();
-        if rustc.is_empty() { Err(format!("`rustc` path is empty")) } else { Ok(rustc) }
+        if rustc.is_empty() { Err("`rustc` path is empty".to_string()) } else { Ok(rustc) }
     })?;
     let llvm_filecheck = match run_command_with_env(
         &[
@@ -479,7 +534,8 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
           which FileCheck-11 || \
           which FileCheck-12 || \
           which FileCheck-13 || \
-          which FileCheck-14",
+          which FileCheck-14 || \
+          which FileCheck",
         ],
         rust_dir,
         Some(env),
@@ -487,13 +543,15 @@ fn setup_rustc(env: &mut Env, args: &TestArg) -> Result<PathBuf, String> {
         Ok(cmd) => String::from_utf8_lossy(&cmd.stdout).to_string(),
         Err(_) => {
             eprintln!("Failed to retrieve LLVM FileCheck, ignoring...");
+            // FIXME: the test tests/run-make/no-builtins-attribute will fail if we cannot find
+            // FileCheck.
             String::new()
         }
     };
     let file_path = rust_dir_path.join("config.toml");
     std::fs::write(
         &file_path,
-        &format!(
+        format!(
             r#"change-id = 115898
 
 [rust]
@@ -532,7 +590,7 @@ fn asm_tests(env: &Env, args: &TestArg) -> Result<(), String> {
     let codegen_backend_path = format!(
         "{pwd}/target/{channel}/librustc_codegen_gcc.{dylib_ext}",
         pwd = std::env::current_dir()
-            .map_err(|error| format!("`current_dir` failed: {:?}", error))?
+            .map_err(|error| format!("`current_dir` failed: {error:?}"))?
             .display(),
         channel = args.config_info.channel.as_str(),
         dylib_ext = args.config_info.dylib_ext,
@@ -587,11 +645,11 @@ where
     F: Fn(&[&dyn AsRef<OsStr>], Option<&Path>, &Env) -> Result<(), String>,
 {
     let toolchain = get_toolchain()?;
-    let toolchain_arg = format!("+{}", toolchain);
+    let toolchain_arg = format!("+{toolchain}");
     let rustc_version = String::from_utf8(
         run_command_with_env(&[&args.config_info.rustc_command[0], &"-V"], cwd, Some(env))?.stdout,
     )
-    .map_err(|error| format!("Failed to retrieve rustc version: {:?}", error))?;
+    .map_err(|error| format!("Failed to retrieve rustc version: {error:?}"))?;
     let rustc_toolchain_version = String::from_utf8(
         run_command_with_env(
             &[&args.config_info.rustc_command[0], &toolchain_arg, &"-V"],
@@ -600,20 +658,19 @@ where
         )?
         .stdout,
     )
-    .map_err(|error| format!("Failed to retrieve rustc +toolchain version: {:?}", error))?;
+    .map_err(|error| format!("Failed to retrieve rustc +toolchain version: {error:?}"))?;
 
     if rustc_version != rustc_toolchain_version {
         eprintln!(
-            "rustc_codegen_gcc is built for `{}` but the default rustc version is `{}`.",
-            rustc_toolchain_version, rustc_version,
+            "rustc_codegen_gcc is built for `{rustc_toolchain_version}` but the default rustc version is `{rustc_version}`.",
         );
-        eprintln!("Using `{}`.", rustc_toolchain_version);
+        eprintln!("Using `{rustc_toolchain_version}`.");
     }
     let mut env = env.clone();
     let rustflags = env.get("RUSTFLAGS").cloned().unwrap_or_default();
     env.insert("RUSTDOCFLAGS".to_string(), rustflags);
     let mut cargo_command: Vec<&dyn AsRef<OsStr>> = vec![&"cargo", &toolchain_arg];
-    cargo_command.extend_from_slice(&command);
+    cargo_command.extend_from_slice(command);
     callback(&cargo_command, cwd, &env)
 }
 
@@ -680,7 +737,15 @@ fn test_libcore(env: &Env, args: &TestArg) -> Result<(), String> {
     println!("[TEST] libcore");
     let path = get_sysroot_dir().join("sysroot_src/library/coretests");
     let _ = remove_dir_all(path.join("target"));
-    run_cargo_command(&[&"test"], Some(&path), env, args)?;
+    // TODO(antoyo): run in release mode when we fix the failures.
+    // TODO(antoyo): remove the --skip f16::test_total_cmp when this issue is fixed:
+    // https://github.com/rust-lang/rust/issues/141503
+    run_cargo_command(
+        &[&"test", &"--", &"--skip", &"f16::test_total_cmp"],
+        Some(&path),
+        env,
+        args,
+    )?;
     Ok(())
 }
 
@@ -818,7 +883,7 @@ fn contains_ui_error_patterns(file_path: &Path, keep_lto_tests: bool) -> Result<
     // Tests generating errors.
     let file = File::open(file_path)
         .map_err(|error| format!("Failed to read `{}`: {:?}", file_path.display(), error))?;
-    for line in BufReader::new(file).lines().filter_map(|line| line.ok()) {
+    for line in BufReader::new(file).lines().map_while(Result::ok) {
         let line = line.trim();
         if line.is_empty() {
             continue;
@@ -887,7 +952,7 @@ where
 
     if !prepare_files_callback(&rust_path)? {
         // FIXME: create a function "display_if_not_quiet" or something along the line.
-        println!("Keeping all {} tests", test_type);
+        println!("Keeping all {test_type} tests");
     }
 
     if test_type == "ui" {
@@ -919,8 +984,7 @@ where
                         "borrowck",
                         "test-attrs",
                     ]
-                    .iter()
-                    .any(|name| *name == dir_name)
+                    .contains(&dir_name)
                     {
                         remove_dir_all(dir).map_err(|error| {
                             format!("Failed to remove folder `{}`: {:?}", dir.display(), error)
@@ -975,10 +1039,7 @@ where
         if nb_parts > 0 {
             let current_part = args.current_part.unwrap();
             // FIXME: create a function "display_if_not_quiet" or something along the line.
-            println!(
-                "Splitting ui_test into {} parts (and running part {})",
-                nb_parts, current_part
-            );
+            println!("Splitting ui_test into {nb_parts} parts (and running part {current_part})");
             let out = String::from_utf8(
                 run_command(
                     &[
@@ -996,7 +1057,7 @@ where
                 )?
                 .stdout,
             )
-            .map_err(|error| format!("Failed to retrieve output of find command: {:?}", error))?;
+            .map_err(|error| format!("Failed to retrieve output of find command: {error:?}"))?;
             let mut files = out
                 .split('\n')
                 .map(|line| line.trim())
@@ -1016,7 +1077,7 @@ where
     }
 
     // FIXME: create a function "display_if_not_quiet" or something along the line.
-    println!("[TEST] rustc {} test suite", test_type);
+    println!("[TEST] rustc {test_type} test suite");
     env.insert("COMPILETEST_FORCE_STAGE0".to_string(), "1".to_string());
 
     let extra =
@@ -1040,7 +1101,7 @@ where
             &"always",
             &"--stage",
             &"0",
-            &format!("tests/{}", test_type),
+            &format!("tests/{test_type}"),
             &"--compiletest-rustc-args",
             &rustc_args,
         ],
@@ -1051,19 +1112,18 @@ where
 }
 
 fn test_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    //test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
+    test_rustc_inner(env, args, |_| Ok(false), false, "run-make")?;
     test_rustc_inner(env, args, |_| Ok(false), false, "ui")
 }
 
 fn test_failing_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
-    let result1 = Ok(());
-    /*test_rustc_inner(
+    let result1 = test_rustc_inner(
         env,
         args,
         retain_files_callback("tests/failing-run-make-tests.txt", "run-make"),
         false,
         "run-make",
-    )*/
+    );
 
     let result2 = test_rustc_inner(
         env,
@@ -1084,14 +1144,13 @@ fn test_successful_rustc(env: &Env, args: &TestArg) -> Result<(), String> {
         false,
         "ui",
     )?;
-    Ok(())
-    /*test_rustc_inner(
+    test_rustc_inner(
         env,
         args,
         remove_files_callback("tests/failing-run-make-tests.txt", "run-make"),
         false,
         "run-make",
-    )*/
+    )
 }
 
 fn test_failing_ui_pattern_tests(env: &Env, args: &TestArg) -> Result<(), String> {
@@ -1118,7 +1177,7 @@ fn retain_files_callback<'a>(
             run_command(
                 &[
                     &"find",
-                    &format!("tests/{}", test_type),
+                    &format!("tests/{test_type}"),
                     &"-mindepth",
                     &"1",
                     &"-type",
@@ -1137,7 +1196,7 @@ fn retain_files_callback<'a>(
             run_command(
                 &[
                     &"find",
-                    &format!("tests/{}", test_type),
+                    &format!("tests/{test_type}"),
                     &"-type",
                     &"f",
                     &"-name",
@@ -1152,15 +1211,12 @@ fn retain_files_callback<'a>(
         }
 
         // Putting back only the failing ones.
-        if let Ok(files) = std::fs::read_to_string(&file_path) {
+        if let Ok(files) = std::fs::read_to_string(file_path) {
             for file in files.split('\n').map(|line| line.trim()).filter(|line| !line.is_empty()) {
-                run_command(&[&"git", &"checkout", &"--", &file], Some(&rust_path))?;
+                run_command(&[&"git", &"checkout", &"--", &file], Some(rust_path))?;
             }
         } else {
-            println!(
-                "Failed to read `{}`, not putting back failing {} tests",
-                file_path, test_type
-            );
+            println!("Failed to read `{file_path}`, not putting back failing {test_type} tests");
         }
 
         Ok(true)
@@ -1188,8 +1244,7 @@ fn remove_files_callback<'a>(
                 }
             } else {
                 println!(
-                    "Failed to read `{}`, not putting back failing {} tests",
-                    file_path, test_type
+                    "Failed to read `{file_path}`, not putting back failing {test_type} tests"
                 );
             }
         } else {
@@ -1202,7 +1257,7 @@ fn remove_files_callback<'a>(
                     remove_file(&path)?;
                 }
             } else {
-                println!("Failed to read `{}`, not putting back failing ui tests", file_path);
+                println!("Failed to read `{file_path}`, not putting back failing ui tests");
             }
         }
         Ok(true)
@@ -1217,7 +1272,9 @@ fn run_all(env: &Env, args: &TestArg) -> Result<(), String> {
     // asm_tests(env, args)?;
     test_libcore(env, args)?;
     extended_sysroot_tests(env, args)?;
+    cargo_tests(env, args)?;
     test_rustc(env, args)?;
+
     Ok(())
 }
 
diff --git a/compiler/rustc_codegen_gcc/build_system/src/utils.rs b/compiler/rustc_codegen_gcc/build_system/src/utils.rs
index ca177a5feb8..d77707d5f17 100644
--- a/compiler/rustc_codegen_gcc/build_system/src/utils.rs
+++ b/compiler/rustc_codegen_gcc/build_system/src/utils.rs
@@ -1,7 +1,5 @@
 use std::collections::HashMap;
 use std::ffi::OsStr;
-#[cfg(unix)]
-use std::ffi::c_int;
 use std::fmt::Debug;
 use std::fs;
 #[cfg(unix)]
@@ -9,11 +7,6 @@ use std::os::unix::process::ExitStatusExt;
 use std::path::{Path, PathBuf};
 use std::process::{Command, ExitStatus, Output};
 
-#[cfg(unix)]
-unsafe extern "C" {
-    fn raise(signal: c_int) -> c_int;
-}
-
 fn exec_command(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
@@ -27,17 +20,14 @@ fn exec_command(
     #[cfg(unix)]
     {
         if let Some(signal) = status.signal() {
-            unsafe {
-                raise(signal as _);
-            }
             // In case the signal didn't kill the current process.
-            return Err(command_error(input, &cwd, format!("Process received signal {}", signal)));
+            return Err(command_error(input, &cwd, format!("Process received signal {signal}")));
         }
     }
     Ok(status)
 }
 
-fn get_command_inner(
+pub(crate) fn get_command_inner(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
     env: Option<&HashMap<String, String>>,
@@ -75,18 +65,18 @@ fn check_exit_status(
     );
     let input = input.iter().map(|i| i.as_ref()).collect::<Vec<&OsStr>>();
     if show_err {
-        eprintln!("Command `{:?}` failed", input);
+        eprintln!("Command `{input:?}` failed");
     }
     if let Some(output) = output {
         let stdout = String::from_utf8_lossy(&output.stdout);
         if !stdout.is_empty() {
             error.push_str("\n==== STDOUT ====\n");
-            error.push_str(&*stdout);
+            error.push_str(&stdout);
         }
         let stderr = String::from_utf8_lossy(&output.stderr);
         if !stderr.is_empty() {
             error.push_str("\n==== STDERR ====\n");
-            error.push_str(&*stderr);
+            error.push_str(&stderr);
         }
     }
     Err(error)
@@ -136,6 +126,7 @@ pub fn run_command_with_output_and_env(
     Ok(())
 }
 
+#[cfg(not(unix))]
 pub fn run_command_with_output_and_env_no_err(
     input: &[&dyn AsRef<OsStr>],
     cwd: Option<&Path>,
@@ -242,7 +233,7 @@ pub fn get_toolchain() -> Result<String, String> {
             if !line.starts_with("channel") {
                 return None;
             }
-            line.split('"').skip(1).next()
+            line.split('"').nth(1)
         })
         .next()
     {
@@ -281,7 +272,7 @@ fn git_clone_inner(
 }
 
 fn get_repo_name(url: &str) -> String {
-    let repo_name = url.split('/').last().unwrap();
+    let repo_name = url.split('/').next_back().unwrap();
     match repo_name.strip_suffix(".git") {
         Some(n) => n.to_string(),
         None => repo_name.to_string(),
diff --git a/compiler/rustc_codegen_gcc/example/arbitrary_self_types_pointers_and_wrappers.rs b/compiler/rustc_codegen_gcc/example/arbitrary_self_types_pointers_and_wrappers.rs
index b299aa87974..c26606f0bdd 100644
--- a/compiler/rustc_codegen_gcc/example/arbitrary_self_types_pointers_and_wrappers.rs
+++ b/compiler/rustc_codegen_gcc/example/arbitrary_self_types_pointers_and_wrappers.rs
@@ -37,10 +37,6 @@ impl<T: DispatchFromDyn<U>, U> DispatchFromDyn<Wrapper<U>> for Wrapper<T> {}
 
 
 trait Trait {
-    // This method isn't object-safe yet. Unsized by-value `self` is object-safe (but not callable
-    // without unsized_locals), but wrappers around `Self` currently are not.
-    // FIXME (mikeyhew) uncomment this when unsized rvalues object-safety is implemented
-    // fn wrapper(self: Wrapper<Self>) -> i32;
     fn ptr_wrapper(self: Ptr<Wrapper<Self>>) -> i32;
     fn wrapper_ptr(self: Wrapper<Ptr<Self>>) -> i32;
     fn wrapper_ptr_wrapper(self: Wrapper<Ptr<Wrapper<Self>>>) -> i32;
diff --git a/compiler/rustc_codegen_gcc/example/mini_core.rs b/compiler/rustc_codegen_gcc/example/mini_core.rs
index d1d8e8fd5bc..9dfb12be243 100644
--- a/compiler/rustc_codegen_gcc/example/mini_core.rs
+++ b/compiler/rustc_codegen_gcc/example/mini_core.rs
@@ -19,8 +19,14 @@ unsafe extern "C" fn _Unwind_Resume() {
     intrinsics::unreachable();
 }
 
+#[lang = "pointee_sized"]
+pub trait PointeeSized {}
+
+#[lang = "meta_sized"]
+pub trait MetaSized: PointeeSized {}
+
 #[lang = "sized"]
-pub trait Sized {}
+pub trait Sized: MetaSized {}
 
 #[lang = "destruct"]
 pub trait Destruct {}
@@ -29,35 +35,35 @@ pub trait Destruct {}
 pub trait Tuple {}
 
 #[lang = "unsize"]
-pub trait Unsize<T: ?Sized> {}
+pub trait Unsize<T: PointeeSized>: PointeeSized {}
 
 #[lang = "coerce_unsized"]
 pub trait CoerceUnsized<T> {}
 
-impl<'a, 'b: 'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a U> for &'b T {}
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<&'a mut U> for &'a mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*const U> for *const T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> CoerceUnsized<*mut U> for *mut T {}
+impl<'a, 'b: 'a, T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<&'a U> for &'b T {}
+impl<'a, T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<&'a mut U> for &'a mut T {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<*const U> for *const T {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> CoerceUnsized<*mut U> for *mut T {}
 
 #[lang = "dispatch_from_dyn"]
 pub trait DispatchFromDyn<T> {}
 
 // &T -> &U
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<&'a U> for &'a T {}
+impl<'a, T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<&'a U> for &'a T {}
 // &mut T -> &mut U
-impl<'a, T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<&'a mut U> for &'a mut T {}
+impl<'a, T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<&'a mut U> for &'a mut T {}
 // *const T -> *const U
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<*const U> for *const T {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<*const U> for *const T {}
 // *mut T -> *mut U
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<*mut U> for *mut T {}
-impl<T: ?Sized + Unsize<U>, U: ?Sized> DispatchFromDyn<Box<U, ()>> for Box<T, ()> {}
+impl<T: PointeeSized + Unsize<U>, U: PointeeSized> DispatchFromDyn<*mut U> for *mut T {}
+impl<T: MetaSized + Unsize<U>, U: MetaSized> DispatchFromDyn<Box<U, ()>> for Box<T, ()> {}
 
 #[lang = "legacy_receiver"]
 pub trait LegacyReceiver {}
 
-impl<T: ?Sized> LegacyReceiver for &T {}
-impl<T: ?Sized> LegacyReceiver for &mut T {}
-impl<T: ?Sized, A: Allocator> LegacyReceiver for Box<T, A> {}
+impl<T: PointeeSized> LegacyReceiver for &T {}
+impl<T: PointeeSized> LegacyReceiver for &mut T {}
+impl<T: MetaSized> LegacyReceiver for Box<T> {}
 
 #[lang = "receiver"]
 trait Receiver {}
@@ -84,9 +90,9 @@ impl Copy for i128 {}
 impl Copy for f32 {}
 impl Copy for f64 {}
 impl Copy for char {}
-impl<'a, T: ?Sized> Copy for &'a T {}
-impl<T: ?Sized> Copy for *const T {}
-impl<T: ?Sized> Copy for *mut T {}
+impl<'a, T: PointeeSized> Copy for &'a T {}
+impl<T: PointeeSized> Copy for *const T {}
+impl<T: PointeeSized> Copy for *mut T {}
 
 #[lang = "sync"]
 pub unsafe trait Sync {}
@@ -102,17 +108,17 @@ unsafe impl Sync for i16 {}
 unsafe impl Sync for i32 {}
 unsafe impl Sync for isize {}
 unsafe impl Sync for char {}
-unsafe impl<'a, T: ?Sized> Sync for &'a T {}
+unsafe impl<'a, T: PointeeSized> Sync for &'a T {}
 unsafe impl Sync for [u8; 16] {}
 
 #[lang = "freeze"]
 unsafe auto trait Freeze {}
 
-unsafe impl<T: ?Sized> Freeze for PhantomData<T> {}
-unsafe impl<T: ?Sized> Freeze for *const T {}
-unsafe impl<T: ?Sized> Freeze for *mut T {}
-unsafe impl<T: ?Sized> Freeze for &T {}
-unsafe impl<T: ?Sized> Freeze for &mut T {}
+unsafe impl<T: PointeeSized> Freeze for PhantomData<T> {}
+unsafe impl<T: PointeeSized> Freeze for *const T {}
+unsafe impl<T: PointeeSized> Freeze for *mut T {}
+unsafe impl<T: PointeeSized> Freeze for &T {}
+unsafe impl<T: PointeeSized> Freeze for &mut T {}
 
 #[lang = "structural_peq"]
 pub trait StructuralPartialEq {}
@@ -456,7 +462,7 @@ pub enum Option<T> {
 pub use Option::*;
 
 #[lang = "phantom_data"]
-pub struct PhantomData<T: ?Sized>;
+pub struct PhantomData<T: PointeeSized>;
 
 #[lang = "fn_once"]
 #[rustc_paren_sugar]
@@ -576,18 +582,18 @@ impl Allocator for Global {}
 #[repr(transparent)]
 #[rustc_layout_scalar_valid_range_start(1)]
 #[rustc_nonnull_optimization_guaranteed]
-pub struct NonNull<T: ?Sized>(pub *const T);
+pub struct NonNull<T: PointeeSized>(pub *const T);
 
-impl<T: ?Sized, U: ?Sized> CoerceUnsized<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
-impl<T: ?Sized, U: ?Sized> DispatchFromDyn<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> CoerceUnsized<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> DispatchFromDyn<NonNull<U>> for NonNull<T> where T: Unsize<U> {}
 
-pub struct Unique<T: ?Sized> {
+pub struct Unique<T: PointeeSized> {
     pub pointer: NonNull<T>,
     pub _marker: PhantomData<T>,
 }
 
-impl<T: ?Sized, U: ?Sized> CoerceUnsized<Unique<U>> for Unique<T> where T: Unsize<U> {}
-impl<T: ?Sized, U: ?Sized> DispatchFromDyn<Unique<U>> for Unique<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> CoerceUnsized<Unique<U>> for Unique<T> where T: Unsize<U> {}
+impl<T: PointeeSized, U: PointeeSized> DispatchFromDyn<Unique<U>> for Unique<T> where T: Unsize<U> {}
 
 #[lang = "owned_box"]
 pub struct Box<T: ?Sized, A: Allocator = Global>(Unique<T>, A);
@@ -655,9 +661,9 @@ pub mod intrinsics {
     #[rustc_intrinsic]
     pub unsafe fn size_of_val<T: ?::Sized>(val: *const T) -> usize;
     #[rustc_intrinsic]
-    pub fn min_align_of<T>() -> usize;
+    pub fn align_of<T>() -> usize;
     #[rustc_intrinsic]
-    pub unsafe fn min_align_of_val<T: ?::Sized>(val: *const T) -> usize;
+    pub unsafe fn align_of_val<T: ?::Sized>(val: *const T) -> usize;
     #[rustc_intrinsic]
     pub unsafe fn copy<T>(src: *const T, dst: *mut T, count: usize);
     #[rustc_intrinsic]
diff --git a/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs b/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs
index 4cbe66c5e4c..c3bd62e5897 100644
--- a/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs
+++ b/compiler/rustc_codegen_gcc/example/mini_core_hello_world.rs
@@ -153,7 +153,7 @@ fn main() {
     let slice = &[0, 1] as &[i32];
     let slice_ptr = slice as *const [i32] as *const i32;
 
-    let align = intrinsics::min_align_of::<*const i32>();
+    let align = intrinsics::align_of::<*const i32>();
     assert_eq!(slice_ptr as usize % align, 0);
 
     //return;
@@ -194,8 +194,8 @@ fn main() {
         assert_eq!(intrinsics::size_of_val(a) as u8, 8);
         assert_eq!(intrinsics::size_of_val(&0u32) as u8, 4);
 
-        assert_eq!(intrinsics::min_align_of::<u16>() as u8, 2);
-        assert_eq!(intrinsics::min_align_of_val(&a) as u8, intrinsics::min_align_of::<&str>() as u8);
+        assert_eq!(intrinsics::align_of::<u16>() as u8, 2);
+        assert_eq!(intrinsics::align_of_val(&a) as u8, intrinsics::align_of::<&str>() as u8);
 
         assert!(!intrinsics::needs_drop::<u8>());
         assert!(!intrinsics::needs_drop::<[u8]>());
diff --git a/compiler/rustc_codegen_gcc/example/std_example.rs b/compiler/rustc_codegen_gcc/example/std_example.rs
index 5fa1e0afb06..7587b4827ca 100644
--- a/compiler/rustc_codegen_gcc/example/std_example.rs
+++ b/compiler/rustc_codegen_gcc/example/std_example.rs
@@ -77,18 +77,18 @@ fn main() {
     assert_eq!(tmp as i128, -0x1234_5678_9ABC_DEF0i128);
 
     // Check that all u/i128 <-> float casts work correctly.
-    let houndred_u128 = 100u128;
-    let houndred_i128 = 100i128;
-    let houndred_f32 = 100.0f32;
-    let houndred_f64 = 100.0f64;
-    assert_eq!(houndred_u128 as f32, 100.0);
-    assert_eq!(houndred_u128 as f64, 100.0);
-    assert_eq!(houndred_f32 as u128, 100);
-    assert_eq!(houndred_f64 as u128, 100);
-    assert_eq!(houndred_i128 as f32, 100.0);
-    assert_eq!(houndred_i128 as f64, 100.0);
-    assert_eq!(houndred_f32 as i128, 100);
-    assert_eq!(houndred_f64 as i128, 100);
+    let hundred_u128 = 100u128;
+    let hundred_i128 = 100i128;
+    let hundred_f32 = 100.0f32;
+    let hundred_f64 = 100.0f64;
+    assert_eq!(hundred_u128 as f32, 100.0);
+    assert_eq!(hundred_u128 as f64, 100.0);
+    assert_eq!(hundred_f32 as u128, 100);
+    assert_eq!(hundred_f64 as u128, 100);
+    assert_eq!(hundred_i128 as f32, 100.0);
+    assert_eq!(hundred_i128 as f64, 100.0);
+    assert_eq!(hundred_f32 as i128, 100);
+    assert_eq!(hundred_f64 as i128, 100);
 
     let _a = 1u32 << 2u8;
 
diff --git a/compiler/rustc_codegen_gcc/messages.ftl b/compiler/rustc_codegen_gcc/messages.ftl
index 546bfc87b68..18a8a5a1e04 100644
--- a/compiler/rustc_codegen_gcc/messages.ftl
+++ b/compiler/rustc_codegen_gcc/messages.ftl
@@ -2,9 +2,6 @@ codegen_gcc_unknown_ctarget_feature_prefix =
     unknown feature specified for `-Ctarget-feature`: `{$feature}`
     .note = features must begin with a `+` to enable or `-` to disable it
 
-codegen_gcc_forbidden_ctarget_feature =
-    target feature `{$feature}` cannot be toggled with `-Ctarget-feature`: {$reason}
-
 codegen_gcc_unwinding_inline_asm =
     GCC backend does not support unwinding from inline asm
 
@@ -26,10 +23,6 @@ codegen_gcc_unknown_ctarget_feature =
     .possible_feature = you might have meant: `{$rust_feature}`
     .consider_filing_feature_request = consider filing a feature request
 
-codegen_gcc_unstable_ctarget_feature =
-    unstable feature specified for `-Ctarget-feature`: `{$feature}`
-    .note = this feature is not stably supported; its behavior can change in the future
-
 codegen_gcc_missing_features =
     add the missing features in a `target_feature` attribute
 
diff --git a/compiler/rustc_codegen_gcc/patches/0001-Pin-compiler_builtins-to-0.1.160.patch b/compiler/rustc_codegen_gcc/patches/0001-Pin-compiler_builtins-to-0.1.160.patch
new file mode 100644
index 00000000000..39266e081ed
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/patches/0001-Pin-compiler_builtins-to-0.1.160.patch
@@ -0,0 +1,39 @@
+From cdb3d407740e4f15c3746051f8ba89b8e74e99d3 Mon Sep 17 00:00:00 2001
+From: None <none@example.com>
+Date: Fri, 30 May 2025 13:46:22 -0400
+Subject: [PATCH] Pin compiler_builtins to 0.1.160
+
+---
+ library/alloc/Cargo.toml | 2 +-
+ library/std/Cargo.toml   | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/library/alloc/Cargo.toml b/library/alloc/Cargo.toml
+index 9d0d957..365c9dc 100644
+--- a/library/alloc/Cargo.toml
++++ b/library/alloc/Cargo.toml
+@@ -16,7 +16,7 @@ bench = false
+ 
+ [dependencies]
+ core = { path = "../core", public = true }
+-compiler_builtins = { version = "=0.1.159", features = ['rustc-dep-of-std'] }
++compiler_builtins = { version = "=0.1.160", features = ['rustc-dep-of-std'] }
+ 
+ [features]
+ compiler-builtins-mem = ['compiler_builtins/mem']
+diff --git a/library/std/Cargo.toml b/library/std/Cargo.toml
+index 4ff4895..31371f0 100644
+--- a/library/std/Cargo.toml
++++ b/library/std/Cargo.toml
+@@ -18,7 +18,7 @@ cfg-if = { version = "1.0", features = ['rustc-dep-of-std'] }
+ panic_unwind = { path = "../panic_unwind", optional = true }
+ panic_abort = { path = "../panic_abort" }
+ core = { path = "../core", public = true }
+-compiler_builtins = { version = "=0.1.159" }
++compiler_builtins = { version = "=0.1.160" }
+ unwind = { path = "../unwind" }
+ hashbrown = { version = "0.15", default-features = false, features = [
+     'rustc-dep-of-std',
+-- 
+2.49.0
+
diff --git a/compiler/rustc_codegen_gcc/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch b/compiler/rustc_codegen_gcc/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch
new file mode 100644
index 00000000000..a329d09a95e
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/patches/tests/0001-Workaround-to-make-a-run-make-test-pass.patch
@@ -0,0 +1,25 @@
+From a131c69e54b5c02fe3b517e8f3ad23d4f784ffc8 Mon Sep 17 00:00:00 2001
+From: Antoni Boucher <bouanto@zoho.com>
+Date: Fri, 13 Jun 2025 20:25:33 -0400
+Subject: [PATCH] Workaround to make a run-make test pass
+
+---
+ tests/run-make/linker-warning/rmake.rs | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/tests/run-make/linker-warning/rmake.rs b/tests/run-make/linker-warning/rmake.rs
+index bc21739fefc..0946a7e2a48 100644
+--- a/tests/run-make/linker-warning/rmake.rs
++++ b/tests/run-make/linker-warning/rmake.rs
+@@ -55,7 +55,7 @@ fn main() {
+         diff()
+             .expected_file("short-error.txt")
+             .actual_text("(linker error)", out.stderr())
+-            .normalize(r#"/rustc[^/]*/"#, "/rustc/")
++            .normalize(r#"/tmp/rustc[^/]*/"#, "/tmp/rustc/")
+             .normalize(
+                 regex::escape(run_make_support::build_root().to_str().unwrap()),
+                 "/build-root",
+-- 
+2.49.0
+
diff --git a/compiler/rustc_codegen_gcc/rust-toolchain b/compiler/rustc_codegen_gcc/rust-toolchain
index a8cda28688c..bafe497a2a2 100644
--- a/compiler/rustc_codegen_gcc/rust-toolchain
+++ b/compiler/rustc_codegen_gcc/rust-toolchain
@@ -1,3 +1,3 @@
 [toolchain]
-channel = "nightly-2025-05-12"
+channel = "nightly-2025-05-21"
 components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
diff --git a/compiler/rustc_codegen_gcc/src/abi.rs b/compiler/rustc_codegen_gcc/src/abi.rs
index 3d0c258f576..08f3d281904 100644
--- a/compiler/rustc_codegen_gcc/src/abi.rs
+++ b/compiler/rustc_codegen_gcc/src/abi.rs
@@ -239,12 +239,16 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: &str) -> Option<FnAttribute<'gcc>> {
     let attribute = match conv {
         CanonAbi::C | CanonAbi::Rust => return None,
+        CanonAbi::RustCold => FnAttribute::Cold,
+        // Functions with this calling convention can only be called from assembly, but it is
+        // possible to declare an `extern "custom"` block, so the backend still needs a calling
+        // convention for declaring foreign functions.
+        CanonAbi::Custom => return None,
         CanonAbi::Arm(arm_call) => match arm_call {
             ArmCall::CCmseNonSecureCall => FnAttribute::ArmCmseNonsecureCall,
             ArmCall::CCmseNonSecureEntry => FnAttribute::ArmCmseNonsecureEntry,
             ArmCall::Aapcs => FnAttribute::ArmPcs("aapcs"),
         },
-        CanonAbi::RustCold => FnAttribute::Cold,
         CanonAbi::GpuKernel => {
             if arch == "amdgpu" {
                 FnAttribute::GcnAmdGpuHsaKernel
diff --git a/compiler/rustc_codegen_gcc/src/allocator.rs b/compiler/rustc_codegen_gcc/src/allocator.rs
index f4ebd42ee2d..cf8aa500c77 100644
--- a/compiler/rustc_codegen_gcc/src/allocator.rs
+++ b/compiler/rustc_codegen_gcc/src/allocator.rs
@@ -57,7 +57,7 @@ pub(crate) unsafe fn codegen(
             let from_name = mangle_internal_symbol(tcx, &global_fn_name(method.name));
             let to_name = mangle_internal_symbol(tcx, &default_fn_name(method.name));
 
-            create_wrapper_function(tcx, context, &from_name, &to_name, &types, output);
+            create_wrapper_function(tcx, context, &from_name, Some(&to_name), &types, output);
         }
     }
 
@@ -66,7 +66,7 @@ pub(crate) unsafe fn codegen(
         tcx,
         context,
         &mangle_internal_symbol(tcx, "__rust_alloc_error_handler"),
-        &mangle_internal_symbol(tcx, alloc_error_handler_name(alloc_error_handler_kind)),
+        Some(&mangle_internal_symbol(tcx, alloc_error_handler_name(alloc_error_handler_kind))),
         &[usize, usize],
         None,
     );
@@ -81,21 +81,21 @@ pub(crate) unsafe fn codegen(
     let value = context.new_rvalue_from_int(i8, value as i32);
     global.global_set_initializer_rvalue(value);
 
-    let name = mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE);
-    let global = context.new_global(None, GlobalKind::Exported, i8, name);
-    #[cfg(feature = "master")]
-    global.add_attribute(VarAttribute::Visibility(symbol_visibility_to_gcc(
-        tcx.sess.default_visibility(),
-    )));
-    let value = context.new_rvalue_from_int(i8, 0);
-    global.global_set_initializer_rvalue(value);
+    create_wrapper_function(
+        tcx,
+        context,
+        &mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE),
+        None,
+        &[],
+        None,
+    );
 }
 
 fn create_wrapper_function(
     tcx: TyCtxt<'_>,
     context: &Context<'_>,
     from_name: &str,
-    to_name: &str,
+    to_name: Option<&str>,
     types: &[Type<'_>],
     output: Option<Type<'_>>,
 ) {
@@ -124,34 +124,40 @@ fn create_wrapper_function(
         // TODO(antoyo): emit unwind tables.
     }
 
-    let args: Vec<_> = types
-        .iter()
-        .enumerate()
-        .map(|(index, typ)| context.new_parameter(None, *typ, format!("param{}", index)))
-        .collect();
-    let callee = context.new_function(
-        None,
-        FunctionType::Extern,
-        output.unwrap_or(void),
-        &args,
-        to_name,
-        false,
-    );
-    #[cfg(feature = "master")]
-    callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
-
     let block = func.new_block("entry");
 
-    let args = args
-        .iter()
-        .enumerate()
-        .map(|(i, _)| func.get_param(i as i32).to_rvalue())
-        .collect::<Vec<_>>();
-    let ret = context.new_call(None, callee, &args);
-    //llvm::LLVMSetTailCall(ret, True);
-    if output.is_some() {
-        block.end_with_return(None, ret);
+    if let Some(to_name) = to_name {
+        let args: Vec<_> = types
+            .iter()
+            .enumerate()
+            .map(|(index, typ)| context.new_parameter(None, *typ, format!("param{}", index)))
+            .collect();
+        let callee = context.new_function(
+            None,
+            FunctionType::Extern,
+            output.unwrap_or(void),
+            &args,
+            to_name,
+            false,
+        );
+        #[cfg(feature = "master")]
+        callee.add_attribute(FnAttribute::Visibility(gccjit::Visibility::Hidden));
+
+        let args = args
+            .iter()
+            .enumerate()
+            .map(|(i, _)| func.get_param(i as i32).to_rvalue())
+            .collect::<Vec<_>>();
+        let ret = context.new_call(None, callee, &args);
+        //llvm::LLVMSetTailCall(ret, True);
+        if output.is_some() {
+            block.end_with_return(None, ret);
+        } else {
+            block.add_eval(None, ret);
+            block.end_with_void_return(None);
+        }
     } else {
+        assert!(output.is_none());
         block.end_with_void_return(None);
     }
 
diff --git a/compiler/rustc_codegen_gcc/src/asm.rs b/compiler/rustc_codegen_gcc/src/asm.rs
index c35337ae7ce..17e2e028b16 100644
--- a/compiler/rustc_codegen_gcc/src/asm.rs
+++ b/compiler/rustc_codegen_gcc/src/asm.rs
@@ -1,3 +1,5 @@
+// cSpell:ignoreRegExp [afkspqvwy]reg
+
 use std::borrow::Cow;
 
 use gccjit::{LValue, RValue, ToRValue, Type};
@@ -138,7 +140,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
         // `outputs.len() + inputs.len()`.
         let mut labels = vec![];
 
-        // Clobbers collected from `out("explicit register") _` and `inout("expl_reg") var => _`
+        // Clobbers collected from `out("explicit register") _` and `inout("explicit_reg") var => _`
         let mut clobbers = vec![];
 
         // We're trying to preallocate space for the template
@@ -203,7 +205,7 @@ impl<'a, 'gcc, 'tcx> AsmBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
                                 // is also used as an in register, do not add it to the clobbers list.
                                 // it will be treated as a lateout register with `out_place: None`
                                 if !late {
-                                    bug!("input registers can only be used as lateout regisers");
+                                    bug!("input registers can only be used as lateout registers");
                                 }
                                 ("r", dummy_output_type(self.cx, reg.reg_class()))
                             } else {
@@ -641,7 +643,8 @@ fn explicit_reg_to_gcc(reg: InlineAsmReg) -> &'static str {
                 },
             }
         }
-
+        InlineAsmReg::Arm(reg) => reg.name(),
+        InlineAsmReg::AArch64(reg) => reg.name(),
         _ => unimplemented!(),
     }
 }
diff --git a/compiler/rustc_codegen_gcc/src/attributes.rs b/compiler/rustc_codegen_gcc/src/attributes.rs
index c853c88a6ea..bf0927dc590 100644
--- a/compiler/rustc_codegen_gcc/src/attributes.rs
+++ b/compiler/rustc_codegen_gcc/src/attributes.rs
@@ -16,7 +16,7 @@ use crate::gcc_util::to_gcc_features;
 /// Checks if the function `instance` is recursively inline.
 /// Returns `false` if a functions is guaranteed to be non-recursive, and `true` if it *might* be recursive.
 #[cfg(feature = "master")]
-fn resursively_inline<'gcc, 'tcx>(
+fn recursively_inline<'gcc, 'tcx>(
     cx: &CodegenCx<'gcc, 'tcx>,
     instance: ty::Instance<'tcx>,
 ) -> bool {
@@ -61,7 +61,7 @@ fn inline_attr<'gcc, 'tcx>(
             //
             // That prevents issues steming from recursive `#[inline(always)]` at a *relatively* small cost.
             // We *only* need to check all the terminators of a function marked with this attribute.
-            if resursively_inline(cx, instance) {
+            if recursively_inline(cx, instance) {
                 Some(FnAttribute::Inline)
             } else {
                 Some(FnAttribute::AlwaysInline)
diff --git a/compiler/rustc_codegen_gcc/src/back/lto.rs b/compiler/rustc_codegen_gcc/src/back/lto.rs
index e9c87f35779..10fce860b77 100644
--- a/compiler/rustc_codegen_gcc/src/back/lto.rs
+++ b/compiler/rustc_codegen_gcc/src/back/lto.rs
@@ -11,11 +11,12 @@
 // does not remove it?
 //
 // TODO(antoyo): for performance, check which optimizations the C++ frontend enables.
-//
+// cSpell:disable
 // Fix these warnings:
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNtCs5JWOrf9uCus_5rayon11thread_pool19WORKER_THREAD_STATE7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: type of symbol `_RNvNvNvNvNtNtNtCsAj5i4SGTR7_3std4sync4mpmc5waker17current_thread_id5DUMMY7___getit5___KEY' changed from 1 to 6 in /tmp/ccKeUSiR.ltrans0.ltrans.o
 // /usr/bin/ld: warning: incremental linking of LTO and non-LTO objects; using -flinker-output=nolto-rel which will bypass whole program optimization
+// cSpell:enable
 use std::ffi::{CStr, CString};
 use std::fs::{self, File};
 use std::path::{Path, PathBuf};
diff --git a/compiler/rustc_codegen_gcc/src/back/write.rs b/compiler/rustc_codegen_gcc/src/back/write.rs
index 09e955acf39..d03d063bdac 100644
--- a/compiler/rustc_codegen_gcc/src/back/write.rs
+++ b/compiler/rustc_codegen_gcc/src/back/write.rs
@@ -186,6 +186,7 @@ pub(crate) fn codegen(
 
                     if fat_lto {
                         let lto_path = format!("{}.lto", path);
+                        // cSpell:disable
                         // FIXME(antoyo): The LTO frontend generates the following warning:
                         // ../build_sysroot/sysroot_src/library/core/src/num/dec2flt/lemire.rs:150:15: warning: type of ‘_ZN4core3num7dec2flt5table17POWER_OF_FIVE_12817ha449a68fb31379e4E’ does not match original declaration [-Wlto-type-mismatch]
                         // 150 |     let (lo5, hi5) = POWER_OF_FIVE_128[index];
@@ -193,6 +194,7 @@ pub(crate) fn codegen(
                         // lto1: note: ‘_ZN4core3num7dec2flt5table17POWER_OF_FIVE_12817ha449a68fb31379e4E’ was previously declared here
                         //
                         // This option is to mute it to make the UI tests pass with LTO enabled.
+                        // cSpell:enable
                         context.add_driver_option("-Wno-lto-type-mismatch");
                         // NOTE: this doesn't actually generate an executable. With the above
                         // flags, it combines the .o files together in another .o.
diff --git a/compiler/rustc_codegen_gcc/src/builder.rs b/compiler/rustc_codegen_gcc/src/builder.rs
index d1fb8d8f9d6..a2e34d1f8fb 100644
--- a/compiler/rustc_codegen_gcc/src/builder.rs
+++ b/compiler/rustc_codegen_gcc/src/builder.rs
@@ -30,7 +30,7 @@ use rustc_middle::ty::{self, AtomicOrdering, Instance, Ty, TyCtxt};
 use rustc_span::Span;
 use rustc_span::def_id::DefId;
 use rustc_target::callconv::FnAbi;
-use rustc_target::spec::{HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, Target, WasmCAbi, X86Abi};
+use rustc_target::spec::{HasTargetSpec, HasX86AbiOpt, Target, X86Abi};
 
 use crate::common::{SignType, TypeReflection, type_is_pointer};
 use crate::context::CodegenCx;
@@ -765,7 +765,15 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
 
         #[cfg(feature = "master")]
         match self.cx.type_kind(a_type) {
-            TypeKind::Half | TypeKind::Float => {
+            TypeKind::Half => {
+                let fmodf = self.context.get_builtin_function("fmodf");
+                let f32_type = self.type_f32();
+                let a = self.context.new_cast(self.location, a, f32_type);
+                let b = self.context.new_cast(self.location, b, f32_type);
+                let result = self.context.new_call(self.location, fmodf, &[a, b]);
+                return self.context.new_cast(self.location, result, a_type);
+            }
+            TypeKind::Float => {
                 let fmodf = self.context.get_builtin_function("fmodf");
                 return self.context.new_call(self.location, fmodf, &[a, b]);
             }
@@ -774,8 +782,19 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
                 return self.context.new_call(self.location, fmod, &[a, b]);
             }
             TypeKind::FP128 => {
-                let fmodl = self.context.get_builtin_function("fmodl");
-                return self.context.new_call(self.location, fmodl, &[a, b]);
+                let f128_type = self.type_f128();
+                let fmodf128 = self.context.new_function(
+                    None,
+                    gccjit::FunctionType::Extern,
+                    f128_type,
+                    &[
+                        self.context.new_parameter(None, f128_type, "a"),
+                        self.context.new_parameter(None, f128_type, "b"),
+                    ],
+                    "fmodf128",
+                    false,
+                );
+                return self.context.new_call(self.location, fmodf128, &[a, b]);
             }
             _ => (),
         }
@@ -897,7 +916,7 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn checked_binop(
         &mut self,
         oop: OverflowOp,
-        typ: Ty<'_>,
+        typ: Ty<'tcx>,
         lhs: Self::Value,
         rhs: Self::Value,
     ) -> (Self::Value, Self::Value) {
@@ -924,7 +943,12 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
         // dereference after a drop, for instance.
         // FIXME(antoyo): this check that we don't call get_aligned() a second time on a type.
         // Ideally, we shouldn't need to do this check.
-        let aligned_type = if pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type {
+        // FractalFir: the `align == self.int128_align` check ensures we *do* call `get_aligned` if
+        // the alignment of a `u128`/`i128` is not the one mandated by the ABI. This ensures we handle
+        // under-aligned loads correctly.
+        let aligned_type = if (pointee_ty == self.cx.u128_type || pointee_ty == self.cx.i128_type)
+            && align == self.int128_align
+        {
             pointee_ty
         } else {
             pointee_ty.get_aligned(align.bytes())
@@ -1010,13 +1034,13 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> {
             let b_offset = a.size(self).align_to(b.align(self).abi);
 
             let mut load = |i, scalar: &abi::Scalar, align| {
-                let llptr = if i == 0 {
+                let ptr = if i == 0 {
                     place.val.llval
                 } else {
                     self.inbounds_ptradd(place.val.llval, self.const_usize(b_offset.bytes()))
                 };
                 let llty = place.layout.scalar_pair_element_gcc_type(self, i);
-                let load = self.load(llty, llptr, align);
+                let load = self.load(llty, ptr, align);
                 scalar_load_metadata(self, load, scalar);
                 if scalar.is_bool() { self.trunc(load, self.type_i1()) } else { load }
             };
@@ -2394,12 +2418,6 @@ impl<'tcx> HasTargetSpec for Builder<'_, '_, 'tcx> {
     }
 }
 
-impl<'tcx> HasWasmCAbiOpt for Builder<'_, '_, 'tcx> {
-    fn wasm_c_abi_opt(&self) -> WasmCAbi {
-        self.cx.wasm_c_abi_opt()
-    }
-}
-
 impl<'tcx> HasX86AbiOpt for Builder<'_, '_, 'tcx> {
     fn x86_abi_opt(&self) -> X86Abi {
         self.cx.x86_abi_opt()
diff --git a/compiler/rustc_codegen_gcc/src/callee.rs b/compiler/rustc_codegen_gcc/src/callee.rs
index c8130b7c010..189ac7cd779 100644
--- a/compiler/rustc_codegen_gcc/src/callee.rs
+++ b/compiler/rustc_codegen_gcc/src/callee.rs
@@ -34,7 +34,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
         unreachable!();
         /*
         // Create a fn pointer with the new signature.
-        let ptrty = fn_abi.ptr_to_gcc_type(cx);
+        let ptrtype = fn_abi.ptr_to_gcc_type(cx);
 
         // This is subtle and surprising, but sometimes we have to bitcast
         // the resulting fn pointer.  The reason has to do with external
@@ -59,7 +59,7 @@ pub fn get_fn<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, instance: Instance<'tcx>)
         // This can occur on either a crate-local or crate-external
         // reference. It also occurs when testing libcore and in some
         // other weird situations. Annoying.
-        if cx.val_ty(func) != ptrty {
+        if cx.val_ty(func) != ptrtype {
             // TODO(antoyo): cast the pointer.
             func
         }
diff --git a/compiler/rustc_codegen_gcc/src/common.rs b/compiler/rustc_codegen_gcc/src/common.rs
index 918195364ff..58ff2f1f8f0 100644
--- a/compiler/rustc_codegen_gcc/src/common.rs
+++ b/compiler/rustc_codegen_gcc/src/common.rs
@@ -9,7 +9,6 @@ use rustc_middle::mir::Mutability;
 use rustc_middle::mir::interpret::{ConstAllocation, GlobalAlloc, Scalar};
 use rustc_middle::ty::layout::LayoutOf;
 
-use crate::consts::const_alloc_to_gcc;
 use crate::context::CodegenCx;
 use crate::type_of::LayoutGccExt;
 
@@ -46,12 +45,65 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 }
 
 pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> RValue<'gcc> {
-    let context = &cx.context;
-    let byte_type = context.new_type::<u8>();
-    let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
-    let elements: Vec<_> =
-        bytes.iter().map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32)).collect();
-    context.new_array_constructor(None, typ, &elements)
+    // Instead of always using an array of bytes, use an array of larger integers of target endianness
+    // if possible. This reduces the amount of `rvalues` we use, which reduces memory usage significantly.
+    //
+    // FIXME(FractalFir): Consider using `global_set_initializer` instead. Before this is done, we need to confirm that
+    // `global_set_initializer` is more memory efficient than the current solution.
+    // `global_set_initializer` calls `global_set_initializer_rvalue` under the hood - does it generate an array of rvalues,
+    // or is it using a more efficient representation?
+    match bytes.len() % 8 {
+        0 => {
+            let context = &cx.context;
+            let byte_type = context.new_type::<u64>();
+            let typ = context.new_array_type(None, byte_type, bytes.len() as u64 / 8);
+            let elements: Vec<_> = bytes
+                .chunks_exact(8)
+                .map(|arr| {
+                    let arr: [u8; 8] = arr.try_into().unwrap();
+                    context.new_rvalue_from_long(
+                        byte_type,
+                        // Since we are representing arbitrary byte runs as integers, we need to follow the target
+                        // endianness.
+                        match cx.sess().target.options.endian {
+                            rustc_abi::Endian::Little => u64::from_le_bytes(arr) as i64,
+                            rustc_abi::Endian::Big => u64::from_be_bytes(arr) as i64,
+                        },
+                    )
+                })
+                .collect();
+            context.new_array_constructor(None, typ, &elements)
+        }
+        4 => {
+            let context = &cx.context;
+            let byte_type = context.new_type::<u32>();
+            let typ = context.new_array_type(None, byte_type, bytes.len() as u64 / 4);
+            let elements: Vec<_> = bytes
+                .chunks_exact(4)
+                .map(|arr| {
+                    let arr: [u8; 4] = arr.try_into().unwrap();
+                    context.new_rvalue_from_int(
+                        byte_type,
+                        match cx.sess().target.options.endian {
+                            rustc_abi::Endian::Little => u32::from_le_bytes(arr) as i32,
+                            rustc_abi::Endian::Big => u32::from_be_bytes(arr) as i32,
+                        },
+                    )
+                })
+                .collect();
+            context.new_array_constructor(None, typ, &elements)
+        }
+        _ => {
+            let context = cx.context;
+            let byte_type = context.new_type::<u8>();
+            let typ = context.new_array_type(None, byte_type, bytes.len() as u64);
+            let elements: Vec<_> = bytes
+                .iter()
+                .map(|&byte| context.new_rvalue_from_int(byte_type, byte as i32))
+                .collect();
+            context.new_array_constructor(None, typ, &elements)
+        }
+    }
 }
 
 pub fn type_is_pointer(typ: Type<'_>) -> bool {
@@ -185,14 +237,15 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
 
                 // FIXME(antoyo): there's some issues with using the u128 code that follows, so hard-code
                 // the paths for floating-point values.
-                if ty == self.float_type {
+                // TODO: Remove this code?
+                /*if ty == self.float_type {
                     return self
                         .context
                         .new_rvalue_from_double(ty, f32::from_bits(data as u32) as f64);
                 }
                 if ty == self.double_type {
                     return self.context.new_rvalue_from_double(ty, f64::from_bits(data as u64));
-                }
+                }*/
 
                 let value = self.const_uint_big(self.type_ix(bitsize), data);
                 let bytesize = layout.size(self).bytes();
@@ -212,7 +265,20 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
                 let alloc_id = prov.alloc_id();
                 let base_addr = match self.tcx.global_alloc(alloc_id) {
                     GlobalAlloc::Memory(alloc) => {
-                        let init = const_alloc_to_gcc(self, alloc);
+                        // For ZSTs directly codegen an aligned pointer.
+                        // This avoids generating a zero-sized constant value and actually needing a
+                        // real address at runtime.
+                        if alloc.inner().len() == 0 {
+                            assert_eq!(offset.bytes(), 0);
+                            let val = self.const_usize(alloc.inner().align.bytes());
+                            return if matches!(layout.primitive(), Pointer(_)) {
+                                self.context.new_cast(None, val, ty)
+                            } else {
+                                self.const_bitcast(val, ty)
+                            };
+                        }
+
+                        let init = self.const_data_from_alloc(alloc);
                         let alloc = alloc.inner();
                         let value = match alloc.mutability {
                             Mutability::Mut => self.static_addr_of_mut(init, alloc.align, None),
@@ -234,7 +300,7 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
                                 }),
                             )))
                             .unwrap_memory();
-                        let init = const_alloc_to_gcc(self, alloc);
+                        let init = self.const_data_from_alloc(alloc);
                         self.static_addr_of(init, alloc.inner().align, None)
                     }
                     GlobalAlloc::Static(def_id) => {
@@ -257,7 +323,19 @@ impl<'gcc, 'tcx> ConstCodegenMethods for CodegenCx<'gcc, 'tcx> {
     }
 
     fn const_data_from_alloc(&self, alloc: ConstAllocation<'_>) -> Self::Value {
-        const_alloc_to_gcc(self, alloc)
+        // We ignore the alignment for the purpose of deduping RValues
+        // The alignment is not handled / used in any way by `const_alloc_to_gcc`,
+        // so it is OK to overwrite it here.
+        let mut mock_alloc = alloc.inner().clone();
+        mock_alloc.align = rustc_abi::Align::MAX;
+        // Check if the rvalue is already in the cache - if so, just return it directly.
+        if let Some(res) = self.const_cache.borrow().get(&mock_alloc) {
+            return *res;
+        }
+        // Rvalue not in the cache - convert and add it.
+        let res = crate::consts::const_alloc_to_gcc_uncached(self, alloc);
+        self.const_cache.borrow_mut().insert(mock_alloc, res);
+        res
     }
 
     fn const_ptr_byte_offset(&self, base_addr: Self::Value, offset: abi::Size) -> Self::Value {
diff --git a/compiler/rustc_codegen_gcc/src/consts.rs b/compiler/rustc_codegen_gcc/src/consts.rs
index 1690641a5bc..b43f9b24c6a 100644
--- a/compiler/rustc_codegen_gcc/src/consts.rs
+++ b/compiler/rustc_codegen_gcc/src/consts.rs
@@ -36,18 +36,14 @@ fn set_global_alignment<'gcc, 'tcx>(
 
 impl<'gcc, 'tcx> StaticCodegenMethods for CodegenCx<'gcc, 'tcx> {
     fn static_addr_of(&self, cv: RValue<'gcc>, align: Align, kind: Option<&str>) -> RValue<'gcc> {
-        // TODO(antoyo): implement a proper rvalue comparison in libgccjit instead of doing the
-        // following:
-        for (value, variable) in &*self.const_globals.borrow() {
-            if format!("{:?}", value) == format!("{:?}", cv) {
-                if let Some(global_variable) = self.global_lvalues.borrow().get(variable) {
-                    let alignment = align.bits() as i32;
-                    if alignment > global_variable.get_alignment() {
-                        global_variable.set_alignment(alignment);
-                    }
+        if let Some(variable) = self.const_globals.borrow().get(&cv) {
+            if let Some(global_variable) = self.global_lvalues.borrow().get(variable) {
+                let alignment = align.bits() as i32;
+                if alignment > global_variable.get_alignment() {
+                    global_variable.set_alignment(alignment);
                 }
-                return *variable;
             }
+            return *variable;
         }
         let global_value = self.static_addr_of_mut(cv, align, kind);
         #[cfg(feature = "master")]
@@ -288,8 +284,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         global
     }
 }
-
-pub fn const_alloc_to_gcc<'gcc>(
+/// Converts a given const alloc to a gcc Rvalue, without any caching or deduplication.
+/// YOU SHOULD NOT call this function directly - that may break the semantics of Rust.
+/// Use `const_data_from_alloc` instead.
+pub(crate) fn const_alloc_to_gcc_uncached<'gcc>(
     cx: &CodegenCx<'gcc, '_>,
     alloc: ConstAllocation<'_>,
 ) -> RValue<'gcc> {
@@ -321,7 +319,7 @@ pub fn const_alloc_to_gcc<'gcc>(
             // and we properly interpret the provenance as a relocation pointer offset.
             alloc.inspect_with_uninit_and_ptr_outside_interpreter(offset..(offset + pointer_size)),
         )
-        .expect("const_alloc_to_llvm: could not read relocation pointer")
+        .expect("const_alloc_to_gcc_uncached: could not read relocation pointer")
             as u64;
 
         let address_space = cx.tcx.global_alloc(alloc_id).address_space(cx);
@@ -360,7 +358,7 @@ fn codegen_static_initializer<'gcc, 'tcx>(
     def_id: DefId,
 ) -> Result<(RValue<'gcc>, ConstAllocation<'tcx>), ErrorHandled> {
     let alloc = cx.tcx.eval_static_initializer(def_id)?;
-    Ok((const_alloc_to_gcc(cx, alloc), alloc))
+    Ok((cx.const_data_from_alloc(alloc), alloc))
 }
 
 fn check_and_apply_linkage<'gcc, 'tcx>(
diff --git a/compiler/rustc_codegen_gcc/src/context.rs b/compiler/rustc_codegen_gcc/src/context.rs
index c6c43201f21..ff141ad365b 100644
--- a/compiler/rustc_codegen_gcc/src/context.rs
+++ b/compiler/rustc_codegen_gcc/src/context.rs
@@ -1,14 +1,16 @@
 use std::cell::{Cell, RefCell};
+use std::collections::HashMap;
 
 use gccjit::{
     Block, CType, Context, Function, FunctionPtrType, FunctionType, LValue, Location, RValue, Type,
 };
-use rustc_abi::{HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
+use rustc_abi::{Align, HasDataLayout, PointeeInfo, Size, TargetDataLayout, VariantIdx};
 use rustc_codegen_ssa::base::wants_msvc_seh;
 use rustc_codegen_ssa::errors as ssa_errors;
 use rustc_codegen_ssa::traits::{BackendTypes, BaseTypeCodegenMethods, MiscCodegenMethods};
 use rustc_data_structures::base_n::{ALPHANUMERIC_ONLY, ToBaseN};
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
+use rustc_middle::mir::interpret::Allocation;
 use rustc_middle::mir::mono::CodegenUnit;
 use rustc_middle::span_bug;
 use rustc_middle::ty::layout::{
@@ -19,9 +21,7 @@ use rustc_middle::ty::{self, ExistentialTraitRef, Instance, Ty, TyCtxt};
 use rustc_session::Session;
 use rustc_span::source_map::respan;
 use rustc_span::{DUMMY_SP, Span};
-use rustc_target::spec::{
-    HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, Target, TlsModel, WasmCAbi, X86Abi,
-};
+use rustc_target::spec::{HasTargetSpec, HasX86AbiOpt, Target, TlsModel, X86Abi};
 
 #[cfg(feature = "master")]
 use crate::abi::conv_to_fn_attribute;
@@ -30,6 +30,8 @@ use crate::common::SignType;
 
 #[cfg_attr(not(feature = "master"), allow(dead_code))]
 pub struct CodegenCx<'gcc, 'tcx> {
+    /// A cache of converted ConstAllocs
+    pub const_cache: RefCell<HashMap<Allocation, RValue<'gcc>>>,
     pub codegen_unit: &'tcx CodegenUnit<'tcx>,
     pub context: &'gcc Context<'gcc>,
 
@@ -131,6 +133,9 @@ pub struct CodegenCx<'gcc, 'tcx> {
 
     #[cfg(feature = "master")]
     pub cleanup_blocks: RefCell<FxHashSet<Block<'gcc>>>,
+    /// The alignment of a u128/i128 type.
+    // We cache this, since it is needed for alignment checks during loads.
+    pub int128_align: Align,
 }
 
 impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
@@ -222,6 +227,12 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
         }
 
         let mut cx = Self {
+            int128_align: tcx
+                .layout_of(ty::TypingEnv::fully_monomorphized().as_query_input(tcx.types.i128))
+                .expect("Can't get the layout of `i128`")
+                .align
+                .abi,
+            const_cache: Default::default(),
             codegen_unit,
             context,
             current_func: RefCell::new(None),
@@ -430,8 +441,8 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         // `rust_eh_personality` function, but rather we wired it up to the
         // CRT's custom personality function, which forces LLVM to consider
         // landing pads as "landing pads for SEH".
-        if let Some(llpersonality) = self.eh_personality.get() {
-            return llpersonality;
+        if let Some(personality_func) = self.eh_personality.get() {
+            return personality_func;
         }
         let tcx = self.tcx;
         let func = match tcx.lang_items().eh_personality() {
@@ -512,12 +523,6 @@ impl<'gcc, 'tcx> HasTargetSpec for CodegenCx<'gcc, 'tcx> {
     }
 }
 
-impl<'gcc, 'tcx> HasWasmCAbiOpt for CodegenCx<'gcc, 'tcx> {
-    fn wasm_c_abi_opt(&self) -> WasmCAbi {
-        self.tcx.sess.opts.unstable_opts.wasm_c_abi
-    }
-}
-
 impl<'gcc, 'tcx> HasX86AbiOpt for CodegenCx<'gcc, 'tcx> {
     fn x86_abi_opt(&self) -> X86Abi {
         X86Abi {
diff --git a/compiler/rustc_codegen_gcc/src/errors.rs b/compiler/rustc_codegen_gcc/src/errors.rs
index ccd9abe3804..7786be9ae5d 100644
--- a/compiler/rustc_codegen_gcc/src/errors.rs
+++ b/compiler/rustc_codegen_gcc/src/errors.rs
@@ -17,21 +17,6 @@ pub(crate) struct UnknownCTargetFeature<'a> {
     pub rust_feature: PossibleFeature<'a>,
 }
 
-#[derive(Diagnostic)]
-#[diag(codegen_gcc_unstable_ctarget_feature)]
-#[note]
-pub(crate) struct UnstableCTargetFeature<'a> {
-    pub feature: &'a str,
-}
-
-#[derive(Diagnostic)]
-#[diag(codegen_gcc_forbidden_ctarget_feature)]
-pub(crate) struct ForbiddenCTargetFeature<'a> {
-    pub feature: &'a str,
-    pub enabled: &'a str,
-    pub reason: &'a str,
-}
-
 #[derive(Subdiagnostic)]
 pub(crate) enum PossibleFeature<'a> {
     #[help(codegen_gcc_possible_feature)]
diff --git a/compiler/rustc_codegen_gcc/src/gcc_util.rs b/compiler/rustc_codegen_gcc/src/gcc_util.rs
index 2b053abdd19..2e00d5fcb61 100644
--- a/compiler/rustc_codegen_gcc/src/gcc_util.rs
+++ b/compiler/rustc_codegen_gcc/src/gcc_util.rs
@@ -5,13 +5,17 @@ use rustc_codegen_ssa::errors::TargetFeatureDisableOrEnable;
 use rustc_data_structures::fx::FxHashMap;
 use rustc_data_structures::unord::UnordSet;
 use rustc_session::Session;
+use rustc_session::features::{StabilityExt, retpoline_features_by_flags};
 use rustc_target::target_features::RUSTC_SPECIFIC_FEATURES;
 use smallvec::{SmallVec, smallvec};
 
-use crate::errors::{
-    ForbiddenCTargetFeature, PossibleFeature, UnknownCTargetFeature, UnknownCTargetFeaturePrefix,
-    UnstableCTargetFeature,
-};
+use crate::errors::{PossibleFeature, UnknownCTargetFeature, UnknownCTargetFeaturePrefix};
+
+fn gcc_features_by_flags(sess: &Session) -> Vec<&str> {
+    let mut features: Vec<&str> = Vec::new();
+    retpoline_features_by_flags(sess, &mut features);
+    features
+}
 
 /// The list of GCC features computed from CLI flags (`-Ctarget-cpu`, `-Ctarget-feature`,
 /// `--target` and similar).
@@ -45,7 +49,7 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
 
     // Compute implied features
     let mut all_rust_features = vec![];
-    for feature in sess.opts.cg.target_feature.split(',') {
+    for feature in sess.opts.cg.target_feature.split(',').chain(gcc_features_by_flags(sess)) {
         if let Some(feature) = feature.strip_prefix('+') {
             all_rust_features.extend(
                 UnordSet::from(sess.target.implied_target_features(feature))
@@ -94,18 +98,7 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
                     sess.dcx().emit_warn(unknown_feature);
                 }
                 Some(&(_, stability, _)) => {
-                    if let Err(reason) = stability.toggle_allowed() {
-                        sess.dcx().emit_warn(ForbiddenCTargetFeature {
-                            feature,
-                            enabled: if enable { "enabled" } else { "disabled" },
-                            reason,
-                        });
-                    } else if stability.requires_nightly().is_some() {
-                        // An unstable feature. Warn about using it. (It makes little sense
-                        // to hard-error here since we just warn about fully unknown
-                        // features above).
-                        sess.dcx().emit_warn(UnstableCTargetFeature { feature });
-                    }
+                    stability.verify_feature_enabled_by_flag(sess, enable, feature);
                 }
             }
 
@@ -150,6 +143,7 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
 // To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
 pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
     let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
+    // cSpell:disable
     match (arch, s) {
         // FIXME: seems like x87 does not exist?
         ("x86", "x87") => smallvec![],
@@ -188,6 +182,7 @@ pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]>
         ("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
         (_, s) => smallvec![s],
     }
+    // cSpell:enable
 }
 
 fn arch_to_gcc(name: &str) -> &str {
diff --git a/compiler/rustc_codegen_gcc/src/int.rs b/compiler/rustc_codegen_gcc/src/int.rs
index eb4acd8ade9..6f21ce9352b 100644
--- a/compiler/rustc_codegen_gcc/src/int.rs
+++ b/compiler/rustc_codegen_gcc/src/int.rs
@@ -2,6 +2,8 @@
 //! This module exists because some integer types are not supported on some gcc platforms, e.g.
 //! 128-bit integers on 32-bit platforms and thus require to be handled manually.
 
+// cSpell:words cmpti divti modti mulodi muloti udivti umodti
+
 use gccjit::{BinaryOp, ComparisonOp, FunctionType, Location, RValue, ToRValue, Type, UnaryOp};
 use rustc_abi::{CanonAbi, Endian, ExternAbi};
 use rustc_codegen_ssa::common::{IntPredicate, TypeKind};
@@ -913,9 +915,11 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         debug_assert!(value_type.dyncast_array().is_some());
         let name_suffix = match self.type_kind(dest_typ) {
+            // cSpell:disable
             TypeKind::Float => "tisf",
             TypeKind::Double => "tidf",
-            TypeKind::FP128 => "tixf",
+            TypeKind::FP128 => "titf",
+            // cSpell:enable
             kind => panic!("cannot cast a non-native integer to type {:?}", kind),
         };
         let sign = if signed { "" } else { "un" };
@@ -957,8 +961,10 @@ impl<'gcc, 'tcx> CodegenCx<'gcc, 'tcx> {
 
         debug_assert!(dest_typ.dyncast_array().is_some());
         let name_suffix = match self.type_kind(value_type) {
+            // cSpell:disable
             TypeKind::Float => "sfti",
             TypeKind::Double => "dfti",
+            // cSpell:enable
             kind => panic!("cannot cast a {:?} to non-native integer", kind),
         };
         let sign = if signed { "" } else { "uns" };
diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs b/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs
index 5ada535aa41..f0352c5e6e5 100644
--- a/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs
+++ b/compiler/rustc_codegen_gcc/src/intrinsic/archs.rs
@@ -1,9978 +1,10178 @@
 // File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
 // DO NOT EDIT IT!
-match name {
-    // AMDGPU
-    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
-    // aarch64
-    "llvm.aarch64.chkfeat" => "__builtin_arm_chkfeat",
-    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
-    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
-    "llvm.aarch64.gcspopm" => "__builtin_arm_gcspopm",
-    "llvm.aarch64.gcsss" => "__builtin_arm_gcsss",
-    "llvm.aarch64.isb" => "__builtin_arm_isb",
-    "llvm.aarch64.prefetch" => "__builtin_arm_prefetch",
-    "llvm.aarch64.sme.in.streaming.mode" => "__builtin_arm_in_streaming_mode",
-    "llvm.aarch64.sve.aesd" => "__builtin_sve_svaesd_u8",
-    "llvm.aarch64.sve.aese" => "__builtin_sve_svaese_u8",
-    "llvm.aarch64.sve.aesimc" => "__builtin_sve_svaesimc_u8",
-    "llvm.aarch64.sve.aesmc" => "__builtin_sve_svaesmc_u8",
-    "llvm.aarch64.sve.rax1" => "__builtin_sve_svrax1_u64",
-    "llvm.aarch64.sve.rdffr" => "__builtin_sve_svrdffr",
-    "llvm.aarch64.sve.rdffr.z" => "__builtin_sve_svrdffr_z",
-    "llvm.aarch64.sve.setffr" => "__builtin_sve_svsetffr",
-    "llvm.aarch64.sve.sm4e" => "__builtin_sve_svsm4e_u32",
-    "llvm.aarch64.sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
-    "llvm.aarch64.sve.wrffr" => "__builtin_sve_svwrffr",
-    "llvm.aarch64.tcancel" => "__builtin_arm_tcancel",
-    "llvm.aarch64.tcommit" => "__builtin_arm_tcommit",
-    "llvm.aarch64.tstart" => "__builtin_arm_tstart",
-    "llvm.aarch64.ttest" => "__builtin_arm_ttest",
-    // amdgcn
-    "llvm.amdgcn.alignbyte" => "__builtin_amdgcn_alignbyte",
-    "llvm.amdgcn.ashr.pk.i8.i32" => "__builtin_amdgcn_ashr_pk_i8_i32",
-    "llvm.amdgcn.ashr.pk.u8.i32" => "__builtin_amdgcn_ashr_pk_u8_i32",
-    "llvm.amdgcn.buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
-    "llvm.amdgcn.buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
-    "llvm.amdgcn.buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
-    "llvm.amdgcn.cubeid" => "__builtin_amdgcn_cubeid",
-    "llvm.amdgcn.cubema" => "__builtin_amdgcn_cubema",
-    "llvm.amdgcn.cubesc" => "__builtin_amdgcn_cubesc",
-    "llvm.amdgcn.cubetc" => "__builtin_amdgcn_cubetc",
-    "llvm.amdgcn.cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
-    "llvm.amdgcn.cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
-    "llvm.amdgcn.cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
-    "llvm.amdgcn.cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
-    "llvm.amdgcn.cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
-    "llvm.amdgcn.cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
-    "llvm.amdgcn.cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
-    "llvm.amdgcn.cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
-    "llvm.amdgcn.cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
-    "llvm.amdgcn.cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
-    "llvm.amdgcn.cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
-    "llvm.amdgcn.cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
-    "llvm.amdgcn.cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
-    "llvm.amdgcn.cvt.scalef32.2xpk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_bf6_f32",
-    "llvm.amdgcn.cvt.scalef32.2xpk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_fp6_f32",
-    "llvm.amdgcn.cvt.scalef32.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_f16_bf8",
-    "llvm.amdgcn.cvt.scalef32.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_f16_fp8",
-    "llvm.amdgcn.cvt.scalef32.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_f32_bf8",
-    "llvm.amdgcn.cvt.scalef32.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_f32_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.bf16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_bf8",
-    "llvm.amdgcn.cvt.scalef32.pk.bf16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp4",
-    "llvm.amdgcn.cvt.scalef32.pk.bf16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f16",
-    "llvm.amdgcn.cvt.scalef32.pk.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f32",
-    "llvm.amdgcn.cvt.scalef32.pk.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_bf8",
-    "llvm.amdgcn.cvt.scalef32.pk.f16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp4",
-    "llvm.amdgcn.cvt.scalef32.pk.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_bf8",
-    "llvm.amdgcn.cvt.scalef32.pk.f32.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp4",
-    "llvm.amdgcn.cvt.scalef32.pk.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp8",
-    "llvm.amdgcn.cvt.scalef32.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f32",
-    "llvm.amdgcn.cvt.scalef32.pk.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f16",
-    "llvm.amdgcn.cvt.scalef32.pk.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f32",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_bf6",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_fp6",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_f16",
-    "llvm.amdgcn.cvt.scalef32.pk32.f16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_bf6",
-    "llvm.amdgcn.cvt.scalef32.pk32.f16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_fp6",
-    "llvm.amdgcn.cvt.scalef32.pk32.f32.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_bf6",
-    "llvm.amdgcn.cvt.scalef32.pk32.f32.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_fp6",
-    "llvm.amdgcn.cvt.scalef32.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_bf16",
-    "llvm.amdgcn.cvt.scalef32.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f32",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_bf16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f16",
-    "llvm.amdgcn.cvt.scalef32.sr.pk32.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f32",
-    "llvm.amdgcn.cvt.sr.bf16.f32" => "__builtin_amdgcn_cvt_sr_bf16_f32",
-    "llvm.amdgcn.cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
-    "llvm.amdgcn.cvt.sr.f16.f32" => "__builtin_amdgcn_cvt_sr_f16_f32",
-    "llvm.amdgcn.cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
-    "llvm.amdgcn.dispatch.id" => "__builtin_amdgcn_dispatch_id",
-    "llvm.amdgcn.dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
-    "llvm.amdgcn.dot4.f32.bf8.fp8" => "__builtin_amdgcn_dot4_f32_bf8_fp8",
-    "llvm.amdgcn.dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
-    "llvm.amdgcn.dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
-    "llvm.amdgcn.ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
-    "llvm.amdgcn.ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
-    "llvm.amdgcn.ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
-    "llvm.amdgcn.ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
-    "llvm.amdgcn.ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
-    "llvm.amdgcn.ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
-    "llvm.amdgcn.ds.gws.sema.p" => "__builtin_amdgcn_ds_gws_sema_p",
-    "llvm.amdgcn.ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
-    "llvm.amdgcn.ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
-    "llvm.amdgcn.ds.permute" => "__builtin_amdgcn_ds_permute",
-    "llvm.amdgcn.ds.sub.gs.reg.rtn" => "__builtin_amdgcn_ds_sub_gs_reg_rtn",
-    "llvm.amdgcn.ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
-    "llvm.amdgcn.endpgm" => "__builtin_amdgcn_endpgm",
-    "llvm.amdgcn.fdot2" => "__builtin_amdgcn_fdot2",
-    "llvm.amdgcn.fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
-    "llvm.amdgcn.fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
-    "llvm.amdgcn.fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
-    "llvm.amdgcn.fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
-    "llvm.amdgcn.fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
-    "llvm.amdgcn.global.load.lds" => "__builtin_amdgcn_global_load_lds",
-    "llvm.amdgcn.groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
-    "llvm.amdgcn.iglp.opt" => "__builtin_amdgcn_iglp_opt",
-    "llvm.amdgcn.implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
-    "llvm.amdgcn.implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
-    "llvm.amdgcn.interp.mov" => "__builtin_amdgcn_interp_mov",
-    "llvm.amdgcn.interp.p1" => "__builtin_amdgcn_interp_p1",
-    "llvm.amdgcn.interp.p1.f16" => "__builtin_amdgcn_interp_p1_f16",
-    "llvm.amdgcn.interp.p2" => "__builtin_amdgcn_interp_p2",
-    "llvm.amdgcn.interp.p2.f16" => "__builtin_amdgcn_interp_p2_f16",
-    "llvm.amdgcn.is.private" => "__builtin_amdgcn_is_private",
-    "llvm.amdgcn.is.shared" => "__builtin_amdgcn_is_shared",
-    "llvm.amdgcn.kernarg.segment.ptr" => "__builtin_amdgcn_kernarg_segment_ptr",
-    "llvm.amdgcn.lerp" => "__builtin_amdgcn_lerp",
-    "llvm.amdgcn.mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
-    "llvm.amdgcn.mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
-    "llvm.amdgcn.mfma.f32.16x16x16bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x16bf16_1k",
-    "llvm.amdgcn.mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
-    "llvm.amdgcn.mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
-    "llvm.amdgcn.mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
-    "llvm.amdgcn.mfma.f32.16x16x32.bf16" => "__builtin_amdgcn_mfma_f32_16x16x32_bf16",
-    "llvm.amdgcn.mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
-    "llvm.amdgcn.mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
-    "llvm.amdgcn.mfma.f32.16x16x32.f16" => "__builtin_amdgcn_mfma_f32_16x16x32_f16",
-    "llvm.amdgcn.mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
-    "llvm.amdgcn.mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
-    "llvm.amdgcn.mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
-    "llvm.amdgcn.mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
-    "llvm.amdgcn.mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
-    "llvm.amdgcn.mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
-    "llvm.amdgcn.mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
-    "llvm.amdgcn.mfma.f32.32x32x16.bf16" => "__builtin_amdgcn_mfma_f32_32x32x16_bf16",
-    "llvm.amdgcn.mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
-    "llvm.amdgcn.mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
-    "llvm.amdgcn.mfma.f32.32x32x16.f16" => "__builtin_amdgcn_mfma_f32_32x32x16_f16",
-    "llvm.amdgcn.mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
-    "llvm.amdgcn.mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
-    "llvm.amdgcn.mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
-    "llvm.amdgcn.mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
-    "llvm.amdgcn.mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
-    "llvm.amdgcn.mfma.f32.32x32x4.xf32" => "__builtin_amdgcn_mfma_f32_32x32x4_xf32",
-    "llvm.amdgcn.mfma.f32.32x32x4bf16" => "__builtin_amdgcn_mfma_f32_32x32x4bf16",
-    "llvm.amdgcn.mfma.f32.32x32x4bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x4bf16_1k",
-    "llvm.amdgcn.mfma.f32.32x32x4f16" => "__builtin_amdgcn_mfma_f32_32x32x4f16",
-    "llvm.amdgcn.mfma.f32.32x32x8bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x8bf16_1k",
-    "llvm.amdgcn.mfma.f32.32x32x8f16" => "__builtin_amdgcn_mfma_f32_32x32x8f16",
-    "llvm.amdgcn.mfma.f32.4x4x1f32" => "__builtin_amdgcn_mfma_f32_4x4x1f32",
-    "llvm.amdgcn.mfma.f32.4x4x2bf16" => "__builtin_amdgcn_mfma_f32_4x4x2bf16",
-    "llvm.amdgcn.mfma.f32.4x4x4bf16.1k" => "__builtin_amdgcn_mfma_f32_4x4x4bf16_1k",
-    "llvm.amdgcn.mfma.f32.4x4x4f16" => "__builtin_amdgcn_mfma_f32_4x4x4f16",
-    "llvm.amdgcn.mfma.f64.16x16x4f64" => "__builtin_amdgcn_mfma_f64_16x16x4f64",
-    "llvm.amdgcn.mfma.f64.4x4x4f64" => "__builtin_amdgcn_mfma_f64_4x4x4f64",
-    "llvm.amdgcn.mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
-    "llvm.amdgcn.mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
-    "llvm.amdgcn.mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
-    "llvm.amdgcn.mfma.i32.16x16x64.i8" => "__builtin_amdgcn_mfma_i32_16x16x64_i8",
-    "llvm.amdgcn.mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
-    "llvm.amdgcn.mfma.i32.32x32x32.i8" => "__builtin_amdgcn_mfma_i32_32x32x32_i8",
-    "llvm.amdgcn.mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
-    "llvm.amdgcn.mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
-    "llvm.amdgcn.mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
-    "llvm.amdgcn.mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
-    "llvm.amdgcn.mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
-    "llvm.amdgcn.msad.u8" => "__builtin_amdgcn_msad_u8",
-    "llvm.amdgcn.perm" => "__builtin_amdgcn_perm",
-    "llvm.amdgcn.permlane16.var" => "__builtin_amdgcn_permlane16_var",
-    "llvm.amdgcn.permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
-    "llvm.amdgcn.prng.b32" => "__builtin_amdgcn_prng_b32",
-    "llvm.amdgcn.qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
-    "llvm.amdgcn.queue.ptr" => "__builtin_amdgcn_queue_ptr",
-    "llvm.amdgcn.raw.ptr.buffer.load.lds" => "__builtin_amdgcn_raw_ptr_buffer_load_lds",
-    "llvm.amdgcn.rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
-    "llvm.amdgcn.rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
-    "llvm.amdgcn.s.barrier" => "__builtin_amdgcn_s_barrier",
-    "llvm.amdgcn.s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
-    "llvm.amdgcn.s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
-    "llvm.amdgcn.s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
-    "llvm.amdgcn.s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
-    "llvm.amdgcn.s.buffer.prefetch.data" => "__builtin_amdgcn_s_buffer_prefetch_data",
-    "llvm.amdgcn.s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
-    "llvm.amdgcn.s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
-    "llvm.amdgcn.s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
-    "llvm.amdgcn.s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
-    "llvm.amdgcn.s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
-    "llvm.amdgcn.s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
-    "llvm.amdgcn.s.get.named.barrier.state" => "__builtin_amdgcn_s_get_named_barrier_state",
-    "llvm.amdgcn.s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
-    "llvm.amdgcn.s.getpc" => "__builtin_amdgcn_s_getpc",
-    "llvm.amdgcn.s.getreg" => "__builtin_amdgcn_s_getreg",
-    "llvm.amdgcn.s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
-    "llvm.amdgcn.s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
-    "llvm.amdgcn.s.memtime" => "__builtin_amdgcn_s_memtime",
-    "llvm.amdgcn.s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
-    "llvm.amdgcn.s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
-    "llvm.amdgcn.s.setprio" => "__builtin_amdgcn_s_setprio",
-    "llvm.amdgcn.s.setreg" => "__builtin_amdgcn_s_setreg",
-    "llvm.amdgcn.s.sleep" => "__builtin_amdgcn_s_sleep",
-    "llvm.amdgcn.s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
-    "llvm.amdgcn.s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
-    "llvm.amdgcn.s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
-    "llvm.amdgcn.s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
-    "llvm.amdgcn.s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
-    "llvm.amdgcn.sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
-    "llvm.amdgcn.sad.u16" => "__builtin_amdgcn_sad_u16",
-    "llvm.amdgcn.sad.u8" => "__builtin_amdgcn_sad_u8",
-    "llvm.amdgcn.sched.barrier" => "__builtin_amdgcn_sched_barrier",
-    "llvm.amdgcn.sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
-    "llvm.amdgcn.sdot2" => "__builtin_amdgcn_sdot2",
-    "llvm.amdgcn.sdot4" => "__builtin_amdgcn_sdot4",
-    "llvm.amdgcn.sdot8" => "__builtin_amdgcn_sdot8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x128.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_fp8",
-    "llvm.amdgcn.smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
-    "llvm.amdgcn.smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
-    "llvm.amdgcn.smfmac.f32.16x16x64.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf16",
-    "llvm.amdgcn.smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.16x16x64.f16" => "__builtin_amdgcn_smfmac_f32_16x16x64_f16",
-    "llvm.amdgcn.smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
-    "llvm.amdgcn.smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
-    "llvm.amdgcn.smfmac.f32.32x32x32.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf16",
-    "llvm.amdgcn.smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x32.f16" => "__builtin_amdgcn_smfmac_f32_32x32x32_f16",
-    "llvm.amdgcn.smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_fp8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_bf8",
-    "llvm.amdgcn.smfmac.f32.32x32x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_fp8",
-    "llvm.amdgcn.smfmac.i32.16x16x128.i8" => "__builtin_amdgcn_smfmac_i32_16x16x128_i8",
-    "llvm.amdgcn.smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
-    "llvm.amdgcn.smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
-    "llvm.amdgcn.smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
-    "llvm.amdgcn.sudot4" => "__builtin_amdgcn_sudot4",
-    "llvm.amdgcn.sudot8" => "__builtin_amdgcn_sudot8",
-    "llvm.amdgcn.udot2" => "__builtin_amdgcn_udot2",
-    "llvm.amdgcn.udot4" => "__builtin_amdgcn_udot4",
-    "llvm.amdgcn.udot8" => "__builtin_amdgcn_udot8",
-    "llvm.amdgcn.wave.barrier" => "__builtin_amdgcn_wave_barrier",
-    "llvm.amdgcn.wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
-    "llvm.amdgcn.workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
-    "llvm.amdgcn.workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
-    "llvm.amdgcn.workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
-    "llvm.amdgcn.workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
-    "llvm.amdgcn.workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
-    "llvm.amdgcn.workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
-    // arm
-    "llvm.arm.cdp" => "__builtin_arm_cdp",
-    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
-    "llvm.arm.cmse.tt" => "__builtin_arm_cmse_TT",
-    "llvm.arm.cmse.tta" => "__builtin_arm_cmse_TTA",
-    "llvm.arm.cmse.ttat" => "__builtin_arm_cmse_TTAT",
-    "llvm.arm.cmse.ttt" => "__builtin_arm_cmse_TTT",
-    "llvm.arm.dmb" => "__builtin_arm_dmb",
-    "llvm.arm.dsb" => "__builtin_arm_dsb",
-    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
-    "llvm.arm.isb" => "__builtin_arm_isb",
-    "llvm.arm.ldc" => "__builtin_arm_ldc",
-    "llvm.arm.ldc2" => "__builtin_arm_ldc2",
-    "llvm.arm.ldc2l" => "__builtin_arm_ldc2l",
-    "llvm.arm.ldcl" => "__builtin_arm_ldcl",
-    "llvm.arm.mcr" => "__builtin_arm_mcr",
-    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
-    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
-    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
-    "llvm.arm.mrc" => "__builtin_arm_mrc",
-    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
-    "llvm.arm.qadd" => "__builtin_arm_qadd",
-    "llvm.arm.qadd16" => "__builtin_arm_qadd16",
-    "llvm.arm.qadd8" => "__builtin_arm_qadd8",
-    "llvm.arm.qasx" => "__builtin_arm_qasx",
-    "llvm.arm.qsax" => "__builtin_arm_qsax",
-    "llvm.arm.qsub" => "__builtin_arm_qsub",
-    "llvm.arm.qsub16" => "__builtin_arm_qsub16",
-    "llvm.arm.qsub8" => "__builtin_arm_qsub8",
-    "llvm.arm.sadd16" => "__builtin_arm_sadd16",
-    "llvm.arm.sadd8" => "__builtin_arm_sadd8",
-    "llvm.arm.sasx" => "__builtin_arm_sasx",
-    "llvm.arm.sel" => "__builtin_arm_sel",
-    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
-    "llvm.arm.shadd16" => "__builtin_arm_shadd16",
-    "llvm.arm.shadd8" => "__builtin_arm_shadd8",
-    "llvm.arm.shasx" => "__builtin_arm_shasx",
-    "llvm.arm.shsax" => "__builtin_arm_shsax",
-    "llvm.arm.shsub16" => "__builtin_arm_shsub16",
-    "llvm.arm.shsub8" => "__builtin_arm_shsub8",
-    "llvm.arm.smlabb" => "__builtin_arm_smlabb",
-    "llvm.arm.smlabt" => "__builtin_arm_smlabt",
-    "llvm.arm.smlad" => "__builtin_arm_smlad",
-    "llvm.arm.smladx" => "__builtin_arm_smladx",
-    "llvm.arm.smlald" => "__builtin_arm_smlald",
-    "llvm.arm.smlaldx" => "__builtin_arm_smlaldx",
-    "llvm.arm.smlatb" => "__builtin_arm_smlatb",
-    "llvm.arm.smlatt" => "__builtin_arm_smlatt",
-    "llvm.arm.smlawb" => "__builtin_arm_smlawb",
-    "llvm.arm.smlawt" => "__builtin_arm_smlawt",
-    "llvm.arm.smlsd" => "__builtin_arm_smlsd",
-    "llvm.arm.smlsdx" => "__builtin_arm_smlsdx",
-    "llvm.arm.smlsld" => "__builtin_arm_smlsld",
-    "llvm.arm.smlsldx" => "__builtin_arm_smlsldx",
-    "llvm.arm.smuad" => "__builtin_arm_smuad",
-    "llvm.arm.smuadx" => "__builtin_arm_smuadx",
-    "llvm.arm.smulbb" => "__builtin_arm_smulbb",
-    "llvm.arm.smulbt" => "__builtin_arm_smulbt",
-    "llvm.arm.smultb" => "__builtin_arm_smultb",
-    "llvm.arm.smultt" => "__builtin_arm_smultt",
-    "llvm.arm.smulwb" => "__builtin_arm_smulwb",
-    "llvm.arm.smulwt" => "__builtin_arm_smulwt",
-    "llvm.arm.smusd" => "__builtin_arm_smusd",
-    "llvm.arm.smusdx" => "__builtin_arm_smusdx",
-    "llvm.arm.ssat" => "__builtin_arm_ssat",
-    "llvm.arm.ssat16" => "__builtin_arm_ssat16",
-    "llvm.arm.ssax" => "__builtin_arm_ssax",
-    "llvm.arm.ssub16" => "__builtin_arm_ssub16",
-    "llvm.arm.ssub8" => "__builtin_arm_ssub8",
-    "llvm.arm.stc" => "__builtin_arm_stc",
-    "llvm.arm.stc2" => "__builtin_arm_stc2",
-    "llvm.arm.stc2l" => "__builtin_arm_stc2l",
-    "llvm.arm.stcl" => "__builtin_arm_stcl",
-    "llvm.arm.sxtab16" => "__builtin_arm_sxtab16",
-    "llvm.arm.sxtb16" => "__builtin_arm_sxtb16",
-    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
-    "llvm.arm.uadd16" => "__builtin_arm_uadd16",
-    "llvm.arm.uadd8" => "__builtin_arm_uadd8",
-    "llvm.arm.uasx" => "__builtin_arm_uasx",
-    "llvm.arm.uhadd16" => "__builtin_arm_uhadd16",
-    "llvm.arm.uhadd8" => "__builtin_arm_uhadd8",
-    "llvm.arm.uhasx" => "__builtin_arm_uhasx",
-    "llvm.arm.uhsax" => "__builtin_arm_uhsax",
-    "llvm.arm.uhsub16" => "__builtin_arm_uhsub16",
-    "llvm.arm.uhsub8" => "__builtin_arm_uhsub8",
-    "llvm.arm.uqadd16" => "__builtin_arm_uqadd16",
-    "llvm.arm.uqadd8" => "__builtin_arm_uqadd8",
-    "llvm.arm.uqasx" => "__builtin_arm_uqasx",
-    "llvm.arm.uqsax" => "__builtin_arm_uqsax",
-    "llvm.arm.uqsub16" => "__builtin_arm_uqsub16",
-    "llvm.arm.uqsub8" => "__builtin_arm_uqsub8",
-    "llvm.arm.usad8" => "__builtin_arm_usad8",
-    "llvm.arm.usada8" => "__builtin_arm_usada8",
-    "llvm.arm.usat" => "__builtin_arm_usat",
-    "llvm.arm.usat16" => "__builtin_arm_usat16",
-    "llvm.arm.usax" => "__builtin_arm_usax",
-    "llvm.arm.usub16" => "__builtin_arm_usub16",
-    "llvm.arm.usub8" => "__builtin_arm_usub8",
-    "llvm.arm.uxtab16" => "__builtin_arm_uxtab16",
-    "llvm.arm.uxtb16" => "__builtin_arm_uxtb16",
-    // bpf
-    "llvm.bpf.btf.type.id" => "__builtin_bpf_btf_type_id",
-    "llvm.bpf.compare" => "__builtin_bpf_compare",
-    "llvm.bpf.getelementptr.and.load" => "__builtin_bpf_getelementptr_and_load",
-    "llvm.bpf.getelementptr.and.store" => "__builtin_bpf_getelementptr_and_store",
-    "llvm.bpf.load.byte" => "__builtin_bpf_load_byte",
-    "llvm.bpf.load.half" => "__builtin_bpf_load_half",
-    "llvm.bpf.load.word" => "__builtin_bpf_load_word",
-    "llvm.bpf.passthrough" => "__builtin_bpf_passthrough",
-    "llvm.bpf.preserve.enum.value" => "__builtin_bpf_preserve_enum_value",
-    "llvm.bpf.preserve.field.info" => "__builtin_bpf_preserve_field_info",
-    "llvm.bpf.preserve.type.info" => "__builtin_bpf_preserve_type_info",
-    "llvm.bpf.pseudo" => "__builtin_bpf_pseudo",
-    // cuda
-    "llvm.cuda.syncthreads" => "__syncthreads",
-    // hexagon
-    "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
-    "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
-    "llvm.hexagon.A2.abssat" => "__builtin_HEXAGON_A2_abssat",
-    "llvm.hexagon.A2.add" => "__builtin_HEXAGON_A2_add",
-    "llvm.hexagon.A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
-    "llvm.hexagon.A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
-    "llvm.hexagon.A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
-    "llvm.hexagon.A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
-    "llvm.hexagon.A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
-    "llvm.hexagon.A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
-    "llvm.hexagon.A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
-    "llvm.hexagon.A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
-    "llvm.hexagon.A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
-    "llvm.hexagon.A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
-    "llvm.hexagon.A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
-    "llvm.hexagon.A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
-    "llvm.hexagon.A2.addi" => "__builtin_HEXAGON_A2_addi",
-    "llvm.hexagon.A2.addp" => "__builtin_HEXAGON_A2_addp",
-    "llvm.hexagon.A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
-    "llvm.hexagon.A2.addsat" => "__builtin_HEXAGON_A2_addsat",
-    "llvm.hexagon.A2.addsp" => "__builtin_HEXAGON_A2_addsp",
-    "llvm.hexagon.A2.and" => "__builtin_HEXAGON_A2_and",
-    "llvm.hexagon.A2.andir" => "__builtin_HEXAGON_A2_andir",
-    "llvm.hexagon.A2.andp" => "__builtin_HEXAGON_A2_andp",
-    "llvm.hexagon.A2.aslh" => "__builtin_HEXAGON_A2_aslh",
-    "llvm.hexagon.A2.asrh" => "__builtin_HEXAGON_A2_asrh",
-    "llvm.hexagon.A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
-    "llvm.hexagon.A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
-    "llvm.hexagon.A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
-    "llvm.hexagon.A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
-    "llvm.hexagon.A2.combineii" => "__builtin_HEXAGON_A2_combineii",
-    "llvm.hexagon.A2.combinew" => "__builtin_HEXAGON_A2_combinew",
-    "llvm.hexagon.A2.max" => "__builtin_HEXAGON_A2_max",
-    "llvm.hexagon.A2.maxp" => "__builtin_HEXAGON_A2_maxp",
-    "llvm.hexagon.A2.maxu" => "__builtin_HEXAGON_A2_maxu",
-    "llvm.hexagon.A2.maxup" => "__builtin_HEXAGON_A2_maxup",
-    "llvm.hexagon.A2.min" => "__builtin_HEXAGON_A2_min",
-    "llvm.hexagon.A2.minp" => "__builtin_HEXAGON_A2_minp",
-    "llvm.hexagon.A2.minu" => "__builtin_HEXAGON_A2_minu",
-    "llvm.hexagon.A2.minup" => "__builtin_HEXAGON_A2_minup",
-    "llvm.hexagon.A2.neg" => "__builtin_HEXAGON_A2_neg",
-    "llvm.hexagon.A2.negp" => "__builtin_HEXAGON_A2_negp",
-    "llvm.hexagon.A2.negsat" => "__builtin_HEXAGON_A2_negsat",
-    "llvm.hexagon.A2.not" => "__builtin_HEXAGON_A2_not",
-    "llvm.hexagon.A2.notp" => "__builtin_HEXAGON_A2_notp",
-    "llvm.hexagon.A2.or" => "__builtin_HEXAGON_A2_or",
-    "llvm.hexagon.A2.orir" => "__builtin_HEXAGON_A2_orir",
-    "llvm.hexagon.A2.orp" => "__builtin_HEXAGON_A2_orp",
-    "llvm.hexagon.A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
-    "llvm.hexagon.A2.sat" => "__builtin_HEXAGON_A2_sat",
-    "llvm.hexagon.A2.satb" => "__builtin_HEXAGON_A2_satb",
-    "llvm.hexagon.A2.sath" => "__builtin_HEXAGON_A2_sath",
-    "llvm.hexagon.A2.satub" => "__builtin_HEXAGON_A2_satub",
-    "llvm.hexagon.A2.satuh" => "__builtin_HEXAGON_A2_satuh",
-    "llvm.hexagon.A2.sub" => "__builtin_HEXAGON_A2_sub",
-    "llvm.hexagon.A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
-    "llvm.hexagon.A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
-    "llvm.hexagon.A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
-    "llvm.hexagon.A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
-    "llvm.hexagon.A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
-    "llvm.hexagon.A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
-    "llvm.hexagon.A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
-    "llvm.hexagon.A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
-    "llvm.hexagon.A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
-    "llvm.hexagon.A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
-    "llvm.hexagon.A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
-    "llvm.hexagon.A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
-    "llvm.hexagon.A2.subp" => "__builtin_HEXAGON_A2_subp",
-    "llvm.hexagon.A2.subri" => "__builtin_HEXAGON_A2_subri",
-    "llvm.hexagon.A2.subsat" => "__builtin_HEXAGON_A2_subsat",
-    "llvm.hexagon.A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
-    "llvm.hexagon.A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
-    "llvm.hexagon.A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
-    "llvm.hexagon.A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
-    "llvm.hexagon.A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
-    "llvm.hexagon.A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
-    "llvm.hexagon.A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
-    "llvm.hexagon.A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
-    "llvm.hexagon.A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
-    "llvm.hexagon.A2.swiz" => "__builtin_HEXAGON_A2_swiz",
-    "llvm.hexagon.A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
-    "llvm.hexagon.A2.sxth" => "__builtin_HEXAGON_A2_sxth",
-    "llvm.hexagon.A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
-    "llvm.hexagon.A2.tfr" => "__builtin_HEXAGON_A2_tfr",
-    "llvm.hexagon.A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
-    "llvm.hexagon.A2.tfril" => "__builtin_HEXAGON_A2_tfril",
-    "llvm.hexagon.A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
-    "llvm.hexagon.A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
-    "llvm.hexagon.A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
-    "llvm.hexagon.A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
-    "llvm.hexagon.A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
-    "llvm.hexagon.A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
-    "llvm.hexagon.A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
-    "llvm.hexagon.A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
-    "llvm.hexagon.A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
-    "llvm.hexagon.A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
-    "llvm.hexagon.A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
-    "llvm.hexagon.A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
-    "llvm.hexagon.A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
-    "llvm.hexagon.A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
-    "llvm.hexagon.A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
-    "llvm.hexagon.A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
-    "llvm.hexagon.A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
-    "llvm.hexagon.A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
-    "llvm.hexagon.A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
-    "llvm.hexagon.A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
-    "llvm.hexagon.A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
-    "llvm.hexagon.A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
-    "llvm.hexagon.A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
-    "llvm.hexagon.A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
-    "llvm.hexagon.A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
-    "llvm.hexagon.A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
-    "llvm.hexagon.A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
-    "llvm.hexagon.A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
-    "llvm.hexagon.A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
-    "llvm.hexagon.A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
-    "llvm.hexagon.A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
-    "llvm.hexagon.A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
-    "llvm.hexagon.A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
-    "llvm.hexagon.A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
-    "llvm.hexagon.A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
-    "llvm.hexagon.A2.vconj" => "__builtin_HEXAGON_A2_vconj",
-    "llvm.hexagon.A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
-    "llvm.hexagon.A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
-    "llvm.hexagon.A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
-    "llvm.hexagon.A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
-    "llvm.hexagon.A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
-    "llvm.hexagon.A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
-    "llvm.hexagon.A2.vminb" => "__builtin_HEXAGON_A2_vminb",
-    "llvm.hexagon.A2.vminh" => "__builtin_HEXAGON_A2_vminh",
-    "llvm.hexagon.A2.vminub" => "__builtin_HEXAGON_A2_vminub",
-    "llvm.hexagon.A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
-    "llvm.hexagon.A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
-    "llvm.hexagon.A2.vminw" => "__builtin_HEXAGON_A2_vminw",
-    "llvm.hexagon.A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
-    "llvm.hexagon.A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
-    "llvm.hexagon.A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
-    "llvm.hexagon.A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
-    "llvm.hexagon.A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
-    "llvm.hexagon.A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
-    "llvm.hexagon.A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
-    "llvm.hexagon.A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
-    "llvm.hexagon.A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
-    "llvm.hexagon.A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
-    "llvm.hexagon.A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
-    "llvm.hexagon.A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
-    "llvm.hexagon.A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
-    "llvm.hexagon.A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
-    "llvm.hexagon.A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
-    "llvm.hexagon.A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
-    "llvm.hexagon.A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
-    "llvm.hexagon.A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
-    "llvm.hexagon.A2.xor" => "__builtin_HEXAGON_A2_xor",
-    "llvm.hexagon.A2.xorp" => "__builtin_HEXAGON_A2_xorp",
-    "llvm.hexagon.A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
-    "llvm.hexagon.A2.zxth" => "__builtin_HEXAGON_A2_zxth",
-    "llvm.hexagon.A4.andn" => "__builtin_HEXAGON_A4_andn",
-    "llvm.hexagon.A4.andnp" => "__builtin_HEXAGON_A4_andnp",
-    "llvm.hexagon.A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
-    "llvm.hexagon.A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
-    "llvm.hexagon.A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
-    "llvm.hexagon.A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
-    "llvm.hexagon.A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
-    "llvm.hexagon.A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
-    "llvm.hexagon.A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
-    "llvm.hexagon.A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
-    "llvm.hexagon.A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
-    "llvm.hexagon.A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
-    "llvm.hexagon.A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
-    "llvm.hexagon.A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
-    "llvm.hexagon.A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
-    "llvm.hexagon.A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
-    "llvm.hexagon.A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
-    "llvm.hexagon.A4.combineir" => "__builtin_HEXAGON_A4_combineir",
-    "llvm.hexagon.A4.combineri" => "__builtin_HEXAGON_A4_combineri",
-    "llvm.hexagon.A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
-    "llvm.hexagon.A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
-    "llvm.hexagon.A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
-    "llvm.hexagon.A4.orn" => "__builtin_HEXAGON_A4_orn",
-    "llvm.hexagon.A4.ornp" => "__builtin_HEXAGON_A4_ornp",
-    "llvm.hexagon.A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
-    "llvm.hexagon.A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
-    "llvm.hexagon.A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
-    "llvm.hexagon.A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
-    "llvm.hexagon.A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
-    "llvm.hexagon.A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
-    "llvm.hexagon.A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
-    "llvm.hexagon.A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
-    "llvm.hexagon.A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
-    "llvm.hexagon.A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
-    "llvm.hexagon.A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
-    "llvm.hexagon.A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
-    "llvm.hexagon.A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
-    "llvm.hexagon.A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
-    "llvm.hexagon.A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
-    "llvm.hexagon.A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
-    "llvm.hexagon.A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
-    "llvm.hexagon.A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
-    "llvm.hexagon.A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
-    "llvm.hexagon.A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
-    "llvm.hexagon.A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
-    "llvm.hexagon.A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
-    "llvm.hexagon.A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
-    "llvm.hexagon.A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
-    "llvm.hexagon.A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
-    "llvm.hexagon.A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
-    "llvm.hexagon.A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
-    "llvm.hexagon.A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
-    "llvm.hexagon.A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
-    "llvm.hexagon.A6.vcmpbeq.notany" => "__builtin_HEXAGON_A6_vcmpbeq_notany",
-    "llvm.hexagon.A7.clip" => "__builtin_HEXAGON_A7_clip",
-    "llvm.hexagon.A7.croundd.ri" => "__builtin_HEXAGON_A7_croundd_ri",
-    "llvm.hexagon.A7.croundd.rr" => "__builtin_HEXAGON_A7_croundd_rr",
-    "llvm.hexagon.A7.vclip" => "__builtin_HEXAGON_A7_vclip",
-    "llvm.hexagon.C2.all8" => "__builtin_HEXAGON_C2_all8",
-    "llvm.hexagon.C2.and" => "__builtin_HEXAGON_C2_and",
-    "llvm.hexagon.C2.andn" => "__builtin_HEXAGON_C2_andn",
-    "llvm.hexagon.C2.any8" => "__builtin_HEXAGON_C2_any8",
-    "llvm.hexagon.C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
-    "llvm.hexagon.C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
-    "llvm.hexagon.C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
-    "llvm.hexagon.C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
-    "llvm.hexagon.C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
-    "llvm.hexagon.C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
-    "llvm.hexagon.C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
-    "llvm.hexagon.C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
-    "llvm.hexagon.C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
-    "llvm.hexagon.C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
-    "llvm.hexagon.C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
-    "llvm.hexagon.C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
-    "llvm.hexagon.C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
-    "llvm.hexagon.C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
-    "llvm.hexagon.C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
-    "llvm.hexagon.C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
-    "llvm.hexagon.C2.mask" => "__builtin_HEXAGON_C2_mask",
-    "llvm.hexagon.C2.mux" => "__builtin_HEXAGON_C2_mux",
-    "llvm.hexagon.C2.muxii" => "__builtin_HEXAGON_C2_muxii",
-    "llvm.hexagon.C2.muxir" => "__builtin_HEXAGON_C2_muxir",
-    "llvm.hexagon.C2.muxri" => "__builtin_HEXAGON_C2_muxri",
-    "llvm.hexagon.C2.not" => "__builtin_HEXAGON_C2_not",
-    "llvm.hexagon.C2.or" => "__builtin_HEXAGON_C2_or",
-    "llvm.hexagon.C2.orn" => "__builtin_HEXAGON_C2_orn",
-    "llvm.hexagon.C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
-    "llvm.hexagon.C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
-    "llvm.hexagon.C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
-    "llvm.hexagon.C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
-    "llvm.hexagon.C2.vmux" => "__builtin_HEXAGON_C2_vmux",
-    "llvm.hexagon.C2.xor" => "__builtin_HEXAGON_C2_xor",
-    "llvm.hexagon.C4.and.and" => "__builtin_HEXAGON_C4_and_and",
-    "llvm.hexagon.C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
-    "llvm.hexagon.C4.and.or" => "__builtin_HEXAGON_C4_and_or",
-    "llvm.hexagon.C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
-    "llvm.hexagon.C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
-    "llvm.hexagon.C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
-    "llvm.hexagon.C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
-    "llvm.hexagon.C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
-    "llvm.hexagon.C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
-    "llvm.hexagon.C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
-    "llvm.hexagon.C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
-    "llvm.hexagon.C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
-    "llvm.hexagon.C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
-    "llvm.hexagon.C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
-    "llvm.hexagon.C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
-    "llvm.hexagon.C4.or.and" => "__builtin_HEXAGON_C4_or_and",
-    "llvm.hexagon.C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
-    "llvm.hexagon.C4.or.or" => "__builtin_HEXAGON_C4_or_or",
-    "llvm.hexagon.C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
-    "llvm.hexagon.F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
-    "llvm.hexagon.F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
-    "llvm.hexagon.F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
-    "llvm.hexagon.F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
-    "llvm.hexagon.F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
-    "llvm.hexagon.F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
-    "llvm.hexagon.F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
-    "llvm.hexagon.F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
-    "llvm.hexagon.F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
-    "llvm.hexagon.F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
-    "llvm.hexagon.F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
-    "llvm.hexagon.F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
-    "llvm.hexagon.F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
-    "llvm.hexagon.F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
-    "llvm.hexagon.F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
-    "llvm.hexagon.F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
-    "llvm.hexagon.F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
-    "llvm.hexagon.F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
-    "llvm.hexagon.F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
-    "llvm.hexagon.F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
-    "llvm.hexagon.F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
-    "llvm.hexagon.F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
-    "llvm.hexagon.F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
-    "llvm.hexagon.F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
-    "llvm.hexagon.F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
-    "llvm.hexagon.F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
-    "llvm.hexagon.F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
-    "llvm.hexagon.F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
-    "llvm.hexagon.F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
-    "llvm.hexagon.F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
-    "llvm.hexagon.F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
-    "llvm.hexagon.F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
-    "llvm.hexagon.F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
-    "llvm.hexagon.F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
-    "llvm.hexagon.F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
-    "llvm.hexagon.F2.dffma" => "__builtin_HEXAGON_F2_dffma",
-    "llvm.hexagon.F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib",
-    "llvm.hexagon.F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc",
-    "llvm.hexagon.F2.dffms" => "__builtin_HEXAGON_F2_dffms",
-    "llvm.hexagon.F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib",
-    "llvm.hexagon.F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
-    "llvm.hexagon.F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
-    "llvm.hexagon.F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
-    "llvm.hexagon.F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
-    "llvm.hexagon.F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
-    "llvm.hexagon.F2.dfmpyfix" => "__builtin_HEXAGON_F2_dfmpyfix",
-    "llvm.hexagon.F2.dfmpyhh" => "__builtin_HEXAGON_F2_dfmpyhh",
-    "llvm.hexagon.F2.dfmpylh" => "__builtin_HEXAGON_F2_dfmpylh",
-    "llvm.hexagon.F2.dfmpyll" => "__builtin_HEXAGON_F2_dfmpyll",
-    "llvm.hexagon.F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
-    "llvm.hexagon.F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
-    "llvm.hexagon.F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
-    "llvm.hexagon.F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
-    "llvm.hexagon.F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
-    "llvm.hexagon.F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
-    "llvm.hexagon.F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
-    "llvm.hexagon.F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
-    "llvm.hexagon.F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
-    "llvm.hexagon.F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
-    "llvm.hexagon.F2.sffma" => "__builtin_HEXAGON_F2_sffma",
-    "llvm.hexagon.F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
-    "llvm.hexagon.F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
-    "llvm.hexagon.F2.sffms" => "__builtin_HEXAGON_F2_sffms",
-    "llvm.hexagon.F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
-    "llvm.hexagon.F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
-    "llvm.hexagon.F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
-    "llvm.hexagon.F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
-    "llvm.hexagon.F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
-    "llvm.hexagon.F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
-    "llvm.hexagon.F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
-    "llvm.hexagon.L2.loadw.locked" => "__builtin_HEXAGON_L2_loadw_locked",
-    "llvm.hexagon.L4.loadd.locked" => "__builtin__HEXAGON_L4_loadd_locked",
-    "llvm.hexagon.M2.acci" => "__builtin_HEXAGON_M2_acci",
-    "llvm.hexagon.M2.accii" => "__builtin_HEXAGON_M2_accii",
-    "llvm.hexagon.M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
-    "llvm.hexagon.M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
-    "llvm.hexagon.M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
-    "llvm.hexagon.M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
-    "llvm.hexagon.M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
-    "llvm.hexagon.M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
-    "llvm.hexagon.M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
-    "llvm.hexagon.M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
-    "llvm.hexagon.M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
-    "llvm.hexagon.M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
-    "llvm.hexagon.M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
-    "llvm.hexagon.M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
-    "llvm.hexagon.M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
-    "llvm.hexagon.M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
-    "llvm.hexagon.M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
-    "llvm.hexagon.M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
-    "llvm.hexagon.M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
-    "llvm.hexagon.M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
-    "llvm.hexagon.M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
-    "llvm.hexagon.M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
-    "llvm.hexagon.M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
-    "llvm.hexagon.M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
-    "llvm.hexagon.M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
-    "llvm.hexagon.M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
-    "llvm.hexagon.M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
-    "llvm.hexagon.M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
-    "llvm.hexagon.M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
-    "llvm.hexagon.M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
-    "llvm.hexagon.M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
-    "llvm.hexagon.M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
-    "llvm.hexagon.M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
-    "llvm.hexagon.M2.maci" => "__builtin_HEXAGON_M2_maci",
-    "llvm.hexagon.M2.macsin" => "__builtin_HEXAGON_M2_macsin",
-    "llvm.hexagon.M2.macsip" => "__builtin_HEXAGON_M2_macsip",
-    "llvm.hexagon.M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
-    "llvm.hexagon.M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
-    "llvm.hexagon.M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
-    "llvm.hexagon.M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
-    "llvm.hexagon.M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
-    "llvm.hexagon.M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
-    "llvm.hexagon.M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
-    "llvm.hexagon.M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
-    "llvm.hexagon.M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
-    "llvm.hexagon.M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
-    "llvm.hexagon.M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
-    "llvm.hexagon.M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
-    "llvm.hexagon.M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
-    "llvm.hexagon.M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
-    "llvm.hexagon.M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
-    "llvm.hexagon.M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
-    "llvm.hexagon.M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",
-    "llvm.hexagon.M2.mmpyh.rs1" => "__builtin_HEXAGON_M2_mmpyh_rs1",
-    "llvm.hexagon.M2.mmpyh.s0" => "__builtin_HEXAGON_M2_mmpyh_s0",
-    "llvm.hexagon.M2.mmpyh.s1" => "__builtin_HEXAGON_M2_mmpyh_s1",
-    "llvm.hexagon.M2.mmpyl.rs0" => "__builtin_HEXAGON_M2_mmpyl_rs0",
-    "llvm.hexagon.M2.mmpyl.rs1" => "__builtin_HEXAGON_M2_mmpyl_rs1",
-    "llvm.hexagon.M2.mmpyl.s0" => "__builtin_HEXAGON_M2_mmpyl_s0",
-    "llvm.hexagon.M2.mmpyl.s1" => "__builtin_HEXAGON_M2_mmpyl_s1",
-    "llvm.hexagon.M2.mmpyuh.rs0" => "__builtin_HEXAGON_M2_mmpyuh_rs0",
-    "llvm.hexagon.M2.mmpyuh.rs1" => "__builtin_HEXAGON_M2_mmpyuh_rs1",
-    "llvm.hexagon.M2.mmpyuh.s0" => "__builtin_HEXAGON_M2_mmpyuh_s0",
-    "llvm.hexagon.M2.mmpyuh.s1" => "__builtin_HEXAGON_M2_mmpyuh_s1",
-    "llvm.hexagon.M2.mmpyul.rs0" => "__builtin_HEXAGON_M2_mmpyul_rs0",
-    "llvm.hexagon.M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
-    "llvm.hexagon.M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
-    "llvm.hexagon.M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
-    "llvm.hexagon.M2.mnaci" => "__builtin_HEXAGON_M2_mnaci",
-    "llvm.hexagon.M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
-    "llvm.hexagon.M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
-    "llvm.hexagon.M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
-    "llvm.hexagon.M2.mpy.acc.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_hl_s1",
-    "llvm.hexagon.M2.mpy.acc.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_lh_s0",
-    "llvm.hexagon.M2.mpy.acc.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_lh_s1",
-    "llvm.hexagon.M2.mpy.acc.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_ll_s0",
-    "llvm.hexagon.M2.mpy.acc.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_ll_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
-    "llvm.hexagon.M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
-    "llvm.hexagon.M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
-    "llvm.hexagon.M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
-    "llvm.hexagon.M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
-    "llvm.hexagon.M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
-    "llvm.hexagon.M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
-    "llvm.hexagon.M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
-    "llvm.hexagon.M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
-    "llvm.hexagon.M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
-    "llvm.hexagon.M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
-    "llvm.hexagon.M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
-    "llvm.hexagon.M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
-    "llvm.hexagon.M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
-    "llvm.hexagon.M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
-    "llvm.hexagon.M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
-    "llvm.hexagon.M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
-    "llvm.hexagon.M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
-    "llvm.hexagon.M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
-    "llvm.hexagon.M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
-    "llvm.hexagon.M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
-    "llvm.hexagon.M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
-    "llvm.hexagon.M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
-    "llvm.hexagon.M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
-    "llvm.hexagon.M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
-    "llvm.hexagon.M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
-    "llvm.hexagon.M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
-    "llvm.hexagon.M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
-    "llvm.hexagon.M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
-    "llvm.hexagon.M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
-    "llvm.hexagon.M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
-    "llvm.hexagon.M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
-    "llvm.hexagon.M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
-    "llvm.hexagon.M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
-    "llvm.hexagon.M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
-    "llvm.hexagon.M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
-    "llvm.hexagon.M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
-    "llvm.hexagon.M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
-    "llvm.hexagon.M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
-    "llvm.hexagon.M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
-    "llvm.hexagon.M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
-    "llvm.hexagon.M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
-    "llvm.hexagon.M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
-    "llvm.hexagon.M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
-    "llvm.hexagon.M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
-    "llvm.hexagon.M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
-    "llvm.hexagon.M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
-    "llvm.hexagon.M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
-    "llvm.hexagon.M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
-    "llvm.hexagon.M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
-    "llvm.hexagon.M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
-    "llvm.hexagon.M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
-    "llvm.hexagon.M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
-    "llvm.hexagon.M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
-    "llvm.hexagon.M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
-    "llvm.hexagon.M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
-    "llvm.hexagon.M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
-    "llvm.hexagon.M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
-    "llvm.hexagon.M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
-    "llvm.hexagon.M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
-    "llvm.hexagon.M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
-    "llvm.hexagon.M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
-    "llvm.hexagon.M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
-    "llvm.hexagon.M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
-    "llvm.hexagon.M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
-    "llvm.hexagon.M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
-    "llvm.hexagon.M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
-    "llvm.hexagon.M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
-    "llvm.hexagon.M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
-    "llvm.hexagon.M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
-    "llvm.hexagon.M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
-    "llvm.hexagon.M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
-    "llvm.hexagon.M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
-    "llvm.hexagon.M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
-    "llvm.hexagon.M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
-    "llvm.hexagon.M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
-    "llvm.hexagon.M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
-    "llvm.hexagon.M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
-    "llvm.hexagon.M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
-    "llvm.hexagon.M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
-    "llvm.hexagon.M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
-    "llvm.hexagon.M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
-    "llvm.hexagon.M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
-    "llvm.hexagon.M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
-    "llvm.hexagon.M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
-    "llvm.hexagon.M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
-    "llvm.hexagon.M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
-    "llvm.hexagon.M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
-    "llvm.hexagon.M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
-    "llvm.hexagon.M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
-    "llvm.hexagon.M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
-    "llvm.hexagon.M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
-    "llvm.hexagon.M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
-    "llvm.hexagon.M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
-    "llvm.hexagon.M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
-    "llvm.hexagon.M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
-    "llvm.hexagon.M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
-    "llvm.hexagon.M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
-    "llvm.hexagon.M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
-    "llvm.hexagon.M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
-    "llvm.hexagon.M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
-    "llvm.hexagon.M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
-    "llvm.hexagon.M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
-    "llvm.hexagon.M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
-    "llvm.hexagon.M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
-    "llvm.hexagon.M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
-    "llvm.hexagon.M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
-    "llvm.hexagon.M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
-    "llvm.hexagon.M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
-    "llvm.hexagon.M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
-    "llvm.hexagon.M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
-    "llvm.hexagon.M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
-    "llvm.hexagon.M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
-    "llvm.hexagon.M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
-    "llvm.hexagon.M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
-    "llvm.hexagon.M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
-    "llvm.hexagon.M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
-    "llvm.hexagon.M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
-    "llvm.hexagon.M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
-    "llvm.hexagon.M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
-    "llvm.hexagon.M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
-    "llvm.hexagon.M2.nacci" => "__builtin_HEXAGON_M2_nacci",
-    "llvm.hexagon.M2.naccii" => "__builtin_HEXAGON_M2_naccii",
-    "llvm.hexagon.M2.subacc" => "__builtin_HEXAGON_M2_subacc",
-    "llvm.hexagon.M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
-    "llvm.hexagon.M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
-    "llvm.hexagon.M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
-    "llvm.hexagon.M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
-    "llvm.hexagon.M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
-    "llvm.hexagon.M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
-    "llvm.hexagon.M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
-    "llvm.hexagon.M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
-    "llvm.hexagon.M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
-    "llvm.hexagon.M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
-    "llvm.hexagon.M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
-    "llvm.hexagon.M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
-    "llvm.hexagon.M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
-    "llvm.hexagon.M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
-    "llvm.hexagon.M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
-    "llvm.hexagon.M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
-    "llvm.hexagon.M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
-    "llvm.hexagon.M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
-    "llvm.hexagon.M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
-    "llvm.hexagon.M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
-    "llvm.hexagon.M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
-    "llvm.hexagon.M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
-    "llvm.hexagon.M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
-    "llvm.hexagon.M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
-    "llvm.hexagon.M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
-    "llvm.hexagon.M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
-    "llvm.hexagon.M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
-    "llvm.hexagon.M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
-    "llvm.hexagon.M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
-    "llvm.hexagon.M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
-    "llvm.hexagon.M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
-    "llvm.hexagon.M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
-    "llvm.hexagon.M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
-    "llvm.hexagon.M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
-    "llvm.hexagon.M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
-    "llvm.hexagon.M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
-    "llvm.hexagon.M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
-    "llvm.hexagon.M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
-    "llvm.hexagon.M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
-    "llvm.hexagon.M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
-    "llvm.hexagon.M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
-    "llvm.hexagon.M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
-    "llvm.hexagon.M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
-    "llvm.hexagon.M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
-    "llvm.hexagon.M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
-    "llvm.hexagon.M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
-    "llvm.hexagon.M4.and.and" => "__builtin_HEXAGON_M4_and_and",
-    "llvm.hexagon.M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
-    "llvm.hexagon.M4.and.or" => "__builtin_HEXAGON_M4_and_or",
-    "llvm.hexagon.M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
-    "llvm.hexagon.M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
-    "llvm.hexagon.M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
-    "llvm.hexagon.M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
-    "llvm.hexagon.M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
-    "llvm.hexagon.M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
-    "llvm.hexagon.M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
-    "llvm.hexagon.M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
-    "llvm.hexagon.M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
-    "llvm.hexagon.M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
-    "llvm.hexagon.M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
-    "llvm.hexagon.M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
-    "llvm.hexagon.M4.or.and" => "__builtin_HEXAGON_M4_or_and",
-    "llvm.hexagon.M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
-    "llvm.hexagon.M4.or.or" => "__builtin_HEXAGON_M4_or_or",
-    "llvm.hexagon.M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
-    "llvm.hexagon.M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
-    "llvm.hexagon.M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
-    "llvm.hexagon.M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
-    "llvm.hexagon.M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
-    "llvm.hexagon.M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
-    "llvm.hexagon.M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
-    "llvm.hexagon.M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
-    "llvm.hexagon.M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
-    "llvm.hexagon.M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
-    "llvm.hexagon.M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
-    "llvm.hexagon.M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
-    "llvm.hexagon.M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
-    "llvm.hexagon.M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
-    "llvm.hexagon.M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
-    "llvm.hexagon.M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
-    "llvm.hexagon.M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
-    "llvm.hexagon.M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
-    "llvm.hexagon.M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
-    "llvm.hexagon.M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
-    "llvm.hexagon.M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
-    "llvm.hexagon.M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
-    "llvm.hexagon.M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
-    "llvm.hexagon.M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
-    "llvm.hexagon.M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
-    "llvm.hexagon.M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
-    "llvm.hexagon.M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
-    "llvm.hexagon.M6.vabsdiffb" => "__builtin_HEXAGON_M6_vabsdiffb",
-    "llvm.hexagon.M6.vabsdiffub" => "__builtin_HEXAGON_M6_vabsdiffub",
-    "llvm.hexagon.M7.dcmpyiw" => "__builtin_HEXAGON_M7_dcmpyiw",
-    "llvm.hexagon.M7.dcmpyiw.acc" => "__builtin_HEXAGON_M7_dcmpyiw_acc",
-    "llvm.hexagon.M7.dcmpyiwc" => "__builtin_HEXAGON_M7_dcmpyiwc",
-    "llvm.hexagon.M7.dcmpyiwc.acc" => "__builtin_HEXAGON_M7_dcmpyiwc_acc",
-    "llvm.hexagon.M7.dcmpyrw" => "__builtin_HEXAGON_M7_dcmpyrw",
-    "llvm.hexagon.M7.dcmpyrw.acc" => "__builtin_HEXAGON_M7_dcmpyrw_acc",
-    "llvm.hexagon.M7.dcmpyrwc" => "__builtin_HEXAGON_M7_dcmpyrwc",
-    "llvm.hexagon.M7.dcmpyrwc.acc" => "__builtin_HEXAGON_M7_dcmpyrwc_acc",
-    "llvm.hexagon.M7.vdmpy" => "__builtin_HEXAGON_M7_vdmpy",
-    "llvm.hexagon.M7.vdmpy.acc" => "__builtin_HEXAGON_M7_vdmpy_acc",
-    "llvm.hexagon.M7.wcmpyiw" => "__builtin_HEXAGON_M7_wcmpyiw",
-    "llvm.hexagon.M7.wcmpyiw.rnd" => "__builtin_HEXAGON_M7_wcmpyiw_rnd",
-    "llvm.hexagon.M7.wcmpyiwc" => "__builtin_HEXAGON_M7_wcmpyiwc",
-    "llvm.hexagon.M7.wcmpyiwc.rnd" => "__builtin_HEXAGON_M7_wcmpyiwc_rnd",
-    "llvm.hexagon.M7.wcmpyrw" => "__builtin_HEXAGON_M7_wcmpyrw",
-    "llvm.hexagon.M7.wcmpyrw.rnd" => "__builtin_HEXAGON_M7_wcmpyrw_rnd",
-    "llvm.hexagon.M7.wcmpyrwc" => "__builtin_HEXAGON_M7_wcmpyrwc",
-    "llvm.hexagon.M7.wcmpyrwc.rnd" => "__builtin_HEXAGON_M7_wcmpyrwc_rnd",
-    "llvm.hexagon.S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
-    "llvm.hexagon.S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
-    "llvm.hexagon.S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
-    "llvm.hexagon.S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
-    "llvm.hexagon.S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
-    "llvm.hexagon.S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
-    "llvm.hexagon.S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
-    "llvm.hexagon.S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
-    "llvm.hexagon.S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
-    "llvm.hexagon.S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
-    "llvm.hexagon.S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
-    "llvm.hexagon.S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
-    "llvm.hexagon.S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
-    "llvm.hexagon.S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
-    "llvm.hexagon.S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
-    "llvm.hexagon.S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
-    "llvm.hexagon.S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
-    "llvm.hexagon.S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
-    "llvm.hexagon.S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
-    "llvm.hexagon.S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
-    "llvm.hexagon.S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
-    "llvm.hexagon.S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
-    "llvm.hexagon.S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
-    "llvm.hexagon.S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
-    "llvm.hexagon.S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
-    "llvm.hexagon.S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
-    "llvm.hexagon.S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
-    "llvm.hexagon.S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
-    "llvm.hexagon.S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
-    "llvm.hexagon.S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
-    "llvm.hexagon.S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
-    "llvm.hexagon.S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
-    "llvm.hexagon.S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
-    "llvm.hexagon.S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
-    "llvm.hexagon.S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
-    "llvm.hexagon.S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
-    "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
-    "llvm.hexagon.S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
-    "llvm.hexagon.S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
-    "llvm.hexagon.S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
-    "llvm.hexagon.S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
-    "llvm.hexagon.S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
-    "llvm.hexagon.S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
-    "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
-    "llvm.hexagon.S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
-    "llvm.hexagon.S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
-    "llvm.hexagon.S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
-    "llvm.hexagon.S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
-    "llvm.hexagon.S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
-    "llvm.hexagon.S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
-    "llvm.hexagon.S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
-    "llvm.hexagon.S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
-    "llvm.hexagon.S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
-    "llvm.hexagon.S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
-    "llvm.hexagon.S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
-    "llvm.hexagon.S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
-    "llvm.hexagon.S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
-    "llvm.hexagon.S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
-    "llvm.hexagon.S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
-    "llvm.hexagon.S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
-    "llvm.hexagon.S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
-    "llvm.hexagon.S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
-    "llvm.hexagon.S2.brev" => "__builtin_HEXAGON_S2_brev",
-    "llvm.hexagon.S2.brevp" => "__builtin_HEXAGON_S2_brevp",
-    "llvm.hexagon.S2.cabacencbin" => "__builtin_HEXAGON_S2_cabacencbin",
-    "llvm.hexagon.S2.cl0" => "__builtin_HEXAGON_S2_cl0",
-    "llvm.hexagon.S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
-    "llvm.hexagon.S2.cl1" => "__builtin_HEXAGON_S2_cl1",
-    "llvm.hexagon.S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
-    "llvm.hexagon.S2.clb" => "__builtin_HEXAGON_S2_clb",
-    "llvm.hexagon.S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
-    "llvm.hexagon.S2.clbp" => "__builtin_HEXAGON_S2_clbp",
-    "llvm.hexagon.S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
-    "llvm.hexagon.S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
-    "llvm.hexagon.S2.ct0" => "__builtin_HEXAGON_S2_ct0",
-    "llvm.hexagon.S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
-    "llvm.hexagon.S2.ct1" => "__builtin_HEXAGON_S2_ct1",
-    "llvm.hexagon.S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
-    "llvm.hexagon.S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
-    "llvm.hexagon.S2.extractu" => "__builtin_HEXAGON_S2_extractu",
-    "llvm.hexagon.S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
-    "llvm.hexagon.S2.extractup" => "__builtin_HEXAGON_S2_extractup",
-    "llvm.hexagon.S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
-    "llvm.hexagon.S2.insert" => "__builtin_HEXAGON_S2_insert",
-    "llvm.hexagon.S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
-    "llvm.hexagon.S2.insertp" => "__builtin_HEXAGON_S2_insertp",
-    "llvm.hexagon.S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
-    "llvm.hexagon.S2.interleave" => "__builtin_HEXAGON_S2_interleave",
-    "llvm.hexagon.S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
-    "llvm.hexagon.S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
-    "llvm.hexagon.S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
-    "llvm.hexagon.S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
-    "llvm.hexagon.S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
-    "llvm.hexagon.S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
-    "llvm.hexagon.S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
-    "llvm.hexagon.S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
-    "llvm.hexagon.S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
-    "llvm.hexagon.S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
-    "llvm.hexagon.S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
-    "llvm.hexagon.S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
-    "llvm.hexagon.S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
-    "llvm.hexagon.S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
-    "llvm.hexagon.S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
-    "llvm.hexagon.S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
-    "llvm.hexagon.S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
-    "llvm.hexagon.S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
-    "llvm.hexagon.S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
-    "llvm.hexagon.S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
-    "llvm.hexagon.S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
-    "llvm.hexagon.S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
-    "llvm.hexagon.S2.lsr.i.r.and" => "__builtin_HEXAGON_S2_lsr_i_r_and",
-    "llvm.hexagon.S2.lsr.i.r.nac" => "__builtin_HEXAGON_S2_lsr_i_r_nac",
-    "llvm.hexagon.S2.lsr.i.r.or" => "__builtin_HEXAGON_S2_lsr_i_r_or",
-    "llvm.hexagon.S2.lsr.i.r.xacc" => "__builtin_HEXAGON_S2_lsr_i_r_xacc",
-    "llvm.hexagon.S2.lsr.i.vh" => "__builtin_HEXAGON_S2_lsr_i_vh",
-    "llvm.hexagon.S2.lsr.i.vw" => "__builtin_HEXAGON_S2_lsr_i_vw",
-    "llvm.hexagon.S2.lsr.r.p" => "__builtin_HEXAGON_S2_lsr_r_p",
-    "llvm.hexagon.S2.lsr.r.p.acc" => "__builtin_HEXAGON_S2_lsr_r_p_acc",
-    "llvm.hexagon.S2.lsr.r.p.and" => "__builtin_HEXAGON_S2_lsr_r_p_and",
-    "llvm.hexagon.S2.lsr.r.p.nac" => "__builtin_HEXAGON_S2_lsr_r_p_nac",
-    "llvm.hexagon.S2.lsr.r.p.or" => "__builtin_HEXAGON_S2_lsr_r_p_or",
-    "llvm.hexagon.S2.lsr.r.p.xor" => "__builtin_HEXAGON_S2_lsr_r_p_xor",
-    "llvm.hexagon.S2.lsr.r.r" => "__builtin_HEXAGON_S2_lsr_r_r",
-    "llvm.hexagon.S2.lsr.r.r.acc" => "__builtin_HEXAGON_S2_lsr_r_r_acc",
-    "llvm.hexagon.S2.lsr.r.r.and" => "__builtin_HEXAGON_S2_lsr_r_r_and",
-    "llvm.hexagon.S2.lsr.r.r.nac" => "__builtin_HEXAGON_S2_lsr_r_r_nac",
-    "llvm.hexagon.S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
-    "llvm.hexagon.S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
-    "llvm.hexagon.S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
-    "llvm.hexagon.S2.mask" => "__builtin_HEXAGON_S2_mask",
-    "llvm.hexagon.S2.packhl" => "__builtin_HEXAGON_S2_packhl",
-    "llvm.hexagon.S2.parityp" => "__builtin_HEXAGON_S2_parityp",
-    "llvm.hexagon.S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
-    "llvm.hexagon.S2.setbit.r" => "__builtin_HEXAGON_S2_setbit_r",
-    "llvm.hexagon.S2.shuffeb" => "__builtin_HEXAGON_S2_shuffeb",
-    "llvm.hexagon.S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
-    "llvm.hexagon.S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
-    "llvm.hexagon.S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
-    "llvm.hexagon.S2.storerb.pbr" => "__builtin_brev_stb",
-    "llvm.hexagon.S2.storerd.pbr" => "__builtin_brev_std",
-    "llvm.hexagon.S2.storerf.pbr" => "__builtin_brev_sthhi",
-    "llvm.hexagon.S2.storerh.pbr" => "__builtin_brev_sth",
-    "llvm.hexagon.S2.storeri.pbr" => "__builtin_brev_stw",
-    "llvm.hexagon.S2.storew.locked" => "__builtin_HEXAGON_S2_storew_locked",
-    "llvm.hexagon.S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
-    "llvm.hexagon.S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
-    "llvm.hexagon.S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
-    "llvm.hexagon.S2.tableidxd.goodsyntax" => "__builtin_HEXAGON_S2_tableidxd_goodsyntax",
-    "llvm.hexagon.S2.tableidxh.goodsyntax" => "__builtin_HEXAGON_S2_tableidxh_goodsyntax",
-    "llvm.hexagon.S2.tableidxw.goodsyntax" => "__builtin_HEXAGON_S2_tableidxw_goodsyntax",
-    "llvm.hexagon.S2.togglebit.i" => "__builtin_HEXAGON_S2_togglebit_i",
-    "llvm.hexagon.S2.togglebit.r" => "__builtin_HEXAGON_S2_togglebit_r",
-    "llvm.hexagon.S2.tstbit.i" => "__builtin_HEXAGON_S2_tstbit_i",
-    "llvm.hexagon.S2.tstbit.r" => "__builtin_HEXAGON_S2_tstbit_r",
-    "llvm.hexagon.S2.valignib" => "__builtin_HEXAGON_S2_valignib",
-    "llvm.hexagon.S2.valignrb" => "__builtin_HEXAGON_S2_valignrb",
-    "llvm.hexagon.S2.vcnegh" => "__builtin_HEXAGON_S2_vcnegh",
-    "llvm.hexagon.S2.vcrotate" => "__builtin_HEXAGON_S2_vcrotate",
-    "llvm.hexagon.S2.vrcnegh" => "__builtin_HEXAGON_S2_vrcnegh",
-    "llvm.hexagon.S2.vrndpackwh" => "__builtin_HEXAGON_S2_vrndpackwh",
-    "llvm.hexagon.S2.vrndpackwhs" => "__builtin_HEXAGON_S2_vrndpackwhs",
-    "llvm.hexagon.S2.vsathb" => "__builtin_HEXAGON_S2_vsathb",
-    "llvm.hexagon.S2.vsathb.nopack" => "__builtin_HEXAGON_S2_vsathb_nopack",
-    "llvm.hexagon.S2.vsathub" => "__builtin_HEXAGON_S2_vsathub",
-    "llvm.hexagon.S2.vsathub.nopack" => "__builtin_HEXAGON_S2_vsathub_nopack",
-    "llvm.hexagon.S2.vsatwh" => "__builtin_HEXAGON_S2_vsatwh",
-    "llvm.hexagon.S2.vsatwh.nopack" => "__builtin_HEXAGON_S2_vsatwh_nopack",
-    "llvm.hexagon.S2.vsatwuh" => "__builtin_HEXAGON_S2_vsatwuh",
-    "llvm.hexagon.S2.vsatwuh.nopack" => "__builtin_HEXAGON_S2_vsatwuh_nopack",
-    "llvm.hexagon.S2.vsplatrb" => "__builtin_HEXAGON_S2_vsplatrb",
-    "llvm.hexagon.S2.vsplatrh" => "__builtin_HEXAGON_S2_vsplatrh",
-    "llvm.hexagon.S2.vspliceib" => "__builtin_HEXAGON_S2_vspliceib",
-    "llvm.hexagon.S2.vsplicerb" => "__builtin_HEXAGON_S2_vsplicerb",
-    "llvm.hexagon.S2.vsxtbh" => "__builtin_HEXAGON_S2_vsxtbh",
-    "llvm.hexagon.S2.vsxthw" => "__builtin_HEXAGON_S2_vsxthw",
-    "llvm.hexagon.S2.vtrunehb" => "__builtin_HEXAGON_S2_vtrunehb",
-    "llvm.hexagon.S2.vtrunewh" => "__builtin_HEXAGON_S2_vtrunewh",
-    "llvm.hexagon.S2.vtrunohb" => "__builtin_HEXAGON_S2_vtrunohb",
-    "llvm.hexagon.S2.vtrunowh" => "__builtin_HEXAGON_S2_vtrunowh",
-    "llvm.hexagon.S2.vzxtbh" => "__builtin_HEXAGON_S2_vzxtbh",
-    "llvm.hexagon.S2.vzxthw" => "__builtin_HEXAGON_S2_vzxthw",
-    "llvm.hexagon.S4.addaddi" => "__builtin_HEXAGON_S4_addaddi",
-    "llvm.hexagon.S4.addi.asl.ri" => "__builtin_HEXAGON_S4_addi_asl_ri",
-    "llvm.hexagon.S4.addi.lsr.ri" => "__builtin_HEXAGON_S4_addi_lsr_ri",
-    "llvm.hexagon.S4.andi.asl.ri" => "__builtin_HEXAGON_S4_andi_asl_ri",
-    "llvm.hexagon.S4.andi.lsr.ri" => "__builtin_HEXAGON_S4_andi_lsr_ri",
-    "llvm.hexagon.S4.clbaddi" => "__builtin_HEXAGON_S4_clbaddi",
-    "llvm.hexagon.S4.clbpaddi" => "__builtin_HEXAGON_S4_clbpaddi",
-    "llvm.hexagon.S4.clbpnorm" => "__builtin_HEXAGON_S4_clbpnorm",
-    "llvm.hexagon.S4.extract" => "__builtin_HEXAGON_S4_extract",
-    "llvm.hexagon.S4.extract.rp" => "__builtin_HEXAGON_S4_extract_rp",
-    "llvm.hexagon.S4.extractp" => "__builtin_HEXAGON_S4_extractp",
-    "llvm.hexagon.S4.extractp.rp" => "__builtin_HEXAGON_S4_extractp_rp",
-    "llvm.hexagon.S4.lsli" => "__builtin_HEXAGON_S4_lsli",
-    "llvm.hexagon.S4.ntstbit.i" => "__builtin_HEXAGON_S4_ntstbit_i",
-    "llvm.hexagon.S4.ntstbit.r" => "__builtin_HEXAGON_S4_ntstbit_r",
-    "llvm.hexagon.S4.or.andi" => "__builtin_HEXAGON_S4_or_andi",
-    "llvm.hexagon.S4.or.andix" => "__builtin_HEXAGON_S4_or_andix",
-    "llvm.hexagon.S4.or.ori" => "__builtin_HEXAGON_S4_or_ori",
-    "llvm.hexagon.S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
-    "llvm.hexagon.S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
-    "llvm.hexagon.S4.parity" => "__builtin_HEXAGON_S4_parity",
-    "llvm.hexagon.S4.stored.locked" => "__builtin_HEXAGON_S4_stored_locked",
-    "llvm.hexagon.S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
-    "llvm.hexagon.S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
-    "llvm.hexagon.S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
-    "llvm.hexagon.S4.vrcrotate" => "__builtin_HEXAGON_S4_vrcrotate",
-    "llvm.hexagon.S4.vrcrotate.acc" => "__builtin_HEXAGON_S4_vrcrotate_acc",
-    "llvm.hexagon.S4.vxaddsubh" => "__builtin_HEXAGON_S4_vxaddsubh",
-    "llvm.hexagon.S4.vxaddsubhr" => "__builtin_HEXAGON_S4_vxaddsubhr",
-    "llvm.hexagon.S4.vxaddsubw" => "__builtin_HEXAGON_S4_vxaddsubw",
-    "llvm.hexagon.S4.vxsubaddh" => "__builtin_HEXAGON_S4_vxsubaddh",
-    "llvm.hexagon.S4.vxsubaddhr" => "__builtin_HEXAGON_S4_vxsubaddhr",
-    "llvm.hexagon.S4.vxsubaddw" => "__builtin_HEXAGON_S4_vxsubaddw",
-    "llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax" => "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax",
-    "llvm.hexagon.S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
-    "llvm.hexagon.S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
-    "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
-    "llvm.hexagon.S6.rol.i.p" => "__builtin_HEXAGON_S6_rol_i_p",
-    "llvm.hexagon.S6.rol.i.p.acc" => "__builtin_HEXAGON_S6_rol_i_p_acc",
-    "llvm.hexagon.S6.rol.i.p.and" => "__builtin_HEXAGON_S6_rol_i_p_and",
-    "llvm.hexagon.S6.rol.i.p.nac" => "__builtin_HEXAGON_S6_rol_i_p_nac",
-    "llvm.hexagon.S6.rol.i.p.or" => "__builtin_HEXAGON_S6_rol_i_p_or",
-    "llvm.hexagon.S6.rol.i.p.xacc" => "__builtin_HEXAGON_S6_rol_i_p_xacc",
-    "llvm.hexagon.S6.rol.i.r" => "__builtin_HEXAGON_S6_rol_i_r",
-    "llvm.hexagon.S6.rol.i.r.acc" => "__builtin_HEXAGON_S6_rol_i_r_acc",
-    "llvm.hexagon.S6.rol.i.r.and" => "__builtin_HEXAGON_S6_rol_i_r_and",
-    "llvm.hexagon.S6.rol.i.r.nac" => "__builtin_HEXAGON_S6_rol_i_r_nac",
-    "llvm.hexagon.S6.rol.i.r.or" => "__builtin_HEXAGON_S6_rol_i_r_or",
-    "llvm.hexagon.S6.rol.i.r.xacc" => "__builtin_HEXAGON_S6_rol_i_r_xacc",
-    "llvm.hexagon.S6.vsplatrbp" => "__builtin_HEXAGON_S6_vsplatrbp",
-    "llvm.hexagon.S6.vtrunehb.ppp" => "__builtin_HEXAGON_S6_vtrunehb_ppp",
-    "llvm.hexagon.S6.vtrunohb.ppp" => "__builtin_HEXAGON_S6_vtrunohb_ppp",
-    "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
-    "llvm.hexagon.V6.extractw" => "__builtin_HEXAGON_V6_extractw",
-    "llvm.hexagon.V6.extractw.128B" => "__builtin_HEXAGON_V6_extractw_128B",
-    "llvm.hexagon.V6.get.qfext" => "__builtin_HEXAGON_V6_get_qfext",
-    "llvm.hexagon.V6.get.qfext.128B" => "__builtin_HEXAGON_V6_get_qfext_128B",
-    "llvm.hexagon.V6.get.qfext.oracc" => "__builtin_HEXAGON_V6_get_qfext_oracc",
-    "llvm.hexagon.V6.get.qfext.oracc.128B" => "__builtin_HEXAGON_V6_get_qfext_oracc_128B",
-    "llvm.hexagon.V6.hi" => "__builtin_HEXAGON_V6_hi",
-    "llvm.hexagon.V6.hi.128B" => "__builtin_HEXAGON_V6_hi_128B",
-    "llvm.hexagon.V6.lo" => "__builtin_HEXAGON_V6_lo",
-    "llvm.hexagon.V6.lo.128B" => "__builtin_HEXAGON_V6_lo_128B",
-    "llvm.hexagon.V6.lvsplatb" => "__builtin_HEXAGON_V6_lvsplatb",
-    "llvm.hexagon.V6.lvsplatb.128B" => "__builtin_HEXAGON_V6_lvsplatb_128B",
-    "llvm.hexagon.V6.lvsplath" => "__builtin_HEXAGON_V6_lvsplath",
-    "llvm.hexagon.V6.lvsplath.128B" => "__builtin_HEXAGON_V6_lvsplath_128B",
-    "llvm.hexagon.V6.lvsplatw" => "__builtin_HEXAGON_V6_lvsplatw",
-    "llvm.hexagon.V6.lvsplatw.128B" => "__builtin_HEXAGON_V6_lvsplatw_128B",
-    "llvm.hexagon.V6.pred.and" => "__builtin_HEXAGON_V6_pred_and",
-    "llvm.hexagon.V6.pred.and.128B" => "__builtin_HEXAGON_V6_pred_and_128B",
-    "llvm.hexagon.V6.pred.and.n" => "__builtin_HEXAGON_V6_pred_and_n",
-    "llvm.hexagon.V6.pred.and.n.128B" => "__builtin_HEXAGON_V6_pred_and_n_128B",
-    "llvm.hexagon.V6.pred.not" => "__builtin_HEXAGON_V6_pred_not",
-    "llvm.hexagon.V6.pred.not.128B" => "__builtin_HEXAGON_V6_pred_not_128B",
-    "llvm.hexagon.V6.pred.or" => "__builtin_HEXAGON_V6_pred_or",
-    "llvm.hexagon.V6.pred.or.128B" => "__builtin_HEXAGON_V6_pred_or_128B",
-    "llvm.hexagon.V6.pred.or.n" => "__builtin_HEXAGON_V6_pred_or_n",
-    "llvm.hexagon.V6.pred.or.n.128B" => "__builtin_HEXAGON_V6_pred_or_n_128B",
-    "llvm.hexagon.V6.pred.scalar2" => "__builtin_HEXAGON_V6_pred_scalar2",
-    "llvm.hexagon.V6.pred.scalar2.128B" => "__builtin_HEXAGON_V6_pred_scalar2_128B",
-    "llvm.hexagon.V6.pred.scalar2v2" => "__builtin_HEXAGON_V6_pred_scalar2v2",
-    "llvm.hexagon.V6.pred.scalar2v2.128B" => "__builtin_HEXAGON_V6_pred_scalar2v2_128B",
-    "llvm.hexagon.V6.pred.xor" => "__builtin_HEXAGON_V6_pred_xor",
-    "llvm.hexagon.V6.pred.xor.128B" => "__builtin_HEXAGON_V6_pred_xor_128B",
-    "llvm.hexagon.V6.set.qfext" => "__builtin_HEXAGON_V6_set_qfext",
-    "llvm.hexagon.V6.set.qfext.128B" => "__builtin_HEXAGON_V6_set_qfext_128B",
-    "llvm.hexagon.V6.shuffeqh" => "__builtin_HEXAGON_V6_shuffeqh",
-    "llvm.hexagon.V6.shuffeqh.128B" => "__builtin_HEXAGON_V6_shuffeqh_128B",
-    "llvm.hexagon.V6.shuffeqw" => "__builtin_HEXAGON_V6_shuffeqw",
-    "llvm.hexagon.V6.shuffeqw.128B" => "__builtin_HEXAGON_V6_shuffeqw_128B",
-    "llvm.hexagon.V6.v6mpyhubs10" => "__builtin_HEXAGON_V6_v6mpyhubs10",
-    "llvm.hexagon.V6.v6mpyhubs10.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_128B",
-    "llvm.hexagon.V6.v6mpyhubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx",
-    "llvm.hexagon.V6.v6mpyhubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx_128B",
-    "llvm.hexagon.V6.v6mpyvubs10" => "__builtin_HEXAGON_V6_v6mpyvubs10",
-    "llvm.hexagon.V6.v6mpyvubs10.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_128B",
-    "llvm.hexagon.V6.v6mpyvubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx",
-    "llvm.hexagon.V6.v6mpyvubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx_128B",
-    "llvm.hexagon.V6.vS32b.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai",
-    "llvm.hexagon.V6.vS32b.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai_128B",
-    "llvm.hexagon.V6.vS32b.nt.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai",
-    "llvm.hexagon.V6.vS32b.nt.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai_128B",
-    "llvm.hexagon.V6.vS32b.nt.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai",
-    "llvm.hexagon.V6.vS32b.nt.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai_128B",
-    "llvm.hexagon.V6.vS32b.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_qpred_ai",
-    "llvm.hexagon.V6.vS32b.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_qpred_ai_128B",
-    "llvm.hexagon.V6.vabs.f8" => "__builtin_HEXAGON_V6_vabs_f8",
-    "llvm.hexagon.V6.vabs.f8.128B" => "__builtin_HEXAGON_V6_vabs_f8_128B",
-    "llvm.hexagon.V6.vabs.hf" => "__builtin_HEXAGON_V6_vabs_hf",
-    "llvm.hexagon.V6.vabs.hf.128B" => "__builtin_HEXAGON_V6_vabs_hf_128B",
-    "llvm.hexagon.V6.vabs.sf" => "__builtin_HEXAGON_V6_vabs_sf",
-    "llvm.hexagon.V6.vabs.sf.128B" => "__builtin_HEXAGON_V6_vabs_sf_128B",
-    "llvm.hexagon.V6.vabsb" => "__builtin_HEXAGON_V6_vabsb",
-    "llvm.hexagon.V6.vabsb.128B" => "__builtin_HEXAGON_V6_vabsb_128B",
-    "llvm.hexagon.V6.vabsb.sat" => "__builtin_HEXAGON_V6_vabsb_sat",
-    "llvm.hexagon.V6.vabsb.sat.128B" => "__builtin_HEXAGON_V6_vabsb_sat_128B",
-    "llvm.hexagon.V6.vabsdiffh" => "__builtin_HEXAGON_V6_vabsdiffh",
-    "llvm.hexagon.V6.vabsdiffh.128B" => "__builtin_HEXAGON_V6_vabsdiffh_128B",
-    "llvm.hexagon.V6.vabsdiffub" => "__builtin_HEXAGON_V6_vabsdiffub",
-    "llvm.hexagon.V6.vabsdiffub.128B" => "__builtin_HEXAGON_V6_vabsdiffub_128B",
-    "llvm.hexagon.V6.vabsdiffuh" => "__builtin_HEXAGON_V6_vabsdiffuh",
-    "llvm.hexagon.V6.vabsdiffuh.128B" => "__builtin_HEXAGON_V6_vabsdiffuh_128B",
-    "llvm.hexagon.V6.vabsdiffw" => "__builtin_HEXAGON_V6_vabsdiffw",
-    "llvm.hexagon.V6.vabsdiffw.128B" => "__builtin_HEXAGON_V6_vabsdiffw_128B",
-    "llvm.hexagon.V6.vabsh" => "__builtin_HEXAGON_V6_vabsh",
-    "llvm.hexagon.V6.vabsh.128B" => "__builtin_HEXAGON_V6_vabsh_128B",
-    "llvm.hexagon.V6.vabsh.sat" => "__builtin_HEXAGON_V6_vabsh_sat",
-    "llvm.hexagon.V6.vabsh.sat.128B" => "__builtin_HEXAGON_V6_vabsh_sat_128B",
-    "llvm.hexagon.V6.vabsw" => "__builtin_HEXAGON_V6_vabsw",
-    "llvm.hexagon.V6.vabsw.128B" => "__builtin_HEXAGON_V6_vabsw_128B",
-    "llvm.hexagon.V6.vabsw.sat" => "__builtin_HEXAGON_V6_vabsw_sat",
-    "llvm.hexagon.V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
-    "llvm.hexagon.V6.vadd.hf" => "__builtin_HEXAGON_V6_vadd_hf",
-    "llvm.hexagon.V6.vadd.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_128B",
-    "llvm.hexagon.V6.vadd.hf.f8" => "__builtin_HEXAGON_V6_vadd_hf_f8",
-    "llvm.hexagon.V6.vadd.hf.f8.128B" => "__builtin_HEXAGON_V6_vadd_hf_f8_128B",
-    "llvm.hexagon.V6.vadd.hf.hf" => "__builtin_HEXAGON_V6_vadd_hf_hf",
-    "llvm.hexagon.V6.vadd.hf.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_hf_128B",
-    "llvm.hexagon.V6.vadd.qf16" => "__builtin_HEXAGON_V6_vadd_qf16",
-    "llvm.hexagon.V6.vadd.qf16.128B" => "__builtin_HEXAGON_V6_vadd_qf16_128B",
-    "llvm.hexagon.V6.vadd.qf16.mix" => "__builtin_HEXAGON_V6_vadd_qf16_mix",
-    "llvm.hexagon.V6.vadd.qf16.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf16_mix_128B",
-    "llvm.hexagon.V6.vadd.qf32" => "__builtin_HEXAGON_V6_vadd_qf32",
-    "llvm.hexagon.V6.vadd.qf32.128B" => "__builtin_HEXAGON_V6_vadd_qf32_128B",
-    "llvm.hexagon.V6.vadd.qf32.mix" => "__builtin_HEXAGON_V6_vadd_qf32_mix",
-    "llvm.hexagon.V6.vadd.qf32.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf32_mix_128B",
-    "llvm.hexagon.V6.vadd.sf" => "__builtin_HEXAGON_V6_vadd_sf",
-    "llvm.hexagon.V6.vadd.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_128B",
-    "llvm.hexagon.V6.vadd.sf.bf" => "__builtin_HEXAGON_V6_vadd_sf_bf",
-    "llvm.hexagon.V6.vadd.sf.bf.128B" => "__builtin_HEXAGON_V6_vadd_sf_bf_128B",
-    "llvm.hexagon.V6.vadd.sf.hf" => "__builtin_HEXAGON_V6_vadd_sf_hf",
-    "llvm.hexagon.V6.vadd.sf.hf.128B" => "__builtin_HEXAGON_V6_vadd_sf_hf_128B",
-    "llvm.hexagon.V6.vadd.sf.sf" => "__builtin_HEXAGON_V6_vadd_sf_sf",
-    "llvm.hexagon.V6.vadd.sf.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_sf_128B",
-    "llvm.hexagon.V6.vaddb" => "__builtin_HEXAGON_V6_vaddb",
-    "llvm.hexagon.V6.vaddb.128B" => "__builtin_HEXAGON_V6_vaddb_128B",
-    "llvm.hexagon.V6.vaddb.dv" => "__builtin_HEXAGON_V6_vaddb_dv",
-    "llvm.hexagon.V6.vaddb.dv.128B" => "__builtin_HEXAGON_V6_vaddb_dv_128B",
-    "llvm.hexagon.V6.vaddbnq" => "__builtin_HEXAGON_V6_vaddbnq",
-    "llvm.hexagon.V6.vaddbnq.128B" => "__builtin_HEXAGON_V6_vaddbnq_128B",
-    "llvm.hexagon.V6.vaddbq" => "__builtin_HEXAGON_V6_vaddbq",
-    "llvm.hexagon.V6.vaddbq.128B" => "__builtin_HEXAGON_V6_vaddbq_128B",
-    "llvm.hexagon.V6.vaddbsat" => "__builtin_HEXAGON_V6_vaddbsat",
-    "llvm.hexagon.V6.vaddbsat.128B" => "__builtin_HEXAGON_V6_vaddbsat_128B",
-    "llvm.hexagon.V6.vaddbsat.dv" => "__builtin_HEXAGON_V6_vaddbsat_dv",
-    "llvm.hexagon.V6.vaddbsat.dv.128B" => "__builtin_HEXAGON_V6_vaddbsat_dv_128B",
-    "llvm.hexagon.V6.vaddcarrysat" => "__builtin_HEXAGON_V6_vaddcarrysat",
-    "llvm.hexagon.V6.vaddcarrysat.128B" => "__builtin_HEXAGON_V6_vaddcarrysat_128B",
-    "llvm.hexagon.V6.vaddclbh" => "__builtin_HEXAGON_V6_vaddclbh",
-    "llvm.hexagon.V6.vaddclbh.128B" => "__builtin_HEXAGON_V6_vaddclbh_128B",
-    "llvm.hexagon.V6.vaddclbw" => "__builtin_HEXAGON_V6_vaddclbw",
-    "llvm.hexagon.V6.vaddclbw.128B" => "__builtin_HEXAGON_V6_vaddclbw_128B",
-    "llvm.hexagon.V6.vaddh" => "__builtin_HEXAGON_V6_vaddh",
-    "llvm.hexagon.V6.vaddh.128B" => "__builtin_HEXAGON_V6_vaddh_128B",
-    "llvm.hexagon.V6.vaddh.dv" => "__builtin_HEXAGON_V6_vaddh_dv",
-    "llvm.hexagon.V6.vaddh.dv.128B" => "__builtin_HEXAGON_V6_vaddh_dv_128B",
-    "llvm.hexagon.V6.vaddhnq" => "__builtin_HEXAGON_V6_vaddhnq",
-    "llvm.hexagon.V6.vaddhnq.128B" => "__builtin_HEXAGON_V6_vaddhnq_128B",
-    "llvm.hexagon.V6.vaddhq" => "__builtin_HEXAGON_V6_vaddhq",
-    "llvm.hexagon.V6.vaddhq.128B" => "__builtin_HEXAGON_V6_vaddhq_128B",
-    "llvm.hexagon.V6.vaddhsat" => "__builtin_HEXAGON_V6_vaddhsat",
-    "llvm.hexagon.V6.vaddhsat.128B" => "__builtin_HEXAGON_V6_vaddhsat_128B",
-    "llvm.hexagon.V6.vaddhsat.dv" => "__builtin_HEXAGON_V6_vaddhsat_dv",
-    "llvm.hexagon.V6.vaddhsat.dv.128B" => "__builtin_HEXAGON_V6_vaddhsat_dv_128B",
-    "llvm.hexagon.V6.vaddhw" => "__builtin_HEXAGON_V6_vaddhw",
-    "llvm.hexagon.V6.vaddhw.128B" => "__builtin_HEXAGON_V6_vaddhw_128B",
-    "llvm.hexagon.V6.vaddhw.acc" => "__builtin_HEXAGON_V6_vaddhw_acc",
-    "llvm.hexagon.V6.vaddhw.acc.128B" => "__builtin_HEXAGON_V6_vaddhw_acc_128B",
-    "llvm.hexagon.V6.vaddubh" => "__builtin_HEXAGON_V6_vaddubh",
-    "llvm.hexagon.V6.vaddubh.128B" => "__builtin_HEXAGON_V6_vaddubh_128B",
-    "llvm.hexagon.V6.vaddubh.acc" => "__builtin_HEXAGON_V6_vaddubh_acc",
-    "llvm.hexagon.V6.vaddubh.acc.128B" => "__builtin_HEXAGON_V6_vaddubh_acc_128B",
-    "llvm.hexagon.V6.vaddubsat" => "__builtin_HEXAGON_V6_vaddubsat",
-    "llvm.hexagon.V6.vaddubsat.128B" => "__builtin_HEXAGON_V6_vaddubsat_128B",
-    "llvm.hexagon.V6.vaddubsat.dv" => "__builtin_HEXAGON_V6_vaddubsat_dv",
-    "llvm.hexagon.V6.vaddubsat.dv.128B" => "__builtin_HEXAGON_V6_vaddubsat_dv_128B",
-    "llvm.hexagon.V6.vaddububb.sat" => "__builtin_HEXAGON_V6_vaddububb_sat",
-    "llvm.hexagon.V6.vaddububb.sat.128B" => "__builtin_HEXAGON_V6_vaddububb_sat_128B",
-    "llvm.hexagon.V6.vadduhsat" => "__builtin_HEXAGON_V6_vadduhsat",
-    "llvm.hexagon.V6.vadduhsat.128B" => "__builtin_HEXAGON_V6_vadduhsat_128B",
-    "llvm.hexagon.V6.vadduhsat.dv" => "__builtin_HEXAGON_V6_vadduhsat_dv",
-    "llvm.hexagon.V6.vadduhsat.dv.128B" => "__builtin_HEXAGON_V6_vadduhsat_dv_128B",
-    "llvm.hexagon.V6.vadduhw" => "__builtin_HEXAGON_V6_vadduhw",
-    "llvm.hexagon.V6.vadduhw.128B" => "__builtin_HEXAGON_V6_vadduhw_128B",
-    "llvm.hexagon.V6.vadduhw.acc" => "__builtin_HEXAGON_V6_vadduhw_acc",
-    "llvm.hexagon.V6.vadduhw.acc.128B" => "__builtin_HEXAGON_V6_vadduhw_acc_128B",
-    "llvm.hexagon.V6.vadduwsat" => "__builtin_HEXAGON_V6_vadduwsat",
-    "llvm.hexagon.V6.vadduwsat.128B" => "__builtin_HEXAGON_V6_vadduwsat_128B",
-    "llvm.hexagon.V6.vadduwsat.dv" => "__builtin_HEXAGON_V6_vadduwsat_dv",
-    "llvm.hexagon.V6.vadduwsat.dv.128B" => "__builtin_HEXAGON_V6_vadduwsat_dv_128B",
-    "llvm.hexagon.V6.vaddw" => "__builtin_HEXAGON_V6_vaddw",
-    "llvm.hexagon.V6.vaddw.128B" => "__builtin_HEXAGON_V6_vaddw_128B",
-    "llvm.hexagon.V6.vaddw.dv" => "__builtin_HEXAGON_V6_vaddw_dv",
-    "llvm.hexagon.V6.vaddw.dv.128B" => "__builtin_HEXAGON_V6_vaddw_dv_128B",
-    "llvm.hexagon.V6.vaddwnq" => "__builtin_HEXAGON_V6_vaddwnq",
-    "llvm.hexagon.V6.vaddwnq.128B" => "__builtin_HEXAGON_V6_vaddwnq_128B",
-    "llvm.hexagon.V6.vaddwq" => "__builtin_HEXAGON_V6_vaddwq",
-    "llvm.hexagon.V6.vaddwq.128B" => "__builtin_HEXAGON_V6_vaddwq_128B",
-    "llvm.hexagon.V6.vaddwsat" => "__builtin_HEXAGON_V6_vaddwsat",
-    "llvm.hexagon.V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
-    "llvm.hexagon.V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
-    "llvm.hexagon.V6.vaddwsat.dv.128B" => "__builtin_HEXAGON_V6_vaddwsat_dv_128B",
-    "llvm.hexagon.V6.valignb" => "__builtin_HEXAGON_V6_valignb",
-    "llvm.hexagon.V6.valignb.128B" => "__builtin_HEXAGON_V6_valignb_128B",
-    "llvm.hexagon.V6.valignbi" => "__builtin_HEXAGON_V6_valignbi",
-    "llvm.hexagon.V6.valignbi.128B" => "__builtin_HEXAGON_V6_valignbi_128B",
-    "llvm.hexagon.V6.vand" => "__builtin_HEXAGON_V6_vand",
-    "llvm.hexagon.V6.vand.128B" => "__builtin_HEXAGON_V6_vand_128B",
-    "llvm.hexagon.V6.vandnqrt" => "__builtin_HEXAGON_V6_vandnqrt",
-    "llvm.hexagon.V6.vandnqrt.128B" => "__builtin_HEXAGON_V6_vandnqrt_128B",
-    "llvm.hexagon.V6.vandnqrt.acc" => "__builtin_HEXAGON_V6_vandnqrt_acc",
-    "llvm.hexagon.V6.vandnqrt.acc.128B" => "__builtin_HEXAGON_V6_vandnqrt_acc_128B",
-    "llvm.hexagon.V6.vandqrt" => "__builtin_HEXAGON_V6_vandqrt",
-    "llvm.hexagon.V6.vandqrt.128B" => "__builtin_HEXAGON_V6_vandqrt_128B",
-    "llvm.hexagon.V6.vandqrt.acc" => "__builtin_HEXAGON_V6_vandqrt_acc",
-    "llvm.hexagon.V6.vandqrt.acc.128B" => "__builtin_HEXAGON_V6_vandqrt_acc_128B",
-    "llvm.hexagon.V6.vandvnqv" => "__builtin_HEXAGON_V6_vandvnqv",
-    "llvm.hexagon.V6.vandvnqv.128B" => "__builtin_HEXAGON_V6_vandvnqv_128B",
-    "llvm.hexagon.V6.vandvqv" => "__builtin_HEXAGON_V6_vandvqv",
-    "llvm.hexagon.V6.vandvqv.128B" => "__builtin_HEXAGON_V6_vandvqv_128B",
-    "llvm.hexagon.V6.vandvrt" => "__builtin_HEXAGON_V6_vandvrt",
-    "llvm.hexagon.V6.vandvrt.128B" => "__builtin_HEXAGON_V6_vandvrt_128B",
-    "llvm.hexagon.V6.vandvrt.acc" => "__builtin_HEXAGON_V6_vandvrt_acc",
-    "llvm.hexagon.V6.vandvrt.acc.128B" => "__builtin_HEXAGON_V6_vandvrt_acc_128B",
-    "llvm.hexagon.V6.vaslh" => "__builtin_HEXAGON_V6_vaslh",
-    "llvm.hexagon.V6.vaslh.128B" => "__builtin_HEXAGON_V6_vaslh_128B",
-    "llvm.hexagon.V6.vaslh.acc" => "__builtin_HEXAGON_V6_vaslh_acc",
-    "llvm.hexagon.V6.vaslh.acc.128B" => "__builtin_HEXAGON_V6_vaslh_acc_128B",
-    "llvm.hexagon.V6.vaslhv" => "__builtin_HEXAGON_V6_vaslhv",
-    "llvm.hexagon.V6.vaslhv.128B" => "__builtin_HEXAGON_V6_vaslhv_128B",
-    "llvm.hexagon.V6.vaslw" => "__builtin_HEXAGON_V6_vaslw",
-    "llvm.hexagon.V6.vaslw.128B" => "__builtin_HEXAGON_V6_vaslw_128B",
-    "llvm.hexagon.V6.vaslw.acc" => "__builtin_HEXAGON_V6_vaslw_acc",
-    "llvm.hexagon.V6.vaslw.acc.128B" => "__builtin_HEXAGON_V6_vaslw_acc_128B",
-    "llvm.hexagon.V6.vaslwv" => "__builtin_HEXAGON_V6_vaslwv",
-    "llvm.hexagon.V6.vaslwv.128B" => "__builtin_HEXAGON_V6_vaslwv_128B",
-    "llvm.hexagon.V6.vasr.into" => "__builtin_HEXAGON_V6_vasr_into",
-    "llvm.hexagon.V6.vasr.into.128B" => "__builtin_HEXAGON_V6_vasr_into_128B",
-    "llvm.hexagon.V6.vasrh" => "__builtin_HEXAGON_V6_vasrh",
-    "llvm.hexagon.V6.vasrh.128B" => "__builtin_HEXAGON_V6_vasrh_128B",
-    "llvm.hexagon.V6.vasrh.acc" => "__builtin_HEXAGON_V6_vasrh_acc",
-    "llvm.hexagon.V6.vasrh.acc.128B" => "__builtin_HEXAGON_V6_vasrh_acc_128B",
-    "llvm.hexagon.V6.vasrhbrndsat" => "__builtin_HEXAGON_V6_vasrhbrndsat",
-    "llvm.hexagon.V6.vasrhbrndsat.128B" => "__builtin_HEXAGON_V6_vasrhbrndsat_128B",
-    "llvm.hexagon.V6.vasrhbsat" => "__builtin_HEXAGON_V6_vasrhbsat",
-    "llvm.hexagon.V6.vasrhbsat.128B" => "__builtin_HEXAGON_V6_vasrhbsat_128B",
-    "llvm.hexagon.V6.vasrhubrndsat" => "__builtin_HEXAGON_V6_vasrhubrndsat",
-    "llvm.hexagon.V6.vasrhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrhubrndsat_128B",
-    "llvm.hexagon.V6.vasrhubsat" => "__builtin_HEXAGON_V6_vasrhubsat",
-    "llvm.hexagon.V6.vasrhubsat.128B" => "__builtin_HEXAGON_V6_vasrhubsat_128B",
-    "llvm.hexagon.V6.vasrhv" => "__builtin_HEXAGON_V6_vasrhv",
-    "llvm.hexagon.V6.vasrhv.128B" => "__builtin_HEXAGON_V6_vasrhv_128B",
-    "llvm.hexagon.V6.vasruhubrndsat" => "__builtin_HEXAGON_V6_vasruhubrndsat",
-    "llvm.hexagon.V6.vasruhubrndsat.128B" => "__builtin_HEXAGON_V6_vasruhubrndsat_128B",
-    "llvm.hexagon.V6.vasruhubsat" => "__builtin_HEXAGON_V6_vasruhubsat",
-    "llvm.hexagon.V6.vasruhubsat.128B" => "__builtin_HEXAGON_V6_vasruhubsat_128B",
-    "llvm.hexagon.V6.vasruwuhrndsat" => "__builtin_HEXAGON_V6_vasruwuhrndsat",
-    "llvm.hexagon.V6.vasruwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasruwuhrndsat_128B",
-    "llvm.hexagon.V6.vasruwuhsat" => "__builtin_HEXAGON_V6_vasruwuhsat",
-    "llvm.hexagon.V6.vasruwuhsat.128B" => "__builtin_HEXAGON_V6_vasruwuhsat_128B",
-    "llvm.hexagon.V6.vasrvuhubrndsat" => "__builtin_HEXAGON_V6_vasrvuhubrndsat",
-    "llvm.hexagon.V6.vasrvuhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubrndsat_128B",
-    "llvm.hexagon.V6.vasrvuhubsat" => "__builtin_HEXAGON_V6_vasrvuhubsat",
-    "llvm.hexagon.V6.vasrvuhubsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubsat_128B",
-    "llvm.hexagon.V6.vasrvwuhrndsat" => "__builtin_HEXAGON_V6_vasrvwuhrndsat",
-    "llvm.hexagon.V6.vasrvwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhrndsat_128B",
-    "llvm.hexagon.V6.vasrvwuhsat" => "__builtin_HEXAGON_V6_vasrvwuhsat",
-    "llvm.hexagon.V6.vasrvwuhsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhsat_128B",
-    "llvm.hexagon.V6.vasrw" => "__builtin_HEXAGON_V6_vasrw",
-    "llvm.hexagon.V6.vasrw.128B" => "__builtin_HEXAGON_V6_vasrw_128B",
-    "llvm.hexagon.V6.vasrw.acc" => "__builtin_HEXAGON_V6_vasrw_acc",
-    "llvm.hexagon.V6.vasrw.acc.128B" => "__builtin_HEXAGON_V6_vasrw_acc_128B",
-    "llvm.hexagon.V6.vasrwh" => "__builtin_HEXAGON_V6_vasrwh",
-    "llvm.hexagon.V6.vasrwh.128B" => "__builtin_HEXAGON_V6_vasrwh_128B",
-    "llvm.hexagon.V6.vasrwhrndsat" => "__builtin_HEXAGON_V6_vasrwhrndsat",
-    "llvm.hexagon.V6.vasrwhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwhrndsat_128B",
-    "llvm.hexagon.V6.vasrwhsat" => "__builtin_HEXAGON_V6_vasrwhsat",
-    "llvm.hexagon.V6.vasrwhsat.128B" => "__builtin_HEXAGON_V6_vasrwhsat_128B",
-    "llvm.hexagon.V6.vasrwuhrndsat" => "__builtin_HEXAGON_V6_vasrwuhrndsat",
-    "llvm.hexagon.V6.vasrwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwuhrndsat_128B",
-    "llvm.hexagon.V6.vasrwuhsat" => "__builtin_HEXAGON_V6_vasrwuhsat",
-    "llvm.hexagon.V6.vasrwuhsat.128B" => "__builtin_HEXAGON_V6_vasrwuhsat_128B",
-    "llvm.hexagon.V6.vasrwv" => "__builtin_HEXAGON_V6_vasrwv",
-    "llvm.hexagon.V6.vasrwv.128B" => "__builtin_HEXAGON_V6_vasrwv_128B",
-    "llvm.hexagon.V6.vassign" => "__builtin_HEXAGON_V6_vassign",
-    "llvm.hexagon.V6.vassign.128B" => "__builtin_HEXAGON_V6_vassign_128B",
-    "llvm.hexagon.V6.vassign.fp" => "__builtin_HEXAGON_V6_vassign_fp",
-    "llvm.hexagon.V6.vassign.fp.128B" => "__builtin_HEXAGON_V6_vassign_fp_128B",
-    "llvm.hexagon.V6.vassignp" => "__builtin_HEXAGON_V6_vassignp",
-    "llvm.hexagon.V6.vassignp.128B" => "__builtin_HEXAGON_V6_vassignp_128B",
-    "llvm.hexagon.V6.vavgb" => "__builtin_HEXAGON_V6_vavgb",
-    "llvm.hexagon.V6.vavgb.128B" => "__builtin_HEXAGON_V6_vavgb_128B",
-    "llvm.hexagon.V6.vavgbrnd" => "__builtin_HEXAGON_V6_vavgbrnd",
-    "llvm.hexagon.V6.vavgbrnd.128B" => "__builtin_HEXAGON_V6_vavgbrnd_128B",
-    "llvm.hexagon.V6.vavgh" => "__builtin_HEXAGON_V6_vavgh",
-    "llvm.hexagon.V6.vavgh.128B" => "__builtin_HEXAGON_V6_vavgh_128B",
-    "llvm.hexagon.V6.vavghrnd" => "__builtin_HEXAGON_V6_vavghrnd",
-    "llvm.hexagon.V6.vavghrnd.128B" => "__builtin_HEXAGON_V6_vavghrnd_128B",
-    "llvm.hexagon.V6.vavgub" => "__builtin_HEXAGON_V6_vavgub",
-    "llvm.hexagon.V6.vavgub.128B" => "__builtin_HEXAGON_V6_vavgub_128B",
-    "llvm.hexagon.V6.vavgubrnd" => "__builtin_HEXAGON_V6_vavgubrnd",
-    "llvm.hexagon.V6.vavgubrnd.128B" => "__builtin_HEXAGON_V6_vavgubrnd_128B",
-    "llvm.hexagon.V6.vavguh" => "__builtin_HEXAGON_V6_vavguh",
-    "llvm.hexagon.V6.vavguh.128B" => "__builtin_HEXAGON_V6_vavguh_128B",
-    "llvm.hexagon.V6.vavguhrnd" => "__builtin_HEXAGON_V6_vavguhrnd",
-    "llvm.hexagon.V6.vavguhrnd.128B" => "__builtin_HEXAGON_V6_vavguhrnd_128B",
-    "llvm.hexagon.V6.vavguw" => "__builtin_HEXAGON_V6_vavguw",
-    "llvm.hexagon.V6.vavguw.128B" => "__builtin_HEXAGON_V6_vavguw_128B",
-    "llvm.hexagon.V6.vavguwrnd" => "__builtin_HEXAGON_V6_vavguwrnd",
-    "llvm.hexagon.V6.vavguwrnd.128B" => "__builtin_HEXAGON_V6_vavguwrnd_128B",
-    "llvm.hexagon.V6.vavgw" => "__builtin_HEXAGON_V6_vavgw",
-    "llvm.hexagon.V6.vavgw.128B" => "__builtin_HEXAGON_V6_vavgw_128B",
-    "llvm.hexagon.V6.vavgwrnd" => "__builtin_HEXAGON_V6_vavgwrnd",
-    "llvm.hexagon.V6.vavgwrnd.128B" => "__builtin_HEXAGON_V6_vavgwrnd_128B",
-    "llvm.hexagon.V6.vcl0h" => "__builtin_HEXAGON_V6_vcl0h",
-    "llvm.hexagon.V6.vcl0h.128B" => "__builtin_HEXAGON_V6_vcl0h_128B",
-    "llvm.hexagon.V6.vcl0w" => "__builtin_HEXAGON_V6_vcl0w",
-    "llvm.hexagon.V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
-    "llvm.hexagon.V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
-    "llvm.hexagon.V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
-    "llvm.hexagon.V6.vconv.h.hf" => "__builtin_HEXAGON_V6_vconv_h_hf",
-    "llvm.hexagon.V6.vconv.h.hf.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_128B",
-    "llvm.hexagon.V6.vconv.hf.h" => "__builtin_HEXAGON_V6_vconv_hf_h",
-    "llvm.hexagon.V6.vconv.hf.h.128B" => "__builtin_HEXAGON_V6_vconv_hf_h_128B",
-    "llvm.hexagon.V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
-    "llvm.hexagon.V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
-    "llvm.hexagon.V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
-    "llvm.hexagon.V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
-    "llvm.hexagon.V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
-    "llvm.hexagon.V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
-    "llvm.hexagon.V6.vconv.sf.w" => "__builtin_HEXAGON_V6_vconv_sf_w",
-    "llvm.hexagon.V6.vconv.sf.w.128B" => "__builtin_HEXAGON_V6_vconv_sf_w_128B",
-    "llvm.hexagon.V6.vconv.w.sf" => "__builtin_HEXAGON_V6_vconv_w_sf",
-    "llvm.hexagon.V6.vconv.w.sf.128B" => "__builtin_HEXAGON_V6_vconv_w_sf_128B",
-    "llvm.hexagon.V6.vcvt.b.hf" => "__builtin_HEXAGON_V6_vcvt_b_hf",
-    "llvm.hexagon.V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
-    "llvm.hexagon.V6.vcvt.bf.sf" => "__builtin_HEXAGON_V6_vcvt_bf_sf",
-    "llvm.hexagon.V6.vcvt.bf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_bf_sf_128B",
-    "llvm.hexagon.V6.vcvt.f8.hf" => "__builtin_HEXAGON_V6_vcvt_f8_hf",
-    "llvm.hexagon.V6.vcvt.f8.hf.128B" => "__builtin_HEXAGON_V6_vcvt_f8_hf_128B",
-    "llvm.hexagon.V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
-    "llvm.hexagon.V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
-    "llvm.hexagon.V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
-    "llvm.hexagon.V6.vcvt.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt_hf_b_128B",
-    "llvm.hexagon.V6.vcvt.hf.f8" => "__builtin_HEXAGON_V6_vcvt_hf_f8",
-    "llvm.hexagon.V6.vcvt.hf.f8.128B" => "__builtin_HEXAGON_V6_vcvt_hf_f8_128B",
-    "llvm.hexagon.V6.vcvt.hf.h" => "__builtin_HEXAGON_V6_vcvt_hf_h",
-    "llvm.hexagon.V6.vcvt.hf.h.128B" => "__builtin_HEXAGON_V6_vcvt_hf_h_128B",
-    "llvm.hexagon.V6.vcvt.hf.sf" => "__builtin_HEXAGON_V6_vcvt_hf_sf",
-    "llvm.hexagon.V6.vcvt.hf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_hf_sf_128B",
-    "llvm.hexagon.V6.vcvt.hf.ub" => "__builtin_HEXAGON_V6_vcvt_hf_ub",
-    "llvm.hexagon.V6.vcvt.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt_hf_ub_128B",
-    "llvm.hexagon.V6.vcvt.hf.uh" => "__builtin_HEXAGON_V6_vcvt_hf_uh",
-    "llvm.hexagon.V6.vcvt.hf.uh.128B" => "__builtin_HEXAGON_V6_vcvt_hf_uh_128B",
-    "llvm.hexagon.V6.vcvt.sf.hf" => "__builtin_HEXAGON_V6_vcvt_sf_hf",
-    "llvm.hexagon.V6.vcvt.sf.hf.128B" => "__builtin_HEXAGON_V6_vcvt_sf_hf_128B",
-    "llvm.hexagon.V6.vcvt.ub.hf" => "__builtin_HEXAGON_V6_vcvt_ub_hf",
-    "llvm.hexagon.V6.vcvt.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt_ub_hf_128B",
-    "llvm.hexagon.V6.vcvt.uh.hf" => "__builtin_HEXAGON_V6_vcvt_uh_hf",
-    "llvm.hexagon.V6.vcvt.uh.hf.128B" => "__builtin_HEXAGON_V6_vcvt_uh_hf_128B",
-    "llvm.hexagon.V6.vcvt2.b.hf" => "__builtin_HEXAGON_V6_vcvt2_b_hf",
-    "llvm.hexagon.V6.vcvt2.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_b_hf_128B",
-    "llvm.hexagon.V6.vcvt2.hf.b" => "__builtin_HEXAGON_V6_vcvt2_hf_b",
-    "llvm.hexagon.V6.vcvt2.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_b_128B",
-    "llvm.hexagon.V6.vcvt2.hf.ub" => "__builtin_HEXAGON_V6_vcvt2_hf_ub",
-    "llvm.hexagon.V6.vcvt2.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_ub_128B",
-    "llvm.hexagon.V6.vcvt2.ub.hf" => "__builtin_HEXAGON_V6_vcvt2_ub_hf",
-    "llvm.hexagon.V6.vcvt2.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_ub_hf_128B",
-    "llvm.hexagon.V6.vd0" => "__builtin_HEXAGON_V6_vd0",
-    "llvm.hexagon.V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
-    "llvm.hexagon.V6.vdd0" => "__builtin_HEXAGON_V6_vdd0",
-    "llvm.hexagon.V6.vdd0.128B" => "__builtin_HEXAGON_V6_vdd0_128B",
-    "llvm.hexagon.V6.vdealb" => "__builtin_HEXAGON_V6_vdealb",
-    "llvm.hexagon.V6.vdealb.128B" => "__builtin_HEXAGON_V6_vdealb_128B",
-    "llvm.hexagon.V6.vdealb4w" => "__builtin_HEXAGON_V6_vdealb4w",
-    "llvm.hexagon.V6.vdealb4w.128B" => "__builtin_HEXAGON_V6_vdealb4w_128B",
-    "llvm.hexagon.V6.vdealh" => "__builtin_HEXAGON_V6_vdealh",
-    "llvm.hexagon.V6.vdealh.128B" => "__builtin_HEXAGON_V6_vdealh_128B",
-    "llvm.hexagon.V6.vdealvdd" => "__builtin_HEXAGON_V6_vdealvdd",
-    "llvm.hexagon.V6.vdealvdd.128B" => "__builtin_HEXAGON_V6_vdealvdd_128B",
-    "llvm.hexagon.V6.vdelta" => "__builtin_HEXAGON_V6_vdelta",
-    "llvm.hexagon.V6.vdelta.128B" => "__builtin_HEXAGON_V6_vdelta_128B",
-    "llvm.hexagon.V6.vdmpy.sf.hf" => "__builtin_HEXAGON_V6_vdmpy_sf_hf",
-    "llvm.hexagon.V6.vdmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_128B",
-    "llvm.hexagon.V6.vdmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc",
-    "llvm.hexagon.V6.vdmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B",
-    "llvm.hexagon.V6.vdmpybus" => "__builtin_HEXAGON_V6_vdmpybus",
-    "llvm.hexagon.V6.vdmpybus.128B" => "__builtin_HEXAGON_V6_vdmpybus_128B",
-    "llvm.hexagon.V6.vdmpybus.acc" => "__builtin_HEXAGON_V6_vdmpybus_acc",
-    "llvm.hexagon.V6.vdmpybus.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_acc_128B",
-    "llvm.hexagon.V6.vdmpybus.dv" => "__builtin_HEXAGON_V6_vdmpybus_dv",
-    "llvm.hexagon.V6.vdmpybus.dv.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_128B",
-    "llvm.hexagon.V6.vdmpybus.dv.acc" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc",
-    "llvm.hexagon.V6.vdmpybus.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B",
-    "llvm.hexagon.V6.vdmpyhb" => "__builtin_HEXAGON_V6_vdmpyhb",
-    "llvm.hexagon.V6.vdmpyhb.128B" => "__builtin_HEXAGON_V6_vdmpyhb_128B",
-    "llvm.hexagon.V6.vdmpyhb.acc" => "__builtin_HEXAGON_V6_vdmpyhb_acc",
-    "llvm.hexagon.V6.vdmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_acc_128B",
-    "llvm.hexagon.V6.vdmpyhb.dv" => "__builtin_HEXAGON_V6_vdmpyhb_dv",
-    "llvm.hexagon.V6.vdmpyhb.dv.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_128B",
-    "llvm.hexagon.V6.vdmpyhb.dv.acc" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc",
-    "llvm.hexagon.V6.vdmpyhb.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B",
-    "llvm.hexagon.V6.vdmpyhisat" => "__builtin_HEXAGON_V6_vdmpyhisat",
-    "llvm.hexagon.V6.vdmpyhisat.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_128B",
-    "llvm.hexagon.V6.vdmpyhisat.acc" => "__builtin_HEXAGON_V6_vdmpyhisat_acc",
-    "llvm.hexagon.V6.vdmpyhisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhsat" => "__builtin_HEXAGON_V6_vdmpyhsat",
-    "llvm.hexagon.V6.vdmpyhsat.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_128B",
-    "llvm.hexagon.V6.vdmpyhsat.acc" => "__builtin_HEXAGON_V6_vdmpyhsat_acc",
-    "llvm.hexagon.V6.vdmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhsuisat" => "__builtin_HEXAGON_V6_vdmpyhsuisat",
-    "llvm.hexagon.V6.vdmpyhsuisat.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_128B",
-    "llvm.hexagon.V6.vdmpyhsuisat.acc" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc",
-    "llvm.hexagon.V6.vdmpyhsuisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhsusat" => "__builtin_HEXAGON_V6_vdmpyhsusat",
-    "llvm.hexagon.V6.vdmpyhsusat.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_128B",
-    "llvm.hexagon.V6.vdmpyhsusat.acc" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc",
-    "llvm.hexagon.V6.vdmpyhsusat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B",
-    "llvm.hexagon.V6.vdmpyhvsat" => "__builtin_HEXAGON_V6_vdmpyhvsat",
-    "llvm.hexagon.V6.vdmpyhvsat.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_128B",
-    "llvm.hexagon.V6.vdmpyhvsat.acc" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc",
-    "llvm.hexagon.V6.vdmpyhvsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B",
-    "llvm.hexagon.V6.vdsaduh" => "__builtin_HEXAGON_V6_vdsaduh",
-    "llvm.hexagon.V6.vdsaduh.128B" => "__builtin_HEXAGON_V6_vdsaduh_128B",
-    "llvm.hexagon.V6.vdsaduh.acc" => "__builtin_HEXAGON_V6_vdsaduh_acc",
-    "llvm.hexagon.V6.vdsaduh.acc.128B" => "__builtin_HEXAGON_V6_vdsaduh_acc_128B",
-    "llvm.hexagon.V6.veqb" => "__builtin_HEXAGON_V6_veqb",
-    "llvm.hexagon.V6.veqb.128B" => "__builtin_HEXAGON_V6_veqb_128B",
-    "llvm.hexagon.V6.veqb.and" => "__builtin_HEXAGON_V6_veqb_and",
-    "llvm.hexagon.V6.veqb.and.128B" => "__builtin_HEXAGON_V6_veqb_and_128B",
-    "llvm.hexagon.V6.veqb.or" => "__builtin_HEXAGON_V6_veqb_or",
-    "llvm.hexagon.V6.veqb.or.128B" => "__builtin_HEXAGON_V6_veqb_or_128B",
-    "llvm.hexagon.V6.veqb.xor" => "__builtin_HEXAGON_V6_veqb_xor",
-    "llvm.hexagon.V6.veqb.xor.128B" => "__builtin_HEXAGON_V6_veqb_xor_128B",
-    "llvm.hexagon.V6.veqh" => "__builtin_HEXAGON_V6_veqh",
-    "llvm.hexagon.V6.veqh.128B" => "__builtin_HEXAGON_V6_veqh_128B",
-    "llvm.hexagon.V6.veqh.and" => "__builtin_HEXAGON_V6_veqh_and",
-    "llvm.hexagon.V6.veqh.and.128B" => "__builtin_HEXAGON_V6_veqh_and_128B",
-    "llvm.hexagon.V6.veqh.or" => "__builtin_HEXAGON_V6_veqh_or",
-    "llvm.hexagon.V6.veqh.or.128B" => "__builtin_HEXAGON_V6_veqh_or_128B",
-    "llvm.hexagon.V6.veqh.xor" => "__builtin_HEXAGON_V6_veqh_xor",
-    "llvm.hexagon.V6.veqh.xor.128B" => "__builtin_HEXAGON_V6_veqh_xor_128B",
-    "llvm.hexagon.V6.veqw" => "__builtin_HEXAGON_V6_veqw",
-    "llvm.hexagon.V6.veqw.128B" => "__builtin_HEXAGON_V6_veqw_128B",
-    "llvm.hexagon.V6.veqw.and" => "__builtin_HEXAGON_V6_veqw_and",
-    "llvm.hexagon.V6.veqw.and.128B" => "__builtin_HEXAGON_V6_veqw_and_128B",
-    "llvm.hexagon.V6.veqw.or" => "__builtin_HEXAGON_V6_veqw_or",
-    "llvm.hexagon.V6.veqw.or.128B" => "__builtin_HEXAGON_V6_veqw_or_128B",
-    "llvm.hexagon.V6.veqw.xor" => "__builtin_HEXAGON_V6_veqw_xor",
-    "llvm.hexagon.V6.veqw.xor.128B" => "__builtin_HEXAGON_V6_veqw_xor_128B",
-    "llvm.hexagon.V6.vfmax.f8" => "__builtin_HEXAGON_V6_vfmax_f8",
-    "llvm.hexagon.V6.vfmax.f8.128B" => "__builtin_HEXAGON_V6_vfmax_f8_128B",
-    "llvm.hexagon.V6.vfmax.hf" => "__builtin_HEXAGON_V6_vfmax_hf",
-    "llvm.hexagon.V6.vfmax.hf.128B" => "__builtin_HEXAGON_V6_vfmax_hf_128B",
-    "llvm.hexagon.V6.vfmax.sf" => "__builtin_HEXAGON_V6_vfmax_sf",
-    "llvm.hexagon.V6.vfmax.sf.128B" => "__builtin_HEXAGON_V6_vfmax_sf_128B",
-    "llvm.hexagon.V6.vfmin.f8" => "__builtin_HEXAGON_V6_vfmin_f8",
-    "llvm.hexagon.V6.vfmin.f8.128B" => "__builtin_HEXAGON_V6_vfmin_f8_128B",
-    "llvm.hexagon.V6.vfmin.hf" => "__builtin_HEXAGON_V6_vfmin_hf",
-    "llvm.hexagon.V6.vfmin.hf.128B" => "__builtin_HEXAGON_V6_vfmin_hf_128B",
-    "llvm.hexagon.V6.vfmin.sf" => "__builtin_HEXAGON_V6_vfmin_sf",
-    "llvm.hexagon.V6.vfmin.sf.128B" => "__builtin_HEXAGON_V6_vfmin_sf_128B",
-    "llvm.hexagon.V6.vfneg.f8" => "__builtin_HEXAGON_V6_vfneg_f8",
-    "llvm.hexagon.V6.vfneg.f8.128B" => "__builtin_HEXAGON_V6_vfneg_f8_128B",
-    "llvm.hexagon.V6.vfneg.hf" => "__builtin_HEXAGON_V6_vfneg_hf",
-    "llvm.hexagon.V6.vfneg.hf.128B" => "__builtin_HEXAGON_V6_vfneg_hf_128B",
-    "llvm.hexagon.V6.vfneg.sf" => "__builtin_HEXAGON_V6_vfneg_sf",
-    "llvm.hexagon.V6.vfneg.sf.128B" => "__builtin_HEXAGON_V6_vfneg_sf_128B",
-    "llvm.hexagon.V6.vgathermh" => "__builtin_HEXAGON_V6_vgathermh",
-    "llvm.hexagon.V6.vgathermh.128B" => "__builtin_HEXAGON_V6_vgathermh_128B",
-    "llvm.hexagon.V6.vgathermhq" => "__builtin_HEXAGON_V6_vgathermhq",
-    "llvm.hexagon.V6.vgathermhq.128B" => "__builtin_HEXAGON_V6_vgathermhq_128B",
-    "llvm.hexagon.V6.vgathermhw" => "__builtin_HEXAGON_V6_vgathermhw",
-    "llvm.hexagon.V6.vgathermhw.128B" => "__builtin_HEXAGON_V6_vgathermhw_128B",
-    "llvm.hexagon.V6.vgathermhwq" => "__builtin_HEXAGON_V6_vgathermhwq",
-    "llvm.hexagon.V6.vgathermhwq.128B" => "__builtin_HEXAGON_V6_vgathermhwq_128B",
-    "llvm.hexagon.V6.vgathermw" => "__builtin_HEXAGON_V6_vgathermw",
-    "llvm.hexagon.V6.vgathermw.128B" => "__builtin_HEXAGON_V6_vgathermw_128B",
-    "llvm.hexagon.V6.vgathermwq" => "__builtin_HEXAGON_V6_vgathermwq",
-    "llvm.hexagon.V6.vgathermwq.128B" => "__builtin_HEXAGON_V6_vgathermwq_128B",
-    "llvm.hexagon.V6.vgtb" => "__builtin_HEXAGON_V6_vgtb",
-    "llvm.hexagon.V6.vgtb.128B" => "__builtin_HEXAGON_V6_vgtb_128B",
-    "llvm.hexagon.V6.vgtb.and" => "__builtin_HEXAGON_V6_vgtb_and",
-    "llvm.hexagon.V6.vgtb.and.128B" => "__builtin_HEXAGON_V6_vgtb_and_128B",
-    "llvm.hexagon.V6.vgtb.or" => "__builtin_HEXAGON_V6_vgtb_or",
-    "llvm.hexagon.V6.vgtb.or.128B" => "__builtin_HEXAGON_V6_vgtb_or_128B",
-    "llvm.hexagon.V6.vgtb.xor" => "__builtin_HEXAGON_V6_vgtb_xor",
-    "llvm.hexagon.V6.vgtb.xor.128B" => "__builtin_HEXAGON_V6_vgtb_xor_128B",
-    "llvm.hexagon.V6.vgtbf" => "__builtin_HEXAGON_V6_vgtbf",
-    "llvm.hexagon.V6.vgtbf.128B" => "__builtin_HEXAGON_V6_vgtbf_128B",
-    "llvm.hexagon.V6.vgtbf.and" => "__builtin_HEXAGON_V6_vgtbf_and",
-    "llvm.hexagon.V6.vgtbf.and.128B" => "__builtin_HEXAGON_V6_vgtbf_and_128B",
-    "llvm.hexagon.V6.vgtbf.or" => "__builtin_HEXAGON_V6_vgtbf_or",
-    "llvm.hexagon.V6.vgtbf.or.128B" => "__builtin_HEXAGON_V6_vgtbf_or_128B",
-    "llvm.hexagon.V6.vgtbf.xor" => "__builtin_HEXAGON_V6_vgtbf_xor",
-    "llvm.hexagon.V6.vgtbf.xor.128B" => "__builtin_HEXAGON_V6_vgtbf_xor_128B",
-    "llvm.hexagon.V6.vgth" => "__builtin_HEXAGON_V6_vgth",
-    "llvm.hexagon.V6.vgth.128B" => "__builtin_HEXAGON_V6_vgth_128B",
-    "llvm.hexagon.V6.vgth.and" => "__builtin_HEXAGON_V6_vgth_and",
-    "llvm.hexagon.V6.vgth.and.128B" => "__builtin_HEXAGON_V6_vgth_and_128B",
-    "llvm.hexagon.V6.vgth.or" => "__builtin_HEXAGON_V6_vgth_or",
-    "llvm.hexagon.V6.vgth.or.128B" => "__builtin_HEXAGON_V6_vgth_or_128B",
-    "llvm.hexagon.V6.vgth.xor" => "__builtin_HEXAGON_V6_vgth_xor",
-    "llvm.hexagon.V6.vgth.xor.128B" => "__builtin_HEXAGON_V6_vgth_xor_128B",
-    "llvm.hexagon.V6.vgthf" => "__builtin_HEXAGON_V6_vgthf",
-    "llvm.hexagon.V6.vgthf.128B" => "__builtin_HEXAGON_V6_vgthf_128B",
-    "llvm.hexagon.V6.vgthf.and" => "__builtin_HEXAGON_V6_vgthf_and",
-    "llvm.hexagon.V6.vgthf.and.128B" => "__builtin_HEXAGON_V6_vgthf_and_128B",
-    "llvm.hexagon.V6.vgthf.or" => "__builtin_HEXAGON_V6_vgthf_or",
-    "llvm.hexagon.V6.vgthf.or.128B" => "__builtin_HEXAGON_V6_vgthf_or_128B",
-    "llvm.hexagon.V6.vgthf.xor" => "__builtin_HEXAGON_V6_vgthf_xor",
-    "llvm.hexagon.V6.vgthf.xor.128B" => "__builtin_HEXAGON_V6_vgthf_xor_128B",
-    "llvm.hexagon.V6.vgtsf" => "__builtin_HEXAGON_V6_vgtsf",
-    "llvm.hexagon.V6.vgtsf.128B" => "__builtin_HEXAGON_V6_vgtsf_128B",
-    "llvm.hexagon.V6.vgtsf.and" => "__builtin_HEXAGON_V6_vgtsf_and",
-    "llvm.hexagon.V6.vgtsf.and.128B" => "__builtin_HEXAGON_V6_vgtsf_and_128B",
-    "llvm.hexagon.V6.vgtsf.or" => "__builtin_HEXAGON_V6_vgtsf_or",
-    "llvm.hexagon.V6.vgtsf.or.128B" => "__builtin_HEXAGON_V6_vgtsf_or_128B",
-    "llvm.hexagon.V6.vgtsf.xor" => "__builtin_HEXAGON_V6_vgtsf_xor",
-    "llvm.hexagon.V6.vgtsf.xor.128B" => "__builtin_HEXAGON_V6_vgtsf_xor_128B",
-    "llvm.hexagon.V6.vgtub" => "__builtin_HEXAGON_V6_vgtub",
-    "llvm.hexagon.V6.vgtub.128B" => "__builtin_HEXAGON_V6_vgtub_128B",
-    "llvm.hexagon.V6.vgtub.and" => "__builtin_HEXAGON_V6_vgtub_and",
-    "llvm.hexagon.V6.vgtub.and.128B" => "__builtin_HEXAGON_V6_vgtub_and_128B",
-    "llvm.hexagon.V6.vgtub.or" => "__builtin_HEXAGON_V6_vgtub_or",
-    "llvm.hexagon.V6.vgtub.or.128B" => "__builtin_HEXAGON_V6_vgtub_or_128B",
-    "llvm.hexagon.V6.vgtub.xor" => "__builtin_HEXAGON_V6_vgtub_xor",
-    "llvm.hexagon.V6.vgtub.xor.128B" => "__builtin_HEXAGON_V6_vgtub_xor_128B",
-    "llvm.hexagon.V6.vgtuh" => "__builtin_HEXAGON_V6_vgtuh",
-    "llvm.hexagon.V6.vgtuh.128B" => "__builtin_HEXAGON_V6_vgtuh_128B",
-    "llvm.hexagon.V6.vgtuh.and" => "__builtin_HEXAGON_V6_vgtuh_and",
-    "llvm.hexagon.V6.vgtuh.and.128B" => "__builtin_HEXAGON_V6_vgtuh_and_128B",
-    "llvm.hexagon.V6.vgtuh.or" => "__builtin_HEXAGON_V6_vgtuh_or",
-    "llvm.hexagon.V6.vgtuh.or.128B" => "__builtin_HEXAGON_V6_vgtuh_or_128B",
-    "llvm.hexagon.V6.vgtuh.xor" => "__builtin_HEXAGON_V6_vgtuh_xor",
-    "llvm.hexagon.V6.vgtuh.xor.128B" => "__builtin_HEXAGON_V6_vgtuh_xor_128B",
-    "llvm.hexagon.V6.vgtuw" => "__builtin_HEXAGON_V6_vgtuw",
-    "llvm.hexagon.V6.vgtuw.128B" => "__builtin_HEXAGON_V6_vgtuw_128B",
-    "llvm.hexagon.V6.vgtuw.and" => "__builtin_HEXAGON_V6_vgtuw_and",
-    "llvm.hexagon.V6.vgtuw.and.128B" => "__builtin_HEXAGON_V6_vgtuw_and_128B",
-    "llvm.hexagon.V6.vgtuw.or" => "__builtin_HEXAGON_V6_vgtuw_or",
-    "llvm.hexagon.V6.vgtuw.or.128B" => "__builtin_HEXAGON_V6_vgtuw_or_128B",
-    "llvm.hexagon.V6.vgtuw.xor" => "__builtin_HEXAGON_V6_vgtuw_xor",
-    "llvm.hexagon.V6.vgtuw.xor.128B" => "__builtin_HEXAGON_V6_vgtuw_xor_128B",
-    "llvm.hexagon.V6.vgtw" => "__builtin_HEXAGON_V6_vgtw",
-    "llvm.hexagon.V6.vgtw.128B" => "__builtin_HEXAGON_V6_vgtw_128B",
-    "llvm.hexagon.V6.vgtw.and" => "__builtin_HEXAGON_V6_vgtw_and",
-    "llvm.hexagon.V6.vgtw.and.128B" => "__builtin_HEXAGON_V6_vgtw_and_128B",
-    "llvm.hexagon.V6.vgtw.or" => "__builtin_HEXAGON_V6_vgtw_or",
-    "llvm.hexagon.V6.vgtw.or.128B" => "__builtin_HEXAGON_V6_vgtw_or_128B",
-    "llvm.hexagon.V6.vgtw.xor" => "__builtin_HEXAGON_V6_vgtw_xor",
-    "llvm.hexagon.V6.vgtw.xor.128B" => "__builtin_HEXAGON_V6_vgtw_xor_128B",
-    "llvm.hexagon.V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
-    "llvm.hexagon.V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
-    "llvm.hexagon.V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
-    "llvm.hexagon.V6.vlalignb.128B" => "__builtin_HEXAGON_V6_vlalignb_128B",
-    "llvm.hexagon.V6.vlalignbi" => "__builtin_HEXAGON_V6_vlalignbi",
-    "llvm.hexagon.V6.vlalignbi.128B" => "__builtin_HEXAGON_V6_vlalignbi_128B",
-    "llvm.hexagon.V6.vlsrb" => "__builtin_HEXAGON_V6_vlsrb",
-    "llvm.hexagon.V6.vlsrb.128B" => "__builtin_HEXAGON_V6_vlsrb_128B",
-    "llvm.hexagon.V6.vlsrh" => "__builtin_HEXAGON_V6_vlsrh",
-    "llvm.hexagon.V6.vlsrh.128B" => "__builtin_HEXAGON_V6_vlsrh_128B",
-    "llvm.hexagon.V6.vlsrhv" => "__builtin_HEXAGON_V6_vlsrhv",
-    "llvm.hexagon.V6.vlsrhv.128B" => "__builtin_HEXAGON_V6_vlsrhv_128B",
-    "llvm.hexagon.V6.vlsrw" => "__builtin_HEXAGON_V6_vlsrw",
-    "llvm.hexagon.V6.vlsrw.128B" => "__builtin_HEXAGON_V6_vlsrw_128B",
-    "llvm.hexagon.V6.vlsrwv" => "__builtin_HEXAGON_V6_vlsrwv",
-    "llvm.hexagon.V6.vlsrwv.128B" => "__builtin_HEXAGON_V6_vlsrwv_128B",
-    "llvm.hexagon.V6.vlut4" => "__builtin_HEXAGON_V6_vlut4",
-    "llvm.hexagon.V6.vlut4.128B" => "__builtin_HEXAGON_V6_vlut4_128B",
-    "llvm.hexagon.V6.vlutb" => "__builtin_HEXAGON_V6_vlutb",
-    "llvm.hexagon.V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B",
-    "llvm.hexagon.V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc",
-    "llvm.hexagon.V6.vlutb.acc.128B" => "__builtin_HEXAGON_V6_vlutb_acc_128B",
-    "llvm.hexagon.V6.vlutb.dv" => "__builtin_HEXAGON_V6_vlutb_dv",
-    "llvm.hexagon.V6.vlutb.dv.128B" => "__builtin_HEXAGON_V6_vlutb_dv_128B",
-    "llvm.hexagon.V6.vlutb.dv.acc" => "__builtin_HEXAGON_V6_vlutb_dv_acc",
-    "llvm.hexagon.V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B",
-    "llvm.hexagon.V6.vlutvvb" => "__builtin_HEXAGON_V6_vlutvvb",
-    "llvm.hexagon.V6.vlutvvb.128B" => "__builtin_HEXAGON_V6_vlutvvb_128B",
-    "llvm.hexagon.V6.vlutvvb.nm" => "__builtin_HEXAGON_V6_vlutvvb_nm",
-    "llvm.hexagon.V6.vlutvvb.nm.128B" => "__builtin_HEXAGON_V6_vlutvvb_nm_128B",
-    "llvm.hexagon.V6.vlutvvb.oracc" => "__builtin_HEXAGON_V6_vlutvvb_oracc",
-    "llvm.hexagon.V6.vlutvvb.oracc.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracc_128B",
-    "llvm.hexagon.V6.vlutvvb.oracci" => "__builtin_HEXAGON_V6_vlutvvb_oracci",
-    "llvm.hexagon.V6.vlutvvb.oracci.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracci_128B",
-    "llvm.hexagon.V6.vlutvvbi" => "__builtin_HEXAGON_V6_vlutvvbi",
-    "llvm.hexagon.V6.vlutvvbi.128B" => "__builtin_HEXAGON_V6_vlutvvbi_128B",
-    "llvm.hexagon.V6.vlutvwh" => "__builtin_HEXAGON_V6_vlutvwh",
-    "llvm.hexagon.V6.vlutvwh.128B" => "__builtin_HEXAGON_V6_vlutvwh_128B",
-    "llvm.hexagon.V6.vlutvwh.nm" => "__builtin_HEXAGON_V6_vlutvwh_nm",
-    "llvm.hexagon.V6.vlutvwh.nm.128B" => "__builtin_HEXAGON_V6_vlutvwh_nm_128B",
-    "llvm.hexagon.V6.vlutvwh.oracc" => "__builtin_HEXAGON_V6_vlutvwh_oracc",
-    "llvm.hexagon.V6.vlutvwh.oracc.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracc_128B",
-    "llvm.hexagon.V6.vlutvwh.oracci" => "__builtin_HEXAGON_V6_vlutvwh_oracci",
-    "llvm.hexagon.V6.vlutvwh.oracci.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracci_128B",
-    "llvm.hexagon.V6.vlutvwhi" => "__builtin_HEXAGON_V6_vlutvwhi",
-    "llvm.hexagon.V6.vlutvwhi.128B" => "__builtin_HEXAGON_V6_vlutvwhi_128B",
-    "llvm.hexagon.V6.vmax.bf" => "__builtin_HEXAGON_V6_vmax_bf",
-    "llvm.hexagon.V6.vmax.bf.128B" => "__builtin_HEXAGON_V6_vmax_bf_128B",
-    "llvm.hexagon.V6.vmax.hf" => "__builtin_HEXAGON_V6_vmax_hf",
-    "llvm.hexagon.V6.vmax.hf.128B" => "__builtin_HEXAGON_V6_vmax_hf_128B",
-    "llvm.hexagon.V6.vmax.sf" => "__builtin_HEXAGON_V6_vmax_sf",
-    "llvm.hexagon.V6.vmax.sf.128B" => "__builtin_HEXAGON_V6_vmax_sf_128B",
-    "llvm.hexagon.V6.vmaxb" => "__builtin_HEXAGON_V6_vmaxb",
-    "llvm.hexagon.V6.vmaxb.128B" => "__builtin_HEXAGON_V6_vmaxb_128B",
-    "llvm.hexagon.V6.vmaxh" => "__builtin_HEXAGON_V6_vmaxh",
-    "llvm.hexagon.V6.vmaxh.128B" => "__builtin_HEXAGON_V6_vmaxh_128B",
-    "llvm.hexagon.V6.vmaxub" => "__builtin_HEXAGON_V6_vmaxub",
-    "llvm.hexagon.V6.vmaxub.128B" => "__builtin_HEXAGON_V6_vmaxub_128B",
-    "llvm.hexagon.V6.vmaxuh" => "__builtin_HEXAGON_V6_vmaxuh",
-    "llvm.hexagon.V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
-    "llvm.hexagon.V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
-    "llvm.hexagon.V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
-    "llvm.hexagon.V6.vmerge.qf" => "__builtin_HEXAGON_V6_vmerge_qf",
-    "llvm.hexagon.V6.vmerge.qf.128B" => "__builtin_HEXAGON_V6_vmerge_qf_128B",
-    "llvm.hexagon.V6.vmin.bf" => "__builtin_HEXAGON_V6_vmin_bf",
-    "llvm.hexagon.V6.vmin.bf.128B" => "__builtin_HEXAGON_V6_vmin_bf_128B",
-    "llvm.hexagon.V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
-    "llvm.hexagon.V6.vmin.hf.128B" => "__builtin_HEXAGON_V6_vmin_hf_128B",
-    "llvm.hexagon.V6.vmin.sf" => "__builtin_HEXAGON_V6_vmin_sf",
-    "llvm.hexagon.V6.vmin.sf.128B" => "__builtin_HEXAGON_V6_vmin_sf_128B",
-    "llvm.hexagon.V6.vminb" => "__builtin_HEXAGON_V6_vminb",
-    "llvm.hexagon.V6.vminb.128B" => "__builtin_HEXAGON_V6_vminb_128B",
-    "llvm.hexagon.V6.vminh" => "__builtin_HEXAGON_V6_vminh",
-    "llvm.hexagon.V6.vminh.128B" => "__builtin_HEXAGON_V6_vminh_128B",
-    "llvm.hexagon.V6.vminub" => "__builtin_HEXAGON_V6_vminub",
-    "llvm.hexagon.V6.vminub.128B" => "__builtin_HEXAGON_V6_vminub_128B",
-    "llvm.hexagon.V6.vminuh" => "__builtin_HEXAGON_V6_vminuh",
-    "llvm.hexagon.V6.vminuh.128B" => "__builtin_HEXAGON_V6_vminuh_128B",
-    "llvm.hexagon.V6.vminw" => "__builtin_HEXAGON_V6_vminw",
-    "llvm.hexagon.V6.vminw.128B" => "__builtin_HEXAGON_V6_vminw_128B",
-    "llvm.hexagon.V6.vmpabus" => "__builtin_HEXAGON_V6_vmpabus",
-    "llvm.hexagon.V6.vmpabus.128B" => "__builtin_HEXAGON_V6_vmpabus_128B",
-    "llvm.hexagon.V6.vmpabus.acc" => "__builtin_HEXAGON_V6_vmpabus_acc",
-    "llvm.hexagon.V6.vmpabus.acc.128B" => "__builtin_HEXAGON_V6_vmpabus_acc_128B",
-    "llvm.hexagon.V6.vmpabusv" => "__builtin_HEXAGON_V6_vmpabusv",
-    "llvm.hexagon.V6.vmpabusv.128B" => "__builtin_HEXAGON_V6_vmpabusv_128B",
-    "llvm.hexagon.V6.vmpabuu" => "__builtin_HEXAGON_V6_vmpabuu",
-    "llvm.hexagon.V6.vmpabuu.128B" => "__builtin_HEXAGON_V6_vmpabuu_128B",
-    "llvm.hexagon.V6.vmpabuu.acc" => "__builtin_HEXAGON_V6_vmpabuu_acc",
-    "llvm.hexagon.V6.vmpabuu.acc.128B" => "__builtin_HEXAGON_V6_vmpabuu_acc_128B",
-    "llvm.hexagon.V6.vmpabuuv" => "__builtin_HEXAGON_V6_vmpabuuv",
-    "llvm.hexagon.V6.vmpabuuv.128B" => "__builtin_HEXAGON_V6_vmpabuuv_128B",
-    "llvm.hexagon.V6.vmpahb" => "__builtin_HEXAGON_V6_vmpahb",
-    "llvm.hexagon.V6.vmpahb.128B" => "__builtin_HEXAGON_V6_vmpahb_128B",
-    "llvm.hexagon.V6.vmpahb.acc" => "__builtin_HEXAGON_V6_vmpahb_acc",
-    "llvm.hexagon.V6.vmpahb.acc.128B" => "__builtin_HEXAGON_V6_vmpahb_acc_128B",
-    "llvm.hexagon.V6.vmpahhsat" => "__builtin_HEXAGON_V6_vmpahhsat",
-    "llvm.hexagon.V6.vmpahhsat.128B" => "__builtin_HEXAGON_V6_vmpahhsat_128B",
-    "llvm.hexagon.V6.vmpauhb" => "__builtin_HEXAGON_V6_vmpauhb",
-    "llvm.hexagon.V6.vmpauhb.128B" => "__builtin_HEXAGON_V6_vmpauhb_128B",
-    "llvm.hexagon.V6.vmpauhb.acc" => "__builtin_HEXAGON_V6_vmpauhb_acc",
-    "llvm.hexagon.V6.vmpauhb.acc.128B" => "__builtin_HEXAGON_V6_vmpauhb_acc_128B",
-    "llvm.hexagon.V6.vmpauhuhsat" => "__builtin_HEXAGON_V6_vmpauhuhsat",
-    "llvm.hexagon.V6.vmpauhuhsat.128B" => "__builtin_HEXAGON_V6_vmpauhuhsat_128B",
-    "llvm.hexagon.V6.vmpsuhuhsat" => "__builtin_HEXAGON_V6_vmpsuhuhsat",
-    "llvm.hexagon.V6.vmpsuhuhsat.128B" => "__builtin_HEXAGON_V6_vmpsuhuhsat_128B",
-    "llvm.hexagon.V6.vmpy.hf.f8" => "__builtin_HEXAGON_V6_vmpy_hf_f8",
-    "llvm.hexagon.V6.vmpy.hf.f8.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_128B",
-    "llvm.hexagon.V6.vmpy.hf.f8.acc" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc",
-    "llvm.hexagon.V6.vmpy.hf.f8.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc_128B",
-    "llvm.hexagon.V6.vmpy.hf.hf" => "__builtin_HEXAGON_V6_vmpy_hf_hf",
-    "llvm.hexagon.V6.vmpy.hf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_128B",
-    "llvm.hexagon.V6.vmpy.hf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc",
-    "llvm.hexagon.V6.vmpy.hf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B",
-    "llvm.hexagon.V6.vmpy.qf16" => "__builtin_HEXAGON_V6_vmpy_qf16",
-    "llvm.hexagon.V6.vmpy.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_128B",
-    "llvm.hexagon.V6.vmpy.qf16.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_hf",
-    "llvm.hexagon.V6.vmpy.qf16.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf16.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf",
-    "llvm.hexagon.V6.vmpy.qf16.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf32" => "__builtin_HEXAGON_V6_vmpy_qf32",
-    "llvm.hexagon.V6.vmpy.qf32.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_128B",
-    "llvm.hexagon.V6.vmpy.qf32.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_hf",
-    "llvm.hexagon.V6.vmpy.qf32.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf32.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf",
-    "llvm.hexagon.V6.vmpy.qf32.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B",
-    "llvm.hexagon.V6.vmpy.qf32.qf16" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16",
-    "llvm.hexagon.V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
-    "llvm.hexagon.V6.vmpy.qf32.sf" => "__builtin_HEXAGON_V6_vmpy_qf32_sf",
-    "llvm.hexagon.V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
-    "llvm.hexagon.V6.vmpy.rt.hf" => "__builtin_HEXAGON_V6_vmpy_rt_hf",
-    "llvm.hexagon.V6.vmpy.rt.hf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_hf_128B",
-    "llvm.hexagon.V6.vmpy.rt.qf16" => "__builtin_HEXAGON_V6_vmpy_rt_qf16",
-    "llvm.hexagon.V6.vmpy.rt.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_rt_qf16_128B",
-    "llvm.hexagon.V6.vmpy.rt.sf" => "__builtin_HEXAGON_V6_vmpy_rt_sf",
-    "llvm.hexagon.V6.vmpy.rt.sf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_sf_128B",
-    "llvm.hexagon.V6.vmpy.sf.bf" => "__builtin_HEXAGON_V6_vmpy_sf_bf",
-    "llvm.hexagon.V6.vmpy.sf.bf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_128B",
-    "llvm.hexagon.V6.vmpy.sf.bf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc",
-    "llvm.hexagon.V6.vmpy.sf.bf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B",
-    "llvm.hexagon.V6.vmpy.sf.hf" => "__builtin_HEXAGON_V6_vmpy_sf_hf",
-    "llvm.hexagon.V6.vmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_128B",
-    "llvm.hexagon.V6.vmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc",
-    "llvm.hexagon.V6.vmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B",
-    "llvm.hexagon.V6.vmpy.sf.sf" => "__builtin_HEXAGON_V6_vmpy_sf_sf",
-    "llvm.hexagon.V6.vmpy.sf.sf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_sf_128B",
-    "llvm.hexagon.V6.vmpybus" => "__builtin_HEXAGON_V6_vmpybus",
-    "llvm.hexagon.V6.vmpybus.128B" => "__builtin_HEXAGON_V6_vmpybus_128B",
-    "llvm.hexagon.V6.vmpybus.acc" => "__builtin_HEXAGON_V6_vmpybus_acc",
-    "llvm.hexagon.V6.vmpybus.acc.128B" => "__builtin_HEXAGON_V6_vmpybus_acc_128B",
-    "llvm.hexagon.V6.vmpybusv" => "__builtin_HEXAGON_V6_vmpybusv",
-    "llvm.hexagon.V6.vmpybusv.128B" => "__builtin_HEXAGON_V6_vmpybusv_128B",
-    "llvm.hexagon.V6.vmpybusv.acc" => "__builtin_HEXAGON_V6_vmpybusv_acc",
-    "llvm.hexagon.V6.vmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vmpybusv_acc_128B",
-    "llvm.hexagon.V6.vmpybv" => "__builtin_HEXAGON_V6_vmpybv",
-    "llvm.hexagon.V6.vmpybv.128B" => "__builtin_HEXAGON_V6_vmpybv_128B",
-    "llvm.hexagon.V6.vmpybv.acc" => "__builtin_HEXAGON_V6_vmpybv_acc",
-    "llvm.hexagon.V6.vmpybv.acc.128B" => "__builtin_HEXAGON_V6_vmpybv_acc_128B",
-    "llvm.hexagon.V6.vmpyewuh" => "__builtin_HEXAGON_V6_vmpyewuh",
-    "llvm.hexagon.V6.vmpyewuh.128B" => "__builtin_HEXAGON_V6_vmpyewuh_128B",
-    "llvm.hexagon.V6.vmpyewuh.64" => "__builtin_HEXAGON_V6_vmpyewuh_64",
-    "llvm.hexagon.V6.vmpyewuh.64.128B" => "__builtin_HEXAGON_V6_vmpyewuh_64_128B",
-    "llvm.hexagon.V6.vmpyh" => "__builtin_HEXAGON_V6_vmpyh",
-    "llvm.hexagon.V6.vmpyh.128B" => "__builtin_HEXAGON_V6_vmpyh_128B",
-    "llvm.hexagon.V6.vmpyh.acc" => "__builtin_HEXAGON_V6_vmpyh_acc",
-    "llvm.hexagon.V6.vmpyh.acc.128B" => "__builtin_HEXAGON_V6_vmpyh_acc_128B",
-    "llvm.hexagon.V6.vmpyhsat.acc" => "__builtin_HEXAGON_V6_vmpyhsat_acc",
-    "llvm.hexagon.V6.vmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vmpyhsat_acc_128B",
-    "llvm.hexagon.V6.vmpyhsrs" => "__builtin_HEXAGON_V6_vmpyhsrs",
-    "llvm.hexagon.V6.vmpyhsrs.128B" => "__builtin_HEXAGON_V6_vmpyhsrs_128B",
-    "llvm.hexagon.V6.vmpyhss" => "__builtin_HEXAGON_V6_vmpyhss",
-    "llvm.hexagon.V6.vmpyhss.128B" => "__builtin_HEXAGON_V6_vmpyhss_128B",
-    "llvm.hexagon.V6.vmpyhus" => "__builtin_HEXAGON_V6_vmpyhus",
-    "llvm.hexagon.V6.vmpyhus.128B" => "__builtin_HEXAGON_V6_vmpyhus_128B",
-    "llvm.hexagon.V6.vmpyhus.acc" => "__builtin_HEXAGON_V6_vmpyhus_acc",
-    "llvm.hexagon.V6.vmpyhus.acc.128B" => "__builtin_HEXAGON_V6_vmpyhus_acc_128B",
-    "llvm.hexagon.V6.vmpyhv" => "__builtin_HEXAGON_V6_vmpyhv",
-    "llvm.hexagon.V6.vmpyhv.128B" => "__builtin_HEXAGON_V6_vmpyhv_128B",
-    "llvm.hexagon.V6.vmpyhv.acc" => "__builtin_HEXAGON_V6_vmpyhv_acc",
-    "llvm.hexagon.V6.vmpyhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyhv_acc_128B",
-    "llvm.hexagon.V6.vmpyhvsrs" => "__builtin_HEXAGON_V6_vmpyhvsrs",
-    "llvm.hexagon.V6.vmpyhvsrs.128B" => "__builtin_HEXAGON_V6_vmpyhvsrs_128B",
-    "llvm.hexagon.V6.vmpyieoh" => "__builtin_HEXAGON_V6_vmpyieoh",
-    "llvm.hexagon.V6.vmpyieoh.128B" => "__builtin_HEXAGON_V6_vmpyieoh_128B",
-    "llvm.hexagon.V6.vmpyiewh.acc" => "__builtin_HEXAGON_V6_vmpyiewh_acc",
-    "llvm.hexagon.V6.vmpyiewh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewh_acc_128B",
-    "llvm.hexagon.V6.vmpyiewuh" => "__builtin_HEXAGON_V6_vmpyiewuh",
-    "llvm.hexagon.V6.vmpyiewuh.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_128B",
-    "llvm.hexagon.V6.vmpyiewuh.acc" => "__builtin_HEXAGON_V6_vmpyiewuh_acc",
-    "llvm.hexagon.V6.vmpyiewuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_acc_128B",
-    "llvm.hexagon.V6.vmpyih" => "__builtin_HEXAGON_V6_vmpyih",
-    "llvm.hexagon.V6.vmpyih.128B" => "__builtin_HEXAGON_V6_vmpyih_128B",
-    "llvm.hexagon.V6.vmpyih.acc" => "__builtin_HEXAGON_V6_vmpyih_acc",
-    "llvm.hexagon.V6.vmpyih.acc.128B" => "__builtin_HEXAGON_V6_vmpyih_acc_128B",
-    "llvm.hexagon.V6.vmpyihb" => "__builtin_HEXAGON_V6_vmpyihb",
-    "llvm.hexagon.V6.vmpyihb.128B" => "__builtin_HEXAGON_V6_vmpyihb_128B",
-    "llvm.hexagon.V6.vmpyihb.acc" => "__builtin_HEXAGON_V6_vmpyihb_acc",
-    "llvm.hexagon.V6.vmpyihb.acc.128B" => "__builtin_HEXAGON_V6_vmpyihb_acc_128B",
-    "llvm.hexagon.V6.vmpyiowh" => "__builtin_HEXAGON_V6_vmpyiowh",
-    "llvm.hexagon.V6.vmpyiowh.128B" => "__builtin_HEXAGON_V6_vmpyiowh_128B",
-    "llvm.hexagon.V6.vmpyiwb" => "__builtin_HEXAGON_V6_vmpyiwb",
-    "llvm.hexagon.V6.vmpyiwb.128B" => "__builtin_HEXAGON_V6_vmpyiwb_128B",
-    "llvm.hexagon.V6.vmpyiwb.acc" => "__builtin_HEXAGON_V6_vmpyiwb_acc",
-    "llvm.hexagon.V6.vmpyiwb.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwb_acc_128B",
-    "llvm.hexagon.V6.vmpyiwh" => "__builtin_HEXAGON_V6_vmpyiwh",
-    "llvm.hexagon.V6.vmpyiwh.128B" => "__builtin_HEXAGON_V6_vmpyiwh_128B",
-    "llvm.hexagon.V6.vmpyiwh.acc" => "__builtin_HEXAGON_V6_vmpyiwh_acc",
-    "llvm.hexagon.V6.vmpyiwh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwh_acc_128B",
-    "llvm.hexagon.V6.vmpyiwub" => "__builtin_HEXAGON_V6_vmpyiwub",
-    "llvm.hexagon.V6.vmpyiwub.128B" => "__builtin_HEXAGON_V6_vmpyiwub_128B",
-    "llvm.hexagon.V6.vmpyiwub.acc" => "__builtin_HEXAGON_V6_vmpyiwub_acc",
-    "llvm.hexagon.V6.vmpyiwub.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwub_acc_128B",
-    "llvm.hexagon.V6.vmpyowh" => "__builtin_HEXAGON_V6_vmpyowh",
-    "llvm.hexagon.V6.vmpyowh.128B" => "__builtin_HEXAGON_V6_vmpyowh_128B",
-    "llvm.hexagon.V6.vmpyowh.64.acc" => "__builtin_HEXAGON_V6_vmpyowh_64_acc",
-    "llvm.hexagon.V6.vmpyowh.64.acc.128B" => "__builtin_HEXAGON_V6_vmpyowh_64_acc_128B",
-    "llvm.hexagon.V6.vmpyowh.rnd" => "__builtin_HEXAGON_V6_vmpyowh_rnd",
-    "llvm.hexagon.V6.vmpyowh.rnd.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_128B",
-    "llvm.hexagon.V6.vmpyowh.rnd.sacc" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc",
-    "llvm.hexagon.V6.vmpyowh.rnd.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B",
-    "llvm.hexagon.V6.vmpyowh.sacc" => "__builtin_HEXAGON_V6_vmpyowh_sacc",
-    "llvm.hexagon.V6.vmpyowh.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_sacc_128B",
-    "llvm.hexagon.V6.vmpyub" => "__builtin_HEXAGON_V6_vmpyub",
-    "llvm.hexagon.V6.vmpyub.128B" => "__builtin_HEXAGON_V6_vmpyub_128B",
-    "llvm.hexagon.V6.vmpyub.acc" => "__builtin_HEXAGON_V6_vmpyub_acc",
-    "llvm.hexagon.V6.vmpyub.acc.128B" => "__builtin_HEXAGON_V6_vmpyub_acc_128B",
-    "llvm.hexagon.V6.vmpyubv" => "__builtin_HEXAGON_V6_vmpyubv",
-    "llvm.hexagon.V6.vmpyubv.128B" => "__builtin_HEXAGON_V6_vmpyubv_128B",
-    "llvm.hexagon.V6.vmpyubv.acc" => "__builtin_HEXAGON_V6_vmpyubv_acc",
-    "llvm.hexagon.V6.vmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vmpyubv_acc_128B",
-    "llvm.hexagon.V6.vmpyuh" => "__builtin_HEXAGON_V6_vmpyuh",
-    "llvm.hexagon.V6.vmpyuh.128B" => "__builtin_HEXAGON_V6_vmpyuh_128B",
-    "llvm.hexagon.V6.vmpyuh.acc" => "__builtin_HEXAGON_V6_vmpyuh_acc",
-    "llvm.hexagon.V6.vmpyuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyuh_acc_128B",
-    "llvm.hexagon.V6.vmpyuhe" => "__builtin_HEXAGON_V6_vmpyuhe",
-    "llvm.hexagon.V6.vmpyuhe.128B" => "__builtin_HEXAGON_V6_vmpyuhe_128B",
-    "llvm.hexagon.V6.vmpyuhe.acc" => "__builtin_HEXAGON_V6_vmpyuhe_acc",
-    "llvm.hexagon.V6.vmpyuhe.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhe_acc_128B",
-    "llvm.hexagon.V6.vmpyuhv" => "__builtin_HEXAGON_V6_vmpyuhv",
-    "llvm.hexagon.V6.vmpyuhv.128B" => "__builtin_HEXAGON_V6_vmpyuhv_128B",
-    "llvm.hexagon.V6.vmpyuhv.acc" => "__builtin_HEXAGON_V6_vmpyuhv_acc",
-    "llvm.hexagon.V6.vmpyuhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhv_acc_128B",
-    "llvm.hexagon.V6.vmpyuhvs" => "__builtin_HEXAGON_V6_vmpyuhvs",
-    "llvm.hexagon.V6.vmpyuhvs.128B" => "__builtin_HEXAGON_V6_vmpyuhvs_128B",
-    "llvm.hexagon.V6.vmux" => "__builtin_HEXAGON_V6_vmux",
-    "llvm.hexagon.V6.vmux.128B" => "__builtin_HEXAGON_V6_vmux_128B",
-    "llvm.hexagon.V6.vnavgb" => "__builtin_HEXAGON_V6_vnavgb",
-    "llvm.hexagon.V6.vnavgb.128B" => "__builtin_HEXAGON_V6_vnavgb_128B",
-    "llvm.hexagon.V6.vnavgh" => "__builtin_HEXAGON_V6_vnavgh",
-    "llvm.hexagon.V6.vnavgh.128B" => "__builtin_HEXAGON_V6_vnavgh_128B",
-    "llvm.hexagon.V6.vnavgub" => "__builtin_HEXAGON_V6_vnavgub",
-    "llvm.hexagon.V6.vnavgub.128B" => "__builtin_HEXAGON_V6_vnavgub_128B",
-    "llvm.hexagon.V6.vnavgw" => "__builtin_HEXAGON_V6_vnavgw",
-    "llvm.hexagon.V6.vnavgw.128B" => "__builtin_HEXAGON_V6_vnavgw_128B",
-    "llvm.hexagon.V6.vnormamth" => "__builtin_HEXAGON_V6_vnormamth",
-    "llvm.hexagon.V6.vnormamth.128B" => "__builtin_HEXAGON_V6_vnormamth_128B",
-    "llvm.hexagon.V6.vnormamtw" => "__builtin_HEXAGON_V6_vnormamtw",
-    "llvm.hexagon.V6.vnormamtw.128B" => "__builtin_HEXAGON_V6_vnormamtw_128B",
-    "llvm.hexagon.V6.vnot" => "__builtin_HEXAGON_V6_vnot",
-    "llvm.hexagon.V6.vnot.128B" => "__builtin_HEXAGON_V6_vnot_128B",
-    "llvm.hexagon.V6.vor" => "__builtin_HEXAGON_V6_vor",
-    "llvm.hexagon.V6.vor.128B" => "__builtin_HEXAGON_V6_vor_128B",
-    "llvm.hexagon.V6.vpackeb" => "__builtin_HEXAGON_V6_vpackeb",
-    "llvm.hexagon.V6.vpackeb.128B" => "__builtin_HEXAGON_V6_vpackeb_128B",
-    "llvm.hexagon.V6.vpackeh" => "__builtin_HEXAGON_V6_vpackeh",
-    "llvm.hexagon.V6.vpackeh.128B" => "__builtin_HEXAGON_V6_vpackeh_128B",
-    "llvm.hexagon.V6.vpackhb.sat" => "__builtin_HEXAGON_V6_vpackhb_sat",
-    "llvm.hexagon.V6.vpackhb.sat.128B" => "__builtin_HEXAGON_V6_vpackhb_sat_128B",
-    "llvm.hexagon.V6.vpackhub.sat" => "__builtin_HEXAGON_V6_vpackhub_sat",
-    "llvm.hexagon.V6.vpackhub.sat.128B" => "__builtin_HEXAGON_V6_vpackhub_sat_128B",
-    "llvm.hexagon.V6.vpackob" => "__builtin_HEXAGON_V6_vpackob",
-    "llvm.hexagon.V6.vpackob.128B" => "__builtin_HEXAGON_V6_vpackob_128B",
-    "llvm.hexagon.V6.vpackoh" => "__builtin_HEXAGON_V6_vpackoh",
-    "llvm.hexagon.V6.vpackoh.128B" => "__builtin_HEXAGON_V6_vpackoh_128B",
-    "llvm.hexagon.V6.vpackwh.sat" => "__builtin_HEXAGON_V6_vpackwh_sat",
-    "llvm.hexagon.V6.vpackwh.sat.128B" => "__builtin_HEXAGON_V6_vpackwh_sat_128B",
-    "llvm.hexagon.V6.vpackwuh.sat" => "__builtin_HEXAGON_V6_vpackwuh_sat",
-    "llvm.hexagon.V6.vpackwuh.sat.128B" => "__builtin_HEXAGON_V6_vpackwuh_sat_128B",
-    "llvm.hexagon.V6.vpopcounth" => "__builtin_HEXAGON_V6_vpopcounth",
-    "llvm.hexagon.V6.vpopcounth.128B" => "__builtin_HEXAGON_V6_vpopcounth_128B",
-    "llvm.hexagon.V6.vprefixqb" => "__builtin_HEXAGON_V6_vprefixqb",
-    "llvm.hexagon.V6.vprefixqb.128B" => "__builtin_HEXAGON_V6_vprefixqb_128B",
-    "llvm.hexagon.V6.vprefixqh" => "__builtin_HEXAGON_V6_vprefixqh",
-    "llvm.hexagon.V6.vprefixqh.128B" => "__builtin_HEXAGON_V6_vprefixqh_128B",
-    "llvm.hexagon.V6.vprefixqw" => "__builtin_HEXAGON_V6_vprefixqw",
-    "llvm.hexagon.V6.vprefixqw.128B" => "__builtin_HEXAGON_V6_vprefixqw_128B",
-    "llvm.hexagon.V6.vrdelta" => "__builtin_HEXAGON_V6_vrdelta",
-    "llvm.hexagon.V6.vrdelta.128B" => "__builtin_HEXAGON_V6_vrdelta_128B",
-    "llvm.hexagon.V6.vrmpybub.rtt" => "__builtin_HEXAGON_V6_vrmpybub_rtt",
-    "llvm.hexagon.V6.vrmpybub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_128B",
-    "llvm.hexagon.V6.vrmpybub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc",
-    "llvm.hexagon.V6.vrmpybub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B",
-    "llvm.hexagon.V6.vrmpybus" => "__builtin_HEXAGON_V6_vrmpybus",
-    "llvm.hexagon.V6.vrmpybus.128B" => "__builtin_HEXAGON_V6_vrmpybus_128B",
-    "llvm.hexagon.V6.vrmpybus.acc" => "__builtin_HEXAGON_V6_vrmpybus_acc",
-    "llvm.hexagon.V6.vrmpybus.acc.128B" => "__builtin_HEXAGON_V6_vrmpybus_acc_128B",
-    "llvm.hexagon.V6.vrmpybusi" => "__builtin_HEXAGON_V6_vrmpybusi",
-    "llvm.hexagon.V6.vrmpybusi.128B" => "__builtin_HEXAGON_V6_vrmpybusi_128B",
-    "llvm.hexagon.V6.vrmpybusi.acc" => "__builtin_HEXAGON_V6_vrmpybusi_acc",
-    "llvm.hexagon.V6.vrmpybusi.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusi_acc_128B",
-    "llvm.hexagon.V6.vrmpybusv" => "__builtin_HEXAGON_V6_vrmpybusv",
-    "llvm.hexagon.V6.vrmpybusv.128B" => "__builtin_HEXAGON_V6_vrmpybusv_128B",
-    "llvm.hexagon.V6.vrmpybusv.acc" => "__builtin_HEXAGON_V6_vrmpybusv_acc",
-    "llvm.hexagon.V6.vrmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusv_acc_128B",
-    "llvm.hexagon.V6.vrmpybv" => "__builtin_HEXAGON_V6_vrmpybv",
-    "llvm.hexagon.V6.vrmpybv.128B" => "__builtin_HEXAGON_V6_vrmpybv_128B",
-    "llvm.hexagon.V6.vrmpybv.acc" => "__builtin_HEXAGON_V6_vrmpybv_acc",
-    "llvm.hexagon.V6.vrmpybv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybv_acc_128B",
-    "llvm.hexagon.V6.vrmpyub" => "__builtin_HEXAGON_V6_vrmpyub",
-    "llvm.hexagon.V6.vrmpyub.128B" => "__builtin_HEXAGON_V6_vrmpyub_128B",
-    "llvm.hexagon.V6.vrmpyub.acc" => "__builtin_HEXAGON_V6_vrmpyub_acc",
-    "llvm.hexagon.V6.vrmpyub.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_acc_128B",
-    "llvm.hexagon.V6.vrmpyub.rtt" => "__builtin_HEXAGON_V6_vrmpyub_rtt",
-    "llvm.hexagon.V6.vrmpyub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_128B",
-    "llvm.hexagon.V6.vrmpyub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc",
-    "llvm.hexagon.V6.vrmpyub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B",
-    "llvm.hexagon.V6.vrmpyubi" => "__builtin_HEXAGON_V6_vrmpyubi",
-    "llvm.hexagon.V6.vrmpyubi.128B" => "__builtin_HEXAGON_V6_vrmpyubi_128B",
-    "llvm.hexagon.V6.vrmpyubi.acc" => "__builtin_HEXAGON_V6_vrmpyubi_acc",
-    "llvm.hexagon.V6.vrmpyubi.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubi_acc_128B",
-    "llvm.hexagon.V6.vrmpyubv" => "__builtin_HEXAGON_V6_vrmpyubv",
-    "llvm.hexagon.V6.vrmpyubv.128B" => "__builtin_HEXAGON_V6_vrmpyubv_128B",
-    "llvm.hexagon.V6.vrmpyubv.acc" => "__builtin_HEXAGON_V6_vrmpyubv_acc",
-    "llvm.hexagon.V6.vrmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubv_acc_128B",
-    "llvm.hexagon.V6.vror" => "__builtin_HEXAGON_V6_vror",
-    "llvm.hexagon.V6.vror.128B" => "__builtin_HEXAGON_V6_vror_128B",
-    "llvm.hexagon.V6.vrotr" => "__builtin_HEXAGON_V6_vrotr",
-    "llvm.hexagon.V6.vrotr.128B" => "__builtin_HEXAGON_V6_vrotr_128B",
-    "llvm.hexagon.V6.vroundhb" => "__builtin_HEXAGON_V6_vroundhb",
-    "llvm.hexagon.V6.vroundhb.128B" => "__builtin_HEXAGON_V6_vroundhb_128B",
-    "llvm.hexagon.V6.vroundhub" => "__builtin_HEXAGON_V6_vroundhub",
-    "llvm.hexagon.V6.vroundhub.128B" => "__builtin_HEXAGON_V6_vroundhub_128B",
-    "llvm.hexagon.V6.vrounduhub" => "__builtin_HEXAGON_V6_vrounduhub",
-    "llvm.hexagon.V6.vrounduhub.128B" => "__builtin_HEXAGON_V6_vrounduhub_128B",
-    "llvm.hexagon.V6.vrounduwuh" => "__builtin_HEXAGON_V6_vrounduwuh",
-    "llvm.hexagon.V6.vrounduwuh.128B" => "__builtin_HEXAGON_V6_vrounduwuh_128B",
-    "llvm.hexagon.V6.vroundwh" => "__builtin_HEXAGON_V6_vroundwh",
-    "llvm.hexagon.V6.vroundwh.128B" => "__builtin_HEXAGON_V6_vroundwh_128B",
-    "llvm.hexagon.V6.vroundwuh" => "__builtin_HEXAGON_V6_vroundwuh",
-    "llvm.hexagon.V6.vroundwuh.128B" => "__builtin_HEXAGON_V6_vroundwuh_128B",
-    "llvm.hexagon.V6.vrsadubi" => "__builtin_HEXAGON_V6_vrsadubi",
-    "llvm.hexagon.V6.vrsadubi.128B" => "__builtin_HEXAGON_V6_vrsadubi_128B",
-    "llvm.hexagon.V6.vrsadubi.acc" => "__builtin_HEXAGON_V6_vrsadubi_acc",
-    "llvm.hexagon.V6.vrsadubi.acc.128B" => "__builtin_HEXAGON_V6_vrsadubi_acc_128B",
-    "llvm.hexagon.V6.vsatdw" => "__builtin_HEXAGON_V6_vsatdw",
-    "llvm.hexagon.V6.vsatdw.128B" => "__builtin_HEXAGON_V6_vsatdw_128B",
-    "llvm.hexagon.V6.vsathub" => "__builtin_HEXAGON_V6_vsathub",
-    "llvm.hexagon.V6.vsathub.128B" => "__builtin_HEXAGON_V6_vsathub_128B",
-    "llvm.hexagon.V6.vsatuwuh" => "__builtin_HEXAGON_V6_vsatuwuh",
-    "llvm.hexagon.V6.vsatuwuh.128B" => "__builtin_HEXAGON_V6_vsatuwuh_128B",
-    "llvm.hexagon.V6.vsatwh" => "__builtin_HEXAGON_V6_vsatwh",
-    "llvm.hexagon.V6.vsatwh.128B" => "__builtin_HEXAGON_V6_vsatwh_128B",
-    "llvm.hexagon.V6.vsb" => "__builtin_HEXAGON_V6_vsb",
-    "llvm.hexagon.V6.vsb.128B" => "__builtin_HEXAGON_V6_vsb_128B",
-    "llvm.hexagon.V6.vscattermh" => "__builtin_HEXAGON_V6_vscattermh",
-    "llvm.hexagon.V6.vscattermh.128B" => "__builtin_HEXAGON_V6_vscattermh_128B",
-    "llvm.hexagon.V6.vscattermh.add" => "__builtin_HEXAGON_V6_vscattermh_add",
-    "llvm.hexagon.V6.vscattermh.add.128B" => "__builtin_HEXAGON_V6_vscattermh_add_128B",
-    "llvm.hexagon.V6.vscattermhq" => "__builtin_HEXAGON_V6_vscattermhq",
-    "llvm.hexagon.V6.vscattermhq.128B" => "__builtin_HEXAGON_V6_vscattermhq_128B",
-    "llvm.hexagon.V6.vscattermhw" => "__builtin_HEXAGON_V6_vscattermhw",
-    "llvm.hexagon.V6.vscattermhw.128B" => "__builtin_HEXAGON_V6_vscattermhw_128B",
-    "llvm.hexagon.V6.vscattermhw.add" => "__builtin_HEXAGON_V6_vscattermhw_add",
-    "llvm.hexagon.V6.vscattermhw.add.128B" => "__builtin_HEXAGON_V6_vscattermhw_add_128B",
-    "llvm.hexagon.V6.vscattermhwq" => "__builtin_HEXAGON_V6_vscattermhwq",
-    "llvm.hexagon.V6.vscattermhwq.128B" => "__builtin_HEXAGON_V6_vscattermhwq_128B",
-    "llvm.hexagon.V6.vscattermw" => "__builtin_HEXAGON_V6_vscattermw",
-    "llvm.hexagon.V6.vscattermw.128B" => "__builtin_HEXAGON_V6_vscattermw_128B",
-    "llvm.hexagon.V6.vscattermw.add" => "__builtin_HEXAGON_V6_vscattermw_add",
-    "llvm.hexagon.V6.vscattermw.add.128B" => "__builtin_HEXAGON_V6_vscattermw_add_128B",
-    "llvm.hexagon.V6.vscattermwq" => "__builtin_HEXAGON_V6_vscattermwq",
-    "llvm.hexagon.V6.vscattermwq.128B" => "__builtin_HEXAGON_V6_vscattermwq_128B",
-    "llvm.hexagon.V6.vsh" => "__builtin_HEXAGON_V6_vsh",
-    "llvm.hexagon.V6.vsh.128B" => "__builtin_HEXAGON_V6_vsh_128B",
-    "llvm.hexagon.V6.vshufeh" => "__builtin_HEXAGON_V6_vshufeh",
-    "llvm.hexagon.V6.vshufeh.128B" => "__builtin_HEXAGON_V6_vshufeh_128B",
-    "llvm.hexagon.V6.vshuffb" => "__builtin_HEXAGON_V6_vshuffb",
-    "llvm.hexagon.V6.vshuffb.128B" => "__builtin_HEXAGON_V6_vshuffb_128B",
-    "llvm.hexagon.V6.vshuffeb" => "__builtin_HEXAGON_V6_vshuffeb",
-    "llvm.hexagon.V6.vshuffeb.128B" => "__builtin_HEXAGON_V6_vshuffeb_128B",
-    "llvm.hexagon.V6.vshuffh" => "__builtin_HEXAGON_V6_vshuffh",
-    "llvm.hexagon.V6.vshuffh.128B" => "__builtin_HEXAGON_V6_vshuffh_128B",
-    "llvm.hexagon.V6.vshuffob" => "__builtin_HEXAGON_V6_vshuffob",
-    "llvm.hexagon.V6.vshuffob.128B" => "__builtin_HEXAGON_V6_vshuffob_128B",
-    "llvm.hexagon.V6.vshuffvdd" => "__builtin_HEXAGON_V6_vshuffvdd",
-    "llvm.hexagon.V6.vshuffvdd.128B" => "__builtin_HEXAGON_V6_vshuffvdd_128B",
-    "llvm.hexagon.V6.vshufoeb" => "__builtin_HEXAGON_V6_vshufoeb",
-    "llvm.hexagon.V6.vshufoeb.128B" => "__builtin_HEXAGON_V6_vshufoeb_128B",
-    "llvm.hexagon.V6.vshufoeh" => "__builtin_HEXAGON_V6_vshufoeh",
-    "llvm.hexagon.V6.vshufoeh.128B" => "__builtin_HEXAGON_V6_vshufoeh_128B",
-    "llvm.hexagon.V6.vshufoh" => "__builtin_HEXAGON_V6_vshufoh",
-    "llvm.hexagon.V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
-    "llvm.hexagon.V6.vsub.hf" => "__builtin_HEXAGON_V6_vsub_hf",
-    "llvm.hexagon.V6.vsub.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_128B",
-    "llvm.hexagon.V6.vsub.hf.f8" => "__builtin_HEXAGON_V6_vsub_hf_f8",
-    "llvm.hexagon.V6.vsub.hf.f8.128B" => "__builtin_HEXAGON_V6_vsub_hf_f8_128B",
-    "llvm.hexagon.V6.vsub.hf.hf" => "__builtin_HEXAGON_V6_vsub_hf_hf",
-    "llvm.hexagon.V6.vsub.hf.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_hf_128B",
-    "llvm.hexagon.V6.vsub.qf16" => "__builtin_HEXAGON_V6_vsub_qf16",
-    "llvm.hexagon.V6.vsub.qf16.128B" => "__builtin_HEXAGON_V6_vsub_qf16_128B",
-    "llvm.hexagon.V6.vsub.qf16.mix" => "__builtin_HEXAGON_V6_vsub_qf16_mix",
-    "llvm.hexagon.V6.vsub.qf16.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf16_mix_128B",
-    "llvm.hexagon.V6.vsub.qf32" => "__builtin_HEXAGON_V6_vsub_qf32",
-    "llvm.hexagon.V6.vsub.qf32.128B" => "__builtin_HEXAGON_V6_vsub_qf32_128B",
-    "llvm.hexagon.V6.vsub.qf32.mix" => "__builtin_HEXAGON_V6_vsub_qf32_mix",
-    "llvm.hexagon.V6.vsub.qf32.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf32_mix_128B",
-    "llvm.hexagon.V6.vsub.sf" => "__builtin_HEXAGON_V6_vsub_sf",
-    "llvm.hexagon.V6.vsub.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_128B",
-    "llvm.hexagon.V6.vsub.sf.bf" => "__builtin_HEXAGON_V6_vsub_sf_bf",
-    "llvm.hexagon.V6.vsub.sf.bf.128B" => "__builtin_HEXAGON_V6_vsub_sf_bf_128B",
-    "llvm.hexagon.V6.vsub.sf.hf" => "__builtin_HEXAGON_V6_vsub_sf_hf",
-    "llvm.hexagon.V6.vsub.sf.hf.128B" => "__builtin_HEXAGON_V6_vsub_sf_hf_128B",
-    "llvm.hexagon.V6.vsub.sf.sf" => "__builtin_HEXAGON_V6_vsub_sf_sf",
-    "llvm.hexagon.V6.vsub.sf.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_sf_128B",
-    "llvm.hexagon.V6.vsubb" => "__builtin_HEXAGON_V6_vsubb",
-    "llvm.hexagon.V6.vsubb.128B" => "__builtin_HEXAGON_V6_vsubb_128B",
-    "llvm.hexagon.V6.vsubb.dv" => "__builtin_HEXAGON_V6_vsubb_dv",
-    "llvm.hexagon.V6.vsubb.dv.128B" => "__builtin_HEXAGON_V6_vsubb_dv_128B",
-    "llvm.hexagon.V6.vsubbnq" => "__builtin_HEXAGON_V6_vsubbnq",
-    "llvm.hexagon.V6.vsubbnq.128B" => "__builtin_HEXAGON_V6_vsubbnq_128B",
-    "llvm.hexagon.V6.vsubbq" => "__builtin_HEXAGON_V6_vsubbq",
-    "llvm.hexagon.V6.vsubbq.128B" => "__builtin_HEXAGON_V6_vsubbq_128B",
-    "llvm.hexagon.V6.vsubbsat" => "__builtin_HEXAGON_V6_vsubbsat",
-    "llvm.hexagon.V6.vsubbsat.128B" => "__builtin_HEXAGON_V6_vsubbsat_128B",
-    "llvm.hexagon.V6.vsubbsat.dv" => "__builtin_HEXAGON_V6_vsubbsat_dv",
-    "llvm.hexagon.V6.vsubbsat.dv.128B" => "__builtin_HEXAGON_V6_vsubbsat_dv_128B",
-    "llvm.hexagon.V6.vsubh" => "__builtin_HEXAGON_V6_vsubh",
-    "llvm.hexagon.V6.vsubh.128B" => "__builtin_HEXAGON_V6_vsubh_128B",
-    "llvm.hexagon.V6.vsubh.dv" => "__builtin_HEXAGON_V6_vsubh_dv",
-    "llvm.hexagon.V6.vsubh.dv.128B" => "__builtin_HEXAGON_V6_vsubh_dv_128B",
-    "llvm.hexagon.V6.vsubhnq" => "__builtin_HEXAGON_V6_vsubhnq",
-    "llvm.hexagon.V6.vsubhnq.128B" => "__builtin_HEXAGON_V6_vsubhnq_128B",
-    "llvm.hexagon.V6.vsubhq" => "__builtin_HEXAGON_V6_vsubhq",
-    "llvm.hexagon.V6.vsubhq.128B" => "__builtin_HEXAGON_V6_vsubhq_128B",
-    "llvm.hexagon.V6.vsubhsat" => "__builtin_HEXAGON_V6_vsubhsat",
-    "llvm.hexagon.V6.vsubhsat.128B" => "__builtin_HEXAGON_V6_vsubhsat_128B",
-    "llvm.hexagon.V6.vsubhsat.dv" => "__builtin_HEXAGON_V6_vsubhsat_dv",
-    "llvm.hexagon.V6.vsubhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubhsat_dv_128B",
-    "llvm.hexagon.V6.vsubhw" => "__builtin_HEXAGON_V6_vsubhw",
-    "llvm.hexagon.V6.vsubhw.128B" => "__builtin_HEXAGON_V6_vsubhw_128B",
-    "llvm.hexagon.V6.vsububh" => "__builtin_HEXAGON_V6_vsububh",
-    "llvm.hexagon.V6.vsububh.128B" => "__builtin_HEXAGON_V6_vsububh_128B",
-    "llvm.hexagon.V6.vsububsat" => "__builtin_HEXAGON_V6_vsububsat",
-    "llvm.hexagon.V6.vsububsat.128B" => "__builtin_HEXAGON_V6_vsububsat_128B",
-    "llvm.hexagon.V6.vsububsat.dv" => "__builtin_HEXAGON_V6_vsububsat_dv",
-    "llvm.hexagon.V6.vsububsat.dv.128B" => "__builtin_HEXAGON_V6_vsububsat_dv_128B",
-    "llvm.hexagon.V6.vsubububb.sat" => "__builtin_HEXAGON_V6_vsubububb_sat",
-    "llvm.hexagon.V6.vsubububb.sat.128B" => "__builtin_HEXAGON_V6_vsubububb_sat_128B",
-    "llvm.hexagon.V6.vsubuhsat" => "__builtin_HEXAGON_V6_vsubuhsat",
-    "llvm.hexagon.V6.vsubuhsat.128B" => "__builtin_HEXAGON_V6_vsubuhsat_128B",
-    "llvm.hexagon.V6.vsubuhsat.dv" => "__builtin_HEXAGON_V6_vsubuhsat_dv",
-    "llvm.hexagon.V6.vsubuhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuhsat_dv_128B",
-    "llvm.hexagon.V6.vsubuhw" => "__builtin_HEXAGON_V6_vsubuhw",
-    "llvm.hexagon.V6.vsubuhw.128B" => "__builtin_HEXAGON_V6_vsubuhw_128B",
-    "llvm.hexagon.V6.vsubuwsat" => "__builtin_HEXAGON_V6_vsubuwsat",
-    "llvm.hexagon.V6.vsubuwsat.128B" => "__builtin_HEXAGON_V6_vsubuwsat_128B",
-    "llvm.hexagon.V6.vsubuwsat.dv" => "__builtin_HEXAGON_V6_vsubuwsat_dv",
-    "llvm.hexagon.V6.vsubuwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuwsat_dv_128B",
-    "llvm.hexagon.V6.vsubw" => "__builtin_HEXAGON_V6_vsubw",
-    "llvm.hexagon.V6.vsubw.128B" => "__builtin_HEXAGON_V6_vsubw_128B",
-    "llvm.hexagon.V6.vsubw.dv" => "__builtin_HEXAGON_V6_vsubw_dv",
-    "llvm.hexagon.V6.vsubw.dv.128B" => "__builtin_HEXAGON_V6_vsubw_dv_128B",
-    "llvm.hexagon.V6.vsubwnq" => "__builtin_HEXAGON_V6_vsubwnq",
-    "llvm.hexagon.V6.vsubwnq.128B" => "__builtin_HEXAGON_V6_vsubwnq_128B",
-    "llvm.hexagon.V6.vsubwq" => "__builtin_HEXAGON_V6_vsubwq",
-    "llvm.hexagon.V6.vsubwq.128B" => "__builtin_HEXAGON_V6_vsubwq_128B",
-    "llvm.hexagon.V6.vsubwsat" => "__builtin_HEXAGON_V6_vsubwsat",
-    "llvm.hexagon.V6.vsubwsat.128B" => "__builtin_HEXAGON_V6_vsubwsat_128B",
-    "llvm.hexagon.V6.vsubwsat.dv" => "__builtin_HEXAGON_V6_vsubwsat_dv",
-    "llvm.hexagon.V6.vsubwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubwsat_dv_128B",
-    "llvm.hexagon.V6.vswap" => "__builtin_HEXAGON_V6_vswap",
-    "llvm.hexagon.V6.vswap.128B" => "__builtin_HEXAGON_V6_vswap_128B",
-    "llvm.hexagon.V6.vtmpyb" => "__builtin_HEXAGON_V6_vtmpyb",
-    "llvm.hexagon.V6.vtmpyb.128B" => "__builtin_HEXAGON_V6_vtmpyb_128B",
-    "llvm.hexagon.V6.vtmpyb.acc" => "__builtin_HEXAGON_V6_vtmpyb_acc",
-    "llvm.hexagon.V6.vtmpyb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyb_acc_128B",
-    "llvm.hexagon.V6.vtmpybus" => "__builtin_HEXAGON_V6_vtmpybus",
-    "llvm.hexagon.V6.vtmpybus.128B" => "__builtin_HEXAGON_V6_vtmpybus_128B",
-    "llvm.hexagon.V6.vtmpybus.acc" => "__builtin_HEXAGON_V6_vtmpybus_acc",
-    "llvm.hexagon.V6.vtmpybus.acc.128B" => "__builtin_HEXAGON_V6_vtmpybus_acc_128B",
-    "llvm.hexagon.V6.vtmpyhb" => "__builtin_HEXAGON_V6_vtmpyhb",
-    "llvm.hexagon.V6.vtmpyhb.128B" => "__builtin_HEXAGON_V6_vtmpyhb_128B",
-    "llvm.hexagon.V6.vtmpyhb.acc" => "__builtin_HEXAGON_V6_vtmpyhb_acc",
-    "llvm.hexagon.V6.vtmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyhb_acc_128B",
-    "llvm.hexagon.V6.vunpackb" => "__builtin_HEXAGON_V6_vunpackb",
-    "llvm.hexagon.V6.vunpackb.128B" => "__builtin_HEXAGON_V6_vunpackb_128B",
-    "llvm.hexagon.V6.vunpackh" => "__builtin_HEXAGON_V6_vunpackh",
-    "llvm.hexagon.V6.vunpackh.128B" => "__builtin_HEXAGON_V6_vunpackh_128B",
-    "llvm.hexagon.V6.vunpackob" => "__builtin_HEXAGON_V6_vunpackob",
-    "llvm.hexagon.V6.vunpackob.128B" => "__builtin_HEXAGON_V6_vunpackob_128B",
-    "llvm.hexagon.V6.vunpackoh" => "__builtin_HEXAGON_V6_vunpackoh",
-    "llvm.hexagon.V6.vunpackoh.128B" => "__builtin_HEXAGON_V6_vunpackoh_128B",
-    "llvm.hexagon.V6.vunpackub" => "__builtin_HEXAGON_V6_vunpackub",
-    "llvm.hexagon.V6.vunpackub.128B" => "__builtin_HEXAGON_V6_vunpackub_128B",
-    "llvm.hexagon.V6.vunpackuh" => "__builtin_HEXAGON_V6_vunpackuh",
-    "llvm.hexagon.V6.vunpackuh.128B" => "__builtin_HEXAGON_V6_vunpackuh_128B",
-    "llvm.hexagon.V6.vxor" => "__builtin_HEXAGON_V6_vxor",
-    "llvm.hexagon.V6.vxor.128B" => "__builtin_HEXAGON_V6_vxor_128B",
-    "llvm.hexagon.V6.vzb" => "__builtin_HEXAGON_V6_vzb",
-    "llvm.hexagon.V6.vzb.128B" => "__builtin_HEXAGON_V6_vzb_128B",
-    "llvm.hexagon.V6.vzh" => "__builtin_HEXAGON_V6_vzh",
-    "llvm.hexagon.V6.vzh.128B" => "__builtin_HEXAGON_V6_vzh_128B",
-    "llvm.hexagon.Y2.dccleana" => "__builtin_HEXAGON_Y2_dccleana",
-    "llvm.hexagon.Y2.dccleaninva" => "__builtin_HEXAGON_Y2_dccleaninva",
-    "llvm.hexagon.Y2.dcfetch" => "__builtin_HEXAGON_Y2_dcfetch",
-    "llvm.hexagon.Y2.dcinva" => "__builtin_HEXAGON_Y2_dcinva",
-    "llvm.hexagon.Y2.dczeroa" => "__builtin_HEXAGON_Y2_dczeroa",
-    "llvm.hexagon.Y4.l2fetch" => "__builtin_HEXAGON_Y4_l2fetch",
-    "llvm.hexagon.Y5.l2fetch" => "__builtin_HEXAGON_Y5_l2fetch",
-    "llvm.hexagon.Y6.dmlink" => "__builtin_HEXAGON_Y6_dmlink",
-    "llvm.hexagon.Y6.dmpause" => "__builtin_HEXAGON_Y6_dmpause",
-    "llvm.hexagon.Y6.dmpoll" => "__builtin_HEXAGON_Y6_dmpoll",
-    "llvm.hexagon.Y6.dmresume" => "__builtin_HEXAGON_Y6_dmresume",
-    "llvm.hexagon.Y6.dmstart" => "__builtin_HEXAGON_Y6_dmstart",
-    "llvm.hexagon.Y6.dmwait" => "__builtin_HEXAGON_Y6_dmwait",
-    "llvm.hexagon.brev.ldb" => "__builtin_brev_ldb",
-    "llvm.hexagon.brev.ldd" => "__builtin_brev_ldd",
-    "llvm.hexagon.brev.ldh" => "__builtin_brev_ldh",
-    "llvm.hexagon.brev.ldub" => "__builtin_brev_ldub",
-    "llvm.hexagon.brev.lduh" => "__builtin_brev_lduh",
-    "llvm.hexagon.brev.ldw" => "__builtin_brev_ldw",
-    "llvm.hexagon.brev.stb" => "__builtin_brev_stb",
-    "llvm.hexagon.brev.std" => "__builtin_brev_std",
-    "llvm.hexagon.brev.sth" => "__builtin_brev_sth",
-    "llvm.hexagon.brev.sthhi" => "__builtin_brev_sthhi",
-    "llvm.hexagon.brev.stw" => "__builtin_brev_stw",
-    "llvm.hexagon.circ.ldb" => "__builtin_circ_ldb",
-    "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
-    "llvm.hexagon.circ.ldh" => "__builtin_circ_ldh",
-    "llvm.hexagon.circ.ldub" => "__builtin_circ_ldub",
-    "llvm.hexagon.circ.lduh" => "__builtin_circ_lduh",
-    "llvm.hexagon.circ.ldw" => "__builtin_circ_ldw",
-    "llvm.hexagon.circ.stb" => "__builtin_circ_stb",
-    "llvm.hexagon.circ.std" => "__builtin_circ_std",
-    "llvm.hexagon.circ.sth" => "__builtin_circ_sth",
-    "llvm.hexagon.circ.sthhi" => "__builtin_circ_sthhi",
-    "llvm.hexagon.circ.stw" => "__builtin_circ_stw",
-    "llvm.hexagon.mm256i.vaddw" => "__builtin__mm256i_vaddw",
-    "llvm.hexagon.prefetch" => "__builtin_HEXAGON_prefetch",
-    "llvm.hexagon.vmemcpy" => "__builtin_hexagon_vmemcpy",
-    "llvm.hexagon.vmemset" => "__builtin_hexagon_vmemset",
-    // loongarch
-    "llvm.loongarch.asrtgt.d" => "__builtin_loongarch_asrtgt_d",
-    "llvm.loongarch.asrtle.d" => "__builtin_loongarch_asrtle_d",
-    "llvm.loongarch.break" => "__builtin_loongarch_break",
-    "llvm.loongarch.cacop.d" => "__builtin_loongarch_cacop_d",
-    "llvm.loongarch.cacop.w" => "__builtin_loongarch_cacop_w",
-    "llvm.loongarch.cpucfg" => "__builtin_loongarch_cpucfg",
-    "llvm.loongarch.crc.w.b.w" => "__builtin_loongarch_crc_w_b_w",
-    "llvm.loongarch.crc.w.d.w" => "__builtin_loongarch_crc_w_d_w",
-    "llvm.loongarch.crc.w.h.w" => "__builtin_loongarch_crc_w_h_w",
-    "llvm.loongarch.crc.w.w.w" => "__builtin_loongarch_crc_w_w_w",
-    "llvm.loongarch.crcc.w.b.w" => "__builtin_loongarch_crcc_w_b_w",
-    "llvm.loongarch.crcc.w.d.w" => "__builtin_loongarch_crcc_w_d_w",
-    "llvm.loongarch.crcc.w.h.w" => "__builtin_loongarch_crcc_w_h_w",
-    "llvm.loongarch.crcc.w.w.w" => "__builtin_loongarch_crcc_w_w_w",
-    "llvm.loongarch.csrrd.d" => "__builtin_loongarch_csrrd_d",
-    "llvm.loongarch.csrrd.w" => "__builtin_loongarch_csrrd_w",
-    "llvm.loongarch.csrwr.d" => "__builtin_loongarch_csrwr_d",
-    "llvm.loongarch.csrwr.w" => "__builtin_loongarch_csrwr_w",
-    "llvm.loongarch.csrxchg.d" => "__builtin_loongarch_csrxchg_d",
-    "llvm.loongarch.csrxchg.w" => "__builtin_loongarch_csrxchg_w",
-    "llvm.loongarch.dbar" => "__builtin_loongarch_dbar",
-    "llvm.loongarch.frecipe.d" => "__builtin_loongarch_frecipe_d",
-    "llvm.loongarch.frecipe.s" => "__builtin_loongarch_frecipe_s",
-    "llvm.loongarch.frsqrte.d" => "__builtin_loongarch_frsqrte_d",
-    "llvm.loongarch.frsqrte.s" => "__builtin_loongarch_frsqrte_s",
-    "llvm.loongarch.ibar" => "__builtin_loongarch_ibar",
-    "llvm.loongarch.iocsrrd.b" => "__builtin_loongarch_iocsrrd_b",
-    "llvm.loongarch.iocsrrd.d" => "__builtin_loongarch_iocsrrd_d",
-    "llvm.loongarch.iocsrrd.h" => "__builtin_loongarch_iocsrrd_h",
-    "llvm.loongarch.iocsrrd.w" => "__builtin_loongarch_iocsrrd_w",
-    "llvm.loongarch.iocsrwr.b" => "__builtin_loongarch_iocsrwr_b",
-    "llvm.loongarch.iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
-    "llvm.loongarch.iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
-    "llvm.loongarch.iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
-    "llvm.loongarch.lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b",
-    "llvm.loongarch.lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h",
-    "llvm.loongarch.lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w",
-    "llvm.loongarch.lasx.vext2xv.du.bu" => "__builtin_lasx_vext2xv_du_bu",
-    "llvm.loongarch.lasx.vext2xv.du.hu" => "__builtin_lasx_vext2xv_du_hu",
-    "llvm.loongarch.lasx.vext2xv.du.wu" => "__builtin_lasx_vext2xv_du_wu",
-    "llvm.loongarch.lasx.vext2xv.h.b" => "__builtin_lasx_vext2xv_h_b",
-    "llvm.loongarch.lasx.vext2xv.hu.bu" => "__builtin_lasx_vext2xv_hu_bu",
-    "llvm.loongarch.lasx.vext2xv.w.b" => "__builtin_lasx_vext2xv_w_b",
-    "llvm.loongarch.lasx.vext2xv.w.h" => "__builtin_lasx_vext2xv_w_h",
-    "llvm.loongarch.lasx.vext2xv.wu.bu" => "__builtin_lasx_vext2xv_wu_bu",
-    "llvm.loongarch.lasx.vext2xv.wu.hu" => "__builtin_lasx_vext2xv_wu_hu",
-    "llvm.loongarch.lasx.xbnz.b" => "__builtin_lasx_xbnz_b",
-    "llvm.loongarch.lasx.xbnz.d" => "__builtin_lasx_xbnz_d",
-    "llvm.loongarch.lasx.xbnz.h" => "__builtin_lasx_xbnz_h",
-    "llvm.loongarch.lasx.xbnz.v" => "__builtin_lasx_xbnz_v",
-    "llvm.loongarch.lasx.xbnz.w" => "__builtin_lasx_xbnz_w",
-    "llvm.loongarch.lasx.xbz.b" => "__builtin_lasx_xbz_b",
-    "llvm.loongarch.lasx.xbz.d" => "__builtin_lasx_xbz_d",
-    "llvm.loongarch.lasx.xbz.h" => "__builtin_lasx_xbz_h",
-    "llvm.loongarch.lasx.xbz.v" => "__builtin_lasx_xbz_v",
-    "llvm.loongarch.lasx.xbz.w" => "__builtin_lasx_xbz_w",
-    "llvm.loongarch.lasx.xvabsd.b" => "__builtin_lasx_xvabsd_b",
-    "llvm.loongarch.lasx.xvabsd.bu" => "__builtin_lasx_xvabsd_bu",
-    "llvm.loongarch.lasx.xvabsd.d" => "__builtin_lasx_xvabsd_d",
-    "llvm.loongarch.lasx.xvabsd.du" => "__builtin_lasx_xvabsd_du",
-    "llvm.loongarch.lasx.xvabsd.h" => "__builtin_lasx_xvabsd_h",
-    "llvm.loongarch.lasx.xvabsd.hu" => "__builtin_lasx_xvabsd_hu",
-    "llvm.loongarch.lasx.xvabsd.w" => "__builtin_lasx_xvabsd_w",
-    "llvm.loongarch.lasx.xvabsd.wu" => "__builtin_lasx_xvabsd_wu",
-    "llvm.loongarch.lasx.xvadd.b" => "__builtin_lasx_xvadd_b",
-    "llvm.loongarch.lasx.xvadd.d" => "__builtin_lasx_xvadd_d",
-    "llvm.loongarch.lasx.xvadd.h" => "__builtin_lasx_xvadd_h",
-    "llvm.loongarch.lasx.xvadd.q" => "__builtin_lasx_xvadd_q",
-    "llvm.loongarch.lasx.xvadd.w" => "__builtin_lasx_xvadd_w",
-    "llvm.loongarch.lasx.xvadda.b" => "__builtin_lasx_xvadda_b",
-    "llvm.loongarch.lasx.xvadda.d" => "__builtin_lasx_xvadda_d",
-    "llvm.loongarch.lasx.xvadda.h" => "__builtin_lasx_xvadda_h",
-    "llvm.loongarch.lasx.xvadda.w" => "__builtin_lasx_xvadda_w",
-    "llvm.loongarch.lasx.xvaddi.bu" => "__builtin_lasx_xvaddi_bu",
-    "llvm.loongarch.lasx.xvaddi.du" => "__builtin_lasx_xvaddi_du",
-    "llvm.loongarch.lasx.xvaddi.hu" => "__builtin_lasx_xvaddi_hu",
-    "llvm.loongarch.lasx.xvaddi.wu" => "__builtin_lasx_xvaddi_wu",
-    "llvm.loongarch.lasx.xvaddwev.d.w" => "__builtin_lasx_xvaddwev_d_w",
-    "llvm.loongarch.lasx.xvaddwev.d.wu" => "__builtin_lasx_xvaddwev_d_wu",
-    "llvm.loongarch.lasx.xvaddwev.d.wu.w" => "__builtin_lasx_xvaddwev_d_wu_w",
-    "llvm.loongarch.lasx.xvaddwev.h.b" => "__builtin_lasx_xvaddwev_h_b",
-    "llvm.loongarch.lasx.xvaddwev.h.bu" => "__builtin_lasx_xvaddwev_h_bu",
-    "llvm.loongarch.lasx.xvaddwev.h.bu.b" => "__builtin_lasx_xvaddwev_h_bu_b",
-    "llvm.loongarch.lasx.xvaddwev.q.d" => "__builtin_lasx_xvaddwev_q_d",
-    "llvm.loongarch.lasx.xvaddwev.q.du" => "__builtin_lasx_xvaddwev_q_du",
-    "llvm.loongarch.lasx.xvaddwev.q.du.d" => "__builtin_lasx_xvaddwev_q_du_d",
-    "llvm.loongarch.lasx.xvaddwev.w.h" => "__builtin_lasx_xvaddwev_w_h",
-    "llvm.loongarch.lasx.xvaddwev.w.hu" => "__builtin_lasx_xvaddwev_w_hu",
-    "llvm.loongarch.lasx.xvaddwev.w.hu.h" => "__builtin_lasx_xvaddwev_w_hu_h",
-    "llvm.loongarch.lasx.xvaddwod.d.w" => "__builtin_lasx_xvaddwod_d_w",
-    "llvm.loongarch.lasx.xvaddwod.d.wu" => "__builtin_lasx_xvaddwod_d_wu",
-    "llvm.loongarch.lasx.xvaddwod.d.wu.w" => "__builtin_lasx_xvaddwod_d_wu_w",
-    "llvm.loongarch.lasx.xvaddwod.h.b" => "__builtin_lasx_xvaddwod_h_b",
-    "llvm.loongarch.lasx.xvaddwod.h.bu" => "__builtin_lasx_xvaddwod_h_bu",
-    "llvm.loongarch.lasx.xvaddwod.h.bu.b" => "__builtin_lasx_xvaddwod_h_bu_b",
-    "llvm.loongarch.lasx.xvaddwod.q.d" => "__builtin_lasx_xvaddwod_q_d",
-    "llvm.loongarch.lasx.xvaddwod.q.du" => "__builtin_lasx_xvaddwod_q_du",
-    "llvm.loongarch.lasx.xvaddwod.q.du.d" => "__builtin_lasx_xvaddwod_q_du_d",
-    "llvm.loongarch.lasx.xvaddwod.w.h" => "__builtin_lasx_xvaddwod_w_h",
-    "llvm.loongarch.lasx.xvaddwod.w.hu" => "__builtin_lasx_xvaddwod_w_hu",
-    "llvm.loongarch.lasx.xvaddwod.w.hu.h" => "__builtin_lasx_xvaddwod_w_hu_h",
-    "llvm.loongarch.lasx.xvand.v" => "__builtin_lasx_xvand_v",
-    "llvm.loongarch.lasx.xvandi.b" => "__builtin_lasx_xvandi_b",
-    "llvm.loongarch.lasx.xvandn.v" => "__builtin_lasx_xvandn_v",
-    "llvm.loongarch.lasx.xvavg.b" => "__builtin_lasx_xvavg_b",
-    "llvm.loongarch.lasx.xvavg.bu" => "__builtin_lasx_xvavg_bu",
-    "llvm.loongarch.lasx.xvavg.d" => "__builtin_lasx_xvavg_d",
-    "llvm.loongarch.lasx.xvavg.du" => "__builtin_lasx_xvavg_du",
-    "llvm.loongarch.lasx.xvavg.h" => "__builtin_lasx_xvavg_h",
-    "llvm.loongarch.lasx.xvavg.hu" => "__builtin_lasx_xvavg_hu",
-    "llvm.loongarch.lasx.xvavg.w" => "__builtin_lasx_xvavg_w",
-    "llvm.loongarch.lasx.xvavg.wu" => "__builtin_lasx_xvavg_wu",
-    "llvm.loongarch.lasx.xvavgr.b" => "__builtin_lasx_xvavgr_b",
-    "llvm.loongarch.lasx.xvavgr.bu" => "__builtin_lasx_xvavgr_bu",
-    "llvm.loongarch.lasx.xvavgr.d" => "__builtin_lasx_xvavgr_d",
-    "llvm.loongarch.lasx.xvavgr.du" => "__builtin_lasx_xvavgr_du",
-    "llvm.loongarch.lasx.xvavgr.h" => "__builtin_lasx_xvavgr_h",
-    "llvm.loongarch.lasx.xvavgr.hu" => "__builtin_lasx_xvavgr_hu",
-    "llvm.loongarch.lasx.xvavgr.w" => "__builtin_lasx_xvavgr_w",
-    "llvm.loongarch.lasx.xvavgr.wu" => "__builtin_lasx_xvavgr_wu",
-    "llvm.loongarch.lasx.xvbitclr.b" => "__builtin_lasx_xvbitclr_b",
-    "llvm.loongarch.lasx.xvbitclr.d" => "__builtin_lasx_xvbitclr_d",
-    "llvm.loongarch.lasx.xvbitclr.h" => "__builtin_lasx_xvbitclr_h",
-    "llvm.loongarch.lasx.xvbitclr.w" => "__builtin_lasx_xvbitclr_w",
-    "llvm.loongarch.lasx.xvbitclri.b" => "__builtin_lasx_xvbitclri_b",
-    "llvm.loongarch.lasx.xvbitclri.d" => "__builtin_lasx_xvbitclri_d",
-    "llvm.loongarch.lasx.xvbitclri.h" => "__builtin_lasx_xvbitclri_h",
-    "llvm.loongarch.lasx.xvbitclri.w" => "__builtin_lasx_xvbitclri_w",
-    "llvm.loongarch.lasx.xvbitrev.b" => "__builtin_lasx_xvbitrev_b",
-    "llvm.loongarch.lasx.xvbitrev.d" => "__builtin_lasx_xvbitrev_d",
-    "llvm.loongarch.lasx.xvbitrev.h" => "__builtin_lasx_xvbitrev_h",
-    "llvm.loongarch.lasx.xvbitrev.w" => "__builtin_lasx_xvbitrev_w",
-    "llvm.loongarch.lasx.xvbitrevi.b" => "__builtin_lasx_xvbitrevi_b",
-    "llvm.loongarch.lasx.xvbitrevi.d" => "__builtin_lasx_xvbitrevi_d",
-    "llvm.loongarch.lasx.xvbitrevi.h" => "__builtin_lasx_xvbitrevi_h",
-    "llvm.loongarch.lasx.xvbitrevi.w" => "__builtin_lasx_xvbitrevi_w",
-    "llvm.loongarch.lasx.xvbitsel.v" => "__builtin_lasx_xvbitsel_v",
-    "llvm.loongarch.lasx.xvbitseli.b" => "__builtin_lasx_xvbitseli_b",
-    "llvm.loongarch.lasx.xvbitset.b" => "__builtin_lasx_xvbitset_b",
-    "llvm.loongarch.lasx.xvbitset.d" => "__builtin_lasx_xvbitset_d",
-    "llvm.loongarch.lasx.xvbitset.h" => "__builtin_lasx_xvbitset_h",
-    "llvm.loongarch.lasx.xvbitset.w" => "__builtin_lasx_xvbitset_w",
-    "llvm.loongarch.lasx.xvbitseti.b" => "__builtin_lasx_xvbitseti_b",
-    "llvm.loongarch.lasx.xvbitseti.d" => "__builtin_lasx_xvbitseti_d",
-    "llvm.loongarch.lasx.xvbitseti.h" => "__builtin_lasx_xvbitseti_h",
-    "llvm.loongarch.lasx.xvbitseti.w" => "__builtin_lasx_xvbitseti_w",
-    "llvm.loongarch.lasx.xvbsll.v" => "__builtin_lasx_xvbsll_v",
-    "llvm.loongarch.lasx.xvbsrl.v" => "__builtin_lasx_xvbsrl_v",
-    "llvm.loongarch.lasx.xvclo.b" => "__builtin_lasx_xvclo_b",
-    "llvm.loongarch.lasx.xvclo.d" => "__builtin_lasx_xvclo_d",
-    "llvm.loongarch.lasx.xvclo.h" => "__builtin_lasx_xvclo_h",
-    "llvm.loongarch.lasx.xvclo.w" => "__builtin_lasx_xvclo_w",
-    "llvm.loongarch.lasx.xvclz.b" => "__builtin_lasx_xvclz_b",
-    "llvm.loongarch.lasx.xvclz.d" => "__builtin_lasx_xvclz_d",
-    "llvm.loongarch.lasx.xvclz.h" => "__builtin_lasx_xvclz_h",
-    "llvm.loongarch.lasx.xvclz.w" => "__builtin_lasx_xvclz_w",
-    "llvm.loongarch.lasx.xvdiv.b" => "__builtin_lasx_xvdiv_b",
-    "llvm.loongarch.lasx.xvdiv.bu" => "__builtin_lasx_xvdiv_bu",
-    "llvm.loongarch.lasx.xvdiv.d" => "__builtin_lasx_xvdiv_d",
-    "llvm.loongarch.lasx.xvdiv.du" => "__builtin_lasx_xvdiv_du",
-    "llvm.loongarch.lasx.xvdiv.h" => "__builtin_lasx_xvdiv_h",
-    "llvm.loongarch.lasx.xvdiv.hu" => "__builtin_lasx_xvdiv_hu",
-    "llvm.loongarch.lasx.xvdiv.w" => "__builtin_lasx_xvdiv_w",
-    "llvm.loongarch.lasx.xvdiv.wu" => "__builtin_lasx_xvdiv_wu",
-    "llvm.loongarch.lasx.xvexth.d.w" => "__builtin_lasx_xvexth_d_w",
-    "llvm.loongarch.lasx.xvexth.du.wu" => "__builtin_lasx_xvexth_du_wu",
-    "llvm.loongarch.lasx.xvexth.h.b" => "__builtin_lasx_xvexth_h_b",
-    "llvm.loongarch.lasx.xvexth.hu.bu" => "__builtin_lasx_xvexth_hu_bu",
-    "llvm.loongarch.lasx.xvexth.q.d" => "__builtin_lasx_xvexth_q_d",
-    "llvm.loongarch.lasx.xvexth.qu.du" => "__builtin_lasx_xvexth_qu_du",
-    "llvm.loongarch.lasx.xvexth.w.h" => "__builtin_lasx_xvexth_w_h",
-    "llvm.loongarch.lasx.xvexth.wu.hu" => "__builtin_lasx_xvexth_wu_hu",
-    "llvm.loongarch.lasx.xvextl.q.d" => "__builtin_lasx_xvextl_q_d",
-    "llvm.loongarch.lasx.xvextl.qu.du" => "__builtin_lasx_xvextl_qu_du",
-    "llvm.loongarch.lasx.xvextrins.b" => "__builtin_lasx_xvextrins_b",
-    "llvm.loongarch.lasx.xvextrins.d" => "__builtin_lasx_xvextrins_d",
-    "llvm.loongarch.lasx.xvextrins.h" => "__builtin_lasx_xvextrins_h",
-    "llvm.loongarch.lasx.xvextrins.w" => "__builtin_lasx_xvextrins_w",
-    "llvm.loongarch.lasx.xvfadd.d" => "__builtin_lasx_xvfadd_d",
-    "llvm.loongarch.lasx.xvfadd.s" => "__builtin_lasx_xvfadd_s",
-    "llvm.loongarch.lasx.xvfclass.d" => "__builtin_lasx_xvfclass_d",
-    "llvm.loongarch.lasx.xvfclass.s" => "__builtin_lasx_xvfclass_s",
-    "llvm.loongarch.lasx.xvfcmp.caf.d" => "__builtin_lasx_xvfcmp_caf_d",
-    "llvm.loongarch.lasx.xvfcmp.caf.s" => "__builtin_lasx_xvfcmp_caf_s",
-    "llvm.loongarch.lasx.xvfcmp.ceq.d" => "__builtin_lasx_xvfcmp_ceq_d",
-    "llvm.loongarch.lasx.xvfcmp.ceq.s" => "__builtin_lasx_xvfcmp_ceq_s",
-    "llvm.loongarch.lasx.xvfcmp.cle.d" => "__builtin_lasx_xvfcmp_cle_d",
-    "llvm.loongarch.lasx.xvfcmp.cle.s" => "__builtin_lasx_xvfcmp_cle_s",
-    "llvm.loongarch.lasx.xvfcmp.clt.d" => "__builtin_lasx_xvfcmp_clt_d",
-    "llvm.loongarch.lasx.xvfcmp.clt.s" => "__builtin_lasx_xvfcmp_clt_s",
-    "llvm.loongarch.lasx.xvfcmp.cne.d" => "__builtin_lasx_xvfcmp_cne_d",
-    "llvm.loongarch.lasx.xvfcmp.cne.s" => "__builtin_lasx_xvfcmp_cne_s",
-    "llvm.loongarch.lasx.xvfcmp.cor.d" => "__builtin_lasx_xvfcmp_cor_d",
-    "llvm.loongarch.lasx.xvfcmp.cor.s" => "__builtin_lasx_xvfcmp_cor_s",
-    "llvm.loongarch.lasx.xvfcmp.cueq.d" => "__builtin_lasx_xvfcmp_cueq_d",
-    "llvm.loongarch.lasx.xvfcmp.cueq.s" => "__builtin_lasx_xvfcmp_cueq_s",
-    "llvm.loongarch.lasx.xvfcmp.cule.d" => "__builtin_lasx_xvfcmp_cule_d",
-    "llvm.loongarch.lasx.xvfcmp.cule.s" => "__builtin_lasx_xvfcmp_cule_s",
-    "llvm.loongarch.lasx.xvfcmp.cult.d" => "__builtin_lasx_xvfcmp_cult_d",
-    "llvm.loongarch.lasx.xvfcmp.cult.s" => "__builtin_lasx_xvfcmp_cult_s",
-    "llvm.loongarch.lasx.xvfcmp.cun.d" => "__builtin_lasx_xvfcmp_cun_d",
-    "llvm.loongarch.lasx.xvfcmp.cun.s" => "__builtin_lasx_xvfcmp_cun_s",
-    "llvm.loongarch.lasx.xvfcmp.cune.d" => "__builtin_lasx_xvfcmp_cune_d",
-    "llvm.loongarch.lasx.xvfcmp.cune.s" => "__builtin_lasx_xvfcmp_cune_s",
-    "llvm.loongarch.lasx.xvfcmp.saf.d" => "__builtin_lasx_xvfcmp_saf_d",
-    "llvm.loongarch.lasx.xvfcmp.saf.s" => "__builtin_lasx_xvfcmp_saf_s",
-    "llvm.loongarch.lasx.xvfcmp.seq.d" => "__builtin_lasx_xvfcmp_seq_d",
-    "llvm.loongarch.lasx.xvfcmp.seq.s" => "__builtin_lasx_xvfcmp_seq_s",
-    "llvm.loongarch.lasx.xvfcmp.sle.d" => "__builtin_lasx_xvfcmp_sle_d",
-    "llvm.loongarch.lasx.xvfcmp.sle.s" => "__builtin_lasx_xvfcmp_sle_s",
-    "llvm.loongarch.lasx.xvfcmp.slt.d" => "__builtin_lasx_xvfcmp_slt_d",
-    "llvm.loongarch.lasx.xvfcmp.slt.s" => "__builtin_lasx_xvfcmp_slt_s",
-    "llvm.loongarch.lasx.xvfcmp.sne.d" => "__builtin_lasx_xvfcmp_sne_d",
-    "llvm.loongarch.lasx.xvfcmp.sne.s" => "__builtin_lasx_xvfcmp_sne_s",
-    "llvm.loongarch.lasx.xvfcmp.sor.d" => "__builtin_lasx_xvfcmp_sor_d",
-    "llvm.loongarch.lasx.xvfcmp.sor.s" => "__builtin_lasx_xvfcmp_sor_s",
-    "llvm.loongarch.lasx.xvfcmp.sueq.d" => "__builtin_lasx_xvfcmp_sueq_d",
-    "llvm.loongarch.lasx.xvfcmp.sueq.s" => "__builtin_lasx_xvfcmp_sueq_s",
-    "llvm.loongarch.lasx.xvfcmp.sule.d" => "__builtin_lasx_xvfcmp_sule_d",
-    "llvm.loongarch.lasx.xvfcmp.sule.s" => "__builtin_lasx_xvfcmp_sule_s",
-    "llvm.loongarch.lasx.xvfcmp.sult.d" => "__builtin_lasx_xvfcmp_sult_d",
-    "llvm.loongarch.lasx.xvfcmp.sult.s" => "__builtin_lasx_xvfcmp_sult_s",
-    "llvm.loongarch.lasx.xvfcmp.sun.d" => "__builtin_lasx_xvfcmp_sun_d",
-    "llvm.loongarch.lasx.xvfcmp.sun.s" => "__builtin_lasx_xvfcmp_sun_s",
-    "llvm.loongarch.lasx.xvfcmp.sune.d" => "__builtin_lasx_xvfcmp_sune_d",
-    "llvm.loongarch.lasx.xvfcmp.sune.s" => "__builtin_lasx_xvfcmp_sune_s",
-    "llvm.loongarch.lasx.xvfcvt.h.s" => "__builtin_lasx_xvfcvt_h_s",
-    "llvm.loongarch.lasx.xvfcvt.s.d" => "__builtin_lasx_xvfcvt_s_d",
-    "llvm.loongarch.lasx.xvfcvth.d.s" => "__builtin_lasx_xvfcvth_d_s",
-    "llvm.loongarch.lasx.xvfcvth.s.h" => "__builtin_lasx_xvfcvth_s_h",
-    "llvm.loongarch.lasx.xvfcvtl.d.s" => "__builtin_lasx_xvfcvtl_d_s",
-    "llvm.loongarch.lasx.xvfcvtl.s.h" => "__builtin_lasx_xvfcvtl_s_h",
-    "llvm.loongarch.lasx.xvfdiv.d" => "__builtin_lasx_xvfdiv_d",
-    "llvm.loongarch.lasx.xvfdiv.s" => "__builtin_lasx_xvfdiv_s",
-    "llvm.loongarch.lasx.xvffint.d.l" => "__builtin_lasx_xvffint_d_l",
-    "llvm.loongarch.lasx.xvffint.d.lu" => "__builtin_lasx_xvffint_d_lu",
-    "llvm.loongarch.lasx.xvffint.s.l" => "__builtin_lasx_xvffint_s_l",
-    "llvm.loongarch.lasx.xvffint.s.w" => "__builtin_lasx_xvffint_s_w",
-    "llvm.loongarch.lasx.xvffint.s.wu" => "__builtin_lasx_xvffint_s_wu",
-    "llvm.loongarch.lasx.xvffinth.d.w" => "__builtin_lasx_xvffinth_d_w",
-    "llvm.loongarch.lasx.xvffintl.d.w" => "__builtin_lasx_xvffintl_d_w",
-    "llvm.loongarch.lasx.xvflogb.d" => "__builtin_lasx_xvflogb_d",
-    "llvm.loongarch.lasx.xvflogb.s" => "__builtin_lasx_xvflogb_s",
-    "llvm.loongarch.lasx.xvfmadd.d" => "__builtin_lasx_xvfmadd_d",
-    "llvm.loongarch.lasx.xvfmadd.s" => "__builtin_lasx_xvfmadd_s",
-    "llvm.loongarch.lasx.xvfmax.d" => "__builtin_lasx_xvfmax_d",
-    "llvm.loongarch.lasx.xvfmax.s" => "__builtin_lasx_xvfmax_s",
-    "llvm.loongarch.lasx.xvfmaxa.d" => "__builtin_lasx_xvfmaxa_d",
-    "llvm.loongarch.lasx.xvfmaxa.s" => "__builtin_lasx_xvfmaxa_s",
-    "llvm.loongarch.lasx.xvfmin.d" => "__builtin_lasx_xvfmin_d",
-    "llvm.loongarch.lasx.xvfmin.s" => "__builtin_lasx_xvfmin_s",
-    "llvm.loongarch.lasx.xvfmina.d" => "__builtin_lasx_xvfmina_d",
-    "llvm.loongarch.lasx.xvfmina.s" => "__builtin_lasx_xvfmina_s",
-    "llvm.loongarch.lasx.xvfmsub.d" => "__builtin_lasx_xvfmsub_d",
-    "llvm.loongarch.lasx.xvfmsub.s" => "__builtin_lasx_xvfmsub_s",
-    "llvm.loongarch.lasx.xvfmul.d" => "__builtin_lasx_xvfmul_d",
-    "llvm.loongarch.lasx.xvfmul.s" => "__builtin_lasx_xvfmul_s",
-    "llvm.loongarch.lasx.xvfnmadd.d" => "__builtin_lasx_xvfnmadd_d",
-    "llvm.loongarch.lasx.xvfnmadd.s" => "__builtin_lasx_xvfnmadd_s",
-    "llvm.loongarch.lasx.xvfnmsub.d" => "__builtin_lasx_xvfnmsub_d",
-    "llvm.loongarch.lasx.xvfnmsub.s" => "__builtin_lasx_xvfnmsub_s",
-    "llvm.loongarch.lasx.xvfrecip.d" => "__builtin_lasx_xvfrecip_d",
-    "llvm.loongarch.lasx.xvfrecip.s" => "__builtin_lasx_xvfrecip_s",
-    "llvm.loongarch.lasx.xvfrecipe.d" => "__builtin_lasx_xvfrecipe_d",
-    "llvm.loongarch.lasx.xvfrecipe.s" => "__builtin_lasx_xvfrecipe_s",
-    "llvm.loongarch.lasx.xvfrint.d" => "__builtin_lasx_xvfrint_d",
-    "llvm.loongarch.lasx.xvfrint.s" => "__builtin_lasx_xvfrint_s",
-    "llvm.loongarch.lasx.xvfrintrm.d" => "__builtin_lasx_xvfrintrm_d",
-    "llvm.loongarch.lasx.xvfrintrm.s" => "__builtin_lasx_xvfrintrm_s",
-    "llvm.loongarch.lasx.xvfrintrne.d" => "__builtin_lasx_xvfrintrne_d",
-    "llvm.loongarch.lasx.xvfrintrne.s" => "__builtin_lasx_xvfrintrne_s",
-    "llvm.loongarch.lasx.xvfrintrp.d" => "__builtin_lasx_xvfrintrp_d",
-    "llvm.loongarch.lasx.xvfrintrp.s" => "__builtin_lasx_xvfrintrp_s",
-    "llvm.loongarch.lasx.xvfrintrz.d" => "__builtin_lasx_xvfrintrz_d",
-    "llvm.loongarch.lasx.xvfrintrz.s" => "__builtin_lasx_xvfrintrz_s",
-    "llvm.loongarch.lasx.xvfrsqrt.d" => "__builtin_lasx_xvfrsqrt_d",
-    "llvm.loongarch.lasx.xvfrsqrt.s" => "__builtin_lasx_xvfrsqrt_s",
-    "llvm.loongarch.lasx.xvfrsqrte.d" => "__builtin_lasx_xvfrsqrte_d",
-    "llvm.loongarch.lasx.xvfrsqrte.s" => "__builtin_lasx_xvfrsqrte_s",
-    "llvm.loongarch.lasx.xvfrstp.b" => "__builtin_lasx_xvfrstp_b",
-    "llvm.loongarch.lasx.xvfrstp.h" => "__builtin_lasx_xvfrstp_h",
-    "llvm.loongarch.lasx.xvfrstpi.b" => "__builtin_lasx_xvfrstpi_b",
-    "llvm.loongarch.lasx.xvfrstpi.h" => "__builtin_lasx_xvfrstpi_h",
-    "llvm.loongarch.lasx.xvfsqrt.d" => "__builtin_lasx_xvfsqrt_d",
-    "llvm.loongarch.lasx.xvfsqrt.s" => "__builtin_lasx_xvfsqrt_s",
-    "llvm.loongarch.lasx.xvfsub.d" => "__builtin_lasx_xvfsub_d",
-    "llvm.loongarch.lasx.xvfsub.s" => "__builtin_lasx_xvfsub_s",
-    "llvm.loongarch.lasx.xvftint.l.d" => "__builtin_lasx_xvftint_l_d",
-    "llvm.loongarch.lasx.xvftint.lu.d" => "__builtin_lasx_xvftint_lu_d",
-    "llvm.loongarch.lasx.xvftint.w.d" => "__builtin_lasx_xvftint_w_d",
-    "llvm.loongarch.lasx.xvftint.w.s" => "__builtin_lasx_xvftint_w_s",
-    "llvm.loongarch.lasx.xvftint.wu.s" => "__builtin_lasx_xvftint_wu_s",
-    "llvm.loongarch.lasx.xvftinth.l.s" => "__builtin_lasx_xvftinth_l_s",
-    "llvm.loongarch.lasx.xvftintl.l.s" => "__builtin_lasx_xvftintl_l_s",
-    "llvm.loongarch.lasx.xvftintrm.l.d" => "__builtin_lasx_xvftintrm_l_d",
-    "llvm.loongarch.lasx.xvftintrm.w.d" => "__builtin_lasx_xvftintrm_w_d",
-    "llvm.loongarch.lasx.xvftintrm.w.s" => "__builtin_lasx_xvftintrm_w_s",
-    "llvm.loongarch.lasx.xvftintrmh.l.s" => "__builtin_lasx_xvftintrmh_l_s",
-    "llvm.loongarch.lasx.xvftintrml.l.s" => "__builtin_lasx_xvftintrml_l_s",
-    "llvm.loongarch.lasx.xvftintrne.l.d" => "__builtin_lasx_xvftintrne_l_d",
-    "llvm.loongarch.lasx.xvftintrne.w.d" => "__builtin_lasx_xvftintrne_w_d",
-    "llvm.loongarch.lasx.xvftintrne.w.s" => "__builtin_lasx_xvftintrne_w_s",
-    "llvm.loongarch.lasx.xvftintrneh.l.s" => "__builtin_lasx_xvftintrneh_l_s",
-    "llvm.loongarch.lasx.xvftintrnel.l.s" => "__builtin_lasx_xvftintrnel_l_s",
-    "llvm.loongarch.lasx.xvftintrp.l.d" => "__builtin_lasx_xvftintrp_l_d",
-    "llvm.loongarch.lasx.xvftintrp.w.d" => "__builtin_lasx_xvftintrp_w_d",
-    "llvm.loongarch.lasx.xvftintrp.w.s" => "__builtin_lasx_xvftintrp_w_s",
-    "llvm.loongarch.lasx.xvftintrph.l.s" => "__builtin_lasx_xvftintrph_l_s",
-    "llvm.loongarch.lasx.xvftintrpl.l.s" => "__builtin_lasx_xvftintrpl_l_s",
-    "llvm.loongarch.lasx.xvftintrz.l.d" => "__builtin_lasx_xvftintrz_l_d",
-    "llvm.loongarch.lasx.xvftintrz.lu.d" => "__builtin_lasx_xvftintrz_lu_d",
-    "llvm.loongarch.lasx.xvftintrz.w.d" => "__builtin_lasx_xvftintrz_w_d",
-    "llvm.loongarch.lasx.xvftintrz.w.s" => "__builtin_lasx_xvftintrz_w_s",
-    "llvm.loongarch.lasx.xvftintrz.wu.s" => "__builtin_lasx_xvftintrz_wu_s",
-    "llvm.loongarch.lasx.xvftintrzh.l.s" => "__builtin_lasx_xvftintrzh_l_s",
-    "llvm.loongarch.lasx.xvftintrzl.l.s" => "__builtin_lasx_xvftintrzl_l_s",
-    "llvm.loongarch.lasx.xvhaddw.d.w" => "__builtin_lasx_xvhaddw_d_w",
-    "llvm.loongarch.lasx.xvhaddw.du.wu" => "__builtin_lasx_xvhaddw_du_wu",
-    "llvm.loongarch.lasx.xvhaddw.h.b" => "__builtin_lasx_xvhaddw_h_b",
-    "llvm.loongarch.lasx.xvhaddw.hu.bu" => "__builtin_lasx_xvhaddw_hu_bu",
-    "llvm.loongarch.lasx.xvhaddw.q.d" => "__builtin_lasx_xvhaddw_q_d",
-    "llvm.loongarch.lasx.xvhaddw.qu.du" => "__builtin_lasx_xvhaddw_qu_du",
-    "llvm.loongarch.lasx.xvhaddw.w.h" => "__builtin_lasx_xvhaddw_w_h",
-    "llvm.loongarch.lasx.xvhaddw.wu.hu" => "__builtin_lasx_xvhaddw_wu_hu",
-    "llvm.loongarch.lasx.xvhsubw.d.w" => "__builtin_lasx_xvhsubw_d_w",
-    "llvm.loongarch.lasx.xvhsubw.du.wu" => "__builtin_lasx_xvhsubw_du_wu",
-    "llvm.loongarch.lasx.xvhsubw.h.b" => "__builtin_lasx_xvhsubw_h_b",
-    "llvm.loongarch.lasx.xvhsubw.hu.bu" => "__builtin_lasx_xvhsubw_hu_bu",
-    "llvm.loongarch.lasx.xvhsubw.q.d" => "__builtin_lasx_xvhsubw_q_d",
-    "llvm.loongarch.lasx.xvhsubw.qu.du" => "__builtin_lasx_xvhsubw_qu_du",
-    "llvm.loongarch.lasx.xvhsubw.w.h" => "__builtin_lasx_xvhsubw_w_h",
-    "llvm.loongarch.lasx.xvhsubw.wu.hu" => "__builtin_lasx_xvhsubw_wu_hu",
-    "llvm.loongarch.lasx.xvilvh.b" => "__builtin_lasx_xvilvh_b",
-    "llvm.loongarch.lasx.xvilvh.d" => "__builtin_lasx_xvilvh_d",
-    "llvm.loongarch.lasx.xvilvh.h" => "__builtin_lasx_xvilvh_h",
-    "llvm.loongarch.lasx.xvilvh.w" => "__builtin_lasx_xvilvh_w",
-    "llvm.loongarch.lasx.xvilvl.b" => "__builtin_lasx_xvilvl_b",
-    "llvm.loongarch.lasx.xvilvl.d" => "__builtin_lasx_xvilvl_d",
-    "llvm.loongarch.lasx.xvilvl.h" => "__builtin_lasx_xvilvl_h",
-    "llvm.loongarch.lasx.xvilvl.w" => "__builtin_lasx_xvilvl_w",
-    "llvm.loongarch.lasx.xvinsgr2vr.d" => "__builtin_lasx_xvinsgr2vr_d",
-    "llvm.loongarch.lasx.xvinsgr2vr.w" => "__builtin_lasx_xvinsgr2vr_w",
-    "llvm.loongarch.lasx.xvinsve0.d" => "__builtin_lasx_xvinsve0_d",
-    "llvm.loongarch.lasx.xvinsve0.w" => "__builtin_lasx_xvinsve0_w",
-    "llvm.loongarch.lasx.xvld" => "__builtin_lasx_xvld",
-    "llvm.loongarch.lasx.xvldi" => "__builtin_lasx_xvldi",
-    "llvm.loongarch.lasx.xvldrepl.b" => "__builtin_lasx_xvldrepl_b",
-    "llvm.loongarch.lasx.xvldrepl.d" => "__builtin_lasx_xvldrepl_d",
-    "llvm.loongarch.lasx.xvldrepl.h" => "__builtin_lasx_xvldrepl_h",
-    "llvm.loongarch.lasx.xvldrepl.w" => "__builtin_lasx_xvldrepl_w",
-    "llvm.loongarch.lasx.xvldx" => "__builtin_lasx_xvldx",
-    "llvm.loongarch.lasx.xvmadd.b" => "__builtin_lasx_xvmadd_b",
-    "llvm.loongarch.lasx.xvmadd.d" => "__builtin_lasx_xvmadd_d",
-    "llvm.loongarch.lasx.xvmadd.h" => "__builtin_lasx_xvmadd_h",
-    "llvm.loongarch.lasx.xvmadd.w" => "__builtin_lasx_xvmadd_w",
-    "llvm.loongarch.lasx.xvmaddwev.d.w" => "__builtin_lasx_xvmaddwev_d_w",
-    "llvm.loongarch.lasx.xvmaddwev.d.wu" => "__builtin_lasx_xvmaddwev_d_wu",
-    "llvm.loongarch.lasx.xvmaddwev.d.wu.w" => "__builtin_lasx_xvmaddwev_d_wu_w",
-    "llvm.loongarch.lasx.xvmaddwev.h.b" => "__builtin_lasx_xvmaddwev_h_b",
-    "llvm.loongarch.lasx.xvmaddwev.h.bu" => "__builtin_lasx_xvmaddwev_h_bu",
-    "llvm.loongarch.lasx.xvmaddwev.h.bu.b" => "__builtin_lasx_xvmaddwev_h_bu_b",
-    "llvm.loongarch.lasx.xvmaddwev.q.d" => "__builtin_lasx_xvmaddwev_q_d",
-    "llvm.loongarch.lasx.xvmaddwev.q.du" => "__builtin_lasx_xvmaddwev_q_du",
-    "llvm.loongarch.lasx.xvmaddwev.q.du.d" => "__builtin_lasx_xvmaddwev_q_du_d",
-    "llvm.loongarch.lasx.xvmaddwev.w.h" => "__builtin_lasx_xvmaddwev_w_h",
-    "llvm.loongarch.lasx.xvmaddwev.w.hu" => "__builtin_lasx_xvmaddwev_w_hu",
-    "llvm.loongarch.lasx.xvmaddwev.w.hu.h" => "__builtin_lasx_xvmaddwev_w_hu_h",
-    "llvm.loongarch.lasx.xvmaddwod.d.w" => "__builtin_lasx_xvmaddwod_d_w",
-    "llvm.loongarch.lasx.xvmaddwod.d.wu" => "__builtin_lasx_xvmaddwod_d_wu",
-    "llvm.loongarch.lasx.xvmaddwod.d.wu.w" => "__builtin_lasx_xvmaddwod_d_wu_w",
-    "llvm.loongarch.lasx.xvmaddwod.h.b" => "__builtin_lasx_xvmaddwod_h_b",
-    "llvm.loongarch.lasx.xvmaddwod.h.bu" => "__builtin_lasx_xvmaddwod_h_bu",
-    "llvm.loongarch.lasx.xvmaddwod.h.bu.b" => "__builtin_lasx_xvmaddwod_h_bu_b",
-    "llvm.loongarch.lasx.xvmaddwod.q.d" => "__builtin_lasx_xvmaddwod_q_d",
-    "llvm.loongarch.lasx.xvmaddwod.q.du" => "__builtin_lasx_xvmaddwod_q_du",
-    "llvm.loongarch.lasx.xvmaddwod.q.du.d" => "__builtin_lasx_xvmaddwod_q_du_d",
-    "llvm.loongarch.lasx.xvmaddwod.w.h" => "__builtin_lasx_xvmaddwod_w_h",
-    "llvm.loongarch.lasx.xvmaddwod.w.hu" => "__builtin_lasx_xvmaddwod_w_hu",
-    "llvm.loongarch.lasx.xvmaddwod.w.hu.h" => "__builtin_lasx_xvmaddwod_w_hu_h",
-    "llvm.loongarch.lasx.xvmax.b" => "__builtin_lasx_xvmax_b",
-    "llvm.loongarch.lasx.xvmax.bu" => "__builtin_lasx_xvmax_bu",
-    "llvm.loongarch.lasx.xvmax.d" => "__builtin_lasx_xvmax_d",
-    "llvm.loongarch.lasx.xvmax.du" => "__builtin_lasx_xvmax_du",
-    "llvm.loongarch.lasx.xvmax.h" => "__builtin_lasx_xvmax_h",
-    "llvm.loongarch.lasx.xvmax.hu" => "__builtin_lasx_xvmax_hu",
-    "llvm.loongarch.lasx.xvmax.w" => "__builtin_lasx_xvmax_w",
-    "llvm.loongarch.lasx.xvmax.wu" => "__builtin_lasx_xvmax_wu",
-    "llvm.loongarch.lasx.xvmaxi.b" => "__builtin_lasx_xvmaxi_b",
-    "llvm.loongarch.lasx.xvmaxi.bu" => "__builtin_lasx_xvmaxi_bu",
-    "llvm.loongarch.lasx.xvmaxi.d" => "__builtin_lasx_xvmaxi_d",
-    "llvm.loongarch.lasx.xvmaxi.du" => "__builtin_lasx_xvmaxi_du",
-    "llvm.loongarch.lasx.xvmaxi.h" => "__builtin_lasx_xvmaxi_h",
-    "llvm.loongarch.lasx.xvmaxi.hu" => "__builtin_lasx_xvmaxi_hu",
-    "llvm.loongarch.lasx.xvmaxi.w" => "__builtin_lasx_xvmaxi_w",
-    "llvm.loongarch.lasx.xvmaxi.wu" => "__builtin_lasx_xvmaxi_wu",
-    "llvm.loongarch.lasx.xvmin.b" => "__builtin_lasx_xvmin_b",
-    "llvm.loongarch.lasx.xvmin.bu" => "__builtin_lasx_xvmin_bu",
-    "llvm.loongarch.lasx.xvmin.d" => "__builtin_lasx_xvmin_d",
-    "llvm.loongarch.lasx.xvmin.du" => "__builtin_lasx_xvmin_du",
-    "llvm.loongarch.lasx.xvmin.h" => "__builtin_lasx_xvmin_h",
-    "llvm.loongarch.lasx.xvmin.hu" => "__builtin_lasx_xvmin_hu",
-    "llvm.loongarch.lasx.xvmin.w" => "__builtin_lasx_xvmin_w",
-    "llvm.loongarch.lasx.xvmin.wu" => "__builtin_lasx_xvmin_wu",
-    "llvm.loongarch.lasx.xvmini.b" => "__builtin_lasx_xvmini_b",
-    "llvm.loongarch.lasx.xvmini.bu" => "__builtin_lasx_xvmini_bu",
-    "llvm.loongarch.lasx.xvmini.d" => "__builtin_lasx_xvmini_d",
-    "llvm.loongarch.lasx.xvmini.du" => "__builtin_lasx_xvmini_du",
-    "llvm.loongarch.lasx.xvmini.h" => "__builtin_lasx_xvmini_h",
-    "llvm.loongarch.lasx.xvmini.hu" => "__builtin_lasx_xvmini_hu",
-    "llvm.loongarch.lasx.xvmini.w" => "__builtin_lasx_xvmini_w",
-    "llvm.loongarch.lasx.xvmini.wu" => "__builtin_lasx_xvmini_wu",
-    "llvm.loongarch.lasx.xvmod.b" => "__builtin_lasx_xvmod_b",
-    "llvm.loongarch.lasx.xvmod.bu" => "__builtin_lasx_xvmod_bu",
-    "llvm.loongarch.lasx.xvmod.d" => "__builtin_lasx_xvmod_d",
-    "llvm.loongarch.lasx.xvmod.du" => "__builtin_lasx_xvmod_du",
-    "llvm.loongarch.lasx.xvmod.h" => "__builtin_lasx_xvmod_h",
-    "llvm.loongarch.lasx.xvmod.hu" => "__builtin_lasx_xvmod_hu",
-    "llvm.loongarch.lasx.xvmod.w" => "__builtin_lasx_xvmod_w",
-    "llvm.loongarch.lasx.xvmod.wu" => "__builtin_lasx_xvmod_wu",
-    "llvm.loongarch.lasx.xvmskgez.b" => "__builtin_lasx_xvmskgez_b",
-    "llvm.loongarch.lasx.xvmskltz.b" => "__builtin_lasx_xvmskltz_b",
-    "llvm.loongarch.lasx.xvmskltz.d" => "__builtin_lasx_xvmskltz_d",
-    "llvm.loongarch.lasx.xvmskltz.h" => "__builtin_lasx_xvmskltz_h",
-    "llvm.loongarch.lasx.xvmskltz.w" => "__builtin_lasx_xvmskltz_w",
-    "llvm.loongarch.lasx.xvmsknz.b" => "__builtin_lasx_xvmsknz_b",
-    "llvm.loongarch.lasx.xvmsub.b" => "__builtin_lasx_xvmsub_b",
-    "llvm.loongarch.lasx.xvmsub.d" => "__builtin_lasx_xvmsub_d",
-    "llvm.loongarch.lasx.xvmsub.h" => "__builtin_lasx_xvmsub_h",
-    "llvm.loongarch.lasx.xvmsub.w" => "__builtin_lasx_xvmsub_w",
-    "llvm.loongarch.lasx.xvmuh.b" => "__builtin_lasx_xvmuh_b",
-    "llvm.loongarch.lasx.xvmuh.bu" => "__builtin_lasx_xvmuh_bu",
-    "llvm.loongarch.lasx.xvmuh.d" => "__builtin_lasx_xvmuh_d",
-    "llvm.loongarch.lasx.xvmuh.du" => "__builtin_lasx_xvmuh_du",
-    "llvm.loongarch.lasx.xvmuh.h" => "__builtin_lasx_xvmuh_h",
-    "llvm.loongarch.lasx.xvmuh.hu" => "__builtin_lasx_xvmuh_hu",
-    "llvm.loongarch.lasx.xvmuh.w" => "__builtin_lasx_xvmuh_w",
-    "llvm.loongarch.lasx.xvmuh.wu" => "__builtin_lasx_xvmuh_wu",
-    "llvm.loongarch.lasx.xvmul.b" => "__builtin_lasx_xvmul_b",
-    "llvm.loongarch.lasx.xvmul.d" => "__builtin_lasx_xvmul_d",
-    "llvm.loongarch.lasx.xvmul.h" => "__builtin_lasx_xvmul_h",
-    "llvm.loongarch.lasx.xvmul.w" => "__builtin_lasx_xvmul_w",
-    "llvm.loongarch.lasx.xvmulwev.d.w" => "__builtin_lasx_xvmulwev_d_w",
-    "llvm.loongarch.lasx.xvmulwev.d.wu" => "__builtin_lasx_xvmulwev_d_wu",
-    "llvm.loongarch.lasx.xvmulwev.d.wu.w" => "__builtin_lasx_xvmulwev_d_wu_w",
-    "llvm.loongarch.lasx.xvmulwev.h.b" => "__builtin_lasx_xvmulwev_h_b",
-    "llvm.loongarch.lasx.xvmulwev.h.bu" => "__builtin_lasx_xvmulwev_h_bu",
-    "llvm.loongarch.lasx.xvmulwev.h.bu.b" => "__builtin_lasx_xvmulwev_h_bu_b",
-    "llvm.loongarch.lasx.xvmulwev.q.d" => "__builtin_lasx_xvmulwev_q_d",
-    "llvm.loongarch.lasx.xvmulwev.q.du" => "__builtin_lasx_xvmulwev_q_du",
-    "llvm.loongarch.lasx.xvmulwev.q.du.d" => "__builtin_lasx_xvmulwev_q_du_d",
-    "llvm.loongarch.lasx.xvmulwev.w.h" => "__builtin_lasx_xvmulwev_w_h",
-    "llvm.loongarch.lasx.xvmulwev.w.hu" => "__builtin_lasx_xvmulwev_w_hu",
-    "llvm.loongarch.lasx.xvmulwev.w.hu.h" => "__builtin_lasx_xvmulwev_w_hu_h",
-    "llvm.loongarch.lasx.xvmulwod.d.w" => "__builtin_lasx_xvmulwod_d_w",
-    "llvm.loongarch.lasx.xvmulwod.d.wu" => "__builtin_lasx_xvmulwod_d_wu",
-    "llvm.loongarch.lasx.xvmulwod.d.wu.w" => "__builtin_lasx_xvmulwod_d_wu_w",
-    "llvm.loongarch.lasx.xvmulwod.h.b" => "__builtin_lasx_xvmulwod_h_b",
-    "llvm.loongarch.lasx.xvmulwod.h.bu" => "__builtin_lasx_xvmulwod_h_bu",
-    "llvm.loongarch.lasx.xvmulwod.h.bu.b" => "__builtin_lasx_xvmulwod_h_bu_b",
-    "llvm.loongarch.lasx.xvmulwod.q.d" => "__builtin_lasx_xvmulwod_q_d",
-    "llvm.loongarch.lasx.xvmulwod.q.du" => "__builtin_lasx_xvmulwod_q_du",
-    "llvm.loongarch.lasx.xvmulwod.q.du.d" => "__builtin_lasx_xvmulwod_q_du_d",
-    "llvm.loongarch.lasx.xvmulwod.w.h" => "__builtin_lasx_xvmulwod_w_h",
-    "llvm.loongarch.lasx.xvmulwod.w.hu" => "__builtin_lasx_xvmulwod_w_hu",
-    "llvm.loongarch.lasx.xvmulwod.w.hu.h" => "__builtin_lasx_xvmulwod_w_hu_h",
-    "llvm.loongarch.lasx.xvneg.b" => "__builtin_lasx_xvneg_b",
-    "llvm.loongarch.lasx.xvneg.d" => "__builtin_lasx_xvneg_d",
-    "llvm.loongarch.lasx.xvneg.h" => "__builtin_lasx_xvneg_h",
-    "llvm.loongarch.lasx.xvneg.w" => "__builtin_lasx_xvneg_w",
-    "llvm.loongarch.lasx.xvnor.v" => "__builtin_lasx_xvnor_v",
-    "llvm.loongarch.lasx.xvnori.b" => "__builtin_lasx_xvnori_b",
-    "llvm.loongarch.lasx.xvor.v" => "__builtin_lasx_xvor_v",
-    "llvm.loongarch.lasx.xvori.b" => "__builtin_lasx_xvori_b",
-    "llvm.loongarch.lasx.xvorn.v" => "__builtin_lasx_xvorn_v",
-    "llvm.loongarch.lasx.xvpackev.b" => "__builtin_lasx_xvpackev_b",
-    "llvm.loongarch.lasx.xvpackev.d" => "__builtin_lasx_xvpackev_d",
-    "llvm.loongarch.lasx.xvpackev.h" => "__builtin_lasx_xvpackev_h",
-    "llvm.loongarch.lasx.xvpackev.w" => "__builtin_lasx_xvpackev_w",
-    "llvm.loongarch.lasx.xvpackod.b" => "__builtin_lasx_xvpackod_b",
-    "llvm.loongarch.lasx.xvpackod.d" => "__builtin_lasx_xvpackod_d",
-    "llvm.loongarch.lasx.xvpackod.h" => "__builtin_lasx_xvpackod_h",
-    "llvm.loongarch.lasx.xvpackod.w" => "__builtin_lasx_xvpackod_w",
-    "llvm.loongarch.lasx.xvpcnt.b" => "__builtin_lasx_xvpcnt_b",
-    "llvm.loongarch.lasx.xvpcnt.d" => "__builtin_lasx_xvpcnt_d",
-    "llvm.loongarch.lasx.xvpcnt.h" => "__builtin_lasx_xvpcnt_h",
-    "llvm.loongarch.lasx.xvpcnt.w" => "__builtin_lasx_xvpcnt_w",
-    "llvm.loongarch.lasx.xvperm.w" => "__builtin_lasx_xvperm_w",
-    "llvm.loongarch.lasx.xvpermi.d" => "__builtin_lasx_xvpermi_d",
-    "llvm.loongarch.lasx.xvpermi.q" => "__builtin_lasx_xvpermi_q",
-    "llvm.loongarch.lasx.xvpermi.w" => "__builtin_lasx_xvpermi_w",
-    "llvm.loongarch.lasx.xvpickev.b" => "__builtin_lasx_xvpickev_b",
-    "llvm.loongarch.lasx.xvpickev.d" => "__builtin_lasx_xvpickev_d",
-    "llvm.loongarch.lasx.xvpickev.h" => "__builtin_lasx_xvpickev_h",
-    "llvm.loongarch.lasx.xvpickev.w" => "__builtin_lasx_xvpickev_w",
-    "llvm.loongarch.lasx.xvpickod.b" => "__builtin_lasx_xvpickod_b",
-    "llvm.loongarch.lasx.xvpickod.d" => "__builtin_lasx_xvpickod_d",
-    "llvm.loongarch.lasx.xvpickod.h" => "__builtin_lasx_xvpickod_h",
-    "llvm.loongarch.lasx.xvpickod.w" => "__builtin_lasx_xvpickod_w",
-    "llvm.loongarch.lasx.xvpickve.d" => "__builtin_lasx_xvpickve_d",
-    "llvm.loongarch.lasx.xvpickve.d.f" => "__builtin_lasx_xvpickve_d_f",
-    "llvm.loongarch.lasx.xvpickve.w" => "__builtin_lasx_xvpickve_w",
-    "llvm.loongarch.lasx.xvpickve.w.f" => "__builtin_lasx_xvpickve_w_f",
-    "llvm.loongarch.lasx.xvpickve2gr.d" => "__builtin_lasx_xvpickve2gr_d",
-    "llvm.loongarch.lasx.xvpickve2gr.du" => "__builtin_lasx_xvpickve2gr_du",
-    "llvm.loongarch.lasx.xvpickve2gr.w" => "__builtin_lasx_xvpickve2gr_w",
-    "llvm.loongarch.lasx.xvpickve2gr.wu" => "__builtin_lasx_xvpickve2gr_wu",
-    "llvm.loongarch.lasx.xvrepl128vei.b" => "__builtin_lasx_xvrepl128vei_b",
-    "llvm.loongarch.lasx.xvrepl128vei.d" => "__builtin_lasx_xvrepl128vei_d",
-    "llvm.loongarch.lasx.xvrepl128vei.h" => "__builtin_lasx_xvrepl128vei_h",
-    "llvm.loongarch.lasx.xvrepl128vei.w" => "__builtin_lasx_xvrepl128vei_w",
-    "llvm.loongarch.lasx.xvreplgr2vr.b" => "__builtin_lasx_xvreplgr2vr_b",
-    "llvm.loongarch.lasx.xvreplgr2vr.d" => "__builtin_lasx_xvreplgr2vr_d",
-    "llvm.loongarch.lasx.xvreplgr2vr.h" => "__builtin_lasx_xvreplgr2vr_h",
-    "llvm.loongarch.lasx.xvreplgr2vr.w" => "__builtin_lasx_xvreplgr2vr_w",
-    "llvm.loongarch.lasx.xvrepli.b" => "__builtin_lasx_xvrepli_b",
-    "llvm.loongarch.lasx.xvrepli.d" => "__builtin_lasx_xvrepli_d",
-    "llvm.loongarch.lasx.xvrepli.h" => "__builtin_lasx_xvrepli_h",
-    "llvm.loongarch.lasx.xvrepli.w" => "__builtin_lasx_xvrepli_w",
-    "llvm.loongarch.lasx.xvreplve.b" => "__builtin_lasx_xvreplve_b",
-    "llvm.loongarch.lasx.xvreplve.d" => "__builtin_lasx_xvreplve_d",
-    "llvm.loongarch.lasx.xvreplve.h" => "__builtin_lasx_xvreplve_h",
-    "llvm.loongarch.lasx.xvreplve.w" => "__builtin_lasx_xvreplve_w",
-    "llvm.loongarch.lasx.xvreplve0.b" => "__builtin_lasx_xvreplve0_b",
-    "llvm.loongarch.lasx.xvreplve0.d" => "__builtin_lasx_xvreplve0_d",
-    "llvm.loongarch.lasx.xvreplve0.h" => "__builtin_lasx_xvreplve0_h",
-    "llvm.loongarch.lasx.xvreplve0.q" => "__builtin_lasx_xvreplve0_q",
-    "llvm.loongarch.lasx.xvreplve0.w" => "__builtin_lasx_xvreplve0_w",
-    "llvm.loongarch.lasx.xvrotr.b" => "__builtin_lasx_xvrotr_b",
-    "llvm.loongarch.lasx.xvrotr.d" => "__builtin_lasx_xvrotr_d",
-    "llvm.loongarch.lasx.xvrotr.h" => "__builtin_lasx_xvrotr_h",
-    "llvm.loongarch.lasx.xvrotr.w" => "__builtin_lasx_xvrotr_w",
-    "llvm.loongarch.lasx.xvrotri.b" => "__builtin_lasx_xvrotri_b",
-    "llvm.loongarch.lasx.xvrotri.d" => "__builtin_lasx_xvrotri_d",
-    "llvm.loongarch.lasx.xvrotri.h" => "__builtin_lasx_xvrotri_h",
-    "llvm.loongarch.lasx.xvrotri.w" => "__builtin_lasx_xvrotri_w",
-    "llvm.loongarch.lasx.xvsadd.b" => "__builtin_lasx_xvsadd_b",
-    "llvm.loongarch.lasx.xvsadd.bu" => "__builtin_lasx_xvsadd_bu",
-    "llvm.loongarch.lasx.xvsadd.d" => "__builtin_lasx_xvsadd_d",
-    "llvm.loongarch.lasx.xvsadd.du" => "__builtin_lasx_xvsadd_du",
-    "llvm.loongarch.lasx.xvsadd.h" => "__builtin_lasx_xvsadd_h",
-    "llvm.loongarch.lasx.xvsadd.hu" => "__builtin_lasx_xvsadd_hu",
-    "llvm.loongarch.lasx.xvsadd.w" => "__builtin_lasx_xvsadd_w",
-    "llvm.loongarch.lasx.xvsadd.wu" => "__builtin_lasx_xvsadd_wu",
-    "llvm.loongarch.lasx.xvsat.b" => "__builtin_lasx_xvsat_b",
-    "llvm.loongarch.lasx.xvsat.bu" => "__builtin_lasx_xvsat_bu",
-    "llvm.loongarch.lasx.xvsat.d" => "__builtin_lasx_xvsat_d",
-    "llvm.loongarch.lasx.xvsat.du" => "__builtin_lasx_xvsat_du",
-    "llvm.loongarch.lasx.xvsat.h" => "__builtin_lasx_xvsat_h",
-    "llvm.loongarch.lasx.xvsat.hu" => "__builtin_lasx_xvsat_hu",
-    "llvm.loongarch.lasx.xvsat.w" => "__builtin_lasx_xvsat_w",
-    "llvm.loongarch.lasx.xvsat.wu" => "__builtin_lasx_xvsat_wu",
-    "llvm.loongarch.lasx.xvseq.b" => "__builtin_lasx_xvseq_b",
-    "llvm.loongarch.lasx.xvseq.d" => "__builtin_lasx_xvseq_d",
-    "llvm.loongarch.lasx.xvseq.h" => "__builtin_lasx_xvseq_h",
-    "llvm.loongarch.lasx.xvseq.w" => "__builtin_lasx_xvseq_w",
-    "llvm.loongarch.lasx.xvseqi.b" => "__builtin_lasx_xvseqi_b",
-    "llvm.loongarch.lasx.xvseqi.d" => "__builtin_lasx_xvseqi_d",
-    "llvm.loongarch.lasx.xvseqi.h" => "__builtin_lasx_xvseqi_h",
-    "llvm.loongarch.lasx.xvseqi.w" => "__builtin_lasx_xvseqi_w",
-    "llvm.loongarch.lasx.xvshuf.b" => "__builtin_lasx_xvshuf_b",
-    "llvm.loongarch.lasx.xvshuf.d" => "__builtin_lasx_xvshuf_d",
-    "llvm.loongarch.lasx.xvshuf.h" => "__builtin_lasx_xvshuf_h",
-    "llvm.loongarch.lasx.xvshuf.w" => "__builtin_lasx_xvshuf_w",
-    "llvm.loongarch.lasx.xvshuf4i.b" => "__builtin_lasx_xvshuf4i_b",
-    "llvm.loongarch.lasx.xvshuf4i.d" => "__builtin_lasx_xvshuf4i_d",
-    "llvm.loongarch.lasx.xvshuf4i.h" => "__builtin_lasx_xvshuf4i_h",
-    "llvm.loongarch.lasx.xvshuf4i.w" => "__builtin_lasx_xvshuf4i_w",
-    "llvm.loongarch.lasx.xvsigncov.b" => "__builtin_lasx_xvsigncov_b",
-    "llvm.loongarch.lasx.xvsigncov.d" => "__builtin_lasx_xvsigncov_d",
-    "llvm.loongarch.lasx.xvsigncov.h" => "__builtin_lasx_xvsigncov_h",
-    "llvm.loongarch.lasx.xvsigncov.w" => "__builtin_lasx_xvsigncov_w",
-    "llvm.loongarch.lasx.xvsle.b" => "__builtin_lasx_xvsle_b",
-    "llvm.loongarch.lasx.xvsle.bu" => "__builtin_lasx_xvsle_bu",
-    "llvm.loongarch.lasx.xvsle.d" => "__builtin_lasx_xvsle_d",
-    "llvm.loongarch.lasx.xvsle.du" => "__builtin_lasx_xvsle_du",
-    "llvm.loongarch.lasx.xvsle.h" => "__builtin_lasx_xvsle_h",
-    "llvm.loongarch.lasx.xvsle.hu" => "__builtin_lasx_xvsle_hu",
-    "llvm.loongarch.lasx.xvsle.w" => "__builtin_lasx_xvsle_w",
-    "llvm.loongarch.lasx.xvsle.wu" => "__builtin_lasx_xvsle_wu",
-    "llvm.loongarch.lasx.xvslei.b" => "__builtin_lasx_xvslei_b",
-    "llvm.loongarch.lasx.xvslei.bu" => "__builtin_lasx_xvslei_bu",
-    "llvm.loongarch.lasx.xvslei.d" => "__builtin_lasx_xvslei_d",
-    "llvm.loongarch.lasx.xvslei.du" => "__builtin_lasx_xvslei_du",
-    "llvm.loongarch.lasx.xvslei.h" => "__builtin_lasx_xvslei_h",
-    "llvm.loongarch.lasx.xvslei.hu" => "__builtin_lasx_xvslei_hu",
-    "llvm.loongarch.lasx.xvslei.w" => "__builtin_lasx_xvslei_w",
-    "llvm.loongarch.lasx.xvslei.wu" => "__builtin_lasx_xvslei_wu",
-    "llvm.loongarch.lasx.xvsll.b" => "__builtin_lasx_xvsll_b",
-    "llvm.loongarch.lasx.xvsll.d" => "__builtin_lasx_xvsll_d",
-    "llvm.loongarch.lasx.xvsll.h" => "__builtin_lasx_xvsll_h",
-    "llvm.loongarch.lasx.xvsll.w" => "__builtin_lasx_xvsll_w",
-    "llvm.loongarch.lasx.xvslli.b" => "__builtin_lasx_xvslli_b",
-    "llvm.loongarch.lasx.xvslli.d" => "__builtin_lasx_xvslli_d",
-    "llvm.loongarch.lasx.xvslli.h" => "__builtin_lasx_xvslli_h",
-    "llvm.loongarch.lasx.xvslli.w" => "__builtin_lasx_xvslli_w",
-    "llvm.loongarch.lasx.xvsllwil.d.w" => "__builtin_lasx_xvsllwil_d_w",
-    "llvm.loongarch.lasx.xvsllwil.du.wu" => "__builtin_lasx_xvsllwil_du_wu",
-    "llvm.loongarch.lasx.xvsllwil.h.b" => "__builtin_lasx_xvsllwil_h_b",
-    "llvm.loongarch.lasx.xvsllwil.hu.bu" => "__builtin_lasx_xvsllwil_hu_bu",
-    "llvm.loongarch.lasx.xvsllwil.w.h" => "__builtin_lasx_xvsllwil_w_h",
-    "llvm.loongarch.lasx.xvsllwil.wu.hu" => "__builtin_lasx_xvsllwil_wu_hu",
-    "llvm.loongarch.lasx.xvslt.b" => "__builtin_lasx_xvslt_b",
-    "llvm.loongarch.lasx.xvslt.bu" => "__builtin_lasx_xvslt_bu",
-    "llvm.loongarch.lasx.xvslt.d" => "__builtin_lasx_xvslt_d",
-    "llvm.loongarch.lasx.xvslt.du" => "__builtin_lasx_xvslt_du",
-    "llvm.loongarch.lasx.xvslt.h" => "__builtin_lasx_xvslt_h",
-    "llvm.loongarch.lasx.xvslt.hu" => "__builtin_lasx_xvslt_hu",
-    "llvm.loongarch.lasx.xvslt.w" => "__builtin_lasx_xvslt_w",
-    "llvm.loongarch.lasx.xvslt.wu" => "__builtin_lasx_xvslt_wu",
-    "llvm.loongarch.lasx.xvslti.b" => "__builtin_lasx_xvslti_b",
-    "llvm.loongarch.lasx.xvslti.bu" => "__builtin_lasx_xvslti_bu",
-    "llvm.loongarch.lasx.xvslti.d" => "__builtin_lasx_xvslti_d",
-    "llvm.loongarch.lasx.xvslti.du" => "__builtin_lasx_xvslti_du",
-    "llvm.loongarch.lasx.xvslti.h" => "__builtin_lasx_xvslti_h",
-    "llvm.loongarch.lasx.xvslti.hu" => "__builtin_lasx_xvslti_hu",
-    "llvm.loongarch.lasx.xvslti.w" => "__builtin_lasx_xvslti_w",
-    "llvm.loongarch.lasx.xvslti.wu" => "__builtin_lasx_xvslti_wu",
-    "llvm.loongarch.lasx.xvsra.b" => "__builtin_lasx_xvsra_b",
-    "llvm.loongarch.lasx.xvsra.d" => "__builtin_lasx_xvsra_d",
-    "llvm.loongarch.lasx.xvsra.h" => "__builtin_lasx_xvsra_h",
-    "llvm.loongarch.lasx.xvsra.w" => "__builtin_lasx_xvsra_w",
-    "llvm.loongarch.lasx.xvsrai.b" => "__builtin_lasx_xvsrai_b",
-    "llvm.loongarch.lasx.xvsrai.d" => "__builtin_lasx_xvsrai_d",
-    "llvm.loongarch.lasx.xvsrai.h" => "__builtin_lasx_xvsrai_h",
-    "llvm.loongarch.lasx.xvsrai.w" => "__builtin_lasx_xvsrai_w",
-    "llvm.loongarch.lasx.xvsran.b.h" => "__builtin_lasx_xvsran_b_h",
-    "llvm.loongarch.lasx.xvsran.h.w" => "__builtin_lasx_xvsran_h_w",
-    "llvm.loongarch.lasx.xvsran.w.d" => "__builtin_lasx_xvsran_w_d",
-    "llvm.loongarch.lasx.xvsrani.b.h" => "__builtin_lasx_xvsrani_b_h",
-    "llvm.loongarch.lasx.xvsrani.d.q" => "__builtin_lasx_xvsrani_d_q",
-    "llvm.loongarch.lasx.xvsrani.h.w" => "__builtin_lasx_xvsrani_h_w",
-    "llvm.loongarch.lasx.xvsrani.w.d" => "__builtin_lasx_xvsrani_w_d",
-    "llvm.loongarch.lasx.xvsrar.b" => "__builtin_lasx_xvsrar_b",
-    "llvm.loongarch.lasx.xvsrar.d" => "__builtin_lasx_xvsrar_d",
-    "llvm.loongarch.lasx.xvsrar.h" => "__builtin_lasx_xvsrar_h",
-    "llvm.loongarch.lasx.xvsrar.w" => "__builtin_lasx_xvsrar_w",
-    "llvm.loongarch.lasx.xvsrari.b" => "__builtin_lasx_xvsrari_b",
-    "llvm.loongarch.lasx.xvsrari.d" => "__builtin_lasx_xvsrari_d",
-    "llvm.loongarch.lasx.xvsrari.h" => "__builtin_lasx_xvsrari_h",
-    "llvm.loongarch.lasx.xvsrari.w" => "__builtin_lasx_xvsrari_w",
-    "llvm.loongarch.lasx.xvsrarn.b.h" => "__builtin_lasx_xvsrarn_b_h",
-    "llvm.loongarch.lasx.xvsrarn.h.w" => "__builtin_lasx_xvsrarn_h_w",
-    "llvm.loongarch.lasx.xvsrarn.w.d" => "__builtin_lasx_xvsrarn_w_d",
-    "llvm.loongarch.lasx.xvsrarni.b.h" => "__builtin_lasx_xvsrarni_b_h",
-    "llvm.loongarch.lasx.xvsrarni.d.q" => "__builtin_lasx_xvsrarni_d_q",
-    "llvm.loongarch.lasx.xvsrarni.h.w" => "__builtin_lasx_xvsrarni_h_w",
-    "llvm.loongarch.lasx.xvsrarni.w.d" => "__builtin_lasx_xvsrarni_w_d",
-    "llvm.loongarch.lasx.xvsrl.b" => "__builtin_lasx_xvsrl_b",
-    "llvm.loongarch.lasx.xvsrl.d" => "__builtin_lasx_xvsrl_d",
-    "llvm.loongarch.lasx.xvsrl.h" => "__builtin_lasx_xvsrl_h",
-    "llvm.loongarch.lasx.xvsrl.w" => "__builtin_lasx_xvsrl_w",
-    "llvm.loongarch.lasx.xvsrli.b" => "__builtin_lasx_xvsrli_b",
-    "llvm.loongarch.lasx.xvsrli.d" => "__builtin_lasx_xvsrli_d",
-    "llvm.loongarch.lasx.xvsrli.h" => "__builtin_lasx_xvsrli_h",
-    "llvm.loongarch.lasx.xvsrli.w" => "__builtin_lasx_xvsrli_w",
-    "llvm.loongarch.lasx.xvsrln.b.h" => "__builtin_lasx_xvsrln_b_h",
-    "llvm.loongarch.lasx.xvsrln.h.w" => "__builtin_lasx_xvsrln_h_w",
-    "llvm.loongarch.lasx.xvsrln.w.d" => "__builtin_lasx_xvsrln_w_d",
-    "llvm.loongarch.lasx.xvsrlni.b.h" => "__builtin_lasx_xvsrlni_b_h",
-    "llvm.loongarch.lasx.xvsrlni.d.q" => "__builtin_lasx_xvsrlni_d_q",
-    "llvm.loongarch.lasx.xvsrlni.h.w" => "__builtin_lasx_xvsrlni_h_w",
-    "llvm.loongarch.lasx.xvsrlni.w.d" => "__builtin_lasx_xvsrlni_w_d",
-    "llvm.loongarch.lasx.xvsrlr.b" => "__builtin_lasx_xvsrlr_b",
-    "llvm.loongarch.lasx.xvsrlr.d" => "__builtin_lasx_xvsrlr_d",
-    "llvm.loongarch.lasx.xvsrlr.h" => "__builtin_lasx_xvsrlr_h",
-    "llvm.loongarch.lasx.xvsrlr.w" => "__builtin_lasx_xvsrlr_w",
-    "llvm.loongarch.lasx.xvsrlri.b" => "__builtin_lasx_xvsrlri_b",
-    "llvm.loongarch.lasx.xvsrlri.d" => "__builtin_lasx_xvsrlri_d",
-    "llvm.loongarch.lasx.xvsrlri.h" => "__builtin_lasx_xvsrlri_h",
-    "llvm.loongarch.lasx.xvsrlri.w" => "__builtin_lasx_xvsrlri_w",
-    "llvm.loongarch.lasx.xvsrlrn.b.h" => "__builtin_lasx_xvsrlrn_b_h",
-    "llvm.loongarch.lasx.xvsrlrn.h.w" => "__builtin_lasx_xvsrlrn_h_w",
-    "llvm.loongarch.lasx.xvsrlrn.w.d" => "__builtin_lasx_xvsrlrn_w_d",
-    "llvm.loongarch.lasx.xvsrlrni.b.h" => "__builtin_lasx_xvsrlrni_b_h",
-    "llvm.loongarch.lasx.xvsrlrni.d.q" => "__builtin_lasx_xvsrlrni_d_q",
-    "llvm.loongarch.lasx.xvsrlrni.h.w" => "__builtin_lasx_xvsrlrni_h_w",
-    "llvm.loongarch.lasx.xvsrlrni.w.d" => "__builtin_lasx_xvsrlrni_w_d",
-    "llvm.loongarch.lasx.xvssran.b.h" => "__builtin_lasx_xvssran_b_h",
-    "llvm.loongarch.lasx.xvssran.bu.h" => "__builtin_lasx_xvssran_bu_h",
-    "llvm.loongarch.lasx.xvssran.h.w" => "__builtin_lasx_xvssran_h_w",
-    "llvm.loongarch.lasx.xvssran.hu.w" => "__builtin_lasx_xvssran_hu_w",
-    "llvm.loongarch.lasx.xvssran.w.d" => "__builtin_lasx_xvssran_w_d",
-    "llvm.loongarch.lasx.xvssran.wu.d" => "__builtin_lasx_xvssran_wu_d",
-    "llvm.loongarch.lasx.xvssrani.b.h" => "__builtin_lasx_xvssrani_b_h",
-    "llvm.loongarch.lasx.xvssrani.bu.h" => "__builtin_lasx_xvssrani_bu_h",
-    "llvm.loongarch.lasx.xvssrani.d.q" => "__builtin_lasx_xvssrani_d_q",
-    "llvm.loongarch.lasx.xvssrani.du.q" => "__builtin_lasx_xvssrani_du_q",
-    "llvm.loongarch.lasx.xvssrani.h.w" => "__builtin_lasx_xvssrani_h_w",
-    "llvm.loongarch.lasx.xvssrani.hu.w" => "__builtin_lasx_xvssrani_hu_w",
-    "llvm.loongarch.lasx.xvssrani.w.d" => "__builtin_lasx_xvssrani_w_d",
-    "llvm.loongarch.lasx.xvssrani.wu.d" => "__builtin_lasx_xvssrani_wu_d",
-    "llvm.loongarch.lasx.xvssrarn.b.h" => "__builtin_lasx_xvssrarn_b_h",
-    "llvm.loongarch.lasx.xvssrarn.bu.h" => "__builtin_lasx_xvssrarn_bu_h",
-    "llvm.loongarch.lasx.xvssrarn.h.w" => "__builtin_lasx_xvssrarn_h_w",
-    "llvm.loongarch.lasx.xvssrarn.hu.w" => "__builtin_lasx_xvssrarn_hu_w",
-    "llvm.loongarch.lasx.xvssrarn.w.d" => "__builtin_lasx_xvssrarn_w_d",
-    "llvm.loongarch.lasx.xvssrarn.wu.d" => "__builtin_lasx_xvssrarn_wu_d",
-    "llvm.loongarch.lasx.xvssrarni.b.h" => "__builtin_lasx_xvssrarni_b_h",
-    "llvm.loongarch.lasx.xvssrarni.bu.h" => "__builtin_lasx_xvssrarni_bu_h",
-    "llvm.loongarch.lasx.xvssrarni.d.q" => "__builtin_lasx_xvssrarni_d_q",
-    "llvm.loongarch.lasx.xvssrarni.du.q" => "__builtin_lasx_xvssrarni_du_q",
-    "llvm.loongarch.lasx.xvssrarni.h.w" => "__builtin_lasx_xvssrarni_h_w",
-    "llvm.loongarch.lasx.xvssrarni.hu.w" => "__builtin_lasx_xvssrarni_hu_w",
-    "llvm.loongarch.lasx.xvssrarni.w.d" => "__builtin_lasx_xvssrarni_w_d",
-    "llvm.loongarch.lasx.xvssrarni.wu.d" => "__builtin_lasx_xvssrarni_wu_d",
-    "llvm.loongarch.lasx.xvssrln.b.h" => "__builtin_lasx_xvssrln_b_h",
-    "llvm.loongarch.lasx.xvssrln.bu.h" => "__builtin_lasx_xvssrln_bu_h",
-    "llvm.loongarch.lasx.xvssrln.h.w" => "__builtin_lasx_xvssrln_h_w",
-    "llvm.loongarch.lasx.xvssrln.hu.w" => "__builtin_lasx_xvssrln_hu_w",
-    "llvm.loongarch.lasx.xvssrln.w.d" => "__builtin_lasx_xvssrln_w_d",
-    "llvm.loongarch.lasx.xvssrln.wu.d" => "__builtin_lasx_xvssrln_wu_d",
-    "llvm.loongarch.lasx.xvssrlni.b.h" => "__builtin_lasx_xvssrlni_b_h",
-    "llvm.loongarch.lasx.xvssrlni.bu.h" => "__builtin_lasx_xvssrlni_bu_h",
-    "llvm.loongarch.lasx.xvssrlni.d.q" => "__builtin_lasx_xvssrlni_d_q",
-    "llvm.loongarch.lasx.xvssrlni.du.q" => "__builtin_lasx_xvssrlni_du_q",
-    "llvm.loongarch.lasx.xvssrlni.h.w" => "__builtin_lasx_xvssrlni_h_w",
-    "llvm.loongarch.lasx.xvssrlni.hu.w" => "__builtin_lasx_xvssrlni_hu_w",
-    "llvm.loongarch.lasx.xvssrlni.w.d" => "__builtin_lasx_xvssrlni_w_d",
-    "llvm.loongarch.lasx.xvssrlni.wu.d" => "__builtin_lasx_xvssrlni_wu_d",
-    "llvm.loongarch.lasx.xvssrlrn.b.h" => "__builtin_lasx_xvssrlrn_b_h",
-    "llvm.loongarch.lasx.xvssrlrn.bu.h" => "__builtin_lasx_xvssrlrn_bu_h",
-    "llvm.loongarch.lasx.xvssrlrn.h.w" => "__builtin_lasx_xvssrlrn_h_w",
-    "llvm.loongarch.lasx.xvssrlrn.hu.w" => "__builtin_lasx_xvssrlrn_hu_w",
-    "llvm.loongarch.lasx.xvssrlrn.w.d" => "__builtin_lasx_xvssrlrn_w_d",
-    "llvm.loongarch.lasx.xvssrlrn.wu.d" => "__builtin_lasx_xvssrlrn_wu_d",
-    "llvm.loongarch.lasx.xvssrlrni.b.h" => "__builtin_lasx_xvssrlrni_b_h",
-    "llvm.loongarch.lasx.xvssrlrni.bu.h" => "__builtin_lasx_xvssrlrni_bu_h",
-    "llvm.loongarch.lasx.xvssrlrni.d.q" => "__builtin_lasx_xvssrlrni_d_q",
-    "llvm.loongarch.lasx.xvssrlrni.du.q" => "__builtin_lasx_xvssrlrni_du_q",
-    "llvm.loongarch.lasx.xvssrlrni.h.w" => "__builtin_lasx_xvssrlrni_h_w",
-    "llvm.loongarch.lasx.xvssrlrni.hu.w" => "__builtin_lasx_xvssrlrni_hu_w",
-    "llvm.loongarch.lasx.xvssrlrni.w.d" => "__builtin_lasx_xvssrlrni_w_d",
-    "llvm.loongarch.lasx.xvssrlrni.wu.d" => "__builtin_lasx_xvssrlrni_wu_d",
-    "llvm.loongarch.lasx.xvssub.b" => "__builtin_lasx_xvssub_b",
-    "llvm.loongarch.lasx.xvssub.bu" => "__builtin_lasx_xvssub_bu",
-    "llvm.loongarch.lasx.xvssub.d" => "__builtin_lasx_xvssub_d",
-    "llvm.loongarch.lasx.xvssub.du" => "__builtin_lasx_xvssub_du",
-    "llvm.loongarch.lasx.xvssub.h" => "__builtin_lasx_xvssub_h",
-    "llvm.loongarch.lasx.xvssub.hu" => "__builtin_lasx_xvssub_hu",
-    "llvm.loongarch.lasx.xvssub.w" => "__builtin_lasx_xvssub_w",
-    "llvm.loongarch.lasx.xvssub.wu" => "__builtin_lasx_xvssub_wu",
-    "llvm.loongarch.lasx.xvst" => "__builtin_lasx_xvst",
-    "llvm.loongarch.lasx.xvstelm.b" => "__builtin_lasx_xvstelm_b",
-    "llvm.loongarch.lasx.xvstelm.d" => "__builtin_lasx_xvstelm_d",
-    "llvm.loongarch.lasx.xvstelm.h" => "__builtin_lasx_xvstelm_h",
-    "llvm.loongarch.lasx.xvstelm.w" => "__builtin_lasx_xvstelm_w",
-    "llvm.loongarch.lasx.xvstx" => "__builtin_lasx_xvstx",
-    "llvm.loongarch.lasx.xvsub.b" => "__builtin_lasx_xvsub_b",
-    "llvm.loongarch.lasx.xvsub.d" => "__builtin_lasx_xvsub_d",
-    "llvm.loongarch.lasx.xvsub.h" => "__builtin_lasx_xvsub_h",
-    "llvm.loongarch.lasx.xvsub.q" => "__builtin_lasx_xvsub_q",
-    "llvm.loongarch.lasx.xvsub.w" => "__builtin_lasx_xvsub_w",
-    "llvm.loongarch.lasx.xvsubi.bu" => "__builtin_lasx_xvsubi_bu",
-    "llvm.loongarch.lasx.xvsubi.du" => "__builtin_lasx_xvsubi_du",
-    "llvm.loongarch.lasx.xvsubi.hu" => "__builtin_lasx_xvsubi_hu",
-    "llvm.loongarch.lasx.xvsubi.wu" => "__builtin_lasx_xvsubi_wu",
-    "llvm.loongarch.lasx.xvsubwev.d.w" => "__builtin_lasx_xvsubwev_d_w",
-    "llvm.loongarch.lasx.xvsubwev.d.wu" => "__builtin_lasx_xvsubwev_d_wu",
-    "llvm.loongarch.lasx.xvsubwev.h.b" => "__builtin_lasx_xvsubwev_h_b",
-    "llvm.loongarch.lasx.xvsubwev.h.bu" => "__builtin_lasx_xvsubwev_h_bu",
-    "llvm.loongarch.lasx.xvsubwev.q.d" => "__builtin_lasx_xvsubwev_q_d",
-    "llvm.loongarch.lasx.xvsubwev.q.du" => "__builtin_lasx_xvsubwev_q_du",
-    "llvm.loongarch.lasx.xvsubwev.w.h" => "__builtin_lasx_xvsubwev_w_h",
-    "llvm.loongarch.lasx.xvsubwev.w.hu" => "__builtin_lasx_xvsubwev_w_hu",
-    "llvm.loongarch.lasx.xvsubwod.d.w" => "__builtin_lasx_xvsubwod_d_w",
-    "llvm.loongarch.lasx.xvsubwod.d.wu" => "__builtin_lasx_xvsubwod_d_wu",
-    "llvm.loongarch.lasx.xvsubwod.h.b" => "__builtin_lasx_xvsubwod_h_b",
-    "llvm.loongarch.lasx.xvsubwod.h.bu" => "__builtin_lasx_xvsubwod_h_bu",
-    "llvm.loongarch.lasx.xvsubwod.q.d" => "__builtin_lasx_xvsubwod_q_d",
-    "llvm.loongarch.lasx.xvsubwod.q.du" => "__builtin_lasx_xvsubwod_q_du",
-    "llvm.loongarch.lasx.xvsubwod.w.h" => "__builtin_lasx_xvsubwod_w_h",
-    "llvm.loongarch.lasx.xvsubwod.w.hu" => "__builtin_lasx_xvsubwod_w_hu",
-    "llvm.loongarch.lasx.xvxor.v" => "__builtin_lasx_xvxor_v",
-    "llvm.loongarch.lasx.xvxori.b" => "__builtin_lasx_xvxori_b",
-    "llvm.loongarch.lddir.d" => "__builtin_loongarch_lddir_d",
-    "llvm.loongarch.ldpte.d" => "__builtin_loongarch_ldpte_d",
-    "llvm.loongarch.lsx.bnz.b" => "__builtin_lsx_bnz_b",
-    "llvm.loongarch.lsx.bnz.d" => "__builtin_lsx_bnz_d",
-    "llvm.loongarch.lsx.bnz.h" => "__builtin_lsx_bnz_h",
-    "llvm.loongarch.lsx.bnz.v" => "__builtin_lsx_bnz_v",
-    "llvm.loongarch.lsx.bnz.w" => "__builtin_lsx_bnz_w",
-    "llvm.loongarch.lsx.bz.b" => "__builtin_lsx_bz_b",
-    "llvm.loongarch.lsx.bz.d" => "__builtin_lsx_bz_d",
-    "llvm.loongarch.lsx.bz.h" => "__builtin_lsx_bz_h",
-    "llvm.loongarch.lsx.bz.v" => "__builtin_lsx_bz_v",
-    "llvm.loongarch.lsx.bz.w" => "__builtin_lsx_bz_w",
-    "llvm.loongarch.lsx.vabsd.b" => "__builtin_lsx_vabsd_b",
-    "llvm.loongarch.lsx.vabsd.bu" => "__builtin_lsx_vabsd_bu",
-    "llvm.loongarch.lsx.vabsd.d" => "__builtin_lsx_vabsd_d",
-    "llvm.loongarch.lsx.vabsd.du" => "__builtin_lsx_vabsd_du",
-    "llvm.loongarch.lsx.vabsd.h" => "__builtin_lsx_vabsd_h",
-    "llvm.loongarch.lsx.vabsd.hu" => "__builtin_lsx_vabsd_hu",
-    "llvm.loongarch.lsx.vabsd.w" => "__builtin_lsx_vabsd_w",
-    "llvm.loongarch.lsx.vabsd.wu" => "__builtin_lsx_vabsd_wu",
-    "llvm.loongarch.lsx.vadd.b" => "__builtin_lsx_vadd_b",
-    "llvm.loongarch.lsx.vadd.d" => "__builtin_lsx_vadd_d",
-    "llvm.loongarch.lsx.vadd.h" => "__builtin_lsx_vadd_h",
-    "llvm.loongarch.lsx.vadd.q" => "__builtin_lsx_vadd_q",
-    "llvm.loongarch.lsx.vadd.w" => "__builtin_lsx_vadd_w",
-    "llvm.loongarch.lsx.vadda.b" => "__builtin_lsx_vadda_b",
-    "llvm.loongarch.lsx.vadda.d" => "__builtin_lsx_vadda_d",
-    "llvm.loongarch.lsx.vadda.h" => "__builtin_lsx_vadda_h",
-    "llvm.loongarch.lsx.vadda.w" => "__builtin_lsx_vadda_w",
-    "llvm.loongarch.lsx.vaddi.bu" => "__builtin_lsx_vaddi_bu",
-    "llvm.loongarch.lsx.vaddi.du" => "__builtin_lsx_vaddi_du",
-    "llvm.loongarch.lsx.vaddi.hu" => "__builtin_lsx_vaddi_hu",
-    "llvm.loongarch.lsx.vaddi.wu" => "__builtin_lsx_vaddi_wu",
-    "llvm.loongarch.lsx.vaddwev.d.w" => "__builtin_lsx_vaddwev_d_w",
-    "llvm.loongarch.lsx.vaddwev.d.wu" => "__builtin_lsx_vaddwev_d_wu",
-    "llvm.loongarch.lsx.vaddwev.d.wu.w" => "__builtin_lsx_vaddwev_d_wu_w",
-    "llvm.loongarch.lsx.vaddwev.h.b" => "__builtin_lsx_vaddwev_h_b",
-    "llvm.loongarch.lsx.vaddwev.h.bu" => "__builtin_lsx_vaddwev_h_bu",
-    "llvm.loongarch.lsx.vaddwev.h.bu.b" => "__builtin_lsx_vaddwev_h_bu_b",
-    "llvm.loongarch.lsx.vaddwev.q.d" => "__builtin_lsx_vaddwev_q_d",
-    "llvm.loongarch.lsx.vaddwev.q.du" => "__builtin_lsx_vaddwev_q_du",
-    "llvm.loongarch.lsx.vaddwev.q.du.d" => "__builtin_lsx_vaddwev_q_du_d",
-    "llvm.loongarch.lsx.vaddwev.w.h" => "__builtin_lsx_vaddwev_w_h",
-    "llvm.loongarch.lsx.vaddwev.w.hu" => "__builtin_lsx_vaddwev_w_hu",
-    "llvm.loongarch.lsx.vaddwev.w.hu.h" => "__builtin_lsx_vaddwev_w_hu_h",
-    "llvm.loongarch.lsx.vaddwod.d.w" => "__builtin_lsx_vaddwod_d_w",
-    "llvm.loongarch.lsx.vaddwod.d.wu" => "__builtin_lsx_vaddwod_d_wu",
-    "llvm.loongarch.lsx.vaddwod.d.wu.w" => "__builtin_lsx_vaddwod_d_wu_w",
-    "llvm.loongarch.lsx.vaddwod.h.b" => "__builtin_lsx_vaddwod_h_b",
-    "llvm.loongarch.lsx.vaddwod.h.bu" => "__builtin_lsx_vaddwod_h_bu",
-    "llvm.loongarch.lsx.vaddwod.h.bu.b" => "__builtin_lsx_vaddwod_h_bu_b",
-    "llvm.loongarch.lsx.vaddwod.q.d" => "__builtin_lsx_vaddwod_q_d",
-    "llvm.loongarch.lsx.vaddwod.q.du" => "__builtin_lsx_vaddwod_q_du",
-    "llvm.loongarch.lsx.vaddwod.q.du.d" => "__builtin_lsx_vaddwod_q_du_d",
-    "llvm.loongarch.lsx.vaddwod.w.h" => "__builtin_lsx_vaddwod_w_h",
-    "llvm.loongarch.lsx.vaddwod.w.hu" => "__builtin_lsx_vaddwod_w_hu",
-    "llvm.loongarch.lsx.vaddwod.w.hu.h" => "__builtin_lsx_vaddwod_w_hu_h",
-    "llvm.loongarch.lsx.vand.v" => "__builtin_lsx_vand_v",
-    "llvm.loongarch.lsx.vandi.b" => "__builtin_lsx_vandi_b",
-    "llvm.loongarch.lsx.vandn.v" => "__builtin_lsx_vandn_v",
-    "llvm.loongarch.lsx.vavg.b" => "__builtin_lsx_vavg_b",
-    "llvm.loongarch.lsx.vavg.bu" => "__builtin_lsx_vavg_bu",
-    "llvm.loongarch.lsx.vavg.d" => "__builtin_lsx_vavg_d",
-    "llvm.loongarch.lsx.vavg.du" => "__builtin_lsx_vavg_du",
-    "llvm.loongarch.lsx.vavg.h" => "__builtin_lsx_vavg_h",
-    "llvm.loongarch.lsx.vavg.hu" => "__builtin_lsx_vavg_hu",
-    "llvm.loongarch.lsx.vavg.w" => "__builtin_lsx_vavg_w",
-    "llvm.loongarch.lsx.vavg.wu" => "__builtin_lsx_vavg_wu",
-    "llvm.loongarch.lsx.vavgr.b" => "__builtin_lsx_vavgr_b",
-    "llvm.loongarch.lsx.vavgr.bu" => "__builtin_lsx_vavgr_bu",
-    "llvm.loongarch.lsx.vavgr.d" => "__builtin_lsx_vavgr_d",
-    "llvm.loongarch.lsx.vavgr.du" => "__builtin_lsx_vavgr_du",
-    "llvm.loongarch.lsx.vavgr.h" => "__builtin_lsx_vavgr_h",
-    "llvm.loongarch.lsx.vavgr.hu" => "__builtin_lsx_vavgr_hu",
-    "llvm.loongarch.lsx.vavgr.w" => "__builtin_lsx_vavgr_w",
-    "llvm.loongarch.lsx.vavgr.wu" => "__builtin_lsx_vavgr_wu",
-    "llvm.loongarch.lsx.vbitclr.b" => "__builtin_lsx_vbitclr_b",
-    "llvm.loongarch.lsx.vbitclr.d" => "__builtin_lsx_vbitclr_d",
-    "llvm.loongarch.lsx.vbitclr.h" => "__builtin_lsx_vbitclr_h",
-    "llvm.loongarch.lsx.vbitclr.w" => "__builtin_lsx_vbitclr_w",
-    "llvm.loongarch.lsx.vbitclri.b" => "__builtin_lsx_vbitclri_b",
-    "llvm.loongarch.lsx.vbitclri.d" => "__builtin_lsx_vbitclri_d",
-    "llvm.loongarch.lsx.vbitclri.h" => "__builtin_lsx_vbitclri_h",
-    "llvm.loongarch.lsx.vbitclri.w" => "__builtin_lsx_vbitclri_w",
-    "llvm.loongarch.lsx.vbitrev.b" => "__builtin_lsx_vbitrev_b",
-    "llvm.loongarch.lsx.vbitrev.d" => "__builtin_lsx_vbitrev_d",
-    "llvm.loongarch.lsx.vbitrev.h" => "__builtin_lsx_vbitrev_h",
-    "llvm.loongarch.lsx.vbitrev.w" => "__builtin_lsx_vbitrev_w",
-    "llvm.loongarch.lsx.vbitrevi.b" => "__builtin_lsx_vbitrevi_b",
-    "llvm.loongarch.lsx.vbitrevi.d" => "__builtin_lsx_vbitrevi_d",
-    "llvm.loongarch.lsx.vbitrevi.h" => "__builtin_lsx_vbitrevi_h",
-    "llvm.loongarch.lsx.vbitrevi.w" => "__builtin_lsx_vbitrevi_w",
-    "llvm.loongarch.lsx.vbitsel.v" => "__builtin_lsx_vbitsel_v",
-    "llvm.loongarch.lsx.vbitseli.b" => "__builtin_lsx_vbitseli_b",
-    "llvm.loongarch.lsx.vbitset.b" => "__builtin_lsx_vbitset_b",
-    "llvm.loongarch.lsx.vbitset.d" => "__builtin_lsx_vbitset_d",
-    "llvm.loongarch.lsx.vbitset.h" => "__builtin_lsx_vbitset_h",
-    "llvm.loongarch.lsx.vbitset.w" => "__builtin_lsx_vbitset_w",
-    "llvm.loongarch.lsx.vbitseti.b" => "__builtin_lsx_vbitseti_b",
-    "llvm.loongarch.lsx.vbitseti.d" => "__builtin_lsx_vbitseti_d",
-    "llvm.loongarch.lsx.vbitseti.h" => "__builtin_lsx_vbitseti_h",
-    "llvm.loongarch.lsx.vbitseti.w" => "__builtin_lsx_vbitseti_w",
-    "llvm.loongarch.lsx.vbsll.v" => "__builtin_lsx_vbsll_v",
-    "llvm.loongarch.lsx.vbsrl.v" => "__builtin_lsx_vbsrl_v",
-    "llvm.loongarch.lsx.vclo.b" => "__builtin_lsx_vclo_b",
-    "llvm.loongarch.lsx.vclo.d" => "__builtin_lsx_vclo_d",
-    "llvm.loongarch.lsx.vclo.h" => "__builtin_lsx_vclo_h",
-    "llvm.loongarch.lsx.vclo.w" => "__builtin_lsx_vclo_w",
-    "llvm.loongarch.lsx.vclz.b" => "__builtin_lsx_vclz_b",
-    "llvm.loongarch.lsx.vclz.d" => "__builtin_lsx_vclz_d",
-    "llvm.loongarch.lsx.vclz.h" => "__builtin_lsx_vclz_h",
-    "llvm.loongarch.lsx.vclz.w" => "__builtin_lsx_vclz_w",
-    "llvm.loongarch.lsx.vdiv.b" => "__builtin_lsx_vdiv_b",
-    "llvm.loongarch.lsx.vdiv.bu" => "__builtin_lsx_vdiv_bu",
-    "llvm.loongarch.lsx.vdiv.d" => "__builtin_lsx_vdiv_d",
-    "llvm.loongarch.lsx.vdiv.du" => "__builtin_lsx_vdiv_du",
-    "llvm.loongarch.lsx.vdiv.h" => "__builtin_lsx_vdiv_h",
-    "llvm.loongarch.lsx.vdiv.hu" => "__builtin_lsx_vdiv_hu",
-    "llvm.loongarch.lsx.vdiv.w" => "__builtin_lsx_vdiv_w",
-    "llvm.loongarch.lsx.vdiv.wu" => "__builtin_lsx_vdiv_wu",
-    "llvm.loongarch.lsx.vexth.d.w" => "__builtin_lsx_vexth_d_w",
-    "llvm.loongarch.lsx.vexth.du.wu" => "__builtin_lsx_vexth_du_wu",
-    "llvm.loongarch.lsx.vexth.h.b" => "__builtin_lsx_vexth_h_b",
-    "llvm.loongarch.lsx.vexth.hu.bu" => "__builtin_lsx_vexth_hu_bu",
-    "llvm.loongarch.lsx.vexth.q.d" => "__builtin_lsx_vexth_q_d",
-    "llvm.loongarch.lsx.vexth.qu.du" => "__builtin_lsx_vexth_qu_du",
-    "llvm.loongarch.lsx.vexth.w.h" => "__builtin_lsx_vexth_w_h",
-    "llvm.loongarch.lsx.vexth.wu.hu" => "__builtin_lsx_vexth_wu_hu",
-    "llvm.loongarch.lsx.vextl.q.d" => "__builtin_lsx_vextl_q_d",
-    "llvm.loongarch.lsx.vextl.qu.du" => "__builtin_lsx_vextl_qu_du",
-    "llvm.loongarch.lsx.vextrins.b" => "__builtin_lsx_vextrins_b",
-    "llvm.loongarch.lsx.vextrins.d" => "__builtin_lsx_vextrins_d",
-    "llvm.loongarch.lsx.vextrins.h" => "__builtin_lsx_vextrins_h",
-    "llvm.loongarch.lsx.vextrins.w" => "__builtin_lsx_vextrins_w",
-    "llvm.loongarch.lsx.vfadd.d" => "__builtin_lsx_vfadd_d",
-    "llvm.loongarch.lsx.vfadd.s" => "__builtin_lsx_vfadd_s",
-    "llvm.loongarch.lsx.vfclass.d" => "__builtin_lsx_vfclass_d",
-    "llvm.loongarch.lsx.vfclass.s" => "__builtin_lsx_vfclass_s",
-    "llvm.loongarch.lsx.vfcmp.caf.d" => "__builtin_lsx_vfcmp_caf_d",
-    "llvm.loongarch.lsx.vfcmp.caf.s" => "__builtin_lsx_vfcmp_caf_s",
-    "llvm.loongarch.lsx.vfcmp.ceq.d" => "__builtin_lsx_vfcmp_ceq_d",
-    "llvm.loongarch.lsx.vfcmp.ceq.s" => "__builtin_lsx_vfcmp_ceq_s",
-    "llvm.loongarch.lsx.vfcmp.cle.d" => "__builtin_lsx_vfcmp_cle_d",
-    "llvm.loongarch.lsx.vfcmp.cle.s" => "__builtin_lsx_vfcmp_cle_s",
-    "llvm.loongarch.lsx.vfcmp.clt.d" => "__builtin_lsx_vfcmp_clt_d",
-    "llvm.loongarch.lsx.vfcmp.clt.s" => "__builtin_lsx_vfcmp_clt_s",
-    "llvm.loongarch.lsx.vfcmp.cne.d" => "__builtin_lsx_vfcmp_cne_d",
-    "llvm.loongarch.lsx.vfcmp.cne.s" => "__builtin_lsx_vfcmp_cne_s",
-    "llvm.loongarch.lsx.vfcmp.cor.d" => "__builtin_lsx_vfcmp_cor_d",
-    "llvm.loongarch.lsx.vfcmp.cor.s" => "__builtin_lsx_vfcmp_cor_s",
-    "llvm.loongarch.lsx.vfcmp.cueq.d" => "__builtin_lsx_vfcmp_cueq_d",
-    "llvm.loongarch.lsx.vfcmp.cueq.s" => "__builtin_lsx_vfcmp_cueq_s",
-    "llvm.loongarch.lsx.vfcmp.cule.d" => "__builtin_lsx_vfcmp_cule_d",
-    "llvm.loongarch.lsx.vfcmp.cule.s" => "__builtin_lsx_vfcmp_cule_s",
-    "llvm.loongarch.lsx.vfcmp.cult.d" => "__builtin_lsx_vfcmp_cult_d",
-    "llvm.loongarch.lsx.vfcmp.cult.s" => "__builtin_lsx_vfcmp_cult_s",
-    "llvm.loongarch.lsx.vfcmp.cun.d" => "__builtin_lsx_vfcmp_cun_d",
-    "llvm.loongarch.lsx.vfcmp.cun.s" => "__builtin_lsx_vfcmp_cun_s",
-    "llvm.loongarch.lsx.vfcmp.cune.d" => "__builtin_lsx_vfcmp_cune_d",
-    "llvm.loongarch.lsx.vfcmp.cune.s" => "__builtin_lsx_vfcmp_cune_s",
-    "llvm.loongarch.lsx.vfcmp.saf.d" => "__builtin_lsx_vfcmp_saf_d",
-    "llvm.loongarch.lsx.vfcmp.saf.s" => "__builtin_lsx_vfcmp_saf_s",
-    "llvm.loongarch.lsx.vfcmp.seq.d" => "__builtin_lsx_vfcmp_seq_d",
-    "llvm.loongarch.lsx.vfcmp.seq.s" => "__builtin_lsx_vfcmp_seq_s",
-    "llvm.loongarch.lsx.vfcmp.sle.d" => "__builtin_lsx_vfcmp_sle_d",
-    "llvm.loongarch.lsx.vfcmp.sle.s" => "__builtin_lsx_vfcmp_sle_s",
-    "llvm.loongarch.lsx.vfcmp.slt.d" => "__builtin_lsx_vfcmp_slt_d",
-    "llvm.loongarch.lsx.vfcmp.slt.s" => "__builtin_lsx_vfcmp_slt_s",
-    "llvm.loongarch.lsx.vfcmp.sne.d" => "__builtin_lsx_vfcmp_sne_d",
-    "llvm.loongarch.lsx.vfcmp.sne.s" => "__builtin_lsx_vfcmp_sne_s",
-    "llvm.loongarch.lsx.vfcmp.sor.d" => "__builtin_lsx_vfcmp_sor_d",
-    "llvm.loongarch.lsx.vfcmp.sor.s" => "__builtin_lsx_vfcmp_sor_s",
-    "llvm.loongarch.lsx.vfcmp.sueq.d" => "__builtin_lsx_vfcmp_sueq_d",
-    "llvm.loongarch.lsx.vfcmp.sueq.s" => "__builtin_lsx_vfcmp_sueq_s",
-    "llvm.loongarch.lsx.vfcmp.sule.d" => "__builtin_lsx_vfcmp_sule_d",
-    "llvm.loongarch.lsx.vfcmp.sule.s" => "__builtin_lsx_vfcmp_sule_s",
-    "llvm.loongarch.lsx.vfcmp.sult.d" => "__builtin_lsx_vfcmp_sult_d",
-    "llvm.loongarch.lsx.vfcmp.sult.s" => "__builtin_lsx_vfcmp_sult_s",
-    "llvm.loongarch.lsx.vfcmp.sun.d" => "__builtin_lsx_vfcmp_sun_d",
-    "llvm.loongarch.lsx.vfcmp.sun.s" => "__builtin_lsx_vfcmp_sun_s",
-    "llvm.loongarch.lsx.vfcmp.sune.d" => "__builtin_lsx_vfcmp_sune_d",
-    "llvm.loongarch.lsx.vfcmp.sune.s" => "__builtin_lsx_vfcmp_sune_s",
-    "llvm.loongarch.lsx.vfcvt.h.s" => "__builtin_lsx_vfcvt_h_s",
-    "llvm.loongarch.lsx.vfcvt.s.d" => "__builtin_lsx_vfcvt_s_d",
-    "llvm.loongarch.lsx.vfcvth.d.s" => "__builtin_lsx_vfcvth_d_s",
-    "llvm.loongarch.lsx.vfcvth.s.h" => "__builtin_lsx_vfcvth_s_h",
-    "llvm.loongarch.lsx.vfcvtl.d.s" => "__builtin_lsx_vfcvtl_d_s",
-    "llvm.loongarch.lsx.vfcvtl.s.h" => "__builtin_lsx_vfcvtl_s_h",
-    "llvm.loongarch.lsx.vfdiv.d" => "__builtin_lsx_vfdiv_d",
-    "llvm.loongarch.lsx.vfdiv.s" => "__builtin_lsx_vfdiv_s",
-    "llvm.loongarch.lsx.vffint.d.l" => "__builtin_lsx_vffint_d_l",
-    "llvm.loongarch.lsx.vffint.d.lu" => "__builtin_lsx_vffint_d_lu",
-    "llvm.loongarch.lsx.vffint.s.l" => "__builtin_lsx_vffint_s_l",
-    "llvm.loongarch.lsx.vffint.s.w" => "__builtin_lsx_vffint_s_w",
-    "llvm.loongarch.lsx.vffint.s.wu" => "__builtin_lsx_vffint_s_wu",
-    "llvm.loongarch.lsx.vffinth.d.w" => "__builtin_lsx_vffinth_d_w",
-    "llvm.loongarch.lsx.vffintl.d.w" => "__builtin_lsx_vffintl_d_w",
-    "llvm.loongarch.lsx.vflogb.d" => "__builtin_lsx_vflogb_d",
-    "llvm.loongarch.lsx.vflogb.s" => "__builtin_lsx_vflogb_s",
-    "llvm.loongarch.lsx.vfmadd.d" => "__builtin_lsx_vfmadd_d",
-    "llvm.loongarch.lsx.vfmadd.s" => "__builtin_lsx_vfmadd_s",
-    "llvm.loongarch.lsx.vfmax.d" => "__builtin_lsx_vfmax_d",
-    "llvm.loongarch.lsx.vfmax.s" => "__builtin_lsx_vfmax_s",
-    "llvm.loongarch.lsx.vfmaxa.d" => "__builtin_lsx_vfmaxa_d",
-    "llvm.loongarch.lsx.vfmaxa.s" => "__builtin_lsx_vfmaxa_s",
-    "llvm.loongarch.lsx.vfmin.d" => "__builtin_lsx_vfmin_d",
-    "llvm.loongarch.lsx.vfmin.s" => "__builtin_lsx_vfmin_s",
-    "llvm.loongarch.lsx.vfmina.d" => "__builtin_lsx_vfmina_d",
-    "llvm.loongarch.lsx.vfmina.s" => "__builtin_lsx_vfmina_s",
-    "llvm.loongarch.lsx.vfmsub.d" => "__builtin_lsx_vfmsub_d",
-    "llvm.loongarch.lsx.vfmsub.s" => "__builtin_lsx_vfmsub_s",
-    "llvm.loongarch.lsx.vfmul.d" => "__builtin_lsx_vfmul_d",
-    "llvm.loongarch.lsx.vfmul.s" => "__builtin_lsx_vfmul_s",
-    "llvm.loongarch.lsx.vfnmadd.d" => "__builtin_lsx_vfnmadd_d",
-    "llvm.loongarch.lsx.vfnmadd.s" => "__builtin_lsx_vfnmadd_s",
-    "llvm.loongarch.lsx.vfnmsub.d" => "__builtin_lsx_vfnmsub_d",
-    "llvm.loongarch.lsx.vfnmsub.s" => "__builtin_lsx_vfnmsub_s",
-    "llvm.loongarch.lsx.vfrecip.d" => "__builtin_lsx_vfrecip_d",
-    "llvm.loongarch.lsx.vfrecip.s" => "__builtin_lsx_vfrecip_s",
-    "llvm.loongarch.lsx.vfrecipe.d" => "__builtin_lsx_vfrecipe_d",
-    "llvm.loongarch.lsx.vfrecipe.s" => "__builtin_lsx_vfrecipe_s",
-    "llvm.loongarch.lsx.vfrint.d" => "__builtin_lsx_vfrint_d",
-    "llvm.loongarch.lsx.vfrint.s" => "__builtin_lsx_vfrint_s",
-    "llvm.loongarch.lsx.vfrintrm.d" => "__builtin_lsx_vfrintrm_d",
-    "llvm.loongarch.lsx.vfrintrm.s" => "__builtin_lsx_vfrintrm_s",
-    "llvm.loongarch.lsx.vfrintrne.d" => "__builtin_lsx_vfrintrne_d",
-    "llvm.loongarch.lsx.vfrintrne.s" => "__builtin_lsx_vfrintrne_s",
-    "llvm.loongarch.lsx.vfrintrp.d" => "__builtin_lsx_vfrintrp_d",
-    "llvm.loongarch.lsx.vfrintrp.s" => "__builtin_lsx_vfrintrp_s",
-    "llvm.loongarch.lsx.vfrintrz.d" => "__builtin_lsx_vfrintrz_d",
-    "llvm.loongarch.lsx.vfrintrz.s" => "__builtin_lsx_vfrintrz_s",
-    "llvm.loongarch.lsx.vfrsqrt.d" => "__builtin_lsx_vfrsqrt_d",
-    "llvm.loongarch.lsx.vfrsqrt.s" => "__builtin_lsx_vfrsqrt_s",
-    "llvm.loongarch.lsx.vfrsqrte.d" => "__builtin_lsx_vfrsqrte_d",
-    "llvm.loongarch.lsx.vfrsqrte.s" => "__builtin_lsx_vfrsqrte_s",
-    "llvm.loongarch.lsx.vfrstp.b" => "__builtin_lsx_vfrstp_b",
-    "llvm.loongarch.lsx.vfrstp.h" => "__builtin_lsx_vfrstp_h",
-    "llvm.loongarch.lsx.vfrstpi.b" => "__builtin_lsx_vfrstpi_b",
-    "llvm.loongarch.lsx.vfrstpi.h" => "__builtin_lsx_vfrstpi_h",
-    "llvm.loongarch.lsx.vfsqrt.d" => "__builtin_lsx_vfsqrt_d",
-    "llvm.loongarch.lsx.vfsqrt.s" => "__builtin_lsx_vfsqrt_s",
-    "llvm.loongarch.lsx.vfsub.d" => "__builtin_lsx_vfsub_d",
-    "llvm.loongarch.lsx.vfsub.s" => "__builtin_lsx_vfsub_s",
-    "llvm.loongarch.lsx.vftint.l.d" => "__builtin_lsx_vftint_l_d",
-    "llvm.loongarch.lsx.vftint.lu.d" => "__builtin_lsx_vftint_lu_d",
-    "llvm.loongarch.lsx.vftint.w.d" => "__builtin_lsx_vftint_w_d",
-    "llvm.loongarch.lsx.vftint.w.s" => "__builtin_lsx_vftint_w_s",
-    "llvm.loongarch.lsx.vftint.wu.s" => "__builtin_lsx_vftint_wu_s",
-    "llvm.loongarch.lsx.vftinth.l.s" => "__builtin_lsx_vftinth_l_s",
-    "llvm.loongarch.lsx.vftintl.l.s" => "__builtin_lsx_vftintl_l_s",
-    "llvm.loongarch.lsx.vftintrm.l.d" => "__builtin_lsx_vftintrm_l_d",
-    "llvm.loongarch.lsx.vftintrm.w.d" => "__builtin_lsx_vftintrm_w_d",
-    "llvm.loongarch.lsx.vftintrm.w.s" => "__builtin_lsx_vftintrm_w_s",
-    "llvm.loongarch.lsx.vftintrmh.l.s" => "__builtin_lsx_vftintrmh_l_s",
-    "llvm.loongarch.lsx.vftintrml.l.s" => "__builtin_lsx_vftintrml_l_s",
-    "llvm.loongarch.lsx.vftintrne.l.d" => "__builtin_lsx_vftintrne_l_d",
-    "llvm.loongarch.lsx.vftintrne.w.d" => "__builtin_lsx_vftintrne_w_d",
-    "llvm.loongarch.lsx.vftintrne.w.s" => "__builtin_lsx_vftintrne_w_s",
-    "llvm.loongarch.lsx.vftintrneh.l.s" => "__builtin_lsx_vftintrneh_l_s",
-    "llvm.loongarch.lsx.vftintrnel.l.s" => "__builtin_lsx_vftintrnel_l_s",
-    "llvm.loongarch.lsx.vftintrp.l.d" => "__builtin_lsx_vftintrp_l_d",
-    "llvm.loongarch.lsx.vftintrp.w.d" => "__builtin_lsx_vftintrp_w_d",
-    "llvm.loongarch.lsx.vftintrp.w.s" => "__builtin_lsx_vftintrp_w_s",
-    "llvm.loongarch.lsx.vftintrph.l.s" => "__builtin_lsx_vftintrph_l_s",
-    "llvm.loongarch.lsx.vftintrpl.l.s" => "__builtin_lsx_vftintrpl_l_s",
-    "llvm.loongarch.lsx.vftintrz.l.d" => "__builtin_lsx_vftintrz_l_d",
-    "llvm.loongarch.lsx.vftintrz.lu.d" => "__builtin_lsx_vftintrz_lu_d",
-    "llvm.loongarch.lsx.vftintrz.w.d" => "__builtin_lsx_vftintrz_w_d",
-    "llvm.loongarch.lsx.vftintrz.w.s" => "__builtin_lsx_vftintrz_w_s",
-    "llvm.loongarch.lsx.vftintrz.wu.s" => "__builtin_lsx_vftintrz_wu_s",
-    "llvm.loongarch.lsx.vftintrzh.l.s" => "__builtin_lsx_vftintrzh_l_s",
-    "llvm.loongarch.lsx.vftintrzl.l.s" => "__builtin_lsx_vftintrzl_l_s",
-    "llvm.loongarch.lsx.vhaddw.d.w" => "__builtin_lsx_vhaddw_d_w",
-    "llvm.loongarch.lsx.vhaddw.du.wu" => "__builtin_lsx_vhaddw_du_wu",
-    "llvm.loongarch.lsx.vhaddw.h.b" => "__builtin_lsx_vhaddw_h_b",
-    "llvm.loongarch.lsx.vhaddw.hu.bu" => "__builtin_lsx_vhaddw_hu_bu",
-    "llvm.loongarch.lsx.vhaddw.q.d" => "__builtin_lsx_vhaddw_q_d",
-    "llvm.loongarch.lsx.vhaddw.qu.du" => "__builtin_lsx_vhaddw_qu_du",
-    "llvm.loongarch.lsx.vhaddw.w.h" => "__builtin_lsx_vhaddw_w_h",
-    "llvm.loongarch.lsx.vhaddw.wu.hu" => "__builtin_lsx_vhaddw_wu_hu",
-    "llvm.loongarch.lsx.vhsubw.d.w" => "__builtin_lsx_vhsubw_d_w",
-    "llvm.loongarch.lsx.vhsubw.du.wu" => "__builtin_lsx_vhsubw_du_wu",
-    "llvm.loongarch.lsx.vhsubw.h.b" => "__builtin_lsx_vhsubw_h_b",
-    "llvm.loongarch.lsx.vhsubw.hu.bu" => "__builtin_lsx_vhsubw_hu_bu",
-    "llvm.loongarch.lsx.vhsubw.q.d" => "__builtin_lsx_vhsubw_q_d",
-    "llvm.loongarch.lsx.vhsubw.qu.du" => "__builtin_lsx_vhsubw_qu_du",
-    "llvm.loongarch.lsx.vhsubw.w.h" => "__builtin_lsx_vhsubw_w_h",
-    "llvm.loongarch.lsx.vhsubw.wu.hu" => "__builtin_lsx_vhsubw_wu_hu",
-    "llvm.loongarch.lsx.vilvh.b" => "__builtin_lsx_vilvh_b",
-    "llvm.loongarch.lsx.vilvh.d" => "__builtin_lsx_vilvh_d",
-    "llvm.loongarch.lsx.vilvh.h" => "__builtin_lsx_vilvh_h",
-    "llvm.loongarch.lsx.vilvh.w" => "__builtin_lsx_vilvh_w",
-    "llvm.loongarch.lsx.vilvl.b" => "__builtin_lsx_vilvl_b",
-    "llvm.loongarch.lsx.vilvl.d" => "__builtin_lsx_vilvl_d",
-    "llvm.loongarch.lsx.vilvl.h" => "__builtin_lsx_vilvl_h",
-    "llvm.loongarch.lsx.vilvl.w" => "__builtin_lsx_vilvl_w",
-    "llvm.loongarch.lsx.vinsgr2vr.b" => "__builtin_lsx_vinsgr2vr_b",
-    "llvm.loongarch.lsx.vinsgr2vr.d" => "__builtin_lsx_vinsgr2vr_d",
-    "llvm.loongarch.lsx.vinsgr2vr.h" => "__builtin_lsx_vinsgr2vr_h",
-    "llvm.loongarch.lsx.vinsgr2vr.w" => "__builtin_lsx_vinsgr2vr_w",
-    "llvm.loongarch.lsx.vld" => "__builtin_lsx_vld",
-    "llvm.loongarch.lsx.vldi" => "__builtin_lsx_vldi",
-    "llvm.loongarch.lsx.vldrepl.b" => "__builtin_lsx_vldrepl_b",
-    "llvm.loongarch.lsx.vldrepl.d" => "__builtin_lsx_vldrepl_d",
-    "llvm.loongarch.lsx.vldrepl.h" => "__builtin_lsx_vldrepl_h",
-    "llvm.loongarch.lsx.vldrepl.w" => "__builtin_lsx_vldrepl_w",
-    "llvm.loongarch.lsx.vldx" => "__builtin_lsx_vldx",
-    "llvm.loongarch.lsx.vmadd.b" => "__builtin_lsx_vmadd_b",
-    "llvm.loongarch.lsx.vmadd.d" => "__builtin_lsx_vmadd_d",
-    "llvm.loongarch.lsx.vmadd.h" => "__builtin_lsx_vmadd_h",
-    "llvm.loongarch.lsx.vmadd.w" => "__builtin_lsx_vmadd_w",
-    "llvm.loongarch.lsx.vmaddwev.d.w" => "__builtin_lsx_vmaddwev_d_w",
-    "llvm.loongarch.lsx.vmaddwev.d.wu" => "__builtin_lsx_vmaddwev_d_wu",
-    "llvm.loongarch.lsx.vmaddwev.d.wu.w" => "__builtin_lsx_vmaddwev_d_wu_w",
-    "llvm.loongarch.lsx.vmaddwev.h.b" => "__builtin_lsx_vmaddwev_h_b",
-    "llvm.loongarch.lsx.vmaddwev.h.bu" => "__builtin_lsx_vmaddwev_h_bu",
-    "llvm.loongarch.lsx.vmaddwev.h.bu.b" => "__builtin_lsx_vmaddwev_h_bu_b",
-    "llvm.loongarch.lsx.vmaddwev.q.d" => "__builtin_lsx_vmaddwev_q_d",
-    "llvm.loongarch.lsx.vmaddwev.q.du" => "__builtin_lsx_vmaddwev_q_du",
-    "llvm.loongarch.lsx.vmaddwev.q.du.d" => "__builtin_lsx_vmaddwev_q_du_d",
-    "llvm.loongarch.lsx.vmaddwev.w.h" => "__builtin_lsx_vmaddwev_w_h",
-    "llvm.loongarch.lsx.vmaddwev.w.hu" => "__builtin_lsx_vmaddwev_w_hu",
-    "llvm.loongarch.lsx.vmaddwev.w.hu.h" => "__builtin_lsx_vmaddwev_w_hu_h",
-    "llvm.loongarch.lsx.vmaddwod.d.w" => "__builtin_lsx_vmaddwod_d_w",
-    "llvm.loongarch.lsx.vmaddwod.d.wu" => "__builtin_lsx_vmaddwod_d_wu",
-    "llvm.loongarch.lsx.vmaddwod.d.wu.w" => "__builtin_lsx_vmaddwod_d_wu_w",
-    "llvm.loongarch.lsx.vmaddwod.h.b" => "__builtin_lsx_vmaddwod_h_b",
-    "llvm.loongarch.lsx.vmaddwod.h.bu" => "__builtin_lsx_vmaddwod_h_bu",
-    "llvm.loongarch.lsx.vmaddwod.h.bu.b" => "__builtin_lsx_vmaddwod_h_bu_b",
-    "llvm.loongarch.lsx.vmaddwod.q.d" => "__builtin_lsx_vmaddwod_q_d",
-    "llvm.loongarch.lsx.vmaddwod.q.du" => "__builtin_lsx_vmaddwod_q_du",
-    "llvm.loongarch.lsx.vmaddwod.q.du.d" => "__builtin_lsx_vmaddwod_q_du_d",
-    "llvm.loongarch.lsx.vmaddwod.w.h" => "__builtin_lsx_vmaddwod_w_h",
-    "llvm.loongarch.lsx.vmaddwod.w.hu" => "__builtin_lsx_vmaddwod_w_hu",
-    "llvm.loongarch.lsx.vmaddwod.w.hu.h" => "__builtin_lsx_vmaddwod_w_hu_h",
-    "llvm.loongarch.lsx.vmax.b" => "__builtin_lsx_vmax_b",
-    "llvm.loongarch.lsx.vmax.bu" => "__builtin_lsx_vmax_bu",
-    "llvm.loongarch.lsx.vmax.d" => "__builtin_lsx_vmax_d",
-    "llvm.loongarch.lsx.vmax.du" => "__builtin_lsx_vmax_du",
-    "llvm.loongarch.lsx.vmax.h" => "__builtin_lsx_vmax_h",
-    "llvm.loongarch.lsx.vmax.hu" => "__builtin_lsx_vmax_hu",
-    "llvm.loongarch.lsx.vmax.w" => "__builtin_lsx_vmax_w",
-    "llvm.loongarch.lsx.vmax.wu" => "__builtin_lsx_vmax_wu",
-    "llvm.loongarch.lsx.vmaxi.b" => "__builtin_lsx_vmaxi_b",
-    "llvm.loongarch.lsx.vmaxi.bu" => "__builtin_lsx_vmaxi_bu",
-    "llvm.loongarch.lsx.vmaxi.d" => "__builtin_lsx_vmaxi_d",
-    "llvm.loongarch.lsx.vmaxi.du" => "__builtin_lsx_vmaxi_du",
-    "llvm.loongarch.lsx.vmaxi.h" => "__builtin_lsx_vmaxi_h",
-    "llvm.loongarch.lsx.vmaxi.hu" => "__builtin_lsx_vmaxi_hu",
-    "llvm.loongarch.lsx.vmaxi.w" => "__builtin_lsx_vmaxi_w",
-    "llvm.loongarch.lsx.vmaxi.wu" => "__builtin_lsx_vmaxi_wu",
-    "llvm.loongarch.lsx.vmin.b" => "__builtin_lsx_vmin_b",
-    "llvm.loongarch.lsx.vmin.bu" => "__builtin_lsx_vmin_bu",
-    "llvm.loongarch.lsx.vmin.d" => "__builtin_lsx_vmin_d",
-    "llvm.loongarch.lsx.vmin.du" => "__builtin_lsx_vmin_du",
-    "llvm.loongarch.lsx.vmin.h" => "__builtin_lsx_vmin_h",
-    "llvm.loongarch.lsx.vmin.hu" => "__builtin_lsx_vmin_hu",
-    "llvm.loongarch.lsx.vmin.w" => "__builtin_lsx_vmin_w",
-    "llvm.loongarch.lsx.vmin.wu" => "__builtin_lsx_vmin_wu",
-    "llvm.loongarch.lsx.vmini.b" => "__builtin_lsx_vmini_b",
-    "llvm.loongarch.lsx.vmini.bu" => "__builtin_lsx_vmini_bu",
-    "llvm.loongarch.lsx.vmini.d" => "__builtin_lsx_vmini_d",
-    "llvm.loongarch.lsx.vmini.du" => "__builtin_lsx_vmini_du",
-    "llvm.loongarch.lsx.vmini.h" => "__builtin_lsx_vmini_h",
-    "llvm.loongarch.lsx.vmini.hu" => "__builtin_lsx_vmini_hu",
-    "llvm.loongarch.lsx.vmini.w" => "__builtin_lsx_vmini_w",
-    "llvm.loongarch.lsx.vmini.wu" => "__builtin_lsx_vmini_wu",
-    "llvm.loongarch.lsx.vmod.b" => "__builtin_lsx_vmod_b",
-    "llvm.loongarch.lsx.vmod.bu" => "__builtin_lsx_vmod_bu",
-    "llvm.loongarch.lsx.vmod.d" => "__builtin_lsx_vmod_d",
-    "llvm.loongarch.lsx.vmod.du" => "__builtin_lsx_vmod_du",
-    "llvm.loongarch.lsx.vmod.h" => "__builtin_lsx_vmod_h",
-    "llvm.loongarch.lsx.vmod.hu" => "__builtin_lsx_vmod_hu",
-    "llvm.loongarch.lsx.vmod.w" => "__builtin_lsx_vmod_w",
-    "llvm.loongarch.lsx.vmod.wu" => "__builtin_lsx_vmod_wu",
-    "llvm.loongarch.lsx.vmskgez.b" => "__builtin_lsx_vmskgez_b",
-    "llvm.loongarch.lsx.vmskltz.b" => "__builtin_lsx_vmskltz_b",
-    "llvm.loongarch.lsx.vmskltz.d" => "__builtin_lsx_vmskltz_d",
-    "llvm.loongarch.lsx.vmskltz.h" => "__builtin_lsx_vmskltz_h",
-    "llvm.loongarch.lsx.vmskltz.w" => "__builtin_lsx_vmskltz_w",
-    "llvm.loongarch.lsx.vmsknz.b" => "__builtin_lsx_vmsknz_b",
-    "llvm.loongarch.lsx.vmsub.b" => "__builtin_lsx_vmsub_b",
-    "llvm.loongarch.lsx.vmsub.d" => "__builtin_lsx_vmsub_d",
-    "llvm.loongarch.lsx.vmsub.h" => "__builtin_lsx_vmsub_h",
-    "llvm.loongarch.lsx.vmsub.w" => "__builtin_lsx_vmsub_w",
-    "llvm.loongarch.lsx.vmuh.b" => "__builtin_lsx_vmuh_b",
-    "llvm.loongarch.lsx.vmuh.bu" => "__builtin_lsx_vmuh_bu",
-    "llvm.loongarch.lsx.vmuh.d" => "__builtin_lsx_vmuh_d",
-    "llvm.loongarch.lsx.vmuh.du" => "__builtin_lsx_vmuh_du",
-    "llvm.loongarch.lsx.vmuh.h" => "__builtin_lsx_vmuh_h",
-    "llvm.loongarch.lsx.vmuh.hu" => "__builtin_lsx_vmuh_hu",
-    "llvm.loongarch.lsx.vmuh.w" => "__builtin_lsx_vmuh_w",
-    "llvm.loongarch.lsx.vmuh.wu" => "__builtin_lsx_vmuh_wu",
-    "llvm.loongarch.lsx.vmul.b" => "__builtin_lsx_vmul_b",
-    "llvm.loongarch.lsx.vmul.d" => "__builtin_lsx_vmul_d",
-    "llvm.loongarch.lsx.vmul.h" => "__builtin_lsx_vmul_h",
-    "llvm.loongarch.lsx.vmul.w" => "__builtin_lsx_vmul_w",
-    "llvm.loongarch.lsx.vmulwev.d.w" => "__builtin_lsx_vmulwev_d_w",
-    "llvm.loongarch.lsx.vmulwev.d.wu" => "__builtin_lsx_vmulwev_d_wu",
-    "llvm.loongarch.lsx.vmulwev.d.wu.w" => "__builtin_lsx_vmulwev_d_wu_w",
-    "llvm.loongarch.lsx.vmulwev.h.b" => "__builtin_lsx_vmulwev_h_b",
-    "llvm.loongarch.lsx.vmulwev.h.bu" => "__builtin_lsx_vmulwev_h_bu",
-    "llvm.loongarch.lsx.vmulwev.h.bu.b" => "__builtin_lsx_vmulwev_h_bu_b",
-    "llvm.loongarch.lsx.vmulwev.q.d" => "__builtin_lsx_vmulwev_q_d",
-    "llvm.loongarch.lsx.vmulwev.q.du" => "__builtin_lsx_vmulwev_q_du",
-    "llvm.loongarch.lsx.vmulwev.q.du.d" => "__builtin_lsx_vmulwev_q_du_d",
-    "llvm.loongarch.lsx.vmulwev.w.h" => "__builtin_lsx_vmulwev_w_h",
-    "llvm.loongarch.lsx.vmulwev.w.hu" => "__builtin_lsx_vmulwev_w_hu",
-    "llvm.loongarch.lsx.vmulwev.w.hu.h" => "__builtin_lsx_vmulwev_w_hu_h",
-    "llvm.loongarch.lsx.vmulwod.d.w" => "__builtin_lsx_vmulwod_d_w",
-    "llvm.loongarch.lsx.vmulwod.d.wu" => "__builtin_lsx_vmulwod_d_wu",
-    "llvm.loongarch.lsx.vmulwod.d.wu.w" => "__builtin_lsx_vmulwod_d_wu_w",
-    "llvm.loongarch.lsx.vmulwod.h.b" => "__builtin_lsx_vmulwod_h_b",
-    "llvm.loongarch.lsx.vmulwod.h.bu" => "__builtin_lsx_vmulwod_h_bu",
-    "llvm.loongarch.lsx.vmulwod.h.bu.b" => "__builtin_lsx_vmulwod_h_bu_b",
-    "llvm.loongarch.lsx.vmulwod.q.d" => "__builtin_lsx_vmulwod_q_d",
-    "llvm.loongarch.lsx.vmulwod.q.du" => "__builtin_lsx_vmulwod_q_du",
-    "llvm.loongarch.lsx.vmulwod.q.du.d" => "__builtin_lsx_vmulwod_q_du_d",
-    "llvm.loongarch.lsx.vmulwod.w.h" => "__builtin_lsx_vmulwod_w_h",
-    "llvm.loongarch.lsx.vmulwod.w.hu" => "__builtin_lsx_vmulwod_w_hu",
-    "llvm.loongarch.lsx.vmulwod.w.hu.h" => "__builtin_lsx_vmulwod_w_hu_h",
-    "llvm.loongarch.lsx.vneg.b" => "__builtin_lsx_vneg_b",
-    "llvm.loongarch.lsx.vneg.d" => "__builtin_lsx_vneg_d",
-    "llvm.loongarch.lsx.vneg.h" => "__builtin_lsx_vneg_h",
-    "llvm.loongarch.lsx.vneg.w" => "__builtin_lsx_vneg_w",
-    "llvm.loongarch.lsx.vnor.v" => "__builtin_lsx_vnor_v",
-    "llvm.loongarch.lsx.vnori.b" => "__builtin_lsx_vnori_b",
-    "llvm.loongarch.lsx.vor.v" => "__builtin_lsx_vor_v",
-    "llvm.loongarch.lsx.vori.b" => "__builtin_lsx_vori_b",
-    "llvm.loongarch.lsx.vorn.v" => "__builtin_lsx_vorn_v",
-    "llvm.loongarch.lsx.vpackev.b" => "__builtin_lsx_vpackev_b",
-    "llvm.loongarch.lsx.vpackev.d" => "__builtin_lsx_vpackev_d",
-    "llvm.loongarch.lsx.vpackev.h" => "__builtin_lsx_vpackev_h",
-    "llvm.loongarch.lsx.vpackev.w" => "__builtin_lsx_vpackev_w",
-    "llvm.loongarch.lsx.vpackod.b" => "__builtin_lsx_vpackod_b",
-    "llvm.loongarch.lsx.vpackod.d" => "__builtin_lsx_vpackod_d",
-    "llvm.loongarch.lsx.vpackod.h" => "__builtin_lsx_vpackod_h",
-    "llvm.loongarch.lsx.vpackod.w" => "__builtin_lsx_vpackod_w",
-    "llvm.loongarch.lsx.vpcnt.b" => "__builtin_lsx_vpcnt_b",
-    "llvm.loongarch.lsx.vpcnt.d" => "__builtin_lsx_vpcnt_d",
-    "llvm.loongarch.lsx.vpcnt.h" => "__builtin_lsx_vpcnt_h",
-    "llvm.loongarch.lsx.vpcnt.w" => "__builtin_lsx_vpcnt_w",
-    "llvm.loongarch.lsx.vpermi.w" => "__builtin_lsx_vpermi_w",
-    "llvm.loongarch.lsx.vpickev.b" => "__builtin_lsx_vpickev_b",
-    "llvm.loongarch.lsx.vpickev.d" => "__builtin_lsx_vpickev_d",
-    "llvm.loongarch.lsx.vpickev.h" => "__builtin_lsx_vpickev_h",
-    "llvm.loongarch.lsx.vpickev.w" => "__builtin_lsx_vpickev_w",
-    "llvm.loongarch.lsx.vpickod.b" => "__builtin_lsx_vpickod_b",
-    "llvm.loongarch.lsx.vpickod.d" => "__builtin_lsx_vpickod_d",
-    "llvm.loongarch.lsx.vpickod.h" => "__builtin_lsx_vpickod_h",
-    "llvm.loongarch.lsx.vpickod.w" => "__builtin_lsx_vpickod_w",
-    "llvm.loongarch.lsx.vpickve2gr.b" => "__builtin_lsx_vpickve2gr_b",
-    "llvm.loongarch.lsx.vpickve2gr.bu" => "__builtin_lsx_vpickve2gr_bu",
-    "llvm.loongarch.lsx.vpickve2gr.d" => "__builtin_lsx_vpickve2gr_d",
-    "llvm.loongarch.lsx.vpickve2gr.du" => "__builtin_lsx_vpickve2gr_du",
-    "llvm.loongarch.lsx.vpickve2gr.h" => "__builtin_lsx_vpickve2gr_h",
-    "llvm.loongarch.lsx.vpickve2gr.hu" => "__builtin_lsx_vpickve2gr_hu",
-    "llvm.loongarch.lsx.vpickve2gr.w" => "__builtin_lsx_vpickve2gr_w",
-    "llvm.loongarch.lsx.vpickve2gr.wu" => "__builtin_lsx_vpickve2gr_wu",
-    "llvm.loongarch.lsx.vreplgr2vr.b" => "__builtin_lsx_vreplgr2vr_b",
-    "llvm.loongarch.lsx.vreplgr2vr.d" => "__builtin_lsx_vreplgr2vr_d",
-    "llvm.loongarch.lsx.vreplgr2vr.h" => "__builtin_lsx_vreplgr2vr_h",
-    "llvm.loongarch.lsx.vreplgr2vr.w" => "__builtin_lsx_vreplgr2vr_w",
-    "llvm.loongarch.lsx.vrepli.b" => "__builtin_lsx_vrepli_b",
-    "llvm.loongarch.lsx.vrepli.d" => "__builtin_lsx_vrepli_d",
-    "llvm.loongarch.lsx.vrepli.h" => "__builtin_lsx_vrepli_h",
-    "llvm.loongarch.lsx.vrepli.w" => "__builtin_lsx_vrepli_w",
-    "llvm.loongarch.lsx.vreplve.b" => "__builtin_lsx_vreplve_b",
-    "llvm.loongarch.lsx.vreplve.d" => "__builtin_lsx_vreplve_d",
-    "llvm.loongarch.lsx.vreplve.h" => "__builtin_lsx_vreplve_h",
-    "llvm.loongarch.lsx.vreplve.w" => "__builtin_lsx_vreplve_w",
-    "llvm.loongarch.lsx.vreplvei.b" => "__builtin_lsx_vreplvei_b",
-    "llvm.loongarch.lsx.vreplvei.d" => "__builtin_lsx_vreplvei_d",
-    "llvm.loongarch.lsx.vreplvei.h" => "__builtin_lsx_vreplvei_h",
-    "llvm.loongarch.lsx.vreplvei.w" => "__builtin_lsx_vreplvei_w",
-    "llvm.loongarch.lsx.vrotr.b" => "__builtin_lsx_vrotr_b",
-    "llvm.loongarch.lsx.vrotr.d" => "__builtin_lsx_vrotr_d",
-    "llvm.loongarch.lsx.vrotr.h" => "__builtin_lsx_vrotr_h",
-    "llvm.loongarch.lsx.vrotr.w" => "__builtin_lsx_vrotr_w",
-    "llvm.loongarch.lsx.vrotri.b" => "__builtin_lsx_vrotri_b",
-    "llvm.loongarch.lsx.vrotri.d" => "__builtin_lsx_vrotri_d",
-    "llvm.loongarch.lsx.vrotri.h" => "__builtin_lsx_vrotri_h",
-    "llvm.loongarch.lsx.vrotri.w" => "__builtin_lsx_vrotri_w",
-    "llvm.loongarch.lsx.vsadd.b" => "__builtin_lsx_vsadd_b",
-    "llvm.loongarch.lsx.vsadd.bu" => "__builtin_lsx_vsadd_bu",
-    "llvm.loongarch.lsx.vsadd.d" => "__builtin_lsx_vsadd_d",
-    "llvm.loongarch.lsx.vsadd.du" => "__builtin_lsx_vsadd_du",
-    "llvm.loongarch.lsx.vsadd.h" => "__builtin_lsx_vsadd_h",
-    "llvm.loongarch.lsx.vsadd.hu" => "__builtin_lsx_vsadd_hu",
-    "llvm.loongarch.lsx.vsadd.w" => "__builtin_lsx_vsadd_w",
-    "llvm.loongarch.lsx.vsadd.wu" => "__builtin_lsx_vsadd_wu",
-    "llvm.loongarch.lsx.vsat.b" => "__builtin_lsx_vsat_b",
-    "llvm.loongarch.lsx.vsat.bu" => "__builtin_lsx_vsat_bu",
-    "llvm.loongarch.lsx.vsat.d" => "__builtin_lsx_vsat_d",
-    "llvm.loongarch.lsx.vsat.du" => "__builtin_lsx_vsat_du",
-    "llvm.loongarch.lsx.vsat.h" => "__builtin_lsx_vsat_h",
-    "llvm.loongarch.lsx.vsat.hu" => "__builtin_lsx_vsat_hu",
-    "llvm.loongarch.lsx.vsat.w" => "__builtin_lsx_vsat_w",
-    "llvm.loongarch.lsx.vsat.wu" => "__builtin_lsx_vsat_wu",
-    "llvm.loongarch.lsx.vseq.b" => "__builtin_lsx_vseq_b",
-    "llvm.loongarch.lsx.vseq.d" => "__builtin_lsx_vseq_d",
-    "llvm.loongarch.lsx.vseq.h" => "__builtin_lsx_vseq_h",
-    "llvm.loongarch.lsx.vseq.w" => "__builtin_lsx_vseq_w",
-    "llvm.loongarch.lsx.vseqi.b" => "__builtin_lsx_vseqi_b",
-    "llvm.loongarch.lsx.vseqi.d" => "__builtin_lsx_vseqi_d",
-    "llvm.loongarch.lsx.vseqi.h" => "__builtin_lsx_vseqi_h",
-    "llvm.loongarch.lsx.vseqi.w" => "__builtin_lsx_vseqi_w",
-    "llvm.loongarch.lsx.vshuf.b" => "__builtin_lsx_vshuf_b",
-    "llvm.loongarch.lsx.vshuf.d" => "__builtin_lsx_vshuf_d",
-    "llvm.loongarch.lsx.vshuf.h" => "__builtin_lsx_vshuf_h",
-    "llvm.loongarch.lsx.vshuf.w" => "__builtin_lsx_vshuf_w",
-    "llvm.loongarch.lsx.vshuf4i.b" => "__builtin_lsx_vshuf4i_b",
-    "llvm.loongarch.lsx.vshuf4i.d" => "__builtin_lsx_vshuf4i_d",
-    "llvm.loongarch.lsx.vshuf4i.h" => "__builtin_lsx_vshuf4i_h",
-    "llvm.loongarch.lsx.vshuf4i.w" => "__builtin_lsx_vshuf4i_w",
-    "llvm.loongarch.lsx.vsigncov.b" => "__builtin_lsx_vsigncov_b",
-    "llvm.loongarch.lsx.vsigncov.d" => "__builtin_lsx_vsigncov_d",
-    "llvm.loongarch.lsx.vsigncov.h" => "__builtin_lsx_vsigncov_h",
-    "llvm.loongarch.lsx.vsigncov.w" => "__builtin_lsx_vsigncov_w",
-    "llvm.loongarch.lsx.vsle.b" => "__builtin_lsx_vsle_b",
-    "llvm.loongarch.lsx.vsle.bu" => "__builtin_lsx_vsle_bu",
-    "llvm.loongarch.lsx.vsle.d" => "__builtin_lsx_vsle_d",
-    "llvm.loongarch.lsx.vsle.du" => "__builtin_lsx_vsle_du",
-    "llvm.loongarch.lsx.vsle.h" => "__builtin_lsx_vsle_h",
-    "llvm.loongarch.lsx.vsle.hu" => "__builtin_lsx_vsle_hu",
-    "llvm.loongarch.lsx.vsle.w" => "__builtin_lsx_vsle_w",
-    "llvm.loongarch.lsx.vsle.wu" => "__builtin_lsx_vsle_wu",
-    "llvm.loongarch.lsx.vslei.b" => "__builtin_lsx_vslei_b",
-    "llvm.loongarch.lsx.vslei.bu" => "__builtin_lsx_vslei_bu",
-    "llvm.loongarch.lsx.vslei.d" => "__builtin_lsx_vslei_d",
-    "llvm.loongarch.lsx.vslei.du" => "__builtin_lsx_vslei_du",
-    "llvm.loongarch.lsx.vslei.h" => "__builtin_lsx_vslei_h",
-    "llvm.loongarch.lsx.vslei.hu" => "__builtin_lsx_vslei_hu",
-    "llvm.loongarch.lsx.vslei.w" => "__builtin_lsx_vslei_w",
-    "llvm.loongarch.lsx.vslei.wu" => "__builtin_lsx_vslei_wu",
-    "llvm.loongarch.lsx.vsll.b" => "__builtin_lsx_vsll_b",
-    "llvm.loongarch.lsx.vsll.d" => "__builtin_lsx_vsll_d",
-    "llvm.loongarch.lsx.vsll.h" => "__builtin_lsx_vsll_h",
-    "llvm.loongarch.lsx.vsll.w" => "__builtin_lsx_vsll_w",
-    "llvm.loongarch.lsx.vslli.b" => "__builtin_lsx_vslli_b",
-    "llvm.loongarch.lsx.vslli.d" => "__builtin_lsx_vslli_d",
-    "llvm.loongarch.lsx.vslli.h" => "__builtin_lsx_vslli_h",
-    "llvm.loongarch.lsx.vslli.w" => "__builtin_lsx_vslli_w",
-    "llvm.loongarch.lsx.vsllwil.d.w" => "__builtin_lsx_vsllwil_d_w",
-    "llvm.loongarch.lsx.vsllwil.du.wu" => "__builtin_lsx_vsllwil_du_wu",
-    "llvm.loongarch.lsx.vsllwil.h.b" => "__builtin_lsx_vsllwil_h_b",
-    "llvm.loongarch.lsx.vsllwil.hu.bu" => "__builtin_lsx_vsllwil_hu_bu",
-    "llvm.loongarch.lsx.vsllwil.w.h" => "__builtin_lsx_vsllwil_w_h",
-    "llvm.loongarch.lsx.vsllwil.wu.hu" => "__builtin_lsx_vsllwil_wu_hu",
-    "llvm.loongarch.lsx.vslt.b" => "__builtin_lsx_vslt_b",
-    "llvm.loongarch.lsx.vslt.bu" => "__builtin_lsx_vslt_bu",
-    "llvm.loongarch.lsx.vslt.d" => "__builtin_lsx_vslt_d",
-    "llvm.loongarch.lsx.vslt.du" => "__builtin_lsx_vslt_du",
-    "llvm.loongarch.lsx.vslt.h" => "__builtin_lsx_vslt_h",
-    "llvm.loongarch.lsx.vslt.hu" => "__builtin_lsx_vslt_hu",
-    "llvm.loongarch.lsx.vslt.w" => "__builtin_lsx_vslt_w",
-    "llvm.loongarch.lsx.vslt.wu" => "__builtin_lsx_vslt_wu",
-    "llvm.loongarch.lsx.vslti.b" => "__builtin_lsx_vslti_b",
-    "llvm.loongarch.lsx.vslti.bu" => "__builtin_lsx_vslti_bu",
-    "llvm.loongarch.lsx.vslti.d" => "__builtin_lsx_vslti_d",
-    "llvm.loongarch.lsx.vslti.du" => "__builtin_lsx_vslti_du",
-    "llvm.loongarch.lsx.vslti.h" => "__builtin_lsx_vslti_h",
-    "llvm.loongarch.lsx.vslti.hu" => "__builtin_lsx_vslti_hu",
-    "llvm.loongarch.lsx.vslti.w" => "__builtin_lsx_vslti_w",
-    "llvm.loongarch.lsx.vslti.wu" => "__builtin_lsx_vslti_wu",
-    "llvm.loongarch.lsx.vsra.b" => "__builtin_lsx_vsra_b",
-    "llvm.loongarch.lsx.vsra.d" => "__builtin_lsx_vsra_d",
-    "llvm.loongarch.lsx.vsra.h" => "__builtin_lsx_vsra_h",
-    "llvm.loongarch.lsx.vsra.w" => "__builtin_lsx_vsra_w",
-    "llvm.loongarch.lsx.vsrai.b" => "__builtin_lsx_vsrai_b",
-    "llvm.loongarch.lsx.vsrai.d" => "__builtin_lsx_vsrai_d",
-    "llvm.loongarch.lsx.vsrai.h" => "__builtin_lsx_vsrai_h",
-    "llvm.loongarch.lsx.vsrai.w" => "__builtin_lsx_vsrai_w",
-    "llvm.loongarch.lsx.vsran.b.h" => "__builtin_lsx_vsran_b_h",
-    "llvm.loongarch.lsx.vsran.h.w" => "__builtin_lsx_vsran_h_w",
-    "llvm.loongarch.lsx.vsran.w.d" => "__builtin_lsx_vsran_w_d",
-    "llvm.loongarch.lsx.vsrani.b.h" => "__builtin_lsx_vsrani_b_h",
-    "llvm.loongarch.lsx.vsrani.d.q" => "__builtin_lsx_vsrani_d_q",
-    "llvm.loongarch.lsx.vsrani.h.w" => "__builtin_lsx_vsrani_h_w",
-    "llvm.loongarch.lsx.vsrani.w.d" => "__builtin_lsx_vsrani_w_d",
-    "llvm.loongarch.lsx.vsrar.b" => "__builtin_lsx_vsrar_b",
-    "llvm.loongarch.lsx.vsrar.d" => "__builtin_lsx_vsrar_d",
-    "llvm.loongarch.lsx.vsrar.h" => "__builtin_lsx_vsrar_h",
-    "llvm.loongarch.lsx.vsrar.w" => "__builtin_lsx_vsrar_w",
-    "llvm.loongarch.lsx.vsrari.b" => "__builtin_lsx_vsrari_b",
-    "llvm.loongarch.lsx.vsrari.d" => "__builtin_lsx_vsrari_d",
-    "llvm.loongarch.lsx.vsrari.h" => "__builtin_lsx_vsrari_h",
-    "llvm.loongarch.lsx.vsrari.w" => "__builtin_lsx_vsrari_w",
-    "llvm.loongarch.lsx.vsrarn.b.h" => "__builtin_lsx_vsrarn_b_h",
-    "llvm.loongarch.lsx.vsrarn.h.w" => "__builtin_lsx_vsrarn_h_w",
-    "llvm.loongarch.lsx.vsrarn.w.d" => "__builtin_lsx_vsrarn_w_d",
-    "llvm.loongarch.lsx.vsrarni.b.h" => "__builtin_lsx_vsrarni_b_h",
-    "llvm.loongarch.lsx.vsrarni.d.q" => "__builtin_lsx_vsrarni_d_q",
-    "llvm.loongarch.lsx.vsrarni.h.w" => "__builtin_lsx_vsrarni_h_w",
-    "llvm.loongarch.lsx.vsrarni.w.d" => "__builtin_lsx_vsrarni_w_d",
-    "llvm.loongarch.lsx.vsrl.b" => "__builtin_lsx_vsrl_b",
-    "llvm.loongarch.lsx.vsrl.d" => "__builtin_lsx_vsrl_d",
-    "llvm.loongarch.lsx.vsrl.h" => "__builtin_lsx_vsrl_h",
-    "llvm.loongarch.lsx.vsrl.w" => "__builtin_lsx_vsrl_w",
-    "llvm.loongarch.lsx.vsrli.b" => "__builtin_lsx_vsrli_b",
-    "llvm.loongarch.lsx.vsrli.d" => "__builtin_lsx_vsrli_d",
-    "llvm.loongarch.lsx.vsrli.h" => "__builtin_lsx_vsrli_h",
-    "llvm.loongarch.lsx.vsrli.w" => "__builtin_lsx_vsrli_w",
-    "llvm.loongarch.lsx.vsrln.b.h" => "__builtin_lsx_vsrln_b_h",
-    "llvm.loongarch.lsx.vsrln.h.w" => "__builtin_lsx_vsrln_h_w",
-    "llvm.loongarch.lsx.vsrln.w.d" => "__builtin_lsx_vsrln_w_d",
-    "llvm.loongarch.lsx.vsrlni.b.h" => "__builtin_lsx_vsrlni_b_h",
-    "llvm.loongarch.lsx.vsrlni.d.q" => "__builtin_lsx_vsrlni_d_q",
-    "llvm.loongarch.lsx.vsrlni.h.w" => "__builtin_lsx_vsrlni_h_w",
-    "llvm.loongarch.lsx.vsrlni.w.d" => "__builtin_lsx_vsrlni_w_d",
-    "llvm.loongarch.lsx.vsrlr.b" => "__builtin_lsx_vsrlr_b",
-    "llvm.loongarch.lsx.vsrlr.d" => "__builtin_lsx_vsrlr_d",
-    "llvm.loongarch.lsx.vsrlr.h" => "__builtin_lsx_vsrlr_h",
-    "llvm.loongarch.lsx.vsrlr.w" => "__builtin_lsx_vsrlr_w",
-    "llvm.loongarch.lsx.vsrlri.b" => "__builtin_lsx_vsrlri_b",
-    "llvm.loongarch.lsx.vsrlri.d" => "__builtin_lsx_vsrlri_d",
-    "llvm.loongarch.lsx.vsrlri.h" => "__builtin_lsx_vsrlri_h",
-    "llvm.loongarch.lsx.vsrlri.w" => "__builtin_lsx_vsrlri_w",
-    "llvm.loongarch.lsx.vsrlrn.b.h" => "__builtin_lsx_vsrlrn_b_h",
-    "llvm.loongarch.lsx.vsrlrn.h.w" => "__builtin_lsx_vsrlrn_h_w",
-    "llvm.loongarch.lsx.vsrlrn.w.d" => "__builtin_lsx_vsrlrn_w_d",
-    "llvm.loongarch.lsx.vsrlrni.b.h" => "__builtin_lsx_vsrlrni_b_h",
-    "llvm.loongarch.lsx.vsrlrni.d.q" => "__builtin_lsx_vsrlrni_d_q",
-    "llvm.loongarch.lsx.vsrlrni.h.w" => "__builtin_lsx_vsrlrni_h_w",
-    "llvm.loongarch.lsx.vsrlrni.w.d" => "__builtin_lsx_vsrlrni_w_d",
-    "llvm.loongarch.lsx.vssran.b.h" => "__builtin_lsx_vssran_b_h",
-    "llvm.loongarch.lsx.vssran.bu.h" => "__builtin_lsx_vssran_bu_h",
-    "llvm.loongarch.lsx.vssran.h.w" => "__builtin_lsx_vssran_h_w",
-    "llvm.loongarch.lsx.vssran.hu.w" => "__builtin_lsx_vssran_hu_w",
-    "llvm.loongarch.lsx.vssran.w.d" => "__builtin_lsx_vssran_w_d",
-    "llvm.loongarch.lsx.vssran.wu.d" => "__builtin_lsx_vssran_wu_d",
-    "llvm.loongarch.lsx.vssrani.b.h" => "__builtin_lsx_vssrani_b_h",
-    "llvm.loongarch.lsx.vssrani.bu.h" => "__builtin_lsx_vssrani_bu_h",
-    "llvm.loongarch.lsx.vssrani.d.q" => "__builtin_lsx_vssrani_d_q",
-    "llvm.loongarch.lsx.vssrani.du.q" => "__builtin_lsx_vssrani_du_q",
-    "llvm.loongarch.lsx.vssrani.h.w" => "__builtin_lsx_vssrani_h_w",
-    "llvm.loongarch.lsx.vssrani.hu.w" => "__builtin_lsx_vssrani_hu_w",
-    "llvm.loongarch.lsx.vssrani.w.d" => "__builtin_lsx_vssrani_w_d",
-    "llvm.loongarch.lsx.vssrani.wu.d" => "__builtin_lsx_vssrani_wu_d",
-    "llvm.loongarch.lsx.vssrarn.b.h" => "__builtin_lsx_vssrarn_b_h",
-    "llvm.loongarch.lsx.vssrarn.bu.h" => "__builtin_lsx_vssrarn_bu_h",
-    "llvm.loongarch.lsx.vssrarn.h.w" => "__builtin_lsx_vssrarn_h_w",
-    "llvm.loongarch.lsx.vssrarn.hu.w" => "__builtin_lsx_vssrarn_hu_w",
-    "llvm.loongarch.lsx.vssrarn.w.d" => "__builtin_lsx_vssrarn_w_d",
-    "llvm.loongarch.lsx.vssrarn.wu.d" => "__builtin_lsx_vssrarn_wu_d",
-    "llvm.loongarch.lsx.vssrarni.b.h" => "__builtin_lsx_vssrarni_b_h",
-    "llvm.loongarch.lsx.vssrarni.bu.h" => "__builtin_lsx_vssrarni_bu_h",
-    "llvm.loongarch.lsx.vssrarni.d.q" => "__builtin_lsx_vssrarni_d_q",
-    "llvm.loongarch.lsx.vssrarni.du.q" => "__builtin_lsx_vssrarni_du_q",
-    "llvm.loongarch.lsx.vssrarni.h.w" => "__builtin_lsx_vssrarni_h_w",
-    "llvm.loongarch.lsx.vssrarni.hu.w" => "__builtin_lsx_vssrarni_hu_w",
-    "llvm.loongarch.lsx.vssrarni.w.d" => "__builtin_lsx_vssrarni_w_d",
-    "llvm.loongarch.lsx.vssrarni.wu.d" => "__builtin_lsx_vssrarni_wu_d",
-    "llvm.loongarch.lsx.vssrln.b.h" => "__builtin_lsx_vssrln_b_h",
-    "llvm.loongarch.lsx.vssrln.bu.h" => "__builtin_lsx_vssrln_bu_h",
-    "llvm.loongarch.lsx.vssrln.h.w" => "__builtin_lsx_vssrln_h_w",
-    "llvm.loongarch.lsx.vssrln.hu.w" => "__builtin_lsx_vssrln_hu_w",
-    "llvm.loongarch.lsx.vssrln.w.d" => "__builtin_lsx_vssrln_w_d",
-    "llvm.loongarch.lsx.vssrln.wu.d" => "__builtin_lsx_vssrln_wu_d",
-    "llvm.loongarch.lsx.vssrlni.b.h" => "__builtin_lsx_vssrlni_b_h",
-    "llvm.loongarch.lsx.vssrlni.bu.h" => "__builtin_lsx_vssrlni_bu_h",
-    "llvm.loongarch.lsx.vssrlni.d.q" => "__builtin_lsx_vssrlni_d_q",
-    "llvm.loongarch.lsx.vssrlni.du.q" => "__builtin_lsx_vssrlni_du_q",
-    "llvm.loongarch.lsx.vssrlni.h.w" => "__builtin_lsx_vssrlni_h_w",
-    "llvm.loongarch.lsx.vssrlni.hu.w" => "__builtin_lsx_vssrlni_hu_w",
-    "llvm.loongarch.lsx.vssrlni.w.d" => "__builtin_lsx_vssrlni_w_d",
-    "llvm.loongarch.lsx.vssrlni.wu.d" => "__builtin_lsx_vssrlni_wu_d",
-    "llvm.loongarch.lsx.vssrlrn.b.h" => "__builtin_lsx_vssrlrn_b_h",
-    "llvm.loongarch.lsx.vssrlrn.bu.h" => "__builtin_lsx_vssrlrn_bu_h",
-    "llvm.loongarch.lsx.vssrlrn.h.w" => "__builtin_lsx_vssrlrn_h_w",
-    "llvm.loongarch.lsx.vssrlrn.hu.w" => "__builtin_lsx_vssrlrn_hu_w",
-    "llvm.loongarch.lsx.vssrlrn.w.d" => "__builtin_lsx_vssrlrn_w_d",
-    "llvm.loongarch.lsx.vssrlrn.wu.d" => "__builtin_lsx_vssrlrn_wu_d",
-    "llvm.loongarch.lsx.vssrlrni.b.h" => "__builtin_lsx_vssrlrni_b_h",
-    "llvm.loongarch.lsx.vssrlrni.bu.h" => "__builtin_lsx_vssrlrni_bu_h",
-    "llvm.loongarch.lsx.vssrlrni.d.q" => "__builtin_lsx_vssrlrni_d_q",
-    "llvm.loongarch.lsx.vssrlrni.du.q" => "__builtin_lsx_vssrlrni_du_q",
-    "llvm.loongarch.lsx.vssrlrni.h.w" => "__builtin_lsx_vssrlrni_h_w",
-    "llvm.loongarch.lsx.vssrlrni.hu.w" => "__builtin_lsx_vssrlrni_hu_w",
-    "llvm.loongarch.lsx.vssrlrni.w.d" => "__builtin_lsx_vssrlrni_w_d",
-    "llvm.loongarch.lsx.vssrlrni.wu.d" => "__builtin_lsx_vssrlrni_wu_d",
-    "llvm.loongarch.lsx.vssub.b" => "__builtin_lsx_vssub_b",
-    "llvm.loongarch.lsx.vssub.bu" => "__builtin_lsx_vssub_bu",
-    "llvm.loongarch.lsx.vssub.d" => "__builtin_lsx_vssub_d",
-    "llvm.loongarch.lsx.vssub.du" => "__builtin_lsx_vssub_du",
-    "llvm.loongarch.lsx.vssub.h" => "__builtin_lsx_vssub_h",
-    "llvm.loongarch.lsx.vssub.hu" => "__builtin_lsx_vssub_hu",
-    "llvm.loongarch.lsx.vssub.w" => "__builtin_lsx_vssub_w",
-    "llvm.loongarch.lsx.vssub.wu" => "__builtin_lsx_vssub_wu",
-    "llvm.loongarch.lsx.vst" => "__builtin_lsx_vst",
-    "llvm.loongarch.lsx.vstelm.b" => "__builtin_lsx_vstelm_b",
-    "llvm.loongarch.lsx.vstelm.d" => "__builtin_lsx_vstelm_d",
-    "llvm.loongarch.lsx.vstelm.h" => "__builtin_lsx_vstelm_h",
-    "llvm.loongarch.lsx.vstelm.w" => "__builtin_lsx_vstelm_w",
-    "llvm.loongarch.lsx.vstx" => "__builtin_lsx_vstx",
-    "llvm.loongarch.lsx.vsub.b" => "__builtin_lsx_vsub_b",
-    "llvm.loongarch.lsx.vsub.d" => "__builtin_lsx_vsub_d",
-    "llvm.loongarch.lsx.vsub.h" => "__builtin_lsx_vsub_h",
-    "llvm.loongarch.lsx.vsub.q" => "__builtin_lsx_vsub_q",
-    "llvm.loongarch.lsx.vsub.w" => "__builtin_lsx_vsub_w",
-    "llvm.loongarch.lsx.vsubi.bu" => "__builtin_lsx_vsubi_bu",
-    "llvm.loongarch.lsx.vsubi.du" => "__builtin_lsx_vsubi_du",
-    "llvm.loongarch.lsx.vsubi.hu" => "__builtin_lsx_vsubi_hu",
-    "llvm.loongarch.lsx.vsubi.wu" => "__builtin_lsx_vsubi_wu",
-    "llvm.loongarch.lsx.vsubwev.d.w" => "__builtin_lsx_vsubwev_d_w",
-    "llvm.loongarch.lsx.vsubwev.d.wu" => "__builtin_lsx_vsubwev_d_wu",
-    "llvm.loongarch.lsx.vsubwev.h.b" => "__builtin_lsx_vsubwev_h_b",
-    "llvm.loongarch.lsx.vsubwev.h.bu" => "__builtin_lsx_vsubwev_h_bu",
-    "llvm.loongarch.lsx.vsubwev.q.d" => "__builtin_lsx_vsubwev_q_d",
-    "llvm.loongarch.lsx.vsubwev.q.du" => "__builtin_lsx_vsubwev_q_du",
-    "llvm.loongarch.lsx.vsubwev.w.h" => "__builtin_lsx_vsubwev_w_h",
-    "llvm.loongarch.lsx.vsubwev.w.hu" => "__builtin_lsx_vsubwev_w_hu",
-    "llvm.loongarch.lsx.vsubwod.d.w" => "__builtin_lsx_vsubwod_d_w",
-    "llvm.loongarch.lsx.vsubwod.d.wu" => "__builtin_lsx_vsubwod_d_wu",
-    "llvm.loongarch.lsx.vsubwod.h.b" => "__builtin_lsx_vsubwod_h_b",
-    "llvm.loongarch.lsx.vsubwod.h.bu" => "__builtin_lsx_vsubwod_h_bu",
-    "llvm.loongarch.lsx.vsubwod.q.d" => "__builtin_lsx_vsubwod_q_d",
-    "llvm.loongarch.lsx.vsubwod.q.du" => "__builtin_lsx_vsubwod_q_du",
-    "llvm.loongarch.lsx.vsubwod.w.h" => "__builtin_lsx_vsubwod_w_h",
-    "llvm.loongarch.lsx.vsubwod.w.hu" => "__builtin_lsx_vsubwod_w_hu",
-    "llvm.loongarch.lsx.vxor.v" => "__builtin_lsx_vxor_v",
-    "llvm.loongarch.lsx.vxori.b" => "__builtin_lsx_vxori_b",
-    "llvm.loongarch.movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
-    "llvm.loongarch.movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
-    "llvm.loongarch.syscall" => "__builtin_loongarch_syscall",
-    // mips
-    "llvm.mips.absq.s.ph" => "__builtin_mips_absq_s_ph",
-    "llvm.mips.absq.s.qb" => "__builtin_mips_absq_s_qb",
-    "llvm.mips.absq.s.w" => "__builtin_mips_absq_s_w",
-    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
-    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
-    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
-    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
-    "llvm.mips.addq.ph" => "__builtin_mips_addq_ph",
-    "llvm.mips.addq.s.ph" => "__builtin_mips_addq_s_ph",
-    "llvm.mips.addq.s.w" => "__builtin_mips_addq_s_w",
-    "llvm.mips.addqh.ph" => "__builtin_mips_addqh_ph",
-    "llvm.mips.addqh.r.ph" => "__builtin_mips_addqh_r_ph",
-    "llvm.mips.addqh.r.w" => "__builtin_mips_addqh_r_w",
-    "llvm.mips.addqh.w" => "__builtin_mips_addqh_w",
-    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
-    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
-    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
-    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
-    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
-    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
-    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
-    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
-    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
-    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
-    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
-    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
-    "llvm.mips.addsc" => "__builtin_mips_addsc",
-    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
-    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
-    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
-    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
-    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
-    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
-    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
-    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
-    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
-    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
-    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
-    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
-    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
-    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
-    "llvm.mips.addwc" => "__builtin_mips_addwc",
-    "llvm.mips.and.v" => "__builtin_msa_and_v",
-    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
-    "llvm.mips.append" => "__builtin_mips_append",
-    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
-    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
-    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
-    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
-    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
-    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
-    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
-    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
-    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
-    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
-    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
-    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
-    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
-    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
-    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
-    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
-    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
-    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
-    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
-    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
-    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
-    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
-    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
-    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
-    "llvm.mips.balign" => "__builtin_mips_balign",
-    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
-    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
-    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
-    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
-    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
-    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
-    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
-    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
-    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
-    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
-    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
-    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
-    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
-    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
-    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
-    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
-    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
-    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
-    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
-    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
-    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
-    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
-    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
-    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
-    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
-    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
-    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
-    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
-    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
-    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
-    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
-    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
-    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
-    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
-    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
-    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
-    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
-    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
-    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
-    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
-    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
-    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
-    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
-    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
-    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
-    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
-    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
-    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
-    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
-    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
-    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
-    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
-    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
-    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
-    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
-    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
-    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
-    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
-    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
-    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
-    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
-    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
-    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
-    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
-    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
-    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
-    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
-    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
-    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
-    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
-    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
-    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
-    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
-    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
-    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
-    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
-    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
-    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
-    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
-    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
-    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
-    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
-    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
-    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
-    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
-    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
-    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
-    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
-    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
-    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
-    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
-    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
-    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
-    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
-    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
-    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
-    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
-    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
-    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
-    "llvm.mips.cmp.eq.ph" => "__builtin_mips_cmp_eq_ph",
-    "llvm.mips.cmp.le.ph" => "__builtin_mips_cmp_le_ph",
-    "llvm.mips.cmp.lt.ph" => "__builtin_mips_cmp_lt_ph",
-    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
-    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
-    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
-    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
-    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
-    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
-    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
-    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
-    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
-    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
-    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
-    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
-    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
-    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
-    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
-    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
-    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
-    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
-    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
-    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
-    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
-    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
-    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
-    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
-    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
-    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
-    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
-    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
-    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
-    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
-    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
-    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
-    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
-    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
-    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
-    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
-    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
-    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
-    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
-    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
-    "llvm.mips.dpaq.s.w.ph" => "__builtin_mips_dpaq_s_w_ph",
-    "llvm.mips.dpaq.sa.l.w" => "__builtin_mips_dpaq_sa_l_w",
-    "llvm.mips.dpaqx.s.w.ph" => "__builtin_mips_dpaqx_s_w_ph",
-    "llvm.mips.dpaqx.sa.w.ph" => "__builtin_mips_dpaqx_sa_w_ph",
-    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
-    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
-    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
-    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
-    "llvm.mips.dpsq.s.w.ph" => "__builtin_mips_dpsq_s_w_ph",
-    "llvm.mips.dpsq.sa.l.w" => "__builtin_mips_dpsq_sa_l_w",
-    "llvm.mips.dpsqx.s.w.ph" => "__builtin_mips_dpsqx_s_w_ph",
-    "llvm.mips.dpsqx.sa.w.ph" => "__builtin_mips_dpsqx_sa_w_ph",
-    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
-    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
-    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
-    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
-    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
-    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
-    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
-    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
-    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
-    "llvm.mips.extp" => "__builtin_mips_extp",
-    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
-    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
-    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
-    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
-    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
-    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
-    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
-    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
-    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
-    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
-    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
-    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
-    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
-    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
-    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
-    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
-    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
-    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
-    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
-    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
-    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
-    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
-    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
-    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
-    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
-    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
-    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
-    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
-    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
-    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
-    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
-    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
-    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
-    "llvm.mips.fexdo.h" => "__builtin_msa_fexdo_h",
-    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
-    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
-    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
-    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
-    "llvm.mips.fexupl.w" => "__builtin_msa_fexupl_w",
-    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
-    "llvm.mips.fexupr.w" => "__builtin_msa_fexupr_w",
-    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
-    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
-    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
-    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
-    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
-    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
-    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
-    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
-    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
-    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
-    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
-    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
-    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
-    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
-    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
-    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
-    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
-    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
-    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
-    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
-    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
-    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
-    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
-    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
-    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
-    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
-    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
-    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
-    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
-    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
-    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
-    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
-    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
-    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
-    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
-    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
-    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
-    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
-    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
-    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
-    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
-    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
-    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
-    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
-    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
-    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
-    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
-    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
-    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
-    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
-    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
-    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
-    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
-    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
-    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
-    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
-    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
-    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
-    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
-    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
-    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
-    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
-    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
-    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
-    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
-    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
-    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
-    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
-    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
-    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
-    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
-    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
-    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
-    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
-    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
-    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
-    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
-    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
-    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
-    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
-    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
-    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
-    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
-    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
-    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
-    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
-    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
-    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
-    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
-    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
-    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
-    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
-    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
-    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
-    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
-    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
-    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
-    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
-    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
-    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
-    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
-    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
-    "llvm.mips.insv" => "__builtin_mips_insv",
-    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
-    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
-    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
-    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
-    "llvm.mips.lbux" => "__builtin_mips_lbux",
-    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
-    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
-    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
-    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
-    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
-    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
-    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
-    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
-    "llvm.mips.ldr.d" => "__builtin_msa_ldr_d",
-    "llvm.mips.ldr.w" => "__builtin_msa_ldr_w",
-    "llvm.mips.lhx" => "__builtin_mips_lhx",
-    "llvm.mips.lsa" => "__builtin_mips_lsa",
-    "llvm.mips.lwx" => "__builtin_mips_lwx",
-    "llvm.mips.madd" => "__builtin_mips_madd",
-    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
-    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
-    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
-    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
-    "llvm.mips.maddu" => "__builtin_mips_maddu",
-    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
-    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
-    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
-    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
-    "llvm.mips.maq.s.w.phl" => "__builtin_mips_maq_s_w_phl",
-    "llvm.mips.maq.s.w.phr" => "__builtin_mips_maq_s_w_phr",
-    "llvm.mips.maq.sa.w.phl" => "__builtin_mips_maq_sa_w_phl",
-    "llvm.mips.maq.sa.w.phr" => "__builtin_mips_maq_sa_w_phr",
-    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
-    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
-    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
-    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
-    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
-    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
-    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
-    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
-    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
-    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
-    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
-    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
-    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
-    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
-    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
-    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
-    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
-    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
-    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
-    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
-    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
-    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
-    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
-    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
-    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
-    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
-    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
-    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
-    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
-    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
-    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
-    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
-    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
-    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
-    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
-    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
-    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
-    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
-    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
-    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
-    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
-    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
-    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
-    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
-    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
-    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
-    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
-    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
-    "llvm.mips.modsub" => "__builtin_mips_modsub",
-    "llvm.mips.move.v" => "__builtin_msa_move_v",
-    "llvm.mips.msub" => "__builtin_mips_msub",
-    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
-    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
-    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
-    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
-    "llvm.mips.msubu" => "__builtin_mips_msubu",
-    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
-    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
-    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
-    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
-    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
-    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
-    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
-    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
-    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
-    "llvm.mips.muleq.s.w.phl" => "__builtin_mips_muleq_s_w_phl",
-    "llvm.mips.muleq.s.w.phr" => "__builtin_mips_muleq_s_w_phr",
-    "llvm.mips.muleu.s.ph.qbl" => "__builtin_mips_muleu_s_ph_qbl",
-    "llvm.mips.muleu.s.ph.qbr" => "__builtin_mips_muleu_s_ph_qbr",
-    "llvm.mips.mulq.rs.ph" => "__builtin_mips_mulq_rs_ph",
-    "llvm.mips.mulq.rs.w" => "__builtin_mips_mulq_rs_w",
-    "llvm.mips.mulq.s.ph" => "__builtin_mips_mulq_s_ph",
-    "llvm.mips.mulq.s.w" => "__builtin_mips_mulq_s_w",
-    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
-    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
-    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
-    "llvm.mips.mulsaq.s.w.ph" => "__builtin_mips_mulsaq_s_w_ph",
-    "llvm.mips.mult" => "__builtin_mips_mult",
-    "llvm.mips.multu" => "__builtin_mips_multu",
-    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
-    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
-    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
-    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
-    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
-    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
-    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
-    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
-    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
-    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
-    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
-    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
-    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
-    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
-    "llvm.mips.or.v" => "__builtin_msa_or_v",
-    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
-    "llvm.mips.packrl.ph" => "__builtin_mips_packrl_ph",
-    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
-    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
-    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
-    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
-    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
-    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
-    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
-    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
-    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
-    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
-    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
-    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
-    "llvm.mips.pick.ph" => "__builtin_mips_pick_ph",
-    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
-    "llvm.mips.preceq.w.phl" => "__builtin_mips_preceq_w_phl",
-    "llvm.mips.preceq.w.phr" => "__builtin_mips_preceq_w_phr",
-    "llvm.mips.precequ.ph.qbl" => "__builtin_mips_precequ_ph_qbl",
-    "llvm.mips.precequ.ph.qbla" => "__builtin_mips_precequ_ph_qbla",
-    "llvm.mips.precequ.ph.qbr" => "__builtin_mips_precequ_ph_qbr",
-    "llvm.mips.precequ.ph.qbra" => "__builtin_mips_precequ_ph_qbra",
-    "llvm.mips.preceu.ph.qbl" => "__builtin_mips_preceu_ph_qbl",
-    "llvm.mips.preceu.ph.qbla" => "__builtin_mips_preceu_ph_qbla",
-    "llvm.mips.preceu.ph.qbr" => "__builtin_mips_preceu_ph_qbr",
-    "llvm.mips.preceu.ph.qbra" => "__builtin_mips_preceu_ph_qbra",
-    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
-    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
-    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
-    "llvm.mips.precrq.ph.w" => "__builtin_mips_precrq_ph_w",
-    "llvm.mips.precrq.qb.ph" => "__builtin_mips_precrq_qb_ph",
-    "llvm.mips.precrq.rs.ph.w" => "__builtin_mips_precrq_rs_ph_w",
-    "llvm.mips.precrqu.s.qb.ph" => "__builtin_mips_precrqu_s_qb_ph",
-    "llvm.mips.prepend" => "__builtin_mips_prepend",
-    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
-    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
-    "llvm.mips.repl.ph" => "__builtin_mips_repl_ph",
-    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
-    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
-    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
-    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
-    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
-    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
-    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
-    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
-    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
-    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
-    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
-    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
-    "llvm.mips.shilo" => "__builtin_mips_shilo",
-    "llvm.mips.shll.ph" => "__builtin_mips_shll_ph",
-    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
-    "llvm.mips.shll.s.ph" => "__builtin_mips_shll_s_ph",
-    "llvm.mips.shll.s.w" => "__builtin_mips_shll_s_w",
-    "llvm.mips.shra.ph" => "__builtin_mips_shra_ph",
-    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
-    "llvm.mips.shra.r.ph" => "__builtin_mips_shra_r_ph",
-    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
-    "llvm.mips.shra.r.w" => "__builtin_mips_shra_r_w",
-    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
-    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
-    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
-    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
-    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
-    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
-    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
-    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
-    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
-    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
-    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
-    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
-    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
-    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
-    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
-    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
-    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
-    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
-    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
-    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
-    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
-    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
-    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
-    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
-    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
-    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
-    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
-    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
-    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
-    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
-    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
-    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
-    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
-    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
-    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
-    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
-    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
-    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
-    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
-    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
-    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
-    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
-    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
-    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
-    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
-    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
-    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
-    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
-    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
-    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
-    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
-    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
-    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
-    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
-    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
-    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
-    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
-    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
-    "llvm.mips.st.b" => "__builtin_msa_st_b",
-    "llvm.mips.st.d" => "__builtin_msa_st_d",
-    "llvm.mips.st.h" => "__builtin_msa_st_h",
-    "llvm.mips.st.w" => "__builtin_msa_st_w",
-    "llvm.mips.str.d" => "__builtin_msa_str_d",
-    "llvm.mips.str.w" => "__builtin_msa_str_w",
-    "llvm.mips.subq.ph" => "__builtin_mips_subq_ph",
-    "llvm.mips.subq.s.ph" => "__builtin_mips_subq_s_ph",
-    "llvm.mips.subq.s.w" => "__builtin_mips_subq_s_w",
-    "llvm.mips.subqh.ph" => "__builtin_mips_subqh_ph",
-    "llvm.mips.subqh.r.ph" => "__builtin_mips_subqh_r_ph",
-    "llvm.mips.subqh.r.w" => "__builtin_mips_subqh_r_w",
-    "llvm.mips.subqh.w" => "__builtin_mips_subqh_w",
-    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
-    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
-    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
-    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
-    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
-    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
-    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
-    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
-    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
-    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
-    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
-    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
-    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
-    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
-    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
-    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
-    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
-    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
-    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
-    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
-    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
-    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
-    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
-    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
-    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
-    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
-    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
-    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
-    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
-    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
-    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
-    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
-    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
-    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
-    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
-    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
-    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
-    // nvvm
-    "llvm.nvvm.abs.i" => "__nvvm_abs_i",
-    "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
-    "llvm.nvvm.activemask" => "__nvvm_activemask",
-    "llvm.nvvm.add.rm.d" => "__nvvm_add_rm_d",
-    "llvm.nvvm.add.rm.f" => "__nvvm_add_rm_f",
-    "llvm.nvvm.add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
-    "llvm.nvvm.add.rn.d" => "__nvvm_add_rn_d",
-    "llvm.nvvm.add.rn.f" => "__nvvm_add_rn_f",
-    "llvm.nvvm.add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
-    "llvm.nvvm.add.rp.d" => "__nvvm_add_rp_d",
-    "llvm.nvvm.add.rp.f" => "__nvvm_add_rp_f",
-    "llvm.nvvm.add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
-    "llvm.nvvm.add.rz.d" => "__nvvm_add_rz_d",
-    "llvm.nvvm.add.rz.f" => "__nvvm_add_rz_f",
-    "llvm.nvvm.add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
-    "llvm.nvvm.bar.sync" => "__nvvm_bar_sync",
-    "llvm.nvvm.bar.warp.sync" => "__nvvm_bar_warp_sync",
-    "llvm.nvvm.barrier" => "__nvvm_bar",
-    "llvm.nvvm.barrier.n" => "__nvvm_bar_n",
-    "llvm.nvvm.barrier.sync" => "__nvvm_barrier_sync",
-    "llvm.nvvm.barrier.sync.cnt" => "__nvvm_barrier_sync_cnt",
-    "llvm.nvvm.barrier0" => "__syncthreads",
-    // [DUPLICATE]: "llvm.nvvm.barrier0" => "__nvvm_bar0",
-    "llvm.nvvm.barrier0.and" => "__nvvm_bar0_and",
-    "llvm.nvvm.barrier0.or" => "__nvvm_bar0_or",
-    "llvm.nvvm.barrier0.popc" => "__nvvm_bar0_popc",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rp" => "__nvvm_bf16x2_to_ue8m0x2_rp",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rp.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rp_satfinite",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rz" => "__nvvm_bf16x2_to_ue8m0x2_rz",
-    "llvm.nvvm.bf16x2.to.ue8m0x2.rz.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rz_satfinite",
-    "llvm.nvvm.bf2h.rn" => "__nvvm_bf2h_rn",
-    "llvm.nvvm.bf2h.rn.ftz" => "__nvvm_bf2h_rn_ftz",
-    "llvm.nvvm.bitcast.d2ll" => "__nvvm_bitcast_d2ll",
-    "llvm.nvvm.bitcast.f2i" => "__nvvm_bitcast_f2i",
-    "llvm.nvvm.bitcast.i2f" => "__nvvm_bitcast_i2f",
-    "llvm.nvvm.bitcast.ll2d" => "__nvvm_bitcast_ll2d",
-    "llvm.nvvm.brev32" => "__nvvm_brev32",
-    "llvm.nvvm.brev64" => "__nvvm_brev64",
-    "llvm.nvvm.ceil.d" => "__nvvm_ceil_d",
-    "llvm.nvvm.ceil.f" => "__nvvm_ceil_f",
-    "llvm.nvvm.ceil.ftz.f" => "__nvvm_ceil_ftz_f",
-    "llvm.nvvm.clz.i" => "__nvvm_clz_i",
-    "llvm.nvvm.clz.ll" => "__nvvm_clz_ll",
-    "llvm.nvvm.cos.approx.f" => "__nvvm_cos_approx_f",
-    "llvm.nvvm.cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
-    "llvm.nvvm.cp.async.commit.group" => "__nvvm_cp_async_commit_group",
-    "llvm.nvvm.cp.async.mbarrier.arrive" => "__nvvm_cp_async_mbarrier_arrive",
-    "llvm.nvvm.cp.async.mbarrier.arrive.noinc" => "__nvvm_cp_async_mbarrier_arrive_noinc",
-    "llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared" => "__nvvm_cp_async_mbarrier_arrive_noinc_shared",
-    "llvm.nvvm.cp.async.mbarrier.arrive.shared" => "__nvvm_cp_async_mbarrier_arrive_shared",
-    "llvm.nvvm.cp.async.wait.all" => "__nvvm_cp_async_wait_all",
-    "llvm.nvvm.cp.async.wait.group" => "__nvvm_cp_async_wait_group",
-    "llvm.nvvm.d2f.rm" => "__nvvm_d2f_rm",
-    "llvm.nvvm.d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
-    "llvm.nvvm.d2f.rn" => "__nvvm_d2f_rn",
-    "llvm.nvvm.d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
-    "llvm.nvvm.d2f.rp" => "__nvvm_d2f_rp",
-    "llvm.nvvm.d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
-    "llvm.nvvm.d2f.rz" => "__nvvm_d2f_rz",
-    "llvm.nvvm.d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
-    "llvm.nvvm.d2i.hi" => "__nvvm_d2i_hi",
-    "llvm.nvvm.d2i.lo" => "__nvvm_d2i_lo",
-    "llvm.nvvm.d2i.rm" => "__nvvm_d2i_rm",
-    "llvm.nvvm.d2i.rn" => "__nvvm_d2i_rn",
-    "llvm.nvvm.d2i.rp" => "__nvvm_d2i_rp",
-    "llvm.nvvm.d2i.rz" => "__nvvm_d2i_rz",
-    "llvm.nvvm.d2ll.rm" => "__nvvm_d2ll_rm",
-    "llvm.nvvm.d2ll.rn" => "__nvvm_d2ll_rn",
-    "llvm.nvvm.d2ll.rp" => "__nvvm_d2ll_rp",
-    "llvm.nvvm.d2ll.rz" => "__nvvm_d2ll_rz",
-    "llvm.nvvm.d2ui.rm" => "__nvvm_d2ui_rm",
-    "llvm.nvvm.d2ui.rn" => "__nvvm_d2ui_rn",
-    "llvm.nvvm.d2ui.rp" => "__nvvm_d2ui_rp",
-    "llvm.nvvm.d2ui.rz" => "__nvvm_d2ui_rz",
-    "llvm.nvvm.d2ull.rm" => "__nvvm_d2ull_rm",
-    "llvm.nvvm.d2ull.rn" => "__nvvm_d2ull_rn",
-    "llvm.nvvm.d2ull.rp" => "__nvvm_d2ull_rp",
-    "llvm.nvvm.d2ull.rz" => "__nvvm_d2ull_rz",
-    "llvm.nvvm.div.approx.f" => "__nvvm_div_approx_f",
-    "llvm.nvvm.div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
-    "llvm.nvvm.div.full" => "__nvvm_div_full",
-    "llvm.nvvm.div.full.ftz" => "__nvvm_div_full_ftz",
-    "llvm.nvvm.div.rm.d" => "__nvvm_div_rm_d",
-    "llvm.nvvm.div.rm.f" => "__nvvm_div_rm_f",
-    "llvm.nvvm.div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
-    "llvm.nvvm.div.rn.d" => "__nvvm_div_rn_d",
-    "llvm.nvvm.div.rn.f" => "__nvvm_div_rn_f",
-    "llvm.nvvm.div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
-    "llvm.nvvm.div.rp.d" => "__nvvm_div_rp_d",
-    "llvm.nvvm.div.rp.f" => "__nvvm_div_rp_f",
-    "llvm.nvvm.div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
-    "llvm.nvvm.div.rz.d" => "__nvvm_div_rz_d",
-    "llvm.nvvm.div.rz.f" => "__nvvm_div_rz_f",
-    "llvm.nvvm.div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
-    "llvm.nvvm.e2m3x2.to.f16x2.rn" => "__nvvm_e2m3x2_to_f16x2_rn",
-    "llvm.nvvm.e2m3x2.to.f16x2.rn.relu" => "__nvvm_e2m3x2_to_f16x2_rn_relu",
-    "llvm.nvvm.e3m2x2.to.f16x2.rn" => "__nvvm_e3m2x2_to_f16x2_rn",
-    "llvm.nvvm.e3m2x2.to.f16x2.rn.relu" => "__nvvm_e3m2x2_to_f16x2_rn_relu",
-    "llvm.nvvm.e4m3x2.to.f16x2.rn" => "__nvvm_e4m3x2_to_f16x2_rn",
-    "llvm.nvvm.e4m3x2.to.f16x2.rn.relu" => "__nvvm_e4m3x2_to_f16x2_rn_relu",
-    "llvm.nvvm.e5m2x2.to.f16x2.rn" => "__nvvm_e5m2x2_to_f16x2_rn",
-    "llvm.nvvm.e5m2x2.to.f16x2.rn.relu" => "__nvvm_e5m2x2_to_f16x2_rn_relu",
-    "llvm.nvvm.ex2.approx.d" => "__nvvm_ex2_approx_d",
-    "llvm.nvvm.ex2.approx.f" => "__nvvm_ex2_approx_f",
-    "llvm.nvvm.ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
-    "llvm.nvvm.exit" => "__nvvm_exit",
-    "llvm.nvvm.f16x2.to.e4m3x2.rn" => "__nvvm_f16x2_to_e4m3x2_rn",
-    "llvm.nvvm.f16x2.to.e4m3x2.rn.relu" => "__nvvm_f16x2_to_e4m3x2_rn_relu",
-    "llvm.nvvm.f16x2.to.e5m2x2.rn" => "__nvvm_f16x2_to_e5m2x2_rn",
-    "llvm.nvvm.f16x2.to.e5m2x2.rn.relu" => "__nvvm_f16x2_to_e5m2x2_rn_relu",
-    "llvm.nvvm.f2bf16.rn" => "__nvvm_f2bf16_rn",
-    "llvm.nvvm.f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
-    "llvm.nvvm.f2bf16.rz" => "__nvvm_f2bf16_rz",
-    "llvm.nvvm.f2bf16.rz.relu" => "__nvvm_f2bf16_rz_relu",
-    "llvm.nvvm.f2h.rn" => "__nvvm_f2h_rn",
-    "llvm.nvvm.f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
-    "llvm.nvvm.f2i.rm" => "__nvvm_f2i_rm",
-    "llvm.nvvm.f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
-    "llvm.nvvm.f2i.rn" => "__nvvm_f2i_rn",
-    "llvm.nvvm.f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
-    "llvm.nvvm.f2i.rp" => "__nvvm_f2i_rp",
-    "llvm.nvvm.f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
-    "llvm.nvvm.f2i.rz" => "__nvvm_f2i_rz",
-    "llvm.nvvm.f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
-    "llvm.nvvm.f2ll.rm" => "__nvvm_f2ll_rm",
-    "llvm.nvvm.f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
-    "llvm.nvvm.f2ll.rn" => "__nvvm_f2ll_rn",
-    "llvm.nvvm.f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
-    "llvm.nvvm.f2ll.rp" => "__nvvm_f2ll_rp",
-    "llvm.nvvm.f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
-    "llvm.nvvm.f2ll.rz" => "__nvvm_f2ll_rz",
-    "llvm.nvvm.f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
-    "llvm.nvvm.f2tf32.rn" => "__nvvm_f2tf32_rn",
-    "llvm.nvvm.f2tf32.rn.relu" => "__nvvm_f2tf32_rn_relu",
-    "llvm.nvvm.f2tf32.rn.relu.satfinite" => "__nvvm_f2tf32_rn_relu_satfinite",
-    "llvm.nvvm.f2tf32.rn.satfinite" => "__nvvm_f2tf32_rn_satfinite",
-    "llvm.nvvm.f2tf32.rna" => "__nvvm_f2tf32_rna",
-    "llvm.nvvm.f2tf32.rna.satfinite" => "__nvvm_f2tf32_rna_satfinite",
-    "llvm.nvvm.f2tf32.rz" => "__nvvm_f2tf32_rz",
-    "llvm.nvvm.f2tf32.rz.relu" => "__nvvm_f2tf32_rz_relu",
-    "llvm.nvvm.f2tf32.rz.relu.satfinite" => "__nvvm_f2tf32_rz_relu_satfinite",
-    "llvm.nvvm.f2tf32.rz.satfinite" => "__nvvm_f2tf32_rz_satfinite",
-    "llvm.nvvm.f2ui.rm" => "__nvvm_f2ui_rm",
-    "llvm.nvvm.f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
-    "llvm.nvvm.f2ui.rn" => "__nvvm_f2ui_rn",
-    "llvm.nvvm.f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
-    "llvm.nvvm.f2ui.rp" => "__nvvm_f2ui_rp",
-    "llvm.nvvm.f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
-    "llvm.nvvm.f2ui.rz" => "__nvvm_f2ui_rz",
-    "llvm.nvvm.f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
-    "llvm.nvvm.f2ull.rm" => "__nvvm_f2ull_rm",
-    "llvm.nvvm.f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
-    "llvm.nvvm.f2ull.rn" => "__nvvm_f2ull_rn",
-    "llvm.nvvm.f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
-    "llvm.nvvm.f2ull.rp" => "__nvvm_f2ull_rp",
-    "llvm.nvvm.f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
-    "llvm.nvvm.f2ull.rz" => "__nvvm_f2ull_rz",
-    "llvm.nvvm.f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
-    "llvm.nvvm.fabs.d" => "__nvvm_fabs_d",
-    "llvm.nvvm.fabs.f" => "__nvvm_fabs_f",
-    "llvm.nvvm.fabs.ftz.f" => "__nvvm_fabs_ftz_f",
-    "llvm.nvvm.ff.to.e2m3x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m3x2_rn_relu_satfinite",
-    "llvm.nvvm.ff.to.e2m3x2.rn.satfinite" => "__nvvm_ff_to_e2m3x2_rn_satfinite",
-    "llvm.nvvm.ff.to.e3m2x2.rn.relu.satfinite" => "__nvvm_ff_to_e3m2x2_rn_relu_satfinite",
-    "llvm.nvvm.ff.to.e3m2x2.rn.satfinite" => "__nvvm_ff_to_e3m2x2_rn_satfinite",
-    "llvm.nvvm.ff.to.e4m3x2.rn" => "__nvvm_ff_to_e4m3x2_rn",
-    "llvm.nvvm.ff.to.e4m3x2.rn.relu" => "__nvvm_ff_to_e4m3x2_rn_relu",
-    "llvm.nvvm.ff.to.e5m2x2.rn" => "__nvvm_ff_to_e5m2x2_rn",
-    "llvm.nvvm.ff.to.e5m2x2.rn.relu" => "__nvvm_ff_to_e5m2x2_rn_relu",
-    "llvm.nvvm.ff.to.ue8m0x2.rp" => "__nvvm_ff_to_ue8m0x2_rp",
-    "llvm.nvvm.ff.to.ue8m0x2.rp.satfinite" => "__nvvm_ff_to_ue8m0x2_rp_satfinite",
-    "llvm.nvvm.ff.to.ue8m0x2.rz" => "__nvvm_ff_to_ue8m0x2_rz",
-    "llvm.nvvm.ff.to.ue8m0x2.rz.satfinite" => "__nvvm_ff_to_ue8m0x2_rz_satfinite",
-    "llvm.nvvm.ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
-    "llvm.nvvm.ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
-    "llvm.nvvm.ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
-    "llvm.nvvm.ff2bf16x2.rz.relu" => "__nvvm_ff2bf16x2_rz_relu",
-    "llvm.nvvm.ff2f16x2.rn" => "__nvvm_ff2f16x2_rn",
-    "llvm.nvvm.ff2f16x2.rn.relu" => "__nvvm_ff2f16x2_rn_relu",
-    "llvm.nvvm.ff2f16x2.rz" => "__nvvm_ff2f16x2_rz",
-    "llvm.nvvm.ff2f16x2.rz.relu" => "__nvvm_ff2f16x2_rz_relu",
-    "llvm.nvvm.floor.d" => "__nvvm_floor_d",
-    "llvm.nvvm.floor.f" => "__nvvm_floor_f",
-    "llvm.nvvm.floor.ftz.f" => "__nvvm_floor_ftz_f",
-    "llvm.nvvm.fma.rm.d" => "__nvvm_fma_rm_d",
-    "llvm.nvvm.fma.rm.f" => "__nvvm_fma_rm_f",
-    "llvm.nvvm.fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
-    "llvm.nvvm.fma.rn.bf16" => "__nvvm_fma_rn_bf16",
-    "llvm.nvvm.fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
-    "llvm.nvvm.fma.rn.d" => "__nvvm_fma_rn_d",
-    "llvm.nvvm.fma.rn.f" => "__nvvm_fma_rn_f",
-    "llvm.nvvm.fma.rn.ftz.bf16" => "__nvvm_fma_rn_ftz_bf16",
-    "llvm.nvvm.fma.rn.ftz.bf16x2" => "__nvvm_fma_rn_ftz_bf16x2",
-    "llvm.nvvm.fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
-    "llvm.nvvm.fma.rn.ftz.relu.bf16" => "__nvvm_fma_rn_ftz_relu_bf16",
-    "llvm.nvvm.fma.rn.ftz.relu.bf16x2" => "__nvvm_fma_rn_ftz_relu_bf16x2",
-    "llvm.nvvm.fma.rn.ftz.sat.bf16" => "__nvvm_fma_rn_ftz_sat_bf16",
-    "llvm.nvvm.fma.rn.ftz.sat.bf16x2" => "__nvvm_fma_rn_ftz_sat_bf16x2",
-    "llvm.nvvm.fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
-    "llvm.nvvm.fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
-    "llvm.nvvm.fma.rn.sat.bf16" => "__nvvm_fma_rn_sat_bf16",
-    "llvm.nvvm.fma.rn.sat.bf16x2" => "__nvvm_fma_rn_sat_bf16x2",
-    "llvm.nvvm.fma.rp.d" => "__nvvm_fma_rp_d",
-    "llvm.nvvm.fma.rp.f" => "__nvvm_fma_rp_f",
-    "llvm.nvvm.fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
-    "llvm.nvvm.fma.rz.d" => "__nvvm_fma_rz_d",
-    "llvm.nvvm.fma.rz.f" => "__nvvm_fma_rz_f",
-    "llvm.nvvm.fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
-    "llvm.nvvm.fmax.bf16" => "__nvvm_fmax_bf16",
-    "llvm.nvvm.fmax.bf16x2" => "__nvvm_fmax_bf16x2",
-    "llvm.nvvm.fmax.d" => "__nvvm_fmax_d",
-    "llvm.nvvm.fmax.f" => "__nvvm_fmax_f",
-    "llvm.nvvm.fmax.ftz.bf16" => "__nvvm_fmax_ftz_bf16",
-    "llvm.nvvm.fmax.ftz.bf16x2" => "__nvvm_fmax_ftz_bf16x2",
-    "llvm.nvvm.fmax.ftz.f" => "__nvvm_fmax_ftz_f",
-    "llvm.nvvm.fmax.ftz.nan.bf16" => "__nvvm_fmax_ftz_nan_bf16",
-    "llvm.nvvm.fmax.ftz.nan.bf16x2" => "__nvvm_fmax_ftz_nan_bf16x2",
-    "llvm.nvvm.fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.bf16" => "__nvvm_fmax_ftz_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
-    "llvm.nvvm.fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
-    "llvm.nvvm.fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
-    "llvm.nvvm.fmax.nan.f" => "__nvvm_fmax_nan_f",
-    "llvm.nvvm.fmax.nan.xorsign.abs.bf16" => "__nvvm_fmax_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.nan.xorsign.abs.f" => "__nvvm_fmax_nan_xorsign_abs_f",
-    "llvm.nvvm.fmax.xorsign.abs.bf16" => "__nvvm_fmax_xorsign_abs_bf16",
-    "llvm.nvvm.fmax.xorsign.abs.bf16x2" => "__nvvm_fmax_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmax.xorsign.abs.f" => "__nvvm_fmax_xorsign_abs_f",
-    "llvm.nvvm.fmin.bf16" => "__nvvm_fmin_bf16",
-    "llvm.nvvm.fmin.bf16x2" => "__nvvm_fmin_bf16x2",
-    "llvm.nvvm.fmin.d" => "__nvvm_fmin_d",
-    "llvm.nvvm.fmin.f" => "__nvvm_fmin_f",
-    "llvm.nvvm.fmin.ftz.bf16" => "__nvvm_fmin_ftz_bf16",
-    "llvm.nvvm.fmin.ftz.bf16x2" => "__nvvm_fmin_ftz_bf16x2",
-    "llvm.nvvm.fmin.ftz.f" => "__nvvm_fmin_ftz_f",
-    "llvm.nvvm.fmin.ftz.nan.bf16" => "__nvvm_fmin_ftz_nan_bf16",
-    "llvm.nvvm.fmin.ftz.nan.bf16x2" => "__nvvm_fmin_ftz_nan_bf16x2",
-    "llvm.nvvm.fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.bf16" => "__nvvm_fmin_ftz_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
-    "llvm.nvvm.fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
-    "llvm.nvvm.fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
-    "llvm.nvvm.fmin.nan.f" => "__nvvm_fmin_nan_f",
-    "llvm.nvvm.fmin.nan.xorsign.abs.bf16" => "__nvvm_fmin_nan_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_nan_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.nan.xorsign.abs.f" => "__nvvm_fmin_nan_xorsign_abs_f",
-    "llvm.nvvm.fmin.xorsign.abs.bf16" => "__nvvm_fmin_xorsign_abs_bf16",
-    "llvm.nvvm.fmin.xorsign.abs.bf16x2" => "__nvvm_fmin_xorsign_abs_bf16x2",
-    "llvm.nvvm.fmin.xorsign.abs.f" => "__nvvm_fmin_xorsign_abs_f",
-    "llvm.nvvm.fns" => "__nvvm_fns",
-    "llvm.nvvm.h2f" => "__nvvm_h2f",
-    "llvm.nvvm.i2d.rm" => "__nvvm_i2d_rm",
-    "llvm.nvvm.i2d.rn" => "__nvvm_i2d_rn",
-    "llvm.nvvm.i2d.rp" => "__nvvm_i2d_rp",
-    "llvm.nvvm.i2d.rz" => "__nvvm_i2d_rz",
-    "llvm.nvvm.i2f.rm" => "__nvvm_i2f_rm",
-    "llvm.nvvm.i2f.rn" => "__nvvm_i2f_rn",
-    "llvm.nvvm.i2f.rp" => "__nvvm_i2f_rp",
-    "llvm.nvvm.i2f.rz" => "__nvvm_i2f_rz",
-    "llvm.nvvm.isspacep.const" => "__nvvm_isspacep_const",
-    "llvm.nvvm.isspacep.global" => "__nvvm_isspacep_global",
-    "llvm.nvvm.isspacep.local" => "__nvvm_isspacep_local",
-    "llvm.nvvm.isspacep.shared" => "__nvvm_isspacep_shared",
-    "llvm.nvvm.istypep.sampler" => "__nvvm_istypep_sampler",
-    "llvm.nvvm.istypep.surface" => "__nvvm_istypep_surface",
-    "llvm.nvvm.istypep.texture" => "__nvvm_istypep_texture",
-    "llvm.nvvm.lg2.approx.d" => "__nvvm_lg2_approx_d",
-    "llvm.nvvm.lg2.approx.f" => "__nvvm_lg2_approx_f",
-    "llvm.nvvm.lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
-    "llvm.nvvm.ll2d.rm" => "__nvvm_ll2d_rm",
-    "llvm.nvvm.ll2d.rn" => "__nvvm_ll2d_rn",
-    "llvm.nvvm.ll2d.rp" => "__nvvm_ll2d_rp",
-    "llvm.nvvm.ll2d.rz" => "__nvvm_ll2d_rz",
-    "llvm.nvvm.ll2f.rm" => "__nvvm_ll2f_rm",
-    "llvm.nvvm.ll2f.rn" => "__nvvm_ll2f_rn",
-    "llvm.nvvm.ll2f.rp" => "__nvvm_ll2f_rp",
-    "llvm.nvvm.ll2f.rz" => "__nvvm_ll2f_rz",
-    "llvm.nvvm.lohi.i2d" => "__nvvm_lohi_i2d",
-    "llvm.nvvm.match.any.sync.i32" => "__nvvm_match_any_sync_i32",
-    "llvm.nvvm.match.any.sync.i64" => "__nvvm_match_any_sync_i64",
-    "llvm.nvvm.max.i" => "__nvvm_max_i",
-    "llvm.nvvm.max.ll" => "__nvvm_max_ll",
-    "llvm.nvvm.max.ui" => "__nvvm_max_ui",
-    "llvm.nvvm.max.ull" => "__nvvm_max_ull",
-    "llvm.nvvm.mbarrier.arrive" => "__nvvm_mbarrier_arrive",
-    "llvm.nvvm.mbarrier.arrive.drop" => "__nvvm_mbarrier_arrive_drop",
-    "llvm.nvvm.mbarrier.arrive.drop.noComplete" => "__nvvm_mbarrier_arrive_drop_noComplete",
-    "llvm.nvvm.mbarrier.arrive.drop.noComplete.shared" => "__nvvm_mbarrier_arrive_drop_noComplete_shared",
-    "llvm.nvvm.mbarrier.arrive.drop.shared" => "__nvvm_mbarrier_arrive_drop_shared",
-    "llvm.nvvm.mbarrier.arrive.noComplete" => "__nvvm_mbarrier_arrive_noComplete",
-    "llvm.nvvm.mbarrier.arrive.noComplete.shared" => "__nvvm_mbarrier_arrive_noComplete_shared",
-    "llvm.nvvm.mbarrier.arrive.shared" => "__nvvm_mbarrier_arrive_shared",
-    "llvm.nvvm.mbarrier.init" => "__nvvm_mbarrier_init",
-    "llvm.nvvm.mbarrier.init.shared" => "__nvvm_mbarrier_init_shared",
-    "llvm.nvvm.mbarrier.inval" => "__nvvm_mbarrier_inval",
-    "llvm.nvvm.mbarrier.inval.shared" => "__nvvm_mbarrier_inval_shared",
-    "llvm.nvvm.mbarrier.pending.count" => "__nvvm_mbarrier_pending_count",
-    "llvm.nvvm.mbarrier.test.wait" => "__nvvm_mbarrier_test_wait",
-    "llvm.nvvm.mbarrier.test.wait.shared" => "__nvvm_mbarrier_test_wait_shared",
-    "llvm.nvvm.membar.cta" => "__nvvm_membar_cta",
-    "llvm.nvvm.membar.gl" => "__nvvm_membar_gl",
-    "llvm.nvvm.membar.sys" => "__nvvm_membar_sys",
-    "llvm.nvvm.min.i" => "__nvvm_min_i",
-    "llvm.nvvm.min.ll" => "__nvvm_min_ll",
-    "llvm.nvvm.min.ui" => "__nvvm_min_ui",
-    "llvm.nvvm.min.ull" => "__nvvm_min_ull",
-    "llvm.nvvm.mul.rm.d" => "__nvvm_mul_rm_d",
-    "llvm.nvvm.mul.rm.f" => "__nvvm_mul_rm_f",
-    "llvm.nvvm.mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
-    "llvm.nvvm.mul.rn.d" => "__nvvm_mul_rn_d",
-    "llvm.nvvm.mul.rn.f" => "__nvvm_mul_rn_f",
-    "llvm.nvvm.mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
-    "llvm.nvvm.mul.rp.d" => "__nvvm_mul_rp_d",
-    "llvm.nvvm.mul.rp.f" => "__nvvm_mul_rp_f",
-    "llvm.nvvm.mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
-    "llvm.nvvm.mul.rz.d" => "__nvvm_mul_rz_d",
-    "llvm.nvvm.mul.rz.f" => "__nvvm_mul_rz_f",
-    "llvm.nvvm.mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
-    "llvm.nvvm.mul24.i" => "__nvvm_mul24_i",
-    "llvm.nvvm.mul24.ui" => "__nvvm_mul24_ui",
-    "llvm.nvvm.mulhi.i" => "__nvvm_mulhi_i",
-    "llvm.nvvm.mulhi.ll" => "__nvvm_mulhi_ll",
-    "llvm.nvvm.mulhi.s" => "__nvvm_mulhi_s",
-    "llvm.nvvm.mulhi.ui" => "__nvvm_mulhi_ui",
-    "llvm.nvvm.mulhi.ull" => "__nvvm_mulhi_ull",
-    "llvm.nvvm.mulhi.us" => "__nvvm_mulhi_us",
-    "llvm.nvvm.nanosleep" => "__nvvm_nanosleep",
-    "llvm.nvvm.neg.bf16" => "__nvvm_neg_bf16",
-    "llvm.nvvm.neg.bf16x2" => "__nvvm_neg_bf16x2",
-    "llvm.nvvm.popc.i" => "__nvvm_popc_i",
-    "llvm.nvvm.popc.ll" => "__nvvm_popc_ll",
-    "llvm.nvvm.prmt" => "__nvvm_prmt",
-    "llvm.nvvm.rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
-    "llvm.nvvm.rcp.approx.ftz.f" => "__nvvm_rcp_approx_ftz_f",
-    "llvm.nvvm.rcp.rm.d" => "__nvvm_rcp_rm_d",
-    "llvm.nvvm.rcp.rm.f" => "__nvvm_rcp_rm_f",
-    "llvm.nvvm.rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
-    "llvm.nvvm.rcp.rn.d" => "__nvvm_rcp_rn_d",
-    "llvm.nvvm.rcp.rn.f" => "__nvvm_rcp_rn_f",
-    "llvm.nvvm.rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
-    "llvm.nvvm.rcp.rp.d" => "__nvvm_rcp_rp_d",
-    "llvm.nvvm.rcp.rp.f" => "__nvvm_rcp_rp_f",
-    "llvm.nvvm.rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
-    "llvm.nvvm.rcp.rz.d" => "__nvvm_rcp_rz_d",
-    "llvm.nvvm.rcp.rz.f" => "__nvvm_rcp_rz_f",
-    "llvm.nvvm.rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
-    "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_clock",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_clock64",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.ctaid.w" => "__nvvm_read_ptx_sreg_ctaid_w",
-    "llvm.nvvm.read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
-    "llvm.nvvm.read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
-    "llvm.nvvm.read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
-    "llvm.nvvm.read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
-    "llvm.nvvm.read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
-    "llvm.nvvm.read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
-    "llvm.nvvm.read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
-    "llvm.nvvm.read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
-    "llvm.nvvm.read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
-    "llvm.nvvm.read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
-    "llvm.nvvm.read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
-    "llvm.nvvm.read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
-    "llvm.nvvm.read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
-    "llvm.nvvm.read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
-    "llvm.nvvm.read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
-    "llvm.nvvm.read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
-    "llvm.nvvm.read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
-    "llvm.nvvm.read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
-    "llvm.nvvm.read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
-    "llvm.nvvm.read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
-    "llvm.nvvm.read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
-    "llvm.nvvm.read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
-    "llvm.nvvm.read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
-    "llvm.nvvm.read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
-    "llvm.nvvm.read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
-    "llvm.nvvm.read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
-    "llvm.nvvm.read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
-    "llvm.nvvm.read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
-    "llvm.nvvm.read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
-    "llvm.nvvm.read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
-    "llvm.nvvm.read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
-    "llvm.nvvm.read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
-    "llvm.nvvm.read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
-    "llvm.nvvm.read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
-    "llvm.nvvm.read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
-    "llvm.nvvm.read.ptx.sreg.globaltimer" => "__nvvm_read_ptx_sreg_globaltimer",
-    "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_gridid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_laneid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_lanemask_eq",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_lanemask_ge",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_lanemask_gt",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_lanemask_le",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_lanemask_lt",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.nctaid.w" => "__nvvm_read_ptx_sreg_nctaid_w",
-    "llvm.nvvm.read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
-    "llvm.nvvm.read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
-    "llvm.nvvm.read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
-    "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_nsmid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.ntid.w" => "__nvvm_read_ptx_sreg_ntid_w",
-    "llvm.nvvm.read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
-    "llvm.nvvm.read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
-    "llvm.nvvm.read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
-    "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_nwarpid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_pm0",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_pm1",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_pm2",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_pm3",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_smid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.tid.w" => "__nvvm_read_ptx_sreg_tid_w",
-    "llvm.nvvm.read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
-    "llvm.nvvm.read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
-    "llvm.nvvm.read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
-    "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_warpid",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
-    // [DUPLICATE]: "llvm.nvvm.read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
-    "llvm.nvvm.redux.sync.add" => "__nvvm_redux_sync_add",
-    "llvm.nvvm.redux.sync.and" => "__nvvm_redux_sync_and",
-    "llvm.nvvm.redux.sync.fmax" => "__nvvm_redux_sync_fmax",
-    "llvm.nvvm.redux.sync.fmax.NaN" => "__nvvm_redux_sync_fmax_NaN",
-    "llvm.nvvm.redux.sync.fmax.abs" => "__nvvm_redux_sync_fmax_abs",
-    "llvm.nvvm.redux.sync.fmax.abs.NaN" => "__nvvm_redux_sync_fmax_abs_NaN",
-    "llvm.nvvm.redux.sync.fmin" => "__nvvm_redux_sync_fmin",
-    "llvm.nvvm.redux.sync.fmin.NaN" => "__nvvm_redux_sync_fmin_NaN",
-    "llvm.nvvm.redux.sync.fmin.abs" => "__nvvm_redux_sync_fmin_abs",
-    "llvm.nvvm.redux.sync.fmin.abs.NaN" => "__nvvm_redux_sync_fmin_abs_NaN",
-    "llvm.nvvm.redux.sync.max" => "__nvvm_redux_sync_max",
-    "llvm.nvvm.redux.sync.min" => "__nvvm_redux_sync_min",
-    "llvm.nvvm.redux.sync.or" => "__nvvm_redux_sync_or",
-    "llvm.nvvm.redux.sync.umax" => "__nvvm_redux_sync_umax",
-    "llvm.nvvm.redux.sync.umin" => "__nvvm_redux_sync_umin",
-    "llvm.nvvm.redux.sync.xor" => "__nvvm_redux_sync_xor",
-    "llvm.nvvm.reflect" => "__nvvm_reflect",
-    "llvm.nvvm.rotate.b32" => "__nvvm_rotate_b32",
-    "llvm.nvvm.rotate.b64" => "__nvvm_rotate_b64",
-    "llvm.nvvm.rotate.right.b64" => "__nvvm_rotate_right_b64",
-    "llvm.nvvm.round.d" => "__nvvm_round_d",
-    "llvm.nvvm.round.f" => "__nvvm_round_f",
-    "llvm.nvvm.round.ftz.f" => "__nvvm_round_ftz_f",
-    "llvm.nvvm.rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
-    "llvm.nvvm.rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
-    "llvm.nvvm.rsqrt.approx.ftz.d" => "__nvvm_rsqrt_approx_ftz_d",
-    "llvm.nvvm.rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
-    "llvm.nvvm.sad.i" => "__nvvm_sad_i",
-    "llvm.nvvm.sad.ll" => "__nvvm_sad_ll",
-    "llvm.nvvm.sad.s" => "__nvvm_sad_s",
-    "llvm.nvvm.sad.ui" => "__nvvm_sad_ui",
-    "llvm.nvvm.sad.ull" => "__nvvm_sad_ull",
-    "llvm.nvvm.sad.us" => "__nvvm_sad_us",
-    "llvm.nvvm.saturate.d" => "__nvvm_saturate_d",
-    "llvm.nvvm.saturate.f" => "__nvvm_saturate_f",
-    "llvm.nvvm.saturate.ftz.f" => "__nvvm_saturate_ftz_f",
-    "llvm.nvvm.shfl.bfly.f32" => "__nvvm_shfl_bfly_f32",
-    "llvm.nvvm.shfl.bfly.i32" => "__nvvm_shfl_bfly_i32",
-    "llvm.nvvm.shfl.down.f32" => "__nvvm_shfl_down_f32",
-    "llvm.nvvm.shfl.down.i32" => "__nvvm_shfl_down_i32",
-    "llvm.nvvm.shfl.idx.f32" => "__nvvm_shfl_idx_f32",
-    "llvm.nvvm.shfl.idx.i32" => "__nvvm_shfl_idx_i32",
-    "llvm.nvvm.shfl.sync.bfly.f32" => "__nvvm_shfl_sync_bfly_f32",
-    "llvm.nvvm.shfl.sync.bfly.i32" => "__nvvm_shfl_sync_bfly_i32",
-    "llvm.nvvm.shfl.sync.down.f32" => "__nvvm_shfl_sync_down_f32",
-    "llvm.nvvm.shfl.sync.down.i32" => "__nvvm_shfl_sync_down_i32",
-    "llvm.nvvm.shfl.sync.idx.f32" => "__nvvm_shfl_sync_idx_f32",
-    "llvm.nvvm.shfl.sync.idx.i32" => "__nvvm_shfl_sync_idx_i32",
-    "llvm.nvvm.shfl.sync.up.f32" => "__nvvm_shfl_sync_up_f32",
-    "llvm.nvvm.shfl.sync.up.i32" => "__nvvm_shfl_sync_up_i32",
-    "llvm.nvvm.shfl.up.f32" => "__nvvm_shfl_up_f32",
-    "llvm.nvvm.shfl.up.i32" => "__nvvm_shfl_up_i32",
-    "llvm.nvvm.sin.approx.f" => "__nvvm_sin_approx_f",
-    "llvm.nvvm.sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
-    "llvm.nvvm.sqrt.approx.f" => "__nvvm_sqrt_approx_f",
-    "llvm.nvvm.sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
-    "llvm.nvvm.sqrt.f" => "__nvvm_sqrt_f",
-    "llvm.nvvm.sqrt.rm.d" => "__nvvm_sqrt_rm_d",
-    "llvm.nvvm.sqrt.rm.f" => "__nvvm_sqrt_rm_f",
-    "llvm.nvvm.sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
-    "llvm.nvvm.sqrt.rn.d" => "__nvvm_sqrt_rn_d",
-    "llvm.nvvm.sqrt.rn.f" => "__nvvm_sqrt_rn_f",
-    "llvm.nvvm.sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
-    "llvm.nvvm.sqrt.rp.d" => "__nvvm_sqrt_rp_d",
-    "llvm.nvvm.sqrt.rp.f" => "__nvvm_sqrt_rp_f",
-    "llvm.nvvm.sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
-    "llvm.nvvm.sqrt.rz.d" => "__nvvm_sqrt_rz_d",
-    "llvm.nvvm.sqrt.rz.f" => "__nvvm_sqrt_rz_f",
-    "llvm.nvvm.sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
-    "llvm.nvvm.suq.array.size" => "__nvvm_suq_array_size",
-    "llvm.nvvm.suq.channel.data.type" => "__nvvm_suq_channel_data_type",
-    "llvm.nvvm.suq.channel.order" => "__nvvm_suq_channel_order",
-    "llvm.nvvm.suq.depth" => "__nvvm_suq_depth",
-    "llvm.nvvm.suq.height" => "__nvvm_suq_height",
-    "llvm.nvvm.suq.width" => "__nvvm_suq_width",
-    "llvm.nvvm.sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
-    "llvm.nvvm.sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
-    "llvm.nvvm.sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
-    "llvm.nvvm.sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
-    "llvm.nvvm.sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
-    "llvm.nvvm.sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
-    "llvm.nvvm.sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
-    "llvm.nvvm.sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
-    "llvm.nvvm.sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
-    "llvm.nvvm.sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
-    "llvm.nvvm.sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
-    "llvm.nvvm.sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
-    "llvm.nvvm.sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
-    "llvm.nvvm.sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
-    "llvm.nvvm.sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
-    "llvm.nvvm.sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
-    "llvm.nvvm.sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
-    "llvm.nvvm.sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
-    "llvm.nvvm.sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
-    "llvm.nvvm.sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
-    "llvm.nvvm.sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
-    "llvm.nvvm.sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
-    "llvm.nvvm.sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
-    "llvm.nvvm.sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
-    "llvm.nvvm.sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
-    "llvm.nvvm.sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
-    "llvm.nvvm.sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
-    "llvm.nvvm.sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
-    "llvm.nvvm.sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
-    "llvm.nvvm.sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
-    "llvm.nvvm.sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
-    "llvm.nvvm.sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
-    "llvm.nvvm.sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
-    "llvm.nvvm.sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
-    "llvm.nvvm.sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
-    "llvm.nvvm.sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
-    "llvm.nvvm.sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
-    "llvm.nvvm.sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
-    "llvm.nvvm.sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
-    "llvm.nvvm.sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
-    "llvm.nvvm.sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
-    "llvm.nvvm.sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
-    "llvm.nvvm.sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
-    "llvm.nvvm.sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
-    "llvm.nvvm.sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
-    "llvm.nvvm.sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
-    "llvm.nvvm.sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
-    "llvm.nvvm.sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
-    "llvm.nvvm.sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
-    "llvm.nvvm.sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
-    "llvm.nvvm.sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
-    "llvm.nvvm.sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
-    "llvm.nvvm.sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
-    "llvm.nvvm.sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
-    "llvm.nvvm.sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
-    "llvm.nvvm.sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
-    "llvm.nvvm.sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
-    "llvm.nvvm.sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
-    "llvm.nvvm.sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
-    "llvm.nvvm.sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
-    "llvm.nvvm.sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
-    "llvm.nvvm.sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
-    "llvm.nvvm.sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
-    "llvm.nvvm.sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
-    "llvm.nvvm.sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
-    "llvm.nvvm.sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
-    "llvm.nvvm.sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
-    "llvm.nvvm.sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
-    "llvm.nvvm.sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
-    "llvm.nvvm.sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
-    "llvm.nvvm.sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
-    "llvm.nvvm.sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
-    "llvm.nvvm.sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
-    "llvm.nvvm.sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
-    "llvm.nvvm.sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
-    "llvm.nvvm.sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
-    "llvm.nvvm.sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
-    "llvm.nvvm.sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
-    "llvm.nvvm.sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
-    "llvm.nvvm.sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
-    "llvm.nvvm.sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
-    "llvm.nvvm.sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
-    "llvm.nvvm.sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
-    "llvm.nvvm.sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
-    "llvm.nvvm.sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
-    "llvm.nvvm.sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
-    "llvm.nvvm.sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
-    "llvm.nvvm.sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
-    "llvm.nvvm.sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
-    "llvm.nvvm.sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
-    "llvm.nvvm.sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
-    "llvm.nvvm.sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
-    "llvm.nvvm.sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
-    "llvm.nvvm.sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
-    "llvm.nvvm.sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
-    "llvm.nvvm.sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
-    "llvm.nvvm.sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
-    "llvm.nvvm.sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
-    "llvm.nvvm.sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
-    "llvm.nvvm.sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
-    "llvm.nvvm.sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
-    "llvm.nvvm.sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
-    "llvm.nvvm.sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
-    "llvm.nvvm.sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
-    "llvm.nvvm.sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
-    "llvm.nvvm.sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
-    "llvm.nvvm.sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
-    "llvm.nvvm.sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
-    "llvm.nvvm.sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
-    "llvm.nvvm.sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
-    "llvm.nvvm.sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
-    "llvm.nvvm.sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
-    "llvm.nvvm.sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
-    "llvm.nvvm.sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
-    "llvm.nvvm.sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
-    "llvm.nvvm.sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
-    "llvm.nvvm.sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
-    "llvm.nvvm.sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
-    "llvm.nvvm.sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
-    "llvm.nvvm.sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
-    "llvm.nvvm.sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
-    "llvm.nvvm.sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
-    "llvm.nvvm.sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
-    "llvm.nvvm.sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
-    "llvm.nvvm.sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
-    "llvm.nvvm.sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
-    "llvm.nvvm.sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
-    "llvm.nvvm.sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
-    "llvm.nvvm.sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
-    "llvm.nvvm.sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
-    "llvm.nvvm.sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
-    "llvm.nvvm.sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
-    "llvm.nvvm.sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
-    "llvm.nvvm.sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
-    "llvm.nvvm.sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
-    "llvm.nvvm.sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
-    "llvm.nvvm.sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
-    "llvm.nvvm.sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
-    "llvm.nvvm.sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
-    "llvm.nvvm.sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
-    "llvm.nvvm.sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
-    "llvm.nvvm.sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
-    "llvm.nvvm.sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
-    "llvm.nvvm.sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
-    "llvm.nvvm.sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
-    "llvm.nvvm.sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
-    "llvm.nvvm.sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
-    "llvm.nvvm.sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
-    "llvm.nvvm.sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
-    "llvm.nvvm.sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
-    "llvm.nvvm.sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
-    "llvm.nvvm.sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
-    "llvm.nvvm.sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
-    "llvm.nvvm.sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
-    "llvm.nvvm.sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
-    "llvm.nvvm.sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
-    "llvm.nvvm.sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
-    "llvm.nvvm.sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
-    "llvm.nvvm.sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
-    "llvm.nvvm.sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
-    "llvm.nvvm.sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
-    "llvm.nvvm.sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
-    "llvm.nvvm.sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
-    "llvm.nvvm.sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
-    "llvm.nvvm.swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
-    "llvm.nvvm.trunc.d" => "__nvvm_trunc_d",
-    "llvm.nvvm.trunc.f" => "__nvvm_trunc_f",
-    "llvm.nvvm.trunc.ftz.f" => "__nvvm_trunc_ftz_f",
-    "llvm.nvvm.txq.array.size" => "__nvvm_txq_array_size",
-    "llvm.nvvm.txq.channel.data.type" => "__nvvm_txq_channel_data_type",
-    "llvm.nvvm.txq.channel.order" => "__nvvm_txq_channel_order",
-    "llvm.nvvm.txq.depth" => "__nvvm_txq_depth",
-    "llvm.nvvm.txq.height" => "__nvvm_txq_height",
-    "llvm.nvvm.txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
-    "llvm.nvvm.txq.num.samples" => "__nvvm_txq_num_samples",
-    "llvm.nvvm.txq.width" => "__nvvm_txq_width",
-    "llvm.nvvm.ue8m0x2.to.bf16x2" => "__nvvm_ue8m0x2_to_bf16x2",
-    "llvm.nvvm.ui2d.rm" => "__nvvm_ui2d_rm",
-    "llvm.nvvm.ui2d.rn" => "__nvvm_ui2d_rn",
-    "llvm.nvvm.ui2d.rp" => "__nvvm_ui2d_rp",
-    "llvm.nvvm.ui2d.rz" => "__nvvm_ui2d_rz",
-    "llvm.nvvm.ui2f.rm" => "__nvvm_ui2f_rm",
-    "llvm.nvvm.ui2f.rn" => "__nvvm_ui2f_rn",
-    "llvm.nvvm.ui2f.rp" => "__nvvm_ui2f_rp",
-    "llvm.nvvm.ui2f.rz" => "__nvvm_ui2f_rz",
-    "llvm.nvvm.ull2d.rm" => "__nvvm_ull2d_rm",
-    "llvm.nvvm.ull2d.rn" => "__nvvm_ull2d_rn",
-    "llvm.nvvm.ull2d.rp" => "__nvvm_ull2d_rp",
-    "llvm.nvvm.ull2d.rz" => "__nvvm_ull2d_rz",
-    "llvm.nvvm.ull2f.rm" => "__nvvm_ull2f_rm",
-    "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
-    "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
-    "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
-    "llvm.nvvm.vote.all" => "__nvvm_vote_all",
-    "llvm.nvvm.vote.all.sync" => "__nvvm_vote_all_sync",
-    "llvm.nvvm.vote.any" => "__nvvm_vote_any",
-    "llvm.nvvm.vote.any.sync" => "__nvvm_vote_any_sync",
-    "llvm.nvvm.vote.ballot" => "__nvvm_vote_ballot",
-    "llvm.nvvm.vote.ballot.sync" => "__nvvm_vote_ballot_sync",
-    "llvm.nvvm.vote.uni" => "__nvvm_vote_uni",
-    "llvm.nvvm.vote.uni.sync" => "__nvvm_vote_uni_sync",
-    // ppc
-    "llvm.ppc.addex" => "__builtin_ppc_addex",
-    "llvm.ppc.addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
-    "llvm.ppc.addg6s" => "__builtin_addg6s",
-    "llvm.ppc.addg6sd" => "__builtin_ppc_addg6s",
-    "llvm.ppc.altivec.crypto.vcipher" => "__builtin_altivec_crypto_vcipher",
-    "llvm.ppc.altivec.crypto.vcipherlast" => "__builtin_altivec_crypto_vcipherlast",
-    "llvm.ppc.altivec.crypto.vncipher" => "__builtin_altivec_crypto_vncipher",
-    "llvm.ppc.altivec.crypto.vncipherlast" => "__builtin_altivec_crypto_vncipherlast",
-    "llvm.ppc.altivec.crypto.vpermxor" => "__builtin_altivec_crypto_vpermxor",
-    "llvm.ppc.altivec.crypto.vpermxor.be" => "__builtin_altivec_crypto_vpermxor_be",
-    "llvm.ppc.altivec.crypto.vpmsumb" => "__builtin_altivec_crypto_vpmsumb",
-    "llvm.ppc.altivec.crypto.vpmsumd" => "__builtin_altivec_crypto_vpmsumd",
-    "llvm.ppc.altivec.crypto.vpmsumh" => "__builtin_altivec_crypto_vpmsumh",
-    "llvm.ppc.altivec.crypto.vpmsumw" => "__builtin_altivec_crypto_vpmsumw",
-    "llvm.ppc.altivec.crypto.vsbox" => "__builtin_altivec_crypto_vsbox",
-    "llvm.ppc.altivec.crypto.vshasigmad" => "__builtin_altivec_crypto_vshasigmad",
-    "llvm.ppc.altivec.crypto.vshasigmaw" => "__builtin_altivec_crypto_vshasigmaw",
-    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
-    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
-    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
-    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
-    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
-    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
-    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
-    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
-    "llvm.ppc.altivec.mtvsrbm" => "__builtin_altivec_mtvsrbm",
-    "llvm.ppc.altivec.mtvsrdm" => "__builtin_altivec_mtvsrdm",
-    "llvm.ppc.altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
-    "llvm.ppc.altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
-    "llvm.ppc.altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
-    "llvm.ppc.altivec.vabsdub" => "__builtin_altivec_vabsdub",
-    "llvm.ppc.altivec.vabsduh" => "__builtin_altivec_vabsduh",
-    "llvm.ppc.altivec.vabsduw" => "__builtin_altivec_vabsduw",
-    "llvm.ppc.altivec.vaddcuq" => "__builtin_altivec_vaddcuq",
-    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
-    "llvm.ppc.altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
-    "llvm.ppc.altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
-    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
-    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
-    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
-    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
-    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
-    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
-    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
-    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
-    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
-    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
-    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
-    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
-    "llvm.ppc.altivec.vbpermd" => "__builtin_altivec_vbpermd",
-    "llvm.ppc.altivec.vbpermq" => "__builtin_altivec_vbpermq",
-    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
-    "llvm.ppc.altivec.vcfuged" => "__builtin_altivec_vcfuged",
-    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
-    "llvm.ppc.altivec.vclrlb" => "__builtin_altivec_vclrlb",
-    "llvm.ppc.altivec.vclrrb" => "__builtin_altivec_vclrrb",
-    "llvm.ppc.altivec.vclzdm" => "__builtin_altivec_vclzdm",
-    "llvm.ppc.altivec.vclzlsbb" => "__builtin_altivec_vclzlsbb",
-    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
-    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
-    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
-    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
-    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
-    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
-    "llvm.ppc.altivec.vcmpequd" => "__builtin_altivec_vcmpequd",
-    "llvm.ppc.altivec.vcmpequd.p" => "__builtin_altivec_vcmpequd_p",
-    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
-    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
-    "llvm.ppc.altivec.vcmpequq" => "__builtin_altivec_vcmpequq",
-    "llvm.ppc.altivec.vcmpequq.p" => "__builtin_altivec_vcmpequq_p",
-    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
-    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
-    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
-    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
-    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
-    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
-    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
-    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
-    "llvm.ppc.altivec.vcmpgtsd" => "__builtin_altivec_vcmpgtsd",
-    "llvm.ppc.altivec.vcmpgtsd.p" => "__builtin_altivec_vcmpgtsd_p",
-    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
-    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
-    "llvm.ppc.altivec.vcmpgtsq" => "__builtin_altivec_vcmpgtsq",
-    "llvm.ppc.altivec.vcmpgtsq.p" => "__builtin_altivec_vcmpgtsq_p",
-    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
-    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
-    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
-    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
-    "llvm.ppc.altivec.vcmpgtud" => "__builtin_altivec_vcmpgtud",
-    "llvm.ppc.altivec.vcmpgtud.p" => "__builtin_altivec_vcmpgtud_p",
-    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
-    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
-    "llvm.ppc.altivec.vcmpgtuq" => "__builtin_altivec_vcmpgtuq",
-    "llvm.ppc.altivec.vcmpgtuq.p" => "__builtin_altivec_vcmpgtuq_p",
-    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
-    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
-    "llvm.ppc.altivec.vcmpneb" => "__builtin_altivec_vcmpneb",
-    "llvm.ppc.altivec.vcmpneb.p" => "__builtin_altivec_vcmpneb_p",
-    "llvm.ppc.altivec.vcmpneh" => "__builtin_altivec_vcmpneh",
-    "llvm.ppc.altivec.vcmpneh.p" => "__builtin_altivec_vcmpneh_p",
-    "llvm.ppc.altivec.vcmpnew" => "__builtin_altivec_vcmpnew",
-    "llvm.ppc.altivec.vcmpnew.p" => "__builtin_altivec_vcmpnew_p",
-    "llvm.ppc.altivec.vcmpnezb" => "__builtin_altivec_vcmpnezb",
-    "llvm.ppc.altivec.vcmpnezb.p" => "__builtin_altivec_vcmpnezb_p",
-    "llvm.ppc.altivec.vcmpnezh" => "__builtin_altivec_vcmpnezh",
-    "llvm.ppc.altivec.vcmpnezh.p" => "__builtin_altivec_vcmpnezh_p",
-    "llvm.ppc.altivec.vcmpnezw" => "__builtin_altivec_vcmpnezw",
-    "llvm.ppc.altivec.vcmpnezw.p" => "__builtin_altivec_vcmpnezw_p",
-    "llvm.ppc.altivec.vcntmbb" => "__builtin_altivec_vcntmbb",
-    "llvm.ppc.altivec.vcntmbd" => "__builtin_altivec_vcntmbd",
-    "llvm.ppc.altivec.vcntmbh" => "__builtin_altivec_vcntmbh",
-    "llvm.ppc.altivec.vcntmbw" => "__builtin_altivec_vcntmbw",
-    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
-    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
-    "llvm.ppc.altivec.vctzdm" => "__builtin_altivec_vctzdm",
-    "llvm.ppc.altivec.vctzlsbb" => "__builtin_altivec_vctzlsbb",
-    "llvm.ppc.altivec.vdivesd" => "__builtin_altivec_vdivesd",
-    "llvm.ppc.altivec.vdivesq" => "__builtin_altivec_vdivesq",
-    "llvm.ppc.altivec.vdivesw" => "__builtin_altivec_vdivesw",
-    "llvm.ppc.altivec.vdiveud" => "__builtin_altivec_vdiveud",
-    "llvm.ppc.altivec.vdiveuq" => "__builtin_altivec_vdiveuq",
-    "llvm.ppc.altivec.vdiveuw" => "__builtin_altivec_vdiveuw",
-    "llvm.ppc.altivec.vexpandbm" => "__builtin_altivec_vexpandbm",
-    "llvm.ppc.altivec.vexpanddm" => "__builtin_altivec_vexpanddm",
-    "llvm.ppc.altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
-    "llvm.ppc.altivec.vexpandqm" => "__builtin_altivec_vexpandqm",
-    "llvm.ppc.altivec.vexpandwm" => "__builtin_altivec_vexpandwm",
-    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
-    "llvm.ppc.altivec.vextddvlx" => "__builtin_altivec_vextddvlx",
-    "llvm.ppc.altivec.vextddvrx" => "__builtin_altivec_vextddvrx",
-    "llvm.ppc.altivec.vextdubvlx" => "__builtin_altivec_vextdubvlx",
-    "llvm.ppc.altivec.vextdubvrx" => "__builtin_altivec_vextdubvrx",
-    "llvm.ppc.altivec.vextduhvlx" => "__builtin_altivec_vextduhvlx",
-    "llvm.ppc.altivec.vextduhvrx" => "__builtin_altivec_vextduhvrx",
-    "llvm.ppc.altivec.vextduwvlx" => "__builtin_altivec_vextduwvlx",
-    "llvm.ppc.altivec.vextduwvrx" => "__builtin_altivec_vextduwvrx",
-    "llvm.ppc.altivec.vextractbm" => "__builtin_altivec_vextractbm",
-    "llvm.ppc.altivec.vextractdm" => "__builtin_altivec_vextractdm",
-    "llvm.ppc.altivec.vextracthm" => "__builtin_altivec_vextracthm",
-    "llvm.ppc.altivec.vextractqm" => "__builtin_altivec_vextractqm",
-    "llvm.ppc.altivec.vextractwm" => "__builtin_altivec_vextractwm",
-    "llvm.ppc.altivec.vextsb2d" => "__builtin_altivec_vextsb2d",
-    "llvm.ppc.altivec.vextsb2w" => "__builtin_altivec_vextsb2w",
-    "llvm.ppc.altivec.vextsd2q" => "__builtin_altivec_vextsd2q",
-    "llvm.ppc.altivec.vextsh2d" => "__builtin_altivec_vextsh2d",
-    "llvm.ppc.altivec.vextsh2w" => "__builtin_altivec_vextsh2w",
-    "llvm.ppc.altivec.vextsw2d" => "__builtin_altivec_vextsw2d",
-    "llvm.ppc.altivec.vgbbd" => "__builtin_altivec_vgbbd",
-    "llvm.ppc.altivec.vgnb" => "__builtin_altivec_vgnb",
-    "llvm.ppc.altivec.vinsblx" => "__builtin_altivec_vinsblx",
-    "llvm.ppc.altivec.vinsbrx" => "__builtin_altivec_vinsbrx",
-    "llvm.ppc.altivec.vinsbvlx" => "__builtin_altivec_vinsbvlx",
-    "llvm.ppc.altivec.vinsbvrx" => "__builtin_altivec_vinsbvrx",
-    "llvm.ppc.altivec.vinsdlx" => "__builtin_altivec_vinsdlx",
-    "llvm.ppc.altivec.vinsdrx" => "__builtin_altivec_vinsdrx",
-    "llvm.ppc.altivec.vinshlx" => "__builtin_altivec_vinshlx",
-    "llvm.ppc.altivec.vinshrx" => "__builtin_altivec_vinshrx",
-    "llvm.ppc.altivec.vinshvlx" => "__builtin_altivec_vinshvlx",
-    "llvm.ppc.altivec.vinshvrx" => "__builtin_altivec_vinshvrx",
-    "llvm.ppc.altivec.vinswlx" => "__builtin_altivec_vinswlx",
-    "llvm.ppc.altivec.vinswrx" => "__builtin_altivec_vinswrx",
-    "llvm.ppc.altivec.vinswvlx" => "__builtin_altivec_vinswvlx",
-    "llvm.ppc.altivec.vinswvrx" => "__builtin_altivec_vinswvrx",
-    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
-    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
-    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
-    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
-    "llvm.ppc.altivec.vmaxsd" => "__builtin_altivec_vmaxsd",
-    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
-    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
-    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
-    "llvm.ppc.altivec.vmaxud" => "__builtin_altivec_vmaxud",
-    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
-    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
-    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
-    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
-    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
-    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
-    "llvm.ppc.altivec.vminsd" => "__builtin_altivec_vminsd",
-    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
-    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
-    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
-    "llvm.ppc.altivec.vminud" => "__builtin_altivec_vminud",
-    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
-    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
-    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
-    "llvm.ppc.altivec.vmsumcud" => "__builtin_altivec_vmsumcud",
-    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
-    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
-    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
-    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
-    "llvm.ppc.altivec.vmsumudm" => "__builtin_altivec_vmsumudm",
-    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
-    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
-    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
-    "llvm.ppc.altivec.vmulesd" => "__builtin_altivec_vmulesd",
-    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
-    "llvm.ppc.altivec.vmulesw" => "__builtin_altivec_vmulesw",
-    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
-    "llvm.ppc.altivec.vmuleud" => "__builtin_altivec_vmuleud",
-    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
-    "llvm.ppc.altivec.vmuleuw" => "__builtin_altivec_vmuleuw",
-    "llvm.ppc.altivec.vmulhsd" => "__builtin_altivec_vmulhsd",
-    "llvm.ppc.altivec.vmulhsw" => "__builtin_altivec_vmulhsw",
-    "llvm.ppc.altivec.vmulhud" => "__builtin_altivec_vmulhud",
-    "llvm.ppc.altivec.vmulhuw" => "__builtin_altivec_vmulhuw",
-    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
-    "llvm.ppc.altivec.vmulosd" => "__builtin_altivec_vmulosd",
-    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
-    "llvm.ppc.altivec.vmulosw" => "__builtin_altivec_vmulosw",
-    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
-    "llvm.ppc.altivec.vmuloud" => "__builtin_altivec_vmuloud",
-    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
-    "llvm.ppc.altivec.vmulouw" => "__builtin_altivec_vmulouw",
-    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
-    "llvm.ppc.altivec.vpdepd" => "__builtin_altivec_vpdepd",
-    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
-    "llvm.ppc.altivec.vpextd" => "__builtin_altivec_vpextd",
-    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
-    "llvm.ppc.altivec.vpksdss" => "__builtin_altivec_vpksdss",
-    "llvm.ppc.altivec.vpksdus" => "__builtin_altivec_vpksdus",
-    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
-    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
-    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
-    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
-    "llvm.ppc.altivec.vpkudus" => "__builtin_altivec_vpkudus",
-    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
-    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
-    "llvm.ppc.altivec.vprtybd" => "__builtin_altivec_vprtybd",
-    "llvm.ppc.altivec.vprtybq" => "__builtin_altivec_vprtybq",
-    "llvm.ppc.altivec.vprtybw" => "__builtin_altivec_vprtybw",
-    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
-    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
-    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
-    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
-    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
-    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
-    "llvm.ppc.altivec.vrld" => "__builtin_altivec_vrld",
-    "llvm.ppc.altivec.vrldmi" => "__builtin_altivec_vrldmi",
-    "llvm.ppc.altivec.vrldnm" => "__builtin_altivec_vrldnm",
-    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
-    "llvm.ppc.altivec.vrlqmi" => "__builtin_altivec_vrlqmi",
-    "llvm.ppc.altivec.vrlqnm" => "__builtin_altivec_vrlqnm",
-    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
-    "llvm.ppc.altivec.vrlwmi" => "__builtin_altivec_vrlwmi",
-    "llvm.ppc.altivec.vrlwnm" => "__builtin_altivec_vrlwnm",
-    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
-    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
-    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
-    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
-    "llvm.ppc.altivec.vsldbi" => "__builtin_altivec_vsldbi",
-    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
-    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
-    "llvm.ppc.altivec.vslv" => "__builtin_altivec_vslv",
-    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
-    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
-    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
-    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
-    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
-    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
-    "llvm.ppc.altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
-    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
-    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
-    "llvm.ppc.altivec.vsrv" => "__builtin_altivec_vsrv",
-    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
-    "llvm.ppc.altivec.vstribl" => "__builtin_altivec_vstribl",
-    "llvm.ppc.altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
-    "llvm.ppc.altivec.vstribr" => "__builtin_altivec_vstribr",
-    "llvm.ppc.altivec.vstribr.p" => "__builtin_altivec_vstribr_p",
-    "llvm.ppc.altivec.vstrihl" => "__builtin_altivec_vstrihl",
-    "llvm.ppc.altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
-    "llvm.ppc.altivec.vstrihr" => "__builtin_altivec_vstrihr",
-    "llvm.ppc.altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
-    "llvm.ppc.altivec.vsubcuq" => "__builtin_altivec_vsubcuq",
-    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
-    "llvm.ppc.altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
-    "llvm.ppc.altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
-    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
-    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
-    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
-    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
-    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
-    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
-    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
-    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
-    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
-    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
-    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
-    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
-    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
-    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
-    "llvm.ppc.altivec.vupkhsw" => "__builtin_altivec_vupkhsw",
-    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
-    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
-    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
-    "llvm.ppc.altivec.vupklsw" => "__builtin_altivec_vupklsw",
-    "llvm.ppc.bcdadd" => "__builtin_ppc_bcdadd",
-    "llvm.ppc.bcdadd.p" => "__builtin_ppc_bcdadd_p",
-    "llvm.ppc.bcdsub" => "__builtin_ppc_bcdsub",
-    "llvm.ppc.bcdsub.p" => "__builtin_ppc_bcdsub_p",
-    "llvm.ppc.bpermd" => "__builtin_bpermd",
-    "llvm.ppc.cbcdtd" => "__builtin_cbcdtd",
-    "llvm.ppc.cbcdtdd" => "__builtin_ppc_cbcdtd",
-    "llvm.ppc.cdtbcd" => "__builtin_cdtbcd",
-    "llvm.ppc.cdtbcdd" => "__builtin_ppc_cdtbcd",
-    "llvm.ppc.cfuged" => "__builtin_cfuged",
-    "llvm.ppc.cmpeqb" => "__builtin_ppc_cmpeqb",
-    "llvm.ppc.cmprb" => "__builtin_ppc_cmprb",
-    "llvm.ppc.cntlzdm" => "__builtin_cntlzdm",
-    "llvm.ppc.cnttzdm" => "__builtin_cnttzdm",
-    "llvm.ppc.compare.exp.eq" => "__builtin_ppc_compare_exp_eq",
-    "llvm.ppc.compare.exp.gt" => "__builtin_ppc_compare_exp_gt",
-    "llvm.ppc.compare.exp.lt" => "__builtin_ppc_compare_exp_lt",
-    "llvm.ppc.compare.exp.uo" => "__builtin_ppc_compare_exp_uo",
-    "llvm.ppc.darn" => "__builtin_darn",
-    "llvm.ppc.darn32" => "__builtin_darn_32",
-    "llvm.ppc.darnraw" => "__builtin_darn_raw",
-    "llvm.ppc.dcbf" => "__builtin_dcbf",
-    "llvm.ppc.dcbfl" => "__builtin_ppc_dcbfl",
-    "llvm.ppc.dcbflp" => "__builtin_ppc_dcbflp",
-    "llvm.ppc.dcbst" => "__builtin_ppc_dcbst",
-    "llvm.ppc.dcbt" => "__builtin_ppc_dcbt",
-    "llvm.ppc.dcbtst" => "__builtin_ppc_dcbtst",
-    "llvm.ppc.dcbtstt" => "__builtin_ppc_dcbtstt",
-    "llvm.ppc.dcbtt" => "__builtin_ppc_dcbtt",
-    "llvm.ppc.dcbz" => "__builtin_ppc_dcbz",
-    "llvm.ppc.divde" => "__builtin_divde",
-    "llvm.ppc.divdeu" => "__builtin_divdeu",
-    "llvm.ppc.divf128.round.to.odd" => "__builtin_divf128_round_to_odd",
-    "llvm.ppc.divwe" => "__builtin_divwe",
-    "llvm.ppc.divweu" => "__builtin_divweu",
-    "llvm.ppc.eieio" => "__builtin_ppc_eieio",
-    "llvm.ppc.extract.exp" => "__builtin_ppc_extract_exp",
-    "llvm.ppc.extract.sig" => "__builtin_ppc_extract_sig",
-    "llvm.ppc.fcfid" => "__builtin_ppc_fcfid",
-    "llvm.ppc.fcfud" => "__builtin_ppc_fcfud",
-    "llvm.ppc.fctid" => "__builtin_ppc_fctid",
-    "llvm.ppc.fctidz" => "__builtin_ppc_fctidz",
-    "llvm.ppc.fctiw" => "__builtin_ppc_fctiw",
-    "llvm.ppc.fctiwz" => "__builtin_ppc_fctiwz",
-    "llvm.ppc.fctudz" => "__builtin_ppc_fctudz",
-    "llvm.ppc.fctuwz" => "__builtin_ppc_fctuwz",
-    "llvm.ppc.fence" => "__builtin_ppc_fence",
-    "llvm.ppc.fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
-    "llvm.ppc.fmsub" => "__builtin_ppc_fmsub",
-    "llvm.ppc.fmsubs" => "__builtin_ppc_fmsubs",
-    "llvm.ppc.fnabs" => "__builtin_ppc_fnabs",
-    "llvm.ppc.fnabss" => "__builtin_ppc_fnabss",
-    "llvm.ppc.fnmadd" => "__builtin_ppc_fnmadd",
-    "llvm.ppc.fnmadds" => "__builtin_ppc_fnmadds",
-    "llvm.ppc.fre" => "__builtin_ppc_fre",
-    "llvm.ppc.fres" => "__builtin_ppc_fres",
-    "llvm.ppc.frsqrte" => "__builtin_ppc_frsqrte",
-    "llvm.ppc.frsqrtes" => "__builtin_ppc_frsqrtes",
-    "llvm.ppc.fsel" => "__builtin_ppc_fsel",
-    "llvm.ppc.fsels" => "__builtin_ppc_fsels",
-    "llvm.ppc.get.texasr" => "__builtin_get_texasr",
-    "llvm.ppc.get.texasru" => "__builtin_get_texasru",
-    "llvm.ppc.get.tfhar" => "__builtin_get_tfhar",
-    "llvm.ppc.get.tfiar" => "__builtin_get_tfiar",
-    "llvm.ppc.icbt" => "__builtin_ppc_icbt",
-    "llvm.ppc.insert.exp" => "__builtin_ppc_insert_exp",
-    "llvm.ppc.iospace.eieio" => "__builtin_ppc_iospace_eieio",
-    "llvm.ppc.iospace.lwsync" => "__builtin_ppc_iospace_lwsync",
-    "llvm.ppc.iospace.sync" => "__builtin_ppc_iospace_sync",
-    "llvm.ppc.isync" => "__builtin_ppc_isync",
-    "llvm.ppc.load4r" => "__builtin_ppc_load4r",
-    "llvm.ppc.load8r" => "__builtin_ppc_load8r",
-    "llvm.ppc.lwsync" => "__builtin_ppc_lwsync",
-    "llvm.ppc.maddhd" => "__builtin_ppc_maddhd",
-    "llvm.ppc.maddhdu" => "__builtin_ppc_maddhdu",
-    "llvm.ppc.maddld" => "__builtin_ppc_maddld",
-    "llvm.ppc.mffsl" => "__builtin_ppc_mffsl",
-    "llvm.ppc.mfmsr" => "__builtin_ppc_mfmsr",
-    "llvm.ppc.mftbu" => "__builtin_ppc_mftbu",
-    "llvm.ppc.mtfsb0" => "__builtin_ppc_mtfsb0",
-    "llvm.ppc.mtfsb1" => "__builtin_ppc_mtfsb1",
-    "llvm.ppc.mtfsfi" => "__builtin_ppc_mtfsfi",
-    "llvm.ppc.mtmsr" => "__builtin_ppc_mtmsr",
-    "llvm.ppc.mulf128.round.to.odd" => "__builtin_mulf128_round_to_odd",
-    "llvm.ppc.mulhd" => "__builtin_ppc_mulhd",
-    "llvm.ppc.mulhdu" => "__builtin_ppc_mulhdu",
-    "llvm.ppc.mulhw" => "__builtin_ppc_mulhw",
-    "llvm.ppc.mulhwu" => "__builtin_ppc_mulhwu",
-    "llvm.ppc.pack.longdouble" => "__builtin_pack_longdouble",
-    "llvm.ppc.pdepd" => "__builtin_pdepd",
-    "llvm.ppc.pextd" => "__builtin_pextd",
-    "llvm.ppc.qpx.qvfabs" => "__builtin_qpx_qvfabs",
-    "llvm.ppc.qpx.qvfadd" => "__builtin_qpx_qvfadd",
-    "llvm.ppc.qpx.qvfadds" => "__builtin_qpx_qvfadds",
-    "llvm.ppc.qpx.qvfcfid" => "__builtin_qpx_qvfcfid",
-    "llvm.ppc.qpx.qvfcfids" => "__builtin_qpx_qvfcfids",
-    "llvm.ppc.qpx.qvfcfidu" => "__builtin_qpx_qvfcfidu",
-    "llvm.ppc.qpx.qvfcfidus" => "__builtin_qpx_qvfcfidus",
-    "llvm.ppc.qpx.qvfcmpeq" => "__builtin_qpx_qvfcmpeq",
-    "llvm.ppc.qpx.qvfcmpgt" => "__builtin_qpx_qvfcmpgt",
-    "llvm.ppc.qpx.qvfcmplt" => "__builtin_qpx_qvfcmplt",
-    "llvm.ppc.qpx.qvfcpsgn" => "__builtin_qpx_qvfcpsgn",
-    "llvm.ppc.qpx.qvfctid" => "__builtin_qpx_qvfctid",
-    "llvm.ppc.qpx.qvfctidu" => "__builtin_qpx_qvfctidu",
-    "llvm.ppc.qpx.qvfctiduz" => "__builtin_qpx_qvfctiduz",
-    "llvm.ppc.qpx.qvfctidz" => "__builtin_qpx_qvfctidz",
-    "llvm.ppc.qpx.qvfctiw" => "__builtin_qpx_qvfctiw",
-    "llvm.ppc.qpx.qvfctiwu" => "__builtin_qpx_qvfctiwu",
-    "llvm.ppc.qpx.qvfctiwuz" => "__builtin_qpx_qvfctiwuz",
-    "llvm.ppc.qpx.qvfctiwz" => "__builtin_qpx_qvfctiwz",
-    "llvm.ppc.qpx.qvflogical" => "__builtin_qpx_qvflogical",
-    "llvm.ppc.qpx.qvfmadd" => "__builtin_qpx_qvfmadd",
-    "llvm.ppc.qpx.qvfmadds" => "__builtin_qpx_qvfmadds",
-    "llvm.ppc.qpx.qvfmsub" => "__builtin_qpx_qvfmsub",
-    "llvm.ppc.qpx.qvfmsubs" => "__builtin_qpx_qvfmsubs",
-    "llvm.ppc.qpx.qvfmul" => "__builtin_qpx_qvfmul",
-    "llvm.ppc.qpx.qvfmuls" => "__builtin_qpx_qvfmuls",
-    "llvm.ppc.qpx.qvfnabs" => "__builtin_qpx_qvfnabs",
-    "llvm.ppc.qpx.qvfneg" => "__builtin_qpx_qvfneg",
-    "llvm.ppc.qpx.qvfnmadd" => "__builtin_qpx_qvfnmadd",
-    "llvm.ppc.qpx.qvfnmadds" => "__builtin_qpx_qvfnmadds",
-    "llvm.ppc.qpx.qvfnmsub" => "__builtin_qpx_qvfnmsub",
-    "llvm.ppc.qpx.qvfnmsubs" => "__builtin_qpx_qvfnmsubs",
-    "llvm.ppc.qpx.qvfperm" => "__builtin_qpx_qvfperm",
-    "llvm.ppc.qpx.qvfre" => "__builtin_qpx_qvfre",
-    "llvm.ppc.qpx.qvfres" => "__builtin_qpx_qvfres",
-    "llvm.ppc.qpx.qvfrim" => "__builtin_qpx_qvfrim",
-    "llvm.ppc.qpx.qvfrin" => "__builtin_qpx_qvfrin",
-    "llvm.ppc.qpx.qvfrip" => "__builtin_qpx_qvfrip",
-    "llvm.ppc.qpx.qvfriz" => "__builtin_qpx_qvfriz",
-    "llvm.ppc.qpx.qvfrsp" => "__builtin_qpx_qvfrsp",
-    "llvm.ppc.qpx.qvfrsqrte" => "__builtin_qpx_qvfrsqrte",
-    "llvm.ppc.qpx.qvfrsqrtes" => "__builtin_qpx_qvfrsqrtes",
-    "llvm.ppc.qpx.qvfsel" => "__builtin_qpx_qvfsel",
-    "llvm.ppc.qpx.qvfsub" => "__builtin_qpx_qvfsub",
-    "llvm.ppc.qpx.qvfsubs" => "__builtin_qpx_qvfsubs",
-    "llvm.ppc.qpx.qvftstnan" => "__builtin_qpx_qvftstnan",
-    "llvm.ppc.qpx.qvfxmadd" => "__builtin_qpx_qvfxmadd",
-    "llvm.ppc.qpx.qvfxmadds" => "__builtin_qpx_qvfxmadds",
-    "llvm.ppc.qpx.qvfxmul" => "__builtin_qpx_qvfxmul",
-    "llvm.ppc.qpx.qvfxmuls" => "__builtin_qpx_qvfxmuls",
-    "llvm.ppc.qpx.qvfxxcpnmadd" => "__builtin_qpx_qvfxxcpnmadd",
-    "llvm.ppc.qpx.qvfxxcpnmadds" => "__builtin_qpx_qvfxxcpnmadds",
-    "llvm.ppc.qpx.qvfxxmadd" => "__builtin_qpx_qvfxxmadd",
-    "llvm.ppc.qpx.qvfxxmadds" => "__builtin_qpx_qvfxxmadds",
-    "llvm.ppc.qpx.qvfxxnpmadd" => "__builtin_qpx_qvfxxnpmadd",
-    "llvm.ppc.qpx.qvfxxnpmadds" => "__builtin_qpx_qvfxxnpmadds",
-    "llvm.ppc.qpx.qvgpci" => "__builtin_qpx_qvgpci",
-    "llvm.ppc.qpx.qvlfcd" => "__builtin_qpx_qvlfcd",
-    "llvm.ppc.qpx.qvlfcda" => "__builtin_qpx_qvlfcda",
-    "llvm.ppc.qpx.qvlfcs" => "__builtin_qpx_qvlfcs",
-    "llvm.ppc.qpx.qvlfcsa" => "__builtin_qpx_qvlfcsa",
-    "llvm.ppc.qpx.qvlfd" => "__builtin_qpx_qvlfd",
-    "llvm.ppc.qpx.qvlfda" => "__builtin_qpx_qvlfda",
-    "llvm.ppc.qpx.qvlfiwa" => "__builtin_qpx_qvlfiwa",
-    "llvm.ppc.qpx.qvlfiwaa" => "__builtin_qpx_qvlfiwaa",
-    "llvm.ppc.qpx.qvlfiwz" => "__builtin_qpx_qvlfiwz",
-    "llvm.ppc.qpx.qvlfiwza" => "__builtin_qpx_qvlfiwza",
-    "llvm.ppc.qpx.qvlfs" => "__builtin_qpx_qvlfs",
-    "llvm.ppc.qpx.qvlfsa" => "__builtin_qpx_qvlfsa",
-    "llvm.ppc.qpx.qvlpcld" => "__builtin_qpx_qvlpcld",
-    "llvm.ppc.qpx.qvlpcls" => "__builtin_qpx_qvlpcls",
-    "llvm.ppc.qpx.qvlpcrd" => "__builtin_qpx_qvlpcrd",
-    "llvm.ppc.qpx.qvlpcrs" => "__builtin_qpx_qvlpcrs",
-    "llvm.ppc.qpx.qvstfcd" => "__builtin_qpx_qvstfcd",
-    "llvm.ppc.qpx.qvstfcda" => "__builtin_qpx_qvstfcda",
-    "llvm.ppc.qpx.qvstfcs" => "__builtin_qpx_qvstfcs",
-    "llvm.ppc.qpx.qvstfcsa" => "__builtin_qpx_qvstfcsa",
-    "llvm.ppc.qpx.qvstfd" => "__builtin_qpx_qvstfd",
-    "llvm.ppc.qpx.qvstfda" => "__builtin_qpx_qvstfda",
-    "llvm.ppc.qpx.qvstfiw" => "__builtin_qpx_qvstfiw",
-    "llvm.ppc.qpx.qvstfiwa" => "__builtin_qpx_qvstfiwa",
-    "llvm.ppc.qpx.qvstfs" => "__builtin_qpx_qvstfs",
-    "llvm.ppc.qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
-    "llvm.ppc.readflm" => "__builtin_readflm",
-    "llvm.ppc.rlwimi" => "__builtin_ppc_rlwimi",
-    "llvm.ppc.rlwnm" => "__builtin_ppc_rlwnm",
-    "llvm.ppc.scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
-    "llvm.ppc.scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
-    "llvm.ppc.set.texasr" => "__builtin_set_texasr",
-    "llvm.ppc.set.texasru" => "__builtin_set_texasru",
-    "llvm.ppc.set.tfhar" => "__builtin_set_tfhar",
-    "llvm.ppc.set.tfiar" => "__builtin_set_tfiar",
-    "llvm.ppc.setb" => "__builtin_ppc_setb",
-    "llvm.ppc.setflm" => "__builtin_setflm",
-    "llvm.ppc.setrnd" => "__builtin_setrnd",
-    "llvm.ppc.sqrtf128.round.to.odd" => "__builtin_sqrtf128_round_to_odd",
-    "llvm.ppc.stbcx" => "__builtin_ppc_stbcx",
-    "llvm.ppc.stdcx" => "__builtin_ppc_stdcx",
-    "llvm.ppc.stfiw" => "__builtin_ppc_stfiw",
-    "llvm.ppc.store2r" => "__builtin_ppc_store2r",
-    "llvm.ppc.store4r" => "__builtin_ppc_store4r",
-    "llvm.ppc.store8r" => "__builtin_ppc_store8r",
-    "llvm.ppc.stwcx" => "__builtin_ppc_stwcx",
-    "llvm.ppc.subf128.round.to.odd" => "__builtin_subf128_round_to_odd",
-    "llvm.ppc.sync" => "__builtin_ppc_sync",
-    "llvm.ppc.tabort" => "__builtin_tabort",
-    "llvm.ppc.tabortdc" => "__builtin_tabortdc",
-    "llvm.ppc.tabortdci" => "__builtin_tabortdci",
-    "llvm.ppc.tabortwc" => "__builtin_tabortwc",
-    "llvm.ppc.tabortwci" => "__builtin_tabortwci",
-    "llvm.ppc.tbegin" => "__builtin_tbegin",
-    "llvm.ppc.tcheck" => "__builtin_tcheck",
-    "llvm.ppc.tdw" => "__builtin_ppc_tdw",
-    "llvm.ppc.tend" => "__builtin_tend",
-    "llvm.ppc.tendall" => "__builtin_tendall",
-    "llvm.ppc.trap" => "__builtin_ppc_trap",
-    "llvm.ppc.trapd" => "__builtin_ppc_trapd",
-    "llvm.ppc.trechkpt" => "__builtin_trechkpt",
-    "llvm.ppc.treclaim" => "__builtin_treclaim",
-    "llvm.ppc.tresume" => "__builtin_tresume",
-    "llvm.ppc.truncf128.round.to.odd" => "__builtin_truncf128_round_to_odd",
-    "llvm.ppc.tsr" => "__builtin_tsr",
-    "llvm.ppc.tsuspend" => "__builtin_tsuspend",
-    "llvm.ppc.ttest" => "__builtin_ttest",
-    "llvm.ppc.tw" => "__builtin_ppc_tw",
-    "llvm.ppc.unpack.longdouble" => "__builtin_unpack_longdouble",
-    "llvm.ppc.vsx.xsmaxdp" => "__builtin_vsx_xsmaxdp",
-    "llvm.ppc.vsx.xsmindp" => "__builtin_vsx_xsmindp",
-    "llvm.ppc.vsx.xvcmpeqdp" => "__builtin_vsx_xvcmpeqdp",
-    "llvm.ppc.vsx.xvcmpeqdp.p" => "__builtin_vsx_xvcmpeqdp_p",
-    "llvm.ppc.vsx.xvcmpeqsp" => "__builtin_vsx_xvcmpeqsp",
-    "llvm.ppc.vsx.xvcmpeqsp.p" => "__builtin_vsx_xvcmpeqsp_p",
-    "llvm.ppc.vsx.xvcmpgedp" => "__builtin_vsx_xvcmpgedp",
-    "llvm.ppc.vsx.xvcmpgedp.p" => "__builtin_vsx_xvcmpgedp_p",
-    "llvm.ppc.vsx.xvcmpgesp" => "__builtin_vsx_xvcmpgesp",
-    "llvm.ppc.vsx.xvcmpgesp.p" => "__builtin_vsx_xvcmpgesp_p",
-    "llvm.ppc.vsx.xvcmpgtdp" => "__builtin_vsx_xvcmpgtdp",
-    "llvm.ppc.vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
-    "llvm.ppc.vsx.xvcmpgtsp" => "__builtin_vsx_xvcmpgtsp",
-    "llvm.ppc.vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
-    "llvm.ppc.vsx.xvcvbf16spn" => "__builtin_vsx_xvcvbf16spn",
-    "llvm.ppc.vsx.xvcvdpsp" => "__builtin_vsx_xvcvdpsp",
-    "llvm.ppc.vsx.xvcvdpsxws" => "__builtin_vsx_xvcvdpsxws",
-    "llvm.ppc.vsx.xvcvdpuxws" => "__builtin_vsx_xvcvdpuxws",
-    "llvm.ppc.vsx.xvcvhpsp" => "__builtin_vsx_xvcvhpsp",
-    "llvm.ppc.vsx.xvcvspbf16" => "__builtin_vsx_xvcvspbf16",
-    "llvm.ppc.vsx.xvcvspdp" => "__builtin_vsx_xvcvspdp",
-    "llvm.ppc.vsx.xvcvsphp" => "__builtin_vsx_xvcvsphp",
-    "llvm.ppc.vsx.xvcvspsxds" => "__builtin_vsx_xvcvspsxds",
-    "llvm.ppc.vsx.xvcvspuxds" => "__builtin_vsx_xvcvspuxds",
-    "llvm.ppc.vsx.xvcvsxdsp" => "__builtin_vsx_xvcvsxdsp",
-    "llvm.ppc.vsx.xvcvsxwdp" => "__builtin_vsx_xvcvsxwdp",
-    "llvm.ppc.vsx.xvcvuxdsp" => "__builtin_vsx_xvcvuxdsp",
-    "llvm.ppc.vsx.xvcvuxwdp" => "__builtin_vsx_xvcvuxwdp",
-    "llvm.ppc.vsx.xvdivdp" => "__builtin_vsx_xvdivdp",
-    "llvm.ppc.vsx.xvdivsp" => "__builtin_vsx_xvdivsp",
-    "llvm.ppc.vsx.xviexpdp" => "__builtin_vsx_xviexpdp",
-    "llvm.ppc.vsx.xviexpsp" => "__builtin_vsx_xviexpsp",
-    "llvm.ppc.vsx.xvmaxdp" => "__builtin_vsx_xvmaxdp",
-    "llvm.ppc.vsx.xvmaxsp" => "__builtin_vsx_xvmaxsp",
-    "llvm.ppc.vsx.xvmindp" => "__builtin_vsx_xvmindp",
-    "llvm.ppc.vsx.xvminsp" => "__builtin_vsx_xvminsp",
-    "llvm.ppc.vsx.xvredp" => "__builtin_vsx_xvredp",
-    "llvm.ppc.vsx.xvresp" => "__builtin_vsx_xvresp",
-    "llvm.ppc.vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
-    "llvm.ppc.vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
-    "llvm.ppc.vsx.xvtdivdp" => "__builtin_vsx_xvtdivdp",
-    "llvm.ppc.vsx.xvtdivsp" => "__builtin_vsx_xvtdivsp",
-    "llvm.ppc.vsx.xvtlsbb" => "__builtin_vsx_xvtlsbb",
-    "llvm.ppc.vsx.xvtsqrtdp" => "__builtin_vsx_xvtsqrtdp",
-    "llvm.ppc.vsx.xvtsqrtsp" => "__builtin_vsx_xvtsqrtsp",
-    "llvm.ppc.vsx.xvtstdcdp" => "__builtin_vsx_xvtstdcdp",
-    "llvm.ppc.vsx.xvtstdcsp" => "__builtin_vsx_xvtstdcsp",
-    "llvm.ppc.vsx.xvxexpdp" => "__builtin_vsx_xvxexpdp",
-    "llvm.ppc.vsx.xvxexpsp" => "__builtin_vsx_xvxexpsp",
-    "llvm.ppc.vsx.xvxsigdp" => "__builtin_vsx_xvxsigdp",
-    "llvm.ppc.vsx.xvxsigsp" => "__builtin_vsx_xvxsigsp",
-    "llvm.ppc.vsx.xxblendvb" => "__builtin_vsx_xxblendvb",
-    "llvm.ppc.vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
-    "llvm.ppc.vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
-    "llvm.ppc.vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
-    "llvm.ppc.vsx.xxeval" => "__builtin_vsx_xxeval",
-    "llvm.ppc.vsx.xxextractuw" => "__builtin_vsx_xxextractuw",
-    "llvm.ppc.vsx.xxgenpcvbm" => "__builtin_vsx_xxgenpcvbm",
-    "llvm.ppc.vsx.xxgenpcvdm" => "__builtin_vsx_xxgenpcvdm",
-    "llvm.ppc.vsx.xxgenpcvhm" => "__builtin_vsx_xxgenpcvhm",
-    "llvm.ppc.vsx.xxgenpcvwm" => "__builtin_vsx_xxgenpcvwm",
-    "llvm.ppc.vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
-    "llvm.ppc.vsx.xxleqv" => "__builtin_vsx_xxleqv",
-    "llvm.ppc.vsx.xxpermx" => "__builtin_vsx_xxpermx",
-    // ptx
-    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
-    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
-    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
-    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
-    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
-    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
-    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
-    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
-    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
-    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
-    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
-    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
-    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
-    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
-    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
-    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
-    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
-    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
-    // r600
-    "llvm.r600.group.barrier" => "__builtin_r600_group_barrier",
-    "llvm.r600.implicitarg.ptr" => "__builtin_r600_implicitarg_ptr",
-    "llvm.r600.rat.store.typed" => "__builtin_r600_rat_store_typed",
-    "llvm.r600.read.global.size.x" => "__builtin_r600_read_global_size_x",
-    "llvm.r600.read.global.size.y" => "__builtin_r600_read_global_size_y",
-    "llvm.r600.read.global.size.z" => "__builtin_r600_read_global_size_z",
-    "llvm.r600.read.ngroups.x" => "__builtin_r600_read_ngroups_x",
-    "llvm.r600.read.ngroups.y" => "__builtin_r600_read_ngroups_y",
-    "llvm.r600.read.ngroups.z" => "__builtin_r600_read_ngroups_z",
-    "llvm.r600.read.tgid.x" => "__builtin_r600_read_tgid_x",
-    "llvm.r600.read.tgid.y" => "__builtin_r600_read_tgid_y",
-    "llvm.r600.read.tgid.z" => "__builtin_r600_read_tgid_z",
-    "llvm.r600.read.tidig.x" => "__builtin_r600_read_tidig_x",
-    "llvm.r600.read.tidig.y" => "__builtin_r600_read_tidig_y",
-    "llvm.r600.read.tidig.z" => "__builtin_r600_read_tidig_z",
-    // riscv
-    "llvm.riscv.aes32dsi" => "__builtin_riscv_aes32dsi",
-    "llvm.riscv.aes32dsmi" => "__builtin_riscv_aes32dsmi",
-    "llvm.riscv.aes32esi" => "__builtin_riscv_aes32esi",
-    "llvm.riscv.aes32esmi" => "__builtin_riscv_aes32esmi",
-    "llvm.riscv.aes64ds" => "__builtin_riscv_aes64ds",
-    "llvm.riscv.aes64dsm" => "__builtin_riscv_aes64dsm",
-    "llvm.riscv.aes64es" => "__builtin_riscv_aes64es",
-    "llvm.riscv.aes64esm" => "__builtin_riscv_aes64esm",
-    "llvm.riscv.aes64im" => "__builtin_riscv_aes64im",
-    "llvm.riscv.aes64ks1i" => "__builtin_riscv_aes64ks1i",
-    "llvm.riscv.aes64ks2" => "__builtin_riscv_aes64ks2",
-    "llvm.riscv.sha512sig0" => "__builtin_riscv_sha512sig0",
-    "llvm.riscv.sha512sig0h" => "__builtin_riscv_sha512sig0h",
-    "llvm.riscv.sha512sig0l" => "__builtin_riscv_sha512sig0l",
-    "llvm.riscv.sha512sig1" => "__builtin_riscv_sha512sig1",
-    "llvm.riscv.sha512sig1h" => "__builtin_riscv_sha512sig1h",
-    "llvm.riscv.sha512sig1l" => "__builtin_riscv_sha512sig1l",
-    "llvm.riscv.sha512sum0" => "__builtin_riscv_sha512sum0",
-    "llvm.riscv.sha512sum0r" => "__builtin_riscv_sha512sum0r",
-    "llvm.riscv.sha512sum1" => "__builtin_riscv_sha512sum1",
-    "llvm.riscv.sha512sum1r" => "__builtin_riscv_sha512sum1r",
-    // s390
-    "llvm.s390.bdepg" => "__builtin_s390_bdepg",
-    "llvm.s390.bextg" => "__builtin_s390_bextg",
-    "llvm.s390.efpc" => "__builtin_s390_efpc",
-    "llvm.s390.etnd" => "__builtin_tx_nesting_depth",
-    "llvm.s390.lcbb" => "__builtin_s390_lcbb",
-    "llvm.s390.ppa.txassist" => "__builtin_tx_assist",
-    "llvm.s390.sfpc" => "__builtin_s390_sfpc",
-    "llvm.s390.tend" => "__builtin_tend",
-    "llvm.s390.vaccb" => "__builtin_s390_vaccb",
-    "llvm.s390.vacccq" => "__builtin_s390_vacccq",
-    "llvm.s390.vaccf" => "__builtin_s390_vaccf",
-    "llvm.s390.vaccg" => "__builtin_s390_vaccg",
-    "llvm.s390.vacch" => "__builtin_s390_vacch",
-    "llvm.s390.vaccq" => "__builtin_s390_vaccq",
-    "llvm.s390.vacq" => "__builtin_s390_vacq",
-    "llvm.s390.vaq" => "__builtin_s390_vaq",
-    "llvm.s390.vavgb" => "__builtin_s390_vavgb",
-    "llvm.s390.vavgf" => "__builtin_s390_vavgf",
-    "llvm.s390.vavgg" => "__builtin_s390_vavgg",
-    "llvm.s390.vavgh" => "__builtin_s390_vavgh",
-    "llvm.s390.vavglb" => "__builtin_s390_vavglb",
-    "llvm.s390.vavglf" => "__builtin_s390_vavglf",
-    "llvm.s390.vavglg" => "__builtin_s390_vavglg",
-    "llvm.s390.vavglh" => "__builtin_s390_vavglh",
-    "llvm.s390.vavglq" => "__builtin_s390_vavglq",
-    "llvm.s390.vavgq" => "__builtin_s390_vavgq",
-    "llvm.s390.vbperm" => "__builtin_s390_vbperm",
-    "llvm.s390.vcfn" => "__builtin_s390_vcfn",
-    "llvm.s390.vcksm" => "__builtin_s390_vcksm",
-    "llvm.s390.vclfnhs" => "__builtin_s390_vclfnhs",
-    "llvm.s390.vclfnls" => "__builtin_s390_vclfnls",
-    "llvm.s390.vcnf" => "__builtin_s390_vcnf",
-    "llvm.s390.vcrnfs" => "__builtin_s390_vcrnfs",
-    "llvm.s390.verimb" => "__builtin_s390_verimb",
-    "llvm.s390.verimf" => "__builtin_s390_verimf",
-    "llvm.s390.verimg" => "__builtin_s390_verimg",
-    "llvm.s390.verimh" => "__builtin_s390_verimh",
-    "llvm.s390.veval" => "__builtin_s390_veval",
-    "llvm.s390.vfaeb" => "__builtin_s390_vfaeb",
-    "llvm.s390.vfaef" => "__builtin_s390_vfaef",
-    "llvm.s390.vfaeh" => "__builtin_s390_vfaeh",
-    "llvm.s390.vfaezb" => "__builtin_s390_vfaezb",
-    "llvm.s390.vfaezf" => "__builtin_s390_vfaezf",
-    "llvm.s390.vfaezh" => "__builtin_s390_vfaezh",
-    "llvm.s390.vfeeb" => "__builtin_s390_vfeeb",
-    "llvm.s390.vfeef" => "__builtin_s390_vfeef",
-    "llvm.s390.vfeeh" => "__builtin_s390_vfeeh",
-    "llvm.s390.vfeezb" => "__builtin_s390_vfeezb",
-    "llvm.s390.vfeezf" => "__builtin_s390_vfeezf",
-    "llvm.s390.vfeezh" => "__builtin_s390_vfeezh",
-    "llvm.s390.vfeneb" => "__builtin_s390_vfeneb",
-    "llvm.s390.vfenef" => "__builtin_s390_vfenef",
-    "llvm.s390.vfeneh" => "__builtin_s390_vfeneh",
-    "llvm.s390.vfenezb" => "__builtin_s390_vfenezb",
-    "llvm.s390.vfenezf" => "__builtin_s390_vfenezf",
-    "llvm.s390.vfenezh" => "__builtin_s390_vfenezh",
-    "llvm.s390.vgemb" => "__builtin_s390_vgemb",
-    "llvm.s390.vgemf" => "__builtin_s390_vgemf",
-    "llvm.s390.vgemg" => "__builtin_s390_vgemg",
-    "llvm.s390.vgemh" => "__builtin_s390_vgemh",
-    "llvm.s390.vgemq" => "__builtin_s390_vgemq",
-    "llvm.s390.vgfmab" => "__builtin_s390_vgfmab",
-    "llvm.s390.vgfmaf" => "__builtin_s390_vgfmaf",
-    "llvm.s390.vgfmag" => "__builtin_s390_vgfmag",
-    "llvm.s390.vgfmah" => "__builtin_s390_vgfmah",
-    "llvm.s390.vgfmb" => "__builtin_s390_vgfmb",
-    "llvm.s390.vgfmf" => "__builtin_s390_vgfmf",
-    "llvm.s390.vgfmg" => "__builtin_s390_vgfmg",
-    "llvm.s390.vgfmh" => "__builtin_s390_vgfmh",
-    "llvm.s390.vistrb" => "__builtin_s390_vistrb",
-    "llvm.s390.vistrf" => "__builtin_s390_vistrf",
-    "llvm.s390.vistrh" => "__builtin_s390_vistrh",
-    "llvm.s390.vlbb" => "__builtin_s390_vlbb",
-    "llvm.s390.vll" => "__builtin_s390_vll",
-    "llvm.s390.vlrl" => "__builtin_s390_vlrlr",
-    "llvm.s390.vmaeb" => "__builtin_s390_vmaeb",
-    "llvm.s390.vmaef" => "__builtin_s390_vmaef",
-    "llvm.s390.vmaeg" => "__builtin_s390_vmaeg",
-    "llvm.s390.vmaeh" => "__builtin_s390_vmaeh",
-    "llvm.s390.vmahb" => "__builtin_s390_vmahb",
-    "llvm.s390.vmahf" => "__builtin_s390_vmahf",
-    "llvm.s390.vmahg" => "__builtin_s390_vmahg",
-    "llvm.s390.vmahh" => "__builtin_s390_vmahh",
-    "llvm.s390.vmahq" => "__builtin_s390_vmahq",
-    "llvm.s390.vmaleb" => "__builtin_s390_vmaleb",
-    "llvm.s390.vmalef" => "__builtin_s390_vmalef",
-    "llvm.s390.vmaleg" => "__builtin_s390_vmaleg",
-    "llvm.s390.vmaleh" => "__builtin_s390_vmaleh",
-    "llvm.s390.vmalhb" => "__builtin_s390_vmalhb",
-    "llvm.s390.vmalhf" => "__builtin_s390_vmalhf",
-    "llvm.s390.vmalhg" => "__builtin_s390_vmalhg",
-    "llvm.s390.vmalhh" => "__builtin_s390_vmalhh",
-    "llvm.s390.vmalhq" => "__builtin_s390_vmalhq",
-    "llvm.s390.vmalob" => "__builtin_s390_vmalob",
-    "llvm.s390.vmalof" => "__builtin_s390_vmalof",
-    "llvm.s390.vmalog" => "__builtin_s390_vmalog",
-    "llvm.s390.vmaloh" => "__builtin_s390_vmaloh",
-    "llvm.s390.vmaob" => "__builtin_s390_vmaob",
-    "llvm.s390.vmaof" => "__builtin_s390_vmaof",
-    "llvm.s390.vmaog" => "__builtin_s390_vmaog",
-    "llvm.s390.vmaoh" => "__builtin_s390_vmaoh",
-    "llvm.s390.vmeb" => "__builtin_s390_vmeb",
-    "llvm.s390.vmef" => "__builtin_s390_vmef",
-    "llvm.s390.vmeg" => "__builtin_s390_vmeg",
-    "llvm.s390.vmeh" => "__builtin_s390_vmeh",
-    "llvm.s390.vmhb" => "__builtin_s390_vmhb",
-    "llvm.s390.vmhf" => "__builtin_s390_vmhf",
-    "llvm.s390.vmhg" => "__builtin_s390_vmhg",
-    "llvm.s390.vmhh" => "__builtin_s390_vmhh",
-    "llvm.s390.vmhq" => "__builtin_s390_vmhq",
-    "llvm.s390.vmleb" => "__builtin_s390_vmleb",
-    "llvm.s390.vmlef" => "__builtin_s390_vmlef",
-    "llvm.s390.vmleg" => "__builtin_s390_vmleg",
-    "llvm.s390.vmleh" => "__builtin_s390_vmleh",
-    "llvm.s390.vmlhb" => "__builtin_s390_vmlhb",
-    "llvm.s390.vmlhf" => "__builtin_s390_vmlhf",
-    "llvm.s390.vmlhg" => "__builtin_s390_vmlhg",
-    "llvm.s390.vmlhh" => "__builtin_s390_vmlhh",
-    "llvm.s390.vmlhq" => "__builtin_s390_vmlhq",
-    "llvm.s390.vmlob" => "__builtin_s390_vmlob",
-    "llvm.s390.vmlof" => "__builtin_s390_vmlof",
-    "llvm.s390.vmlog" => "__builtin_s390_vmlog",
-    "llvm.s390.vmloh" => "__builtin_s390_vmloh",
-    "llvm.s390.vmob" => "__builtin_s390_vmob",
-    "llvm.s390.vmof" => "__builtin_s390_vmof",
-    "llvm.s390.vmog" => "__builtin_s390_vmog",
-    "llvm.s390.vmoh" => "__builtin_s390_vmoh",
-    "llvm.s390.vmslg" => "__builtin_s390_vmslg",
-    "llvm.s390.vpdi" => "__builtin_s390_vpdi",
-    "llvm.s390.vperm" => "__builtin_s390_vperm",
-    "llvm.s390.vpklsf" => "__builtin_s390_vpklsf",
-    "llvm.s390.vpklsg" => "__builtin_s390_vpklsg",
-    "llvm.s390.vpklsh" => "__builtin_s390_vpklsh",
-    "llvm.s390.vpksf" => "__builtin_s390_vpksf",
-    "llvm.s390.vpksg" => "__builtin_s390_vpksg",
-    "llvm.s390.vpksh" => "__builtin_s390_vpksh",
-    "llvm.s390.vsbcbiq" => "__builtin_s390_vsbcbiq",
-    "llvm.s390.vsbiq" => "__builtin_s390_vsbiq",
-    "llvm.s390.vscbib" => "__builtin_s390_vscbib",
-    "llvm.s390.vscbif" => "__builtin_s390_vscbif",
-    "llvm.s390.vscbig" => "__builtin_s390_vscbig",
-    "llvm.s390.vscbih" => "__builtin_s390_vscbih",
-    "llvm.s390.vscbiq" => "__builtin_s390_vscbiq",
-    "llvm.s390.vsl" => "__builtin_s390_vsl",
-    "llvm.s390.vslb" => "__builtin_s390_vslb",
-    "llvm.s390.vsld" => "__builtin_s390_vsld",
-    "llvm.s390.vsldb" => "__builtin_s390_vsldb",
-    "llvm.s390.vsq" => "__builtin_s390_vsq",
-    "llvm.s390.vsra" => "__builtin_s390_vsra",
-    "llvm.s390.vsrab" => "__builtin_s390_vsrab",
-    "llvm.s390.vsrd" => "__builtin_s390_vsrd",
-    "llvm.s390.vsrl" => "__builtin_s390_vsrl",
-    "llvm.s390.vsrlb" => "__builtin_s390_vsrlb",
-    "llvm.s390.vstl" => "__builtin_s390_vstl",
-    "llvm.s390.vstrcb" => "__builtin_s390_vstrcb",
-    "llvm.s390.vstrcf" => "__builtin_s390_vstrcf",
-    "llvm.s390.vstrch" => "__builtin_s390_vstrch",
-    "llvm.s390.vstrczb" => "__builtin_s390_vstrczb",
-    "llvm.s390.vstrczf" => "__builtin_s390_vstrczf",
-    "llvm.s390.vstrczh" => "__builtin_s390_vstrczh",
-    "llvm.s390.vstrl" => "__builtin_s390_vstrlr",
-    "llvm.s390.vsumb" => "__builtin_s390_vsumb",
-    "llvm.s390.vsumgf" => "__builtin_s390_vsumgf",
-    "llvm.s390.vsumgh" => "__builtin_s390_vsumgh",
-    "llvm.s390.vsumh" => "__builtin_s390_vsumh",
-    "llvm.s390.vsumqf" => "__builtin_s390_vsumqf",
-    "llvm.s390.vsumqg" => "__builtin_s390_vsumqg",
-    "llvm.s390.vtm" => "__builtin_s390_vtm",
-    "llvm.s390.vuphb" => "__builtin_s390_vuphb",
-    "llvm.s390.vuphf" => "__builtin_s390_vuphf",
-    "llvm.s390.vuphg" => "__builtin_s390_vuphg",
-    "llvm.s390.vuphh" => "__builtin_s390_vuphh",
-    "llvm.s390.vuplb" => "__builtin_s390_vuplb",
-    "llvm.s390.vuplf" => "__builtin_s390_vuplf",
-    "llvm.s390.vuplg" => "__builtin_s390_vuplg",
-    "llvm.s390.vuplhb" => "__builtin_s390_vuplhb",
-    "llvm.s390.vuplhf" => "__builtin_s390_vuplhf",
-    "llvm.s390.vuplhg" => "__builtin_s390_vuplhg",
-    "llvm.s390.vuplhh" => "__builtin_s390_vuplhh",
-    "llvm.s390.vuplhw" => "__builtin_s390_vuplhw",
-    "llvm.s390.vupllb" => "__builtin_s390_vupllb",
-    "llvm.s390.vupllf" => "__builtin_s390_vupllf",
-    "llvm.s390.vupllg" => "__builtin_s390_vupllg",
-    "llvm.s390.vupllh" => "__builtin_s390_vupllh",
-    // ve
-    "llvm.ve.vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
-    "llvm.ve.vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",
-    "llvm.ve.vl.eqvm.MMM" => "__builtin_ve_vl_eqvm_MMM",
-    "llvm.ve.vl.eqvm.mmm" => "__builtin_ve_vl_eqvm_mmm",
-    "llvm.ve.vl.extract.vm512l" => "__builtin_ve_vl_extract_vm512l",
-    "llvm.ve.vl.extract.vm512u" => "__builtin_ve_vl_extract_vm512u",
-    "llvm.ve.vl.fencec.s" => "__builtin_ve_vl_fencec_s",
-    "llvm.ve.vl.fencei" => "__builtin_ve_vl_fencei",
-    "llvm.ve.vl.fencem.s" => "__builtin_ve_vl_fencem_s",
-    "llvm.ve.vl.fidcr.sss" => "__builtin_ve_vl_fidcr_sss",
-    "llvm.ve.vl.insert.vm512l" => "__builtin_ve_vl_insert_vm512l",
-    "llvm.ve.vl.insert.vm512u" => "__builtin_ve_vl_insert_vm512u",
-    "llvm.ve.vl.lcr.sss" => "__builtin_ve_vl_lcr_sss",
-    "llvm.ve.vl.lsv.vvss" => "__builtin_ve_vl_lsv_vvss",
-    "llvm.ve.vl.lvm.MMss" => "__builtin_ve_vl_lvm_MMss",
-    "llvm.ve.vl.lvm.mmss" => "__builtin_ve_vl_lvm_mmss",
-    "llvm.ve.vl.lvsd.svs" => "__builtin_ve_vl_lvsd_svs",
-    "llvm.ve.vl.lvsl.svs" => "__builtin_ve_vl_lvsl_svs",
-    "llvm.ve.vl.lvss.svs" => "__builtin_ve_vl_lvss_svs",
-    "llvm.ve.vl.lzvm.sml" => "__builtin_ve_vl_lzvm_sml",
-    "llvm.ve.vl.negm.MM" => "__builtin_ve_vl_negm_MM",
-    "llvm.ve.vl.negm.mm" => "__builtin_ve_vl_negm_mm",
-    "llvm.ve.vl.nndm.MMM" => "__builtin_ve_vl_nndm_MMM",
-    "llvm.ve.vl.nndm.mmm" => "__builtin_ve_vl_nndm_mmm",
-    "llvm.ve.vl.orm.MMM" => "__builtin_ve_vl_orm_MMM",
-    "llvm.ve.vl.orm.mmm" => "__builtin_ve_vl_orm_mmm",
-    "llvm.ve.vl.pack.f32a" => "__builtin_ve_vl_pack_f32a",
-    "llvm.ve.vl.pack.f32p" => "__builtin_ve_vl_pack_f32p",
-    "llvm.ve.vl.pcvm.sml" => "__builtin_ve_vl_pcvm_sml",
-    "llvm.ve.vl.pfchv.ssl" => "__builtin_ve_vl_pfchv_ssl",
-    "llvm.ve.vl.pfchvnc.ssl" => "__builtin_ve_vl_pfchvnc_ssl",
-    "llvm.ve.vl.pvadds.vsvMvl" => "__builtin_ve_vl_pvadds_vsvMvl",
-    "llvm.ve.vl.pvadds.vsvl" => "__builtin_ve_vl_pvadds_vsvl",
-    "llvm.ve.vl.pvadds.vsvvl" => "__builtin_ve_vl_pvadds_vsvvl",
-    "llvm.ve.vl.pvadds.vvvMvl" => "__builtin_ve_vl_pvadds_vvvMvl",
-    "llvm.ve.vl.pvadds.vvvl" => "__builtin_ve_vl_pvadds_vvvl",
-    "llvm.ve.vl.pvadds.vvvvl" => "__builtin_ve_vl_pvadds_vvvvl",
-    "llvm.ve.vl.pvaddu.vsvMvl" => "__builtin_ve_vl_pvaddu_vsvMvl",
-    "llvm.ve.vl.pvaddu.vsvl" => "__builtin_ve_vl_pvaddu_vsvl",
-    "llvm.ve.vl.pvaddu.vsvvl" => "__builtin_ve_vl_pvaddu_vsvvl",
-    "llvm.ve.vl.pvaddu.vvvMvl" => "__builtin_ve_vl_pvaddu_vvvMvl",
-    "llvm.ve.vl.pvaddu.vvvl" => "__builtin_ve_vl_pvaddu_vvvl",
-    "llvm.ve.vl.pvaddu.vvvvl" => "__builtin_ve_vl_pvaddu_vvvvl",
-    "llvm.ve.vl.pvand.vsvMvl" => "__builtin_ve_vl_pvand_vsvMvl",
-    "llvm.ve.vl.pvand.vsvl" => "__builtin_ve_vl_pvand_vsvl",
-    "llvm.ve.vl.pvand.vsvvl" => "__builtin_ve_vl_pvand_vsvvl",
-    "llvm.ve.vl.pvand.vvvMvl" => "__builtin_ve_vl_pvand_vvvMvl",
-    "llvm.ve.vl.pvand.vvvl" => "__builtin_ve_vl_pvand_vvvl",
-    "llvm.ve.vl.pvand.vvvvl" => "__builtin_ve_vl_pvand_vvvvl",
-    "llvm.ve.vl.pvbrd.vsMvl" => "__builtin_ve_vl_pvbrd_vsMvl",
-    "llvm.ve.vl.pvbrd.vsl" => "__builtin_ve_vl_pvbrd_vsl",
-    "llvm.ve.vl.pvbrd.vsvl" => "__builtin_ve_vl_pvbrd_vsvl",
-    "llvm.ve.vl.pvbrv.vvMvl" => "__builtin_ve_vl_pvbrv_vvMvl",
-    "llvm.ve.vl.pvbrv.vvl" => "__builtin_ve_vl_pvbrv_vvl",
-    "llvm.ve.vl.pvbrv.vvvl" => "__builtin_ve_vl_pvbrv_vvvl",
-    "llvm.ve.vl.pvbrvlo.vvl" => "__builtin_ve_vl_pvbrvlo_vvl",
-    "llvm.ve.vl.pvbrvlo.vvmvl" => "__builtin_ve_vl_pvbrvlo_vvmvl",
-    "llvm.ve.vl.pvbrvlo.vvvl" => "__builtin_ve_vl_pvbrvlo_vvvl",
-    "llvm.ve.vl.pvbrvup.vvl" => "__builtin_ve_vl_pvbrvup_vvl",
-    "llvm.ve.vl.pvbrvup.vvmvl" => "__builtin_ve_vl_pvbrvup_vvmvl",
-    "llvm.ve.vl.pvbrvup.vvvl" => "__builtin_ve_vl_pvbrvup_vvvl",
-    "llvm.ve.vl.pvcmps.vsvMvl" => "__builtin_ve_vl_pvcmps_vsvMvl",
-    "llvm.ve.vl.pvcmps.vsvl" => "__builtin_ve_vl_pvcmps_vsvl",
-    "llvm.ve.vl.pvcmps.vsvvl" => "__builtin_ve_vl_pvcmps_vsvvl",
-    "llvm.ve.vl.pvcmps.vvvMvl" => "__builtin_ve_vl_pvcmps_vvvMvl",
-    "llvm.ve.vl.pvcmps.vvvl" => "__builtin_ve_vl_pvcmps_vvvl",
-    "llvm.ve.vl.pvcmps.vvvvl" => "__builtin_ve_vl_pvcmps_vvvvl",
-    "llvm.ve.vl.pvcmpu.vsvMvl" => "__builtin_ve_vl_pvcmpu_vsvMvl",
-    "llvm.ve.vl.pvcmpu.vsvl" => "__builtin_ve_vl_pvcmpu_vsvl",
-    "llvm.ve.vl.pvcmpu.vsvvl" => "__builtin_ve_vl_pvcmpu_vsvvl",
-    "llvm.ve.vl.pvcmpu.vvvMvl" => "__builtin_ve_vl_pvcmpu_vvvMvl",
-    "llvm.ve.vl.pvcmpu.vvvl" => "__builtin_ve_vl_pvcmpu_vvvl",
-    "llvm.ve.vl.pvcmpu.vvvvl" => "__builtin_ve_vl_pvcmpu_vvvvl",
-    "llvm.ve.vl.pvcvtsw.vvl" => "__builtin_ve_vl_pvcvtsw_vvl",
-    "llvm.ve.vl.pvcvtsw.vvvl" => "__builtin_ve_vl_pvcvtsw_vvvl",
-    "llvm.ve.vl.pvcvtws.vvMvl" => "__builtin_ve_vl_pvcvtws_vvMvl",
-    "llvm.ve.vl.pvcvtws.vvl" => "__builtin_ve_vl_pvcvtws_vvl",
-    "llvm.ve.vl.pvcvtws.vvvl" => "__builtin_ve_vl_pvcvtws_vvvl",
-    "llvm.ve.vl.pvcvtwsrz.vvMvl" => "__builtin_ve_vl_pvcvtwsrz_vvMvl",
-    "llvm.ve.vl.pvcvtwsrz.vvl" => "__builtin_ve_vl_pvcvtwsrz_vvl",
-    "llvm.ve.vl.pvcvtwsrz.vvvl" => "__builtin_ve_vl_pvcvtwsrz_vvvl",
-    "llvm.ve.vl.pveqv.vsvMvl" => "__builtin_ve_vl_pveqv_vsvMvl",
-    "llvm.ve.vl.pveqv.vsvl" => "__builtin_ve_vl_pveqv_vsvl",
-    "llvm.ve.vl.pveqv.vsvvl" => "__builtin_ve_vl_pveqv_vsvvl",
-    "llvm.ve.vl.pveqv.vvvMvl" => "__builtin_ve_vl_pveqv_vvvMvl",
-    "llvm.ve.vl.pveqv.vvvl" => "__builtin_ve_vl_pveqv_vvvl",
-    "llvm.ve.vl.pveqv.vvvvl" => "__builtin_ve_vl_pveqv_vvvvl",
-    "llvm.ve.vl.pvfadd.vsvMvl" => "__builtin_ve_vl_pvfadd_vsvMvl",
-    "llvm.ve.vl.pvfadd.vsvl" => "__builtin_ve_vl_pvfadd_vsvl",
-    "llvm.ve.vl.pvfadd.vsvvl" => "__builtin_ve_vl_pvfadd_vsvvl",
-    "llvm.ve.vl.pvfadd.vvvMvl" => "__builtin_ve_vl_pvfadd_vvvMvl",
-    "llvm.ve.vl.pvfadd.vvvl" => "__builtin_ve_vl_pvfadd_vvvl",
-    "llvm.ve.vl.pvfadd.vvvvl" => "__builtin_ve_vl_pvfadd_vvvvl",
-    "llvm.ve.vl.pvfcmp.vsvMvl" => "__builtin_ve_vl_pvfcmp_vsvMvl",
-    "llvm.ve.vl.pvfcmp.vsvl" => "__builtin_ve_vl_pvfcmp_vsvl",
-    "llvm.ve.vl.pvfcmp.vsvvl" => "__builtin_ve_vl_pvfcmp_vsvvl",
-    "llvm.ve.vl.pvfcmp.vvvMvl" => "__builtin_ve_vl_pvfcmp_vvvMvl",
-    "llvm.ve.vl.pvfcmp.vvvl" => "__builtin_ve_vl_pvfcmp_vvvl",
-    "llvm.ve.vl.pvfcmp.vvvvl" => "__builtin_ve_vl_pvfcmp_vvvvl",
-    "llvm.ve.vl.pvfmad.vsvvMvl" => "__builtin_ve_vl_pvfmad_vsvvMvl",
-    "llvm.ve.vl.pvfmad.vsvvl" => "__builtin_ve_vl_pvfmad_vsvvl",
-    "llvm.ve.vl.pvfmad.vsvvvl" => "__builtin_ve_vl_pvfmad_vsvvvl",
-    "llvm.ve.vl.pvfmad.vvsvMvl" => "__builtin_ve_vl_pvfmad_vvsvMvl",
-    "llvm.ve.vl.pvfmad.vvsvl" => "__builtin_ve_vl_pvfmad_vvsvl",
-    "llvm.ve.vl.pvfmad.vvsvvl" => "__builtin_ve_vl_pvfmad_vvsvvl",
-    "llvm.ve.vl.pvfmad.vvvvMvl" => "__builtin_ve_vl_pvfmad_vvvvMvl",
-    "llvm.ve.vl.pvfmad.vvvvl" => "__builtin_ve_vl_pvfmad_vvvvl",
-    "llvm.ve.vl.pvfmad.vvvvvl" => "__builtin_ve_vl_pvfmad_vvvvvl",
-    "llvm.ve.vl.pvfmax.vsvMvl" => "__builtin_ve_vl_pvfmax_vsvMvl",
-    "llvm.ve.vl.pvfmax.vsvl" => "__builtin_ve_vl_pvfmax_vsvl",
-    "llvm.ve.vl.pvfmax.vsvvl" => "__builtin_ve_vl_pvfmax_vsvvl",
-    "llvm.ve.vl.pvfmax.vvvMvl" => "__builtin_ve_vl_pvfmax_vvvMvl",
-    "llvm.ve.vl.pvfmax.vvvl" => "__builtin_ve_vl_pvfmax_vvvl",
-    "llvm.ve.vl.pvfmax.vvvvl" => "__builtin_ve_vl_pvfmax_vvvvl",
-    "llvm.ve.vl.pvfmin.vsvMvl" => "__builtin_ve_vl_pvfmin_vsvMvl",
-    "llvm.ve.vl.pvfmin.vsvl" => "__builtin_ve_vl_pvfmin_vsvl",
-    "llvm.ve.vl.pvfmin.vsvvl" => "__builtin_ve_vl_pvfmin_vsvvl",
-    "llvm.ve.vl.pvfmin.vvvMvl" => "__builtin_ve_vl_pvfmin_vvvMvl",
-    "llvm.ve.vl.pvfmin.vvvl" => "__builtin_ve_vl_pvfmin_vvvl",
-    "llvm.ve.vl.pvfmin.vvvvl" => "__builtin_ve_vl_pvfmin_vvvvl",
-    "llvm.ve.vl.pvfmkaf.Ml" => "__builtin_ve_vl_pvfmkaf_Ml",
-    "llvm.ve.vl.pvfmkat.Ml" => "__builtin_ve_vl_pvfmkat_Ml",
-    "llvm.ve.vl.pvfmkseq.MvMl" => "__builtin_ve_vl_pvfmkseq_MvMl",
-    "llvm.ve.vl.pvfmkseq.Mvl" => "__builtin_ve_vl_pvfmkseq_Mvl",
-    "llvm.ve.vl.pvfmkseqnan.MvMl" => "__builtin_ve_vl_pvfmkseqnan_MvMl",
-    "llvm.ve.vl.pvfmkseqnan.Mvl" => "__builtin_ve_vl_pvfmkseqnan_Mvl",
-    "llvm.ve.vl.pvfmksge.MvMl" => "__builtin_ve_vl_pvfmksge_MvMl",
-    "llvm.ve.vl.pvfmksge.Mvl" => "__builtin_ve_vl_pvfmksge_Mvl",
-    "llvm.ve.vl.pvfmksgenan.MvMl" => "__builtin_ve_vl_pvfmksgenan_MvMl",
-    "llvm.ve.vl.pvfmksgenan.Mvl" => "__builtin_ve_vl_pvfmksgenan_Mvl",
-    "llvm.ve.vl.pvfmksgt.MvMl" => "__builtin_ve_vl_pvfmksgt_MvMl",
-    "llvm.ve.vl.pvfmksgt.Mvl" => "__builtin_ve_vl_pvfmksgt_Mvl",
-    "llvm.ve.vl.pvfmksgtnan.MvMl" => "__builtin_ve_vl_pvfmksgtnan_MvMl",
-    "llvm.ve.vl.pvfmksgtnan.Mvl" => "__builtin_ve_vl_pvfmksgtnan_Mvl",
-    "llvm.ve.vl.pvfmksle.MvMl" => "__builtin_ve_vl_pvfmksle_MvMl",
-    "llvm.ve.vl.pvfmksle.Mvl" => "__builtin_ve_vl_pvfmksle_Mvl",
-    "llvm.ve.vl.pvfmkslenan.MvMl" => "__builtin_ve_vl_pvfmkslenan_MvMl",
-    "llvm.ve.vl.pvfmkslenan.Mvl" => "__builtin_ve_vl_pvfmkslenan_Mvl",
-    "llvm.ve.vl.pvfmksloeq.mvl" => "__builtin_ve_vl_pvfmksloeq_mvl",
-    "llvm.ve.vl.pvfmksloeq.mvml" => "__builtin_ve_vl_pvfmksloeq_mvml",
-    "llvm.ve.vl.pvfmksloeqnan.mvl" => "__builtin_ve_vl_pvfmksloeqnan_mvl",
-    "llvm.ve.vl.pvfmksloeqnan.mvml" => "__builtin_ve_vl_pvfmksloeqnan_mvml",
-    "llvm.ve.vl.pvfmksloge.mvl" => "__builtin_ve_vl_pvfmksloge_mvl",
-    "llvm.ve.vl.pvfmksloge.mvml" => "__builtin_ve_vl_pvfmksloge_mvml",
-    "llvm.ve.vl.pvfmkslogenan.mvl" => "__builtin_ve_vl_pvfmkslogenan_mvl",
-    "llvm.ve.vl.pvfmkslogenan.mvml" => "__builtin_ve_vl_pvfmkslogenan_mvml",
-    "llvm.ve.vl.pvfmkslogt.mvl" => "__builtin_ve_vl_pvfmkslogt_mvl",
-    "llvm.ve.vl.pvfmkslogt.mvml" => "__builtin_ve_vl_pvfmkslogt_mvml",
-    "llvm.ve.vl.pvfmkslogtnan.mvl" => "__builtin_ve_vl_pvfmkslogtnan_mvl",
-    "llvm.ve.vl.pvfmkslogtnan.mvml" => "__builtin_ve_vl_pvfmkslogtnan_mvml",
-    "llvm.ve.vl.pvfmkslole.mvl" => "__builtin_ve_vl_pvfmkslole_mvl",
-    "llvm.ve.vl.pvfmkslole.mvml" => "__builtin_ve_vl_pvfmkslole_mvml",
-    "llvm.ve.vl.pvfmkslolenan.mvl" => "__builtin_ve_vl_pvfmkslolenan_mvl",
-    "llvm.ve.vl.pvfmkslolenan.mvml" => "__builtin_ve_vl_pvfmkslolenan_mvml",
-    "llvm.ve.vl.pvfmkslolt.mvl" => "__builtin_ve_vl_pvfmkslolt_mvl",
-    "llvm.ve.vl.pvfmkslolt.mvml" => "__builtin_ve_vl_pvfmkslolt_mvml",
-    "llvm.ve.vl.pvfmksloltnan.mvl" => "__builtin_ve_vl_pvfmksloltnan_mvl",
-    "llvm.ve.vl.pvfmksloltnan.mvml" => "__builtin_ve_vl_pvfmksloltnan_mvml",
-    "llvm.ve.vl.pvfmkslonan.mvl" => "__builtin_ve_vl_pvfmkslonan_mvl",
-    "llvm.ve.vl.pvfmkslonan.mvml" => "__builtin_ve_vl_pvfmkslonan_mvml",
-    "llvm.ve.vl.pvfmkslone.mvl" => "__builtin_ve_vl_pvfmkslone_mvl",
-    "llvm.ve.vl.pvfmkslone.mvml" => "__builtin_ve_vl_pvfmkslone_mvml",
-    "llvm.ve.vl.pvfmkslonenan.mvl" => "__builtin_ve_vl_pvfmkslonenan_mvl",
-    "llvm.ve.vl.pvfmkslonenan.mvml" => "__builtin_ve_vl_pvfmkslonenan_mvml",
-    "llvm.ve.vl.pvfmkslonum.mvl" => "__builtin_ve_vl_pvfmkslonum_mvl",
-    "llvm.ve.vl.pvfmkslonum.mvml" => "__builtin_ve_vl_pvfmkslonum_mvml",
-    "llvm.ve.vl.pvfmkslt.MvMl" => "__builtin_ve_vl_pvfmkslt_MvMl",
-    "llvm.ve.vl.pvfmkslt.Mvl" => "__builtin_ve_vl_pvfmkslt_Mvl",
-    "llvm.ve.vl.pvfmksltnan.MvMl" => "__builtin_ve_vl_pvfmksltnan_MvMl",
-    "llvm.ve.vl.pvfmksltnan.Mvl" => "__builtin_ve_vl_pvfmksltnan_Mvl",
-    "llvm.ve.vl.pvfmksnan.MvMl" => "__builtin_ve_vl_pvfmksnan_MvMl",
-    "llvm.ve.vl.pvfmksnan.Mvl" => "__builtin_ve_vl_pvfmksnan_Mvl",
-    "llvm.ve.vl.pvfmksne.MvMl" => "__builtin_ve_vl_pvfmksne_MvMl",
-    "llvm.ve.vl.pvfmksne.Mvl" => "__builtin_ve_vl_pvfmksne_Mvl",
-    "llvm.ve.vl.pvfmksnenan.MvMl" => "__builtin_ve_vl_pvfmksnenan_MvMl",
-    "llvm.ve.vl.pvfmksnenan.Mvl" => "__builtin_ve_vl_pvfmksnenan_Mvl",
-    "llvm.ve.vl.pvfmksnum.MvMl" => "__builtin_ve_vl_pvfmksnum_MvMl",
-    "llvm.ve.vl.pvfmksnum.Mvl" => "__builtin_ve_vl_pvfmksnum_Mvl",
-    "llvm.ve.vl.pvfmksupeq.mvl" => "__builtin_ve_vl_pvfmksupeq_mvl",
-    "llvm.ve.vl.pvfmksupeq.mvml" => "__builtin_ve_vl_pvfmksupeq_mvml",
-    "llvm.ve.vl.pvfmksupeqnan.mvl" => "__builtin_ve_vl_pvfmksupeqnan_mvl",
-    "llvm.ve.vl.pvfmksupeqnan.mvml" => "__builtin_ve_vl_pvfmksupeqnan_mvml",
-    "llvm.ve.vl.pvfmksupge.mvl" => "__builtin_ve_vl_pvfmksupge_mvl",
-    "llvm.ve.vl.pvfmksupge.mvml" => "__builtin_ve_vl_pvfmksupge_mvml",
-    "llvm.ve.vl.pvfmksupgenan.mvl" => "__builtin_ve_vl_pvfmksupgenan_mvl",
-    "llvm.ve.vl.pvfmksupgenan.mvml" => "__builtin_ve_vl_pvfmksupgenan_mvml",
-    "llvm.ve.vl.pvfmksupgt.mvl" => "__builtin_ve_vl_pvfmksupgt_mvl",
-    "llvm.ve.vl.pvfmksupgt.mvml" => "__builtin_ve_vl_pvfmksupgt_mvml",
-    "llvm.ve.vl.pvfmksupgtnan.mvl" => "__builtin_ve_vl_pvfmksupgtnan_mvl",
-    "llvm.ve.vl.pvfmksupgtnan.mvml" => "__builtin_ve_vl_pvfmksupgtnan_mvml",
-    "llvm.ve.vl.pvfmksuple.mvl" => "__builtin_ve_vl_pvfmksuple_mvl",
-    "llvm.ve.vl.pvfmksuple.mvml" => "__builtin_ve_vl_pvfmksuple_mvml",
-    "llvm.ve.vl.pvfmksuplenan.mvl" => "__builtin_ve_vl_pvfmksuplenan_mvl",
-    "llvm.ve.vl.pvfmksuplenan.mvml" => "__builtin_ve_vl_pvfmksuplenan_mvml",
-    "llvm.ve.vl.pvfmksuplt.mvl" => "__builtin_ve_vl_pvfmksuplt_mvl",
-    "llvm.ve.vl.pvfmksuplt.mvml" => "__builtin_ve_vl_pvfmksuplt_mvml",
-    "llvm.ve.vl.pvfmksupltnan.mvl" => "__builtin_ve_vl_pvfmksupltnan_mvl",
-    "llvm.ve.vl.pvfmksupltnan.mvml" => "__builtin_ve_vl_pvfmksupltnan_mvml",
-    "llvm.ve.vl.pvfmksupnan.mvl" => "__builtin_ve_vl_pvfmksupnan_mvl",
-    "llvm.ve.vl.pvfmksupnan.mvml" => "__builtin_ve_vl_pvfmksupnan_mvml",
-    "llvm.ve.vl.pvfmksupne.mvl" => "__builtin_ve_vl_pvfmksupne_mvl",
-    "llvm.ve.vl.pvfmksupne.mvml" => "__builtin_ve_vl_pvfmksupne_mvml",
-    "llvm.ve.vl.pvfmksupnenan.mvl" => "__builtin_ve_vl_pvfmksupnenan_mvl",
-    "llvm.ve.vl.pvfmksupnenan.mvml" => "__builtin_ve_vl_pvfmksupnenan_mvml",
-    "llvm.ve.vl.pvfmksupnum.mvl" => "__builtin_ve_vl_pvfmksupnum_mvl",
-    "llvm.ve.vl.pvfmksupnum.mvml" => "__builtin_ve_vl_pvfmksupnum_mvml",
-    "llvm.ve.vl.pvfmkweq.MvMl" => "__builtin_ve_vl_pvfmkweq_MvMl",
-    "llvm.ve.vl.pvfmkweq.Mvl" => "__builtin_ve_vl_pvfmkweq_Mvl",
-    "llvm.ve.vl.pvfmkweqnan.MvMl" => "__builtin_ve_vl_pvfmkweqnan_MvMl",
-    "llvm.ve.vl.pvfmkweqnan.Mvl" => "__builtin_ve_vl_pvfmkweqnan_Mvl",
-    "llvm.ve.vl.pvfmkwge.MvMl" => "__builtin_ve_vl_pvfmkwge_MvMl",
-    "llvm.ve.vl.pvfmkwge.Mvl" => "__builtin_ve_vl_pvfmkwge_Mvl",
-    "llvm.ve.vl.pvfmkwgenan.MvMl" => "__builtin_ve_vl_pvfmkwgenan_MvMl",
-    "llvm.ve.vl.pvfmkwgenan.Mvl" => "__builtin_ve_vl_pvfmkwgenan_Mvl",
-    "llvm.ve.vl.pvfmkwgt.MvMl" => "__builtin_ve_vl_pvfmkwgt_MvMl",
-    "llvm.ve.vl.pvfmkwgt.Mvl" => "__builtin_ve_vl_pvfmkwgt_Mvl",
-    "llvm.ve.vl.pvfmkwgtnan.MvMl" => "__builtin_ve_vl_pvfmkwgtnan_MvMl",
-    "llvm.ve.vl.pvfmkwgtnan.Mvl" => "__builtin_ve_vl_pvfmkwgtnan_Mvl",
-    "llvm.ve.vl.pvfmkwle.MvMl" => "__builtin_ve_vl_pvfmkwle_MvMl",
-    "llvm.ve.vl.pvfmkwle.Mvl" => "__builtin_ve_vl_pvfmkwle_Mvl",
-    "llvm.ve.vl.pvfmkwlenan.MvMl" => "__builtin_ve_vl_pvfmkwlenan_MvMl",
-    "llvm.ve.vl.pvfmkwlenan.Mvl" => "__builtin_ve_vl_pvfmkwlenan_Mvl",
-    "llvm.ve.vl.pvfmkwloeq.mvl" => "__builtin_ve_vl_pvfmkwloeq_mvl",
-    "llvm.ve.vl.pvfmkwloeq.mvml" => "__builtin_ve_vl_pvfmkwloeq_mvml",
-    "llvm.ve.vl.pvfmkwloeqnan.mvl" => "__builtin_ve_vl_pvfmkwloeqnan_mvl",
-    "llvm.ve.vl.pvfmkwloeqnan.mvml" => "__builtin_ve_vl_pvfmkwloeqnan_mvml",
-    "llvm.ve.vl.pvfmkwloge.mvl" => "__builtin_ve_vl_pvfmkwloge_mvl",
-    "llvm.ve.vl.pvfmkwloge.mvml" => "__builtin_ve_vl_pvfmkwloge_mvml",
-    "llvm.ve.vl.pvfmkwlogenan.mvl" => "__builtin_ve_vl_pvfmkwlogenan_mvl",
-    "llvm.ve.vl.pvfmkwlogenan.mvml" => "__builtin_ve_vl_pvfmkwlogenan_mvml",
-    "llvm.ve.vl.pvfmkwlogt.mvl" => "__builtin_ve_vl_pvfmkwlogt_mvl",
-    "llvm.ve.vl.pvfmkwlogt.mvml" => "__builtin_ve_vl_pvfmkwlogt_mvml",
-    "llvm.ve.vl.pvfmkwlogtnan.mvl" => "__builtin_ve_vl_pvfmkwlogtnan_mvl",
-    "llvm.ve.vl.pvfmkwlogtnan.mvml" => "__builtin_ve_vl_pvfmkwlogtnan_mvml",
-    "llvm.ve.vl.pvfmkwlole.mvl" => "__builtin_ve_vl_pvfmkwlole_mvl",
-    "llvm.ve.vl.pvfmkwlole.mvml" => "__builtin_ve_vl_pvfmkwlole_mvml",
-    "llvm.ve.vl.pvfmkwlolenan.mvl" => "__builtin_ve_vl_pvfmkwlolenan_mvl",
-    "llvm.ve.vl.pvfmkwlolenan.mvml" => "__builtin_ve_vl_pvfmkwlolenan_mvml",
-    "llvm.ve.vl.pvfmkwlolt.mvl" => "__builtin_ve_vl_pvfmkwlolt_mvl",
-    "llvm.ve.vl.pvfmkwlolt.mvml" => "__builtin_ve_vl_pvfmkwlolt_mvml",
-    "llvm.ve.vl.pvfmkwloltnan.mvl" => "__builtin_ve_vl_pvfmkwloltnan_mvl",
-    "llvm.ve.vl.pvfmkwloltnan.mvml" => "__builtin_ve_vl_pvfmkwloltnan_mvml",
-    "llvm.ve.vl.pvfmkwlonan.mvl" => "__builtin_ve_vl_pvfmkwlonan_mvl",
-    "llvm.ve.vl.pvfmkwlonan.mvml" => "__builtin_ve_vl_pvfmkwlonan_mvml",
-    "llvm.ve.vl.pvfmkwlone.mvl" => "__builtin_ve_vl_pvfmkwlone_mvl",
-    "llvm.ve.vl.pvfmkwlone.mvml" => "__builtin_ve_vl_pvfmkwlone_mvml",
-    "llvm.ve.vl.pvfmkwlonenan.mvl" => "__builtin_ve_vl_pvfmkwlonenan_mvl",
-    "llvm.ve.vl.pvfmkwlonenan.mvml" => "__builtin_ve_vl_pvfmkwlonenan_mvml",
-    "llvm.ve.vl.pvfmkwlonum.mvl" => "__builtin_ve_vl_pvfmkwlonum_mvl",
-    "llvm.ve.vl.pvfmkwlonum.mvml" => "__builtin_ve_vl_pvfmkwlonum_mvml",
-    "llvm.ve.vl.pvfmkwlt.MvMl" => "__builtin_ve_vl_pvfmkwlt_MvMl",
-    "llvm.ve.vl.pvfmkwlt.Mvl" => "__builtin_ve_vl_pvfmkwlt_Mvl",
-    "llvm.ve.vl.pvfmkwltnan.MvMl" => "__builtin_ve_vl_pvfmkwltnan_MvMl",
-    "llvm.ve.vl.pvfmkwltnan.Mvl" => "__builtin_ve_vl_pvfmkwltnan_Mvl",
-    "llvm.ve.vl.pvfmkwnan.MvMl" => "__builtin_ve_vl_pvfmkwnan_MvMl",
-    "llvm.ve.vl.pvfmkwnan.Mvl" => "__builtin_ve_vl_pvfmkwnan_Mvl",
-    "llvm.ve.vl.pvfmkwne.MvMl" => "__builtin_ve_vl_pvfmkwne_MvMl",
-    "llvm.ve.vl.pvfmkwne.Mvl" => "__builtin_ve_vl_pvfmkwne_Mvl",
-    "llvm.ve.vl.pvfmkwnenan.MvMl" => "__builtin_ve_vl_pvfmkwnenan_MvMl",
-    "llvm.ve.vl.pvfmkwnenan.Mvl" => "__builtin_ve_vl_pvfmkwnenan_Mvl",
-    "llvm.ve.vl.pvfmkwnum.MvMl" => "__builtin_ve_vl_pvfmkwnum_MvMl",
-    "llvm.ve.vl.pvfmkwnum.Mvl" => "__builtin_ve_vl_pvfmkwnum_Mvl",
-    "llvm.ve.vl.pvfmkwupeq.mvl" => "__builtin_ve_vl_pvfmkwupeq_mvl",
-    "llvm.ve.vl.pvfmkwupeq.mvml" => "__builtin_ve_vl_pvfmkwupeq_mvml",
-    "llvm.ve.vl.pvfmkwupeqnan.mvl" => "__builtin_ve_vl_pvfmkwupeqnan_mvl",
-    "llvm.ve.vl.pvfmkwupeqnan.mvml" => "__builtin_ve_vl_pvfmkwupeqnan_mvml",
-    "llvm.ve.vl.pvfmkwupge.mvl" => "__builtin_ve_vl_pvfmkwupge_mvl",
-    "llvm.ve.vl.pvfmkwupge.mvml" => "__builtin_ve_vl_pvfmkwupge_mvml",
-    "llvm.ve.vl.pvfmkwupgenan.mvl" => "__builtin_ve_vl_pvfmkwupgenan_mvl",
-    "llvm.ve.vl.pvfmkwupgenan.mvml" => "__builtin_ve_vl_pvfmkwupgenan_mvml",
-    "llvm.ve.vl.pvfmkwupgt.mvl" => "__builtin_ve_vl_pvfmkwupgt_mvl",
-    "llvm.ve.vl.pvfmkwupgt.mvml" => "__builtin_ve_vl_pvfmkwupgt_mvml",
-    "llvm.ve.vl.pvfmkwupgtnan.mvl" => "__builtin_ve_vl_pvfmkwupgtnan_mvl",
-    "llvm.ve.vl.pvfmkwupgtnan.mvml" => "__builtin_ve_vl_pvfmkwupgtnan_mvml",
-    "llvm.ve.vl.pvfmkwuple.mvl" => "__builtin_ve_vl_pvfmkwuple_mvl",
-    "llvm.ve.vl.pvfmkwuple.mvml" => "__builtin_ve_vl_pvfmkwuple_mvml",
-    "llvm.ve.vl.pvfmkwuplenan.mvl" => "__builtin_ve_vl_pvfmkwuplenan_mvl",
-    "llvm.ve.vl.pvfmkwuplenan.mvml" => "__builtin_ve_vl_pvfmkwuplenan_mvml",
-    "llvm.ve.vl.pvfmkwuplt.mvl" => "__builtin_ve_vl_pvfmkwuplt_mvl",
-    "llvm.ve.vl.pvfmkwuplt.mvml" => "__builtin_ve_vl_pvfmkwuplt_mvml",
-    "llvm.ve.vl.pvfmkwupltnan.mvl" => "__builtin_ve_vl_pvfmkwupltnan_mvl",
-    "llvm.ve.vl.pvfmkwupltnan.mvml" => "__builtin_ve_vl_pvfmkwupltnan_mvml",
-    "llvm.ve.vl.pvfmkwupnan.mvl" => "__builtin_ve_vl_pvfmkwupnan_mvl",
-    "llvm.ve.vl.pvfmkwupnan.mvml" => "__builtin_ve_vl_pvfmkwupnan_mvml",
-    "llvm.ve.vl.pvfmkwupne.mvl" => "__builtin_ve_vl_pvfmkwupne_mvl",
-    "llvm.ve.vl.pvfmkwupne.mvml" => "__builtin_ve_vl_pvfmkwupne_mvml",
-    "llvm.ve.vl.pvfmkwupnenan.mvl" => "__builtin_ve_vl_pvfmkwupnenan_mvl",
-    "llvm.ve.vl.pvfmkwupnenan.mvml" => "__builtin_ve_vl_pvfmkwupnenan_mvml",
-    "llvm.ve.vl.pvfmkwupnum.mvl" => "__builtin_ve_vl_pvfmkwupnum_mvl",
-    "llvm.ve.vl.pvfmkwupnum.mvml" => "__builtin_ve_vl_pvfmkwupnum_mvml",
-    "llvm.ve.vl.pvfmsb.vsvvMvl" => "__builtin_ve_vl_pvfmsb_vsvvMvl",
-    "llvm.ve.vl.pvfmsb.vsvvl" => "__builtin_ve_vl_pvfmsb_vsvvl",
-    "llvm.ve.vl.pvfmsb.vsvvvl" => "__builtin_ve_vl_pvfmsb_vsvvvl",
-    "llvm.ve.vl.pvfmsb.vvsvMvl" => "__builtin_ve_vl_pvfmsb_vvsvMvl",
-    "llvm.ve.vl.pvfmsb.vvsvl" => "__builtin_ve_vl_pvfmsb_vvsvl",
-    "llvm.ve.vl.pvfmsb.vvsvvl" => "__builtin_ve_vl_pvfmsb_vvsvvl",
-    "llvm.ve.vl.pvfmsb.vvvvMvl" => "__builtin_ve_vl_pvfmsb_vvvvMvl",
-    "llvm.ve.vl.pvfmsb.vvvvl" => "__builtin_ve_vl_pvfmsb_vvvvl",
-    "llvm.ve.vl.pvfmsb.vvvvvl" => "__builtin_ve_vl_pvfmsb_vvvvvl",
-    "llvm.ve.vl.pvfmul.vsvMvl" => "__builtin_ve_vl_pvfmul_vsvMvl",
-    "llvm.ve.vl.pvfmul.vsvl" => "__builtin_ve_vl_pvfmul_vsvl",
-    "llvm.ve.vl.pvfmul.vsvvl" => "__builtin_ve_vl_pvfmul_vsvvl",
-    "llvm.ve.vl.pvfmul.vvvMvl" => "__builtin_ve_vl_pvfmul_vvvMvl",
-    "llvm.ve.vl.pvfmul.vvvl" => "__builtin_ve_vl_pvfmul_vvvl",
-    "llvm.ve.vl.pvfmul.vvvvl" => "__builtin_ve_vl_pvfmul_vvvvl",
-    "llvm.ve.vl.pvfnmad.vsvvMvl" => "__builtin_ve_vl_pvfnmad_vsvvMvl",
-    "llvm.ve.vl.pvfnmad.vsvvl" => "__builtin_ve_vl_pvfnmad_vsvvl",
-    "llvm.ve.vl.pvfnmad.vsvvvl" => "__builtin_ve_vl_pvfnmad_vsvvvl",
-    "llvm.ve.vl.pvfnmad.vvsvMvl" => "__builtin_ve_vl_pvfnmad_vvsvMvl",
-    "llvm.ve.vl.pvfnmad.vvsvl" => "__builtin_ve_vl_pvfnmad_vvsvl",
-    "llvm.ve.vl.pvfnmad.vvsvvl" => "__builtin_ve_vl_pvfnmad_vvsvvl",
-    "llvm.ve.vl.pvfnmad.vvvvMvl" => "__builtin_ve_vl_pvfnmad_vvvvMvl",
-    "llvm.ve.vl.pvfnmad.vvvvl" => "__builtin_ve_vl_pvfnmad_vvvvl",
-    "llvm.ve.vl.pvfnmad.vvvvvl" => "__builtin_ve_vl_pvfnmad_vvvvvl",
-    "llvm.ve.vl.pvfnmsb.vsvvMvl" => "__builtin_ve_vl_pvfnmsb_vsvvMvl",
-    "llvm.ve.vl.pvfnmsb.vsvvl" => "__builtin_ve_vl_pvfnmsb_vsvvl",
-    "llvm.ve.vl.pvfnmsb.vsvvvl" => "__builtin_ve_vl_pvfnmsb_vsvvvl",
-    "llvm.ve.vl.pvfnmsb.vvsvMvl" => "__builtin_ve_vl_pvfnmsb_vvsvMvl",
-    "llvm.ve.vl.pvfnmsb.vvsvl" => "__builtin_ve_vl_pvfnmsb_vvsvl",
-    "llvm.ve.vl.pvfnmsb.vvsvvl" => "__builtin_ve_vl_pvfnmsb_vvsvvl",
-    "llvm.ve.vl.pvfnmsb.vvvvMvl" => "__builtin_ve_vl_pvfnmsb_vvvvMvl",
-    "llvm.ve.vl.pvfnmsb.vvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvl",
-    "llvm.ve.vl.pvfnmsb.vvvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvvl",
-    "llvm.ve.vl.pvfsub.vsvMvl" => "__builtin_ve_vl_pvfsub_vsvMvl",
-    "llvm.ve.vl.pvfsub.vsvl" => "__builtin_ve_vl_pvfsub_vsvl",
-    "llvm.ve.vl.pvfsub.vsvvl" => "__builtin_ve_vl_pvfsub_vsvvl",
-    "llvm.ve.vl.pvfsub.vvvMvl" => "__builtin_ve_vl_pvfsub_vvvMvl",
-    "llvm.ve.vl.pvfsub.vvvl" => "__builtin_ve_vl_pvfsub_vvvl",
-    "llvm.ve.vl.pvfsub.vvvvl" => "__builtin_ve_vl_pvfsub_vvvvl",
-    "llvm.ve.vl.pvldz.vvMvl" => "__builtin_ve_vl_pvldz_vvMvl",
-    "llvm.ve.vl.pvldz.vvl" => "__builtin_ve_vl_pvldz_vvl",
-    "llvm.ve.vl.pvldz.vvvl" => "__builtin_ve_vl_pvldz_vvvl",
-    "llvm.ve.vl.pvldzlo.vvl" => "__builtin_ve_vl_pvldzlo_vvl",
-    "llvm.ve.vl.pvldzlo.vvmvl" => "__builtin_ve_vl_pvldzlo_vvmvl",
-    "llvm.ve.vl.pvldzlo.vvvl" => "__builtin_ve_vl_pvldzlo_vvvl",
-    "llvm.ve.vl.pvldzup.vvl" => "__builtin_ve_vl_pvldzup_vvl",
-    "llvm.ve.vl.pvldzup.vvmvl" => "__builtin_ve_vl_pvldzup_vvmvl",
-    "llvm.ve.vl.pvldzup.vvvl" => "__builtin_ve_vl_pvldzup_vvvl",
-    "llvm.ve.vl.pvmaxs.vsvMvl" => "__builtin_ve_vl_pvmaxs_vsvMvl",
-    "llvm.ve.vl.pvmaxs.vsvl" => "__builtin_ve_vl_pvmaxs_vsvl",
-    "llvm.ve.vl.pvmaxs.vsvvl" => "__builtin_ve_vl_pvmaxs_vsvvl",
-    "llvm.ve.vl.pvmaxs.vvvMvl" => "__builtin_ve_vl_pvmaxs_vvvMvl",
-    "llvm.ve.vl.pvmaxs.vvvl" => "__builtin_ve_vl_pvmaxs_vvvl",
-    "llvm.ve.vl.pvmaxs.vvvvl" => "__builtin_ve_vl_pvmaxs_vvvvl",
-    "llvm.ve.vl.pvmins.vsvMvl" => "__builtin_ve_vl_pvmins_vsvMvl",
-    "llvm.ve.vl.pvmins.vsvl" => "__builtin_ve_vl_pvmins_vsvl",
-    "llvm.ve.vl.pvmins.vsvvl" => "__builtin_ve_vl_pvmins_vsvvl",
-    "llvm.ve.vl.pvmins.vvvMvl" => "__builtin_ve_vl_pvmins_vvvMvl",
-    "llvm.ve.vl.pvmins.vvvl" => "__builtin_ve_vl_pvmins_vvvl",
-    "llvm.ve.vl.pvmins.vvvvl" => "__builtin_ve_vl_pvmins_vvvvl",
-    "llvm.ve.vl.pvor.vsvMvl" => "__builtin_ve_vl_pvor_vsvMvl",
-    "llvm.ve.vl.pvor.vsvl" => "__builtin_ve_vl_pvor_vsvl",
-    "llvm.ve.vl.pvor.vsvvl" => "__builtin_ve_vl_pvor_vsvvl",
-    "llvm.ve.vl.pvor.vvvMvl" => "__builtin_ve_vl_pvor_vvvMvl",
-    "llvm.ve.vl.pvor.vvvl" => "__builtin_ve_vl_pvor_vvvl",
-    "llvm.ve.vl.pvor.vvvvl" => "__builtin_ve_vl_pvor_vvvvl",
-    "llvm.ve.vl.pvpcnt.vvMvl" => "__builtin_ve_vl_pvpcnt_vvMvl",
-    "llvm.ve.vl.pvpcnt.vvl" => "__builtin_ve_vl_pvpcnt_vvl",
-    "llvm.ve.vl.pvpcnt.vvvl" => "__builtin_ve_vl_pvpcnt_vvvl",
-    "llvm.ve.vl.pvpcntlo.vvl" => "__builtin_ve_vl_pvpcntlo_vvl",
-    "llvm.ve.vl.pvpcntlo.vvmvl" => "__builtin_ve_vl_pvpcntlo_vvmvl",
-    "llvm.ve.vl.pvpcntlo.vvvl" => "__builtin_ve_vl_pvpcntlo_vvvl",
-    "llvm.ve.vl.pvpcntup.vvl" => "__builtin_ve_vl_pvpcntup_vvl",
-    "llvm.ve.vl.pvpcntup.vvmvl" => "__builtin_ve_vl_pvpcntup_vvmvl",
-    "llvm.ve.vl.pvpcntup.vvvl" => "__builtin_ve_vl_pvpcntup_vvvl",
-    "llvm.ve.vl.pvrcp.vvl" => "__builtin_ve_vl_pvrcp_vvl",
-    "llvm.ve.vl.pvrcp.vvvl" => "__builtin_ve_vl_pvrcp_vvvl",
-    "llvm.ve.vl.pvrsqrt.vvl" => "__builtin_ve_vl_pvrsqrt_vvl",
-    "llvm.ve.vl.pvrsqrt.vvvl" => "__builtin_ve_vl_pvrsqrt_vvvl",
-    "llvm.ve.vl.pvrsqrtnex.vvl" => "__builtin_ve_vl_pvrsqrtnex_vvl",
-    "llvm.ve.vl.pvrsqrtnex.vvvl" => "__builtin_ve_vl_pvrsqrtnex_vvvl",
-    "llvm.ve.vl.pvseq.vl" => "__builtin_ve_vl_pvseq_vl",
-    "llvm.ve.vl.pvseq.vvl" => "__builtin_ve_vl_pvseq_vvl",
-    "llvm.ve.vl.pvseqlo.vl" => "__builtin_ve_vl_pvseqlo_vl",
-    "llvm.ve.vl.pvseqlo.vvl" => "__builtin_ve_vl_pvseqlo_vvl",
-    "llvm.ve.vl.pvsequp.vl" => "__builtin_ve_vl_pvsequp_vl",
-    "llvm.ve.vl.pvsequp.vvl" => "__builtin_ve_vl_pvsequp_vvl",
-    "llvm.ve.vl.pvsla.vvsMvl" => "__builtin_ve_vl_pvsla_vvsMvl",
-    "llvm.ve.vl.pvsla.vvsl" => "__builtin_ve_vl_pvsla_vvsl",
-    "llvm.ve.vl.pvsla.vvsvl" => "__builtin_ve_vl_pvsla_vvsvl",
-    "llvm.ve.vl.pvsla.vvvMvl" => "__builtin_ve_vl_pvsla_vvvMvl",
-    "llvm.ve.vl.pvsla.vvvl" => "__builtin_ve_vl_pvsla_vvvl",
-    "llvm.ve.vl.pvsla.vvvvl" => "__builtin_ve_vl_pvsla_vvvvl",
-    "llvm.ve.vl.pvsll.vvsMvl" => "__builtin_ve_vl_pvsll_vvsMvl",
-    "llvm.ve.vl.pvsll.vvsl" => "__builtin_ve_vl_pvsll_vvsl",
-    "llvm.ve.vl.pvsll.vvsvl" => "__builtin_ve_vl_pvsll_vvsvl",
-    "llvm.ve.vl.pvsll.vvvMvl" => "__builtin_ve_vl_pvsll_vvvMvl",
-    "llvm.ve.vl.pvsll.vvvl" => "__builtin_ve_vl_pvsll_vvvl",
-    "llvm.ve.vl.pvsll.vvvvl" => "__builtin_ve_vl_pvsll_vvvvl",
-    "llvm.ve.vl.pvsra.vvsMvl" => "__builtin_ve_vl_pvsra_vvsMvl",
-    "llvm.ve.vl.pvsra.vvsl" => "__builtin_ve_vl_pvsra_vvsl",
-    "llvm.ve.vl.pvsra.vvsvl" => "__builtin_ve_vl_pvsra_vvsvl",
-    "llvm.ve.vl.pvsra.vvvMvl" => "__builtin_ve_vl_pvsra_vvvMvl",
-    "llvm.ve.vl.pvsra.vvvl" => "__builtin_ve_vl_pvsra_vvvl",
-    "llvm.ve.vl.pvsra.vvvvl" => "__builtin_ve_vl_pvsra_vvvvl",
-    "llvm.ve.vl.pvsrl.vvsMvl" => "__builtin_ve_vl_pvsrl_vvsMvl",
-    "llvm.ve.vl.pvsrl.vvsl" => "__builtin_ve_vl_pvsrl_vvsl",
-    "llvm.ve.vl.pvsrl.vvsvl" => "__builtin_ve_vl_pvsrl_vvsvl",
-    "llvm.ve.vl.pvsrl.vvvMvl" => "__builtin_ve_vl_pvsrl_vvvMvl",
-    "llvm.ve.vl.pvsrl.vvvl" => "__builtin_ve_vl_pvsrl_vvvl",
-    "llvm.ve.vl.pvsrl.vvvvl" => "__builtin_ve_vl_pvsrl_vvvvl",
-    "llvm.ve.vl.pvsubs.vsvMvl" => "__builtin_ve_vl_pvsubs_vsvMvl",
-    "llvm.ve.vl.pvsubs.vsvl" => "__builtin_ve_vl_pvsubs_vsvl",
-    "llvm.ve.vl.pvsubs.vsvvl" => "__builtin_ve_vl_pvsubs_vsvvl",
-    "llvm.ve.vl.pvsubs.vvvMvl" => "__builtin_ve_vl_pvsubs_vvvMvl",
-    "llvm.ve.vl.pvsubs.vvvl" => "__builtin_ve_vl_pvsubs_vvvl",
-    "llvm.ve.vl.pvsubs.vvvvl" => "__builtin_ve_vl_pvsubs_vvvvl",
-    "llvm.ve.vl.pvsubu.vsvMvl" => "__builtin_ve_vl_pvsubu_vsvMvl",
-    "llvm.ve.vl.pvsubu.vsvl" => "__builtin_ve_vl_pvsubu_vsvl",
-    "llvm.ve.vl.pvsubu.vsvvl" => "__builtin_ve_vl_pvsubu_vsvvl",
-    "llvm.ve.vl.pvsubu.vvvMvl" => "__builtin_ve_vl_pvsubu_vvvMvl",
-    "llvm.ve.vl.pvsubu.vvvl" => "__builtin_ve_vl_pvsubu_vvvl",
-    "llvm.ve.vl.pvsubu.vvvvl" => "__builtin_ve_vl_pvsubu_vvvvl",
-    "llvm.ve.vl.pvxor.vsvMvl" => "__builtin_ve_vl_pvxor_vsvMvl",
-    "llvm.ve.vl.pvxor.vsvl" => "__builtin_ve_vl_pvxor_vsvl",
-    "llvm.ve.vl.pvxor.vsvvl" => "__builtin_ve_vl_pvxor_vsvvl",
-    "llvm.ve.vl.pvxor.vvvMvl" => "__builtin_ve_vl_pvxor_vvvMvl",
-    "llvm.ve.vl.pvxor.vvvl" => "__builtin_ve_vl_pvxor_vvvl",
-    "llvm.ve.vl.pvxor.vvvvl" => "__builtin_ve_vl_pvxor_vvvvl",
-    "llvm.ve.vl.scr.sss" => "__builtin_ve_vl_scr_sss",
-    "llvm.ve.vl.svm.sMs" => "__builtin_ve_vl_svm_sMs",
-    "llvm.ve.vl.svm.sms" => "__builtin_ve_vl_svm_sms",
-    "llvm.ve.vl.svob" => "__builtin_ve_vl_svob",
-    "llvm.ve.vl.tovm.sml" => "__builtin_ve_vl_tovm_sml",
-    "llvm.ve.vl.tscr.ssss" => "__builtin_ve_vl_tscr_ssss",
-    "llvm.ve.vl.vaddsl.vsvl" => "__builtin_ve_vl_vaddsl_vsvl",
-    "llvm.ve.vl.vaddsl.vsvmvl" => "__builtin_ve_vl_vaddsl_vsvmvl",
-    "llvm.ve.vl.vaddsl.vsvvl" => "__builtin_ve_vl_vaddsl_vsvvl",
-    "llvm.ve.vl.vaddsl.vvvl" => "__builtin_ve_vl_vaddsl_vvvl",
-    "llvm.ve.vl.vaddsl.vvvmvl" => "__builtin_ve_vl_vaddsl_vvvmvl",
-    "llvm.ve.vl.vaddsl.vvvvl" => "__builtin_ve_vl_vaddsl_vvvvl",
-    "llvm.ve.vl.vaddswsx.vsvl" => "__builtin_ve_vl_vaddswsx_vsvl",
-    "llvm.ve.vl.vaddswsx.vsvmvl" => "__builtin_ve_vl_vaddswsx_vsvmvl",
-    "llvm.ve.vl.vaddswsx.vsvvl" => "__builtin_ve_vl_vaddswsx_vsvvl",
-    "llvm.ve.vl.vaddswsx.vvvl" => "__builtin_ve_vl_vaddswsx_vvvl",
-    "llvm.ve.vl.vaddswsx.vvvmvl" => "__builtin_ve_vl_vaddswsx_vvvmvl",
-    "llvm.ve.vl.vaddswsx.vvvvl" => "__builtin_ve_vl_vaddswsx_vvvvl",
-    "llvm.ve.vl.vaddswzx.vsvl" => "__builtin_ve_vl_vaddswzx_vsvl",
-    "llvm.ve.vl.vaddswzx.vsvmvl" => "__builtin_ve_vl_vaddswzx_vsvmvl",
-    "llvm.ve.vl.vaddswzx.vsvvl" => "__builtin_ve_vl_vaddswzx_vsvvl",
-    "llvm.ve.vl.vaddswzx.vvvl" => "__builtin_ve_vl_vaddswzx_vvvl",
-    "llvm.ve.vl.vaddswzx.vvvmvl" => "__builtin_ve_vl_vaddswzx_vvvmvl",
-    "llvm.ve.vl.vaddswzx.vvvvl" => "__builtin_ve_vl_vaddswzx_vvvvl",
-    "llvm.ve.vl.vaddul.vsvl" => "__builtin_ve_vl_vaddul_vsvl",
-    "llvm.ve.vl.vaddul.vsvmvl" => "__builtin_ve_vl_vaddul_vsvmvl",
-    "llvm.ve.vl.vaddul.vsvvl" => "__builtin_ve_vl_vaddul_vsvvl",
-    "llvm.ve.vl.vaddul.vvvl" => "__builtin_ve_vl_vaddul_vvvl",
-    "llvm.ve.vl.vaddul.vvvmvl" => "__builtin_ve_vl_vaddul_vvvmvl",
-    "llvm.ve.vl.vaddul.vvvvl" => "__builtin_ve_vl_vaddul_vvvvl",
-    "llvm.ve.vl.vadduw.vsvl" => "__builtin_ve_vl_vadduw_vsvl",
-    "llvm.ve.vl.vadduw.vsvmvl" => "__builtin_ve_vl_vadduw_vsvmvl",
-    "llvm.ve.vl.vadduw.vsvvl" => "__builtin_ve_vl_vadduw_vsvvl",
-    "llvm.ve.vl.vadduw.vvvl" => "__builtin_ve_vl_vadduw_vvvl",
-    "llvm.ve.vl.vadduw.vvvmvl" => "__builtin_ve_vl_vadduw_vvvmvl",
-    "llvm.ve.vl.vadduw.vvvvl" => "__builtin_ve_vl_vadduw_vvvvl",
-    "llvm.ve.vl.vand.vsvl" => "__builtin_ve_vl_vand_vsvl",
-    "llvm.ve.vl.vand.vsvmvl" => "__builtin_ve_vl_vand_vsvmvl",
-    "llvm.ve.vl.vand.vsvvl" => "__builtin_ve_vl_vand_vsvvl",
-    "llvm.ve.vl.vand.vvvl" => "__builtin_ve_vl_vand_vvvl",
-    "llvm.ve.vl.vand.vvvmvl" => "__builtin_ve_vl_vand_vvvmvl",
-    "llvm.ve.vl.vand.vvvvl" => "__builtin_ve_vl_vand_vvvvl",
-    "llvm.ve.vl.vbrdd.vsl" => "__builtin_ve_vl_vbrdd_vsl",
-    "llvm.ve.vl.vbrdd.vsmvl" => "__builtin_ve_vl_vbrdd_vsmvl",
-    "llvm.ve.vl.vbrdd.vsvl" => "__builtin_ve_vl_vbrdd_vsvl",
-    "llvm.ve.vl.vbrdl.vsl" => "__builtin_ve_vl_vbrdl_vsl",
-    "llvm.ve.vl.vbrdl.vsmvl" => "__builtin_ve_vl_vbrdl_vsmvl",
-    "llvm.ve.vl.vbrdl.vsvl" => "__builtin_ve_vl_vbrdl_vsvl",
-    "llvm.ve.vl.vbrds.vsl" => "__builtin_ve_vl_vbrds_vsl",
-    "llvm.ve.vl.vbrds.vsmvl" => "__builtin_ve_vl_vbrds_vsmvl",
-    "llvm.ve.vl.vbrds.vsvl" => "__builtin_ve_vl_vbrds_vsvl",
-    "llvm.ve.vl.vbrdw.vsl" => "__builtin_ve_vl_vbrdw_vsl",
-    "llvm.ve.vl.vbrdw.vsmvl" => "__builtin_ve_vl_vbrdw_vsmvl",
-    "llvm.ve.vl.vbrdw.vsvl" => "__builtin_ve_vl_vbrdw_vsvl",
-    "llvm.ve.vl.vbrv.vvl" => "__builtin_ve_vl_vbrv_vvl",
-    "llvm.ve.vl.vbrv.vvmvl" => "__builtin_ve_vl_vbrv_vvmvl",
-    "llvm.ve.vl.vbrv.vvvl" => "__builtin_ve_vl_vbrv_vvvl",
-    "llvm.ve.vl.vcmpsl.vsvl" => "__builtin_ve_vl_vcmpsl_vsvl",
-    "llvm.ve.vl.vcmpsl.vsvmvl" => "__builtin_ve_vl_vcmpsl_vsvmvl",
-    "llvm.ve.vl.vcmpsl.vsvvl" => "__builtin_ve_vl_vcmpsl_vsvvl",
-    "llvm.ve.vl.vcmpsl.vvvl" => "__builtin_ve_vl_vcmpsl_vvvl",
-    "llvm.ve.vl.vcmpsl.vvvmvl" => "__builtin_ve_vl_vcmpsl_vvvmvl",
-    "llvm.ve.vl.vcmpsl.vvvvl" => "__builtin_ve_vl_vcmpsl_vvvvl",
-    "llvm.ve.vl.vcmpswsx.vsvl" => "__builtin_ve_vl_vcmpswsx_vsvl",
-    "llvm.ve.vl.vcmpswsx.vsvmvl" => "__builtin_ve_vl_vcmpswsx_vsvmvl",
-    "llvm.ve.vl.vcmpswsx.vsvvl" => "__builtin_ve_vl_vcmpswsx_vsvvl",
-    "llvm.ve.vl.vcmpswsx.vvvl" => "__builtin_ve_vl_vcmpswsx_vvvl",
-    "llvm.ve.vl.vcmpswsx.vvvmvl" => "__builtin_ve_vl_vcmpswsx_vvvmvl",
-    "llvm.ve.vl.vcmpswsx.vvvvl" => "__builtin_ve_vl_vcmpswsx_vvvvl",
-    "llvm.ve.vl.vcmpswzx.vsvl" => "__builtin_ve_vl_vcmpswzx_vsvl",
-    "llvm.ve.vl.vcmpswzx.vsvmvl" => "__builtin_ve_vl_vcmpswzx_vsvmvl",
-    "llvm.ve.vl.vcmpswzx.vsvvl" => "__builtin_ve_vl_vcmpswzx_vsvvl",
-    "llvm.ve.vl.vcmpswzx.vvvl" => "__builtin_ve_vl_vcmpswzx_vvvl",
-    "llvm.ve.vl.vcmpswzx.vvvmvl" => "__builtin_ve_vl_vcmpswzx_vvvmvl",
-    "llvm.ve.vl.vcmpswzx.vvvvl" => "__builtin_ve_vl_vcmpswzx_vvvvl",
-    "llvm.ve.vl.vcmpul.vsvl" => "__builtin_ve_vl_vcmpul_vsvl",
-    "llvm.ve.vl.vcmpul.vsvmvl" => "__builtin_ve_vl_vcmpul_vsvmvl",
-    "llvm.ve.vl.vcmpul.vsvvl" => "__builtin_ve_vl_vcmpul_vsvvl",
-    "llvm.ve.vl.vcmpul.vvvl" => "__builtin_ve_vl_vcmpul_vvvl",
-    "llvm.ve.vl.vcmpul.vvvmvl" => "__builtin_ve_vl_vcmpul_vvvmvl",
-    "llvm.ve.vl.vcmpul.vvvvl" => "__builtin_ve_vl_vcmpul_vvvvl",
-    "llvm.ve.vl.vcmpuw.vsvl" => "__builtin_ve_vl_vcmpuw_vsvl",
-    "llvm.ve.vl.vcmpuw.vsvmvl" => "__builtin_ve_vl_vcmpuw_vsvmvl",
-    "llvm.ve.vl.vcmpuw.vsvvl" => "__builtin_ve_vl_vcmpuw_vsvvl",
-    "llvm.ve.vl.vcmpuw.vvvl" => "__builtin_ve_vl_vcmpuw_vvvl",
-    "llvm.ve.vl.vcmpuw.vvvmvl" => "__builtin_ve_vl_vcmpuw_vvvmvl",
-    "llvm.ve.vl.vcmpuw.vvvvl" => "__builtin_ve_vl_vcmpuw_vvvvl",
-    "llvm.ve.vl.vcp.vvmvl" => "__builtin_ve_vl_vcp_vvmvl",
-    "llvm.ve.vl.vcvtdl.vvl" => "__builtin_ve_vl_vcvtdl_vvl",
-    "llvm.ve.vl.vcvtdl.vvvl" => "__builtin_ve_vl_vcvtdl_vvvl",
-    "llvm.ve.vl.vcvtds.vvl" => "__builtin_ve_vl_vcvtds_vvl",
-    "llvm.ve.vl.vcvtds.vvvl" => "__builtin_ve_vl_vcvtds_vvvl",
-    "llvm.ve.vl.vcvtdw.vvl" => "__builtin_ve_vl_vcvtdw_vvl",
-    "llvm.ve.vl.vcvtdw.vvvl" => "__builtin_ve_vl_vcvtdw_vvvl",
-    "llvm.ve.vl.vcvtld.vvl" => "__builtin_ve_vl_vcvtld_vvl",
-    "llvm.ve.vl.vcvtld.vvmvl" => "__builtin_ve_vl_vcvtld_vvmvl",
-    "llvm.ve.vl.vcvtld.vvvl" => "__builtin_ve_vl_vcvtld_vvvl",
-    "llvm.ve.vl.vcvtldrz.vvl" => "__builtin_ve_vl_vcvtldrz_vvl",
-    "llvm.ve.vl.vcvtldrz.vvmvl" => "__builtin_ve_vl_vcvtldrz_vvmvl",
-    "llvm.ve.vl.vcvtldrz.vvvl" => "__builtin_ve_vl_vcvtldrz_vvvl",
-    "llvm.ve.vl.vcvtsd.vvl" => "__builtin_ve_vl_vcvtsd_vvl",
-    "llvm.ve.vl.vcvtsd.vvvl" => "__builtin_ve_vl_vcvtsd_vvvl",
-    "llvm.ve.vl.vcvtsw.vvl" => "__builtin_ve_vl_vcvtsw_vvl",
-    "llvm.ve.vl.vcvtsw.vvvl" => "__builtin_ve_vl_vcvtsw_vvvl",
-    "llvm.ve.vl.vcvtwdsx.vvl" => "__builtin_ve_vl_vcvtwdsx_vvl",
-    "llvm.ve.vl.vcvtwdsx.vvmvl" => "__builtin_ve_vl_vcvtwdsx_vvmvl",
-    "llvm.ve.vl.vcvtwdsx.vvvl" => "__builtin_ve_vl_vcvtwdsx_vvvl",
-    "llvm.ve.vl.vcvtwdsxrz.vvl" => "__builtin_ve_vl_vcvtwdsxrz_vvl",
-    "llvm.ve.vl.vcvtwdsxrz.vvmvl" => "__builtin_ve_vl_vcvtwdsxrz_vvmvl",
-    "llvm.ve.vl.vcvtwdsxrz.vvvl" => "__builtin_ve_vl_vcvtwdsxrz_vvvl",
-    "llvm.ve.vl.vcvtwdzx.vvl" => "__builtin_ve_vl_vcvtwdzx_vvl",
-    "llvm.ve.vl.vcvtwdzx.vvmvl" => "__builtin_ve_vl_vcvtwdzx_vvmvl",
-    "llvm.ve.vl.vcvtwdzx.vvvl" => "__builtin_ve_vl_vcvtwdzx_vvvl",
-    "llvm.ve.vl.vcvtwdzxrz.vvl" => "__builtin_ve_vl_vcvtwdzxrz_vvl",
-    "llvm.ve.vl.vcvtwdzxrz.vvmvl" => "__builtin_ve_vl_vcvtwdzxrz_vvmvl",
-    "llvm.ve.vl.vcvtwdzxrz.vvvl" => "__builtin_ve_vl_vcvtwdzxrz_vvvl",
-    "llvm.ve.vl.vcvtwssx.vvl" => "__builtin_ve_vl_vcvtwssx_vvl",
-    "llvm.ve.vl.vcvtwssx.vvmvl" => "__builtin_ve_vl_vcvtwssx_vvmvl",
-    "llvm.ve.vl.vcvtwssx.vvvl" => "__builtin_ve_vl_vcvtwssx_vvvl",
-    "llvm.ve.vl.vcvtwssxrz.vvl" => "__builtin_ve_vl_vcvtwssxrz_vvl",
-    "llvm.ve.vl.vcvtwssxrz.vvmvl" => "__builtin_ve_vl_vcvtwssxrz_vvmvl",
-    "llvm.ve.vl.vcvtwssxrz.vvvl" => "__builtin_ve_vl_vcvtwssxrz_vvvl",
-    "llvm.ve.vl.vcvtwszx.vvl" => "__builtin_ve_vl_vcvtwszx_vvl",
-    "llvm.ve.vl.vcvtwszx.vvmvl" => "__builtin_ve_vl_vcvtwszx_vvmvl",
-    "llvm.ve.vl.vcvtwszx.vvvl" => "__builtin_ve_vl_vcvtwszx_vvvl",
-    "llvm.ve.vl.vcvtwszxrz.vvl" => "__builtin_ve_vl_vcvtwszxrz_vvl",
-    "llvm.ve.vl.vcvtwszxrz.vvmvl" => "__builtin_ve_vl_vcvtwszxrz_vvmvl",
-    "llvm.ve.vl.vcvtwszxrz.vvvl" => "__builtin_ve_vl_vcvtwszxrz_vvvl",
-    "llvm.ve.vl.vdivsl.vsvl" => "__builtin_ve_vl_vdivsl_vsvl",
-    "llvm.ve.vl.vdivsl.vsvmvl" => "__builtin_ve_vl_vdivsl_vsvmvl",
-    "llvm.ve.vl.vdivsl.vsvvl" => "__builtin_ve_vl_vdivsl_vsvvl",
-    "llvm.ve.vl.vdivsl.vvsl" => "__builtin_ve_vl_vdivsl_vvsl",
-    "llvm.ve.vl.vdivsl.vvsmvl" => "__builtin_ve_vl_vdivsl_vvsmvl",
-    "llvm.ve.vl.vdivsl.vvsvl" => "__builtin_ve_vl_vdivsl_vvsvl",
-    "llvm.ve.vl.vdivsl.vvvl" => "__builtin_ve_vl_vdivsl_vvvl",
-    "llvm.ve.vl.vdivsl.vvvmvl" => "__builtin_ve_vl_vdivsl_vvvmvl",
-    "llvm.ve.vl.vdivsl.vvvvl" => "__builtin_ve_vl_vdivsl_vvvvl",
-    "llvm.ve.vl.vdivswsx.vsvl" => "__builtin_ve_vl_vdivswsx_vsvl",
-    "llvm.ve.vl.vdivswsx.vsvmvl" => "__builtin_ve_vl_vdivswsx_vsvmvl",
-    "llvm.ve.vl.vdivswsx.vsvvl" => "__builtin_ve_vl_vdivswsx_vsvvl",
-    "llvm.ve.vl.vdivswsx.vvsl" => "__builtin_ve_vl_vdivswsx_vvsl",
-    "llvm.ve.vl.vdivswsx.vvsmvl" => "__builtin_ve_vl_vdivswsx_vvsmvl",
-    "llvm.ve.vl.vdivswsx.vvsvl" => "__builtin_ve_vl_vdivswsx_vvsvl",
-    "llvm.ve.vl.vdivswsx.vvvl" => "__builtin_ve_vl_vdivswsx_vvvl",
-    "llvm.ve.vl.vdivswsx.vvvmvl" => "__builtin_ve_vl_vdivswsx_vvvmvl",
-    "llvm.ve.vl.vdivswsx.vvvvl" => "__builtin_ve_vl_vdivswsx_vvvvl",
-    "llvm.ve.vl.vdivswzx.vsvl" => "__builtin_ve_vl_vdivswzx_vsvl",
-    "llvm.ve.vl.vdivswzx.vsvmvl" => "__builtin_ve_vl_vdivswzx_vsvmvl",
-    "llvm.ve.vl.vdivswzx.vsvvl" => "__builtin_ve_vl_vdivswzx_vsvvl",
-    "llvm.ve.vl.vdivswzx.vvsl" => "__builtin_ve_vl_vdivswzx_vvsl",
-    "llvm.ve.vl.vdivswzx.vvsmvl" => "__builtin_ve_vl_vdivswzx_vvsmvl",
-    "llvm.ve.vl.vdivswzx.vvsvl" => "__builtin_ve_vl_vdivswzx_vvsvl",
-    "llvm.ve.vl.vdivswzx.vvvl" => "__builtin_ve_vl_vdivswzx_vvvl",
-    "llvm.ve.vl.vdivswzx.vvvmvl" => "__builtin_ve_vl_vdivswzx_vvvmvl",
-    "llvm.ve.vl.vdivswzx.vvvvl" => "__builtin_ve_vl_vdivswzx_vvvvl",
-    "llvm.ve.vl.vdivul.vsvl" => "__builtin_ve_vl_vdivul_vsvl",
-    "llvm.ve.vl.vdivul.vsvmvl" => "__builtin_ve_vl_vdivul_vsvmvl",
-    "llvm.ve.vl.vdivul.vsvvl" => "__builtin_ve_vl_vdivul_vsvvl",
-    "llvm.ve.vl.vdivul.vvsl" => "__builtin_ve_vl_vdivul_vvsl",
-    "llvm.ve.vl.vdivul.vvsmvl" => "__builtin_ve_vl_vdivul_vvsmvl",
-    "llvm.ve.vl.vdivul.vvsvl" => "__builtin_ve_vl_vdivul_vvsvl",
-    "llvm.ve.vl.vdivul.vvvl" => "__builtin_ve_vl_vdivul_vvvl",
-    "llvm.ve.vl.vdivul.vvvmvl" => "__builtin_ve_vl_vdivul_vvvmvl",
-    "llvm.ve.vl.vdivul.vvvvl" => "__builtin_ve_vl_vdivul_vvvvl",
-    "llvm.ve.vl.vdivuw.vsvl" => "__builtin_ve_vl_vdivuw_vsvl",
-    "llvm.ve.vl.vdivuw.vsvmvl" => "__builtin_ve_vl_vdivuw_vsvmvl",
-    "llvm.ve.vl.vdivuw.vsvvl" => "__builtin_ve_vl_vdivuw_vsvvl",
-    "llvm.ve.vl.vdivuw.vvsl" => "__builtin_ve_vl_vdivuw_vvsl",
-    "llvm.ve.vl.vdivuw.vvsmvl" => "__builtin_ve_vl_vdivuw_vvsmvl",
-    "llvm.ve.vl.vdivuw.vvsvl" => "__builtin_ve_vl_vdivuw_vvsvl",
-    "llvm.ve.vl.vdivuw.vvvl" => "__builtin_ve_vl_vdivuw_vvvl",
-    "llvm.ve.vl.vdivuw.vvvmvl" => "__builtin_ve_vl_vdivuw_vvvmvl",
-    "llvm.ve.vl.vdivuw.vvvvl" => "__builtin_ve_vl_vdivuw_vvvvl",
-    "llvm.ve.vl.veqv.vsvl" => "__builtin_ve_vl_veqv_vsvl",
-    "llvm.ve.vl.veqv.vsvmvl" => "__builtin_ve_vl_veqv_vsvmvl",
-    "llvm.ve.vl.veqv.vsvvl" => "__builtin_ve_vl_veqv_vsvvl",
-    "llvm.ve.vl.veqv.vvvl" => "__builtin_ve_vl_veqv_vvvl",
-    "llvm.ve.vl.veqv.vvvmvl" => "__builtin_ve_vl_veqv_vvvmvl",
-    "llvm.ve.vl.veqv.vvvvl" => "__builtin_ve_vl_veqv_vvvvl",
-    "llvm.ve.vl.vex.vvmvl" => "__builtin_ve_vl_vex_vvmvl",
-    "llvm.ve.vl.vfaddd.vsvl" => "__builtin_ve_vl_vfaddd_vsvl",
-    "llvm.ve.vl.vfaddd.vsvmvl" => "__builtin_ve_vl_vfaddd_vsvmvl",
-    "llvm.ve.vl.vfaddd.vsvvl" => "__builtin_ve_vl_vfaddd_vsvvl",
-    "llvm.ve.vl.vfaddd.vvvl" => "__builtin_ve_vl_vfaddd_vvvl",
-    "llvm.ve.vl.vfaddd.vvvmvl" => "__builtin_ve_vl_vfaddd_vvvmvl",
-    "llvm.ve.vl.vfaddd.vvvvl" => "__builtin_ve_vl_vfaddd_vvvvl",
-    "llvm.ve.vl.vfadds.vsvl" => "__builtin_ve_vl_vfadds_vsvl",
-    "llvm.ve.vl.vfadds.vsvmvl" => "__builtin_ve_vl_vfadds_vsvmvl",
-    "llvm.ve.vl.vfadds.vsvvl" => "__builtin_ve_vl_vfadds_vsvvl",
-    "llvm.ve.vl.vfadds.vvvl" => "__builtin_ve_vl_vfadds_vvvl",
-    "llvm.ve.vl.vfadds.vvvmvl" => "__builtin_ve_vl_vfadds_vvvmvl",
-    "llvm.ve.vl.vfadds.vvvvl" => "__builtin_ve_vl_vfadds_vvvvl",
-    "llvm.ve.vl.vfcmpd.vsvl" => "__builtin_ve_vl_vfcmpd_vsvl",
-    "llvm.ve.vl.vfcmpd.vsvmvl" => "__builtin_ve_vl_vfcmpd_vsvmvl",
-    "llvm.ve.vl.vfcmpd.vsvvl" => "__builtin_ve_vl_vfcmpd_vsvvl",
-    "llvm.ve.vl.vfcmpd.vvvl" => "__builtin_ve_vl_vfcmpd_vvvl",
-    "llvm.ve.vl.vfcmpd.vvvmvl" => "__builtin_ve_vl_vfcmpd_vvvmvl",
-    "llvm.ve.vl.vfcmpd.vvvvl" => "__builtin_ve_vl_vfcmpd_vvvvl",
-    "llvm.ve.vl.vfcmps.vsvl" => "__builtin_ve_vl_vfcmps_vsvl",
-    "llvm.ve.vl.vfcmps.vsvmvl" => "__builtin_ve_vl_vfcmps_vsvmvl",
-    "llvm.ve.vl.vfcmps.vsvvl" => "__builtin_ve_vl_vfcmps_vsvvl",
-    "llvm.ve.vl.vfcmps.vvvl" => "__builtin_ve_vl_vfcmps_vvvl",
-    "llvm.ve.vl.vfcmps.vvvmvl" => "__builtin_ve_vl_vfcmps_vvvmvl",
-    "llvm.ve.vl.vfcmps.vvvvl" => "__builtin_ve_vl_vfcmps_vvvvl",
-    "llvm.ve.vl.vfdivd.vsvl" => "__builtin_ve_vl_vfdivd_vsvl",
-    "llvm.ve.vl.vfdivd.vsvmvl" => "__builtin_ve_vl_vfdivd_vsvmvl",
-    "llvm.ve.vl.vfdivd.vsvvl" => "__builtin_ve_vl_vfdivd_vsvvl",
-    "llvm.ve.vl.vfdivd.vvvl" => "__builtin_ve_vl_vfdivd_vvvl",
-    "llvm.ve.vl.vfdivd.vvvmvl" => "__builtin_ve_vl_vfdivd_vvvmvl",
-    "llvm.ve.vl.vfdivd.vvvvl" => "__builtin_ve_vl_vfdivd_vvvvl",
-    "llvm.ve.vl.vfdivs.vsvl" => "__builtin_ve_vl_vfdivs_vsvl",
-    "llvm.ve.vl.vfdivs.vsvmvl" => "__builtin_ve_vl_vfdivs_vsvmvl",
-    "llvm.ve.vl.vfdivs.vsvvl" => "__builtin_ve_vl_vfdivs_vsvvl",
-    "llvm.ve.vl.vfdivs.vvvl" => "__builtin_ve_vl_vfdivs_vvvl",
-    "llvm.ve.vl.vfdivs.vvvmvl" => "__builtin_ve_vl_vfdivs_vvvmvl",
-    "llvm.ve.vl.vfdivs.vvvvl" => "__builtin_ve_vl_vfdivs_vvvvl",
-    "llvm.ve.vl.vfmadd.vsvvl" => "__builtin_ve_vl_vfmadd_vsvvl",
-    "llvm.ve.vl.vfmadd.vsvvmvl" => "__builtin_ve_vl_vfmadd_vsvvmvl",
-    "llvm.ve.vl.vfmadd.vsvvvl" => "__builtin_ve_vl_vfmadd_vsvvvl",
-    "llvm.ve.vl.vfmadd.vvsvl" => "__builtin_ve_vl_vfmadd_vvsvl",
-    "llvm.ve.vl.vfmadd.vvsvmvl" => "__builtin_ve_vl_vfmadd_vvsvmvl",
-    "llvm.ve.vl.vfmadd.vvsvvl" => "__builtin_ve_vl_vfmadd_vvsvvl",
-    "llvm.ve.vl.vfmadd.vvvvl" => "__builtin_ve_vl_vfmadd_vvvvl",
-    "llvm.ve.vl.vfmadd.vvvvmvl" => "__builtin_ve_vl_vfmadd_vvvvmvl",
-    "llvm.ve.vl.vfmadd.vvvvvl" => "__builtin_ve_vl_vfmadd_vvvvvl",
-    "llvm.ve.vl.vfmads.vsvvl" => "__builtin_ve_vl_vfmads_vsvvl",
-    "llvm.ve.vl.vfmads.vsvvmvl" => "__builtin_ve_vl_vfmads_vsvvmvl",
-    "llvm.ve.vl.vfmads.vsvvvl" => "__builtin_ve_vl_vfmads_vsvvvl",
-    "llvm.ve.vl.vfmads.vvsvl" => "__builtin_ve_vl_vfmads_vvsvl",
-    "llvm.ve.vl.vfmads.vvsvmvl" => "__builtin_ve_vl_vfmads_vvsvmvl",
-    "llvm.ve.vl.vfmads.vvsvvl" => "__builtin_ve_vl_vfmads_vvsvvl",
-    "llvm.ve.vl.vfmads.vvvvl" => "__builtin_ve_vl_vfmads_vvvvl",
-    "llvm.ve.vl.vfmads.vvvvmvl" => "__builtin_ve_vl_vfmads_vvvvmvl",
-    "llvm.ve.vl.vfmads.vvvvvl" => "__builtin_ve_vl_vfmads_vvvvvl",
-    "llvm.ve.vl.vfmaxd.vsvl" => "__builtin_ve_vl_vfmaxd_vsvl",
-    "llvm.ve.vl.vfmaxd.vsvmvl" => "__builtin_ve_vl_vfmaxd_vsvmvl",
-    "llvm.ve.vl.vfmaxd.vsvvl" => "__builtin_ve_vl_vfmaxd_vsvvl",
-    "llvm.ve.vl.vfmaxd.vvvl" => "__builtin_ve_vl_vfmaxd_vvvl",
-    "llvm.ve.vl.vfmaxd.vvvmvl" => "__builtin_ve_vl_vfmaxd_vvvmvl",
-    "llvm.ve.vl.vfmaxd.vvvvl" => "__builtin_ve_vl_vfmaxd_vvvvl",
-    "llvm.ve.vl.vfmaxs.vsvl" => "__builtin_ve_vl_vfmaxs_vsvl",
-    "llvm.ve.vl.vfmaxs.vsvmvl" => "__builtin_ve_vl_vfmaxs_vsvmvl",
-    "llvm.ve.vl.vfmaxs.vsvvl" => "__builtin_ve_vl_vfmaxs_vsvvl",
-    "llvm.ve.vl.vfmaxs.vvvl" => "__builtin_ve_vl_vfmaxs_vvvl",
-    "llvm.ve.vl.vfmaxs.vvvmvl" => "__builtin_ve_vl_vfmaxs_vvvmvl",
-    "llvm.ve.vl.vfmaxs.vvvvl" => "__builtin_ve_vl_vfmaxs_vvvvl",
-    "llvm.ve.vl.vfmind.vsvl" => "__builtin_ve_vl_vfmind_vsvl",
-    "llvm.ve.vl.vfmind.vsvmvl" => "__builtin_ve_vl_vfmind_vsvmvl",
-    "llvm.ve.vl.vfmind.vsvvl" => "__builtin_ve_vl_vfmind_vsvvl",
-    "llvm.ve.vl.vfmind.vvvl" => "__builtin_ve_vl_vfmind_vvvl",
-    "llvm.ve.vl.vfmind.vvvmvl" => "__builtin_ve_vl_vfmind_vvvmvl",
-    "llvm.ve.vl.vfmind.vvvvl" => "__builtin_ve_vl_vfmind_vvvvl",
-    "llvm.ve.vl.vfmins.vsvl" => "__builtin_ve_vl_vfmins_vsvl",
-    "llvm.ve.vl.vfmins.vsvmvl" => "__builtin_ve_vl_vfmins_vsvmvl",
-    "llvm.ve.vl.vfmins.vsvvl" => "__builtin_ve_vl_vfmins_vsvvl",
-    "llvm.ve.vl.vfmins.vvvl" => "__builtin_ve_vl_vfmins_vvvl",
-    "llvm.ve.vl.vfmins.vvvmvl" => "__builtin_ve_vl_vfmins_vvvmvl",
-    "llvm.ve.vl.vfmins.vvvvl" => "__builtin_ve_vl_vfmins_vvvvl",
-    "llvm.ve.vl.vfmkdeq.mvl" => "__builtin_ve_vl_vfmkdeq_mvl",
-    "llvm.ve.vl.vfmkdeq.mvml" => "__builtin_ve_vl_vfmkdeq_mvml",
-    "llvm.ve.vl.vfmkdeqnan.mvl" => "__builtin_ve_vl_vfmkdeqnan_mvl",
-    "llvm.ve.vl.vfmkdeqnan.mvml" => "__builtin_ve_vl_vfmkdeqnan_mvml",
-    "llvm.ve.vl.vfmkdge.mvl" => "__builtin_ve_vl_vfmkdge_mvl",
-    "llvm.ve.vl.vfmkdge.mvml" => "__builtin_ve_vl_vfmkdge_mvml",
-    "llvm.ve.vl.vfmkdgenan.mvl" => "__builtin_ve_vl_vfmkdgenan_mvl",
-    "llvm.ve.vl.vfmkdgenan.mvml" => "__builtin_ve_vl_vfmkdgenan_mvml",
-    "llvm.ve.vl.vfmkdgt.mvl" => "__builtin_ve_vl_vfmkdgt_mvl",
-    "llvm.ve.vl.vfmkdgt.mvml" => "__builtin_ve_vl_vfmkdgt_mvml",
-    "llvm.ve.vl.vfmkdgtnan.mvl" => "__builtin_ve_vl_vfmkdgtnan_mvl",
-    "llvm.ve.vl.vfmkdgtnan.mvml" => "__builtin_ve_vl_vfmkdgtnan_mvml",
-    "llvm.ve.vl.vfmkdle.mvl" => "__builtin_ve_vl_vfmkdle_mvl",
-    "llvm.ve.vl.vfmkdle.mvml" => "__builtin_ve_vl_vfmkdle_mvml",
-    "llvm.ve.vl.vfmkdlenan.mvl" => "__builtin_ve_vl_vfmkdlenan_mvl",
-    "llvm.ve.vl.vfmkdlenan.mvml" => "__builtin_ve_vl_vfmkdlenan_mvml",
-    "llvm.ve.vl.vfmkdlt.mvl" => "__builtin_ve_vl_vfmkdlt_mvl",
-    "llvm.ve.vl.vfmkdlt.mvml" => "__builtin_ve_vl_vfmkdlt_mvml",
-    "llvm.ve.vl.vfmkdltnan.mvl" => "__builtin_ve_vl_vfmkdltnan_mvl",
-    "llvm.ve.vl.vfmkdltnan.mvml" => "__builtin_ve_vl_vfmkdltnan_mvml",
-    "llvm.ve.vl.vfmkdnan.mvl" => "__builtin_ve_vl_vfmkdnan_mvl",
-    "llvm.ve.vl.vfmkdnan.mvml" => "__builtin_ve_vl_vfmkdnan_mvml",
-    "llvm.ve.vl.vfmkdne.mvl" => "__builtin_ve_vl_vfmkdne_mvl",
-    "llvm.ve.vl.vfmkdne.mvml" => "__builtin_ve_vl_vfmkdne_mvml",
-    "llvm.ve.vl.vfmkdnenan.mvl" => "__builtin_ve_vl_vfmkdnenan_mvl",
-    "llvm.ve.vl.vfmkdnenan.mvml" => "__builtin_ve_vl_vfmkdnenan_mvml",
-    "llvm.ve.vl.vfmkdnum.mvl" => "__builtin_ve_vl_vfmkdnum_mvl",
-    "llvm.ve.vl.vfmkdnum.mvml" => "__builtin_ve_vl_vfmkdnum_mvml",
-    "llvm.ve.vl.vfmklaf.ml" => "__builtin_ve_vl_vfmklaf_ml",
-    "llvm.ve.vl.vfmklat.ml" => "__builtin_ve_vl_vfmklat_ml",
-    "llvm.ve.vl.vfmkleq.mvl" => "__builtin_ve_vl_vfmkleq_mvl",
-    "llvm.ve.vl.vfmkleq.mvml" => "__builtin_ve_vl_vfmkleq_mvml",
-    "llvm.ve.vl.vfmkleqnan.mvl" => "__builtin_ve_vl_vfmkleqnan_mvl",
-    "llvm.ve.vl.vfmkleqnan.mvml" => "__builtin_ve_vl_vfmkleqnan_mvml",
-    "llvm.ve.vl.vfmklge.mvl" => "__builtin_ve_vl_vfmklge_mvl",
-    "llvm.ve.vl.vfmklge.mvml" => "__builtin_ve_vl_vfmklge_mvml",
-    "llvm.ve.vl.vfmklgenan.mvl" => "__builtin_ve_vl_vfmklgenan_mvl",
-    "llvm.ve.vl.vfmklgenan.mvml" => "__builtin_ve_vl_vfmklgenan_mvml",
-    "llvm.ve.vl.vfmklgt.mvl" => "__builtin_ve_vl_vfmklgt_mvl",
-    "llvm.ve.vl.vfmklgt.mvml" => "__builtin_ve_vl_vfmklgt_mvml",
-    "llvm.ve.vl.vfmklgtnan.mvl" => "__builtin_ve_vl_vfmklgtnan_mvl",
-    "llvm.ve.vl.vfmklgtnan.mvml" => "__builtin_ve_vl_vfmklgtnan_mvml",
-    "llvm.ve.vl.vfmklle.mvl" => "__builtin_ve_vl_vfmklle_mvl",
-    "llvm.ve.vl.vfmklle.mvml" => "__builtin_ve_vl_vfmklle_mvml",
-    "llvm.ve.vl.vfmkllenan.mvl" => "__builtin_ve_vl_vfmkllenan_mvl",
-    "llvm.ve.vl.vfmkllenan.mvml" => "__builtin_ve_vl_vfmkllenan_mvml",
-    "llvm.ve.vl.vfmkllt.mvl" => "__builtin_ve_vl_vfmkllt_mvl",
-    "llvm.ve.vl.vfmkllt.mvml" => "__builtin_ve_vl_vfmkllt_mvml",
-    "llvm.ve.vl.vfmklltnan.mvl" => "__builtin_ve_vl_vfmklltnan_mvl",
-    "llvm.ve.vl.vfmklltnan.mvml" => "__builtin_ve_vl_vfmklltnan_mvml",
-    "llvm.ve.vl.vfmklnan.mvl" => "__builtin_ve_vl_vfmklnan_mvl",
-    "llvm.ve.vl.vfmklnan.mvml" => "__builtin_ve_vl_vfmklnan_mvml",
-    "llvm.ve.vl.vfmklne.mvl" => "__builtin_ve_vl_vfmklne_mvl",
-    "llvm.ve.vl.vfmklne.mvml" => "__builtin_ve_vl_vfmklne_mvml",
-    "llvm.ve.vl.vfmklnenan.mvl" => "__builtin_ve_vl_vfmklnenan_mvl",
-    "llvm.ve.vl.vfmklnenan.mvml" => "__builtin_ve_vl_vfmklnenan_mvml",
-    "llvm.ve.vl.vfmklnum.mvl" => "__builtin_ve_vl_vfmklnum_mvl",
-    "llvm.ve.vl.vfmklnum.mvml" => "__builtin_ve_vl_vfmklnum_mvml",
-    "llvm.ve.vl.vfmkseq.mvl" => "__builtin_ve_vl_vfmkseq_mvl",
-    "llvm.ve.vl.vfmkseq.mvml" => "__builtin_ve_vl_vfmkseq_mvml",
-    "llvm.ve.vl.vfmkseqnan.mvl" => "__builtin_ve_vl_vfmkseqnan_mvl",
-    "llvm.ve.vl.vfmkseqnan.mvml" => "__builtin_ve_vl_vfmkseqnan_mvml",
-    "llvm.ve.vl.vfmksge.mvl" => "__builtin_ve_vl_vfmksge_mvl",
-    "llvm.ve.vl.vfmksge.mvml" => "__builtin_ve_vl_vfmksge_mvml",
-    "llvm.ve.vl.vfmksgenan.mvl" => "__builtin_ve_vl_vfmksgenan_mvl",
-    "llvm.ve.vl.vfmksgenan.mvml" => "__builtin_ve_vl_vfmksgenan_mvml",
-    "llvm.ve.vl.vfmksgt.mvl" => "__builtin_ve_vl_vfmksgt_mvl",
-    "llvm.ve.vl.vfmksgt.mvml" => "__builtin_ve_vl_vfmksgt_mvml",
-    "llvm.ve.vl.vfmksgtnan.mvl" => "__builtin_ve_vl_vfmksgtnan_mvl",
-    "llvm.ve.vl.vfmksgtnan.mvml" => "__builtin_ve_vl_vfmksgtnan_mvml",
-    "llvm.ve.vl.vfmksle.mvl" => "__builtin_ve_vl_vfmksle_mvl",
-    "llvm.ve.vl.vfmksle.mvml" => "__builtin_ve_vl_vfmksle_mvml",
-    "llvm.ve.vl.vfmkslenan.mvl" => "__builtin_ve_vl_vfmkslenan_mvl",
-    "llvm.ve.vl.vfmkslenan.mvml" => "__builtin_ve_vl_vfmkslenan_mvml",
-    "llvm.ve.vl.vfmkslt.mvl" => "__builtin_ve_vl_vfmkslt_mvl",
-    "llvm.ve.vl.vfmkslt.mvml" => "__builtin_ve_vl_vfmkslt_mvml",
-    "llvm.ve.vl.vfmksltnan.mvl" => "__builtin_ve_vl_vfmksltnan_mvl",
-    "llvm.ve.vl.vfmksltnan.mvml" => "__builtin_ve_vl_vfmksltnan_mvml",
-    "llvm.ve.vl.vfmksnan.mvl" => "__builtin_ve_vl_vfmksnan_mvl",
-    "llvm.ve.vl.vfmksnan.mvml" => "__builtin_ve_vl_vfmksnan_mvml",
-    "llvm.ve.vl.vfmksne.mvl" => "__builtin_ve_vl_vfmksne_mvl",
-    "llvm.ve.vl.vfmksne.mvml" => "__builtin_ve_vl_vfmksne_mvml",
-    "llvm.ve.vl.vfmksnenan.mvl" => "__builtin_ve_vl_vfmksnenan_mvl",
-    "llvm.ve.vl.vfmksnenan.mvml" => "__builtin_ve_vl_vfmksnenan_mvml",
-    "llvm.ve.vl.vfmksnum.mvl" => "__builtin_ve_vl_vfmksnum_mvl",
-    "llvm.ve.vl.vfmksnum.mvml" => "__builtin_ve_vl_vfmksnum_mvml",
-    "llvm.ve.vl.vfmkweq.mvl" => "__builtin_ve_vl_vfmkweq_mvl",
-    "llvm.ve.vl.vfmkweq.mvml" => "__builtin_ve_vl_vfmkweq_mvml",
-    "llvm.ve.vl.vfmkweqnan.mvl" => "__builtin_ve_vl_vfmkweqnan_mvl",
-    "llvm.ve.vl.vfmkweqnan.mvml" => "__builtin_ve_vl_vfmkweqnan_mvml",
-    "llvm.ve.vl.vfmkwge.mvl" => "__builtin_ve_vl_vfmkwge_mvl",
-    "llvm.ve.vl.vfmkwge.mvml" => "__builtin_ve_vl_vfmkwge_mvml",
-    "llvm.ve.vl.vfmkwgenan.mvl" => "__builtin_ve_vl_vfmkwgenan_mvl",
-    "llvm.ve.vl.vfmkwgenan.mvml" => "__builtin_ve_vl_vfmkwgenan_mvml",
-    "llvm.ve.vl.vfmkwgt.mvl" => "__builtin_ve_vl_vfmkwgt_mvl",
-    "llvm.ve.vl.vfmkwgt.mvml" => "__builtin_ve_vl_vfmkwgt_mvml",
-    "llvm.ve.vl.vfmkwgtnan.mvl" => "__builtin_ve_vl_vfmkwgtnan_mvl",
-    "llvm.ve.vl.vfmkwgtnan.mvml" => "__builtin_ve_vl_vfmkwgtnan_mvml",
-    "llvm.ve.vl.vfmkwle.mvl" => "__builtin_ve_vl_vfmkwle_mvl",
-    "llvm.ve.vl.vfmkwle.mvml" => "__builtin_ve_vl_vfmkwle_mvml",
-    "llvm.ve.vl.vfmkwlenan.mvl" => "__builtin_ve_vl_vfmkwlenan_mvl",
-    "llvm.ve.vl.vfmkwlenan.mvml" => "__builtin_ve_vl_vfmkwlenan_mvml",
-    "llvm.ve.vl.vfmkwlt.mvl" => "__builtin_ve_vl_vfmkwlt_mvl",
-    "llvm.ve.vl.vfmkwlt.mvml" => "__builtin_ve_vl_vfmkwlt_mvml",
-    "llvm.ve.vl.vfmkwltnan.mvl" => "__builtin_ve_vl_vfmkwltnan_mvl",
-    "llvm.ve.vl.vfmkwltnan.mvml" => "__builtin_ve_vl_vfmkwltnan_mvml",
-    "llvm.ve.vl.vfmkwnan.mvl" => "__builtin_ve_vl_vfmkwnan_mvl",
-    "llvm.ve.vl.vfmkwnan.mvml" => "__builtin_ve_vl_vfmkwnan_mvml",
-    "llvm.ve.vl.vfmkwne.mvl" => "__builtin_ve_vl_vfmkwne_mvl",
-    "llvm.ve.vl.vfmkwne.mvml" => "__builtin_ve_vl_vfmkwne_mvml",
-    "llvm.ve.vl.vfmkwnenan.mvl" => "__builtin_ve_vl_vfmkwnenan_mvl",
-    "llvm.ve.vl.vfmkwnenan.mvml" => "__builtin_ve_vl_vfmkwnenan_mvml",
-    "llvm.ve.vl.vfmkwnum.mvl" => "__builtin_ve_vl_vfmkwnum_mvl",
-    "llvm.ve.vl.vfmkwnum.mvml" => "__builtin_ve_vl_vfmkwnum_mvml",
-    "llvm.ve.vl.vfmsbd.vsvvl" => "__builtin_ve_vl_vfmsbd_vsvvl",
-    "llvm.ve.vl.vfmsbd.vsvvmvl" => "__builtin_ve_vl_vfmsbd_vsvvmvl",
-    "llvm.ve.vl.vfmsbd.vsvvvl" => "__builtin_ve_vl_vfmsbd_vsvvvl",
-    "llvm.ve.vl.vfmsbd.vvsvl" => "__builtin_ve_vl_vfmsbd_vvsvl",
-    "llvm.ve.vl.vfmsbd.vvsvmvl" => "__builtin_ve_vl_vfmsbd_vvsvmvl",
-    "llvm.ve.vl.vfmsbd.vvsvvl" => "__builtin_ve_vl_vfmsbd_vvsvvl",
-    "llvm.ve.vl.vfmsbd.vvvvl" => "__builtin_ve_vl_vfmsbd_vvvvl",
-    "llvm.ve.vl.vfmsbd.vvvvmvl" => "__builtin_ve_vl_vfmsbd_vvvvmvl",
-    "llvm.ve.vl.vfmsbd.vvvvvl" => "__builtin_ve_vl_vfmsbd_vvvvvl",
-    "llvm.ve.vl.vfmsbs.vsvvl" => "__builtin_ve_vl_vfmsbs_vsvvl",
-    "llvm.ve.vl.vfmsbs.vsvvmvl" => "__builtin_ve_vl_vfmsbs_vsvvmvl",
-    "llvm.ve.vl.vfmsbs.vsvvvl" => "__builtin_ve_vl_vfmsbs_vsvvvl",
-    "llvm.ve.vl.vfmsbs.vvsvl" => "__builtin_ve_vl_vfmsbs_vvsvl",
-    "llvm.ve.vl.vfmsbs.vvsvmvl" => "__builtin_ve_vl_vfmsbs_vvsvmvl",
-    "llvm.ve.vl.vfmsbs.vvsvvl" => "__builtin_ve_vl_vfmsbs_vvsvvl",
-    "llvm.ve.vl.vfmsbs.vvvvl" => "__builtin_ve_vl_vfmsbs_vvvvl",
-    "llvm.ve.vl.vfmsbs.vvvvmvl" => "__builtin_ve_vl_vfmsbs_vvvvmvl",
-    "llvm.ve.vl.vfmsbs.vvvvvl" => "__builtin_ve_vl_vfmsbs_vvvvvl",
-    "llvm.ve.vl.vfmuld.vsvl" => "__builtin_ve_vl_vfmuld_vsvl",
-    "llvm.ve.vl.vfmuld.vsvmvl" => "__builtin_ve_vl_vfmuld_vsvmvl",
-    "llvm.ve.vl.vfmuld.vsvvl" => "__builtin_ve_vl_vfmuld_vsvvl",
-    "llvm.ve.vl.vfmuld.vvvl" => "__builtin_ve_vl_vfmuld_vvvl",
-    "llvm.ve.vl.vfmuld.vvvmvl" => "__builtin_ve_vl_vfmuld_vvvmvl",
-    "llvm.ve.vl.vfmuld.vvvvl" => "__builtin_ve_vl_vfmuld_vvvvl",
-    "llvm.ve.vl.vfmuls.vsvl" => "__builtin_ve_vl_vfmuls_vsvl",
-    "llvm.ve.vl.vfmuls.vsvmvl" => "__builtin_ve_vl_vfmuls_vsvmvl",
-    "llvm.ve.vl.vfmuls.vsvvl" => "__builtin_ve_vl_vfmuls_vsvvl",
-    "llvm.ve.vl.vfmuls.vvvl" => "__builtin_ve_vl_vfmuls_vvvl",
-    "llvm.ve.vl.vfmuls.vvvmvl" => "__builtin_ve_vl_vfmuls_vvvmvl",
-    "llvm.ve.vl.vfmuls.vvvvl" => "__builtin_ve_vl_vfmuls_vvvvl",
-    "llvm.ve.vl.vfnmadd.vsvvl" => "__builtin_ve_vl_vfnmadd_vsvvl",
-    "llvm.ve.vl.vfnmadd.vsvvmvl" => "__builtin_ve_vl_vfnmadd_vsvvmvl",
-    "llvm.ve.vl.vfnmadd.vsvvvl" => "__builtin_ve_vl_vfnmadd_vsvvvl",
-    "llvm.ve.vl.vfnmadd.vvsvl" => "__builtin_ve_vl_vfnmadd_vvsvl",
-    "llvm.ve.vl.vfnmadd.vvsvmvl" => "__builtin_ve_vl_vfnmadd_vvsvmvl",
-    "llvm.ve.vl.vfnmadd.vvsvvl" => "__builtin_ve_vl_vfnmadd_vvsvvl",
-    "llvm.ve.vl.vfnmadd.vvvvl" => "__builtin_ve_vl_vfnmadd_vvvvl",
-    "llvm.ve.vl.vfnmadd.vvvvmvl" => "__builtin_ve_vl_vfnmadd_vvvvmvl",
-    "llvm.ve.vl.vfnmadd.vvvvvl" => "__builtin_ve_vl_vfnmadd_vvvvvl",
-    "llvm.ve.vl.vfnmads.vsvvl" => "__builtin_ve_vl_vfnmads_vsvvl",
-    "llvm.ve.vl.vfnmads.vsvvmvl" => "__builtin_ve_vl_vfnmads_vsvvmvl",
-    "llvm.ve.vl.vfnmads.vsvvvl" => "__builtin_ve_vl_vfnmads_vsvvvl",
-    "llvm.ve.vl.vfnmads.vvsvl" => "__builtin_ve_vl_vfnmads_vvsvl",
-    "llvm.ve.vl.vfnmads.vvsvmvl" => "__builtin_ve_vl_vfnmads_vvsvmvl",
-    "llvm.ve.vl.vfnmads.vvsvvl" => "__builtin_ve_vl_vfnmads_vvsvvl",
-    "llvm.ve.vl.vfnmads.vvvvl" => "__builtin_ve_vl_vfnmads_vvvvl",
-    "llvm.ve.vl.vfnmads.vvvvmvl" => "__builtin_ve_vl_vfnmads_vvvvmvl",
-    "llvm.ve.vl.vfnmads.vvvvvl" => "__builtin_ve_vl_vfnmads_vvvvvl",
-    "llvm.ve.vl.vfnmsbd.vsvvl" => "__builtin_ve_vl_vfnmsbd_vsvvl",
-    "llvm.ve.vl.vfnmsbd.vsvvmvl" => "__builtin_ve_vl_vfnmsbd_vsvvmvl",
-    "llvm.ve.vl.vfnmsbd.vsvvvl" => "__builtin_ve_vl_vfnmsbd_vsvvvl",
-    "llvm.ve.vl.vfnmsbd.vvsvl" => "__builtin_ve_vl_vfnmsbd_vvsvl",
-    "llvm.ve.vl.vfnmsbd.vvsvmvl" => "__builtin_ve_vl_vfnmsbd_vvsvmvl",
-    "llvm.ve.vl.vfnmsbd.vvsvvl" => "__builtin_ve_vl_vfnmsbd_vvsvvl",
-    "llvm.ve.vl.vfnmsbd.vvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvl",
-    "llvm.ve.vl.vfnmsbd.vvvvmvl" => "__builtin_ve_vl_vfnmsbd_vvvvmvl",
-    "llvm.ve.vl.vfnmsbd.vvvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvvl",
-    "llvm.ve.vl.vfnmsbs.vsvvl" => "__builtin_ve_vl_vfnmsbs_vsvvl",
-    "llvm.ve.vl.vfnmsbs.vsvvmvl" => "__builtin_ve_vl_vfnmsbs_vsvvmvl",
-    "llvm.ve.vl.vfnmsbs.vsvvvl" => "__builtin_ve_vl_vfnmsbs_vsvvvl",
-    "llvm.ve.vl.vfnmsbs.vvsvl" => "__builtin_ve_vl_vfnmsbs_vvsvl",
-    "llvm.ve.vl.vfnmsbs.vvsvmvl" => "__builtin_ve_vl_vfnmsbs_vvsvmvl",
-    "llvm.ve.vl.vfnmsbs.vvsvvl" => "__builtin_ve_vl_vfnmsbs_vvsvvl",
-    "llvm.ve.vl.vfnmsbs.vvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvl",
-    "llvm.ve.vl.vfnmsbs.vvvvmvl" => "__builtin_ve_vl_vfnmsbs_vvvvmvl",
-    "llvm.ve.vl.vfnmsbs.vvvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvvl",
-    "llvm.ve.vl.vfrmaxdfst.vvl" => "__builtin_ve_vl_vfrmaxdfst_vvl",
-    "llvm.ve.vl.vfrmaxdfst.vvvl" => "__builtin_ve_vl_vfrmaxdfst_vvvl",
-    "llvm.ve.vl.vfrmaxdlst.vvl" => "__builtin_ve_vl_vfrmaxdlst_vvl",
-    "llvm.ve.vl.vfrmaxdlst.vvvl" => "__builtin_ve_vl_vfrmaxdlst_vvvl",
-    "llvm.ve.vl.vfrmaxsfst.vvl" => "__builtin_ve_vl_vfrmaxsfst_vvl",
-    "llvm.ve.vl.vfrmaxsfst.vvvl" => "__builtin_ve_vl_vfrmaxsfst_vvvl",
-    "llvm.ve.vl.vfrmaxslst.vvl" => "__builtin_ve_vl_vfrmaxslst_vvl",
-    "llvm.ve.vl.vfrmaxslst.vvvl" => "__builtin_ve_vl_vfrmaxslst_vvvl",
-    "llvm.ve.vl.vfrmindfst.vvl" => "__builtin_ve_vl_vfrmindfst_vvl",
-    "llvm.ve.vl.vfrmindfst.vvvl" => "__builtin_ve_vl_vfrmindfst_vvvl",
-    "llvm.ve.vl.vfrmindlst.vvl" => "__builtin_ve_vl_vfrmindlst_vvl",
-    "llvm.ve.vl.vfrmindlst.vvvl" => "__builtin_ve_vl_vfrmindlst_vvvl",
-    "llvm.ve.vl.vfrminsfst.vvl" => "__builtin_ve_vl_vfrminsfst_vvl",
-    "llvm.ve.vl.vfrminsfst.vvvl" => "__builtin_ve_vl_vfrminsfst_vvvl",
-    "llvm.ve.vl.vfrminslst.vvl" => "__builtin_ve_vl_vfrminslst_vvl",
-    "llvm.ve.vl.vfrminslst.vvvl" => "__builtin_ve_vl_vfrminslst_vvvl",
-    "llvm.ve.vl.vfsqrtd.vvl" => "__builtin_ve_vl_vfsqrtd_vvl",
-    "llvm.ve.vl.vfsqrtd.vvvl" => "__builtin_ve_vl_vfsqrtd_vvvl",
-    "llvm.ve.vl.vfsqrts.vvl" => "__builtin_ve_vl_vfsqrts_vvl",
-    "llvm.ve.vl.vfsqrts.vvvl" => "__builtin_ve_vl_vfsqrts_vvvl",
-    "llvm.ve.vl.vfsubd.vsvl" => "__builtin_ve_vl_vfsubd_vsvl",
-    "llvm.ve.vl.vfsubd.vsvmvl" => "__builtin_ve_vl_vfsubd_vsvmvl",
-    "llvm.ve.vl.vfsubd.vsvvl" => "__builtin_ve_vl_vfsubd_vsvvl",
-    "llvm.ve.vl.vfsubd.vvvl" => "__builtin_ve_vl_vfsubd_vvvl",
-    "llvm.ve.vl.vfsubd.vvvmvl" => "__builtin_ve_vl_vfsubd_vvvmvl",
-    "llvm.ve.vl.vfsubd.vvvvl" => "__builtin_ve_vl_vfsubd_vvvvl",
-    "llvm.ve.vl.vfsubs.vsvl" => "__builtin_ve_vl_vfsubs_vsvl",
-    "llvm.ve.vl.vfsubs.vsvmvl" => "__builtin_ve_vl_vfsubs_vsvmvl",
-    "llvm.ve.vl.vfsubs.vsvvl" => "__builtin_ve_vl_vfsubs_vsvvl",
-    "llvm.ve.vl.vfsubs.vvvl" => "__builtin_ve_vl_vfsubs_vvvl",
-    "llvm.ve.vl.vfsubs.vvvmvl" => "__builtin_ve_vl_vfsubs_vvvmvl",
-    "llvm.ve.vl.vfsubs.vvvvl" => "__builtin_ve_vl_vfsubs_vvvvl",
-    "llvm.ve.vl.vfsumd.vvl" => "__builtin_ve_vl_vfsumd_vvl",
-    "llvm.ve.vl.vfsumd.vvml" => "__builtin_ve_vl_vfsumd_vvml",
-    "llvm.ve.vl.vfsums.vvl" => "__builtin_ve_vl_vfsums_vvl",
-    "llvm.ve.vl.vfsums.vvml" => "__builtin_ve_vl_vfsums_vvml",
-    "llvm.ve.vl.vgt.vvssl" => "__builtin_ve_vl_vgt_vvssl",
-    "llvm.ve.vl.vgt.vvssml" => "__builtin_ve_vl_vgt_vvssml",
-    "llvm.ve.vl.vgt.vvssmvl" => "__builtin_ve_vl_vgt_vvssmvl",
-    "llvm.ve.vl.vgt.vvssvl" => "__builtin_ve_vl_vgt_vvssvl",
-    "llvm.ve.vl.vgtlsx.vvssl" => "__builtin_ve_vl_vgtlsx_vvssl",
-    "llvm.ve.vl.vgtlsx.vvssml" => "__builtin_ve_vl_vgtlsx_vvssml",
-    "llvm.ve.vl.vgtlsx.vvssmvl" => "__builtin_ve_vl_vgtlsx_vvssmvl",
-    "llvm.ve.vl.vgtlsx.vvssvl" => "__builtin_ve_vl_vgtlsx_vvssvl",
-    "llvm.ve.vl.vgtlsxnc.vvssl" => "__builtin_ve_vl_vgtlsxnc_vvssl",
-    "llvm.ve.vl.vgtlsxnc.vvssml" => "__builtin_ve_vl_vgtlsxnc_vvssml",
-    "llvm.ve.vl.vgtlsxnc.vvssmvl" => "__builtin_ve_vl_vgtlsxnc_vvssmvl",
-    "llvm.ve.vl.vgtlsxnc.vvssvl" => "__builtin_ve_vl_vgtlsxnc_vvssvl",
-    "llvm.ve.vl.vgtlzx.vvssl" => "__builtin_ve_vl_vgtlzx_vvssl",
-    "llvm.ve.vl.vgtlzx.vvssml" => "__builtin_ve_vl_vgtlzx_vvssml",
-    "llvm.ve.vl.vgtlzx.vvssmvl" => "__builtin_ve_vl_vgtlzx_vvssmvl",
-    "llvm.ve.vl.vgtlzx.vvssvl" => "__builtin_ve_vl_vgtlzx_vvssvl",
-    "llvm.ve.vl.vgtlzxnc.vvssl" => "__builtin_ve_vl_vgtlzxnc_vvssl",
-    "llvm.ve.vl.vgtlzxnc.vvssml" => "__builtin_ve_vl_vgtlzxnc_vvssml",
-    "llvm.ve.vl.vgtlzxnc.vvssmvl" => "__builtin_ve_vl_vgtlzxnc_vvssmvl",
-    "llvm.ve.vl.vgtlzxnc.vvssvl" => "__builtin_ve_vl_vgtlzxnc_vvssvl",
-    "llvm.ve.vl.vgtnc.vvssl" => "__builtin_ve_vl_vgtnc_vvssl",
-    "llvm.ve.vl.vgtnc.vvssml" => "__builtin_ve_vl_vgtnc_vvssml",
-    "llvm.ve.vl.vgtnc.vvssmvl" => "__builtin_ve_vl_vgtnc_vvssmvl",
-    "llvm.ve.vl.vgtnc.vvssvl" => "__builtin_ve_vl_vgtnc_vvssvl",
-    "llvm.ve.vl.vgtu.vvssl" => "__builtin_ve_vl_vgtu_vvssl",
-    "llvm.ve.vl.vgtu.vvssml" => "__builtin_ve_vl_vgtu_vvssml",
-    "llvm.ve.vl.vgtu.vvssmvl" => "__builtin_ve_vl_vgtu_vvssmvl",
-    "llvm.ve.vl.vgtu.vvssvl" => "__builtin_ve_vl_vgtu_vvssvl",
-    "llvm.ve.vl.vgtunc.vvssl" => "__builtin_ve_vl_vgtunc_vvssl",
-    "llvm.ve.vl.vgtunc.vvssml" => "__builtin_ve_vl_vgtunc_vvssml",
-    "llvm.ve.vl.vgtunc.vvssmvl" => "__builtin_ve_vl_vgtunc_vvssmvl",
-    "llvm.ve.vl.vgtunc.vvssvl" => "__builtin_ve_vl_vgtunc_vvssvl",
-    "llvm.ve.vl.vld.vssl" => "__builtin_ve_vl_vld_vssl",
-    "llvm.ve.vl.vld.vssvl" => "__builtin_ve_vl_vld_vssvl",
-    "llvm.ve.vl.vld2d.vssl" => "__builtin_ve_vl_vld2d_vssl",
-    "llvm.ve.vl.vld2d.vssvl" => "__builtin_ve_vl_vld2d_vssvl",
-    "llvm.ve.vl.vld2dnc.vssl" => "__builtin_ve_vl_vld2dnc_vssl",
-    "llvm.ve.vl.vld2dnc.vssvl" => "__builtin_ve_vl_vld2dnc_vssvl",
-    "llvm.ve.vl.vldl2dsx.vssl" => "__builtin_ve_vl_vldl2dsx_vssl",
-    "llvm.ve.vl.vldl2dsx.vssvl" => "__builtin_ve_vl_vldl2dsx_vssvl",
-    "llvm.ve.vl.vldl2dsxnc.vssl" => "__builtin_ve_vl_vldl2dsxnc_vssl",
-    "llvm.ve.vl.vldl2dsxnc.vssvl" => "__builtin_ve_vl_vldl2dsxnc_vssvl",
-    "llvm.ve.vl.vldl2dzx.vssl" => "__builtin_ve_vl_vldl2dzx_vssl",
-    "llvm.ve.vl.vldl2dzx.vssvl" => "__builtin_ve_vl_vldl2dzx_vssvl",
-    "llvm.ve.vl.vldl2dzxnc.vssl" => "__builtin_ve_vl_vldl2dzxnc_vssl",
-    "llvm.ve.vl.vldl2dzxnc.vssvl" => "__builtin_ve_vl_vldl2dzxnc_vssvl",
-    "llvm.ve.vl.vldlsx.vssl" => "__builtin_ve_vl_vldlsx_vssl",
-    "llvm.ve.vl.vldlsx.vssvl" => "__builtin_ve_vl_vldlsx_vssvl",
-    "llvm.ve.vl.vldlsxnc.vssl" => "__builtin_ve_vl_vldlsxnc_vssl",
-    "llvm.ve.vl.vldlsxnc.vssvl" => "__builtin_ve_vl_vldlsxnc_vssvl",
-    "llvm.ve.vl.vldlzx.vssl" => "__builtin_ve_vl_vldlzx_vssl",
-    "llvm.ve.vl.vldlzx.vssvl" => "__builtin_ve_vl_vldlzx_vssvl",
-    "llvm.ve.vl.vldlzxnc.vssl" => "__builtin_ve_vl_vldlzxnc_vssl",
-    "llvm.ve.vl.vldlzxnc.vssvl" => "__builtin_ve_vl_vldlzxnc_vssvl",
-    "llvm.ve.vl.vldnc.vssl" => "__builtin_ve_vl_vldnc_vssl",
-    "llvm.ve.vl.vldnc.vssvl" => "__builtin_ve_vl_vldnc_vssvl",
-    "llvm.ve.vl.vldu.vssl" => "__builtin_ve_vl_vldu_vssl",
-    "llvm.ve.vl.vldu.vssvl" => "__builtin_ve_vl_vldu_vssvl",
-    "llvm.ve.vl.vldu2d.vssl" => "__builtin_ve_vl_vldu2d_vssl",
-    "llvm.ve.vl.vldu2d.vssvl" => "__builtin_ve_vl_vldu2d_vssvl",
-    "llvm.ve.vl.vldu2dnc.vssl" => "__builtin_ve_vl_vldu2dnc_vssl",
-    "llvm.ve.vl.vldu2dnc.vssvl" => "__builtin_ve_vl_vldu2dnc_vssvl",
-    "llvm.ve.vl.vldunc.vssl" => "__builtin_ve_vl_vldunc_vssl",
-    "llvm.ve.vl.vldunc.vssvl" => "__builtin_ve_vl_vldunc_vssvl",
-    "llvm.ve.vl.vldz.vvl" => "__builtin_ve_vl_vldz_vvl",
-    "llvm.ve.vl.vldz.vvmvl" => "__builtin_ve_vl_vldz_vvmvl",
-    "llvm.ve.vl.vldz.vvvl" => "__builtin_ve_vl_vldz_vvvl",
-    "llvm.ve.vl.vmaxsl.vsvl" => "__builtin_ve_vl_vmaxsl_vsvl",
-    "llvm.ve.vl.vmaxsl.vsvmvl" => "__builtin_ve_vl_vmaxsl_vsvmvl",
-    "llvm.ve.vl.vmaxsl.vsvvl" => "__builtin_ve_vl_vmaxsl_vsvvl",
-    "llvm.ve.vl.vmaxsl.vvvl" => "__builtin_ve_vl_vmaxsl_vvvl",
-    "llvm.ve.vl.vmaxsl.vvvmvl" => "__builtin_ve_vl_vmaxsl_vvvmvl",
-    "llvm.ve.vl.vmaxsl.vvvvl" => "__builtin_ve_vl_vmaxsl_vvvvl",
-    "llvm.ve.vl.vmaxswsx.vsvl" => "__builtin_ve_vl_vmaxswsx_vsvl",
-    "llvm.ve.vl.vmaxswsx.vsvmvl" => "__builtin_ve_vl_vmaxswsx_vsvmvl",
-    "llvm.ve.vl.vmaxswsx.vsvvl" => "__builtin_ve_vl_vmaxswsx_vsvvl",
-    "llvm.ve.vl.vmaxswsx.vvvl" => "__builtin_ve_vl_vmaxswsx_vvvl",
-    "llvm.ve.vl.vmaxswsx.vvvmvl" => "__builtin_ve_vl_vmaxswsx_vvvmvl",
-    "llvm.ve.vl.vmaxswsx.vvvvl" => "__builtin_ve_vl_vmaxswsx_vvvvl",
-    "llvm.ve.vl.vmaxswzx.vsvl" => "__builtin_ve_vl_vmaxswzx_vsvl",
-    "llvm.ve.vl.vmaxswzx.vsvmvl" => "__builtin_ve_vl_vmaxswzx_vsvmvl",
-    "llvm.ve.vl.vmaxswzx.vsvvl" => "__builtin_ve_vl_vmaxswzx_vsvvl",
-    "llvm.ve.vl.vmaxswzx.vvvl" => "__builtin_ve_vl_vmaxswzx_vvvl",
-    "llvm.ve.vl.vmaxswzx.vvvmvl" => "__builtin_ve_vl_vmaxswzx_vvvmvl",
-    "llvm.ve.vl.vmaxswzx.vvvvl" => "__builtin_ve_vl_vmaxswzx_vvvvl",
-    "llvm.ve.vl.vminsl.vsvl" => "__builtin_ve_vl_vminsl_vsvl",
-    "llvm.ve.vl.vminsl.vsvmvl" => "__builtin_ve_vl_vminsl_vsvmvl",
-    "llvm.ve.vl.vminsl.vsvvl" => "__builtin_ve_vl_vminsl_vsvvl",
-    "llvm.ve.vl.vminsl.vvvl" => "__builtin_ve_vl_vminsl_vvvl",
-    "llvm.ve.vl.vminsl.vvvmvl" => "__builtin_ve_vl_vminsl_vvvmvl",
-    "llvm.ve.vl.vminsl.vvvvl" => "__builtin_ve_vl_vminsl_vvvvl",
-    "llvm.ve.vl.vminswsx.vsvl" => "__builtin_ve_vl_vminswsx_vsvl",
-    "llvm.ve.vl.vminswsx.vsvmvl" => "__builtin_ve_vl_vminswsx_vsvmvl",
-    "llvm.ve.vl.vminswsx.vsvvl" => "__builtin_ve_vl_vminswsx_vsvvl",
-    "llvm.ve.vl.vminswsx.vvvl" => "__builtin_ve_vl_vminswsx_vvvl",
-    "llvm.ve.vl.vminswsx.vvvmvl" => "__builtin_ve_vl_vminswsx_vvvmvl",
-    "llvm.ve.vl.vminswsx.vvvvl" => "__builtin_ve_vl_vminswsx_vvvvl",
-    "llvm.ve.vl.vminswzx.vsvl" => "__builtin_ve_vl_vminswzx_vsvl",
-    "llvm.ve.vl.vminswzx.vsvmvl" => "__builtin_ve_vl_vminswzx_vsvmvl",
-    "llvm.ve.vl.vminswzx.vsvvl" => "__builtin_ve_vl_vminswzx_vsvvl",
-    "llvm.ve.vl.vminswzx.vvvl" => "__builtin_ve_vl_vminswzx_vvvl",
-    "llvm.ve.vl.vminswzx.vvvmvl" => "__builtin_ve_vl_vminswzx_vvvmvl",
-    "llvm.ve.vl.vminswzx.vvvvl" => "__builtin_ve_vl_vminswzx_vvvvl",
-    "llvm.ve.vl.vmrg.vsvml" => "__builtin_ve_vl_vmrg_vsvml",
-    "llvm.ve.vl.vmrg.vsvmvl" => "__builtin_ve_vl_vmrg_vsvmvl",
-    "llvm.ve.vl.vmrg.vvvml" => "__builtin_ve_vl_vmrg_vvvml",
-    "llvm.ve.vl.vmrg.vvvmvl" => "__builtin_ve_vl_vmrg_vvvmvl",
-    "llvm.ve.vl.vmrgw.vsvMl" => "__builtin_ve_vl_vmrgw_vsvMl",
-    "llvm.ve.vl.vmrgw.vsvMvl" => "__builtin_ve_vl_vmrgw_vsvMvl",
-    "llvm.ve.vl.vmrgw.vvvMl" => "__builtin_ve_vl_vmrgw_vvvMl",
-    "llvm.ve.vl.vmrgw.vvvMvl" => "__builtin_ve_vl_vmrgw_vvvMvl",
-    "llvm.ve.vl.vmulsl.vsvl" => "__builtin_ve_vl_vmulsl_vsvl",
-    "llvm.ve.vl.vmulsl.vsvmvl" => "__builtin_ve_vl_vmulsl_vsvmvl",
-    "llvm.ve.vl.vmulsl.vsvvl" => "__builtin_ve_vl_vmulsl_vsvvl",
-    "llvm.ve.vl.vmulsl.vvvl" => "__builtin_ve_vl_vmulsl_vvvl",
-    "llvm.ve.vl.vmulsl.vvvmvl" => "__builtin_ve_vl_vmulsl_vvvmvl",
-    "llvm.ve.vl.vmulsl.vvvvl" => "__builtin_ve_vl_vmulsl_vvvvl",
-    "llvm.ve.vl.vmulslw.vsvl" => "__builtin_ve_vl_vmulslw_vsvl",
-    "llvm.ve.vl.vmulslw.vsvvl" => "__builtin_ve_vl_vmulslw_vsvvl",
-    "llvm.ve.vl.vmulslw.vvvl" => "__builtin_ve_vl_vmulslw_vvvl",
-    "llvm.ve.vl.vmulslw.vvvvl" => "__builtin_ve_vl_vmulslw_vvvvl",
-    "llvm.ve.vl.vmulswsx.vsvl" => "__builtin_ve_vl_vmulswsx_vsvl",
-    "llvm.ve.vl.vmulswsx.vsvmvl" => "__builtin_ve_vl_vmulswsx_vsvmvl",
-    "llvm.ve.vl.vmulswsx.vsvvl" => "__builtin_ve_vl_vmulswsx_vsvvl",
-    "llvm.ve.vl.vmulswsx.vvvl" => "__builtin_ve_vl_vmulswsx_vvvl",
-    "llvm.ve.vl.vmulswsx.vvvmvl" => "__builtin_ve_vl_vmulswsx_vvvmvl",
-    "llvm.ve.vl.vmulswsx.vvvvl" => "__builtin_ve_vl_vmulswsx_vvvvl",
-    "llvm.ve.vl.vmulswzx.vsvl" => "__builtin_ve_vl_vmulswzx_vsvl",
-    "llvm.ve.vl.vmulswzx.vsvmvl" => "__builtin_ve_vl_vmulswzx_vsvmvl",
-    "llvm.ve.vl.vmulswzx.vsvvl" => "__builtin_ve_vl_vmulswzx_vsvvl",
-    "llvm.ve.vl.vmulswzx.vvvl" => "__builtin_ve_vl_vmulswzx_vvvl",
-    "llvm.ve.vl.vmulswzx.vvvmvl" => "__builtin_ve_vl_vmulswzx_vvvmvl",
-    "llvm.ve.vl.vmulswzx.vvvvl" => "__builtin_ve_vl_vmulswzx_vvvvl",
-    "llvm.ve.vl.vmulul.vsvl" => "__builtin_ve_vl_vmulul_vsvl",
-    "llvm.ve.vl.vmulul.vsvmvl" => "__builtin_ve_vl_vmulul_vsvmvl",
-    "llvm.ve.vl.vmulul.vsvvl" => "__builtin_ve_vl_vmulul_vsvvl",
-    "llvm.ve.vl.vmulul.vvvl" => "__builtin_ve_vl_vmulul_vvvl",
-    "llvm.ve.vl.vmulul.vvvmvl" => "__builtin_ve_vl_vmulul_vvvmvl",
-    "llvm.ve.vl.vmulul.vvvvl" => "__builtin_ve_vl_vmulul_vvvvl",
-    "llvm.ve.vl.vmuluw.vsvl" => "__builtin_ve_vl_vmuluw_vsvl",
-    "llvm.ve.vl.vmuluw.vsvmvl" => "__builtin_ve_vl_vmuluw_vsvmvl",
-    "llvm.ve.vl.vmuluw.vsvvl" => "__builtin_ve_vl_vmuluw_vsvvl",
-    "llvm.ve.vl.vmuluw.vvvl" => "__builtin_ve_vl_vmuluw_vvvl",
-    "llvm.ve.vl.vmuluw.vvvmvl" => "__builtin_ve_vl_vmuluw_vvvmvl",
-    "llvm.ve.vl.vmuluw.vvvvl" => "__builtin_ve_vl_vmuluw_vvvvl",
-    "llvm.ve.vl.vmv.vsvl" => "__builtin_ve_vl_vmv_vsvl",
-    "llvm.ve.vl.vmv.vsvmvl" => "__builtin_ve_vl_vmv_vsvmvl",
-    "llvm.ve.vl.vmv.vsvvl" => "__builtin_ve_vl_vmv_vsvvl",
-    "llvm.ve.vl.vor.vsvl" => "__builtin_ve_vl_vor_vsvl",
-    "llvm.ve.vl.vor.vsvmvl" => "__builtin_ve_vl_vor_vsvmvl",
-    "llvm.ve.vl.vor.vsvvl" => "__builtin_ve_vl_vor_vsvvl",
-    "llvm.ve.vl.vor.vvvl" => "__builtin_ve_vl_vor_vvvl",
-    "llvm.ve.vl.vor.vvvmvl" => "__builtin_ve_vl_vor_vvvmvl",
-    "llvm.ve.vl.vor.vvvvl" => "__builtin_ve_vl_vor_vvvvl",
-    "llvm.ve.vl.vpcnt.vvl" => "__builtin_ve_vl_vpcnt_vvl",
-    "llvm.ve.vl.vpcnt.vvmvl" => "__builtin_ve_vl_vpcnt_vvmvl",
-    "llvm.ve.vl.vpcnt.vvvl" => "__builtin_ve_vl_vpcnt_vvvl",
-    "llvm.ve.vl.vrand.vvl" => "__builtin_ve_vl_vrand_vvl",
-    "llvm.ve.vl.vrand.vvml" => "__builtin_ve_vl_vrand_vvml",
-    "llvm.ve.vl.vrcpd.vvl" => "__builtin_ve_vl_vrcpd_vvl",
-    "llvm.ve.vl.vrcpd.vvvl" => "__builtin_ve_vl_vrcpd_vvvl",
-    "llvm.ve.vl.vrcps.vvl" => "__builtin_ve_vl_vrcps_vvl",
-    "llvm.ve.vl.vrcps.vvvl" => "__builtin_ve_vl_vrcps_vvvl",
-    "llvm.ve.vl.vrmaxslfst.vvl" => "__builtin_ve_vl_vrmaxslfst_vvl",
-    "llvm.ve.vl.vrmaxslfst.vvvl" => "__builtin_ve_vl_vrmaxslfst_vvvl",
-    "llvm.ve.vl.vrmaxsllst.vvl" => "__builtin_ve_vl_vrmaxsllst_vvl",
-    "llvm.ve.vl.vrmaxsllst.vvvl" => "__builtin_ve_vl_vrmaxsllst_vvvl",
-    "llvm.ve.vl.vrmaxswfstsx.vvl" => "__builtin_ve_vl_vrmaxswfstsx_vvl",
-    "llvm.ve.vl.vrmaxswfstsx.vvvl" => "__builtin_ve_vl_vrmaxswfstsx_vvvl",
-    "llvm.ve.vl.vrmaxswfstzx.vvl" => "__builtin_ve_vl_vrmaxswfstzx_vvl",
-    "llvm.ve.vl.vrmaxswfstzx.vvvl" => "__builtin_ve_vl_vrmaxswfstzx_vvvl",
-    "llvm.ve.vl.vrmaxswlstsx.vvl" => "__builtin_ve_vl_vrmaxswlstsx_vvl",
-    "llvm.ve.vl.vrmaxswlstsx.vvvl" => "__builtin_ve_vl_vrmaxswlstsx_vvvl",
-    "llvm.ve.vl.vrmaxswlstzx.vvl" => "__builtin_ve_vl_vrmaxswlstzx_vvl",
-    "llvm.ve.vl.vrmaxswlstzx.vvvl" => "__builtin_ve_vl_vrmaxswlstzx_vvvl",
-    "llvm.ve.vl.vrminslfst.vvl" => "__builtin_ve_vl_vrminslfst_vvl",
-    "llvm.ve.vl.vrminslfst.vvvl" => "__builtin_ve_vl_vrminslfst_vvvl",
-    "llvm.ve.vl.vrminsllst.vvl" => "__builtin_ve_vl_vrminsllst_vvl",
-    "llvm.ve.vl.vrminsllst.vvvl" => "__builtin_ve_vl_vrminsllst_vvvl",
-    "llvm.ve.vl.vrminswfstsx.vvl" => "__builtin_ve_vl_vrminswfstsx_vvl",
-    "llvm.ve.vl.vrminswfstsx.vvvl" => "__builtin_ve_vl_vrminswfstsx_vvvl",
-    "llvm.ve.vl.vrminswfstzx.vvl" => "__builtin_ve_vl_vrminswfstzx_vvl",
-    "llvm.ve.vl.vrminswfstzx.vvvl" => "__builtin_ve_vl_vrminswfstzx_vvvl",
-    "llvm.ve.vl.vrminswlstsx.vvl" => "__builtin_ve_vl_vrminswlstsx_vvl",
-    "llvm.ve.vl.vrminswlstsx.vvvl" => "__builtin_ve_vl_vrminswlstsx_vvvl",
-    "llvm.ve.vl.vrminswlstzx.vvl" => "__builtin_ve_vl_vrminswlstzx_vvl",
-    "llvm.ve.vl.vrminswlstzx.vvvl" => "__builtin_ve_vl_vrminswlstzx_vvvl",
-    "llvm.ve.vl.vror.vvl" => "__builtin_ve_vl_vror_vvl",
-    "llvm.ve.vl.vror.vvml" => "__builtin_ve_vl_vror_vvml",
-    "llvm.ve.vl.vrsqrtd.vvl" => "__builtin_ve_vl_vrsqrtd_vvl",
-    "llvm.ve.vl.vrsqrtd.vvvl" => "__builtin_ve_vl_vrsqrtd_vvvl",
-    "llvm.ve.vl.vrsqrtdnex.vvl" => "__builtin_ve_vl_vrsqrtdnex_vvl",
-    "llvm.ve.vl.vrsqrtdnex.vvvl" => "__builtin_ve_vl_vrsqrtdnex_vvvl",
-    "llvm.ve.vl.vrsqrts.vvl" => "__builtin_ve_vl_vrsqrts_vvl",
-    "llvm.ve.vl.vrsqrts.vvvl" => "__builtin_ve_vl_vrsqrts_vvvl",
-    "llvm.ve.vl.vrsqrtsnex.vvl" => "__builtin_ve_vl_vrsqrtsnex_vvl",
-    "llvm.ve.vl.vrsqrtsnex.vvvl" => "__builtin_ve_vl_vrsqrtsnex_vvvl",
-    "llvm.ve.vl.vrxor.vvl" => "__builtin_ve_vl_vrxor_vvl",
-    "llvm.ve.vl.vrxor.vvml" => "__builtin_ve_vl_vrxor_vvml",
-    "llvm.ve.vl.vsc.vvssl" => "__builtin_ve_vl_vsc_vvssl",
-    "llvm.ve.vl.vsc.vvssml" => "__builtin_ve_vl_vsc_vvssml",
-    "llvm.ve.vl.vscl.vvssl" => "__builtin_ve_vl_vscl_vvssl",
-    "llvm.ve.vl.vscl.vvssml" => "__builtin_ve_vl_vscl_vvssml",
-    "llvm.ve.vl.vsclnc.vvssl" => "__builtin_ve_vl_vsclnc_vvssl",
-    "llvm.ve.vl.vsclnc.vvssml" => "__builtin_ve_vl_vsclnc_vvssml",
-    "llvm.ve.vl.vsclncot.vvssl" => "__builtin_ve_vl_vsclncot_vvssl",
-    "llvm.ve.vl.vsclncot.vvssml" => "__builtin_ve_vl_vsclncot_vvssml",
-    "llvm.ve.vl.vsclot.vvssl" => "__builtin_ve_vl_vsclot_vvssl",
-    "llvm.ve.vl.vsclot.vvssml" => "__builtin_ve_vl_vsclot_vvssml",
-    "llvm.ve.vl.vscnc.vvssl" => "__builtin_ve_vl_vscnc_vvssl",
-    "llvm.ve.vl.vscnc.vvssml" => "__builtin_ve_vl_vscnc_vvssml",
-    "llvm.ve.vl.vscncot.vvssl" => "__builtin_ve_vl_vscncot_vvssl",
-    "llvm.ve.vl.vscncot.vvssml" => "__builtin_ve_vl_vscncot_vvssml",
-    "llvm.ve.vl.vscot.vvssl" => "__builtin_ve_vl_vscot_vvssl",
-    "llvm.ve.vl.vscot.vvssml" => "__builtin_ve_vl_vscot_vvssml",
-    "llvm.ve.vl.vscu.vvssl" => "__builtin_ve_vl_vscu_vvssl",
-    "llvm.ve.vl.vscu.vvssml" => "__builtin_ve_vl_vscu_vvssml",
-    "llvm.ve.vl.vscunc.vvssl" => "__builtin_ve_vl_vscunc_vvssl",
-    "llvm.ve.vl.vscunc.vvssml" => "__builtin_ve_vl_vscunc_vvssml",
-    "llvm.ve.vl.vscuncot.vvssl" => "__builtin_ve_vl_vscuncot_vvssl",
-    "llvm.ve.vl.vscuncot.vvssml" => "__builtin_ve_vl_vscuncot_vvssml",
-    "llvm.ve.vl.vscuot.vvssl" => "__builtin_ve_vl_vscuot_vvssl",
-    "llvm.ve.vl.vscuot.vvssml" => "__builtin_ve_vl_vscuot_vvssml",
-    "llvm.ve.vl.vseq.vl" => "__builtin_ve_vl_vseq_vl",
-    "llvm.ve.vl.vseq.vvl" => "__builtin_ve_vl_vseq_vvl",
-    "llvm.ve.vl.vsfa.vvssl" => "__builtin_ve_vl_vsfa_vvssl",
-    "llvm.ve.vl.vsfa.vvssmvl" => "__builtin_ve_vl_vsfa_vvssmvl",
-    "llvm.ve.vl.vsfa.vvssvl" => "__builtin_ve_vl_vsfa_vvssvl",
-    "llvm.ve.vl.vshf.vvvsl" => "__builtin_ve_vl_vshf_vvvsl",
-    "llvm.ve.vl.vshf.vvvsvl" => "__builtin_ve_vl_vshf_vvvsvl",
-    "llvm.ve.vl.vslal.vvsl" => "__builtin_ve_vl_vslal_vvsl",
-    "llvm.ve.vl.vslal.vvsmvl" => "__builtin_ve_vl_vslal_vvsmvl",
-    "llvm.ve.vl.vslal.vvsvl" => "__builtin_ve_vl_vslal_vvsvl",
-    "llvm.ve.vl.vslal.vvvl" => "__builtin_ve_vl_vslal_vvvl",
-    "llvm.ve.vl.vslal.vvvmvl" => "__builtin_ve_vl_vslal_vvvmvl",
-    "llvm.ve.vl.vslal.vvvvl" => "__builtin_ve_vl_vslal_vvvvl",
-    "llvm.ve.vl.vslawsx.vvsl" => "__builtin_ve_vl_vslawsx_vvsl",
-    "llvm.ve.vl.vslawsx.vvsmvl" => "__builtin_ve_vl_vslawsx_vvsmvl",
-    "llvm.ve.vl.vslawsx.vvsvl" => "__builtin_ve_vl_vslawsx_vvsvl",
-    "llvm.ve.vl.vslawsx.vvvl" => "__builtin_ve_vl_vslawsx_vvvl",
-    "llvm.ve.vl.vslawsx.vvvmvl" => "__builtin_ve_vl_vslawsx_vvvmvl",
-    "llvm.ve.vl.vslawsx.vvvvl" => "__builtin_ve_vl_vslawsx_vvvvl",
-    "llvm.ve.vl.vslawzx.vvsl" => "__builtin_ve_vl_vslawzx_vvsl",
-    "llvm.ve.vl.vslawzx.vvsmvl" => "__builtin_ve_vl_vslawzx_vvsmvl",
-    "llvm.ve.vl.vslawzx.vvsvl" => "__builtin_ve_vl_vslawzx_vvsvl",
-    "llvm.ve.vl.vslawzx.vvvl" => "__builtin_ve_vl_vslawzx_vvvl",
-    "llvm.ve.vl.vslawzx.vvvmvl" => "__builtin_ve_vl_vslawzx_vvvmvl",
-    "llvm.ve.vl.vslawzx.vvvvl" => "__builtin_ve_vl_vslawzx_vvvvl",
-    "llvm.ve.vl.vsll.vvsl" => "__builtin_ve_vl_vsll_vvsl",
-    "llvm.ve.vl.vsll.vvsmvl" => "__builtin_ve_vl_vsll_vvsmvl",
-    "llvm.ve.vl.vsll.vvsvl" => "__builtin_ve_vl_vsll_vvsvl",
-    "llvm.ve.vl.vsll.vvvl" => "__builtin_ve_vl_vsll_vvvl",
-    "llvm.ve.vl.vsll.vvvmvl" => "__builtin_ve_vl_vsll_vvvmvl",
-    "llvm.ve.vl.vsll.vvvvl" => "__builtin_ve_vl_vsll_vvvvl",
-    "llvm.ve.vl.vsral.vvsl" => "__builtin_ve_vl_vsral_vvsl",
-    "llvm.ve.vl.vsral.vvsmvl" => "__builtin_ve_vl_vsral_vvsmvl",
-    "llvm.ve.vl.vsral.vvsvl" => "__builtin_ve_vl_vsral_vvsvl",
-    "llvm.ve.vl.vsral.vvvl" => "__builtin_ve_vl_vsral_vvvl",
-    "llvm.ve.vl.vsral.vvvmvl" => "__builtin_ve_vl_vsral_vvvmvl",
-    "llvm.ve.vl.vsral.vvvvl" => "__builtin_ve_vl_vsral_vvvvl",
-    "llvm.ve.vl.vsrawsx.vvsl" => "__builtin_ve_vl_vsrawsx_vvsl",
-    "llvm.ve.vl.vsrawsx.vvsmvl" => "__builtin_ve_vl_vsrawsx_vvsmvl",
-    "llvm.ve.vl.vsrawsx.vvsvl" => "__builtin_ve_vl_vsrawsx_vvsvl",
-    "llvm.ve.vl.vsrawsx.vvvl" => "__builtin_ve_vl_vsrawsx_vvvl",
-    "llvm.ve.vl.vsrawsx.vvvmvl" => "__builtin_ve_vl_vsrawsx_vvvmvl",
-    "llvm.ve.vl.vsrawsx.vvvvl" => "__builtin_ve_vl_vsrawsx_vvvvl",
-    "llvm.ve.vl.vsrawzx.vvsl" => "__builtin_ve_vl_vsrawzx_vvsl",
-    "llvm.ve.vl.vsrawzx.vvsmvl" => "__builtin_ve_vl_vsrawzx_vvsmvl",
-    "llvm.ve.vl.vsrawzx.vvsvl" => "__builtin_ve_vl_vsrawzx_vvsvl",
-    "llvm.ve.vl.vsrawzx.vvvl" => "__builtin_ve_vl_vsrawzx_vvvl",
-    "llvm.ve.vl.vsrawzx.vvvmvl" => "__builtin_ve_vl_vsrawzx_vvvmvl",
-    "llvm.ve.vl.vsrawzx.vvvvl" => "__builtin_ve_vl_vsrawzx_vvvvl",
-    "llvm.ve.vl.vsrl.vvsl" => "__builtin_ve_vl_vsrl_vvsl",
-    "llvm.ve.vl.vsrl.vvsmvl" => "__builtin_ve_vl_vsrl_vvsmvl",
-    "llvm.ve.vl.vsrl.vvsvl" => "__builtin_ve_vl_vsrl_vvsvl",
-    "llvm.ve.vl.vsrl.vvvl" => "__builtin_ve_vl_vsrl_vvvl",
-    "llvm.ve.vl.vsrl.vvvmvl" => "__builtin_ve_vl_vsrl_vvvmvl",
-    "llvm.ve.vl.vsrl.vvvvl" => "__builtin_ve_vl_vsrl_vvvvl",
-    "llvm.ve.vl.vst.vssl" => "__builtin_ve_vl_vst_vssl",
-    "llvm.ve.vl.vst.vssml" => "__builtin_ve_vl_vst_vssml",
-    "llvm.ve.vl.vst2d.vssl" => "__builtin_ve_vl_vst2d_vssl",
-    "llvm.ve.vl.vst2d.vssml" => "__builtin_ve_vl_vst2d_vssml",
-    "llvm.ve.vl.vst2dnc.vssl" => "__builtin_ve_vl_vst2dnc_vssl",
-    "llvm.ve.vl.vst2dnc.vssml" => "__builtin_ve_vl_vst2dnc_vssml",
-    "llvm.ve.vl.vst2dncot.vssl" => "__builtin_ve_vl_vst2dncot_vssl",
-    "llvm.ve.vl.vst2dncot.vssml" => "__builtin_ve_vl_vst2dncot_vssml",
-    "llvm.ve.vl.vst2dot.vssl" => "__builtin_ve_vl_vst2dot_vssl",
-    "llvm.ve.vl.vst2dot.vssml" => "__builtin_ve_vl_vst2dot_vssml",
-    "llvm.ve.vl.vstl.vssl" => "__builtin_ve_vl_vstl_vssl",
-    "llvm.ve.vl.vstl.vssml" => "__builtin_ve_vl_vstl_vssml",
-    "llvm.ve.vl.vstl2d.vssl" => "__builtin_ve_vl_vstl2d_vssl",
-    "llvm.ve.vl.vstl2d.vssml" => "__builtin_ve_vl_vstl2d_vssml",
-    "llvm.ve.vl.vstl2dnc.vssl" => "__builtin_ve_vl_vstl2dnc_vssl",
-    "llvm.ve.vl.vstl2dnc.vssml" => "__builtin_ve_vl_vstl2dnc_vssml",
-    "llvm.ve.vl.vstl2dncot.vssl" => "__builtin_ve_vl_vstl2dncot_vssl",
-    "llvm.ve.vl.vstl2dncot.vssml" => "__builtin_ve_vl_vstl2dncot_vssml",
-    "llvm.ve.vl.vstl2dot.vssl" => "__builtin_ve_vl_vstl2dot_vssl",
-    "llvm.ve.vl.vstl2dot.vssml" => "__builtin_ve_vl_vstl2dot_vssml",
-    "llvm.ve.vl.vstlnc.vssl" => "__builtin_ve_vl_vstlnc_vssl",
-    "llvm.ve.vl.vstlnc.vssml" => "__builtin_ve_vl_vstlnc_vssml",
-    "llvm.ve.vl.vstlncot.vssl" => "__builtin_ve_vl_vstlncot_vssl",
-    "llvm.ve.vl.vstlncot.vssml" => "__builtin_ve_vl_vstlncot_vssml",
-    "llvm.ve.vl.vstlot.vssl" => "__builtin_ve_vl_vstlot_vssl",
-    "llvm.ve.vl.vstlot.vssml" => "__builtin_ve_vl_vstlot_vssml",
-    "llvm.ve.vl.vstnc.vssl" => "__builtin_ve_vl_vstnc_vssl",
-    "llvm.ve.vl.vstnc.vssml" => "__builtin_ve_vl_vstnc_vssml",
-    "llvm.ve.vl.vstncot.vssl" => "__builtin_ve_vl_vstncot_vssl",
-    "llvm.ve.vl.vstncot.vssml" => "__builtin_ve_vl_vstncot_vssml",
-    "llvm.ve.vl.vstot.vssl" => "__builtin_ve_vl_vstot_vssl",
-    "llvm.ve.vl.vstot.vssml" => "__builtin_ve_vl_vstot_vssml",
-    "llvm.ve.vl.vstu.vssl" => "__builtin_ve_vl_vstu_vssl",
-    "llvm.ve.vl.vstu.vssml" => "__builtin_ve_vl_vstu_vssml",
-    "llvm.ve.vl.vstu2d.vssl" => "__builtin_ve_vl_vstu2d_vssl",
-    "llvm.ve.vl.vstu2d.vssml" => "__builtin_ve_vl_vstu2d_vssml",
-    "llvm.ve.vl.vstu2dnc.vssl" => "__builtin_ve_vl_vstu2dnc_vssl",
-    "llvm.ve.vl.vstu2dnc.vssml" => "__builtin_ve_vl_vstu2dnc_vssml",
-    "llvm.ve.vl.vstu2dncot.vssl" => "__builtin_ve_vl_vstu2dncot_vssl",
-    "llvm.ve.vl.vstu2dncot.vssml" => "__builtin_ve_vl_vstu2dncot_vssml",
-    "llvm.ve.vl.vstu2dot.vssl" => "__builtin_ve_vl_vstu2dot_vssl",
-    "llvm.ve.vl.vstu2dot.vssml" => "__builtin_ve_vl_vstu2dot_vssml",
-    "llvm.ve.vl.vstunc.vssl" => "__builtin_ve_vl_vstunc_vssl",
-    "llvm.ve.vl.vstunc.vssml" => "__builtin_ve_vl_vstunc_vssml",
-    "llvm.ve.vl.vstuncot.vssl" => "__builtin_ve_vl_vstuncot_vssl",
-    "llvm.ve.vl.vstuncot.vssml" => "__builtin_ve_vl_vstuncot_vssml",
-    "llvm.ve.vl.vstuot.vssl" => "__builtin_ve_vl_vstuot_vssl",
-    "llvm.ve.vl.vstuot.vssml" => "__builtin_ve_vl_vstuot_vssml",
-    "llvm.ve.vl.vsubsl.vsvl" => "__builtin_ve_vl_vsubsl_vsvl",
-    "llvm.ve.vl.vsubsl.vsvmvl" => "__builtin_ve_vl_vsubsl_vsvmvl",
-    "llvm.ve.vl.vsubsl.vsvvl" => "__builtin_ve_vl_vsubsl_vsvvl",
-    "llvm.ve.vl.vsubsl.vvvl" => "__builtin_ve_vl_vsubsl_vvvl",
-    "llvm.ve.vl.vsubsl.vvvmvl" => "__builtin_ve_vl_vsubsl_vvvmvl",
-    "llvm.ve.vl.vsubsl.vvvvl" => "__builtin_ve_vl_vsubsl_vvvvl",
-    "llvm.ve.vl.vsubswsx.vsvl" => "__builtin_ve_vl_vsubswsx_vsvl",
-    "llvm.ve.vl.vsubswsx.vsvmvl" => "__builtin_ve_vl_vsubswsx_vsvmvl",
-    "llvm.ve.vl.vsubswsx.vsvvl" => "__builtin_ve_vl_vsubswsx_vsvvl",
-    "llvm.ve.vl.vsubswsx.vvvl" => "__builtin_ve_vl_vsubswsx_vvvl",
-    "llvm.ve.vl.vsubswsx.vvvmvl" => "__builtin_ve_vl_vsubswsx_vvvmvl",
-    "llvm.ve.vl.vsubswsx.vvvvl" => "__builtin_ve_vl_vsubswsx_vvvvl",
-    "llvm.ve.vl.vsubswzx.vsvl" => "__builtin_ve_vl_vsubswzx_vsvl",
-    "llvm.ve.vl.vsubswzx.vsvmvl" => "__builtin_ve_vl_vsubswzx_vsvmvl",
-    "llvm.ve.vl.vsubswzx.vsvvl" => "__builtin_ve_vl_vsubswzx_vsvvl",
-    "llvm.ve.vl.vsubswzx.vvvl" => "__builtin_ve_vl_vsubswzx_vvvl",
-    "llvm.ve.vl.vsubswzx.vvvmvl" => "__builtin_ve_vl_vsubswzx_vvvmvl",
-    "llvm.ve.vl.vsubswzx.vvvvl" => "__builtin_ve_vl_vsubswzx_vvvvl",
-    "llvm.ve.vl.vsubul.vsvl" => "__builtin_ve_vl_vsubul_vsvl",
-    "llvm.ve.vl.vsubul.vsvmvl" => "__builtin_ve_vl_vsubul_vsvmvl",
-    "llvm.ve.vl.vsubul.vsvvl" => "__builtin_ve_vl_vsubul_vsvvl",
-    "llvm.ve.vl.vsubul.vvvl" => "__builtin_ve_vl_vsubul_vvvl",
-    "llvm.ve.vl.vsubul.vvvmvl" => "__builtin_ve_vl_vsubul_vvvmvl",
-    "llvm.ve.vl.vsubul.vvvvl" => "__builtin_ve_vl_vsubul_vvvvl",
-    "llvm.ve.vl.vsubuw.vsvl" => "__builtin_ve_vl_vsubuw_vsvl",
-    "llvm.ve.vl.vsubuw.vsvmvl" => "__builtin_ve_vl_vsubuw_vsvmvl",
-    "llvm.ve.vl.vsubuw.vsvvl" => "__builtin_ve_vl_vsubuw_vsvvl",
-    "llvm.ve.vl.vsubuw.vvvl" => "__builtin_ve_vl_vsubuw_vvvl",
-    "llvm.ve.vl.vsubuw.vvvmvl" => "__builtin_ve_vl_vsubuw_vvvmvl",
-    "llvm.ve.vl.vsubuw.vvvvl" => "__builtin_ve_vl_vsubuw_vvvvl",
-    "llvm.ve.vl.vsuml.vvl" => "__builtin_ve_vl_vsuml_vvl",
-    "llvm.ve.vl.vsuml.vvml" => "__builtin_ve_vl_vsuml_vvml",
-    "llvm.ve.vl.vsumwsx.vvl" => "__builtin_ve_vl_vsumwsx_vvl",
-    "llvm.ve.vl.vsumwsx.vvml" => "__builtin_ve_vl_vsumwsx_vvml",
-    "llvm.ve.vl.vsumwzx.vvl" => "__builtin_ve_vl_vsumwzx_vvl",
-    "llvm.ve.vl.vsumwzx.vvml" => "__builtin_ve_vl_vsumwzx_vvml",
-    "llvm.ve.vl.vxor.vsvl" => "__builtin_ve_vl_vxor_vsvl",
-    "llvm.ve.vl.vxor.vsvmvl" => "__builtin_ve_vl_vxor_vsvmvl",
-    "llvm.ve.vl.vxor.vsvvl" => "__builtin_ve_vl_vxor_vsvvl",
-    "llvm.ve.vl.vxor.vvvl" => "__builtin_ve_vl_vxor_vvvl",
-    "llvm.ve.vl.vxor.vvvmvl" => "__builtin_ve_vl_vxor_vvvmvl",
-    "llvm.ve.vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
-    "llvm.ve.vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
-    "llvm.ve.vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
-    // x86
-    "llvm.x86.aadd32" => "__builtin_ia32_aadd32",
-    "llvm.x86.aadd64" => "__builtin_ia32_aadd64",
-    "llvm.x86.aand32" => "__builtin_ia32_aand32",
-    "llvm.x86.aand64" => "__builtin_ia32_aand64",
-    "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
-    "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
-    "llvm.x86.addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
-    "llvm.x86.addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
-    "llvm.x86.aesni.aesdec" => "__builtin_ia32_aesdec128",
-    "llvm.x86.aesni.aesdec.256" => "__builtin_ia32_aesdec256",
-    "llvm.x86.aesni.aesdec.512" => "__builtin_ia32_aesdec512",
-    "llvm.x86.aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
-    "llvm.x86.aesni.aesdeclast.256" => "__builtin_ia32_aesdeclast256",
-    "llvm.x86.aesni.aesdeclast.512" => "__builtin_ia32_aesdeclast512",
-    "llvm.x86.aesni.aesenc" => "__builtin_ia32_aesenc128",
-    "llvm.x86.aesni.aesenc.256" => "__builtin_ia32_aesenc256",
-    "llvm.x86.aesni.aesenc.512" => "__builtin_ia32_aesenc512",
-    "llvm.x86.aesni.aesenclast" => "__builtin_ia32_aesenclast128",
-    "llvm.x86.aesni.aesenclast.256" => "__builtin_ia32_aesenclast256",
-    "llvm.x86.aesni.aesenclast.512" => "__builtin_ia32_aesenclast512",
-    "llvm.x86.aesni.aesimc" => "__builtin_ia32_aesimc128",
-    "llvm.x86.aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
-    "llvm.x86.aor32" => "__builtin_ia32_aor32",
-    "llvm.x86.aor64" => "__builtin_ia32_aor64",
-    "llvm.x86.avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
-    "llvm.x86.avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
-    "llvm.x86.avx.blend.pd.256" => "__builtin_ia32_blendpd256",
-    "llvm.x86.avx.blend.ps.256" => "__builtin_ia32_blendps256",
-    "llvm.x86.avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
-    "llvm.x86.avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
-    "llvm.x86.avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
-    "llvm.x86.avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
-    "llvm.x86.avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
-    "llvm.x86.avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
-    "llvm.x86.avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
-    "llvm.x86.avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
-    "llvm.x86.avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
-    "llvm.x86.avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
-    "llvm.x86.avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
-    "llvm.x86.avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
-    "llvm.x86.avx.dp.ps.256" => "__builtin_ia32_dpps256",
-    "llvm.x86.avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
-    "llvm.x86.avx.hadd.ps.256" => "__builtin_ia32_haddps256",
-    "llvm.x86.avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
-    "llvm.x86.avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
-    "llvm.x86.avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
-    "llvm.x86.avx.maskload.pd" => "__builtin_ia32_maskloadpd",
-    "llvm.x86.avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
-    "llvm.x86.avx.maskload.ps" => "__builtin_ia32_maskloadps",
-    "llvm.x86.avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
-    "llvm.x86.avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
-    "llvm.x86.avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
-    "llvm.x86.avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
-    "llvm.x86.avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
-    "llvm.x86.avx.max.pd.256" => "__builtin_ia32_maxpd256",
-    "llvm.x86.avx.max.ps.256" => "__builtin_ia32_maxps256",
-    "llvm.x86.avx.min.pd.256" => "__builtin_ia32_minpd256",
-    "llvm.x86.avx.min.ps.256" => "__builtin_ia32_minps256",
-    "llvm.x86.avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
-    "llvm.x86.avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
-    "llvm.x86.avx.ptestc.256" => "__builtin_ia32_ptestc256",
-    "llvm.x86.avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
-    "llvm.x86.avx.ptestz.256" => "__builtin_ia32_ptestz256",
-    "llvm.x86.avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
-    "llvm.x86.avx.round.pd.256" => "__builtin_ia32_roundpd256",
-    "llvm.x86.avx.round.ps.256" => "__builtin_ia32_roundps256",
-    "llvm.x86.avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
-    "llvm.x86.avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
-    "llvm.x86.avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
-    "llvm.x86.avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
-    "llvm.x86.avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
-    "llvm.x86.avx.storeu.ps.256" => "__builtin_ia32_storeups256",
-    "llvm.x86.avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
-    "llvm.x86.avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
-    "llvm.x86.avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
-    "llvm.x86.avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
-    "llvm.x86.avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
-    "llvm.x86.avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
-    "llvm.x86.avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
-    "llvm.x86.avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
-    "llvm.x86.avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
-    "llvm.x86.avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
-    "llvm.x86.avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
-    "llvm.x86.avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
-    "llvm.x86.avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
-    "llvm.x86.avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
-    "llvm.x86.avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
-    "llvm.x86.avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
-    "llvm.x86.avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
-    "llvm.x86.avx.vtestc.ps" => "__builtin_ia32_vtestcps",
-    "llvm.x86.avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
-    "llvm.x86.avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
-    "llvm.x86.avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
-    "llvm.x86.avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
-    "llvm.x86.avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
-    "llvm.x86.avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
-    "llvm.x86.avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
-    "llvm.x86.avx.vtestz.ps" => "__builtin_ia32_vtestzps",
-    "llvm.x86.avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
-    "llvm.x86.avx.vzeroall" => "__builtin_ia32_vzeroall",
-    "llvm.x86.avx.vzeroupper" => "__builtin_ia32_vzeroupper",
-    "llvm.x86.avx10.mask.getexp.bf16.128" => "__builtin_ia32_vgetexpbf16128_mask",
-    "llvm.x86.avx10.mask.getexp.bf16.256" => "__builtin_ia32_vgetexpbf16256_mask",
-    "llvm.x86.avx10.mask.getexp.bf16.512" => "__builtin_ia32_vgetexpbf16512_mask",
-    "llvm.x86.avx10.mask.getmant.bf16.128" => "__builtin_ia32_vgetmantbf16128_mask",
-    "llvm.x86.avx10.mask.getmant.bf16.256" => "__builtin_ia32_vgetmantbf16256_mask",
-    "llvm.x86.avx10.mask.getmant.bf16.512" => "__builtin_ia32_vgetmantbf16512_mask",
-    "llvm.x86.avx10.mask.rcp.bf16.128" => "__builtin_ia32_vrcpbf16128_mask",
-    "llvm.x86.avx10.mask.rcp.bf16.256" => "__builtin_ia32_vrcpbf16256_mask",
-    "llvm.x86.avx10.mask.rcp.bf16.512" => "__builtin_ia32_vrcpbf16512_mask",
-    "llvm.x86.avx10.mask.reduce.bf16.128" => "__builtin_ia32_vreducebf16128_mask",
-    "llvm.x86.avx10.mask.reduce.bf16.256" => "__builtin_ia32_vreducebf16256_mask",
-    "llvm.x86.avx10.mask.reduce.bf16.512" => "__builtin_ia32_vreducebf16512_mask",
-    "llvm.x86.avx10.mask.rndscale.bf16.128" => "__builtin_ia32_vrndscalebf16_128_mask",
-    "llvm.x86.avx10.mask.rndscale.bf16.256" => "__builtin_ia32_vrndscalebf16_256_mask",
-    "llvm.x86.avx10.mask.rndscale.bf16.512" => "__builtin_ia32_vrndscalebf16_mask",
-    "llvm.x86.avx10.mask.rsqrt.bf16.128" => "__builtin_ia32_vrsqrtbf16128_mask",
-    "llvm.x86.avx10.mask.rsqrt.bf16.256" => "__builtin_ia32_vrsqrtbf16256_mask",
-    "llvm.x86.avx10.mask.rsqrt.bf16.512" => "__builtin_ia32_vrsqrtbf16512_mask",
-    "llvm.x86.avx10.mask.scalef.bf16.128" => "__builtin_ia32_vscalefbf16128_mask",
-    "llvm.x86.avx10.mask.scalef.bf16.256" => "__builtin_ia32_vscalefbf16256_mask",
-    "llvm.x86.avx10.mask.scalef.bf16.512" => "__builtin_ia32_vscalefbf16512_mask",
-    "llvm.x86.avx10.mask.vcvt2ps2phx.128" => "__builtin_ia32_vcvt2ps2phx128_mask",
-    "llvm.x86.avx10.mask.vcvt2ps2phx.256" => "__builtin_ia32_vcvt2ps2phx256_mask",
-    "llvm.x86.avx10.mask.vcvt2ps2phx.512" => "__builtin_ia32_vcvt2ps2phx512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8128" => "__builtin_ia32_vcvtbiasph2bf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8256" => "__builtin_ia32_vcvtbiasph2bf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8512" => "__builtin_ia32_vcvtbiasph2bf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8s128" => "__builtin_ia32_vcvtbiasph2bf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8s256" => "__builtin_ia32_vcvtbiasph2bf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2bf8s512" => "__builtin_ia32_vcvtbiasph2bf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8128" => "__builtin_ia32_vcvtbiasph2hf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8256" => "__builtin_ia32_vcvtbiasph2hf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8512" => "__builtin_ia32_vcvtbiasph2hf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8s128" => "__builtin_ia32_vcvtbiasph2hf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8s256" => "__builtin_ia32_vcvtbiasph2hf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtbiasph2hf8s512" => "__builtin_ia32_vcvtbiasph2hf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvthf82ph128" => "__builtin_ia32_vcvthf8_2ph128_mask",
-    "llvm.x86.avx10.mask.vcvthf82ph256" => "__builtin_ia32_vcvthf8_2ph256_mask",
-    "llvm.x86.avx10.mask.vcvthf82ph512" => "__builtin_ia32_vcvthf8_2ph512_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8128" => "__builtin_ia32_vcvtph2bf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8256" => "__builtin_ia32_vcvtph2bf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8512" => "__builtin_ia32_vcvtph2bf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8s128" => "__builtin_ia32_vcvtph2bf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8s256" => "__builtin_ia32_vcvtph2bf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2bf8s512" => "__builtin_ia32_vcvtph2bf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8128" => "__builtin_ia32_vcvtph2hf8_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8256" => "__builtin_ia32_vcvtph2hf8_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8512" => "__builtin_ia32_vcvtph2hf8_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8s128" => "__builtin_ia32_vcvtph2hf8s_128_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8s256" => "__builtin_ia32_vcvtph2hf8s_256_mask",
-    "llvm.x86.avx10.mask.vcvtph2hf8s512" => "__builtin_ia32_vcvtph2hf8s_512_mask",
-    "llvm.x86.avx10.mask.vcvtph2ibs128" => "__builtin_ia32_vcvtph2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvtph2ibs256" => "__builtin_ia32_vcvtph2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvtph2ibs512" => "__builtin_ia32_vcvtph2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvtph2iubs128" => "__builtin_ia32_vcvtph2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvtph2iubs256" => "__builtin_ia32_vcvtph2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvtph2iubs512" => "__builtin_ia32_vcvtph2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvtps2ibs128" => "__builtin_ia32_vcvtps2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvtps2ibs256" => "__builtin_ia32_vcvtps2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvtps2ibs512" => "__builtin_ia32_vcvtps2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvtps2iubs128" => "__builtin_ia32_vcvtps2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvtps2iubs256" => "__builtin_ia32_vcvtps2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvtps2iubs512" => "__builtin_ia32_vcvtps2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvttpd2dqs.128" => "__builtin_ia32_vcvttpd2dqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2dqs.256" => "__builtin_ia32_vcvttpd2dqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2dqs.round.512" => "__builtin_ia32_vcvttpd2dqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttpd2qqs.128" => "__builtin_ia32_vcvttpd2qqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2qqs.256" => "__builtin_ia32_vcvttpd2qqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2qqs.round.512" => "__builtin_ia32_vcvttpd2qqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttpd2udqs.128" => "__builtin_ia32_vcvttpd2udqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2udqs.256" => "__builtin_ia32_vcvttpd2udqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2udqs.round.512" => "__builtin_ia32_vcvttpd2udqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttpd2uqqs.128" => "__builtin_ia32_vcvttpd2uqqs128_mask",
-    "llvm.x86.avx10.mask.vcvttpd2uqqs.256" => "__builtin_ia32_vcvttpd2uqqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttpd2uqqs.round.512" => "__builtin_ia32_vcvttpd2uqqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttph2ibs128" => "__builtin_ia32_vcvttph2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvttph2ibs256" => "__builtin_ia32_vcvttph2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvttph2ibs512" => "__builtin_ia32_vcvttph2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvttph2iubs128" => "__builtin_ia32_vcvttph2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvttph2iubs256" => "__builtin_ia32_vcvttph2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvttph2iubs512" => "__builtin_ia32_vcvttph2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvttps2dqs.128" => "__builtin_ia32_vcvttps2dqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2dqs.256" => "__builtin_ia32_vcvttps2dqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2dqs.round.512" => "__builtin_ia32_vcvttps2dqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttps2ibs128" => "__builtin_ia32_vcvttps2ibs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2ibs256" => "__builtin_ia32_vcvttps2ibs256_mask",
-    "llvm.x86.avx10.mask.vcvttps2ibs512" => "__builtin_ia32_vcvttps2ibs512_mask",
-    "llvm.x86.avx10.mask.vcvttps2iubs128" => "__builtin_ia32_vcvttps2iubs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2iubs256" => "__builtin_ia32_vcvttps2iubs256_mask",
-    "llvm.x86.avx10.mask.vcvttps2iubs512" => "__builtin_ia32_vcvttps2iubs512_mask",
-    "llvm.x86.avx10.mask.vcvttps2qqs.128" => "__builtin_ia32_vcvttps2qqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2qqs.256" => "__builtin_ia32_vcvttps2qqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2qqs.round.512" => "__builtin_ia32_vcvttps2qqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttps2udqs.128" => "__builtin_ia32_vcvttps2udqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2udqs.256" => "__builtin_ia32_vcvttps2udqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2udqs.round.512" => "__builtin_ia32_vcvttps2udqs512_round_mask",
-    "llvm.x86.avx10.mask.vcvttps2uqqs.128" => "__builtin_ia32_vcvttps2uqqs128_mask",
-    "llvm.x86.avx10.mask.vcvttps2uqqs.256" => "__builtin_ia32_vcvttps2uqqs256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vcvttps2uqqs.round.512" => "__builtin_ia32_vcvttps2uqqs512_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxpd.round" => "__builtin_ia32_vminmaxpd512_round_mask",
-    "llvm.x86.avx10.mask.vminmaxpd128" => "__builtin_ia32_vminmaxpd128_mask",
-    "llvm.x86.avx10.mask.vminmaxpd256" => "__builtin_ia32_vminmaxpd256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxph.round" => "__builtin_ia32_vminmaxph512_round_mask",
-    "llvm.x86.avx10.mask.vminmaxph128" => "__builtin_ia32_vminmaxph128_mask",
-    "llvm.x86.avx10.mask.vminmaxph256" => "__builtin_ia32_vminmaxph256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxps.round" => "__builtin_ia32_vminmaxps512_round_mask",
-    "llvm.x86.avx10.mask.vminmaxps128" => "__builtin_ia32_vminmaxps128_mask",
-    "llvm.x86.avx10.mask.vminmaxps256" => "__builtin_ia32_vminmaxps256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsd.round" => "__builtin_ia32_vminmaxsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxsh.round" => "__builtin_ia32_vminmaxsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx10.mask.vminmaxss.round" => "__builtin_ia32_vminmaxss_round_mask",
-    "llvm.x86.avx10.vaddbf16128" => "__builtin_ia32_vaddbf16128",
-    "llvm.x86.avx10.vaddbf16256" => "__builtin_ia32_vaddbf16256",
-    "llvm.x86.avx10.vaddbf16512" => "__builtin_ia32_vaddbf16512",
-    "llvm.x86.avx10.vaddpd256" => "__builtin_ia32_vaddpd256_round",
-    "llvm.x86.avx10.vaddph256" => "__builtin_ia32_vaddph256_round",
-    "llvm.x86.avx10.vaddps256" => "__builtin_ia32_vaddps256_round",
-    "llvm.x86.avx10.vcomisbf16eq" => "__builtin_ia32_vcomisbf16eq",
-    "llvm.x86.avx10.vcomisbf16ge" => "__builtin_ia32_vcomisbf16ge",
-    "llvm.x86.avx10.vcomisbf16gt" => "__builtin_ia32_vcomisbf16gt",
-    "llvm.x86.avx10.vcomisbf16le" => "__builtin_ia32_vcomisbf16le",
-    "llvm.x86.avx10.vcomisbf16lt" => "__builtin_ia32_vcomisbf16lt",
-    "llvm.x86.avx10.vcomisbf16neq" => "__builtin_ia32_vcomisbf16neq",
-    "llvm.x86.avx10.vcvt2ph2bf8128" => "__builtin_ia32_vcvt2ph2bf8_128",
-    "llvm.x86.avx10.vcvt2ph2bf8256" => "__builtin_ia32_vcvt2ph2bf8_256",
-    "llvm.x86.avx10.vcvt2ph2bf8512" => "__builtin_ia32_vcvt2ph2bf8_512",
-    "llvm.x86.avx10.vcvt2ph2bf8s128" => "__builtin_ia32_vcvt2ph2bf8s_128",
-    "llvm.x86.avx10.vcvt2ph2bf8s256" => "__builtin_ia32_vcvt2ph2bf8s_256",
-    "llvm.x86.avx10.vcvt2ph2bf8s512" => "__builtin_ia32_vcvt2ph2bf8s_512",
-    "llvm.x86.avx10.vcvt2ph2hf8128" => "__builtin_ia32_vcvt2ph2hf8_128",
-    "llvm.x86.avx10.vcvt2ph2hf8256" => "__builtin_ia32_vcvt2ph2hf8_256",
-    "llvm.x86.avx10.vcvt2ph2hf8512" => "__builtin_ia32_vcvt2ph2hf8_512",
-    "llvm.x86.avx10.vcvt2ph2hf8s128" => "__builtin_ia32_vcvt2ph2hf8s_128",
-    "llvm.x86.avx10.vcvt2ph2hf8s256" => "__builtin_ia32_vcvt2ph2hf8s_256",
-    "llvm.x86.avx10.vcvt2ph2hf8s512" => "__builtin_ia32_vcvt2ph2hf8s_512",
-    "llvm.x86.avx10.vcvtbf162ibs128" => "__builtin_ia32_vcvtbf162ibs128",
-    "llvm.x86.avx10.vcvtbf162ibs256" => "__builtin_ia32_vcvtbf162ibs256",
-    "llvm.x86.avx10.vcvtbf162ibs512" => "__builtin_ia32_vcvtbf162ibs512",
-    "llvm.x86.avx10.vcvtbf162iubs128" => "__builtin_ia32_vcvtbf162iubs128",
-    "llvm.x86.avx10.vcvtbf162iubs256" => "__builtin_ia32_vcvtbf162iubs256",
-    "llvm.x86.avx10.vcvtbf162iubs512" => "__builtin_ia32_vcvtbf162iubs512",
-    "llvm.x86.avx10.vcvttbf162ibs128" => "__builtin_ia32_vcvttbf162ibs128",
-    "llvm.x86.avx10.vcvttbf162ibs256" => "__builtin_ia32_vcvttbf162ibs256",
-    "llvm.x86.avx10.vcvttbf162ibs512" => "__builtin_ia32_vcvttbf162ibs512",
-    "llvm.x86.avx10.vcvttbf162iubs128" => "__builtin_ia32_vcvttbf162iubs128",
-    "llvm.x86.avx10.vcvttbf162iubs256" => "__builtin_ia32_vcvttbf162iubs256",
-    "llvm.x86.avx10.vcvttbf162iubs512" => "__builtin_ia32_vcvttbf162iubs512",
-    "llvm.x86.avx10.vcvttsd2sis" => "__builtin_ia32_vcvttsd2sis32",
-    "llvm.x86.avx10.vcvttsd2sis64" => "__builtin_ia32_vcvttsd2sis64",
-    "llvm.x86.avx10.vcvttsd2usis" => "__builtin_ia32_vcvttsd2usis32",
-    "llvm.x86.avx10.vcvttsd2usis64" => "__builtin_ia32_vcvttsd2usis64",
-    "llvm.x86.avx10.vcvttss2sis" => "__builtin_ia32_vcvttss2sis32",
-    "llvm.x86.avx10.vcvttss2sis64" => "__builtin_ia32_vcvttss2sis64",
-    "llvm.x86.avx10.vcvttss2usis" => "__builtin_ia32_vcvttss2usis32",
-    "llvm.x86.avx10.vcvttss2usis64" => "__builtin_ia32_vcvttss2usis64",
-    "llvm.x86.avx10.vdivbf16128" => "__builtin_ia32_vdivbf16128",
-    "llvm.x86.avx10.vdivbf16256" => "__builtin_ia32_vdivbf16256",
-    "llvm.x86.avx10.vdivbf16512" => "__builtin_ia32_vdivbf16512",
-    "llvm.x86.avx10.vdpphps.128" => "__builtin_ia32_vdpphps128",
-    "llvm.x86.avx10.vdpphps.256" => "__builtin_ia32_vdpphps256",
-    "llvm.x86.avx10.vdpphps.512" => "__builtin_ia32_vdpphps512",
-    "llvm.x86.avx10.vfmadd132bf16128" => "__builtin_ia32_vfmadd132bf16128",
-    "llvm.x86.avx10.vfmadd132bf16256" => "__builtin_ia32_vfmadd132bf16256",
-    "llvm.x86.avx10.vfmadd132bf16512" => "__builtin_ia32_vfmadd132bf16512",
-    "llvm.x86.avx10.vfmadd213bf16128" => "__builtin_ia32_vfmadd213bf16128",
-    "llvm.x86.avx10.vfmadd213bf16256" => "__builtin_ia32_vfmadd213bf16256",
-    "llvm.x86.avx10.vfmadd231bf16128" => "__builtin_ia32_vfmadd231bf16128",
-    "llvm.x86.avx10.vfmadd231bf16256" => "__builtin_ia32_vfmadd231bf16256",
-    "llvm.x86.avx10.vfmadd231bf16512" => "__builtin_ia32_vfmadd231bf16512",
-    "llvm.x86.avx10.vfmsub132bf16128" => "__builtin_ia32_vfmsub132bf16128",
-    "llvm.x86.avx10.vfmsub132bf16256" => "__builtin_ia32_vfmsub132bf16256",
-    "llvm.x86.avx10.vfmsub132bf16512" => "__builtin_ia32_vfmsub132bf16512",
-    "llvm.x86.avx10.vfmsub213bf16128" => "__builtin_ia32_vfmsub213bf16128",
-    "llvm.x86.avx10.vfmsub213bf16256" => "__builtin_ia32_vfmsub213bf16256",
-    "llvm.x86.avx10.vfmsub213bf16512" => "__builtin_ia32_vfmsub213bf16512",
-    "llvm.x86.avx10.vfmsub231bf16128" => "__builtin_ia32_vfmsub231bf16128",
-    "llvm.x86.avx10.vfmsub231bf16256" => "__builtin_ia32_vfmsub231bf16256",
-    "llvm.x86.avx10.vfmsub231bf16512" => "__builtin_ia32_vfmsub231bf16512",
-    "llvm.x86.avx10.vfnmadd132bf16128" => "__builtin_ia32_vfnmadd132bf16128",
-    "llvm.x86.avx10.vfnmadd132bf16256" => "__builtin_ia32_vfnmadd132bf16256",
-    "llvm.x86.avx10.vfnmadd132bf16512" => "__builtin_ia32_vfnmadd132bf16512",
-    "llvm.x86.avx10.vfnmadd213bf16128" => "__builtin_ia32_vfnmadd213bf16128",
-    "llvm.x86.avx10.vfnmadd213bf16256" => "__builtin_ia32_vfnmadd213bf16256",
-    "llvm.x86.avx10.vfnmadd213bf16512" => "__builtin_ia32_vfnmadd213bf16512",
-    "llvm.x86.avx10.vfnmadd231bf16128" => "__builtin_ia32_vfnmadd231bf16128",
-    "llvm.x86.avx10.vfnmadd231bf16256" => "__builtin_ia32_vfnmadd231bf16256",
-    "llvm.x86.avx10.vfnmadd231bf16512" => "__builtin_ia32_vfnmadd231bf16512",
-    "llvm.x86.avx10.vfnmsub132bf16128" => "__builtin_ia32_vfnmsub132bf16128",
-    "llvm.x86.avx10.vfnmsub132bf16256" => "__builtin_ia32_vfnmsub132bf16256",
-    "llvm.x86.avx10.vfnmsub132bf16512" => "__builtin_ia32_vfnmsub132bf16512",
-    "llvm.x86.avx10.vfnmsub213bf16128" => "__builtin_ia32_vfnmsub213bf16128",
-    "llvm.x86.avx10.vfnmsub213bf16256" => "__builtin_ia32_vfnmsub213bf16256",
-    "llvm.x86.avx10.vfnmsub213bf16512" => "__builtin_ia32_vfnmsub213bf16512",
-    "llvm.x86.avx10.vfnmsub231bf16128" => "__builtin_ia32_vfnmsub231bf16128",
-    "llvm.x86.avx10.vfnmsub231bf16256" => "__builtin_ia32_vfnmsub231bf16256",
-    "llvm.x86.avx10.vfnmsub231bf16512" => "__builtin_ia32_vfnmsub231bf16512",
-    "llvm.x86.avx10.vmaxbf16128" => "__builtin_ia32_vmaxbf16128",
-    "llvm.x86.avx10.vmaxbf16256" => "__builtin_ia32_vmaxbf16256",
-    "llvm.x86.avx10.vmaxbf16512" => "__builtin_ia32_vmaxbf16512",
-    "llvm.x86.avx10.vminbf16128" => "__builtin_ia32_vminbf16128",
-    "llvm.x86.avx10.vminbf16256" => "__builtin_ia32_vminbf16256",
-    "llvm.x86.avx10.vminbf16512" => "__builtin_ia32_vminbf16512",
-    "llvm.x86.avx10.vminmaxbf16128" => "__builtin_ia32_vminmaxbf16128",
-    "llvm.x86.avx10.vminmaxbf16256" => "__builtin_ia32_vminmaxbf16256",
-    "llvm.x86.avx10.vminmaxbf16512" => "__builtin_ia32_vminmaxbf16512",
-    "llvm.x86.avx10.vminmaxpd128" => "__builtin_ia32_vminmaxpd128",
-    "llvm.x86.avx10.vminmaxpd256" => "__builtin_ia32_vminmaxpd256",
-    "llvm.x86.avx10.vminmaxph128" => "__builtin_ia32_vminmaxph128",
-    "llvm.x86.avx10.vminmaxph256" => "__builtin_ia32_vminmaxph256",
-    "llvm.x86.avx10.vminmaxps128" => "__builtin_ia32_vminmaxps128",
-    "llvm.x86.avx10.vminmaxps256" => "__builtin_ia32_vminmaxps256",
-    "llvm.x86.avx10.vmovrsb128" => "__builtin_ia32_vmovrsb128",
-    "llvm.x86.avx10.vmovrsb256" => "__builtin_ia32_vmovrsb256",
-    "llvm.x86.avx10.vmovrsb512" => "__builtin_ia32_vmovrsb512",
-    "llvm.x86.avx10.vmovrsd128" => "__builtin_ia32_vmovrsd128",
-    "llvm.x86.avx10.vmovrsd256" => "__builtin_ia32_vmovrsd256",
-    "llvm.x86.avx10.vmovrsd512" => "__builtin_ia32_vmovrsd512",
-    "llvm.x86.avx10.vmovrsq128" => "__builtin_ia32_vmovrsq128",
-    "llvm.x86.avx10.vmovrsq256" => "__builtin_ia32_vmovrsq256",
-    "llvm.x86.avx10.vmovrsq512" => "__builtin_ia32_vmovrsq512",
-    "llvm.x86.avx10.vmovrsw128" => "__builtin_ia32_vmovrsw128",
-    "llvm.x86.avx10.vmovrsw256" => "__builtin_ia32_vmovrsw256",
-    "llvm.x86.avx10.vmovrsw512" => "__builtin_ia32_vmovrsw512",
-    "llvm.x86.avx10.vmpsadbw.512" => "__builtin_ia32_mpsadbw512",
-    "llvm.x86.avx10.vmulbf16128" => "__builtin_ia32_vmulbf16128",
-    "llvm.x86.avx10.vmulbf16256" => "__builtin_ia32_vmulbf16256",
-    "llvm.x86.avx10.vmulbf16512" => "__builtin_ia32_vmulbf16512",
-    "llvm.x86.avx10.vpdpbssd.512" => "__builtin_ia32_vpdpbssd512",
-    "llvm.x86.avx10.vpdpbssds.512" => "__builtin_ia32_vpdpbssds512",
-    "llvm.x86.avx10.vpdpbsud.512" => "__builtin_ia32_vpdpbsud512",
-    "llvm.x86.avx10.vpdpbsuds.512" => "__builtin_ia32_vpdpbsuds512",
-    "llvm.x86.avx10.vpdpbuud.512" => "__builtin_ia32_vpdpbuud512",
-    "llvm.x86.avx10.vpdpbuuds.512" => "__builtin_ia32_vpdpbuuds512",
-    "llvm.x86.avx10.vpdpwsud.512" => "__builtin_ia32_vpdpwsud512",
-    "llvm.x86.avx10.vpdpwsuds.512" => "__builtin_ia32_vpdpwsuds512",
-    "llvm.x86.avx10.vpdpwusd.512" => "__builtin_ia32_vpdpwusd512",
-    "llvm.x86.avx10.vpdpwusds.512" => "__builtin_ia32_vpdpwusds512",
-    "llvm.x86.avx10.vpdpwuud.512" => "__builtin_ia32_vpdpwuud512",
-    "llvm.x86.avx10.vpdpwuuds.512" => "__builtin_ia32_vpdpwuuds512",
-    "llvm.x86.avx10.vsubbf16128" => "__builtin_ia32_vsubbf16128",
-    "llvm.x86.avx10.vsubbf16256" => "__builtin_ia32_vsubbf16256",
-    "llvm.x86.avx10.vsubbf16512" => "__builtin_ia32_vsubbf16512",
-    "llvm.x86.avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
-    "llvm.x86.avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
-    "llvm.x86.avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
-    "llvm.x86.avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
-    "llvm.x86.avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
-    "llvm.x86.avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
-    "llvm.x86.avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
-    "llvm.x86.avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
-    "llvm.x86.avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
-    "llvm.x86.avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
-    "llvm.x86.avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
-    "llvm.x86.avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
-    "llvm.x86.avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
-    "llvm.x86.avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
-    "llvm.x86.avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
-    "llvm.x86.avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
-    "llvm.x86.avx2.maskload.d" => "__builtin_ia32_maskloadd",
-    "llvm.x86.avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
-    "llvm.x86.avx2.maskload.q" => "__builtin_ia32_maskloadq",
-    "llvm.x86.avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
-    "llvm.x86.avx2.maskstore.d" => "__builtin_ia32_maskstored",
-    "llvm.x86.avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
-    "llvm.x86.avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
-    "llvm.x86.avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
-    "llvm.x86.avx2.movntdqa" => "__builtin_ia32_movntdqa256",
-    "llvm.x86.avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
-    "llvm.x86.avx2.pabs.b" => "__builtin_ia32_pabsb256",
-    "llvm.x86.avx2.pabs.d" => "__builtin_ia32_pabsd256",
-    "llvm.x86.avx2.pabs.w" => "__builtin_ia32_pabsw256",
-    "llvm.x86.avx2.packssdw" => "__builtin_ia32_packssdw256",
-    "llvm.x86.avx2.packsswb" => "__builtin_ia32_packsswb256",
-    "llvm.x86.avx2.packusdw" => "__builtin_ia32_packusdw256",
-    "llvm.x86.avx2.packuswb" => "__builtin_ia32_packuswb256",
-    "llvm.x86.avx2.padds.b" => "__builtin_ia32_paddsb256",
-    "llvm.x86.avx2.padds.w" => "__builtin_ia32_paddsw256",
-    "llvm.x86.avx2.paddus.b" => "__builtin_ia32_paddusb256",
-    "llvm.x86.avx2.paddus.w" => "__builtin_ia32_paddusw256",
-    "llvm.x86.avx2.pavg.b" => "__builtin_ia32_pavgb256",
-    "llvm.x86.avx2.pavg.w" => "__builtin_ia32_pavgw256",
-    "llvm.x86.avx2.pblendd.128" => "__builtin_ia32_pblendd128",
-    "llvm.x86.avx2.pblendd.256" => "__builtin_ia32_pblendd256",
-    "llvm.x86.avx2.pblendvb" => "__builtin_ia32_pblendvb256",
-    "llvm.x86.avx2.pblendw" => "__builtin_ia32_pblendw256",
-    "llvm.x86.avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
-    "llvm.x86.avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
-    "llvm.x86.avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
-    "llvm.x86.avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
-    "llvm.x86.avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
-    "llvm.x86.avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
-    "llvm.x86.avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
-    "llvm.x86.avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
-    "llvm.x86.avx2.permd" => "__builtin_ia32_permvarsi256",
-    "llvm.x86.avx2.permps" => "__builtin_ia32_permvarsf256",
-    "llvm.x86.avx2.phadd.d" => "__builtin_ia32_phaddd256",
-    "llvm.x86.avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
-    "llvm.x86.avx2.phadd.w" => "__builtin_ia32_phaddw256",
-    "llvm.x86.avx2.phsub.d" => "__builtin_ia32_phsubd256",
-    "llvm.x86.avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
-    "llvm.x86.avx2.phsub.w" => "__builtin_ia32_phsubw256",
-    "llvm.x86.avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
-    "llvm.x86.avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
-    "llvm.x86.avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
-    "llvm.x86.avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
-    "llvm.x86.avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
-    "llvm.x86.avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
-    "llvm.x86.avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
-    "llvm.x86.avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
-    "llvm.x86.avx2.pmins.b" => "__builtin_ia32_pminsb256",
-    "llvm.x86.avx2.pmins.d" => "__builtin_ia32_pminsd256",
-    "llvm.x86.avx2.pmins.w" => "__builtin_ia32_pminsw256",
-    "llvm.x86.avx2.pminu.b" => "__builtin_ia32_pminub256",
-    "llvm.x86.avx2.pminu.d" => "__builtin_ia32_pminud256",
-    "llvm.x86.avx2.pminu.w" => "__builtin_ia32_pminuw256",
-    "llvm.x86.avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
-    "llvm.x86.avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
-    "llvm.x86.avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
-    "llvm.x86.avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
-    "llvm.x86.avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
-    "llvm.x86.avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
-    "llvm.x86.avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
-    "llvm.x86.avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
-    "llvm.x86.avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
-    "llvm.x86.avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
-    "llvm.x86.avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
-    "llvm.x86.avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
-    "llvm.x86.avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
-    "llvm.x86.avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
-    "llvm.x86.avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
-    "llvm.x86.avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
-    "llvm.x86.avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
-    "llvm.x86.avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
-    "llvm.x86.avx2.psad.bw" => "__builtin_ia32_psadbw256",
-    "llvm.x86.avx2.pshuf.b" => "__builtin_ia32_pshufb256",
-    "llvm.x86.avx2.psign.b" => "__builtin_ia32_psignb256",
-    "llvm.x86.avx2.psign.d" => "__builtin_ia32_psignd256",
-    "llvm.x86.avx2.psign.w" => "__builtin_ia32_psignw256",
-    "llvm.x86.avx2.psll.d" => "__builtin_ia32_pslld256",
-    "llvm.x86.avx2.psll.dq" => "__builtin_ia32_pslldqi256",
-    "llvm.x86.avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
-    "llvm.x86.avx2.psll.q" => "__builtin_ia32_psllq256",
-    "llvm.x86.avx2.psll.w" => "__builtin_ia32_psllw256",
-    "llvm.x86.avx2.pslli.d" => "__builtin_ia32_pslldi256",
-    "llvm.x86.avx2.pslli.q" => "__builtin_ia32_psllqi256",
-    "llvm.x86.avx2.pslli.w" => "__builtin_ia32_psllwi256",
-    "llvm.x86.avx2.psllv.d" => "__builtin_ia32_psllv4si",
-    "llvm.x86.avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
-    "llvm.x86.avx2.psllv.q" => "__builtin_ia32_psllv2di",
-    "llvm.x86.avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
-    "llvm.x86.avx2.psra.d" => "__builtin_ia32_psrad256",
-    "llvm.x86.avx2.psra.w" => "__builtin_ia32_psraw256",
-    "llvm.x86.avx2.psrai.d" => "__builtin_ia32_psradi256",
-    "llvm.x86.avx2.psrai.w" => "__builtin_ia32_psrawi256",
-    "llvm.x86.avx2.psrav.d" => "__builtin_ia32_psrav4si",
-    "llvm.x86.avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
-    "llvm.x86.avx2.psrl.d" => "__builtin_ia32_psrld256",
-    "llvm.x86.avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
-    "llvm.x86.avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
-    "llvm.x86.avx2.psrl.q" => "__builtin_ia32_psrlq256",
-    "llvm.x86.avx2.psrl.w" => "__builtin_ia32_psrlw256",
-    "llvm.x86.avx2.psrli.d" => "__builtin_ia32_psrldi256",
-    "llvm.x86.avx2.psrli.q" => "__builtin_ia32_psrlqi256",
-    "llvm.x86.avx2.psrli.w" => "__builtin_ia32_psrlwi256",
-    "llvm.x86.avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
-    "llvm.x86.avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
-    "llvm.x86.avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
-    "llvm.x86.avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
-    "llvm.x86.avx2.psubs.b" => "__builtin_ia32_psubsb256",
-    "llvm.x86.avx2.psubs.w" => "__builtin_ia32_psubsw256",
-    "llvm.x86.avx2.psubus.b" => "__builtin_ia32_psubusb256",
-    "llvm.x86.avx2.psubus.w" => "__builtin_ia32_psubusw256",
-    "llvm.x86.avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
-    "llvm.x86.avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
-    "llvm.x86.avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
-    "llvm.x86.avx2.vextracti128" => "__builtin_ia32_extract128i256",
-    "llvm.x86.avx2.vinserti128" => "__builtin_ia32_insert128i256",
-    "llvm.x86.avx2.vpdpbssd.128" => "__builtin_ia32_vpdpbssd128",
-    "llvm.x86.avx2.vpdpbssd.256" => "__builtin_ia32_vpdpbssd256",
-    "llvm.x86.avx2.vpdpbssds.128" => "__builtin_ia32_vpdpbssds128",
-    "llvm.x86.avx2.vpdpbssds.256" => "__builtin_ia32_vpdpbssds256",
-    "llvm.x86.avx2.vpdpbsud.128" => "__builtin_ia32_vpdpbsud128",
-    "llvm.x86.avx2.vpdpbsud.256" => "__builtin_ia32_vpdpbsud256",
-    "llvm.x86.avx2.vpdpbsuds.128" => "__builtin_ia32_vpdpbsuds128",
-    "llvm.x86.avx2.vpdpbsuds.256" => "__builtin_ia32_vpdpbsuds256",
-    "llvm.x86.avx2.vpdpbuud.128" => "__builtin_ia32_vpdpbuud128",
-    "llvm.x86.avx2.vpdpbuud.256" => "__builtin_ia32_vpdpbuud256",
-    "llvm.x86.avx2.vpdpbuuds.128" => "__builtin_ia32_vpdpbuuds128",
-    "llvm.x86.avx2.vpdpbuuds.256" => "__builtin_ia32_vpdpbuuds256",
-    "llvm.x86.avx2.vpdpwsud.128" => "__builtin_ia32_vpdpwsud128",
-    "llvm.x86.avx2.vpdpwsud.256" => "__builtin_ia32_vpdpwsud256",
-    "llvm.x86.avx2.vpdpwsuds.128" => "__builtin_ia32_vpdpwsuds128",
-    "llvm.x86.avx2.vpdpwsuds.256" => "__builtin_ia32_vpdpwsuds256",
-    "llvm.x86.avx2.vpdpwusd.128" => "__builtin_ia32_vpdpwusd128",
-    "llvm.x86.avx2.vpdpwusd.256" => "__builtin_ia32_vpdpwusd256",
-    "llvm.x86.avx2.vpdpwusds.128" => "__builtin_ia32_vpdpwusds128",
-    "llvm.x86.avx2.vpdpwusds.256" => "__builtin_ia32_vpdpwusds256",
-    "llvm.x86.avx2.vpdpwuud.128" => "__builtin_ia32_vpdpwuud128",
-    "llvm.x86.avx2.vpdpwuud.256" => "__builtin_ia32_vpdpwuud256",
-    "llvm.x86.avx2.vpdpwuuds.128" => "__builtin_ia32_vpdpwuuds128",
-    "llvm.x86.avx2.vpdpwuuds.256" => "__builtin_ia32_vpdpwuuds256",
-    "llvm.x86.avx2.vperm2i128" => "__builtin_ia32_permti256",
-    "llvm.x86.avx512.add.pd.512" => "__builtin_ia32_addpd512",
-    "llvm.x86.avx512.add.ps.512" => "__builtin_ia32_addps512",
-    "llvm.x86.avx512.broadcastmb.128" => "__builtin_ia32_broadcastmb128",
-    "llvm.x86.avx512.broadcastmb.256" => "__builtin_ia32_broadcastmb256",
-    "llvm.x86.avx512.broadcastmb.512" => "__builtin_ia32_broadcastmb512",
-    "llvm.x86.avx512.broadcastmw.128" => "__builtin_ia32_broadcastmw128",
-    "llvm.x86.avx512.broadcastmw.256" => "__builtin_ia32_broadcastmw256",
-    "llvm.x86.avx512.broadcastmw.512" => "__builtin_ia32_broadcastmw512",
-    "llvm.x86.avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128",
-    "llvm.x86.avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256",
-    "llvm.x86.avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512",
-    "llvm.x86.avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
-    "llvm.x86.avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
-    "llvm.x86.avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
-    "llvm.x86.avx512.cvtb2mask.128" => "__builtin_ia32_cvtb2mask128",
-    "llvm.x86.avx512.cvtb2mask.256" => "__builtin_ia32_cvtb2mask256",
-    "llvm.x86.avx512.cvtb2mask.512" => "__builtin_ia32_cvtb2mask512",
-    "llvm.x86.avx512.cvtd2mask.128" => "__builtin_ia32_cvtd2mask128",
-    "llvm.x86.avx512.cvtd2mask.256" => "__builtin_ia32_cvtd2mask256",
-    "llvm.x86.avx512.cvtd2mask.512" => "__builtin_ia32_cvtd2mask512",
-    "llvm.x86.avx512.cvtmask2b.128" => "__builtin_ia32_cvtmask2b128",
-    "llvm.x86.avx512.cvtmask2b.256" => "__builtin_ia32_cvtmask2b256",
-    "llvm.x86.avx512.cvtmask2b.512" => "__builtin_ia32_cvtmask2b512",
-    "llvm.x86.avx512.cvtmask2d.128" => "__builtin_ia32_cvtmask2d128",
-    "llvm.x86.avx512.cvtmask2d.256" => "__builtin_ia32_cvtmask2d256",
-    "llvm.x86.avx512.cvtmask2d.512" => "__builtin_ia32_cvtmask2d512",
-    "llvm.x86.avx512.cvtmask2q.128" => "__builtin_ia32_cvtmask2q128",
-    "llvm.x86.avx512.cvtmask2q.256" => "__builtin_ia32_cvtmask2q256",
-    "llvm.x86.avx512.cvtmask2q.512" => "__builtin_ia32_cvtmask2q512",
-    "llvm.x86.avx512.cvtmask2w.128" => "__builtin_ia32_cvtmask2w128",
-    "llvm.x86.avx512.cvtmask2w.256" => "__builtin_ia32_cvtmask2w256",
-    "llvm.x86.avx512.cvtmask2w.512" => "__builtin_ia32_cvtmask2w512",
-    "llvm.x86.avx512.cvtq2mask.128" => "__builtin_ia32_cvtq2mask128",
-    "llvm.x86.avx512.cvtq2mask.256" => "__builtin_ia32_cvtq2mask256",
-    "llvm.x86.avx512.cvtq2mask.512" => "__builtin_ia32_cvtq2mask512",
-    "llvm.x86.avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
-    "llvm.x86.avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
-    "llvm.x86.avx512.cvtsi2sd32" => "__builtin_ia32_cvtsi2sd32",
-    "llvm.x86.avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
-    "llvm.x86.avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
-    "llvm.x86.avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
-    "llvm.x86.avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
-    "llvm.x86.avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
-    "llvm.x86.avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
-    "llvm.x86.avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
-    "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
-    "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
-    "llvm.x86.avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
-    "llvm.x86.avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
-    "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
-    "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
-    "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd32",
-    "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
-    "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
-    "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
-    // [DUPLICATE]: "llvm.x86.avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
-    "llvm.x86.avx512.cvtw2mask.128" => "__builtin_ia32_cvtw2mask128",
-    "llvm.x86.avx512.cvtw2mask.256" => "__builtin_ia32_cvtw2mask256",
-    "llvm.x86.avx512.cvtw2mask.512" => "__builtin_ia32_cvtw2mask512",
-    "llvm.x86.avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
-    "llvm.x86.avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
-    "llvm.x86.avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
-    "llvm.x86.avx512.div.pd.512" => "__builtin_ia32_divpd512",
-    "llvm.x86.avx512.div.ps.512" => "__builtin_ia32_divps512",
-    "llvm.x86.avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask",
-    "llvm.x86.avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask",
-    "llvm.x86.avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
-    "llvm.x86.avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
-    "llvm.x86.avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
-    "llvm.x86.avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
-    "llvm.x86.avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
-    "llvm.x86.avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
-    "llvm.x86.avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
-    "llvm.x86.avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
-    "llvm.x86.avx512.gather3div2.df" => "__builtin_ia32_gather3div2df",
-    "llvm.x86.avx512.gather3div2.di" => "__builtin_ia32_gather3div2di",
-    "llvm.x86.avx512.gather3div4.df" => "__builtin_ia32_gather3div4df",
-    "llvm.x86.avx512.gather3div4.di" => "__builtin_ia32_gather3div4di",
-    "llvm.x86.avx512.gather3div4.sf" => "__builtin_ia32_gather3div4sf",
-    "llvm.x86.avx512.gather3div4.si" => "__builtin_ia32_gather3div4si",
-    "llvm.x86.avx512.gather3div8.sf" => "__builtin_ia32_gather3div8sf",
-    "llvm.x86.avx512.gather3div8.si" => "__builtin_ia32_gather3div8si",
-    "llvm.x86.avx512.gather3siv2.df" => "__builtin_ia32_gather3siv2df",
-    "llvm.x86.avx512.gather3siv2.di" => "__builtin_ia32_gather3siv2di",
-    "llvm.x86.avx512.gather3siv4.df" => "__builtin_ia32_gather3siv4df",
-    "llvm.x86.avx512.gather3siv4.di" => "__builtin_ia32_gather3siv4di",
-    "llvm.x86.avx512.gather3siv4.sf" => "__builtin_ia32_gather3siv4sf",
-    "llvm.x86.avx512.gather3siv4.si" => "__builtin_ia32_gather3siv4si",
-    "llvm.x86.avx512.gather3siv8.sf" => "__builtin_ia32_gather3siv8sf",
-    "llvm.x86.avx512.gather3siv8.si" => "__builtin_ia32_gather3siv8si",
-    "llvm.x86.avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
-    "llvm.x86.avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
-    "llvm.x86.avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
-    "llvm.x86.avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
-    "llvm.x86.avx512.kand.w" => "__builtin_ia32_kandhi",
-    "llvm.x86.avx512.kandn.w" => "__builtin_ia32_kandnhi",
-    "llvm.x86.avx512.knot.w" => "__builtin_ia32_knothi",
-    "llvm.x86.avx512.kor.w" => "__builtin_ia32_korhi",
-    "llvm.x86.avx512.kortestc.w" => "__builtin_ia32_kortestchi",
-    "llvm.x86.avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
-    "llvm.x86.avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
-    "llvm.x86.avx512.kunpck.dq" => "__builtin_ia32_kunpckdi",
-    "llvm.x86.avx512.kunpck.wd" => "__builtin_ia32_kunpcksi",
-    "llvm.x86.avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
-    "llvm.x86.avx512.kxor.w" => "__builtin_ia32_kxorhi",
-    "llvm.x86.avx512.mask.add.pd.128" => "__builtin_ia32_addpd128_mask",
-    "llvm.x86.avx512.mask.add.pd.256" => "__builtin_ia32_addpd256_mask",
-    "llvm.x86.avx512.mask.add.pd.512" => "__builtin_ia32_addpd512_mask",
-    "llvm.x86.avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask",
-    "llvm.x86.avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask",
-    "llvm.x86.avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
-    "llvm.x86.avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask",
-    "llvm.x86.avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask",
-    "llvm.x86.avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask",
-    "llvm.x86.avx512.mask.and.ps.128" => "__builtin_ia32_andps128_mask",
-    "llvm.x86.avx512.mask.and.ps.256" => "__builtin_ia32_andps256_mask",
-    "llvm.x86.avx512.mask.and.ps.512" => "__builtin_ia32_andps512_mask",
-    "llvm.x86.avx512.mask.andn.pd.128" => "__builtin_ia32_andnpd128_mask",
-    "llvm.x86.avx512.mask.andn.pd.256" => "__builtin_ia32_andnpd256_mask",
-    "llvm.x86.avx512.mask.andn.pd.512" => "__builtin_ia32_andnpd512_mask",
-    "llvm.x86.avx512.mask.andn.ps.128" => "__builtin_ia32_andnps128_mask",
-    "llvm.x86.avx512.mask.andn.ps.256" => "__builtin_ia32_andnps256_mask",
-    "llvm.x86.avx512.mask.andn.ps.512" => "__builtin_ia32_andnps512_mask",
-    "llvm.x86.avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
-    "llvm.x86.avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
-    "llvm.x86.avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
-    "llvm.x86.avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
-    "llvm.x86.avx512.mask.broadcastf32x2.256" => "__builtin_ia32_broadcastf32x2_256_mask",
-    "llvm.x86.avx512.mask.broadcastf32x2.512" => "__builtin_ia32_broadcastf32x2_512_mask",
-    "llvm.x86.avx512.mask.broadcastf32x4.256" => "__builtin_ia32_broadcastf32x4_256_mask",
-    "llvm.x86.avx512.mask.broadcastf32x4.512" => "__builtin_ia32_broadcastf32x4_512",
-    "llvm.x86.avx512.mask.broadcastf32x8.512" => "__builtin_ia32_broadcastf32x8_512_mask",
-    "llvm.x86.avx512.mask.broadcastf64x2.256" => "__builtin_ia32_broadcastf64x2_256_mask",
-    "llvm.x86.avx512.mask.broadcastf64x2.512" => "__builtin_ia32_broadcastf64x2_512_mask",
-    "llvm.x86.avx512.mask.broadcastf64x4.512" => "__builtin_ia32_broadcastf64x4_512",
-    "llvm.x86.avx512.mask.broadcasti32x2.128" => "__builtin_ia32_broadcasti32x2_128_mask",
-    "llvm.x86.avx512.mask.broadcasti32x2.256" => "__builtin_ia32_broadcasti32x2_256_mask",
-    "llvm.x86.avx512.mask.broadcasti32x2.512" => "__builtin_ia32_broadcasti32x2_512_mask",
-    "llvm.x86.avx512.mask.broadcasti32x4.256" => "__builtin_ia32_broadcasti32x4_256_mask",
-    "llvm.x86.avx512.mask.broadcasti32x4.512" => "__builtin_ia32_broadcasti32x4_512",
-    "llvm.x86.avx512.mask.broadcasti32x8.512" => "__builtin_ia32_broadcasti32x8_512_mask",
-    "llvm.x86.avx512.mask.broadcasti64x2.256" => "__builtin_ia32_broadcasti64x2_256_mask",
-    "llvm.x86.avx512.mask.broadcasti64x2.512" => "__builtin_ia32_broadcasti64x2_512_mask",
-    "llvm.x86.avx512.mask.broadcasti64x4.512" => "__builtin_ia32_broadcasti64x4_512",
-    "llvm.x86.avx512.mask.cmp.pd.128" => "__builtin_ia32_cmppd128_mask",
-    "llvm.x86.avx512.mask.cmp.pd.256" => "__builtin_ia32_cmppd256_mask",
-    "llvm.x86.avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
-    "llvm.x86.avx512.mask.cmp.ps.128" => "__builtin_ia32_cmpps128_mask",
-    "llvm.x86.avx512.mask.cmp.ps.256" => "__builtin_ia32_cmpps256_mask",
-    "llvm.x86.avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
-    "llvm.x86.avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
-    "llvm.x86.avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
-    "llvm.x86.avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
-    "llvm.x86.avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
-    "llvm.x86.avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
-    "llvm.x86.avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
-    "llvm.x86.avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
-    "llvm.x86.avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
-    "llvm.x86.avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
-    "llvm.x86.avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
-    "llvm.x86.avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
-    "llvm.x86.avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
-    "llvm.x86.avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
-    "llvm.x86.avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
-    "llvm.x86.avx512.mask.compress.store.d.128" => "__builtin_ia32_compressstoresi128_mask",
-    "llvm.x86.avx512.mask.compress.store.d.256" => "__builtin_ia32_compressstoresi256_mask",
-    "llvm.x86.avx512.mask.compress.store.d.512" => "__builtin_ia32_compressstoresi512_mask",
-    "llvm.x86.avx512.mask.compress.store.pd.128" => "__builtin_ia32_compressstoredf128_mask",
-    "llvm.x86.avx512.mask.compress.store.pd.256" => "__builtin_ia32_compressstoredf256_mask",
-    "llvm.x86.avx512.mask.compress.store.pd.512" => "__builtin_ia32_compressstoredf512_mask",
-    "llvm.x86.avx512.mask.compress.store.ps.128" => "__builtin_ia32_compressstoresf128_mask",
-    "llvm.x86.avx512.mask.compress.store.ps.256" => "__builtin_ia32_compressstoresf256_mask",
-    "llvm.x86.avx512.mask.compress.store.ps.512" => "__builtin_ia32_compressstoresf512_mask",
-    "llvm.x86.avx512.mask.compress.store.q.128" => "__builtin_ia32_compressstoredi128_mask",
-    "llvm.x86.avx512.mask.compress.store.q.256" => "__builtin_ia32_compressstoredi256_mask",
-    "llvm.x86.avx512.mask.compress.store.q.512" => "__builtin_ia32_compressstoredi512_mask",
-    "llvm.x86.avx512.mask.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
-    "llvm.x86.avx512.mask.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
-    "llvm.x86.avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
-    "llvm.x86.avx512.mask.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask",
-    "llvm.x86.avx512.mask.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask",
-    "llvm.x86.avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.128" => "__builtin_ia32_cvtdq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.256" => "__builtin_ia32_cvtdq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.128" => "__builtin_ia32_cvtdq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.256" => "__builtin_ia32_cvtdq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
-    "llvm.x86.avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2dq.256" => "__builtin_ia32_cvtpd2dq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
-    "llvm.x86.avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
-    "llvm.x86.avx512.mask.cvtpd2ps.256" => "__builtin_ia32_cvtpd2ps256_mask",
-    "llvm.x86.avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
-    "llvm.x86.avx512.mask.cvtpd2qq.128" => "__builtin_ia32_cvtpd2qq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2qq.256" => "__builtin_ia32_cvtpd2qq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2qq.512" => "__builtin_ia32_cvtpd2qq512_mask",
-    "llvm.x86.avx512.mask.cvtpd2udq.128" => "__builtin_ia32_cvtpd2udq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2udq.256" => "__builtin_ia32_cvtpd2udq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
-    "llvm.x86.avx512.mask.cvtpd2uqq.128" => "__builtin_ia32_cvtpd2uqq128_mask",
-    "llvm.x86.avx512.mask.cvtpd2uqq.256" => "__builtin_ia32_cvtpd2uqq256_mask",
-    "llvm.x86.avx512.mask.cvtpd2uqq.512" => "__builtin_ia32_cvtpd2uqq512_mask",
-    "llvm.x86.avx512.mask.cvtps2dq.128" => "__builtin_ia32_cvtps2dq128_mask",
-    "llvm.x86.avx512.mask.cvtps2dq.256" => "__builtin_ia32_cvtps2dq256_mask",
-    "llvm.x86.avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
-    "llvm.x86.avx512.mask.cvtps2pd.128" => "__builtin_ia32_cvtps2pd128_mask",
-    "llvm.x86.avx512.mask.cvtps2pd.256" => "__builtin_ia32_cvtps2pd256_mask",
-    "llvm.x86.avx512.mask.cvtps2pd.512" => "__builtin_ia32_cvtps2pd512_mask",
-    "llvm.x86.avx512.mask.cvtps2qq.128" => "__builtin_ia32_cvtps2qq128_mask",
-    "llvm.x86.avx512.mask.cvtps2qq.256" => "__builtin_ia32_cvtps2qq256_mask",
-    "llvm.x86.avx512.mask.cvtps2qq.512" => "__builtin_ia32_cvtps2qq512_mask",
-    "llvm.x86.avx512.mask.cvtps2udq.128" => "__builtin_ia32_cvtps2udq128_mask",
-    "llvm.x86.avx512.mask.cvtps2udq.256" => "__builtin_ia32_cvtps2udq256_mask",
-    "llvm.x86.avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
-    "llvm.x86.avx512.mask.cvtps2uqq.128" => "__builtin_ia32_cvtps2uqq128_mask",
-    "llvm.x86.avx512.mask.cvtps2uqq.256" => "__builtin_ia32_cvtps2uqq256_mask",
-    "llvm.x86.avx512.mask.cvtps2uqq.512" => "__builtin_ia32_cvtps2uqq512_mask",
-    "llvm.x86.avx512.mask.cvtqq2pd.128" => "__builtin_ia32_cvtqq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtqq2pd.256" => "__builtin_ia32_cvtqq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtqq2pd.512" => "__builtin_ia32_cvtqq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
-    "llvm.x86.avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
-    "llvm.x86.avx512.mask.cvttpd2qq.128" => "__builtin_ia32_cvttpd2qq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2qq.256" => "__builtin_ia32_cvttpd2qq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2qq.512" => "__builtin_ia32_cvttpd2qq512_mask",
-    "llvm.x86.avx512.mask.cvttpd2udq.128" => "__builtin_ia32_cvttpd2udq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2udq.256" => "__builtin_ia32_cvttpd2udq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
-    "llvm.x86.avx512.mask.cvttpd2uqq.128" => "__builtin_ia32_cvttpd2uqq128_mask",
-    "llvm.x86.avx512.mask.cvttpd2uqq.256" => "__builtin_ia32_cvttpd2uqq256_mask",
-    "llvm.x86.avx512.mask.cvttpd2uqq.512" => "__builtin_ia32_cvttpd2uqq512_mask",
-    "llvm.x86.avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
-    "llvm.x86.avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
-    "llvm.x86.avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
-    "llvm.x86.avx512.mask.cvttps2qq.128" => "__builtin_ia32_cvttps2qq128_mask",
-    "llvm.x86.avx512.mask.cvttps2qq.256" => "__builtin_ia32_cvttps2qq256_mask",
-    "llvm.x86.avx512.mask.cvttps2qq.512" => "__builtin_ia32_cvttps2qq512_mask",
-    "llvm.x86.avx512.mask.cvttps2udq.128" => "__builtin_ia32_cvttps2udq128_mask",
-    "llvm.x86.avx512.mask.cvttps2udq.256" => "__builtin_ia32_cvttps2udq256_mask",
-    "llvm.x86.avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
-    "llvm.x86.avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
-    "llvm.x86.avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
-    "llvm.x86.avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.128" => "__builtin_ia32_cvtudq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.256" => "__builtin_ia32_cvtudq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.128" => "__builtin_ia32_cvtudq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.256" => "__builtin_ia32_cvtudq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
-    "llvm.x86.avx512.mask.cvtuqq2pd.128" => "__builtin_ia32_cvtuqq2pd128_mask",
-    "llvm.x86.avx512.mask.cvtuqq2pd.256" => "__builtin_ia32_cvtuqq2pd256_mask",
-    "llvm.x86.avx512.mask.cvtuqq2pd.512" => "__builtin_ia32_cvtuqq2pd512_mask",
-    "llvm.x86.avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
-    "llvm.x86.avx512.mask.cvtuqq2ps.256" => "__builtin_ia32_cvtuqq2ps256_mask",
-    "llvm.x86.avx512.mask.cvtuqq2ps.512" => "__builtin_ia32_cvtuqq2ps512_mask",
-    "llvm.x86.avx512.mask.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
-    "llvm.x86.avx512.mask.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
-    "llvm.x86.avx512.mask.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
-    "llvm.x86.avx512.mask.div.pd.128" => "__builtin_ia32_divpd_mask",
-    "llvm.x86.avx512.mask.div.pd.256" => "__builtin_ia32_divpd256_mask",
-    "llvm.x86.avx512.mask.div.pd.512" => "__builtin_ia32_divpd512_mask",
-    "llvm.x86.avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask",
-    "llvm.x86.avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask",
-    "llvm.x86.avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
-    "llvm.x86.avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask",
-    "llvm.x86.avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask",
-    "llvm.x86.avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask",
-    "llvm.x86.avx512.mask.expand.load.d.128" => "__builtin_ia32_expandloadsi128_mask",
-    "llvm.x86.avx512.mask.expand.load.d.256" => "__builtin_ia32_expandloadsi256_mask",
-    "llvm.x86.avx512.mask.expand.load.d.512" => "__builtin_ia32_expandloadsi512_mask",
-    "llvm.x86.avx512.mask.expand.load.pd.128" => "__builtin_ia32_expandloaddf128_mask",
-    "llvm.x86.avx512.mask.expand.load.pd.256" => "__builtin_ia32_expandloaddf256_mask",
-    "llvm.x86.avx512.mask.expand.load.pd.512" => "__builtin_ia32_expandloaddf512_mask",
-    "llvm.x86.avx512.mask.expand.load.ps.128" => "__builtin_ia32_expandloadsf128_mask",
-    "llvm.x86.avx512.mask.expand.load.ps.256" => "__builtin_ia32_expandloadsf256_mask",
-    "llvm.x86.avx512.mask.expand.load.ps.512" => "__builtin_ia32_expandloadsf512_mask",
-    "llvm.x86.avx512.mask.expand.load.q.128" => "__builtin_ia32_expandloaddi128_mask",
-    "llvm.x86.avx512.mask.expand.load.q.256" => "__builtin_ia32_expandloaddi256_mask",
-    "llvm.x86.avx512.mask.expand.load.q.512" => "__builtin_ia32_expandloaddi512_mask",
-    "llvm.x86.avx512.mask.expand.pd.128" => "__builtin_ia32_expanddf128_mask",
-    "llvm.x86.avx512.mask.expand.pd.256" => "__builtin_ia32_expanddf256_mask",
-    "llvm.x86.avx512.mask.expand.pd.512" => "__builtin_ia32_expanddf512_mask",
-    "llvm.x86.avx512.mask.expand.ps.128" => "__builtin_ia32_expandsf128_mask",
-    "llvm.x86.avx512.mask.expand.ps.256" => "__builtin_ia32_expandsf256_mask",
-    "llvm.x86.avx512.mask.expand.ps.512" => "__builtin_ia32_expandsf512_mask",
-    "llvm.x86.avx512.mask.expand.q.128" => "__builtin_ia32_expanddi128_mask",
-    "llvm.x86.avx512.mask.expand.q.256" => "__builtin_ia32_expanddi256_mask",
-    "llvm.x86.avx512.mask.expand.q.512" => "__builtin_ia32_expanddi512_mask",
-    "llvm.x86.avx512.mask.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_mask",
-    "llvm.x86.avx512.mask.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_mask",
-    "llvm.x86.avx512.mask.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_mask",
-    "llvm.x86.avx512.mask.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_mask",
-    "llvm.x86.avx512.mask.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_mask",
-    "llvm.x86.avx512.mask.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_mask",
-    "llvm.x86.avx512.mask.fixupimm.sd" => "__builtin_ia32_fixupimmsd_mask",
-    "llvm.x86.avx512.mask.fixupimm.ss" => "__builtin_ia32_fixupimmss_mask",
-    "llvm.x86.avx512.mask.fpclass.pd.128" => "__builtin_ia32_fpclasspd128_mask",
-    "llvm.x86.avx512.mask.fpclass.pd.256" => "__builtin_ia32_fpclasspd256_mask",
-    "llvm.x86.avx512.mask.fpclass.pd.512" => "__builtin_ia32_fpclasspd512_mask",
-    "llvm.x86.avx512.mask.fpclass.ps.128" => "__builtin_ia32_fpclassps128_mask",
-    "llvm.x86.avx512.mask.fpclass.ps.256" => "__builtin_ia32_fpclassps256_mask",
-    "llvm.x86.avx512.mask.fpclass.ps.512" => "__builtin_ia32_fpclassps512_mask",
-    "llvm.x86.avx512.mask.fpclass.sd" => "__builtin_ia32_fpclasssd_mask",
-    "llvm.x86.avx512.mask.fpclass.ss" => "__builtin_ia32_fpclassss_mask",
-    "llvm.x86.avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
-    "llvm.x86.avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
-    "llvm.x86.avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
-    "llvm.x86.avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
-    "llvm.x86.avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
-    "llvm.x86.avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
-    "llvm.x86.avx512.mask.getmant.pd.128" => "__builtin_ia32_getmantpd128_mask",
-    "llvm.x86.avx512.mask.getmant.pd.256" => "__builtin_ia32_getmantpd256_mask",
-    "llvm.x86.avx512.mask.getmant.pd.512" => "__builtin_ia32_getmantpd512_mask",
-    "llvm.x86.avx512.mask.getmant.ps.128" => "__builtin_ia32_getmantps128_mask",
-    "llvm.x86.avx512.mask.getmant.ps.256" => "__builtin_ia32_getmantps256_mask",
-    "llvm.x86.avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
-    "llvm.x86.avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask",
-    "llvm.x86.avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask",
-    "llvm.x86.avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask",
-    "llvm.x86.avx512.mask.insertf64x2.256" => "__builtin_ia32_insertf64x2_256_mask",
-    "llvm.x86.avx512.mask.insertf64x2.512" => "__builtin_ia32_insertf64x2_512_mask",
-    "llvm.x86.avx512.mask.insertf64x4.512" => "__builtin_ia32_insertf64x4_mask",
-    "llvm.x86.avx512.mask.inserti32x4.256" => "__builtin_ia32_inserti32x4_256_mask",
-    "llvm.x86.avx512.mask.inserti32x4.512" => "__builtin_ia32_inserti32x4_mask",
-    "llvm.x86.avx512.mask.inserti32x8.512" => "__builtin_ia32_inserti32x8_mask",
-    "llvm.x86.avx512.mask.inserti64x2.256" => "__builtin_ia32_inserti64x2_256_mask",
-    "llvm.x86.avx512.mask.inserti64x2.512" => "__builtin_ia32_inserti64x2_512_mask",
-    "llvm.x86.avx512.mask.inserti64x4.512" => "__builtin_ia32_inserti64x4_mask",
-    "llvm.x86.avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
-    "llvm.x86.avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
-    "llvm.x86.avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
-    "llvm.x86.avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
-    "llvm.x86.avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
-    "llvm.x86.avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
-    "llvm.x86.avx512.mask.max.pd.128" => "__builtin_ia32_maxpd_mask",
-    "llvm.x86.avx512.mask.max.pd.256" => "__builtin_ia32_maxpd256_mask",
-    "llvm.x86.avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
-    "llvm.x86.avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask",
-    "llvm.x86.avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask",
-    "llvm.x86.avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
-    "llvm.x86.avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask",
-    "llvm.x86.avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask",
-    "llvm.x86.avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
-    "llvm.x86.avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask",
-    "llvm.x86.avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask",
-    "llvm.x86.avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
-    "llvm.x86.avx512.mask.move.sd" => "__builtin_ia32_movsd_mask",
-    "llvm.x86.avx512.mask.move.ss" => "__builtin_ia32_movss_mask",
-    "llvm.x86.avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask",
-    "llvm.x86.avx512.mask.mul.pd.256" => "__builtin_ia32_mulpd256_mask",
-    "llvm.x86.avx512.mask.mul.pd.512" => "__builtin_ia32_mulpd512_mask",
-    "llvm.x86.avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask",
-    "llvm.x86.avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask",
-    "llvm.x86.avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
-    "llvm.x86.avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask",
-    "llvm.x86.avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask",
-    "llvm.x86.avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask",
-    "llvm.x86.avx512.mask.or.ps.128" => "__builtin_ia32_orps128_mask",
-    "llvm.x86.avx512.mask.or.ps.256" => "__builtin_ia32_orps256_mask",
-    "llvm.x86.avx512.mask.or.ps.512" => "__builtin_ia32_orps512_mask",
-    "llvm.x86.avx512.mask.pabs.b.128" => "__builtin_ia32_pabsb128_mask",
-    "llvm.x86.avx512.mask.pabs.b.256" => "__builtin_ia32_pabsb256_mask",
-    "llvm.x86.avx512.mask.pabs.b.512" => "__builtin_ia32_pabsb512_mask",
-    "llvm.x86.avx512.mask.pabs.d.128" => "__builtin_ia32_pabsd128_mask",
-    "llvm.x86.avx512.mask.pabs.d.256" => "__builtin_ia32_pabsd256_mask",
-    "llvm.x86.avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
-    "llvm.x86.avx512.mask.pabs.q.128" => "__builtin_ia32_pabsq128_mask",
-    "llvm.x86.avx512.mask.pabs.q.256" => "__builtin_ia32_pabsq256_mask",
-    "llvm.x86.avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
-    "llvm.x86.avx512.mask.pabs.w.128" => "__builtin_ia32_pabsw128_mask",
-    "llvm.x86.avx512.mask.pabs.w.256" => "__builtin_ia32_pabsw256_mask",
-    "llvm.x86.avx512.mask.pabs.w.512" => "__builtin_ia32_pabsw512_mask",
-    "llvm.x86.avx512.mask.packssdw.128" => "__builtin_ia32_packssdw128_mask",
-    "llvm.x86.avx512.mask.packssdw.256" => "__builtin_ia32_packssdw256_mask",
-    "llvm.x86.avx512.mask.packssdw.512" => "__builtin_ia32_packssdw512_mask",
-    "llvm.x86.avx512.mask.packsswb.128" => "__builtin_ia32_packsswb128_mask",
-    "llvm.x86.avx512.mask.packsswb.256" => "__builtin_ia32_packsswb256_mask",
-    "llvm.x86.avx512.mask.packsswb.512" => "__builtin_ia32_packsswb512_mask",
-    "llvm.x86.avx512.mask.packusdw.128" => "__builtin_ia32_packusdw128_mask",
-    "llvm.x86.avx512.mask.packusdw.256" => "__builtin_ia32_packusdw256_mask",
-    "llvm.x86.avx512.mask.packusdw.512" => "__builtin_ia32_packusdw512_mask",
-    "llvm.x86.avx512.mask.packuswb.128" => "__builtin_ia32_packuswb128_mask",
-    "llvm.x86.avx512.mask.packuswb.256" => "__builtin_ia32_packuswb256_mask",
-    "llvm.x86.avx512.mask.packuswb.512" => "__builtin_ia32_packuswb512_mask",
-    "llvm.x86.avx512.mask.padd.b.128" => "__builtin_ia32_paddb128_mask",
-    "llvm.x86.avx512.mask.padd.b.256" => "__builtin_ia32_paddb256_mask",
-    "llvm.x86.avx512.mask.padd.b.512" => "__builtin_ia32_paddb512_mask",
-    "llvm.x86.avx512.mask.padd.d.128" => "__builtin_ia32_paddd128_mask",
-    "llvm.x86.avx512.mask.padd.d.256" => "__builtin_ia32_paddd256_mask",
-    "llvm.x86.avx512.mask.padd.d.512" => "__builtin_ia32_paddd512_mask",
-    "llvm.x86.avx512.mask.padd.q.128" => "__builtin_ia32_paddq128_mask",
-    "llvm.x86.avx512.mask.padd.q.256" => "__builtin_ia32_paddq256_mask",
-    "llvm.x86.avx512.mask.padd.q.512" => "__builtin_ia32_paddq512_mask",
-    "llvm.x86.avx512.mask.padd.w.128" => "__builtin_ia32_paddw128_mask",
-    "llvm.x86.avx512.mask.padd.w.256" => "__builtin_ia32_paddw256_mask",
-    "llvm.x86.avx512.mask.padd.w.512" => "__builtin_ia32_paddw512_mask",
-    "llvm.x86.avx512.mask.padds.b.128" => "__builtin_ia32_paddsb128_mask",
-    "llvm.x86.avx512.mask.padds.b.256" => "__builtin_ia32_paddsb256_mask",
-    "llvm.x86.avx512.mask.padds.b.512" => "__builtin_ia32_paddsb512_mask",
-    "llvm.x86.avx512.mask.padds.w.128" => "__builtin_ia32_paddsw128_mask",
-    "llvm.x86.avx512.mask.padds.w.256" => "__builtin_ia32_paddsw256_mask",
-    "llvm.x86.avx512.mask.padds.w.512" => "__builtin_ia32_paddsw512_mask",
-    "llvm.x86.avx512.mask.paddus.b.128" => "__builtin_ia32_paddusb128_mask",
-    "llvm.x86.avx512.mask.paddus.b.256" => "__builtin_ia32_paddusb256_mask",
-    "llvm.x86.avx512.mask.paddus.b.512" => "__builtin_ia32_paddusb512_mask",
-    "llvm.x86.avx512.mask.paddus.w.128" => "__builtin_ia32_paddusw128_mask",
-    "llvm.x86.avx512.mask.paddus.w.256" => "__builtin_ia32_paddusw256_mask",
-    "llvm.x86.avx512.mask.paddus.w.512" => "__builtin_ia32_paddusw512_mask",
-    "llvm.x86.avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
-    "llvm.x86.avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
-    "llvm.x86.avx512.mask.pavg.b.128" => "__builtin_ia32_pavgb128_mask",
-    "llvm.x86.avx512.mask.pavg.b.256" => "__builtin_ia32_pavgb256_mask",
-    "llvm.x86.avx512.mask.pavg.b.512" => "__builtin_ia32_pavgb512_mask",
-    "llvm.x86.avx512.mask.pavg.w.128" => "__builtin_ia32_pavgw128_mask",
-    "llvm.x86.avx512.mask.pavg.w.256" => "__builtin_ia32_pavgw256_mask",
-    "llvm.x86.avx512.mask.pavg.w.512" => "__builtin_ia32_pavgw512_mask",
-    "llvm.x86.avx512.mask.pbroadcast.b.gpr.128" => "__builtin_ia32_pbroadcastb128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.b.gpr.256" => "__builtin_ia32_pbroadcastb256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.b.gpr.512" => "__builtin_ia32_pbroadcastb512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.128" => "__builtin_ia32_pbroadcastd128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.256" => "__builtin_ia32_pbroadcastd256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.128" => "__builtin_ia32_pbroadcastq128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.256" => "__builtin_ia32_pbroadcastq256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
-    "llvm.x86.avx512.mask.pbroadcast.w.gpr.128" => "__builtin_ia32_pbroadcastw128_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.w.gpr.256" => "__builtin_ia32_pbroadcastw256_gpr_mask",
-    "llvm.x86.avx512.mask.pbroadcast.w.gpr.512" => "__builtin_ia32_pbroadcastw512_gpr_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
-    "llvm.x86.avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
-    "llvm.x86.avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
-    "llvm.x86.avx512.mask.permvar.df.256" => "__builtin_ia32_permvardf256_mask",
-    "llvm.x86.avx512.mask.permvar.df.512" => "__builtin_ia32_permvardf512_mask",
-    "llvm.x86.avx512.mask.permvar.di.256" => "__builtin_ia32_permvardi256_mask",
-    "llvm.x86.avx512.mask.permvar.di.512" => "__builtin_ia32_permvardi512_mask",
-    "llvm.x86.avx512.mask.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask",
-    "llvm.x86.avx512.mask.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask",
-    "llvm.x86.avx512.mask.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask",
-    "llvm.x86.avx512.mask.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask",
-    "llvm.x86.avx512.mask.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask",
-    "llvm.x86.avx512.mask.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask",
-    "llvm.x86.avx512.mask.permvar.sf.256" => "__builtin_ia32_permvarsf256_mask",
-    "llvm.x86.avx512.mask.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask",
-    "llvm.x86.avx512.mask.permvar.si.256" => "__builtin_ia32_permvarsi256_mask",
-    "llvm.x86.avx512.mask.permvar.si.512" => "__builtin_ia32_permvarsi512_mask",
-    "llvm.x86.avx512.mask.pmaddubs.w.128" => "__builtin_ia32_pmaddubsw128_mask",
-    "llvm.x86.avx512.mask.pmaddubs.w.256" => "__builtin_ia32_pmaddubsw256_mask",
-    "llvm.x86.avx512.mask.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask",
-    "llvm.x86.avx512.mask.pmaddw.d.128" => "__builtin_ia32_pmaddwd128_mask",
-    "llvm.x86.avx512.mask.pmaddw.d.256" => "__builtin_ia32_pmaddwd256_mask",
-    "llvm.x86.avx512.mask.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask",
-    "llvm.x86.avx512.mask.pmaxs.b.128" => "__builtin_ia32_pmaxsb128_mask",
-    "llvm.x86.avx512.mask.pmaxs.b.256" => "__builtin_ia32_pmaxsb256_mask",
-    "llvm.x86.avx512.mask.pmaxs.b.512" => "__builtin_ia32_pmaxsb512_mask",
-    "llvm.x86.avx512.mask.pmaxs.d.128" => "__builtin_ia32_pmaxsd128_mask",
-    "llvm.x86.avx512.mask.pmaxs.d.256" => "__builtin_ia32_pmaxsd256_mask",
-    "llvm.x86.avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
-    "llvm.x86.avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
-    "llvm.x86.avx512.mask.pmaxs.w.128" => "__builtin_ia32_pmaxsw128_mask",
-    "llvm.x86.avx512.mask.pmaxs.w.256" => "__builtin_ia32_pmaxsw256_mask",
-    "llvm.x86.avx512.mask.pmaxs.w.512" => "__builtin_ia32_pmaxsw512_mask",
-    "llvm.x86.avx512.mask.pmaxu.b.128" => "__builtin_ia32_pmaxub128_mask",
-    "llvm.x86.avx512.mask.pmaxu.b.256" => "__builtin_ia32_pmaxub256_mask",
-    "llvm.x86.avx512.mask.pmaxu.b.512" => "__builtin_ia32_pmaxub512_mask",
-    "llvm.x86.avx512.mask.pmaxu.d.128" => "__builtin_ia32_pmaxud128_mask",
-    "llvm.x86.avx512.mask.pmaxu.d.256" => "__builtin_ia32_pmaxud256_mask",
-    "llvm.x86.avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
-    "llvm.x86.avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
-    "llvm.x86.avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
-    "llvm.x86.avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
-    "llvm.x86.avx512.mask.pmaxu.w.128" => "__builtin_ia32_pmaxuw128_mask",
-    "llvm.x86.avx512.mask.pmaxu.w.256" => "__builtin_ia32_pmaxuw256_mask",
-    "llvm.x86.avx512.mask.pmaxu.w.512" => "__builtin_ia32_pmaxuw512_mask",
-    "llvm.x86.avx512.mask.pmins.b.128" => "__builtin_ia32_pminsb128_mask",
-    "llvm.x86.avx512.mask.pmins.b.256" => "__builtin_ia32_pminsb256_mask",
-    "llvm.x86.avx512.mask.pmins.b.512" => "__builtin_ia32_pminsb512_mask",
-    "llvm.x86.avx512.mask.pmins.d.128" => "__builtin_ia32_pminsd128_mask",
-    "llvm.x86.avx512.mask.pmins.d.256" => "__builtin_ia32_pminsd256_mask",
-    "llvm.x86.avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
-    "llvm.x86.avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
-    "llvm.x86.avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
-    "llvm.x86.avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
-    "llvm.x86.avx512.mask.pmins.w.128" => "__builtin_ia32_pminsw128_mask",
-    "llvm.x86.avx512.mask.pmins.w.256" => "__builtin_ia32_pminsw256_mask",
-    "llvm.x86.avx512.mask.pmins.w.512" => "__builtin_ia32_pminsw512_mask",
-    "llvm.x86.avx512.mask.pminu.b.128" => "__builtin_ia32_pminub128_mask",
-    "llvm.x86.avx512.mask.pminu.b.256" => "__builtin_ia32_pminub256_mask",
-    "llvm.x86.avx512.mask.pminu.b.512" => "__builtin_ia32_pminub512_mask",
-    "llvm.x86.avx512.mask.pminu.d.128" => "__builtin_ia32_pminud128_mask",
-    "llvm.x86.avx512.mask.pminu.d.256" => "__builtin_ia32_pminud256_mask",
-    "llvm.x86.avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
-    "llvm.x86.avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
-    "llvm.x86.avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
-    "llvm.x86.avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
-    "llvm.x86.avx512.mask.pminu.w.128" => "__builtin_ia32_pminuw128_mask",
-    "llvm.x86.avx512.mask.pminu.w.256" => "__builtin_ia32_pminuw256_mask",
-    "llvm.x86.avx512.mask.pminu.w.512" => "__builtin_ia32_pminuw512_mask",
-    "llvm.x86.avx512.mask.pmov.db.128" => "__builtin_ia32_pmovdb128_mask",
-    "llvm.x86.avx512.mask.pmov.db.256" => "__builtin_ia32_pmovdb256_mask",
-    "llvm.x86.avx512.mask.pmov.db.512" => "__builtin_ia32_pmovdb512_mask",
-    "llvm.x86.avx512.mask.pmov.db.mem.128" => "__builtin_ia32_pmovdb128mem_mask",
-    "llvm.x86.avx512.mask.pmov.db.mem.256" => "__builtin_ia32_pmovdb256mem_mask",
-    "llvm.x86.avx512.mask.pmov.db.mem.512" => "__builtin_ia32_pmovdb512mem_mask",
-    "llvm.x86.avx512.mask.pmov.dw.128" => "__builtin_ia32_pmovdw128_mask",
-    "llvm.x86.avx512.mask.pmov.dw.256" => "__builtin_ia32_pmovdw256_mask",
-    "llvm.x86.avx512.mask.pmov.dw.512" => "__builtin_ia32_pmovdw512_mask",
-    "llvm.x86.avx512.mask.pmov.dw.mem.128" => "__builtin_ia32_pmovdw128mem_mask",
-    "llvm.x86.avx512.mask.pmov.dw.mem.256" => "__builtin_ia32_pmovdw256mem_mask",
-    "llvm.x86.avx512.mask.pmov.dw.mem.512" => "__builtin_ia32_pmovdw512mem_mask",
-    "llvm.x86.avx512.mask.pmov.qb.128" => "__builtin_ia32_pmovqb128_mask",
-    "llvm.x86.avx512.mask.pmov.qb.256" => "__builtin_ia32_pmovqb256_mask",
-    "llvm.x86.avx512.mask.pmov.qb.512" => "__builtin_ia32_pmovqb512_mask",
-    "llvm.x86.avx512.mask.pmov.qb.mem.128" => "__builtin_ia32_pmovqb128mem_mask",
-    "llvm.x86.avx512.mask.pmov.qb.mem.256" => "__builtin_ia32_pmovqb256mem_mask",
-    "llvm.x86.avx512.mask.pmov.qb.mem.512" => "__builtin_ia32_pmovqb512mem_mask",
-    "llvm.x86.avx512.mask.pmov.qd.128" => "__builtin_ia32_pmovqd128_mask",
-    "llvm.x86.avx512.mask.pmov.qd.256" => "__builtin_ia32_pmovqd256_mask",
-    "llvm.x86.avx512.mask.pmov.qd.512" => "__builtin_ia32_pmovqd512_mask",
-    "llvm.x86.avx512.mask.pmov.qd.mem.128" => "__builtin_ia32_pmovqd128mem_mask",
-    "llvm.x86.avx512.mask.pmov.qd.mem.256" => "__builtin_ia32_pmovqd256mem_mask",
-    "llvm.x86.avx512.mask.pmov.qd.mem.512" => "__builtin_ia32_pmovqd512mem_mask",
-    "llvm.x86.avx512.mask.pmov.qw.128" => "__builtin_ia32_pmovqw128_mask",
-    "llvm.x86.avx512.mask.pmov.qw.256" => "__builtin_ia32_pmovqw256_mask",
-    "llvm.x86.avx512.mask.pmov.qw.512" => "__builtin_ia32_pmovqw512_mask",
-    "llvm.x86.avx512.mask.pmov.qw.mem.128" => "__builtin_ia32_pmovqw128mem_mask",
-    "llvm.x86.avx512.mask.pmov.qw.mem.256" => "__builtin_ia32_pmovqw256mem_mask",
-    "llvm.x86.avx512.mask.pmov.qw.mem.512" => "__builtin_ia32_pmovqw512mem_mask",
-    "llvm.x86.avx512.mask.pmov.wb.128" => "__builtin_ia32_pmovwb128_mask",
-    "llvm.x86.avx512.mask.pmov.wb.256" => "__builtin_ia32_pmovwb256_mask",
-    "llvm.x86.avx512.mask.pmov.wb.512" => "__builtin_ia32_pmovwb512_mask",
-    "llvm.x86.avx512.mask.pmov.wb.mem.128" => "__builtin_ia32_pmovwb128mem_mask",
-    "llvm.x86.avx512.mask.pmov.wb.mem.256" => "__builtin_ia32_pmovwb256mem_mask",
-    "llvm.x86.avx512.mask.pmov.wb.mem.512" => "__builtin_ia32_pmovwb512mem_mask",
-    "llvm.x86.avx512.mask.pmovs.db.128" => "__builtin_ia32_pmovsdb128_mask",
-    "llvm.x86.avx512.mask.pmovs.db.256" => "__builtin_ia32_pmovsdb256_mask",
-    "llvm.x86.avx512.mask.pmovs.db.512" => "__builtin_ia32_pmovsdb512_mask",
-    "llvm.x86.avx512.mask.pmovs.db.mem.128" => "__builtin_ia32_pmovsdb128mem_mask",
-    "llvm.x86.avx512.mask.pmovs.db.mem.256" => "__builtin_ia32_pmovsdb256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.db.mem.512" => "__builtin_ia32_pmovsdb512mem_mask",
-    "llvm.x86.avx512.mask.pmovs.dw.128" => "__builtin_ia32_pmovsdw128_mask",
-    "llvm.x86.avx512.mask.pmovs.dw.256" => "__builtin_ia32_pmovsdw256_mask",
-    "llvm.x86.avx512.mask.pmovs.dw.512" => "__builtin_ia32_pmovsdw512_mask",
-    "llvm.x86.avx512.mask.pmovs.dw.mem.128" => "__builtin_ia32_pmovsdw128mem_mask",
-    "llvm.x86.avx512.mask.pmovs.dw.mem.256" => "__builtin_ia32_pmovsdw256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.dw.mem.512" => "__builtin_ia32_pmovsdw512mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qb.128" => "__builtin_ia32_pmovsqb128_mask",
-    "llvm.x86.avx512.mask.pmovs.qb.256" => "__builtin_ia32_pmovsqb256_mask",
-    "llvm.x86.avx512.mask.pmovs.qb.512" => "__builtin_ia32_pmovsqb512_mask",
-    "llvm.x86.avx512.mask.pmovs.qb.mem.128" => "__builtin_ia32_pmovsqb128mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qb.mem.256" => "__builtin_ia32_pmovsqb256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qb.mem.512" => "__builtin_ia32_pmovsqb512mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.128" => "__builtin_ia32_pmovsqd128_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.256" => "__builtin_ia32_pmovsqd256_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.512" => "__builtin_ia32_pmovsqd512_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.mem.128" => "__builtin_ia32_pmovsqd128mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.mem.256" => "__builtin_ia32_pmovsqd256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qd.mem.512" => "__builtin_ia32_pmovsqd512mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.128" => "__builtin_ia32_pmovsqw128_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.256" => "__builtin_ia32_pmovsqw256_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.512" => "__builtin_ia32_pmovsqw512_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.mem.128" => "__builtin_ia32_pmovsqw128mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.mem.256" => "__builtin_ia32_pmovsqw256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.qw.mem.512" => "__builtin_ia32_pmovsqw512mem_mask",
-    "llvm.x86.avx512.mask.pmovs.wb.128" => "__builtin_ia32_pmovswb128_mask",
-    "llvm.x86.avx512.mask.pmovs.wb.256" => "__builtin_ia32_pmovswb256_mask",
-    "llvm.x86.avx512.mask.pmovs.wb.512" => "__builtin_ia32_pmovswb512_mask",
-    "llvm.x86.avx512.mask.pmovs.wb.mem.128" => "__builtin_ia32_pmovswb128mem_mask",
-    "llvm.x86.avx512.mask.pmovs.wb.mem.256" => "__builtin_ia32_pmovswb256mem_mask",
-    "llvm.x86.avx512.mask.pmovs.wb.mem.512" => "__builtin_ia32_pmovswb512mem_mask",
-    "llvm.x86.avx512.mask.pmovsxb.d.128" => "__builtin_ia32_pmovsxbd128_mask",
-    "llvm.x86.avx512.mask.pmovsxb.d.256" => "__builtin_ia32_pmovsxbd256_mask",
-    "llvm.x86.avx512.mask.pmovsxb.d.512" => "__builtin_ia32_pmovsxbd512_mask",
-    "llvm.x86.avx512.mask.pmovsxb.q.128" => "__builtin_ia32_pmovsxbq128_mask",
-    "llvm.x86.avx512.mask.pmovsxb.q.256" => "__builtin_ia32_pmovsxbq256_mask",
-    "llvm.x86.avx512.mask.pmovsxb.q.512" => "__builtin_ia32_pmovsxbq512_mask",
-    "llvm.x86.avx512.mask.pmovsxb.w.128" => "__builtin_ia32_pmovsxbw128_mask",
-    "llvm.x86.avx512.mask.pmovsxb.w.256" => "__builtin_ia32_pmovsxbw256_mask",
-    "llvm.x86.avx512.mask.pmovsxb.w.512" => "__builtin_ia32_pmovsxbw512_mask",
-    "llvm.x86.avx512.mask.pmovsxd.q.128" => "__builtin_ia32_pmovsxdq128_mask",
-    "llvm.x86.avx512.mask.pmovsxd.q.256" => "__builtin_ia32_pmovsxdq256_mask",
-    "llvm.x86.avx512.mask.pmovsxd.q.512" => "__builtin_ia32_pmovsxdq512_mask",
-    "llvm.x86.avx512.mask.pmovsxw.d.128" => "__builtin_ia32_pmovsxwd128_mask",
-    "llvm.x86.avx512.mask.pmovsxw.d.256" => "__builtin_ia32_pmovsxwd256_mask",
-    "llvm.x86.avx512.mask.pmovsxw.d.512" => "__builtin_ia32_pmovsxwd512_mask",
-    "llvm.x86.avx512.mask.pmovsxw.q.128" => "__builtin_ia32_pmovsxwq128_mask",
-    "llvm.x86.avx512.mask.pmovsxw.q.256" => "__builtin_ia32_pmovsxwq256_mask",
-    "llvm.x86.avx512.mask.pmovsxw.q.512" => "__builtin_ia32_pmovsxwq512_mask",
-    "llvm.x86.avx512.mask.pmovus.db.128" => "__builtin_ia32_pmovusdb128_mask",
-    "llvm.x86.avx512.mask.pmovus.db.256" => "__builtin_ia32_pmovusdb256_mask",
-    "llvm.x86.avx512.mask.pmovus.db.512" => "__builtin_ia32_pmovusdb512_mask",
-    "llvm.x86.avx512.mask.pmovus.db.mem.128" => "__builtin_ia32_pmovusdb128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.db.mem.256" => "__builtin_ia32_pmovusdb256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.db.mem.512" => "__builtin_ia32_pmovusdb512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.dw.128" => "__builtin_ia32_pmovusdw128_mask",
-    "llvm.x86.avx512.mask.pmovus.dw.256" => "__builtin_ia32_pmovusdw256_mask",
-    "llvm.x86.avx512.mask.pmovus.dw.512" => "__builtin_ia32_pmovusdw512_mask",
-    "llvm.x86.avx512.mask.pmovus.dw.mem.128" => "__builtin_ia32_pmovusdw128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.dw.mem.256" => "__builtin_ia32_pmovusdw256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.dw.mem.512" => "__builtin_ia32_pmovusdw512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.128" => "__builtin_ia32_pmovusqb128_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.256" => "__builtin_ia32_pmovusqb256_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.512" => "__builtin_ia32_pmovusqb512_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.mem.128" => "__builtin_ia32_pmovusqb128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.mem.256" => "__builtin_ia32_pmovusqb256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qb.mem.512" => "__builtin_ia32_pmovusqb512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.128" => "__builtin_ia32_pmovusqd128_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.256" => "__builtin_ia32_pmovusqd256_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.512" => "__builtin_ia32_pmovusqd512_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.mem.128" => "__builtin_ia32_pmovusqd128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.mem.256" => "__builtin_ia32_pmovusqd256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qd.mem.512" => "__builtin_ia32_pmovusqd512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.128" => "__builtin_ia32_pmovusqw128_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.256" => "__builtin_ia32_pmovusqw256_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.512" => "__builtin_ia32_pmovusqw512_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.mem.128" => "__builtin_ia32_pmovusqw128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.mem.256" => "__builtin_ia32_pmovusqw256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.qw.mem.512" => "__builtin_ia32_pmovusqw512mem_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.128" => "__builtin_ia32_pmovuswb128_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.256" => "__builtin_ia32_pmovuswb256_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.512" => "__builtin_ia32_pmovuswb512_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
-    "llvm.x86.avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
-    "llvm.x86.avx512.mask.pmovzxb.d.128" => "__builtin_ia32_pmovzxbd128_mask",
-    "llvm.x86.avx512.mask.pmovzxb.d.256" => "__builtin_ia32_pmovzxbd256_mask",
-    "llvm.x86.avx512.mask.pmovzxb.d.512" => "__builtin_ia32_pmovzxbd512_mask",
-    "llvm.x86.avx512.mask.pmovzxb.q.128" => "__builtin_ia32_pmovzxbq128_mask",
-    "llvm.x86.avx512.mask.pmovzxb.q.256" => "__builtin_ia32_pmovzxbq256_mask",
-    "llvm.x86.avx512.mask.pmovzxb.q.512" => "__builtin_ia32_pmovzxbq512_mask",
-    "llvm.x86.avx512.mask.pmovzxb.w.128" => "__builtin_ia32_pmovzxbw128_mask",
-    "llvm.x86.avx512.mask.pmovzxb.w.256" => "__builtin_ia32_pmovzxbw256_mask",
-    "llvm.x86.avx512.mask.pmovzxb.w.512" => "__builtin_ia32_pmovzxbw512_mask",
-    "llvm.x86.avx512.mask.pmovzxd.q.128" => "__builtin_ia32_pmovzxdq128_mask",
-    "llvm.x86.avx512.mask.pmovzxd.q.256" => "__builtin_ia32_pmovzxdq256_mask",
-    "llvm.x86.avx512.mask.pmovzxd.q.512" => "__builtin_ia32_pmovzxdq512_mask",
-    "llvm.x86.avx512.mask.pmovzxw.d.128" => "__builtin_ia32_pmovzxwd128_mask",
-    "llvm.x86.avx512.mask.pmovzxw.d.256" => "__builtin_ia32_pmovzxwd256_mask",
-    "llvm.x86.avx512.mask.pmovzxw.d.512" => "__builtin_ia32_pmovzxwd512_mask",
-    "llvm.x86.avx512.mask.pmovzxw.q.128" => "__builtin_ia32_pmovzxwq128_mask",
-    "llvm.x86.avx512.mask.pmovzxw.q.256" => "__builtin_ia32_pmovzxwq256_mask",
-    "llvm.x86.avx512.mask.pmovzxw.q.512" => "__builtin_ia32_pmovzxwq512_mask",
-    "llvm.x86.avx512.mask.pmul.dq.128" => "__builtin_ia32_pmuldq128_mask",
-    "llvm.x86.avx512.mask.pmul.dq.256" => "__builtin_ia32_pmuldq256_mask",
-    "llvm.x86.avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
-    "llvm.x86.avx512.mask.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128_mask",
-    "llvm.x86.avx512.mask.pmul.hr.sw.256" => "__builtin_ia32_pmulhrsw256_mask",
-    "llvm.x86.avx512.mask.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
-    "llvm.x86.avx512.mask.pmulh.w.128" => "__builtin_ia32_pmulhw128_mask",
-    "llvm.x86.avx512.mask.pmulh.w.256" => "__builtin_ia32_pmulhw256_mask",
-    "llvm.x86.avx512.mask.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
-    "llvm.x86.avx512.mask.pmulhu.w.128" => "__builtin_ia32_pmulhuw128_mask",
-    "llvm.x86.avx512.mask.pmulhu.w.256" => "__builtin_ia32_pmulhuw256_mask",
-    "llvm.x86.avx512.mask.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
-    "llvm.x86.avx512.mask.pmull.d.128" => "__builtin_ia32_pmulld128_mask",
-    "llvm.x86.avx512.mask.pmull.d.256" => "__builtin_ia32_pmulld256_mask",
-    "llvm.x86.avx512.mask.pmull.d.512" => "__builtin_ia32_pmulld512_mask",
-    "llvm.x86.avx512.mask.pmull.q.128" => "__builtin_ia32_pmullq128_mask",
-    "llvm.x86.avx512.mask.pmull.q.256" => "__builtin_ia32_pmullq256_mask",
-    "llvm.x86.avx512.mask.pmull.q.512" => "__builtin_ia32_pmullq512_mask",
-    "llvm.x86.avx512.mask.pmull.w.128" => "__builtin_ia32_pmullw128_mask",
-    "llvm.x86.avx512.mask.pmull.w.256" => "__builtin_ia32_pmullw256_mask",
-    "llvm.x86.avx512.mask.pmull.w.512" => "__builtin_ia32_pmullw512_mask",
-    "llvm.x86.avx512.mask.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
-    "llvm.x86.avx512.mask.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
-    "llvm.x86.avx512.mask.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.128" => "__builtin_ia32_pmuludq128_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.256" => "__builtin_ia32_pmuludq256_mask",
-    "llvm.x86.avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
-    "llvm.x86.avx512.mask.prol.d.128" => "__builtin_ia32_prold128_mask",
-    "llvm.x86.avx512.mask.prol.d.256" => "__builtin_ia32_prold256_mask",
-    "llvm.x86.avx512.mask.prol.d.512" => "__builtin_ia32_prold512_mask",
-    "llvm.x86.avx512.mask.prol.q.128" => "__builtin_ia32_prolq128_mask",
-    "llvm.x86.avx512.mask.prol.q.256" => "__builtin_ia32_prolq256_mask",
-    "llvm.x86.avx512.mask.prol.q.512" => "__builtin_ia32_prolq512_mask",
-    "llvm.x86.avx512.mask.prolv.d.128" => "__builtin_ia32_prolvd128_mask",
-    "llvm.x86.avx512.mask.prolv.d.256" => "__builtin_ia32_prolvd256_mask",
-    "llvm.x86.avx512.mask.prolv.d.512" => "__builtin_ia32_prolvd512_mask",
-    "llvm.x86.avx512.mask.prolv.q.128" => "__builtin_ia32_prolvq128_mask",
-    "llvm.x86.avx512.mask.prolv.q.256" => "__builtin_ia32_prolvq256_mask",
-    "llvm.x86.avx512.mask.prolv.q.512" => "__builtin_ia32_prolvq512_mask",
-    "llvm.x86.avx512.mask.pror.d.128" => "__builtin_ia32_prord128_mask",
-    "llvm.x86.avx512.mask.pror.d.256" => "__builtin_ia32_prord256_mask",
-    "llvm.x86.avx512.mask.pror.d.512" => "__builtin_ia32_prord512_mask",
-    "llvm.x86.avx512.mask.pror.q.128" => "__builtin_ia32_prorq128_mask",
-    "llvm.x86.avx512.mask.pror.q.256" => "__builtin_ia32_prorq256_mask",
-    "llvm.x86.avx512.mask.pror.q.512" => "__builtin_ia32_prorq512_mask",
-    "llvm.x86.avx512.mask.prorv.d.128" => "__builtin_ia32_prorvd128_mask",
-    "llvm.x86.avx512.mask.prorv.d.256" => "__builtin_ia32_prorvd256_mask",
-    "llvm.x86.avx512.mask.prorv.d.512" => "__builtin_ia32_prorvd512_mask",
-    "llvm.x86.avx512.mask.prorv.q.128" => "__builtin_ia32_prorvq128_mask",
-    "llvm.x86.avx512.mask.prorv.q.256" => "__builtin_ia32_prorvq256_mask",
-    "llvm.x86.avx512.mask.prorv.q.512" => "__builtin_ia32_prorvq512_mask",
-    "llvm.x86.avx512.mask.pshuf.b.128" => "__builtin_ia32_pshufb128_mask",
-    "llvm.x86.avx512.mask.pshuf.b.256" => "__builtin_ia32_pshufb256_mask",
-    "llvm.x86.avx512.mask.pshuf.b.512" => "__builtin_ia32_pshufb512_mask",
-    "llvm.x86.avx512.mask.psll.d" => "__builtin_ia32_pslld512_mask",
-    "llvm.x86.avx512.mask.psll.d.128" => "__builtin_ia32_pslld128_mask",
-    "llvm.x86.avx512.mask.psll.d.256" => "__builtin_ia32_pslld256_mask",
-    "llvm.x86.avx512.mask.psll.di.128" => "__builtin_ia32_pslldi128_mask",
-    "llvm.x86.avx512.mask.psll.di.256" => "__builtin_ia32_pslldi256_mask",
-    "llvm.x86.avx512.mask.psll.di.512" => "__builtin_ia32_pslldi512_mask",
-    "llvm.x86.avx512.mask.psll.q" => "__builtin_ia32_psllq512_mask",
-    "llvm.x86.avx512.mask.psll.q.128" => "__builtin_ia32_psllq128_mask",
-    "llvm.x86.avx512.mask.psll.q.256" => "__builtin_ia32_psllq256_mask",
-    "llvm.x86.avx512.mask.psll.qi.128" => "__builtin_ia32_psllqi128_mask",
-    "llvm.x86.avx512.mask.psll.qi.256" => "__builtin_ia32_psllqi256_mask",
-    "llvm.x86.avx512.mask.psll.qi.512" => "__builtin_ia32_psllqi512_mask",
-    "llvm.x86.avx512.mask.psll.w.128" => "__builtin_ia32_psllw128_mask",
-    "llvm.x86.avx512.mask.psll.w.256" => "__builtin_ia32_psllw256_mask",
-    "llvm.x86.avx512.mask.psll.w.512" => "__builtin_ia32_psllw512_mask",
-    "llvm.x86.avx512.mask.psll.wi.128" => "__builtin_ia32_psllwi128_mask",
-    "llvm.x86.avx512.mask.psll.wi.256" => "__builtin_ia32_psllwi256_mask",
-    "llvm.x86.avx512.mask.psll.wi.512" => "__builtin_ia32_psllwi512_mask",
-    "llvm.x86.avx512.mask.psllv.d" => "__builtin_ia32_psllv16si_mask",
-    "llvm.x86.avx512.mask.psllv.q" => "__builtin_ia32_psllv8di_mask",
-    "llvm.x86.avx512.mask.psllv16.hi" => "__builtin_ia32_psllv16hi_mask",
-    "llvm.x86.avx512.mask.psllv2.di" => "__builtin_ia32_psllv2di_mask",
-    "llvm.x86.avx512.mask.psllv32hi" => "__builtin_ia32_psllv32hi_mask",
-    "llvm.x86.avx512.mask.psllv4.di" => "__builtin_ia32_psllv4di_mask",
-    "llvm.x86.avx512.mask.psllv4.si" => "__builtin_ia32_psllv4si_mask",
-    "llvm.x86.avx512.mask.psllv8.hi" => "__builtin_ia32_psllv8hi_mask",
-    "llvm.x86.avx512.mask.psllv8.si" => "__builtin_ia32_psllv8si_mask",
-    "llvm.x86.avx512.mask.psra.d" => "__builtin_ia32_psrad512_mask",
-    "llvm.x86.avx512.mask.psra.d.128" => "__builtin_ia32_psrad128_mask",
-    "llvm.x86.avx512.mask.psra.d.256" => "__builtin_ia32_psrad256_mask",
-    "llvm.x86.avx512.mask.psra.di.128" => "__builtin_ia32_psradi128_mask",
-    "llvm.x86.avx512.mask.psra.di.256" => "__builtin_ia32_psradi256_mask",
-    "llvm.x86.avx512.mask.psra.di.512" => "__builtin_ia32_psradi512_mask",
-    "llvm.x86.avx512.mask.psra.q" => "__builtin_ia32_psraq512_mask",
-    "llvm.x86.avx512.mask.psra.q.128" => "__builtin_ia32_psraq128_mask",
-    "llvm.x86.avx512.mask.psra.q.256" => "__builtin_ia32_psraq256_mask",
-    "llvm.x86.avx512.mask.psra.qi.128" => "__builtin_ia32_psraqi128_mask",
-    "llvm.x86.avx512.mask.psra.qi.256" => "__builtin_ia32_psraqi256_mask",
-    "llvm.x86.avx512.mask.psra.qi.512" => "__builtin_ia32_psraqi512_mask",
-    "llvm.x86.avx512.mask.psra.w.128" => "__builtin_ia32_psraw128_mask",
-    "llvm.x86.avx512.mask.psra.w.256" => "__builtin_ia32_psraw256_mask",
-    "llvm.x86.avx512.mask.psra.w.512" => "__builtin_ia32_psraw512_mask",
-    "llvm.x86.avx512.mask.psra.wi.128" => "__builtin_ia32_psrawi128_mask",
-    "llvm.x86.avx512.mask.psra.wi.256" => "__builtin_ia32_psrawi256_mask",
-    "llvm.x86.avx512.mask.psra.wi.512" => "__builtin_ia32_psrawi512_mask",
-    "llvm.x86.avx512.mask.psrav.d" => "__builtin_ia32_psrav16si_mask",
-    "llvm.x86.avx512.mask.psrav.q" => "__builtin_ia32_psrav8di_mask",
-    "llvm.x86.avx512.mask.psrav.q.128" => "__builtin_ia32_psravq128_mask",
-    "llvm.x86.avx512.mask.psrav.q.256" => "__builtin_ia32_psravq256_mask",
-    "llvm.x86.avx512.mask.psrav16.hi" => "__builtin_ia32_psrav16hi_mask",
-    "llvm.x86.avx512.mask.psrav32.hi" => "__builtin_ia32_psrav32hi_mask",
-    "llvm.x86.avx512.mask.psrav4.si" => "__builtin_ia32_psrav4si_mask",
-    "llvm.x86.avx512.mask.psrav8.hi" => "__builtin_ia32_psrav8hi_mask",
-    "llvm.x86.avx512.mask.psrav8.si" => "__builtin_ia32_psrav8si_mask",
-    "llvm.x86.avx512.mask.psrl.d" => "__builtin_ia32_psrld512_mask",
-    "llvm.x86.avx512.mask.psrl.d.128" => "__builtin_ia32_psrld128_mask",
-    "llvm.x86.avx512.mask.psrl.d.256" => "__builtin_ia32_psrld256_mask",
-    "llvm.x86.avx512.mask.psrl.di.128" => "__builtin_ia32_psrldi128_mask",
-    "llvm.x86.avx512.mask.psrl.di.256" => "__builtin_ia32_psrldi256_mask",
-    "llvm.x86.avx512.mask.psrl.di.512" => "__builtin_ia32_psrldi512_mask",
-    "llvm.x86.avx512.mask.psrl.q" => "__builtin_ia32_psrlq512_mask",
-    "llvm.x86.avx512.mask.psrl.q.128" => "__builtin_ia32_psrlq128_mask",
-    "llvm.x86.avx512.mask.psrl.q.256" => "__builtin_ia32_psrlq256_mask",
-    "llvm.x86.avx512.mask.psrl.qi.128" => "__builtin_ia32_psrlqi128_mask",
-    "llvm.x86.avx512.mask.psrl.qi.256" => "__builtin_ia32_psrlqi256_mask",
-    "llvm.x86.avx512.mask.psrl.qi.512" => "__builtin_ia32_psrlqi512_mask",
-    "llvm.x86.avx512.mask.psrl.w.128" => "__builtin_ia32_psrlw128_mask",
-    "llvm.x86.avx512.mask.psrl.w.256" => "__builtin_ia32_psrlw256_mask",
-    "llvm.x86.avx512.mask.psrl.w.512" => "__builtin_ia32_psrlw512_mask",
-    "llvm.x86.avx512.mask.psrl.wi.128" => "__builtin_ia32_psrlwi128_mask",
-    "llvm.x86.avx512.mask.psrl.wi.256" => "__builtin_ia32_psrlwi256_mask",
-    "llvm.x86.avx512.mask.psrl.wi.512" => "__builtin_ia32_psrlwi512_mask",
-    "llvm.x86.avx512.mask.psrlv.d" => "__builtin_ia32_psrlv16si_mask",
-    "llvm.x86.avx512.mask.psrlv.q" => "__builtin_ia32_psrlv8di_mask",
-    "llvm.x86.avx512.mask.psrlv16.hi" => "__builtin_ia32_psrlv16hi_mask",
-    "llvm.x86.avx512.mask.psrlv2.di" => "__builtin_ia32_psrlv2di_mask",
-    "llvm.x86.avx512.mask.psrlv32hi" => "__builtin_ia32_psrlv32hi_mask",
-    "llvm.x86.avx512.mask.psrlv4.di" => "__builtin_ia32_psrlv4di_mask",
-    "llvm.x86.avx512.mask.psrlv4.si" => "__builtin_ia32_psrlv4si_mask",
-    "llvm.x86.avx512.mask.psrlv8.hi" => "__builtin_ia32_psrlv8hi_mask",
-    "llvm.x86.avx512.mask.psrlv8.si" => "__builtin_ia32_psrlv8si_mask",
-    "llvm.x86.avx512.mask.psub.b.128" => "__builtin_ia32_psubb128_mask",
-    "llvm.x86.avx512.mask.psub.b.256" => "__builtin_ia32_psubb256_mask",
-    "llvm.x86.avx512.mask.psub.b.512" => "__builtin_ia32_psubb512_mask",
-    "llvm.x86.avx512.mask.psub.d.128" => "__builtin_ia32_psubd128_mask",
-    "llvm.x86.avx512.mask.psub.d.256" => "__builtin_ia32_psubd256_mask",
-    "llvm.x86.avx512.mask.psub.d.512" => "__builtin_ia32_psubd512_mask",
-    "llvm.x86.avx512.mask.psub.q.128" => "__builtin_ia32_psubq128_mask",
-    "llvm.x86.avx512.mask.psub.q.256" => "__builtin_ia32_psubq256_mask",
-    "llvm.x86.avx512.mask.psub.q.512" => "__builtin_ia32_psubq512_mask",
-    "llvm.x86.avx512.mask.psub.w.128" => "__builtin_ia32_psubw128_mask",
-    "llvm.x86.avx512.mask.psub.w.256" => "__builtin_ia32_psubw256_mask",
-    "llvm.x86.avx512.mask.psub.w.512" => "__builtin_ia32_psubw512_mask",
-    "llvm.x86.avx512.mask.psubs.b.128" => "__builtin_ia32_psubsb128_mask",
-    "llvm.x86.avx512.mask.psubs.b.256" => "__builtin_ia32_psubsb256_mask",
-    "llvm.x86.avx512.mask.psubs.b.512" => "__builtin_ia32_psubsb512_mask",
-    "llvm.x86.avx512.mask.psubs.w.128" => "__builtin_ia32_psubsw128_mask",
-    "llvm.x86.avx512.mask.psubs.w.256" => "__builtin_ia32_psubsw256_mask",
-    "llvm.x86.avx512.mask.psubs.w.512" => "__builtin_ia32_psubsw512_mask",
-    "llvm.x86.avx512.mask.psubus.b.128" => "__builtin_ia32_psubusb128_mask",
-    "llvm.x86.avx512.mask.psubus.b.256" => "__builtin_ia32_psubusb256_mask",
-    "llvm.x86.avx512.mask.psubus.b.512" => "__builtin_ia32_psubusb512_mask",
-    "llvm.x86.avx512.mask.psubus.w.128" => "__builtin_ia32_psubusw128_mask",
-    "llvm.x86.avx512.mask.psubus.w.256" => "__builtin_ia32_psubusw256_mask",
-    "llvm.x86.avx512.mask.psubus.w.512" => "__builtin_ia32_psubusw512_mask",
-    "llvm.x86.avx512.mask.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask",
-    "llvm.x86.avx512.mask.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask",
-    "llvm.x86.avx512.mask.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask",
-    "llvm.x86.avx512.mask.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask",
-    "llvm.x86.avx512.mask.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask",
-    "llvm.x86.avx512.mask.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask",
-    "llvm.x86.avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
-    "llvm.x86.avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
-    "llvm.x86.avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
-    "llvm.x86.avx512.mask.range.pd.256" => "__builtin_ia32_rangepd256_mask",
-    "llvm.x86.avx512.mask.range.pd.512" => "__builtin_ia32_rangepd512_mask",
-    "llvm.x86.avx512.mask.range.ps.128" => "__builtin_ia32_rangeps128_mask",
-    "llvm.x86.avx512.mask.range.ps.256" => "__builtin_ia32_rangeps256_mask",
-    "llvm.x86.avx512.mask.range.ps.512" => "__builtin_ia32_rangeps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
-    "llvm.x86.avx512.mask.reduce.pd.128" => "__builtin_ia32_reducepd128_mask",
-    "llvm.x86.avx512.mask.reduce.pd.256" => "__builtin_ia32_reducepd256_mask",
-    "llvm.x86.avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask",
-    "llvm.x86.avx512.mask.reduce.ps.128" => "__builtin_ia32_reduceps128_mask",
-    "llvm.x86.avx512.mask.reduce.ps.256" => "__builtin_ia32_reduceps256_mask",
-    "llvm.x86.avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask",
-    "llvm.x86.avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask",
-    "llvm.x86.avx512.mask.reduce.ss" => "__builtin_ia32_reducess_mask",
-    "llvm.x86.avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
-    "llvm.x86.avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
-    "llvm.x86.avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
-    "llvm.x86.avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
-    "llvm.x86.avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
-    "llvm.x86.avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
-    "llvm.x86.avx512.mask.scalef.pd.128" => "__builtin_ia32_scalefpd128_mask",
-    "llvm.x86.avx512.mask.scalef.pd.256" => "__builtin_ia32_scalefpd256_mask",
-    "llvm.x86.avx512.mask.scalef.pd.512" => "__builtin_ia32_scalefpd512_mask",
-    "llvm.x86.avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
-    "llvm.x86.avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
-    "llvm.x86.avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
-    "llvm.x86.avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask",
-    "llvm.x86.avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask",
-    "llvm.x86.avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask",
-    "llvm.x86.avx512.mask.shuf.f64x2.256" => "__builtin_ia32_shuf_f64x2_256_mask",
-    "llvm.x86.avx512.mask.shuf.i32x4" => "__builtin_ia32_shuf_i32x4_mask",
-    "llvm.x86.avx512.mask.shuf.i32x4.256" => "__builtin_ia32_shuf_i32x4_256_mask",
-    "llvm.x86.avx512.mask.shuf.i64x2" => "__builtin_ia32_shuf_i64x2_mask",
-    "llvm.x86.avx512.mask.shuf.i64x2.256" => "__builtin_ia32_shuf_i64x2_256_mask",
-    "llvm.x86.avx512.mask.shuf.pd.128" => "__builtin_ia32_shufpd128_mask",
-    "llvm.x86.avx512.mask.shuf.pd.256" => "__builtin_ia32_shufpd256_mask",
-    "llvm.x86.avx512.mask.shuf.pd.512" => "__builtin_ia32_shufpd512_mask",
-    "llvm.x86.avx512.mask.shuf.ps.128" => "__builtin_ia32_shufps128_mask",
-    "llvm.x86.avx512.mask.shuf.ps.256" => "__builtin_ia32_shufps256_mask",
-    "llvm.x86.avx512.mask.shuf.ps.512" => "__builtin_ia32_shufps512_mask",
-    "llvm.x86.avx512.mask.sqrt.pd.128" => "__builtin_ia32_sqrtpd128_mask",
-    "llvm.x86.avx512.mask.sqrt.pd.256" => "__builtin_ia32_sqrtpd256_mask",
-    "llvm.x86.avx512.mask.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
-    "llvm.x86.avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask",
-    "llvm.x86.avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask",
-    "llvm.x86.avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
-    "llvm.x86.avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
-    "llvm.x86.avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
-    "llvm.x86.avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
-    "llvm.x86.avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
-    "llvm.x86.avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
-    "llvm.x86.avx512.mask.sub.pd.128" => "__builtin_ia32_subpd128_mask",
-    "llvm.x86.avx512.mask.sub.pd.256" => "__builtin_ia32_subpd256_mask",
-    "llvm.x86.avx512.mask.sub.pd.512" => "__builtin_ia32_subpd512_mask",
-    "llvm.x86.avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask",
-    "llvm.x86.avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask",
-    "llvm.x86.avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
-    "llvm.x86.avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask",
-    "llvm.x86.avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask",
-    "llvm.x86.avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
-    "llvm.x86.avx512.mask.valign.q.128" => "__builtin_ia32_alignq128_mask",
-    "llvm.x86.avx512.mask.valign.q.256" => "__builtin_ia32_alignq256_mask",
-    "llvm.x86.avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256_mask",
-    "llvm.x86.avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
-    "llvm.x86.avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
-    "llvm.x86.avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
-    "llvm.x86.avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
-    "llvm.x86.avx512.mask.vextractf32x4.256" => "__builtin_ia32_extractf32x4_256_mask",
-    "llvm.x86.avx512.mask.vextractf32x4.512" => "__builtin_ia32_extractf32x4_mask",
-    "llvm.x86.avx512.mask.vextractf32x8.512" => "__builtin_ia32_extractf32x8_mask",
-    "llvm.x86.avx512.mask.vextractf64x2.256" => "__builtin_ia32_extractf64x2_256_mask",
-    "llvm.x86.avx512.mask.vextractf64x2.512" => "__builtin_ia32_extractf64x2_512_mask",
-    "llvm.x86.avx512.mask.vextractf64x4.512" => "__builtin_ia32_extractf64x4_mask",
-    "llvm.x86.avx512.mask.vextracti32x4.256" => "__builtin_ia32_extracti32x4_256_mask",
-    "llvm.x86.avx512.mask.vextracti32x4.512" => "__builtin_ia32_extracti32x4_mask",
-    "llvm.x86.avx512.mask.vextracti32x8.512" => "__builtin_ia32_extracti32x8_mask",
-    "llvm.x86.avx512.mask.vextracti64x2.256" => "__builtin_ia32_extracti64x2_256_mask",
-    "llvm.x86.avx512.mask.vextracti64x2.512" => "__builtin_ia32_extracti64x2_512_mask",
-    "llvm.x86.avx512.mask.vextracti64x4.512" => "__builtin_ia32_extracti64x4_mask",
-    "llvm.x86.avx512.mask.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask",
-    "llvm.x86.avx512.mask.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask",
-    "llvm.x86.avx512.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-    "llvm.x86.avx512.mask.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask",
-    "llvm.x86.avx512.mask.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask",
-    "llvm.x86.avx512.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-    "llvm.x86.avx512.mask.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask",
-    "llvm.x86.avx512.mask.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask",
-    "llvm.x86.avx512.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
-    "llvm.x86.avx512.mask.vfnmadd.pd.128" => "__builtin_ia32_vfnmaddpd128_mask",
-    "llvm.x86.avx512.mask.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256_mask",
-    "llvm.x86.avx512.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
-    "llvm.x86.avx512.mask.vfnmadd.ps.128" => "__builtin_ia32_vfnmaddps128_mask",
-    "llvm.x86.avx512.mask.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256_mask",
-    "llvm.x86.avx512.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
-    "llvm.x86.avx512.mask.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask",
-    "llvm.x86.avx512.mask.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask",
-    "llvm.x86.avx512.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
-    "llvm.x86.avx512.mask.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask",
-    "llvm.x86.avx512.mask.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask",
-    "llvm.x86.avx512.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask",
-    "llvm.x86.avx512.mask.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128_mask",
-    "llvm.x86.avx512.mask.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256_mask",
-    "llvm.x86.avx512.mask.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512_mask",
-    "llvm.x86.avx512.mask.vpermilvar.pd.128" => "__builtin_ia32_vpermilvarpd_mask",
-    "llvm.x86.avx512.mask.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256_mask",
-    "llvm.x86.avx512.mask.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask",
-    "llvm.x86.avx512.mask.vpermilvar.ps.128" => "__builtin_ia32_vpermilvarps_mask",
-    "llvm.x86.avx512.mask.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256_mask",
-    "llvm.x86.avx512.mask.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask",
-    "llvm.x86.avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
-    "llvm.x86.avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
-    "llvm.x86.avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_mask",
-    "llvm.x86.avx512.mask.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask",
-    "llvm.x86.avx512.mask.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask",
-    "llvm.x86.avx512.mask.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask",
-    "llvm.x86.avx512.mask.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
-    "llvm.x86.avx512.mask.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
-    "llvm.x86.avx512.mask.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
-    "llvm.x86.avx512.mask.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_mask",
-    "llvm.x86.avx512.mask.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
-    "llvm.x86.avx512.mask.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
-    "llvm.x86.avx512.mask.xor.pd.128" => "__builtin_ia32_xorpd128_mask",
-    "llvm.x86.avx512.mask.xor.pd.256" => "__builtin_ia32_xorpd256_mask",
-    "llvm.x86.avx512.mask.xor.pd.512" => "__builtin_ia32_xorpd512_mask",
-    "llvm.x86.avx512.mask.xor.ps.128" => "__builtin_ia32_xorps128_mask",
-    "llvm.x86.avx512.mask.xor.ps.256" => "__builtin_ia32_xorps256_mask",
-    "llvm.x86.avx512.mask.xor.ps.512" => "__builtin_ia32_xorps512_mask",
-    "llvm.x86.avx512.mask3.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask3",
-    "llvm.x86.avx512.mask3.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask3",
-    "llvm.x86.avx512.mask3.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.pd.128" => "__builtin_ia32_vfmsubpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.ps.128" => "__builtin_ia32_vfmsubps128_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256_mask3",
-    "llvm.x86.avx512.mask3.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.pd.128" => "__builtin_ia32_vfmsubaddpd128_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.ps.128" => "__builtin_ia32_vfmsubaddps128_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256_mask3",
-    "llvm.x86.avx512.mask3.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask3",
-    "llvm.x86.avx512.mask3.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask3",
-    "llvm.x86.avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.sd" => "__builtin_ia32_fixupimmsd_maskz",
-    "llvm.x86.avx512.maskz.fixupimm.ss" => "__builtin_ia32_fixupimmss_maskz",
-    "llvm.x86.avx512.maskz.pternlog.d.128" => "__builtin_ia32_pternlogd128_maskz",
-    "llvm.x86.avx512.maskz.pternlog.d.256" => "__builtin_ia32_pternlogd256_maskz",
-    "llvm.x86.avx512.maskz.pternlog.d.512" => "__builtin_ia32_pternlogd512_maskz",
-    "llvm.x86.avx512.maskz.pternlog.q.128" => "__builtin_ia32_pternlogq128_maskz",
-    "llvm.x86.avx512.maskz.pternlog.q.256" => "__builtin_ia32_pternlogq256_maskz",
-    "llvm.x86.avx512.maskz.pternlog.q.512" => "__builtin_ia32_pternlogq512_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_maskz",
-    "llvm.x86.avx512.maskz.vfmadd.ss" => "__builtin_ia32_vfmaddss3_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_maskz",
-    "llvm.x86.avx512.maskz.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_maskz",
-    "llvm.x86.avx512.maskz.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_maskz",
-    "llvm.x86.avx512.maskz.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_maskz",
-    "llvm.x86.avx512.max.pd.512" => "__builtin_ia32_maxpd512",
-    "llvm.x86.avx512.max.ps.512" => "__builtin_ia32_maxps512",
-    "llvm.x86.avx512.min.pd.512" => "__builtin_ia32_minpd512",
-    "llvm.x86.avx512.min.ps.512" => "__builtin_ia32_minps512",
-    "llvm.x86.avx512.movntdqa" => "__builtin_ia32_movntdqa512",
-    "llvm.x86.avx512.mul.pd.512" => "__builtin_ia32_mulpd512",
-    "llvm.x86.avx512.mul.ps.512" => "__builtin_ia32_mulps512",
-    "llvm.x86.avx512.packssdw.512" => "__builtin_ia32_packssdw512",
-    "llvm.x86.avx512.packsswb.512" => "__builtin_ia32_packsswb512",
-    "llvm.x86.avx512.packusdw.512" => "__builtin_ia32_packusdw512",
-    "llvm.x86.avx512.packuswb.512" => "__builtin_ia32_packuswb512",
-    "llvm.x86.avx512.pavg.b.512" => "__builtin_ia32_pavgb512",
-    "llvm.x86.avx512.pavg.w.512" => "__builtin_ia32_pavgw512",
-    "llvm.x86.avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
-    "llvm.x86.avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
-    "llvm.x86.avx512.permvar.df.256" => "__builtin_ia32_permvardf256",
-    "llvm.x86.avx512.permvar.df.512" => "__builtin_ia32_permvardf512",
-    "llvm.x86.avx512.permvar.di.256" => "__builtin_ia32_permvardi256",
-    "llvm.x86.avx512.permvar.di.512" => "__builtin_ia32_permvardi512",
-    "llvm.x86.avx512.permvar.hi.128" => "__builtin_ia32_permvarhi128",
-    "llvm.x86.avx512.permvar.hi.256" => "__builtin_ia32_permvarhi256",
-    "llvm.x86.avx512.permvar.hi.512" => "__builtin_ia32_permvarhi512",
-    "llvm.x86.avx512.permvar.qi.128" => "__builtin_ia32_permvarqi128",
-    "llvm.x86.avx512.permvar.qi.256" => "__builtin_ia32_permvarqi256",
-    "llvm.x86.avx512.permvar.qi.512" => "__builtin_ia32_permvarqi512",
-    "llvm.x86.avx512.permvar.sf.512" => "__builtin_ia32_permvarsf512",
-    "llvm.x86.avx512.permvar.si.512" => "__builtin_ia32_permvarsi512",
-    "llvm.x86.avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512",
-    "llvm.x86.avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512",
-    "llvm.x86.avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
-    "llvm.x86.avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
-    "llvm.x86.avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
-    "llvm.x86.avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
-    "llvm.x86.avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
-    "llvm.x86.avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512",
-    "llvm.x86.avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512",
-    "llvm.x86.avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512",
-    "llvm.x86.avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128",
-    "llvm.x86.avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256",
-    "llvm.x86.avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512",
-    "llvm.x86.avx512.psad.bw.512" => "__builtin_ia32_psadbw512",
-    "llvm.x86.avx512.pshuf.b.512" => "__builtin_ia32_pshufb512",
-    "llvm.x86.avx512.psll.d.512" => "__builtin_ia32_pslld512",
-    "llvm.x86.avx512.psll.dq" => "__builtin_ia32_pslldqi512",
-    "llvm.x86.avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
-    "llvm.x86.avx512.psll.q.512" => "__builtin_ia32_psllq512",
-    "llvm.x86.avx512.psll.w.512" => "__builtin_ia32_psllw512",
-    "llvm.x86.avx512.pslli.d.512" => "__builtin_ia32_pslldi512",
-    "llvm.x86.avx512.pslli.q.512" => "__builtin_ia32_psllqi512",
-    "llvm.x86.avx512.pslli.w.512" => "__builtin_ia32_psllwi512",
-    "llvm.x86.avx512.psllv.d.512" => "__builtin_ia32_psllv16si",
-    "llvm.x86.avx512.psllv.q.512" => "__builtin_ia32_psllv8di",
-    "llvm.x86.avx512.psllv.w.128" => "__builtin_ia32_psllv8hi",
-    "llvm.x86.avx512.psllv.w.256" => "__builtin_ia32_psllv16hi",
-    "llvm.x86.avx512.psllv.w.512" => "__builtin_ia32_psllv32hi",
-    "llvm.x86.avx512.psra.d.512" => "__builtin_ia32_psrad512",
-    "llvm.x86.avx512.psra.q.128" => "__builtin_ia32_psraq128",
-    "llvm.x86.avx512.psra.q.256" => "__builtin_ia32_psraq256",
-    "llvm.x86.avx512.psra.q.512" => "__builtin_ia32_psraq512",
-    "llvm.x86.avx512.psra.w.512" => "__builtin_ia32_psraw512",
-    "llvm.x86.avx512.psrai.d.512" => "__builtin_ia32_psradi512",
-    "llvm.x86.avx512.psrai.q.128" => "__builtin_ia32_psraqi128",
-    "llvm.x86.avx512.psrai.q.256" => "__builtin_ia32_psraqi256",
-    "llvm.x86.avx512.psrai.q.512" => "__builtin_ia32_psraqi512",
-    "llvm.x86.avx512.psrai.w.512" => "__builtin_ia32_psrawi512",
-    "llvm.x86.avx512.psrav.d.512" => "__builtin_ia32_psrav16si",
-    "llvm.x86.avx512.psrav.q.128" => "__builtin_ia32_psravq128",
-    "llvm.x86.avx512.psrav.q.256" => "__builtin_ia32_psravq256",
-    "llvm.x86.avx512.psrav.q.512" => "__builtin_ia32_psrav8di",
-    "llvm.x86.avx512.psrav.w.128" => "__builtin_ia32_psrav8hi",
-    "llvm.x86.avx512.psrav.w.256" => "__builtin_ia32_psrav16hi",
-    "llvm.x86.avx512.psrav.w.512" => "__builtin_ia32_psrav32hi",
-    "llvm.x86.avx512.psrl.d.512" => "__builtin_ia32_psrld512",
-    "llvm.x86.avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
-    "llvm.x86.avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
-    "llvm.x86.avx512.psrl.q.512" => "__builtin_ia32_psrlq512",
-    "llvm.x86.avx512.psrl.w.512" => "__builtin_ia32_psrlw512",
-    "llvm.x86.avx512.psrli.d.512" => "__builtin_ia32_psrldi512",
-    "llvm.x86.avx512.psrli.q.512" => "__builtin_ia32_psrlqi512",
-    "llvm.x86.avx512.psrli.w.512" => "__builtin_ia32_psrlwi512",
-    "llvm.x86.avx512.psrlv.d.512" => "__builtin_ia32_psrlv16si",
-    "llvm.x86.avx512.psrlv.q.512" => "__builtin_ia32_psrlv8di",
-    "llvm.x86.avx512.psrlv.w.128" => "__builtin_ia32_psrlv8hi",
-    "llvm.x86.avx512.psrlv.w.256" => "__builtin_ia32_psrlv16hi",
-    "llvm.x86.avx512.psrlv.w.512" => "__builtin_ia32_psrlv32hi",
-    "llvm.x86.avx512.pternlog.d.128" => "__builtin_ia32_pternlogd128",
-    "llvm.x86.avx512.pternlog.d.256" => "__builtin_ia32_pternlogd256",
-    "llvm.x86.avx512.pternlog.d.512" => "__builtin_ia32_pternlogd512",
-    "llvm.x86.avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128",
-    "llvm.x86.avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256",
-    "llvm.x86.avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512",
-    "llvm.x86.avx512.ptestm.b.128" => "__builtin_ia32_ptestmb128",
-    "llvm.x86.avx512.ptestm.b.256" => "__builtin_ia32_ptestmb256",
-    "llvm.x86.avx512.ptestm.b.512" => "__builtin_ia32_ptestmb512",
-    "llvm.x86.avx512.ptestm.d.128" => "__builtin_ia32_ptestmd128",
-    "llvm.x86.avx512.ptestm.d.256" => "__builtin_ia32_ptestmd256",
-    "llvm.x86.avx512.ptestm.d.512" => "__builtin_ia32_ptestmd512",
-    "llvm.x86.avx512.ptestm.q.128" => "__builtin_ia32_ptestmq128",
-    "llvm.x86.avx512.ptestm.q.256" => "__builtin_ia32_ptestmq256",
-    "llvm.x86.avx512.ptestm.q.512" => "__builtin_ia32_ptestmq512",
-    "llvm.x86.avx512.ptestm.w.128" => "__builtin_ia32_ptestmw128",
-    "llvm.x86.avx512.ptestm.w.256" => "__builtin_ia32_ptestmw256",
-    "llvm.x86.avx512.ptestm.w.512" => "__builtin_ia32_ptestmw512",
-    "llvm.x86.avx512.ptestnm.b.128" => "__builtin_ia32_ptestnmb128",
-    "llvm.x86.avx512.ptestnm.b.256" => "__builtin_ia32_ptestnmb256",
-    "llvm.x86.avx512.ptestnm.b.512" => "__builtin_ia32_ptestnmb512",
-    "llvm.x86.avx512.ptestnm.d.128" => "__builtin_ia32_ptestnmd128",
-    "llvm.x86.avx512.ptestnm.d.256" => "__builtin_ia32_ptestnmd256",
-    "llvm.x86.avx512.ptestnm.d.512" => "__builtin_ia32_ptestnmd512",
-    "llvm.x86.avx512.ptestnm.q.128" => "__builtin_ia32_ptestnmq128",
-    "llvm.x86.avx512.ptestnm.q.256" => "__builtin_ia32_ptestnmq256",
-    "llvm.x86.avx512.ptestnm.q.512" => "__builtin_ia32_ptestnmq512",
-    "llvm.x86.avx512.ptestnm.w.128" => "__builtin_ia32_ptestnmw128",
-    "llvm.x86.avx512.ptestnm.w.256" => "__builtin_ia32_ptestnmw256",
-    "llvm.x86.avx512.ptestnm.w.512" => "__builtin_ia32_ptestnmw512",
-    "llvm.x86.avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
-    "llvm.x86.avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
-    "llvm.x86.avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
-    "llvm.x86.avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
-    "llvm.x86.avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
-    "llvm.x86.avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
-    "llvm.x86.avx512.rcp14.sd" => "__builtin_ia32_rcp14sd_mask",
-    "llvm.x86.avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
-    "llvm.x86.avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
-    "llvm.x86.avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
-    "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
-    "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
-    "llvm.x86.avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
-    "llvm.x86.avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
-    "llvm.x86.avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
-    "llvm.x86.avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
-    "llvm.x86.avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
-    "llvm.x86.avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
-    "llvm.x86.avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
-    "llvm.x86.avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
-    "llvm.x86.avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
-    "llvm.x86.avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
-    "llvm.x86.avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
-    "llvm.x86.avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
-    "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
-    "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
-    // [DUPLICATE]: "llvm.x86.avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
-    "llvm.x86.avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
-    "llvm.x86.avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
-    "llvm.x86.avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
-    "llvm.x86.avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
-    "llvm.x86.avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
-    "llvm.x86.avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
-    "llvm.x86.avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
-    "llvm.x86.avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
-    "llvm.x86.avx512.scatterdiv2.df" => "__builtin_ia32_scatterdiv2df",
-    "llvm.x86.avx512.scatterdiv2.di" => "__builtin_ia32_scatterdiv2di",
-    "llvm.x86.avx512.scatterdiv4.df" => "__builtin_ia32_scatterdiv4df",
-    "llvm.x86.avx512.scatterdiv4.di" => "__builtin_ia32_scatterdiv4di",
-    "llvm.x86.avx512.scatterdiv4.sf" => "__builtin_ia32_scatterdiv4sf",
-    "llvm.x86.avx512.scatterdiv4.si" => "__builtin_ia32_scatterdiv4si",
-    "llvm.x86.avx512.scatterdiv8.sf" => "__builtin_ia32_scatterdiv8sf",
-    "llvm.x86.avx512.scatterdiv8.si" => "__builtin_ia32_scatterdiv8si",
-    "llvm.x86.avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
-    "llvm.x86.avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
-    "llvm.x86.avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
-    "llvm.x86.avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
-    "llvm.x86.avx512.scattersiv2.df" => "__builtin_ia32_scattersiv2df",
-    "llvm.x86.avx512.scattersiv2.di" => "__builtin_ia32_scattersiv2di",
-    "llvm.x86.avx512.scattersiv4.df" => "__builtin_ia32_scattersiv4df",
-    "llvm.x86.avx512.scattersiv4.di" => "__builtin_ia32_scattersiv4di",
-    "llvm.x86.avx512.scattersiv4.sf" => "__builtin_ia32_scattersiv4sf",
-    "llvm.x86.avx512.scattersiv4.si" => "__builtin_ia32_scattersiv4si",
-    "llvm.x86.avx512.scattersiv8.sf" => "__builtin_ia32_scattersiv8sf",
-    "llvm.x86.avx512.scattersiv8.si" => "__builtin_ia32_scattersiv8si",
-    "llvm.x86.avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
-    "llvm.x86.avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
-    "llvm.x86.avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
-    "llvm.x86.avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
-    "llvm.x86.avx512.sub.pd.512" => "__builtin_ia32_subpd512",
-    "llvm.x86.avx512.sub.ps.512" => "__builtin_ia32_subps512",
-    "llvm.x86.avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
-    "llvm.x86.avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
-    "llvm.x86.avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
-    "llvm.x86.avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
-    "llvm.x86.avx512.vcomi.sd" => "__builtin_ia32_vcomisd",
-    "llvm.x86.avx512.vcomi.ss" => "__builtin_ia32_vcomiss",
-    "llvm.x86.avx512.vcvtsd2si32" => "__builtin_ia32_vcvtsd2si32",
-    "llvm.x86.avx512.vcvtsd2si64" => "__builtin_ia32_vcvtsd2si64",
-    "llvm.x86.avx512.vcvtsd2usi32" => "__builtin_ia32_vcvtsd2usi32",
-    "llvm.x86.avx512.vcvtsd2usi64" => "__builtin_ia32_vcvtsd2usi64",
-    "llvm.x86.avx512.vcvtss2si32" => "__builtin_ia32_vcvtss2si32",
-    "llvm.x86.avx512.vcvtss2si64" => "__builtin_ia32_vcvtss2si64",
-    "llvm.x86.avx512.vcvtss2usi32" => "__builtin_ia32_vcvtss2usi32",
-    "llvm.x86.avx512.vcvtss2usi64" => "__builtin_ia32_vcvtss2usi64",
-    "llvm.x86.avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd128",
-    "llvm.x86.avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd256",
-    "llvm.x86.avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd512",
-    "llvm.x86.avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds128",
-    "llvm.x86.avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds256",
-    "llvm.x86.avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds512",
-    "llvm.x86.avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd128",
-    "llvm.x86.avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd256",
-    "llvm.x86.avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd512",
-    "llvm.x86.avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds128",
-    "llvm.x86.avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds256",
-    "llvm.x86.avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds512",
-    "llvm.x86.avx512.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128",
-    "llvm.x86.avx512.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256",
-    "llvm.x86.avx512.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512",
-    "llvm.x86.avx512.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128",
-    "llvm.x86.avx512.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256",
-    "llvm.x86.avx512.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512",
-    "llvm.x86.avx512.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128",
-    "llvm.x86.avx512.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256",
-    "llvm.x86.avx512.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512",
-    "llvm.x86.avx512.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128",
-    "llvm.x86.avx512.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256",
-    "llvm.x86.avx512.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512",
-    "llvm.x86.avx512.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128",
-    "llvm.x86.avx512.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256",
-    "llvm.x86.avx512.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512",
-    "llvm.x86.avx512.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128",
-    "llvm.x86.avx512.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256",
-    "llvm.x86.avx512.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512",
-    "llvm.x86.avx512.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512",
-    "llvm.x86.avx512.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512",
-    "llvm.x86.avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128",
-    "llvm.x86.avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256",
-    "llvm.x86.avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512",
-    "llvm.x86.avx512.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128",
-    "llvm.x86.avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256",
-    "llvm.x86.avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512",
-    "llvm.x86.avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_128",
-    "llvm.x86.avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_256",
-    "llvm.x86.avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_512",
-    "llvm.x86.avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_256",
-    "llvm.x86.avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_512",
-    "llvm.x86.avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_128",
-    "llvm.x86.avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_256",
-    "llvm.x86.avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_512",
-    "llvm.x86.avx512fp16.add.ph.512" => "__builtin_ia32_addph512",
-    "llvm.x86.avx512fp16.div.ph.512" => "__builtin_ia32_divph512",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
-    "llvm.x86.avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
-    "llvm.x86.avx512fp16.mask.fpclass.sh" => "__builtin_ia32_fpclasssh_mask",
-    "llvm.x86.avx512fp16.mask.getexp.ph.128" => "__builtin_ia32_getexpph128_mask",
-    "llvm.x86.avx512fp16.mask.getexp.ph.256" => "__builtin_ia32_getexpph256_mask",
-    "llvm.x86.avx512fp16.mask.getexp.ph.512" => "__builtin_ia32_getexpph512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
-    "llvm.x86.avx512fp16.mask.getmant.ph.128" => "__builtin_ia32_getmantph128_mask",
-    "llvm.x86.avx512fp16.mask.getmant.ph.256" => "__builtin_ia32_getmantph256_mask",
-    "llvm.x86.avx512fp16.mask.getmant.ph.512" => "__builtin_ia32_getmantph512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
-    "llvm.x86.avx512fp16.mask.rcp.ph.128" => "__builtin_ia32_rcpph128_mask",
-    "llvm.x86.avx512fp16.mask.rcp.ph.256" => "__builtin_ia32_rcpph256_mask",
-    "llvm.x86.avx512fp16.mask.rcp.ph.512" => "__builtin_ia32_rcpph512_mask",
-    "llvm.x86.avx512fp16.mask.rcp.sh" => "__builtin_ia32_rcpsh_mask",
-    "llvm.x86.avx512fp16.mask.reduce.ph.128" => "__builtin_ia32_reduceph128_mask",
-    "llvm.x86.avx512fp16.mask.reduce.ph.256" => "__builtin_ia32_reduceph256_mask",
-    "llvm.x86.avx512fp16.mask.reduce.ph.512" => "__builtin_ia32_reduceph512_mask",
-    "llvm.x86.avx512fp16.mask.reduce.sh" => "__builtin_ia32_reducesh_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph_128_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph_256_mask",
-    "llvm.x86.avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.ph.128" => "__builtin_ia32_rsqrtph128_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.ph.256" => "__builtin_ia32_rsqrtph256_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.ph.512" => "__builtin_ia32_rsqrtph512_mask",
-    "llvm.x86.avx512fp16.mask.rsqrt.sh" => "__builtin_ia32_rsqrtsh_mask",
-    "llvm.x86.avx512fp16.mask.scalef.ph.128" => "__builtin_ia32_scalefph128_mask",
-    "llvm.x86.avx512fp16.mask.scalef.ph.256" => "__builtin_ia32_scalefph256_mask",
-    "llvm.x86.avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvtdq2ph.128" => "__builtin_ia32_vcvtdq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtpd2ph.128" => "__builtin_ia32_vcvtpd2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtpd2ph.256" => "__builtin_ia32_vcvtpd2ph256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtpd2ph.512" => "__builtin_ia32_vcvtpd2ph512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2dq.128" => "__builtin_ia32_vcvtph2dq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2dq.256" => "__builtin_ia32_vcvtph2dq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2dq.512" => "__builtin_ia32_vcvtph2dq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2pd.128" => "__builtin_ia32_vcvtph2pd128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2pd.256" => "__builtin_ia32_vcvtph2pd256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2psx.128" => "__builtin_ia32_vcvtph2psx128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2psx.256" => "__builtin_ia32_vcvtph2psx256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2qq.128" => "__builtin_ia32_vcvtph2qq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2qq.256" => "__builtin_ia32_vcvtph2qq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2qq.512" => "__builtin_ia32_vcvtph2qq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2udq.128" => "__builtin_ia32_vcvtph2udq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2udq.256" => "__builtin_ia32_vcvtph2udq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2udq.512" => "__builtin_ia32_vcvtph2udq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uqq.128" => "__builtin_ia32_vcvtph2uqq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uqq.256" => "__builtin_ia32_vcvtph2uqq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uqq.512" => "__builtin_ia32_vcvtph2uqq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uw.128" => "__builtin_ia32_vcvtph2uw128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uw.256" => "__builtin_ia32_vcvtph2uw256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2uw.512" => "__builtin_ia32_vcvtph2uw512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2w.128" => "__builtin_ia32_vcvtph2w128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2w.256" => "__builtin_ia32_vcvtph2w256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtph2w.512" => "__builtin_ia32_vcvtph2w512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtps2phx.128" => "__builtin_ia32_vcvtps2phx128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtps2phx.256" => "__builtin_ia32_vcvtps2phx256_mask",
-    "llvm.x86.avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtqq2ph.128" => "__builtin_ia32_vcvtqq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtqq2ph.256" => "__builtin_ia32_vcvtqq2ph256_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
-    // [INVALID CONVERSION]: "llvm.x86.avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2dq.128" => "__builtin_ia32_vcvttph2dq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2dq.256" => "__builtin_ia32_vcvttph2dq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2qq.128" => "__builtin_ia32_vcvttph2qq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2qq.256" => "__builtin_ia32_vcvttph2qq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2qq.512" => "__builtin_ia32_vcvttph2qq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2udq.128" => "__builtin_ia32_vcvttph2udq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2udq.256" => "__builtin_ia32_vcvttph2udq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2udq.512" => "__builtin_ia32_vcvttph2udq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uqq.128" => "__builtin_ia32_vcvttph2uqq128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uqq.256" => "__builtin_ia32_vcvttph2uqq256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uw.128" => "__builtin_ia32_vcvttph2uw128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uw.256" => "__builtin_ia32_vcvttph2uw256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2uw.512" => "__builtin_ia32_vcvttph2uw512_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2w.128" => "__builtin_ia32_vcvttph2w128_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2w.256" => "__builtin_ia32_vcvttph2w256_mask",
-    "llvm.x86.avx512fp16.mask.vcvttph2w.512" => "__builtin_ia32_vcvttph2w512_mask",
-    "llvm.x86.avx512fp16.mask.vcvtudq2ph.128" => "__builtin_ia32_vcvtudq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtuqq2ph.128" => "__builtin_ia32_vcvtuqq2ph128_mask",
-    "llvm.x86.avx512fp16.mask.vcvtuqq2ph.256" => "__builtin_ia32_vcvtuqq2ph256_mask",
-    "llvm.x86.avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3",
-    "llvm.x86.avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.cph.128" => "__builtin_ia32_vfcmulcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.cph.256" => "__builtin_ia32_vfcmulcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.cph.512" => "__builtin_ia32_vfcmulcph512_mask",
-    "llvm.x86.avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask",
-    "llvm.x86.avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3",
-    "llvm.x86.avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.cph.128" => "__builtin_ia32_vfmulcph128_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.cph.256" => "__builtin_ia32_vfmulcph256_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.cph.512" => "__builtin_ia32_vfmulcph512_mask",
-    "llvm.x86.avx512fp16.mask.vfmul.csh" => "__builtin_ia32_vfmulcsh_mask",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_maskz",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_maskz",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz",
-    "llvm.x86.avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz",
-    "llvm.x86.avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz",
-    "llvm.x86.avx512fp16.max.ph.128" => "__builtin_ia32_maxph128",
-    "llvm.x86.avx512fp16.max.ph.256" => "__builtin_ia32_maxph256",
-    "llvm.x86.avx512fp16.max.ph.512" => "__builtin_ia32_maxph512",
-    "llvm.x86.avx512fp16.min.ph.128" => "__builtin_ia32_minph128",
-    "llvm.x86.avx512fp16.min.ph.256" => "__builtin_ia32_minph256",
-    "llvm.x86.avx512fp16.min.ph.512" => "__builtin_ia32_minph512",
-    "llvm.x86.avx512fp16.mul.ph.512" => "__builtin_ia32_mulph512",
-    "llvm.x86.avx512fp16.sub.ph.512" => "__builtin_ia32_subph512",
-    "llvm.x86.avx512fp16.vcomi.sh" => "__builtin_ia32_vcomish",
-    "llvm.x86.avx512fp16.vcvtsh2si32" => "__builtin_ia32_vcvtsh2si32",
-    "llvm.x86.avx512fp16.vcvtsh2si64" => "__builtin_ia32_vcvtsh2si64",
-    "llvm.x86.avx512fp16.vcvtsh2usi32" => "__builtin_ia32_vcvtsh2usi32",
-    "llvm.x86.avx512fp16.vcvtsh2usi64" => "__builtin_ia32_vcvtsh2usi64",
-    "llvm.x86.avx512fp16.vcvtsi2sh" => "__builtin_ia32_vcvtsi2sh",
-    "llvm.x86.avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi642sh",
-    "llvm.x86.avx512fp16.vcvttsh2si32" => "__builtin_ia32_vcvttsh2si32",
-    "llvm.x86.avx512fp16.vcvttsh2si64" => "__builtin_ia32_vcvttsh2si64",
-    "llvm.x86.avx512fp16.vcvttsh2usi32" => "__builtin_ia32_vcvttsh2usi32",
-    "llvm.x86.avx512fp16.vcvttsh2usi64" => "__builtin_ia32_vcvttsh2usi64",
-    "llvm.x86.avx512fp16.vcvtusi2sh" => "__builtin_ia32_vcvtusi2sh",
-    "llvm.x86.avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi642sh",
-    "llvm.x86.avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph",
-    "llvm.x86.avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256",
-    "llvm.x86.axor32" => "__builtin_ia32_axor32",
-    "llvm.x86.axor64" => "__builtin_ia32_axor64",
-    "llvm.x86.bmi.bextr.32" => "__builtin_ia32_bextr_u32",
-    "llvm.x86.bmi.bextr.64" => "__builtin_ia32_bextr_u64",
-    "llvm.x86.bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
-    "llvm.x86.bmi.bzhi.64" => "__builtin_ia32_bzhi_di",
-    "llvm.x86.bmi.pdep.32" => "__builtin_ia32_pdep_si",
-    "llvm.x86.bmi.pdep.64" => "__builtin_ia32_pdep_di",
-    "llvm.x86.bmi.pext.32" => "__builtin_ia32_pext_si",
-    "llvm.x86.bmi.pext.64" => "__builtin_ia32_pext_di",
-    "llvm.x86.cldemote" => "__builtin_ia32_cldemote",
-    "llvm.x86.clflushopt" => "__builtin_ia32_clflushopt",
-    "llvm.x86.clrssbsy" => "__builtin_ia32_clrssbsy",
-    "llvm.x86.clui" => "__builtin_ia32_clui",
-    "llvm.x86.clwb" => "__builtin_ia32_clwb",
-    "llvm.x86.clzero" => "__builtin_ia32_clzero",
-    "llvm.x86.cmpccxadd32" => "__builtin_ia32_cmpccxadd32",
-    "llvm.x86.cmpccxadd64" => "__builtin_ia32_cmpccxadd64",
-    "llvm.x86.directstore32" => "__builtin_ia32_directstore_u32",
-    "llvm.x86.directstore64" => "__builtin_ia32_directstore_u64",
-    "llvm.x86.enqcmd" => "__builtin_ia32_enqcmd",
-    "llvm.x86.enqcmds" => "__builtin_ia32_enqcmds",
-    "llvm.x86.flags.read.u32" => "__builtin_ia32_readeflags_u32",
-    "llvm.x86.flags.read.u64" => "__builtin_ia32_readeflags_u64",
-    "llvm.x86.flags.write.u32" => "__builtin_ia32_writeeflags_u32",
-    "llvm.x86.flags.write.u64" => "__builtin_ia32_writeeflags_u64",
-    "llvm.x86.fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
-    "llvm.x86.fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
-    "llvm.x86.fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
-    "llvm.x86.fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
-    "llvm.x86.fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
-    "llvm.x86.fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
-    "llvm.x86.fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
-    "llvm.x86.fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
-    "llvm.x86.fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
-    "llvm.x86.fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
-    "llvm.x86.fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
-    "llvm.x86.fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
-    "llvm.x86.fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
-    "llvm.x86.fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
-    "llvm.x86.fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
-    "llvm.x86.fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
-    "llvm.x86.fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
-    "llvm.x86.fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
-    "llvm.x86.fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
-    "llvm.x86.fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
-    "llvm.x86.fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
-    "llvm.x86.fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
-    "llvm.x86.fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
-    "llvm.x86.fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
-    "llvm.x86.fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
-    "llvm.x86.fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
-    "llvm.x86.fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
-    "llvm.x86.fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
-    "llvm.x86.fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
-    "llvm.x86.fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
-    "llvm.x86.fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
-    "llvm.x86.fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
-    "llvm.x86.fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
-    "llvm.x86.fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
-    "llvm.x86.fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
-    "llvm.x86.fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
-    "llvm.x86.fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
-    "llvm.x86.fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
-    "llvm.x86.fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
-    "llvm.x86.fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
-    "llvm.x86.fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
-    "llvm.x86.fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
-    "llvm.x86.fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
-    "llvm.x86.fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
-    "llvm.x86.fxrstor" => "__builtin_ia32_fxrstor",
-    "llvm.x86.fxrstor64" => "__builtin_ia32_fxrstor64",
-    "llvm.x86.fxsave" => "__builtin_ia32_fxsave",
-    "llvm.x86.fxsave64" => "__builtin_ia32_fxsave64",
-    "llvm.x86.incsspd" => "__builtin_ia32_incsspd",
-    "llvm.x86.incsspq" => "__builtin_ia32_incsspq",
-    "llvm.x86.invpcid" => "__builtin_ia32_invpcid",
-    "llvm.x86.ldtilecfg" => "__builtin_ia32_tile_loadconfig",
-    "llvm.x86.ldtilecfg.internal" => "__builtin_ia32_tile_loadconfig_internal",
-    "llvm.x86.llwpcb" => "__builtin_ia32_llwpcb",
-    "llvm.x86.loadiwkey" => "__builtin_ia32_loadiwkey",
-    "llvm.x86.lwpins32" => "__builtin_ia32_lwpins32",
-    "llvm.x86.lwpins64" => "__builtin_ia32_lwpins64",
-    "llvm.x86.lwpval32" => "__builtin_ia32_lwpval32",
-    "llvm.x86.lwpval64" => "__builtin_ia32_lwpval64",
-    "llvm.x86.mmx.emms" => "__builtin_ia32_emms",
-    "llvm.x86.mmx.femms" => "__builtin_ia32_femms",
-    "llvm.x86.monitorx" => "__builtin_ia32_monitorx",
-    "llvm.x86.movdir64b" => "__builtin_ia32_movdir64b",
-    "llvm.x86.movrsdi" => "__builtin_ia32_movrsdi",
-    "llvm.x86.movrshi" => "__builtin_ia32_movrshi",
-    "llvm.x86.movrsqi" => "__builtin_ia32_movrsqi",
-    "llvm.x86.movrssi" => "__builtin_ia32_movrssi",
-    "llvm.x86.mwaitx" => "__builtin_ia32_mwaitx",
-    "llvm.x86.pclmulqdq" => "__builtin_ia32_pclmulqdq128",
-    "llvm.x86.pclmulqdq.256" => "__builtin_ia32_pclmulqdq256",
-    "llvm.x86.pclmulqdq.512" => "__builtin_ia32_pclmulqdq512",
-    "llvm.x86.prefetchrs" => "__builtin_ia32_prefetchrs",
-    "llvm.x86.ptwrite32" => "__builtin_ia32_ptwrite32",
-    "llvm.x86.ptwrite64" => "__builtin_ia32_ptwrite64",
-    "llvm.x86.rdfsbase.32" => "__builtin_ia32_rdfsbase32",
-    "llvm.x86.rdfsbase.64" => "__builtin_ia32_rdfsbase64",
-    "llvm.x86.rdgsbase.32" => "__builtin_ia32_rdgsbase32",
-    "llvm.x86.rdgsbase.64" => "__builtin_ia32_rdgsbase64",
-    "llvm.x86.rdpid" => "__builtin_ia32_rdpid",
-    "llvm.x86.rdpkru" => "__builtin_ia32_rdpkru",
-    "llvm.x86.rdpmc" => "__builtin_ia32_rdpmc",
-    "llvm.x86.rdpru" => "__builtin_ia32_rdpru",
-    "llvm.x86.rdsspd" => "__builtin_ia32_rdsspd",
-    "llvm.x86.rdsspq" => "__builtin_ia32_rdsspq",
-    "llvm.x86.rdtsc" => "__builtin_ia32_rdtsc",
-    "llvm.x86.rdtscp" => "__builtin_ia32_rdtscp",
-    "llvm.x86.rstorssp" => "__builtin_ia32_rstorssp",
-    "llvm.x86.saveprevssp" => "__builtin_ia32_saveprevssp",
-    "llvm.x86.senduipi" => "__builtin_ia32_senduipi",
-    "llvm.x86.serialize" => "__builtin_ia32_serialize",
-    "llvm.x86.setssbsy" => "__builtin_ia32_setssbsy",
-    "llvm.x86.sha1msg1" => "__builtin_ia32_sha1msg1",
-    "llvm.x86.sha1msg2" => "__builtin_ia32_sha1msg2",
-    "llvm.x86.sha1nexte" => "__builtin_ia32_sha1nexte",
-    "llvm.x86.sha1rnds4" => "__builtin_ia32_sha1rnds4",
-    "llvm.x86.sha256msg1" => "__builtin_ia32_sha256msg1",
-    "llvm.x86.sha256msg2" => "__builtin_ia32_sha256msg2",
-    "llvm.x86.sha256rnds2" => "__builtin_ia32_sha256rnds2",
-    "llvm.x86.slwpcb" => "__builtin_ia32_slwpcb",
-    "llvm.x86.sse.add.ss" => "__builtin_ia32_addss",
-    "llvm.x86.sse.cmp.ps" => "__builtin_ia32_cmpps",
-    "llvm.x86.sse.cmp.ss" => "__builtin_ia32_cmpss",
-    "llvm.x86.sse.comieq.ss" => "__builtin_ia32_comieq",
-    "llvm.x86.sse.comige.ss" => "__builtin_ia32_comige",
-    "llvm.x86.sse.comigt.ss" => "__builtin_ia32_comigt",
-    "llvm.x86.sse.comile.ss" => "__builtin_ia32_comile",
-    "llvm.x86.sse.comilt.ss" => "__builtin_ia32_comilt",
-    "llvm.x86.sse.comineq.ss" => "__builtin_ia32_comineq",
-    "llvm.x86.sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
-    "llvm.x86.sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
-    "llvm.x86.sse.cvtss2si" => "__builtin_ia32_cvtss2si",
-    "llvm.x86.sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
-    "llvm.x86.sse.cvttss2si" => "__builtin_ia32_cvttss2si",
-    "llvm.x86.sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
-    "llvm.x86.sse.div.ss" => "__builtin_ia32_divss",
-    "llvm.x86.sse.max.ps" => "__builtin_ia32_maxps",
-    "llvm.x86.sse.max.ss" => "__builtin_ia32_maxss",
-    "llvm.x86.sse.min.ps" => "__builtin_ia32_minps",
-    "llvm.x86.sse.min.ss" => "__builtin_ia32_minss",
-    "llvm.x86.sse.movmsk.ps" => "__builtin_ia32_movmskps",
-    "llvm.x86.sse.mul.ss" => "__builtin_ia32_mulss",
-    "llvm.x86.sse.rcp.ps" => "__builtin_ia32_rcpps",
-    "llvm.x86.sse.rcp.ss" => "__builtin_ia32_rcpss",
-    "llvm.x86.sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
-    "llvm.x86.sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
-    "llvm.x86.sse.sfence" => "__builtin_ia32_sfence",
-    "llvm.x86.sse.sqrt.ps" => "__builtin_ia32_sqrtps",
-    "llvm.x86.sse.sqrt.ss" => "__builtin_ia32_sqrtss",
-    "llvm.x86.sse.storeu.ps" => "__builtin_ia32_storeups",
-    "llvm.x86.sse.sub.ss" => "__builtin_ia32_subss",
-    "llvm.x86.sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
-    "llvm.x86.sse.ucomige.ss" => "__builtin_ia32_ucomige",
-    "llvm.x86.sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
-    "llvm.x86.sse.ucomile.ss" => "__builtin_ia32_ucomile",
-    "llvm.x86.sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
-    "llvm.x86.sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
-    "llvm.x86.sse2.add.sd" => "__builtin_ia32_addsd",
-    "llvm.x86.sse2.clflush" => "__builtin_ia32_clflush",
-    "llvm.x86.sse2.cmp.pd" => "__builtin_ia32_cmppd",
-    "llvm.x86.sse2.cmp.sd" => "__builtin_ia32_cmpsd",
-    "llvm.x86.sse2.comieq.sd" => "__builtin_ia32_comisdeq",
-    "llvm.x86.sse2.comige.sd" => "__builtin_ia32_comisdge",
-    "llvm.x86.sse2.comigt.sd" => "__builtin_ia32_comisdgt",
-    "llvm.x86.sse2.comile.sd" => "__builtin_ia32_comisdle",
-    "llvm.x86.sse2.comilt.sd" => "__builtin_ia32_comisdlt",
-    "llvm.x86.sse2.comineq.sd" => "__builtin_ia32_comisdneq",
-    "llvm.x86.sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
-    "llvm.x86.sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
-    "llvm.x86.sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
-    "llvm.x86.sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
-    "llvm.x86.sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
-    "llvm.x86.sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
-    "llvm.x86.sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
-    "llvm.x86.sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
-    "llvm.x86.sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
-    "llvm.x86.sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
-    "llvm.x86.sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
-    "llvm.x86.sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
-    "llvm.x86.sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
-    "llvm.x86.sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
-    "llvm.x86.sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
-    "llvm.x86.sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
-    "llvm.x86.sse2.div.sd" => "__builtin_ia32_divsd",
-    "llvm.x86.sse2.lfence" => "__builtin_ia32_lfence",
-    "llvm.x86.sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
-    "llvm.x86.sse2.max.pd" => "__builtin_ia32_maxpd",
-    "llvm.x86.sse2.max.sd" => "__builtin_ia32_maxsd",
-    "llvm.x86.sse2.mfence" => "__builtin_ia32_mfence",
-    "llvm.x86.sse2.min.pd" => "__builtin_ia32_minpd",
-    "llvm.x86.sse2.min.sd" => "__builtin_ia32_minsd",
-    "llvm.x86.sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
-    "llvm.x86.sse2.mul.sd" => "__builtin_ia32_mulsd",
-    "llvm.x86.sse2.packssdw.128" => "__builtin_ia32_packssdw128",
-    "llvm.x86.sse2.packsswb.128" => "__builtin_ia32_packsswb128",
-    "llvm.x86.sse2.packuswb.128" => "__builtin_ia32_packuswb128",
-    "llvm.x86.sse2.padds.b" => "__builtin_ia32_paddsb128",
-    "llvm.x86.sse2.padds.w" => "__builtin_ia32_paddsw128",
-    "llvm.x86.sse2.paddus.b" => "__builtin_ia32_paddusb128",
-    "llvm.x86.sse2.paddus.w" => "__builtin_ia32_paddusw128",
-    "llvm.x86.sse2.pause" => "__builtin_ia32_pause",
-    "llvm.x86.sse2.pavg.b" => "__builtin_ia32_pavgb128",
-    "llvm.x86.sse2.pavg.w" => "__builtin_ia32_pavgw128",
-    "llvm.x86.sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
-    "llvm.x86.sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
-    "llvm.x86.sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
-    "llvm.x86.sse2.pmins.w" => "__builtin_ia32_pminsw128",
-    "llvm.x86.sse2.pminu.b" => "__builtin_ia32_pminub128",
-    "llvm.x86.sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
-    "llvm.x86.sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
-    "llvm.x86.sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
-    "llvm.x86.sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
-    "llvm.x86.sse2.psad.bw" => "__builtin_ia32_psadbw128",
-    "llvm.x86.sse2.pshuf.d" => "__builtin_ia32_pshufd",
-    "llvm.x86.sse2.pshufh.w" => "__builtin_ia32_pshufhw",
-    "llvm.x86.sse2.pshufl.w" => "__builtin_ia32_pshuflw",
-    "llvm.x86.sse2.psll.d" => "__builtin_ia32_pslld128",
-    "llvm.x86.sse2.psll.dq" => "__builtin_ia32_pslldqi128",
-    "llvm.x86.sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
-    "llvm.x86.sse2.psll.q" => "__builtin_ia32_psllq128",
-    "llvm.x86.sse2.psll.w" => "__builtin_ia32_psllw128",
-    "llvm.x86.sse2.pslli.d" => "__builtin_ia32_pslldi128",
-    "llvm.x86.sse2.pslli.q" => "__builtin_ia32_psllqi128",
-    "llvm.x86.sse2.pslli.w" => "__builtin_ia32_psllwi128",
-    "llvm.x86.sse2.psra.d" => "__builtin_ia32_psrad128",
-    "llvm.x86.sse2.psra.w" => "__builtin_ia32_psraw128",
-    "llvm.x86.sse2.psrai.d" => "__builtin_ia32_psradi128",
-    "llvm.x86.sse2.psrai.w" => "__builtin_ia32_psrawi128",
-    "llvm.x86.sse2.psrl.d" => "__builtin_ia32_psrld128",
-    "llvm.x86.sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
-    "llvm.x86.sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
-    "llvm.x86.sse2.psrl.q" => "__builtin_ia32_psrlq128",
-    "llvm.x86.sse2.psrl.w" => "__builtin_ia32_psrlw128",
-    "llvm.x86.sse2.psrli.d" => "__builtin_ia32_psrldi128",
-    "llvm.x86.sse2.psrli.q" => "__builtin_ia32_psrlqi128",
-    "llvm.x86.sse2.psrli.w" => "__builtin_ia32_psrlwi128",
-    "llvm.x86.sse2.psubs.b" => "__builtin_ia32_psubsb128",
-    "llvm.x86.sse2.psubs.w" => "__builtin_ia32_psubsw128",
-    "llvm.x86.sse2.psubus.b" => "__builtin_ia32_psubusb128",
-    "llvm.x86.sse2.psubus.w" => "__builtin_ia32_psubusw128",
-    "llvm.x86.sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
-    "llvm.x86.sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
-    "llvm.x86.sse2.storel.dq" => "__builtin_ia32_storelv4si",
-    "llvm.x86.sse2.storeu.dq" => "__builtin_ia32_storedqu",
-    "llvm.x86.sse2.storeu.pd" => "__builtin_ia32_storeupd",
-    "llvm.x86.sse2.sub.sd" => "__builtin_ia32_subsd",
-    "llvm.x86.sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
-    "llvm.x86.sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
-    "llvm.x86.sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
-    "llvm.x86.sse2.ucomile.sd" => "__builtin_ia32_ucomisdle",
-    "llvm.x86.sse2.ucomilt.sd" => "__builtin_ia32_ucomisdlt",
-    "llvm.x86.sse2.ucomineq.sd" => "__builtin_ia32_ucomisdneq",
-    "llvm.x86.sse3.addsub.pd" => "__builtin_ia32_addsubpd",
-    "llvm.x86.sse3.addsub.ps" => "__builtin_ia32_addsubps",
-    "llvm.x86.sse3.hadd.pd" => "__builtin_ia32_haddpd",
-    "llvm.x86.sse3.hadd.ps" => "__builtin_ia32_haddps",
-    "llvm.x86.sse3.hsub.pd" => "__builtin_ia32_hsubpd",
-    "llvm.x86.sse3.hsub.ps" => "__builtin_ia32_hsubps",
-    "llvm.x86.sse3.ldu.dq" => "__builtin_ia32_lddqu",
-    "llvm.x86.sse3.monitor" => "__builtin_ia32_monitor",
-    "llvm.x86.sse3.mwait" => "__builtin_ia32_mwait",
-    "llvm.x86.sse41.blendpd" => "__builtin_ia32_blendpd",
-    "llvm.x86.sse41.blendps" => "__builtin_ia32_blendps",
-    "llvm.x86.sse41.blendvpd" => "__builtin_ia32_blendvpd",
-    "llvm.x86.sse41.blendvps" => "__builtin_ia32_blendvps",
-    "llvm.x86.sse41.dppd" => "__builtin_ia32_dppd",
-    "llvm.x86.sse41.dpps" => "__builtin_ia32_dpps",
-    "llvm.x86.sse41.extractps" => "__builtin_ia32_extractps128",
-    "llvm.x86.sse41.insertps" => "__builtin_ia32_insertps128",
-    "llvm.x86.sse41.movntdqa" => "__builtin_ia32_movntdqa",
-    "llvm.x86.sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
-    "llvm.x86.sse41.packusdw" => "__builtin_ia32_packusdw128",
-    "llvm.x86.sse41.pblendvb" => "__builtin_ia32_pblendvb128",
-    "llvm.x86.sse41.pblendw" => "__builtin_ia32_pblendw128",
-    "llvm.x86.sse41.phminposuw" => "__builtin_ia32_phminposuw128",
-    "llvm.x86.sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
-    "llvm.x86.sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
-    "llvm.x86.sse41.pmaxud" => "__builtin_ia32_pmaxud128",
-    "llvm.x86.sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
-    "llvm.x86.sse41.pminsb" => "__builtin_ia32_pminsb128",
-    "llvm.x86.sse41.pminsd" => "__builtin_ia32_pminsd128",
-    "llvm.x86.sse41.pminud" => "__builtin_ia32_pminud128",
-    "llvm.x86.sse41.pminuw" => "__builtin_ia32_pminuw128",
-    "llvm.x86.sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
-    "llvm.x86.sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
-    "llvm.x86.sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
-    "llvm.x86.sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
-    "llvm.x86.sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
-    "llvm.x86.sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
-    "llvm.x86.sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
-    "llvm.x86.sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
-    "llvm.x86.sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
-    "llvm.x86.sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
-    "llvm.x86.sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
-    "llvm.x86.sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
-    "llvm.x86.sse41.pmuldq" => "__builtin_ia32_pmuldq128",
-    "llvm.x86.sse41.ptestc" => "__builtin_ia32_ptestc128",
-    "llvm.x86.sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
-    "llvm.x86.sse41.ptestz" => "__builtin_ia32_ptestz128",
-    "llvm.x86.sse41.round.pd" => "__builtin_ia32_roundpd",
-    "llvm.x86.sse41.round.ps" => "__builtin_ia32_roundps",
-    "llvm.x86.sse41.round.sd" => "__builtin_ia32_roundsd",
-    "llvm.x86.sse41.round.ss" => "__builtin_ia32_roundss",
-    "llvm.x86.sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
-    "llvm.x86.sse42.crc32.32.32" => "__builtin_ia32_crc32si",
-    "llvm.x86.sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
-    "llvm.x86.sse42.crc32.64.64" => "__builtin_ia32_crc32di",
-    "llvm.x86.sse42.pcmpestri128" => "__builtin_ia32_pcmpestri128",
-    "llvm.x86.sse42.pcmpestria128" => "__builtin_ia32_pcmpestria128",
-    "llvm.x86.sse42.pcmpestric128" => "__builtin_ia32_pcmpestric128",
-    "llvm.x86.sse42.pcmpestrio128" => "__builtin_ia32_pcmpestrio128",
-    "llvm.x86.sse42.pcmpestris128" => "__builtin_ia32_pcmpestris128",
-    "llvm.x86.sse42.pcmpestriz128" => "__builtin_ia32_pcmpestriz128",
-    "llvm.x86.sse42.pcmpestrm128" => "__builtin_ia32_pcmpestrm128",
-    "llvm.x86.sse42.pcmpistri128" => "__builtin_ia32_pcmpistri128",
-    "llvm.x86.sse42.pcmpistria128" => "__builtin_ia32_pcmpistria128",
-    "llvm.x86.sse42.pcmpistric128" => "__builtin_ia32_pcmpistric128",
-    "llvm.x86.sse42.pcmpistrio128" => "__builtin_ia32_pcmpistrio128",
-    "llvm.x86.sse42.pcmpistris128" => "__builtin_ia32_pcmpistris128",
-    "llvm.x86.sse42.pcmpistriz128" => "__builtin_ia32_pcmpistriz128",
-    "llvm.x86.sse42.pcmpistrm128" => "__builtin_ia32_pcmpistrm128",
-    "llvm.x86.sse4a.extrq" => "__builtin_ia32_extrq",
-    "llvm.x86.sse4a.extrqi" => "__builtin_ia32_extrqi",
-    "llvm.x86.sse4a.insertq" => "__builtin_ia32_insertq",
-    "llvm.x86.sse4a.insertqi" => "__builtin_ia32_insertqi",
-    "llvm.x86.sse4a.movnt.sd" => "__builtin_ia32_movntsd",
-    "llvm.x86.sse4a.movnt.ss" => "__builtin_ia32_movntss",
-    "llvm.x86.ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
-    "llvm.x86.ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
-    "llvm.x86.ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
-    "llvm.x86.ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
-    "llvm.x86.ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
-    "llvm.x86.ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
-    "llvm.x86.ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
-    "llvm.x86.ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
-    "llvm.x86.ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
-    "llvm.x86.ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
-    "llvm.x86.ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
-    "llvm.x86.ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
-    "llvm.x86.ssse3.psign.b.128" => "__builtin_ia32_psignb128",
-    "llvm.x86.ssse3.psign.d.128" => "__builtin_ia32_psignd128",
-    "llvm.x86.ssse3.psign.w.128" => "__builtin_ia32_psignw128",
-    "llvm.x86.sttilecfg" => "__builtin_ia32_tile_storeconfig",
-    "llvm.x86.stui" => "__builtin_ia32_stui",
-    "llvm.x86.subborrow.u32" => "__builtin_ia32_subborrow_u32",
-    "llvm.x86.subborrow.u64" => "__builtin_ia32_subborrow_u64",
-    "llvm.x86.t2rpntlvwz0" => "__builtin_ia32_t2rpntlvwz0",
-    "llvm.x86.t2rpntlvwz0rs" => "__builtin_ia32_t2rpntlvwz0rs",
-    "llvm.x86.t2rpntlvwz0rst1" => "__builtin_ia32_t2rpntlvwz0rst1",
-    "llvm.x86.t2rpntlvwz0t1" => "__builtin_ia32_t2rpntlvwz0t1",
-    "llvm.x86.t2rpntlvwz1" => "__builtin_ia32_t2rpntlvwz1",
-    "llvm.x86.t2rpntlvwz1rs" => "__builtin_ia32_t2rpntlvwz1rs",
-    "llvm.x86.t2rpntlvwz1rst1" => "__builtin_ia32_t2rpntlvwz1rst1",
-    "llvm.x86.t2rpntlvwz1t1" => "__builtin_ia32_t2rpntlvwz1t1",
-    "llvm.x86.tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
-    "llvm.x86.tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
-    "llvm.x86.tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
-    "llvm.x86.tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
-    "llvm.x86.tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
-    "llvm.x86.tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
-    "llvm.x86.tconjtcmmimfp16ps" => "__builtin_ia32_tconjtcmmimfp16ps",
-    "llvm.x86.tconjtcmmimfp16ps.internal" => "__builtin_ia32_tconjtcmmimfp16ps_internal",
-    "llvm.x86.tconjtfp16" => "__builtin_ia32_tconjtfp16",
-    "llvm.x86.tconjtfp16.internal" => "__builtin_ia32_tconjtfp16_internal",
-    "llvm.x86.tcvtrowd2ps" => "__builtin_ia32_tcvtrowd2ps",
-    "llvm.x86.tcvtrowd2ps.internal" => "__builtin_ia32_tcvtrowd2ps_internal",
-    "llvm.x86.tcvtrowps2bf16h" => "__builtin_ia32_tcvtrowps2bf16h",
-    "llvm.x86.tcvtrowps2bf16h.internal" => "__builtin_ia32_tcvtrowps2bf16h_internal",
-    "llvm.x86.tcvtrowps2bf16l" => "__builtin_ia32_tcvtrowps2bf16l",
-    "llvm.x86.tcvtrowps2bf16l.internal" => "__builtin_ia32_tcvtrowps2bf16l_internal",
-    "llvm.x86.tcvtrowps2phh" => "__builtin_ia32_tcvtrowps2phh",
-    "llvm.x86.tcvtrowps2phh.internal" => "__builtin_ia32_tcvtrowps2phh_internal",
-    "llvm.x86.tcvtrowps2phl" => "__builtin_ia32_tcvtrowps2phl",
-    "llvm.x86.tcvtrowps2phl.internal" => "__builtin_ia32_tcvtrowps2phl_internal",
-    "llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
-    "llvm.x86.tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
-    "llvm.x86.tdpbf8ps" => "__builtin_ia32_tdpbf8ps",
-    "llvm.x86.tdpbf8ps.internal" => "__builtin_ia32_tdpbf8ps_internal",
-    "llvm.x86.tdpbhf8ps" => "__builtin_ia32_tdpbhf8ps",
-    "llvm.x86.tdpbhf8ps.internal" => "__builtin_ia32_tdpbhf8ps_internal",
-    "llvm.x86.tdpbssd" => "__builtin_ia32_tdpbssd",
-    "llvm.x86.tdpbssd.internal" => "__builtin_ia32_tdpbssd_internal",
-    "llvm.x86.tdpbsud" => "__builtin_ia32_tdpbsud",
-    "llvm.x86.tdpbsud.internal" => "__builtin_ia32_tdpbsud_internal",
-    "llvm.x86.tdpbusd" => "__builtin_ia32_tdpbusd",
-    "llvm.x86.tdpbusd.internal" => "__builtin_ia32_tdpbusd_internal",
-    "llvm.x86.tdpbuud" => "__builtin_ia32_tdpbuud",
-    "llvm.x86.tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
-    "llvm.x86.tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
-    "llvm.x86.tdpfp16ps.internal" => "__builtin_ia32_tdpfp16ps_internal",
-    "llvm.x86.tdphbf8ps" => "__builtin_ia32_tdphbf8ps",
-    "llvm.x86.tdphbf8ps.internal" => "__builtin_ia32_tdphbf8ps_internal",
-    "llvm.x86.tdphf8ps" => "__builtin_ia32_tdphf8ps",
-    "llvm.x86.tdphf8ps.internal" => "__builtin_ia32_tdphf8ps_internal",
-    "llvm.x86.testui" => "__builtin_ia32_testui",
-    "llvm.x86.tileloadd64" => "__builtin_ia32_tileloadd64",
-    "llvm.x86.tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
-    "llvm.x86.tileloaddrs64" => "__builtin_ia32_tileloaddrs64",
-    "llvm.x86.tileloaddrs64.internal" => "__builtin_ia32_tileloaddrs64_internal",
-    "llvm.x86.tileloaddrst164" => "__builtin_ia32_tileloaddrst164",
-    "llvm.x86.tileloaddrst164.internal" => "__builtin_ia32_tileloaddrst164_internal",
-    "llvm.x86.tileloaddt164" => "__builtin_ia32_tileloaddt164",
-    "llvm.x86.tileloaddt164.internal" => "__builtin_ia32_tileloaddt164_internal",
-    "llvm.x86.tilemovrow" => "__builtin_ia32_tilemovrow",
-    "llvm.x86.tilemovrow.internal" => "__builtin_ia32_tilemovrow_internal",
-    "llvm.x86.tilerelease" => "__builtin_ia32_tilerelease",
-    "llvm.x86.tilestored64" => "__builtin_ia32_tilestored64",
-    "llvm.x86.tilestored64.internal" => "__builtin_ia32_tilestored64_internal",
-    "llvm.x86.tilezero" => "__builtin_ia32_tilezero",
-    "llvm.x86.tilezero.internal" => "__builtin_ia32_tilezero_internal",
-    "llvm.x86.tmmultf32ps" => "__builtin_ia32_tmmultf32ps",
-    "llvm.x86.tmmultf32ps.internal" => "__builtin_ia32_tmmultf32ps_internal",
-    "llvm.x86.tpause" => "__builtin_ia32_tpause",
-    "llvm.x86.ttcmmimfp16ps" => "__builtin_ia32_ttcmmimfp16ps",
-    "llvm.x86.ttcmmimfp16ps.internal" => "__builtin_ia32_ttcmmimfp16ps_internal",
-    "llvm.x86.ttcmmrlfp16ps" => "__builtin_ia32_ttcmmrlfp16ps",
-    "llvm.x86.ttcmmrlfp16ps.internal" => "__builtin_ia32_ttcmmrlfp16ps_internal",
-    "llvm.x86.ttdpbf16ps" => "__builtin_ia32_ttdpbf16ps",
-    "llvm.x86.ttdpbf16ps.internal" => "__builtin_ia32_ttdpbf16ps_internal",
-    "llvm.x86.ttdpfp16ps" => "__builtin_ia32_ttdpfp16ps",
-    "llvm.x86.ttdpfp16ps.internal" => "__builtin_ia32_ttdpfp16ps_internal",
-    "llvm.x86.ttmmultf32ps" => "__builtin_ia32_ttmmultf32ps",
-    "llvm.x86.ttmmultf32ps.internal" => "__builtin_ia32_ttmmultf32ps_internal",
-    "llvm.x86.ttransposed" => "__builtin_ia32_ttransposed",
-    "llvm.x86.ttransposed.internal" => "__builtin_ia32_ttransposed_internal",
-    "llvm.x86.umonitor" => "__builtin_ia32_umonitor",
-    "llvm.x86.umwait" => "__builtin_ia32_umwait",
-    "llvm.x86.urdmsr" => "__builtin_ia32_urdmsr",
-    "llvm.x86.uwrmsr" => "__builtin_ia32_uwrmsr",
-    "llvm.x86.vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128",
-    "llvm.x86.vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256",
-    "llvm.x86.vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128",
-    "llvm.x86.vbcstnesh2ps256" => "__builtin_ia32_vbcstnesh2ps256",
-    "llvm.x86.vcvtneebf162ps128" => "__builtin_ia32_vcvtneebf162ps128",
-    "llvm.x86.vcvtneebf162ps256" => "__builtin_ia32_vcvtneebf162ps256",
-    "llvm.x86.vcvtneeph2ps128" => "__builtin_ia32_vcvtneeph2ps128",
-    "llvm.x86.vcvtneeph2ps256" => "__builtin_ia32_vcvtneeph2ps256",
-    "llvm.x86.vcvtneobf162ps128" => "__builtin_ia32_vcvtneobf162ps128",
-    "llvm.x86.vcvtneobf162ps256" => "__builtin_ia32_vcvtneobf162ps256",
-    "llvm.x86.vcvtneoph2ps128" => "__builtin_ia32_vcvtneoph2ps128",
-    "llvm.x86.vcvtneoph2ps256" => "__builtin_ia32_vcvtneoph2ps256",
-    "llvm.x86.vcvtneps2bf16128" => "__builtin_ia32_vcvtneps2bf16128",
-    "llvm.x86.vcvtneps2bf16256" => "__builtin_ia32_vcvtneps2bf16256",
-    "llvm.x86.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
-    "llvm.x86.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
-    "llvm.x86.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
-    "llvm.x86.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
-    "llvm.x86.vgf2p8affineinvqb.128" => "__builtin_ia32_vgf2p8affineinvqb_v16qi",
-    "llvm.x86.vgf2p8affineinvqb.256" => "__builtin_ia32_vgf2p8affineinvqb_v32qi",
-    "llvm.x86.vgf2p8affineinvqb.512" => "__builtin_ia32_vgf2p8affineinvqb_v64qi",
-    "llvm.x86.vgf2p8affineqb.128" => "__builtin_ia32_vgf2p8affineqb_v16qi",
-    "llvm.x86.vgf2p8affineqb.256" => "__builtin_ia32_vgf2p8affineqb_v32qi",
-    "llvm.x86.vgf2p8affineqb.512" => "__builtin_ia32_vgf2p8affineqb_v64qi",
-    "llvm.x86.vgf2p8mulb.128" => "__builtin_ia32_vgf2p8mulb_v16qi",
-    "llvm.x86.vgf2p8mulb.256" => "__builtin_ia32_vgf2p8mulb_v32qi",
-    "llvm.x86.vgf2p8mulb.512" => "__builtin_ia32_vgf2p8mulb_v64qi",
-    "llvm.x86.vsha512msg1" => "__builtin_ia32_vsha512msg1",
-    "llvm.x86.vsha512msg2" => "__builtin_ia32_vsha512msg2",
-    "llvm.x86.vsha512rnds2" => "__builtin_ia32_vsha512rnds2",
-    "llvm.x86.vsm3msg1" => "__builtin_ia32_vsm3msg1",
-    "llvm.x86.vsm3msg2" => "__builtin_ia32_vsm3msg2",
-    "llvm.x86.vsm3rnds2" => "__builtin_ia32_vsm3rnds2",
-    "llvm.x86.vsm4key4128" => "__builtin_ia32_vsm4key4128",
-    "llvm.x86.vsm4key4256" => "__builtin_ia32_vsm4key4256",
-    "llvm.x86.vsm4key4512" => "__builtin_ia32_vsm4key4512",
-    "llvm.x86.vsm4rnds4128" => "__builtin_ia32_vsm4rnds4128",
-    "llvm.x86.vsm4rnds4256" => "__builtin_ia32_vsm4rnds4256",
-    "llvm.x86.vsm4rnds4512" => "__builtin_ia32_vsm4rnds4512",
-    "llvm.x86.wbinvd" => "__builtin_ia32_wbinvd",
-    "llvm.x86.wbnoinvd" => "__builtin_ia32_wbnoinvd",
-    "llvm.x86.wrfsbase.32" => "__builtin_ia32_wrfsbase32",
-    "llvm.x86.wrfsbase.64" => "__builtin_ia32_wrfsbase64",
-    "llvm.x86.wrgsbase.32" => "__builtin_ia32_wrgsbase32",
-    "llvm.x86.wrgsbase.64" => "__builtin_ia32_wrgsbase64",
-    "llvm.x86.wrpkru" => "__builtin_ia32_wrpkru",
-    "llvm.x86.wrssd" => "__builtin_ia32_wrssd",
-    "llvm.x86.wrssq" => "__builtin_ia32_wrssq",
-    "llvm.x86.wrussd" => "__builtin_ia32_wrussd",
-    "llvm.x86.wrussq" => "__builtin_ia32_wrussq",
-    "llvm.x86.xabort" => "__builtin_ia32_xabort",
-    "llvm.x86.xbegin" => "__builtin_ia32_xbegin",
-    "llvm.x86.xend" => "__builtin_ia32_xend",
-    "llvm.x86.xop.vfrcz.pd" => "__builtin_ia32_vfrczpd",
-    "llvm.x86.xop.vfrcz.pd.256" => "__builtin_ia32_vfrczpd256",
-    "llvm.x86.xop.vfrcz.ps" => "__builtin_ia32_vfrczps",
-    "llvm.x86.xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
-    "llvm.x86.xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
-    "llvm.x86.xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
-    "llvm.x86.xop.vpcmov" => "__builtin_ia32_vpcmov",
-    "llvm.x86.xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
-    "llvm.x86.xop.vpcomb" => "__builtin_ia32_vpcomb",
-    "llvm.x86.xop.vpcomd" => "__builtin_ia32_vpcomd",
-    "llvm.x86.xop.vpcomq" => "__builtin_ia32_vpcomq",
-    "llvm.x86.xop.vpcomub" => "__builtin_ia32_vpcomub",
-    "llvm.x86.xop.vpcomud" => "__builtin_ia32_vpcomud",
-    "llvm.x86.xop.vpcomuq" => "__builtin_ia32_vpcomuq",
-    "llvm.x86.xop.vpcomuw" => "__builtin_ia32_vpcomuw",
-    "llvm.x86.xop.vpcomw" => "__builtin_ia32_vpcomw",
-    "llvm.x86.xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
-    "llvm.x86.xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
-    "llvm.x86.xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
-    "llvm.x86.xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
-    "llvm.x86.xop.vphaddbd" => "__builtin_ia32_vphaddbd",
-    "llvm.x86.xop.vphaddbq" => "__builtin_ia32_vphaddbq",
-    "llvm.x86.xop.vphaddbw" => "__builtin_ia32_vphaddbw",
-    "llvm.x86.xop.vphadddq" => "__builtin_ia32_vphadddq",
-    "llvm.x86.xop.vphaddubd" => "__builtin_ia32_vphaddubd",
-    "llvm.x86.xop.vphaddubq" => "__builtin_ia32_vphaddubq",
-    "llvm.x86.xop.vphaddubw" => "__builtin_ia32_vphaddubw",
-    "llvm.x86.xop.vphaddudq" => "__builtin_ia32_vphaddudq",
-    "llvm.x86.xop.vphadduwd" => "__builtin_ia32_vphadduwd",
-    "llvm.x86.xop.vphadduwq" => "__builtin_ia32_vphadduwq",
-    "llvm.x86.xop.vphaddwd" => "__builtin_ia32_vphaddwd",
-    "llvm.x86.xop.vphaddwq" => "__builtin_ia32_vphaddwq",
-    "llvm.x86.xop.vphsubbw" => "__builtin_ia32_vphsubbw",
-    "llvm.x86.xop.vphsubdq" => "__builtin_ia32_vphsubdq",
-    "llvm.x86.xop.vphsubwd" => "__builtin_ia32_vphsubwd",
-    "llvm.x86.xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
-    "llvm.x86.xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
-    "llvm.x86.xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
-    "llvm.x86.xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
-    "llvm.x86.xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
-    "llvm.x86.xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
-    "llvm.x86.xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
-    "llvm.x86.xop.vpmacssww" => "__builtin_ia32_vpmacssww",
-    "llvm.x86.xop.vpmacswd" => "__builtin_ia32_vpmacswd",
-    "llvm.x86.xop.vpmacsww" => "__builtin_ia32_vpmacsww",
-    "llvm.x86.xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
-    "llvm.x86.xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
-    "llvm.x86.xop.vpperm" => "__builtin_ia32_vpperm",
-    "llvm.x86.xop.vprotb" => "__builtin_ia32_vprotb",
-    "llvm.x86.xop.vprotbi" => "__builtin_ia32_vprotbi",
-    "llvm.x86.xop.vprotd" => "__builtin_ia32_vprotd",
-    "llvm.x86.xop.vprotdi" => "__builtin_ia32_vprotdi",
-    "llvm.x86.xop.vprotq" => "__builtin_ia32_vprotq",
-    "llvm.x86.xop.vprotqi" => "__builtin_ia32_vprotqi",
-    "llvm.x86.xop.vprotw" => "__builtin_ia32_vprotw",
-    "llvm.x86.xop.vprotwi" => "__builtin_ia32_vprotwi",
-    "llvm.x86.xop.vpshab" => "__builtin_ia32_vpshab",
-    "llvm.x86.xop.vpshad" => "__builtin_ia32_vpshad",
-    "llvm.x86.xop.vpshaq" => "__builtin_ia32_vpshaq",
-    "llvm.x86.xop.vpshaw" => "__builtin_ia32_vpshaw",
-    "llvm.x86.xop.vpshlb" => "__builtin_ia32_vpshlb",
-    "llvm.x86.xop.vpshld" => "__builtin_ia32_vpshld",
-    "llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
-    "llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
-    "llvm.x86.xresldtrk" => "__builtin_ia32_xresldtrk",
-    "llvm.x86.xsusldtrk" => "__builtin_ia32_xsusldtrk",
-    "llvm.x86.xtest" => "__builtin_ia32_xtest",
-    // xcore
-    "llvm.xcore.bitrev" => "__builtin_bitrev",
-    "llvm.xcore.getid" => "__builtin_getid",
-    "llvm.xcore.getps" => "__builtin_getps",
-    "llvm.xcore.setps" => "__builtin_setps",
-    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+/// Translate a given LLVM intrinsic name to an equivalent GCC one.
+fn map_arch_intrinsic(name: &str) -> &str {
+    let Some(name) = name.strip_prefix("llvm.") else {
+        unimplemented!("***** unsupported LLVM intrinsic {}", name)
+    };
+    let Some((arch, name)) = name.split_once('.') else {
+        unimplemented!("***** unsupported LLVM intrinsic {}", name)
+    };
+    match arch {
+        "AMDGPU" => {
+            #[allow(non_snake_case)]
+            fn AMDGPU(name: &str) -> &str {
+                match name {
+                    // AMDGPU
+                    "div.fixup.f32" => "__builtin_amdgpu_div_fixup",
+                    "div.fixup.f64" => "__builtin_amdgpu_div_fixup",
+                    "div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
+                    "div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
+                    "div.fmas.f32" => "__builtin_amdgpu_div_fmas",
+                    "div.fmas.f64" => "__builtin_amdgpu_div_fmas",
+                    "div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
+                    "div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
+                    "ldexp.f32" => "__builtin_amdgpu_ldexp",
+                    "ldexp.f64" => "__builtin_amdgpu_ldexp",
+                    "ldexp.v2f64" => "__builtin_amdgpu_ldexp",
+                    "ldexp.v4f32" => "__builtin_amdgpu_ldexp",
+                    "rcp.f32" => "__builtin_amdgpu_rcp",
+                    "rcp.f64" => "__builtin_amdgpu_rcp",
+                    "rcp.v2f64" => "__builtin_amdgpu_rcp",
+                    "rcp.v4f32" => "__builtin_amdgpu_rcp",
+                    "rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
+                    "rsq.f32" => "__builtin_amdgpu_rsq",
+                    "rsq.f64" => "__builtin_amdgpu_rsq",
+                    "rsq.v2f64" => "__builtin_amdgpu_rsq",
+                    "rsq.v4f32" => "__builtin_amdgpu_rsq",
+                    "trig.preop.f32" => "__builtin_amdgpu_trig_preop",
+                    "trig.preop.f64" => "__builtin_amdgpu_trig_preop",
+                    "trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
+                    "trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            AMDGPU(name)
+        }
+        "aarch64" => {
+            #[allow(non_snake_case)]
+            fn aarch64(name: &str) -> &str {
+                match name {
+                    // aarch64
+                    "chkfeat" => "__builtin_arm_chkfeat",
+                    "dmb" => "__builtin_arm_dmb",
+                    "dsb" => "__builtin_arm_dsb",
+                    "gcspopm" => "__builtin_arm_gcspopm",
+                    "gcsss" => "__builtin_arm_gcsss",
+                    "isb" => "__builtin_arm_isb",
+                    "prefetch" => "__builtin_arm_prefetch",
+                    "sme.in.streaming.mode" => "__builtin_arm_in_streaming_mode",
+                    "sve.aesd" => "__builtin_sve_svaesd_u8",
+                    "sve.aese" => "__builtin_sve_svaese_u8",
+                    "sve.aesimc" => "__builtin_sve_svaesimc_u8",
+                    "sve.aesmc" => "__builtin_sve_svaesmc_u8",
+                    "sve.rax1" => "__builtin_sve_svrax1_u64",
+                    "sve.rdffr" => "__builtin_sve_svrdffr",
+                    "sve.rdffr.z" => "__builtin_sve_svrdffr_z",
+                    "sve.setffr" => "__builtin_sve_svsetffr",
+                    "sve.sm4e" => "__builtin_sve_svsm4e_u32",
+                    "sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
+                    "sve.wrffr" => "__builtin_sve_svwrffr",
+                    "tcancel" => "__builtin_arm_tcancel",
+                    "tcommit" => "__builtin_arm_tcommit",
+                    "tstart" => "__builtin_arm_tstart",
+                    "ttest" => "__builtin_arm_ttest",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            aarch64(name)
+        }
+        "amdgcn" => {
+            #[allow(non_snake_case)]
+            fn amdgcn(name: &str) -> &str {
+                match name {
+                    // amdgcn
+                    "alignbyte" => "__builtin_amdgcn_alignbyte",
+                    "ashr.pk.i8.i32" => "__builtin_amdgcn_ashr_pk_i8_i32",
+                    "ashr.pk.u8.i32" => "__builtin_amdgcn_ashr_pk_u8_i32",
+                    "buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
+                    "buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
+                    "buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
+                    "cubeid" => "__builtin_amdgcn_cubeid",
+                    "cubema" => "__builtin_amdgcn_cubema",
+                    "cubesc" => "__builtin_amdgcn_cubesc",
+                    "cubetc" => "__builtin_amdgcn_cubetc",
+                    "cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
+                    "cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
+                    "cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
+                    "cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
+                    "cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
+                    "cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
+                    "cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
+                    "cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
+                    "cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
+                    "cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
+                    "cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
+                    "cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
+                    "cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
+                    "cvt.scalef32.2xpk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_bf6_f32",
+                    "cvt.scalef32.2xpk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_fp6_f32",
+                    "cvt.scalef32.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_f16_bf8",
+                    "cvt.scalef32.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_f16_fp8",
+                    "cvt.scalef32.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_f32_bf8",
+                    "cvt.scalef32.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_f32_fp8",
+                    "cvt.scalef32.pk.bf16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_bf8",
+                    "cvt.scalef32.pk.bf16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp4",
+                    "cvt.scalef32.pk.bf16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp8",
+                    "cvt.scalef32.pk.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_bf16",
+                    "cvt.scalef32.pk.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f16",
+                    "cvt.scalef32.pk.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f32",
+                    "cvt.scalef32.pk.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_bf8",
+                    "cvt.scalef32.pk.f16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp4",
+                    "cvt.scalef32.pk.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp8",
+                    "cvt.scalef32.pk.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_bf8",
+                    "cvt.scalef32.pk.f32.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp4",
+                    "cvt.scalef32.pk.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp8",
+                    "cvt.scalef32.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_bf16",
+                    "cvt.scalef32.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f16",
+                    "cvt.scalef32.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f32",
+                    "cvt.scalef32.pk.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_bf16",
+                    "cvt.scalef32.pk.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f16",
+                    "cvt.scalef32.pk.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f32",
+                    "cvt.scalef32.pk32.bf16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_bf6",
+                    "cvt.scalef32.pk32.bf16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_fp6",
+                    "cvt.scalef32.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_bf16",
+                    "cvt.scalef32.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_f16",
+                    "cvt.scalef32.pk32.f16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_bf6",
+                    "cvt.scalef32.pk32.f16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_fp6",
+                    "cvt.scalef32.pk32.f32.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_bf6",
+                    "cvt.scalef32.pk32.f32.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_fp6",
+                    "cvt.scalef32.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_bf16",
+                    "cvt.scalef32.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_f16",
+                    "cvt.scalef32.sr.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_bf16",
+                    "cvt.scalef32.sr.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f16",
+                    "cvt.scalef32.sr.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f32",
+                    "cvt.scalef32.sr.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_bf16",
+                    "cvt.scalef32.sr.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f16",
+                    "cvt.scalef32.sr.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f32",
+                    "cvt.scalef32.sr.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_bf16",
+                    "cvt.scalef32.sr.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f16",
+                    "cvt.scalef32.sr.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f32",
+                    "cvt.scalef32.sr.pk32.bf6.bf16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_bf16"
+                    }
+                    "cvt.scalef32.sr.pk32.bf6.f16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f16"
+                    }
+                    "cvt.scalef32.sr.pk32.bf6.f32" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f32"
+                    }
+                    "cvt.scalef32.sr.pk32.fp6.bf16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_bf16"
+                    }
+                    "cvt.scalef32.sr.pk32.fp6.f16" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f16"
+                    }
+                    "cvt.scalef32.sr.pk32.fp6.f32" => {
+                        "__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f32"
+                    }
+                    "cvt.sr.bf16.f32" => "__builtin_amdgcn_cvt_sr_bf16_f32",
+                    "cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
+                    "cvt.sr.f16.f32" => "__builtin_amdgcn_cvt_sr_f16_f32",
+                    "cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
+                    "dispatch.id" => "__builtin_amdgcn_dispatch_id",
+                    "dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
+                    "dot4.f32.bf8.fp8" => "__builtin_amdgcn_dot4_f32_bf8_fp8",
+                    "dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
+                    "dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
+                    "ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
+                    "ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
+                    "ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
+                    "ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
+                    "ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
+                    "ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
+                    "ds.gws.sema.p" => "__builtin_amdgcn_ds_gws_sema_p",
+                    "ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
+                    "ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
+                    "ds.permute" => "__builtin_amdgcn_ds_permute",
+                    "ds.sub.gs.reg.rtn" => "__builtin_amdgcn_ds_sub_gs_reg_rtn",
+                    "ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
+                    "endpgm" => "__builtin_amdgcn_endpgm",
+                    "fdot2" => "__builtin_amdgcn_fdot2",
+                    "fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
+                    "fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
+                    "fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
+                    "fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
+                    "fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
+                    "global.load.lds" => "__builtin_amdgcn_global_load_lds",
+                    "groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
+                    "iglp.opt" => "__builtin_amdgcn_iglp_opt",
+                    "implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
+                    "implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
+                    "interp.mov" => "__builtin_amdgcn_interp_mov",
+                    "interp.p1" => "__builtin_amdgcn_interp_p1",
+                    "interp.p1.f16" => "__builtin_amdgcn_interp_p1_f16",
+                    "interp.p2" => "__builtin_amdgcn_interp_p2",
+                    "interp.p2.f16" => "__builtin_amdgcn_interp_p2_f16",
+                    "is.private" => "__builtin_amdgcn_is_private",
+                    "is.shared" => "__builtin_amdgcn_is_shared",
+                    "kernarg.segment.ptr" => "__builtin_amdgcn_kernarg_segment_ptr",
+                    "lerp" => "__builtin_amdgcn_lerp",
+                    "mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
+                    "mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
+                    "mfma.f32.16x16x16bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x16bf16_1k",
+                    "mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
+                    "mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
+                    "mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
+                    "mfma.f32.16x16x32.bf16" => "__builtin_amdgcn_mfma_f32_16x16x32_bf16",
+                    "mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
+                    "mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
+                    "mfma.f32.16x16x32.f16" => "__builtin_amdgcn_mfma_f32_16x16x32_f16",
+                    "mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
+                    "mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
+                    "mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
+                    "mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
+                    "mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
+                    "mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
+                    "mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
+                    "mfma.f32.32x32x16.bf16" => "__builtin_amdgcn_mfma_f32_32x32x16_bf16",
+                    "mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
+                    "mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
+                    "mfma.f32.32x32x16.f16" => "__builtin_amdgcn_mfma_f32_32x32x16_f16",
+                    "mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
+                    "mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
+                    "mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
+                    "mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
+                    "mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
+                    "mfma.f32.32x32x4.xf32" => "__builtin_amdgcn_mfma_f32_32x32x4_xf32",
+                    "mfma.f32.32x32x4bf16" => "__builtin_amdgcn_mfma_f32_32x32x4bf16",
+                    "mfma.f32.32x32x4bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x4bf16_1k",
+                    "mfma.f32.32x32x4f16" => "__builtin_amdgcn_mfma_f32_32x32x4f16",
+                    "mfma.f32.32x32x8bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x8bf16_1k",
+                    "mfma.f32.32x32x8f16" => "__builtin_amdgcn_mfma_f32_32x32x8f16",
+                    "mfma.f32.4x4x1f32" => "__builtin_amdgcn_mfma_f32_4x4x1f32",
+                    "mfma.f32.4x4x2bf16" => "__builtin_amdgcn_mfma_f32_4x4x2bf16",
+                    "mfma.f32.4x4x4bf16.1k" => "__builtin_amdgcn_mfma_f32_4x4x4bf16_1k",
+                    "mfma.f32.4x4x4f16" => "__builtin_amdgcn_mfma_f32_4x4x4f16",
+                    "mfma.f64.16x16x4f64" => "__builtin_amdgcn_mfma_f64_16x16x4f64",
+                    "mfma.f64.4x4x4f64" => "__builtin_amdgcn_mfma_f64_4x4x4f64",
+                    "mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
+                    "mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
+                    "mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
+                    "mfma.i32.16x16x64.i8" => "__builtin_amdgcn_mfma_i32_16x16x64_i8",
+                    "mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
+                    "mfma.i32.32x32x32.i8" => "__builtin_amdgcn_mfma_i32_32x32x32_i8",
+                    "mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
+                    "mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
+                    "mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
+                    "mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
+                    "mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
+                    "msad.u8" => "__builtin_amdgcn_msad_u8",
+                    "perm" => "__builtin_amdgcn_perm",
+                    "permlane16.var" => "__builtin_amdgcn_permlane16_var",
+                    "permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
+                    "prng.b32" => "__builtin_amdgcn_prng_b32",
+                    "qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
+                    "queue.ptr" => "__builtin_amdgcn_queue_ptr",
+                    "raw.ptr.buffer.load.lds" => "__builtin_amdgcn_raw_ptr_buffer_load_lds",
+                    "rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
+                    "rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
+                    "s.barrier" => "__builtin_amdgcn_s_barrier",
+                    "s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
+                    "s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
+                    "s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
+                    "s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
+                    "s.buffer.prefetch.data" => "__builtin_amdgcn_s_buffer_prefetch_data",
+                    "s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
+                    "s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
+                    "s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
+                    "s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
+                    "s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
+                    "s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
+                    "s.get.named.barrier.state" => "__builtin_amdgcn_s_get_named_barrier_state",
+                    "s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
+                    "s.getpc" => "__builtin_amdgcn_s_getpc",
+                    "s.getreg" => "__builtin_amdgcn_s_getreg",
+                    "s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
+                    "s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
+                    "s.memtime" => "__builtin_amdgcn_s_memtime",
+                    "s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
+                    "s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
+                    "s.setprio" => "__builtin_amdgcn_s_setprio",
+                    "s.setreg" => "__builtin_amdgcn_s_setreg",
+                    "s.sleep" => "__builtin_amdgcn_s_sleep",
+                    "s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
+                    "s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
+                    "s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
+                    "s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
+                    "s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
+                    "sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
+                    "sad.u16" => "__builtin_amdgcn_sad_u16",
+                    "sad.u8" => "__builtin_amdgcn_sad_u8",
+                    "sched.barrier" => "__builtin_amdgcn_sched_barrier",
+                    "sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
+                    "sdot2" => "__builtin_amdgcn_sdot2",
+                    "sdot4" => "__builtin_amdgcn_sdot4",
+                    "sdot8" => "__builtin_amdgcn_sdot8",
+                    "smfmac.f32.16x16x128.bf8.bf8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_bf8"
+                    }
+                    "smfmac.f32.16x16x128.bf8.fp8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_bf8_fp8"
+                    }
+                    "smfmac.f32.16x16x128.fp8.bf8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_bf8"
+                    }
+                    "smfmac.f32.16x16x128.fp8.fp8" => {
+                        "__builtin_amdgcn_smfmac_f32_16x16x128_fp8_fp8"
+                    }
+                    "smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
+                    "smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
+                    "smfmac.f32.16x16x64.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf16",
+                    "smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
+                    "smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
+                    "smfmac.f32.16x16x64.f16" => "__builtin_amdgcn_smfmac_f32_16x16x64_f16",
+                    "smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
+                    "smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
+                    "smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
+                    "smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
+                    "smfmac.f32.32x32x32.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf16",
+                    "smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
+                    "smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
+                    "smfmac.f32.32x32x32.f16" => "__builtin_amdgcn_smfmac_f32_32x32x32_f16",
+                    "smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
+                    "smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
+                    "smfmac.f32.32x32x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_bf8",
+                    "smfmac.f32.32x32x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_fp8",
+                    "smfmac.f32.32x32x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_bf8",
+                    "smfmac.f32.32x32x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_fp8",
+                    "smfmac.i32.16x16x128.i8" => "__builtin_amdgcn_smfmac_i32_16x16x128_i8",
+                    "smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
+                    "smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
+                    "smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
+                    "sudot4" => "__builtin_amdgcn_sudot4",
+                    "sudot8" => "__builtin_amdgcn_sudot8",
+                    "udot2" => "__builtin_amdgcn_udot2",
+                    "udot4" => "__builtin_amdgcn_udot4",
+                    "udot8" => "__builtin_amdgcn_udot8",
+                    "wave.barrier" => "__builtin_amdgcn_wave_barrier",
+                    "wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
+                    "workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
+                    "workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
+                    "workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
+                    "workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
+                    "workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
+                    "workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            amdgcn(name)
+        }
+        "arm" => {
+            #[allow(non_snake_case)]
+            fn arm(name: &str) -> &str {
+                match name {
+                    // arm
+                    "cdp" => "__builtin_arm_cdp",
+                    "cdp2" => "__builtin_arm_cdp2",
+                    "cmse.tt" => "__builtin_arm_cmse_TT",
+                    "cmse.tta" => "__builtin_arm_cmse_TTA",
+                    "cmse.ttat" => "__builtin_arm_cmse_TTAT",
+                    "cmse.ttt" => "__builtin_arm_cmse_TTT",
+                    "dmb" => "__builtin_arm_dmb",
+                    "dsb" => "__builtin_arm_dsb",
+                    "get.fpscr" => "__builtin_arm_get_fpscr",
+                    "isb" => "__builtin_arm_isb",
+                    "ldc" => "__builtin_arm_ldc",
+                    "ldc2" => "__builtin_arm_ldc2",
+                    "ldc2l" => "__builtin_arm_ldc2l",
+                    "ldcl" => "__builtin_arm_ldcl",
+                    "mcr" => "__builtin_arm_mcr",
+                    "mcr2" => "__builtin_arm_mcr2",
+                    "mcrr" => "__builtin_arm_mcrr",
+                    "mcrr2" => "__builtin_arm_mcrr2",
+                    "mrc" => "__builtin_arm_mrc",
+                    "mrc2" => "__builtin_arm_mrc2",
+                    "qadd" => "__builtin_arm_qadd",
+                    "qadd16" => "__builtin_arm_qadd16",
+                    "qadd8" => "__builtin_arm_qadd8",
+                    "qasx" => "__builtin_arm_qasx",
+                    "qsax" => "__builtin_arm_qsax",
+                    "qsub" => "__builtin_arm_qsub",
+                    "qsub16" => "__builtin_arm_qsub16",
+                    "qsub8" => "__builtin_arm_qsub8",
+                    "sadd16" => "__builtin_arm_sadd16",
+                    "sadd8" => "__builtin_arm_sadd8",
+                    "sasx" => "__builtin_arm_sasx",
+                    "sel" => "__builtin_arm_sel",
+                    "set.fpscr" => "__builtin_arm_set_fpscr",
+                    "shadd16" => "__builtin_arm_shadd16",
+                    "shadd8" => "__builtin_arm_shadd8",
+                    "shasx" => "__builtin_arm_shasx",
+                    "shsax" => "__builtin_arm_shsax",
+                    "shsub16" => "__builtin_arm_shsub16",
+                    "shsub8" => "__builtin_arm_shsub8",
+                    "smlabb" => "__builtin_arm_smlabb",
+                    "smlabt" => "__builtin_arm_smlabt",
+                    "smlad" => "__builtin_arm_smlad",
+                    "smladx" => "__builtin_arm_smladx",
+                    "smlald" => "__builtin_arm_smlald",
+                    "smlaldx" => "__builtin_arm_smlaldx",
+                    "smlatb" => "__builtin_arm_smlatb",
+                    "smlatt" => "__builtin_arm_smlatt",
+                    "smlawb" => "__builtin_arm_smlawb",
+                    "smlawt" => "__builtin_arm_smlawt",
+                    "smlsd" => "__builtin_arm_smlsd",
+                    "smlsdx" => "__builtin_arm_smlsdx",
+                    "smlsld" => "__builtin_arm_smlsld",
+                    "smlsldx" => "__builtin_arm_smlsldx",
+                    "smuad" => "__builtin_arm_smuad",
+                    "smuadx" => "__builtin_arm_smuadx",
+                    "smulbb" => "__builtin_arm_smulbb",
+                    "smulbt" => "__builtin_arm_smulbt",
+                    "smultb" => "__builtin_arm_smultb",
+                    "smultt" => "__builtin_arm_smultt",
+                    "smulwb" => "__builtin_arm_smulwb",
+                    "smulwt" => "__builtin_arm_smulwt",
+                    "smusd" => "__builtin_arm_smusd",
+                    "smusdx" => "__builtin_arm_smusdx",
+                    "ssat" => "__builtin_arm_ssat",
+                    "ssat16" => "__builtin_arm_ssat16",
+                    "ssax" => "__builtin_arm_ssax",
+                    "ssub16" => "__builtin_arm_ssub16",
+                    "ssub8" => "__builtin_arm_ssub8",
+                    "stc" => "__builtin_arm_stc",
+                    "stc2" => "__builtin_arm_stc2",
+                    "stc2l" => "__builtin_arm_stc2l",
+                    "stcl" => "__builtin_arm_stcl",
+                    "sxtab16" => "__builtin_arm_sxtab16",
+                    "sxtb16" => "__builtin_arm_sxtb16",
+                    "thread.pointer" => "__builtin_thread_pointer",
+                    "uadd16" => "__builtin_arm_uadd16",
+                    "uadd8" => "__builtin_arm_uadd8",
+                    "uasx" => "__builtin_arm_uasx",
+                    "uhadd16" => "__builtin_arm_uhadd16",
+                    "uhadd8" => "__builtin_arm_uhadd8",
+                    "uhasx" => "__builtin_arm_uhasx",
+                    "uhsax" => "__builtin_arm_uhsax",
+                    "uhsub16" => "__builtin_arm_uhsub16",
+                    "uhsub8" => "__builtin_arm_uhsub8",
+                    "uqadd16" => "__builtin_arm_uqadd16",
+                    "uqadd8" => "__builtin_arm_uqadd8",
+                    "uqasx" => "__builtin_arm_uqasx",
+                    "uqsax" => "__builtin_arm_uqsax",
+                    "uqsub16" => "__builtin_arm_uqsub16",
+                    "uqsub8" => "__builtin_arm_uqsub8",
+                    "usad8" => "__builtin_arm_usad8",
+                    "usada8" => "__builtin_arm_usada8",
+                    "usat" => "__builtin_arm_usat",
+                    "usat16" => "__builtin_arm_usat16",
+                    "usax" => "__builtin_arm_usax",
+                    "usub16" => "__builtin_arm_usub16",
+                    "usub8" => "__builtin_arm_usub8",
+                    "uxtab16" => "__builtin_arm_uxtab16",
+                    "uxtb16" => "__builtin_arm_uxtb16",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            arm(name)
+        }
+        "bpf" => {
+            #[allow(non_snake_case)]
+            fn bpf(name: &str) -> &str {
+                match name {
+                    // bpf
+                    "btf.type.id" => "__builtin_bpf_btf_type_id",
+                    "compare" => "__builtin_bpf_compare",
+                    "getelementptr.and.load" => "__builtin_bpf_getelementptr_and_load",
+                    "getelementptr.and.store" => "__builtin_bpf_getelementptr_and_store",
+                    "load.byte" => "__builtin_bpf_load_byte",
+                    "load.half" => "__builtin_bpf_load_half",
+                    "load.word" => "__builtin_bpf_load_word",
+                    "passthrough" => "__builtin_bpf_passthrough",
+                    "preserve.enum.value" => "__builtin_bpf_preserve_enum_value",
+                    "preserve.field.info" => "__builtin_bpf_preserve_field_info",
+                    "preserve.type.info" => "__builtin_bpf_preserve_type_info",
+                    "pseudo" => "__builtin_bpf_pseudo",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            bpf(name)
+        }
+        "cuda" => {
+            #[allow(non_snake_case)]
+            fn cuda(name: &str) -> &str {
+                match name {
+                    // cuda
+                    "syncthreads" => "__syncthreads",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            cuda(name)
+        }
+        "hexagon" => {
+            #[allow(non_snake_case)]
+            fn hexagon(name: &str) -> &str {
+                match name {
+                    // hexagon
+                    "A2.abs" => "__builtin_HEXAGON_A2_abs",
+                    "A2.absp" => "__builtin_HEXAGON_A2_absp",
+                    "A2.abssat" => "__builtin_HEXAGON_A2_abssat",
+                    "A2.add" => "__builtin_HEXAGON_A2_add",
+                    "A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
+                    "A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
+                    "A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
+                    "A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
+                    "A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
+                    "A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
+                    "A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
+                    "A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
+                    "A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
+                    "A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
+                    "A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
+                    "A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
+                    "A2.addi" => "__builtin_HEXAGON_A2_addi",
+                    "A2.addp" => "__builtin_HEXAGON_A2_addp",
+                    "A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
+                    "A2.addsat" => "__builtin_HEXAGON_A2_addsat",
+                    "A2.addsp" => "__builtin_HEXAGON_A2_addsp",
+                    "A2.and" => "__builtin_HEXAGON_A2_and",
+                    "A2.andir" => "__builtin_HEXAGON_A2_andir",
+                    "A2.andp" => "__builtin_HEXAGON_A2_andp",
+                    "A2.aslh" => "__builtin_HEXAGON_A2_aslh",
+                    "A2.asrh" => "__builtin_HEXAGON_A2_asrh",
+                    "A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
+                    "A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
+                    "A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
+                    "A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
+                    "A2.combineii" => "__builtin_HEXAGON_A2_combineii",
+                    "A2.combinew" => "__builtin_HEXAGON_A2_combinew",
+                    "A2.max" => "__builtin_HEXAGON_A2_max",
+                    "A2.maxp" => "__builtin_HEXAGON_A2_maxp",
+                    "A2.maxu" => "__builtin_HEXAGON_A2_maxu",
+                    "A2.maxup" => "__builtin_HEXAGON_A2_maxup",
+                    "A2.min" => "__builtin_HEXAGON_A2_min",
+                    "A2.minp" => "__builtin_HEXAGON_A2_minp",
+                    "A2.minu" => "__builtin_HEXAGON_A2_minu",
+                    "A2.minup" => "__builtin_HEXAGON_A2_minup",
+                    "A2.neg" => "__builtin_HEXAGON_A2_neg",
+                    "A2.negp" => "__builtin_HEXAGON_A2_negp",
+                    "A2.negsat" => "__builtin_HEXAGON_A2_negsat",
+                    "A2.not" => "__builtin_HEXAGON_A2_not",
+                    "A2.notp" => "__builtin_HEXAGON_A2_notp",
+                    "A2.or" => "__builtin_HEXAGON_A2_or",
+                    "A2.orir" => "__builtin_HEXAGON_A2_orir",
+                    "A2.orp" => "__builtin_HEXAGON_A2_orp",
+                    "A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
+                    "A2.sat" => "__builtin_HEXAGON_A2_sat",
+                    "A2.satb" => "__builtin_HEXAGON_A2_satb",
+                    "A2.sath" => "__builtin_HEXAGON_A2_sath",
+                    "A2.satub" => "__builtin_HEXAGON_A2_satub",
+                    "A2.satuh" => "__builtin_HEXAGON_A2_satuh",
+                    "A2.sub" => "__builtin_HEXAGON_A2_sub",
+                    "A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
+                    "A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
+                    "A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
+                    "A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
+                    "A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
+                    "A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
+                    "A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
+                    "A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
+                    "A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
+                    "A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
+                    "A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
+                    "A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
+                    "A2.subp" => "__builtin_HEXAGON_A2_subp",
+                    "A2.subri" => "__builtin_HEXAGON_A2_subri",
+                    "A2.subsat" => "__builtin_HEXAGON_A2_subsat",
+                    "A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
+                    "A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
+                    "A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
+                    "A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
+                    "A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
+                    "A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
+                    "A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
+                    "A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
+                    "A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
+                    "A2.swiz" => "__builtin_HEXAGON_A2_swiz",
+                    "A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
+                    "A2.sxth" => "__builtin_HEXAGON_A2_sxth",
+                    "A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
+                    "A2.tfr" => "__builtin_HEXAGON_A2_tfr",
+                    "A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
+                    "A2.tfril" => "__builtin_HEXAGON_A2_tfril",
+                    "A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
+                    "A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
+                    "A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
+                    "A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
+                    "A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
+                    "A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
+                    "A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
+                    "A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
+                    "A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
+                    "A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
+                    "A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
+                    "A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
+                    "A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
+                    "A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
+                    "A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
+                    "A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
+                    "A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
+                    "A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
+                    "A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
+                    "A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
+                    "A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
+                    "A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
+                    "A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
+                    "A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
+                    "A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
+                    "A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
+                    "A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
+                    "A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
+                    "A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
+                    "A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
+                    "A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
+                    "A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
+                    "A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
+                    "A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
+                    "A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
+                    "A2.vconj" => "__builtin_HEXAGON_A2_vconj",
+                    "A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
+                    "A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
+                    "A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
+                    "A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
+                    "A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
+                    "A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
+                    "A2.vminb" => "__builtin_HEXAGON_A2_vminb",
+                    "A2.vminh" => "__builtin_HEXAGON_A2_vminh",
+                    "A2.vminub" => "__builtin_HEXAGON_A2_vminub",
+                    "A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
+                    "A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
+                    "A2.vminw" => "__builtin_HEXAGON_A2_vminw",
+                    "A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
+                    "A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
+                    "A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
+                    "A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
+                    "A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
+                    "A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
+                    "A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
+                    "A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
+                    "A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
+                    "A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
+                    "A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
+                    "A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
+                    "A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
+                    "A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
+                    "A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
+                    "A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
+                    "A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
+                    "A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
+                    "A2.xor" => "__builtin_HEXAGON_A2_xor",
+                    "A2.xorp" => "__builtin_HEXAGON_A2_xorp",
+                    "A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
+                    "A2.zxth" => "__builtin_HEXAGON_A2_zxth",
+                    "A4.andn" => "__builtin_HEXAGON_A4_andn",
+                    "A4.andnp" => "__builtin_HEXAGON_A4_andnp",
+                    "A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
+                    "A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
+                    "A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
+                    "A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
+                    "A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
+                    "A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
+                    "A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
+                    "A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
+                    "A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
+                    "A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
+                    "A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
+                    "A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
+                    "A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
+                    "A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
+                    "A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
+                    "A4.combineir" => "__builtin_HEXAGON_A4_combineir",
+                    "A4.combineri" => "__builtin_HEXAGON_A4_combineri",
+                    "A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
+                    "A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
+                    "A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
+                    "A4.orn" => "__builtin_HEXAGON_A4_orn",
+                    "A4.ornp" => "__builtin_HEXAGON_A4_ornp",
+                    "A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
+                    "A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
+                    "A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
+                    "A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
+                    "A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
+                    "A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
+                    "A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
+                    "A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
+                    "A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
+                    "A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
+                    "A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
+                    "A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
+                    "A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
+                    "A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
+                    "A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
+                    "A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
+                    "A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
+                    "A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
+                    "A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
+                    "A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
+                    "A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
+                    "A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
+                    "A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
+                    "A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
+                    "A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
+                    "A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
+                    "A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
+                    "A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
+                    "A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
+                    "A6.vcmpbeq.notany" => "__builtin_HEXAGON_A6_vcmpbeq_notany",
+                    "A7.clip" => "__builtin_HEXAGON_A7_clip",
+                    "A7.croundd.ri" => "__builtin_HEXAGON_A7_croundd_ri",
+                    "A7.croundd.rr" => "__builtin_HEXAGON_A7_croundd_rr",
+                    "A7.vclip" => "__builtin_HEXAGON_A7_vclip",
+                    "C2.all8" => "__builtin_HEXAGON_C2_all8",
+                    "C2.and" => "__builtin_HEXAGON_C2_and",
+                    "C2.andn" => "__builtin_HEXAGON_C2_andn",
+                    "C2.any8" => "__builtin_HEXAGON_C2_any8",
+                    "C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
+                    "C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
+                    "C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
+                    "C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
+                    "C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
+                    "C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
+                    "C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
+                    "C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
+                    "C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
+                    "C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
+                    "C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
+                    "C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
+                    "C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
+                    "C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
+                    "C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
+                    "C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
+                    "C2.mask" => "__builtin_HEXAGON_C2_mask",
+                    "C2.mux" => "__builtin_HEXAGON_C2_mux",
+                    "C2.muxii" => "__builtin_HEXAGON_C2_muxii",
+                    "C2.muxir" => "__builtin_HEXAGON_C2_muxir",
+                    "C2.muxri" => "__builtin_HEXAGON_C2_muxri",
+                    "C2.not" => "__builtin_HEXAGON_C2_not",
+                    "C2.or" => "__builtin_HEXAGON_C2_or",
+                    "C2.orn" => "__builtin_HEXAGON_C2_orn",
+                    "C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
+                    "C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
+                    "C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
+                    "C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
+                    "C2.vmux" => "__builtin_HEXAGON_C2_vmux",
+                    "C2.xor" => "__builtin_HEXAGON_C2_xor",
+                    "C4.and.and" => "__builtin_HEXAGON_C4_and_and",
+                    "C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
+                    "C4.and.or" => "__builtin_HEXAGON_C4_and_or",
+                    "C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
+                    "C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
+                    "C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
+                    "C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
+                    "C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
+                    "C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
+                    "C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
+                    "C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
+                    "C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
+                    "C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
+                    "C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
+                    "C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
+                    "C4.or.and" => "__builtin_HEXAGON_C4_or_and",
+                    "C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
+                    "C4.or.or" => "__builtin_HEXAGON_C4_or_or",
+                    "C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
+                    "F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
+                    "F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
+                    "F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
+                    "F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
+                    "F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
+                    "F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
+                    "F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
+                    "F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
+                    "F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
+                    "F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
+                    "F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
+                    "F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
+                    "F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
+                    "F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
+                    "F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
+                    "F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
+                    "F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
+                    "F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
+                    "F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
+                    "F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
+                    "F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
+                    "F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
+                    "F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
+                    "F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
+                    "F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
+                    "F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
+                    "F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
+                    "F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
+                    "F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
+                    "F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
+                    "F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
+                    "F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
+                    "F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd",
+                    "F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn",
+                    "F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr",
+                    "F2.dffma" => "__builtin_HEXAGON_F2_dffma",
+                    "F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib",
+                    "F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc",
+                    "F2.dffms" => "__builtin_HEXAGON_F2_dffms",
+                    "F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib",
+                    "F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
+                    "F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
+                    "F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
+                    "F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
+                    "F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy",
+                    "F2.dfmpyfix" => "__builtin_HEXAGON_F2_dfmpyfix",
+                    "F2.dfmpyhh" => "__builtin_HEXAGON_F2_dfmpyhh",
+                    "F2.dfmpylh" => "__builtin_HEXAGON_F2_dfmpylh",
+                    "F2.dfmpyll" => "__builtin_HEXAGON_F2_dfmpyll",
+                    "F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
+                    "F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
+                    "F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
+                    "F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
+                    "F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
+                    "F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
+                    "F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
+                    "F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
+                    "F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
+                    "F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
+                    "F2.sffma" => "__builtin_HEXAGON_F2_sffma",
+                    "F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
+                    "F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
+                    "F2.sffms" => "__builtin_HEXAGON_F2_sffms",
+                    "F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
+                    "F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
+                    "F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
+                    "F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
+                    "F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
+                    "F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
+                    "F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
+                    "L2.loadw.locked" => "__builtin_HEXAGON_L2_loadw_locked",
+                    "L4.loadd.locked" => "__builtin__HEXAGON_L4_loadd_locked",
+                    "M2.acci" => "__builtin_HEXAGON_M2_acci",
+                    "M2.accii" => "__builtin_HEXAGON_M2_accii",
+                    "M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
+                    "M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
+                    "M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
+                    "M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
+                    "M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
+                    "M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
+                    "M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
+                    "M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
+                    "M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
+                    "M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
+                    "M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
+                    "M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
+                    "M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
+                    "M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
+                    "M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
+                    "M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
+                    "M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
+                    "M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
+                    "M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
+                    "M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
+                    "M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
+                    "M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
+                    "M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
+                    "M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
+                    "M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
+                    "M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
+                    "M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
+                    "M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
+                    "M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
+                    "M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
+                    "M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
+                    "M2.maci" => "__builtin_HEXAGON_M2_maci",
+                    "M2.macsin" => "__builtin_HEXAGON_M2_macsin",
+                    "M2.macsip" => "__builtin_HEXAGON_M2_macsip",
+                    "M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
+                    "M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
+                    "M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
+                    "M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
+                    "M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
+                    "M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
+                    "M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
+                    "M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
+                    "M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
+                    "M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
+                    "M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
+                    "M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
+                    "M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
+                    "M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
+                    "M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
+                    "M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
+                    "M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",
+                    "M2.mmpyh.rs1" => "__builtin_HEXAGON_M2_mmpyh_rs1",
+                    "M2.mmpyh.s0" => "__builtin_HEXAGON_M2_mmpyh_s0",
+                    "M2.mmpyh.s1" => "__builtin_HEXAGON_M2_mmpyh_s1",
+                    "M2.mmpyl.rs0" => "__builtin_HEXAGON_M2_mmpyl_rs0",
+                    "M2.mmpyl.rs1" => "__builtin_HEXAGON_M2_mmpyl_rs1",
+                    "M2.mmpyl.s0" => "__builtin_HEXAGON_M2_mmpyl_s0",
+                    "M2.mmpyl.s1" => "__builtin_HEXAGON_M2_mmpyl_s1",
+                    "M2.mmpyuh.rs0" => "__builtin_HEXAGON_M2_mmpyuh_rs0",
+                    "M2.mmpyuh.rs1" => "__builtin_HEXAGON_M2_mmpyuh_rs1",
+                    "M2.mmpyuh.s0" => "__builtin_HEXAGON_M2_mmpyuh_s0",
+                    "M2.mmpyuh.s1" => "__builtin_HEXAGON_M2_mmpyuh_s1",
+                    "M2.mmpyul.rs0" => "__builtin_HEXAGON_M2_mmpyul_rs0",
+                    "M2.mmpyul.rs1" => "__builtin_HEXAGON_M2_mmpyul_rs1",
+                    "M2.mmpyul.s0" => "__builtin_HEXAGON_M2_mmpyul_s0",
+                    "M2.mmpyul.s1" => "__builtin_HEXAGON_M2_mmpyul_s1",
+                    "M2.mnaci" => "__builtin_HEXAGON_M2_mnaci",
+                    "M2.mpy.acc.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_hh_s0",
+                    "M2.mpy.acc.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_hh_s1",
+                    "M2.mpy.acc.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_hl_s0",
+                    "M2.mpy.acc.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_hl_s1",
+                    "M2.mpy.acc.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_lh_s0",
+                    "M2.mpy.acc.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_lh_s1",
+                    "M2.mpy.acc.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_ll_s0",
+                    "M2.mpy.acc.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_ll_s1",
+                    "M2.mpy.acc.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0",
+                    "M2.mpy.acc.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1",
+                    "M2.mpy.acc.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0",
+                    "M2.mpy.acc.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1",
+                    "M2.mpy.acc.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0",
+                    "M2.mpy.acc.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1",
+                    "M2.mpy.acc.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0",
+                    "M2.mpy.acc.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1",
+                    "M2.mpy.hh.s0" => "__builtin_HEXAGON_M2_mpy_hh_s0",
+                    "M2.mpy.hh.s1" => "__builtin_HEXAGON_M2_mpy_hh_s1",
+                    "M2.mpy.hl.s0" => "__builtin_HEXAGON_M2_mpy_hl_s0",
+                    "M2.mpy.hl.s1" => "__builtin_HEXAGON_M2_mpy_hl_s1",
+                    "M2.mpy.lh.s0" => "__builtin_HEXAGON_M2_mpy_lh_s0",
+                    "M2.mpy.lh.s1" => "__builtin_HEXAGON_M2_mpy_lh_s1",
+                    "M2.mpy.ll.s0" => "__builtin_HEXAGON_M2_mpy_ll_s0",
+                    "M2.mpy.ll.s1" => "__builtin_HEXAGON_M2_mpy_ll_s1",
+                    "M2.mpy.nac.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_hh_s0",
+                    "M2.mpy.nac.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_hh_s1",
+                    "M2.mpy.nac.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_hl_s0",
+                    "M2.mpy.nac.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_hl_s1",
+                    "M2.mpy.nac.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_lh_s0",
+                    "M2.mpy.nac.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_lh_s1",
+                    "M2.mpy.nac.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_ll_s0",
+                    "M2.mpy.nac.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_ll_s1",
+                    "M2.mpy.nac.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0",
+                    "M2.mpy.nac.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1",
+                    "M2.mpy.nac.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0",
+                    "M2.mpy.nac.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1",
+                    "M2.mpy.nac.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0",
+                    "M2.mpy.nac.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1",
+                    "M2.mpy.nac.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0",
+                    "M2.mpy.nac.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1",
+                    "M2.mpy.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s0",
+                    "M2.mpy.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hh_s1",
+                    "M2.mpy.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s0",
+                    "M2.mpy.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_rnd_hl_s1",
+                    "M2.mpy.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s0",
+                    "M2.mpy.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_rnd_lh_s1",
+                    "M2.mpy.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s0",
+                    "M2.mpy.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_rnd_ll_s1",
+                    "M2.mpy.sat.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_hh_s0",
+                    "M2.mpy.sat.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_hh_s1",
+                    "M2.mpy.sat.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_hl_s0",
+                    "M2.mpy.sat.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_hl_s1",
+                    "M2.mpy.sat.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_lh_s0",
+                    "M2.mpy.sat.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_lh_s1",
+                    "M2.mpy.sat.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_ll_s0",
+                    "M2.mpy.sat.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_ll_s1",
+                    "M2.mpy.sat.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0",
+                    "M2.mpy.sat.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1",
+                    "M2.mpy.sat.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0",
+                    "M2.mpy.sat.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1",
+                    "M2.mpy.sat.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0",
+                    "M2.mpy.sat.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1",
+                    "M2.mpy.sat.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0",
+                    "M2.mpy.sat.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1",
+                    "M2.mpy.up" => "__builtin_HEXAGON_M2_mpy_up",
+                    "M2.mpy.up.s1" => "__builtin_HEXAGON_M2_mpy_up_s1",
+                    "M2.mpy.up.s1.sat" => "__builtin_HEXAGON_M2_mpy_up_s1_sat",
+                    "M2.mpyd.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s0",
+                    "M2.mpyd.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hh_s1",
+                    "M2.mpyd.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s0",
+                    "M2.mpyd.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyd_acc_hl_s1",
+                    "M2.mpyd.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s0",
+                    "M2.mpyd.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyd_acc_lh_s1",
+                    "M2.mpyd.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s0",
+                    "M2.mpyd.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyd_acc_ll_s1",
+                    "M2.mpyd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_hh_s0",
+                    "M2.mpyd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_hh_s1",
+                    "M2.mpyd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_hl_s0",
+                    "M2.mpyd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_hl_s1",
+                    "M2.mpyd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_lh_s0",
+                    "M2.mpyd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_lh_s1",
+                    "M2.mpyd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_ll_s0",
+                    "M2.mpyd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_ll_s1",
+                    "M2.mpyd.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s0",
+                    "M2.mpyd.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hh_s1",
+                    "M2.mpyd.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s0",
+                    "M2.mpyd.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyd_nac_hl_s1",
+                    "M2.mpyd.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s0",
+                    "M2.mpyd.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyd_nac_lh_s1",
+                    "M2.mpyd.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s0",
+                    "M2.mpyd.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyd_nac_ll_s1",
+                    "M2.mpyd.rnd.hh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0",
+                    "M2.mpyd.rnd.hh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1",
+                    "M2.mpyd.rnd.hl.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0",
+                    "M2.mpyd.rnd.hl.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1",
+                    "M2.mpyd.rnd.lh.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0",
+                    "M2.mpyd.rnd.lh.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1",
+                    "M2.mpyd.rnd.ll.s0" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0",
+                    "M2.mpyd.rnd.ll.s1" => "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1",
+                    "M2.mpyi" => "__builtin_HEXAGON_M2_mpyi",
+                    "M2.mpysmi" => "__builtin_HEXAGON_M2_mpysmi",
+                    "M2.mpysu.up" => "__builtin_HEXAGON_M2_mpysu_up",
+                    "M2.mpyu.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s0",
+                    "M2.mpyu.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hh_s1",
+                    "M2.mpyu.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s0",
+                    "M2.mpyu.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyu_acc_hl_s1",
+                    "M2.mpyu.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s0",
+                    "M2.mpyu.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyu_acc_lh_s1",
+                    "M2.mpyu.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s0",
+                    "M2.mpyu.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyu_acc_ll_s1",
+                    "M2.mpyu.hh.s0" => "__builtin_HEXAGON_M2_mpyu_hh_s0",
+                    "M2.mpyu.hh.s1" => "__builtin_HEXAGON_M2_mpyu_hh_s1",
+                    "M2.mpyu.hl.s0" => "__builtin_HEXAGON_M2_mpyu_hl_s0",
+                    "M2.mpyu.hl.s1" => "__builtin_HEXAGON_M2_mpyu_hl_s1",
+                    "M2.mpyu.lh.s0" => "__builtin_HEXAGON_M2_mpyu_lh_s0",
+                    "M2.mpyu.lh.s1" => "__builtin_HEXAGON_M2_mpyu_lh_s1",
+                    "M2.mpyu.ll.s0" => "__builtin_HEXAGON_M2_mpyu_ll_s0",
+                    "M2.mpyu.ll.s1" => "__builtin_HEXAGON_M2_mpyu_ll_s1",
+                    "M2.mpyu.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s0",
+                    "M2.mpyu.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hh_s1",
+                    "M2.mpyu.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s0",
+                    "M2.mpyu.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyu_nac_hl_s1",
+                    "M2.mpyu.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s0",
+                    "M2.mpyu.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyu_nac_lh_s1",
+                    "M2.mpyu.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s0",
+                    "M2.mpyu.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyu_nac_ll_s1",
+                    "M2.mpyu.up" => "__builtin_HEXAGON_M2_mpyu_up",
+                    "M2.mpyud.acc.hh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s0",
+                    "M2.mpyud.acc.hh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hh_s1",
+                    "M2.mpyud.acc.hl.s0" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s0",
+                    "M2.mpyud.acc.hl.s1" => "__builtin_HEXAGON_M2_mpyud_acc_hl_s1",
+                    "M2.mpyud.acc.lh.s0" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s0",
+                    "M2.mpyud.acc.lh.s1" => "__builtin_HEXAGON_M2_mpyud_acc_lh_s1",
+                    "M2.mpyud.acc.ll.s0" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s0",
+                    "M2.mpyud.acc.ll.s1" => "__builtin_HEXAGON_M2_mpyud_acc_ll_s1",
+                    "M2.mpyud.hh.s0" => "__builtin_HEXAGON_M2_mpyud_hh_s0",
+                    "M2.mpyud.hh.s1" => "__builtin_HEXAGON_M2_mpyud_hh_s1",
+                    "M2.mpyud.hl.s0" => "__builtin_HEXAGON_M2_mpyud_hl_s0",
+                    "M2.mpyud.hl.s1" => "__builtin_HEXAGON_M2_mpyud_hl_s1",
+                    "M2.mpyud.lh.s0" => "__builtin_HEXAGON_M2_mpyud_lh_s0",
+                    "M2.mpyud.lh.s1" => "__builtin_HEXAGON_M2_mpyud_lh_s1",
+                    "M2.mpyud.ll.s0" => "__builtin_HEXAGON_M2_mpyud_ll_s0",
+                    "M2.mpyud.ll.s1" => "__builtin_HEXAGON_M2_mpyud_ll_s1",
+                    "M2.mpyud.nac.hh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s0",
+                    "M2.mpyud.nac.hh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hh_s1",
+                    "M2.mpyud.nac.hl.s0" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s0",
+                    "M2.mpyud.nac.hl.s1" => "__builtin_HEXAGON_M2_mpyud_nac_hl_s1",
+                    "M2.mpyud.nac.lh.s0" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s0",
+                    "M2.mpyud.nac.lh.s1" => "__builtin_HEXAGON_M2_mpyud_nac_lh_s1",
+                    "M2.mpyud.nac.ll.s0" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s0",
+                    "M2.mpyud.nac.ll.s1" => "__builtin_HEXAGON_M2_mpyud_nac_ll_s1",
+                    "M2.mpyui" => "__builtin_HEXAGON_M2_mpyui",
+                    "M2.nacci" => "__builtin_HEXAGON_M2_nacci",
+                    "M2.naccii" => "__builtin_HEXAGON_M2_naccii",
+                    "M2.subacc" => "__builtin_HEXAGON_M2_subacc",
+                    "M2.vabsdiffh" => "__builtin_HEXAGON_M2_vabsdiffh",
+                    "M2.vabsdiffw" => "__builtin_HEXAGON_M2_vabsdiffw",
+                    "M2.vcmac.s0.sat.i" => "__builtin_HEXAGON_M2_vcmac_s0_sat_i",
+                    "M2.vcmac.s0.sat.r" => "__builtin_HEXAGON_M2_vcmac_s0_sat_r",
+                    "M2.vcmpy.s0.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_i",
+                    "M2.vcmpy.s0.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s0_sat_r",
+                    "M2.vcmpy.s1.sat.i" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_i",
+                    "M2.vcmpy.s1.sat.r" => "__builtin_HEXAGON_M2_vcmpy_s1_sat_r",
+                    "M2.vdmacs.s0" => "__builtin_HEXAGON_M2_vdmacs_s0",
+                    "M2.vdmacs.s1" => "__builtin_HEXAGON_M2_vdmacs_s1",
+                    "M2.vdmpyrs.s0" => "__builtin_HEXAGON_M2_vdmpyrs_s0",
+                    "M2.vdmpyrs.s1" => "__builtin_HEXAGON_M2_vdmpyrs_s1",
+                    "M2.vdmpys.s0" => "__builtin_HEXAGON_M2_vdmpys_s0",
+                    "M2.vdmpys.s1" => "__builtin_HEXAGON_M2_vdmpys_s1",
+                    "M2.vmac2" => "__builtin_HEXAGON_M2_vmac2",
+                    "M2.vmac2es" => "__builtin_HEXAGON_M2_vmac2es",
+                    "M2.vmac2es.s0" => "__builtin_HEXAGON_M2_vmac2es_s0",
+                    "M2.vmac2es.s1" => "__builtin_HEXAGON_M2_vmac2es_s1",
+                    "M2.vmac2s.s0" => "__builtin_HEXAGON_M2_vmac2s_s0",
+                    "M2.vmac2s.s1" => "__builtin_HEXAGON_M2_vmac2s_s1",
+                    "M2.vmac2su.s0" => "__builtin_HEXAGON_M2_vmac2su_s0",
+                    "M2.vmac2su.s1" => "__builtin_HEXAGON_M2_vmac2su_s1",
+                    "M2.vmpy2es.s0" => "__builtin_HEXAGON_M2_vmpy2es_s0",
+                    "M2.vmpy2es.s1" => "__builtin_HEXAGON_M2_vmpy2es_s1",
+                    "M2.vmpy2s.s0" => "__builtin_HEXAGON_M2_vmpy2s_s0",
+                    "M2.vmpy2s.s0pack" => "__builtin_HEXAGON_M2_vmpy2s_s0pack",
+                    "M2.vmpy2s.s1" => "__builtin_HEXAGON_M2_vmpy2s_s1",
+                    "M2.vmpy2s.s1pack" => "__builtin_HEXAGON_M2_vmpy2s_s1pack",
+                    "M2.vmpy2su.s0" => "__builtin_HEXAGON_M2_vmpy2su_s0",
+                    "M2.vmpy2su.s1" => "__builtin_HEXAGON_M2_vmpy2su_s1",
+                    "M2.vraddh" => "__builtin_HEXAGON_M2_vraddh",
+                    "M2.vradduh" => "__builtin_HEXAGON_M2_vradduh",
+                    "M2.vrcmaci.s0" => "__builtin_HEXAGON_M2_vrcmaci_s0",
+                    "M2.vrcmaci.s0c" => "__builtin_HEXAGON_M2_vrcmaci_s0c",
+                    "M2.vrcmacr.s0" => "__builtin_HEXAGON_M2_vrcmacr_s0",
+                    "M2.vrcmacr.s0c" => "__builtin_HEXAGON_M2_vrcmacr_s0c",
+                    "M2.vrcmpyi.s0" => "__builtin_HEXAGON_M2_vrcmpyi_s0",
+                    "M2.vrcmpyi.s0c" => "__builtin_HEXAGON_M2_vrcmpyi_s0c",
+                    "M2.vrcmpyr.s0" => "__builtin_HEXAGON_M2_vrcmpyr_s0",
+                    "M2.vrcmpyr.s0c" => "__builtin_HEXAGON_M2_vrcmpyr_s0c",
+                    "M2.vrcmpys.acc.s1" => "__builtin_HEXAGON_M2_vrcmpys_acc_s1",
+                    "M2.vrcmpys.s1" => "__builtin_HEXAGON_M2_vrcmpys_s1",
+                    "M2.vrcmpys.s1rp" => "__builtin_HEXAGON_M2_vrcmpys_s1rp",
+                    "M2.vrmac.s0" => "__builtin_HEXAGON_M2_vrmac_s0",
+                    "M2.vrmpy.s0" => "__builtin_HEXAGON_M2_vrmpy_s0",
+                    "M2.xor.xacc" => "__builtin_HEXAGON_M2_xor_xacc",
+                    "M4.and.and" => "__builtin_HEXAGON_M4_and_and",
+                    "M4.and.andn" => "__builtin_HEXAGON_M4_and_andn",
+                    "M4.and.or" => "__builtin_HEXAGON_M4_and_or",
+                    "M4.and.xor" => "__builtin_HEXAGON_M4_and_xor",
+                    "M4.cmpyi.wh" => "__builtin_HEXAGON_M4_cmpyi_wh",
+                    "M4.cmpyi.whc" => "__builtin_HEXAGON_M4_cmpyi_whc",
+                    "M4.cmpyr.wh" => "__builtin_HEXAGON_M4_cmpyr_wh",
+                    "M4.cmpyr.whc" => "__builtin_HEXAGON_M4_cmpyr_whc",
+                    "M4.mac.up.s1.sat" => "__builtin_HEXAGON_M4_mac_up_s1_sat",
+                    "M4.mpyri.addi" => "__builtin_HEXAGON_M4_mpyri_addi",
+                    "M4.mpyri.addr" => "__builtin_HEXAGON_M4_mpyri_addr",
+                    "M4.mpyri.addr.u2" => "__builtin_HEXAGON_M4_mpyri_addr_u2",
+                    "M4.mpyrr.addi" => "__builtin_HEXAGON_M4_mpyrr_addi",
+                    "M4.mpyrr.addr" => "__builtin_HEXAGON_M4_mpyrr_addr",
+                    "M4.nac.up.s1.sat" => "__builtin_HEXAGON_M4_nac_up_s1_sat",
+                    "M4.or.and" => "__builtin_HEXAGON_M4_or_and",
+                    "M4.or.andn" => "__builtin_HEXAGON_M4_or_andn",
+                    "M4.or.or" => "__builtin_HEXAGON_M4_or_or",
+                    "M4.or.xor" => "__builtin_HEXAGON_M4_or_xor",
+                    "M4.pmpyw" => "__builtin_HEXAGON_M4_pmpyw",
+                    "M4.pmpyw.acc" => "__builtin_HEXAGON_M4_pmpyw_acc",
+                    "M4.vpmpyh" => "__builtin_HEXAGON_M4_vpmpyh",
+                    "M4.vpmpyh.acc" => "__builtin_HEXAGON_M4_vpmpyh_acc",
+                    "M4.vrmpyeh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s0",
+                    "M4.vrmpyeh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyeh_acc_s1",
+                    "M4.vrmpyeh.s0" => "__builtin_HEXAGON_M4_vrmpyeh_s0",
+                    "M4.vrmpyeh.s1" => "__builtin_HEXAGON_M4_vrmpyeh_s1",
+                    "M4.vrmpyoh.acc.s0" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s0",
+                    "M4.vrmpyoh.acc.s1" => "__builtin_HEXAGON_M4_vrmpyoh_acc_s1",
+                    "M4.vrmpyoh.s0" => "__builtin_HEXAGON_M4_vrmpyoh_s0",
+                    "M4.vrmpyoh.s1" => "__builtin_HEXAGON_M4_vrmpyoh_s1",
+                    "M4.xor.and" => "__builtin_HEXAGON_M4_xor_and",
+                    "M4.xor.andn" => "__builtin_HEXAGON_M4_xor_andn",
+                    "M4.xor.or" => "__builtin_HEXAGON_M4_xor_or",
+                    "M4.xor.xacc" => "__builtin_HEXAGON_M4_xor_xacc",
+                    "M5.vdmacbsu" => "__builtin_HEXAGON_M5_vdmacbsu",
+                    "M5.vdmpybsu" => "__builtin_HEXAGON_M5_vdmpybsu",
+                    "M5.vmacbsu" => "__builtin_HEXAGON_M5_vmacbsu",
+                    "M5.vmacbuu" => "__builtin_HEXAGON_M5_vmacbuu",
+                    "M5.vmpybsu" => "__builtin_HEXAGON_M5_vmpybsu",
+                    "M5.vmpybuu" => "__builtin_HEXAGON_M5_vmpybuu",
+                    "M5.vrmacbsu" => "__builtin_HEXAGON_M5_vrmacbsu",
+                    "M5.vrmacbuu" => "__builtin_HEXAGON_M5_vrmacbuu",
+                    "M5.vrmpybsu" => "__builtin_HEXAGON_M5_vrmpybsu",
+                    "M5.vrmpybuu" => "__builtin_HEXAGON_M5_vrmpybuu",
+                    "M6.vabsdiffb" => "__builtin_HEXAGON_M6_vabsdiffb",
+                    "M6.vabsdiffub" => "__builtin_HEXAGON_M6_vabsdiffub",
+                    "M7.dcmpyiw" => "__builtin_HEXAGON_M7_dcmpyiw",
+                    "M7.dcmpyiw.acc" => "__builtin_HEXAGON_M7_dcmpyiw_acc",
+                    "M7.dcmpyiwc" => "__builtin_HEXAGON_M7_dcmpyiwc",
+                    "M7.dcmpyiwc.acc" => "__builtin_HEXAGON_M7_dcmpyiwc_acc",
+                    "M7.dcmpyrw" => "__builtin_HEXAGON_M7_dcmpyrw",
+                    "M7.dcmpyrw.acc" => "__builtin_HEXAGON_M7_dcmpyrw_acc",
+                    "M7.dcmpyrwc" => "__builtin_HEXAGON_M7_dcmpyrwc",
+                    "M7.dcmpyrwc.acc" => "__builtin_HEXAGON_M7_dcmpyrwc_acc",
+                    "M7.vdmpy" => "__builtin_HEXAGON_M7_vdmpy",
+                    "M7.vdmpy.acc" => "__builtin_HEXAGON_M7_vdmpy_acc",
+                    "M7.wcmpyiw" => "__builtin_HEXAGON_M7_wcmpyiw",
+                    "M7.wcmpyiw.rnd" => "__builtin_HEXAGON_M7_wcmpyiw_rnd",
+                    "M7.wcmpyiwc" => "__builtin_HEXAGON_M7_wcmpyiwc",
+                    "M7.wcmpyiwc.rnd" => "__builtin_HEXAGON_M7_wcmpyiwc_rnd",
+                    "M7.wcmpyrw" => "__builtin_HEXAGON_M7_wcmpyrw",
+                    "M7.wcmpyrw.rnd" => "__builtin_HEXAGON_M7_wcmpyrw_rnd",
+                    "M7.wcmpyrwc" => "__builtin_HEXAGON_M7_wcmpyrwc",
+                    "M7.wcmpyrwc.rnd" => "__builtin_HEXAGON_M7_wcmpyrwc_rnd",
+                    "S2.addasl.rrri" => "__builtin_HEXAGON_S2_addasl_rrri",
+                    "S2.asl.i.p" => "__builtin_HEXAGON_S2_asl_i_p",
+                    "S2.asl.i.p.acc" => "__builtin_HEXAGON_S2_asl_i_p_acc",
+                    "S2.asl.i.p.and" => "__builtin_HEXAGON_S2_asl_i_p_and",
+                    "S2.asl.i.p.nac" => "__builtin_HEXAGON_S2_asl_i_p_nac",
+                    "S2.asl.i.p.or" => "__builtin_HEXAGON_S2_asl_i_p_or",
+                    "S2.asl.i.p.xacc" => "__builtin_HEXAGON_S2_asl_i_p_xacc",
+                    "S2.asl.i.r" => "__builtin_HEXAGON_S2_asl_i_r",
+                    "S2.asl.i.r.acc" => "__builtin_HEXAGON_S2_asl_i_r_acc",
+                    "S2.asl.i.r.and" => "__builtin_HEXAGON_S2_asl_i_r_and",
+                    "S2.asl.i.r.nac" => "__builtin_HEXAGON_S2_asl_i_r_nac",
+                    "S2.asl.i.r.or" => "__builtin_HEXAGON_S2_asl_i_r_or",
+                    "S2.asl.i.r.sat" => "__builtin_HEXAGON_S2_asl_i_r_sat",
+                    "S2.asl.i.r.xacc" => "__builtin_HEXAGON_S2_asl_i_r_xacc",
+                    "S2.asl.i.vh" => "__builtin_HEXAGON_S2_asl_i_vh",
+                    "S2.asl.i.vw" => "__builtin_HEXAGON_S2_asl_i_vw",
+                    "S2.asl.r.p" => "__builtin_HEXAGON_S2_asl_r_p",
+                    "S2.asl.r.p.acc" => "__builtin_HEXAGON_S2_asl_r_p_acc",
+                    "S2.asl.r.p.and" => "__builtin_HEXAGON_S2_asl_r_p_and",
+                    "S2.asl.r.p.nac" => "__builtin_HEXAGON_S2_asl_r_p_nac",
+                    "S2.asl.r.p.or" => "__builtin_HEXAGON_S2_asl_r_p_or",
+                    "S2.asl.r.p.xor" => "__builtin_HEXAGON_S2_asl_r_p_xor",
+                    "S2.asl.r.r" => "__builtin_HEXAGON_S2_asl_r_r",
+                    "S2.asl.r.r.acc" => "__builtin_HEXAGON_S2_asl_r_r_acc",
+                    "S2.asl.r.r.and" => "__builtin_HEXAGON_S2_asl_r_r_and",
+                    "S2.asl.r.r.nac" => "__builtin_HEXAGON_S2_asl_r_r_nac",
+                    "S2.asl.r.r.or" => "__builtin_HEXAGON_S2_asl_r_r_or",
+                    "S2.asl.r.r.sat" => "__builtin_HEXAGON_S2_asl_r_r_sat",
+                    "S2.asl.r.vh" => "__builtin_HEXAGON_S2_asl_r_vh",
+                    "S2.asl.r.vw" => "__builtin_HEXAGON_S2_asl_r_vw",
+                    "S2.asr.i.p" => "__builtin_HEXAGON_S2_asr_i_p",
+                    "S2.asr.i.p.acc" => "__builtin_HEXAGON_S2_asr_i_p_acc",
+                    "S2.asr.i.p.and" => "__builtin_HEXAGON_S2_asr_i_p_and",
+                    "S2.asr.i.p.nac" => "__builtin_HEXAGON_S2_asr_i_p_nac",
+                    "S2.asr.i.p.or" => "__builtin_HEXAGON_S2_asr_i_p_or",
+                    "S2.asr.i.p.rnd" => "__builtin_HEXAGON_S2_asr_i_p_rnd",
+                    "S2.asr.i.p.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax",
+                    "S2.asr.i.r" => "__builtin_HEXAGON_S2_asr_i_r",
+                    "S2.asr.i.r.acc" => "__builtin_HEXAGON_S2_asr_i_r_acc",
+                    "S2.asr.i.r.and" => "__builtin_HEXAGON_S2_asr_i_r_and",
+                    "S2.asr.i.r.nac" => "__builtin_HEXAGON_S2_asr_i_r_nac",
+                    "S2.asr.i.r.or" => "__builtin_HEXAGON_S2_asr_i_r_or",
+                    "S2.asr.i.r.rnd" => "__builtin_HEXAGON_S2_asr_i_r_rnd",
+                    "S2.asr.i.r.rnd.goodsyntax" => "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax",
+                    "S2.asr.i.svw.trun" => "__builtin_HEXAGON_S2_asr_i_svw_trun",
+                    "S2.asr.i.vh" => "__builtin_HEXAGON_S2_asr_i_vh",
+                    "S2.asr.i.vw" => "__builtin_HEXAGON_S2_asr_i_vw",
+                    "S2.asr.r.p" => "__builtin_HEXAGON_S2_asr_r_p",
+                    "S2.asr.r.p.acc" => "__builtin_HEXAGON_S2_asr_r_p_acc",
+                    "S2.asr.r.p.and" => "__builtin_HEXAGON_S2_asr_r_p_and",
+                    "S2.asr.r.p.nac" => "__builtin_HEXAGON_S2_asr_r_p_nac",
+                    "S2.asr.r.p.or" => "__builtin_HEXAGON_S2_asr_r_p_or",
+                    "S2.asr.r.p.xor" => "__builtin_HEXAGON_S2_asr_r_p_xor",
+                    "S2.asr.r.r" => "__builtin_HEXAGON_S2_asr_r_r",
+                    "S2.asr.r.r.acc" => "__builtin_HEXAGON_S2_asr_r_r_acc",
+                    "S2.asr.r.r.and" => "__builtin_HEXAGON_S2_asr_r_r_and",
+                    "S2.asr.r.r.nac" => "__builtin_HEXAGON_S2_asr_r_r_nac",
+                    "S2.asr.r.r.or" => "__builtin_HEXAGON_S2_asr_r_r_or",
+                    "S2.asr.r.r.sat" => "__builtin_HEXAGON_S2_asr_r_r_sat",
+                    "S2.asr.r.svw.trun" => "__builtin_HEXAGON_S2_asr_r_svw_trun",
+                    "S2.asr.r.vh" => "__builtin_HEXAGON_S2_asr_r_vh",
+                    "S2.asr.r.vw" => "__builtin_HEXAGON_S2_asr_r_vw",
+                    "S2.brev" => "__builtin_HEXAGON_S2_brev",
+                    "S2.brevp" => "__builtin_HEXAGON_S2_brevp",
+                    "S2.cabacencbin" => "__builtin_HEXAGON_S2_cabacencbin",
+                    "S2.cl0" => "__builtin_HEXAGON_S2_cl0",
+                    "S2.cl0p" => "__builtin_HEXAGON_S2_cl0p",
+                    "S2.cl1" => "__builtin_HEXAGON_S2_cl1",
+                    "S2.cl1p" => "__builtin_HEXAGON_S2_cl1p",
+                    "S2.clb" => "__builtin_HEXAGON_S2_clb",
+                    "S2.clbnorm" => "__builtin_HEXAGON_S2_clbnorm",
+                    "S2.clbp" => "__builtin_HEXAGON_S2_clbp",
+                    "S2.clrbit.i" => "__builtin_HEXAGON_S2_clrbit_i",
+                    "S2.clrbit.r" => "__builtin_HEXAGON_S2_clrbit_r",
+                    "S2.ct0" => "__builtin_HEXAGON_S2_ct0",
+                    "S2.ct0p" => "__builtin_HEXAGON_S2_ct0p",
+                    "S2.ct1" => "__builtin_HEXAGON_S2_ct1",
+                    "S2.ct1p" => "__builtin_HEXAGON_S2_ct1p",
+                    "S2.deinterleave" => "__builtin_HEXAGON_S2_deinterleave",
+                    "S2.extractu" => "__builtin_HEXAGON_S2_extractu",
+                    "S2.extractu.rp" => "__builtin_HEXAGON_S2_extractu_rp",
+                    "S2.extractup" => "__builtin_HEXAGON_S2_extractup",
+                    "S2.extractup.rp" => "__builtin_HEXAGON_S2_extractup_rp",
+                    "S2.insert" => "__builtin_HEXAGON_S2_insert",
+                    "S2.insert.rp" => "__builtin_HEXAGON_S2_insert_rp",
+                    "S2.insertp" => "__builtin_HEXAGON_S2_insertp",
+                    "S2.insertp.rp" => "__builtin_HEXAGON_S2_insertp_rp",
+                    "S2.interleave" => "__builtin_HEXAGON_S2_interleave",
+                    "S2.lfsp" => "__builtin_HEXAGON_S2_lfsp",
+                    "S2.lsl.r.p" => "__builtin_HEXAGON_S2_lsl_r_p",
+                    "S2.lsl.r.p.acc" => "__builtin_HEXAGON_S2_lsl_r_p_acc",
+                    "S2.lsl.r.p.and" => "__builtin_HEXAGON_S2_lsl_r_p_and",
+                    "S2.lsl.r.p.nac" => "__builtin_HEXAGON_S2_lsl_r_p_nac",
+                    "S2.lsl.r.p.or" => "__builtin_HEXAGON_S2_lsl_r_p_or",
+                    "S2.lsl.r.p.xor" => "__builtin_HEXAGON_S2_lsl_r_p_xor",
+                    "S2.lsl.r.r" => "__builtin_HEXAGON_S2_lsl_r_r",
+                    "S2.lsl.r.r.acc" => "__builtin_HEXAGON_S2_lsl_r_r_acc",
+                    "S2.lsl.r.r.and" => "__builtin_HEXAGON_S2_lsl_r_r_and",
+                    "S2.lsl.r.r.nac" => "__builtin_HEXAGON_S2_lsl_r_r_nac",
+                    "S2.lsl.r.r.or" => "__builtin_HEXAGON_S2_lsl_r_r_or",
+                    "S2.lsl.r.vh" => "__builtin_HEXAGON_S2_lsl_r_vh",
+                    "S2.lsl.r.vw" => "__builtin_HEXAGON_S2_lsl_r_vw",
+                    "S2.lsr.i.p" => "__builtin_HEXAGON_S2_lsr_i_p",
+                    "S2.lsr.i.p.acc" => "__builtin_HEXAGON_S2_lsr_i_p_acc",
+                    "S2.lsr.i.p.and" => "__builtin_HEXAGON_S2_lsr_i_p_and",
+                    "S2.lsr.i.p.nac" => "__builtin_HEXAGON_S2_lsr_i_p_nac",
+                    "S2.lsr.i.p.or" => "__builtin_HEXAGON_S2_lsr_i_p_or",
+                    "S2.lsr.i.p.xacc" => "__builtin_HEXAGON_S2_lsr_i_p_xacc",
+                    "S2.lsr.i.r" => "__builtin_HEXAGON_S2_lsr_i_r",
+                    "S2.lsr.i.r.acc" => "__builtin_HEXAGON_S2_lsr_i_r_acc",
+                    "S2.lsr.i.r.and" => "__builtin_HEXAGON_S2_lsr_i_r_and",
+                    "S2.lsr.i.r.nac" => "__builtin_HEXAGON_S2_lsr_i_r_nac",
+                    "S2.lsr.i.r.or" => "__builtin_HEXAGON_S2_lsr_i_r_or",
+                    "S2.lsr.i.r.xacc" => "__builtin_HEXAGON_S2_lsr_i_r_xacc",
+                    "S2.lsr.i.vh" => "__builtin_HEXAGON_S2_lsr_i_vh",
+                    "S2.lsr.i.vw" => "__builtin_HEXAGON_S2_lsr_i_vw",
+                    "S2.lsr.r.p" => "__builtin_HEXAGON_S2_lsr_r_p",
+                    "S2.lsr.r.p.acc" => "__builtin_HEXAGON_S2_lsr_r_p_acc",
+                    "S2.lsr.r.p.and" => "__builtin_HEXAGON_S2_lsr_r_p_and",
+                    "S2.lsr.r.p.nac" => "__builtin_HEXAGON_S2_lsr_r_p_nac",
+                    "S2.lsr.r.p.or" => "__builtin_HEXAGON_S2_lsr_r_p_or",
+                    "S2.lsr.r.p.xor" => "__builtin_HEXAGON_S2_lsr_r_p_xor",
+                    "S2.lsr.r.r" => "__builtin_HEXAGON_S2_lsr_r_r",
+                    "S2.lsr.r.r.acc" => "__builtin_HEXAGON_S2_lsr_r_r_acc",
+                    "S2.lsr.r.r.and" => "__builtin_HEXAGON_S2_lsr_r_r_and",
+                    "S2.lsr.r.r.nac" => "__builtin_HEXAGON_S2_lsr_r_r_nac",
+                    "S2.lsr.r.r.or" => "__builtin_HEXAGON_S2_lsr_r_r_or",
+                    "S2.lsr.r.vh" => "__builtin_HEXAGON_S2_lsr_r_vh",
+                    "S2.lsr.r.vw" => "__builtin_HEXAGON_S2_lsr_r_vw",
+                    "S2.mask" => "__builtin_HEXAGON_S2_mask",
+                    "S2.packhl" => "__builtin_HEXAGON_S2_packhl",
+                    "S2.parityp" => "__builtin_HEXAGON_S2_parityp",
+                    "S2.setbit.i" => "__builtin_HEXAGON_S2_setbit_i",
+                    "S2.setbit.r" => "__builtin_HEXAGON_S2_setbit_r",
+                    "S2.shuffeb" => "__builtin_HEXAGON_S2_shuffeb",
+                    "S2.shuffeh" => "__builtin_HEXAGON_S2_shuffeh",
+                    "S2.shuffob" => "__builtin_HEXAGON_S2_shuffob",
+                    "S2.shuffoh" => "__builtin_HEXAGON_S2_shuffoh",
+                    "S2.storerb.pbr" => "__builtin_brev_stb",
+                    "S2.storerd.pbr" => "__builtin_brev_std",
+                    "S2.storerf.pbr" => "__builtin_brev_sthhi",
+                    "S2.storerh.pbr" => "__builtin_brev_sth",
+                    "S2.storeri.pbr" => "__builtin_brev_stw",
+                    "S2.storew.locked" => "__builtin_HEXAGON_S2_storew_locked",
+                    "S2.svsathb" => "__builtin_HEXAGON_S2_svsathb",
+                    "S2.svsathub" => "__builtin_HEXAGON_S2_svsathub",
+                    "S2.tableidxb.goodsyntax" => "__builtin_HEXAGON_S2_tableidxb_goodsyntax",
+                    "S2.tableidxd.goodsyntax" => "__builtin_HEXAGON_S2_tableidxd_goodsyntax",
+                    "S2.tableidxh.goodsyntax" => "__builtin_HEXAGON_S2_tableidxh_goodsyntax",
+                    "S2.tableidxw.goodsyntax" => "__builtin_HEXAGON_S2_tableidxw_goodsyntax",
+                    "S2.togglebit.i" => "__builtin_HEXAGON_S2_togglebit_i",
+                    "S2.togglebit.r" => "__builtin_HEXAGON_S2_togglebit_r",
+                    "S2.tstbit.i" => "__builtin_HEXAGON_S2_tstbit_i",
+                    "S2.tstbit.r" => "__builtin_HEXAGON_S2_tstbit_r",
+                    "S2.valignib" => "__builtin_HEXAGON_S2_valignib",
+                    "S2.valignrb" => "__builtin_HEXAGON_S2_valignrb",
+                    "S2.vcnegh" => "__builtin_HEXAGON_S2_vcnegh",
+                    "S2.vcrotate" => "__builtin_HEXAGON_S2_vcrotate",
+                    "S2.vrcnegh" => "__builtin_HEXAGON_S2_vrcnegh",
+                    "S2.vrndpackwh" => "__builtin_HEXAGON_S2_vrndpackwh",
+                    "S2.vrndpackwhs" => "__builtin_HEXAGON_S2_vrndpackwhs",
+                    "S2.vsathb" => "__builtin_HEXAGON_S2_vsathb",
+                    "S2.vsathb.nopack" => "__builtin_HEXAGON_S2_vsathb_nopack",
+                    "S2.vsathub" => "__builtin_HEXAGON_S2_vsathub",
+                    "S2.vsathub.nopack" => "__builtin_HEXAGON_S2_vsathub_nopack",
+                    "S2.vsatwh" => "__builtin_HEXAGON_S2_vsatwh",
+                    "S2.vsatwh.nopack" => "__builtin_HEXAGON_S2_vsatwh_nopack",
+                    "S2.vsatwuh" => "__builtin_HEXAGON_S2_vsatwuh",
+                    "S2.vsatwuh.nopack" => "__builtin_HEXAGON_S2_vsatwuh_nopack",
+                    "S2.vsplatrb" => "__builtin_HEXAGON_S2_vsplatrb",
+                    "S2.vsplatrh" => "__builtin_HEXAGON_S2_vsplatrh",
+                    "S2.vspliceib" => "__builtin_HEXAGON_S2_vspliceib",
+                    "S2.vsplicerb" => "__builtin_HEXAGON_S2_vsplicerb",
+                    "S2.vsxtbh" => "__builtin_HEXAGON_S2_vsxtbh",
+                    "S2.vsxthw" => "__builtin_HEXAGON_S2_vsxthw",
+                    "S2.vtrunehb" => "__builtin_HEXAGON_S2_vtrunehb",
+                    "S2.vtrunewh" => "__builtin_HEXAGON_S2_vtrunewh",
+                    "S2.vtrunohb" => "__builtin_HEXAGON_S2_vtrunohb",
+                    "S2.vtrunowh" => "__builtin_HEXAGON_S2_vtrunowh",
+                    "S2.vzxtbh" => "__builtin_HEXAGON_S2_vzxtbh",
+                    "S2.vzxthw" => "__builtin_HEXAGON_S2_vzxthw",
+                    "S4.addaddi" => "__builtin_HEXAGON_S4_addaddi",
+                    "S4.addi.asl.ri" => "__builtin_HEXAGON_S4_addi_asl_ri",
+                    "S4.addi.lsr.ri" => "__builtin_HEXAGON_S4_addi_lsr_ri",
+                    "S4.andi.asl.ri" => "__builtin_HEXAGON_S4_andi_asl_ri",
+                    "S4.andi.lsr.ri" => "__builtin_HEXAGON_S4_andi_lsr_ri",
+                    "S4.clbaddi" => "__builtin_HEXAGON_S4_clbaddi",
+                    "S4.clbpaddi" => "__builtin_HEXAGON_S4_clbpaddi",
+                    "S4.clbpnorm" => "__builtin_HEXAGON_S4_clbpnorm",
+                    "S4.extract" => "__builtin_HEXAGON_S4_extract",
+                    "S4.extract.rp" => "__builtin_HEXAGON_S4_extract_rp",
+                    "S4.extractp" => "__builtin_HEXAGON_S4_extractp",
+                    "S4.extractp.rp" => "__builtin_HEXAGON_S4_extractp_rp",
+                    "S4.lsli" => "__builtin_HEXAGON_S4_lsli",
+                    "S4.ntstbit.i" => "__builtin_HEXAGON_S4_ntstbit_i",
+                    "S4.ntstbit.r" => "__builtin_HEXAGON_S4_ntstbit_r",
+                    "S4.or.andi" => "__builtin_HEXAGON_S4_or_andi",
+                    "S4.or.andix" => "__builtin_HEXAGON_S4_or_andix",
+                    "S4.or.ori" => "__builtin_HEXAGON_S4_or_ori",
+                    "S4.ori.asl.ri" => "__builtin_HEXAGON_S4_ori_asl_ri",
+                    "S4.ori.lsr.ri" => "__builtin_HEXAGON_S4_ori_lsr_ri",
+                    "S4.parity" => "__builtin_HEXAGON_S4_parity",
+                    "S4.stored.locked" => "__builtin_HEXAGON_S4_stored_locked",
+                    "S4.subaddi" => "__builtin_HEXAGON_S4_subaddi",
+                    "S4.subi.asl.ri" => "__builtin_HEXAGON_S4_subi_asl_ri",
+                    "S4.subi.lsr.ri" => "__builtin_HEXAGON_S4_subi_lsr_ri",
+                    "S4.vrcrotate" => "__builtin_HEXAGON_S4_vrcrotate",
+                    "S4.vrcrotate.acc" => "__builtin_HEXAGON_S4_vrcrotate_acc",
+                    "S4.vxaddsubh" => "__builtin_HEXAGON_S4_vxaddsubh",
+                    "S4.vxaddsubhr" => "__builtin_HEXAGON_S4_vxaddsubhr",
+                    "S4.vxaddsubw" => "__builtin_HEXAGON_S4_vxaddsubw",
+                    "S4.vxsubaddh" => "__builtin_HEXAGON_S4_vxsubaddh",
+                    "S4.vxsubaddhr" => "__builtin_HEXAGON_S4_vxsubaddhr",
+                    "S4.vxsubaddw" => "__builtin_HEXAGON_S4_vxsubaddw",
+                    "S5.asrhub.rnd.sat.goodsyntax" => {
+                        "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax"
+                    }
+                    "S5.asrhub.sat" => "__builtin_HEXAGON_S5_asrhub_sat",
+                    "S5.popcountp" => "__builtin_HEXAGON_S5_popcountp",
+                    "S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
+                    "S6.rol.i.p" => "__builtin_HEXAGON_S6_rol_i_p",
+                    "S6.rol.i.p.acc" => "__builtin_HEXAGON_S6_rol_i_p_acc",
+                    "S6.rol.i.p.and" => "__builtin_HEXAGON_S6_rol_i_p_and",
+                    "S6.rol.i.p.nac" => "__builtin_HEXAGON_S6_rol_i_p_nac",
+                    "S6.rol.i.p.or" => "__builtin_HEXAGON_S6_rol_i_p_or",
+                    "S6.rol.i.p.xacc" => "__builtin_HEXAGON_S6_rol_i_p_xacc",
+                    "S6.rol.i.r" => "__builtin_HEXAGON_S6_rol_i_r",
+                    "S6.rol.i.r.acc" => "__builtin_HEXAGON_S6_rol_i_r_acc",
+                    "S6.rol.i.r.and" => "__builtin_HEXAGON_S6_rol_i_r_and",
+                    "S6.rol.i.r.nac" => "__builtin_HEXAGON_S6_rol_i_r_nac",
+                    "S6.rol.i.r.or" => "__builtin_HEXAGON_S6_rol_i_r_or",
+                    "S6.rol.i.r.xacc" => "__builtin_HEXAGON_S6_rol_i_r_xacc",
+                    "S6.vsplatrbp" => "__builtin_HEXAGON_S6_vsplatrbp",
+                    "S6.vtrunehb.ppp" => "__builtin_HEXAGON_S6_vtrunehb_ppp",
+                    "S6.vtrunohb.ppp" => "__builtin_HEXAGON_S6_vtrunohb_ppp",
+                    "SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
+                    "V6.extractw" => "__builtin_HEXAGON_V6_extractw",
+                    "V6.extractw.128B" => "__builtin_HEXAGON_V6_extractw_128B",
+                    "V6.get.qfext" => "__builtin_HEXAGON_V6_get_qfext",
+                    "V6.get.qfext.128B" => "__builtin_HEXAGON_V6_get_qfext_128B",
+                    "V6.get.qfext.oracc" => "__builtin_HEXAGON_V6_get_qfext_oracc",
+                    "V6.get.qfext.oracc.128B" => "__builtin_HEXAGON_V6_get_qfext_oracc_128B",
+                    "V6.hi" => "__builtin_HEXAGON_V6_hi",
+                    "V6.hi.128B" => "__builtin_HEXAGON_V6_hi_128B",
+                    "V6.lo" => "__builtin_HEXAGON_V6_lo",
+                    "V6.lo.128B" => "__builtin_HEXAGON_V6_lo_128B",
+                    "V6.lvsplatb" => "__builtin_HEXAGON_V6_lvsplatb",
+                    "V6.lvsplatb.128B" => "__builtin_HEXAGON_V6_lvsplatb_128B",
+                    "V6.lvsplath" => "__builtin_HEXAGON_V6_lvsplath",
+                    "V6.lvsplath.128B" => "__builtin_HEXAGON_V6_lvsplath_128B",
+                    "V6.lvsplatw" => "__builtin_HEXAGON_V6_lvsplatw",
+                    "V6.lvsplatw.128B" => "__builtin_HEXAGON_V6_lvsplatw_128B",
+                    "V6.pred.and" => "__builtin_HEXAGON_V6_pred_and",
+                    "V6.pred.and.128B" => "__builtin_HEXAGON_V6_pred_and_128B",
+                    "V6.pred.and.n" => "__builtin_HEXAGON_V6_pred_and_n",
+                    "V6.pred.and.n.128B" => "__builtin_HEXAGON_V6_pred_and_n_128B",
+                    "V6.pred.not" => "__builtin_HEXAGON_V6_pred_not",
+                    "V6.pred.not.128B" => "__builtin_HEXAGON_V6_pred_not_128B",
+                    "V6.pred.or" => "__builtin_HEXAGON_V6_pred_or",
+                    "V6.pred.or.128B" => "__builtin_HEXAGON_V6_pred_or_128B",
+                    "V6.pred.or.n" => "__builtin_HEXAGON_V6_pred_or_n",
+                    "V6.pred.or.n.128B" => "__builtin_HEXAGON_V6_pred_or_n_128B",
+                    "V6.pred.scalar2" => "__builtin_HEXAGON_V6_pred_scalar2",
+                    "V6.pred.scalar2.128B" => "__builtin_HEXAGON_V6_pred_scalar2_128B",
+                    "V6.pred.scalar2v2" => "__builtin_HEXAGON_V6_pred_scalar2v2",
+                    "V6.pred.scalar2v2.128B" => "__builtin_HEXAGON_V6_pred_scalar2v2_128B",
+                    "V6.pred.xor" => "__builtin_HEXAGON_V6_pred_xor",
+                    "V6.pred.xor.128B" => "__builtin_HEXAGON_V6_pred_xor_128B",
+                    "V6.set.qfext" => "__builtin_HEXAGON_V6_set_qfext",
+                    "V6.set.qfext.128B" => "__builtin_HEXAGON_V6_set_qfext_128B",
+                    "V6.shuffeqh" => "__builtin_HEXAGON_V6_shuffeqh",
+                    "V6.shuffeqh.128B" => "__builtin_HEXAGON_V6_shuffeqh_128B",
+                    "V6.shuffeqw" => "__builtin_HEXAGON_V6_shuffeqw",
+                    "V6.shuffeqw.128B" => "__builtin_HEXAGON_V6_shuffeqw_128B",
+                    "V6.v6mpyhubs10" => "__builtin_HEXAGON_V6_v6mpyhubs10",
+                    "V6.v6mpyhubs10.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_128B",
+                    "V6.v6mpyhubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx",
+                    "V6.v6mpyhubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyhubs10_vxx_128B",
+                    "V6.v6mpyvubs10" => "__builtin_HEXAGON_V6_v6mpyvubs10",
+                    "V6.v6mpyvubs10.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_128B",
+                    "V6.v6mpyvubs10.vxx" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx",
+                    "V6.v6mpyvubs10.vxx.128B" => "__builtin_HEXAGON_V6_v6mpyvubs10_vxx_128B",
+                    "V6.vS32b.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai",
+                    "V6.vS32b.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nqpred_ai_128B",
+                    "V6.vS32b.nt.nqpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai",
+                    "V6.vS32b.nt.nqpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai_128B",
+                    "V6.vS32b.nt.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai",
+                    "V6.vS32b.nt.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_nt_qpred_ai_128B",
+                    "V6.vS32b.qpred.ai" => "__builtin_HEXAGON_V6_vS32b_qpred_ai",
+                    "V6.vS32b.qpred.ai.128B" => "__builtin_HEXAGON_V6_vS32b_qpred_ai_128B",
+                    "V6.vabs.f8" => "__builtin_HEXAGON_V6_vabs_f8",
+                    "V6.vabs.f8.128B" => "__builtin_HEXAGON_V6_vabs_f8_128B",
+                    "V6.vabs.hf" => "__builtin_HEXAGON_V6_vabs_hf",
+                    "V6.vabs.hf.128B" => "__builtin_HEXAGON_V6_vabs_hf_128B",
+                    "V6.vabs.sf" => "__builtin_HEXAGON_V6_vabs_sf",
+                    "V6.vabs.sf.128B" => "__builtin_HEXAGON_V6_vabs_sf_128B",
+                    "V6.vabsb" => "__builtin_HEXAGON_V6_vabsb",
+                    "V6.vabsb.128B" => "__builtin_HEXAGON_V6_vabsb_128B",
+                    "V6.vabsb.sat" => "__builtin_HEXAGON_V6_vabsb_sat",
+                    "V6.vabsb.sat.128B" => "__builtin_HEXAGON_V6_vabsb_sat_128B",
+                    "V6.vabsdiffh" => "__builtin_HEXAGON_V6_vabsdiffh",
+                    "V6.vabsdiffh.128B" => "__builtin_HEXAGON_V6_vabsdiffh_128B",
+                    "V6.vabsdiffub" => "__builtin_HEXAGON_V6_vabsdiffub",
+                    "V6.vabsdiffub.128B" => "__builtin_HEXAGON_V6_vabsdiffub_128B",
+                    "V6.vabsdiffuh" => "__builtin_HEXAGON_V6_vabsdiffuh",
+                    "V6.vabsdiffuh.128B" => "__builtin_HEXAGON_V6_vabsdiffuh_128B",
+                    "V6.vabsdiffw" => "__builtin_HEXAGON_V6_vabsdiffw",
+                    "V6.vabsdiffw.128B" => "__builtin_HEXAGON_V6_vabsdiffw_128B",
+                    "V6.vabsh" => "__builtin_HEXAGON_V6_vabsh",
+                    "V6.vabsh.128B" => "__builtin_HEXAGON_V6_vabsh_128B",
+                    "V6.vabsh.sat" => "__builtin_HEXAGON_V6_vabsh_sat",
+                    "V6.vabsh.sat.128B" => "__builtin_HEXAGON_V6_vabsh_sat_128B",
+                    "V6.vabsw" => "__builtin_HEXAGON_V6_vabsw",
+                    "V6.vabsw.128B" => "__builtin_HEXAGON_V6_vabsw_128B",
+                    "V6.vabsw.sat" => "__builtin_HEXAGON_V6_vabsw_sat",
+                    "V6.vabsw.sat.128B" => "__builtin_HEXAGON_V6_vabsw_sat_128B",
+                    "V6.vadd.hf" => "__builtin_HEXAGON_V6_vadd_hf",
+                    "V6.vadd.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_128B",
+                    "V6.vadd.hf.f8" => "__builtin_HEXAGON_V6_vadd_hf_f8",
+                    "V6.vadd.hf.f8.128B" => "__builtin_HEXAGON_V6_vadd_hf_f8_128B",
+                    "V6.vadd.hf.hf" => "__builtin_HEXAGON_V6_vadd_hf_hf",
+                    "V6.vadd.hf.hf.128B" => "__builtin_HEXAGON_V6_vadd_hf_hf_128B",
+                    "V6.vadd.qf16" => "__builtin_HEXAGON_V6_vadd_qf16",
+                    "V6.vadd.qf16.128B" => "__builtin_HEXAGON_V6_vadd_qf16_128B",
+                    "V6.vadd.qf16.mix" => "__builtin_HEXAGON_V6_vadd_qf16_mix",
+                    "V6.vadd.qf16.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf16_mix_128B",
+                    "V6.vadd.qf32" => "__builtin_HEXAGON_V6_vadd_qf32",
+                    "V6.vadd.qf32.128B" => "__builtin_HEXAGON_V6_vadd_qf32_128B",
+                    "V6.vadd.qf32.mix" => "__builtin_HEXAGON_V6_vadd_qf32_mix",
+                    "V6.vadd.qf32.mix.128B" => "__builtin_HEXAGON_V6_vadd_qf32_mix_128B",
+                    "V6.vadd.sf" => "__builtin_HEXAGON_V6_vadd_sf",
+                    "V6.vadd.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_128B",
+                    "V6.vadd.sf.bf" => "__builtin_HEXAGON_V6_vadd_sf_bf",
+                    "V6.vadd.sf.bf.128B" => "__builtin_HEXAGON_V6_vadd_sf_bf_128B",
+                    "V6.vadd.sf.hf" => "__builtin_HEXAGON_V6_vadd_sf_hf",
+                    "V6.vadd.sf.hf.128B" => "__builtin_HEXAGON_V6_vadd_sf_hf_128B",
+                    "V6.vadd.sf.sf" => "__builtin_HEXAGON_V6_vadd_sf_sf",
+                    "V6.vadd.sf.sf.128B" => "__builtin_HEXAGON_V6_vadd_sf_sf_128B",
+                    "V6.vaddb" => "__builtin_HEXAGON_V6_vaddb",
+                    "V6.vaddb.128B" => "__builtin_HEXAGON_V6_vaddb_128B",
+                    "V6.vaddb.dv" => "__builtin_HEXAGON_V6_vaddb_dv",
+                    "V6.vaddb.dv.128B" => "__builtin_HEXAGON_V6_vaddb_dv_128B",
+                    "V6.vaddbnq" => "__builtin_HEXAGON_V6_vaddbnq",
+                    "V6.vaddbnq.128B" => "__builtin_HEXAGON_V6_vaddbnq_128B",
+                    "V6.vaddbq" => "__builtin_HEXAGON_V6_vaddbq",
+                    "V6.vaddbq.128B" => "__builtin_HEXAGON_V6_vaddbq_128B",
+                    "V6.vaddbsat" => "__builtin_HEXAGON_V6_vaddbsat",
+                    "V6.vaddbsat.128B" => "__builtin_HEXAGON_V6_vaddbsat_128B",
+                    "V6.vaddbsat.dv" => "__builtin_HEXAGON_V6_vaddbsat_dv",
+                    "V6.vaddbsat.dv.128B" => "__builtin_HEXAGON_V6_vaddbsat_dv_128B",
+                    "V6.vaddcarrysat" => "__builtin_HEXAGON_V6_vaddcarrysat",
+                    "V6.vaddcarrysat.128B" => "__builtin_HEXAGON_V6_vaddcarrysat_128B",
+                    "V6.vaddclbh" => "__builtin_HEXAGON_V6_vaddclbh",
+                    "V6.vaddclbh.128B" => "__builtin_HEXAGON_V6_vaddclbh_128B",
+                    "V6.vaddclbw" => "__builtin_HEXAGON_V6_vaddclbw",
+                    "V6.vaddclbw.128B" => "__builtin_HEXAGON_V6_vaddclbw_128B",
+                    "V6.vaddh" => "__builtin_HEXAGON_V6_vaddh",
+                    "V6.vaddh.128B" => "__builtin_HEXAGON_V6_vaddh_128B",
+                    "V6.vaddh.dv" => "__builtin_HEXAGON_V6_vaddh_dv",
+                    "V6.vaddh.dv.128B" => "__builtin_HEXAGON_V6_vaddh_dv_128B",
+                    "V6.vaddhnq" => "__builtin_HEXAGON_V6_vaddhnq",
+                    "V6.vaddhnq.128B" => "__builtin_HEXAGON_V6_vaddhnq_128B",
+                    "V6.vaddhq" => "__builtin_HEXAGON_V6_vaddhq",
+                    "V6.vaddhq.128B" => "__builtin_HEXAGON_V6_vaddhq_128B",
+                    "V6.vaddhsat" => "__builtin_HEXAGON_V6_vaddhsat",
+                    "V6.vaddhsat.128B" => "__builtin_HEXAGON_V6_vaddhsat_128B",
+                    "V6.vaddhsat.dv" => "__builtin_HEXAGON_V6_vaddhsat_dv",
+                    "V6.vaddhsat.dv.128B" => "__builtin_HEXAGON_V6_vaddhsat_dv_128B",
+                    "V6.vaddhw" => "__builtin_HEXAGON_V6_vaddhw",
+                    "V6.vaddhw.128B" => "__builtin_HEXAGON_V6_vaddhw_128B",
+                    "V6.vaddhw.acc" => "__builtin_HEXAGON_V6_vaddhw_acc",
+                    "V6.vaddhw.acc.128B" => "__builtin_HEXAGON_V6_vaddhw_acc_128B",
+                    "V6.vaddubh" => "__builtin_HEXAGON_V6_vaddubh",
+                    "V6.vaddubh.128B" => "__builtin_HEXAGON_V6_vaddubh_128B",
+                    "V6.vaddubh.acc" => "__builtin_HEXAGON_V6_vaddubh_acc",
+                    "V6.vaddubh.acc.128B" => "__builtin_HEXAGON_V6_vaddubh_acc_128B",
+                    "V6.vaddubsat" => "__builtin_HEXAGON_V6_vaddubsat",
+                    "V6.vaddubsat.128B" => "__builtin_HEXAGON_V6_vaddubsat_128B",
+                    "V6.vaddubsat.dv" => "__builtin_HEXAGON_V6_vaddubsat_dv",
+                    "V6.vaddubsat.dv.128B" => "__builtin_HEXAGON_V6_vaddubsat_dv_128B",
+                    "V6.vaddububb.sat" => "__builtin_HEXAGON_V6_vaddububb_sat",
+                    "V6.vaddububb.sat.128B" => "__builtin_HEXAGON_V6_vaddububb_sat_128B",
+                    "V6.vadduhsat" => "__builtin_HEXAGON_V6_vadduhsat",
+                    "V6.vadduhsat.128B" => "__builtin_HEXAGON_V6_vadduhsat_128B",
+                    "V6.vadduhsat.dv" => "__builtin_HEXAGON_V6_vadduhsat_dv",
+                    "V6.vadduhsat.dv.128B" => "__builtin_HEXAGON_V6_vadduhsat_dv_128B",
+                    "V6.vadduhw" => "__builtin_HEXAGON_V6_vadduhw",
+                    "V6.vadduhw.128B" => "__builtin_HEXAGON_V6_vadduhw_128B",
+                    "V6.vadduhw.acc" => "__builtin_HEXAGON_V6_vadduhw_acc",
+                    "V6.vadduhw.acc.128B" => "__builtin_HEXAGON_V6_vadduhw_acc_128B",
+                    "V6.vadduwsat" => "__builtin_HEXAGON_V6_vadduwsat",
+                    "V6.vadduwsat.128B" => "__builtin_HEXAGON_V6_vadduwsat_128B",
+                    "V6.vadduwsat.dv" => "__builtin_HEXAGON_V6_vadduwsat_dv",
+                    "V6.vadduwsat.dv.128B" => "__builtin_HEXAGON_V6_vadduwsat_dv_128B",
+                    "V6.vaddw" => "__builtin_HEXAGON_V6_vaddw",
+                    "V6.vaddw.128B" => "__builtin_HEXAGON_V6_vaddw_128B",
+                    "V6.vaddw.dv" => "__builtin_HEXAGON_V6_vaddw_dv",
+                    "V6.vaddw.dv.128B" => "__builtin_HEXAGON_V6_vaddw_dv_128B",
+                    "V6.vaddwnq" => "__builtin_HEXAGON_V6_vaddwnq",
+                    "V6.vaddwnq.128B" => "__builtin_HEXAGON_V6_vaddwnq_128B",
+                    "V6.vaddwq" => "__builtin_HEXAGON_V6_vaddwq",
+                    "V6.vaddwq.128B" => "__builtin_HEXAGON_V6_vaddwq_128B",
+                    "V6.vaddwsat" => "__builtin_HEXAGON_V6_vaddwsat",
+                    "V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
+                    "V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
+                    "V6.vaddwsat.dv.128B" => "__builtin_HEXAGON_V6_vaddwsat_dv_128B",
+                    "V6.valignb" => "__builtin_HEXAGON_V6_valignb",
+                    "V6.valignb.128B" => "__builtin_HEXAGON_V6_valignb_128B",
+                    "V6.valignbi" => "__builtin_HEXAGON_V6_valignbi",
+                    "V6.valignbi.128B" => "__builtin_HEXAGON_V6_valignbi_128B",
+                    "V6.vand" => "__builtin_HEXAGON_V6_vand",
+                    "V6.vand.128B" => "__builtin_HEXAGON_V6_vand_128B",
+                    "V6.vandnqrt" => "__builtin_HEXAGON_V6_vandnqrt",
+                    "V6.vandnqrt.128B" => "__builtin_HEXAGON_V6_vandnqrt_128B",
+                    "V6.vandnqrt.acc" => "__builtin_HEXAGON_V6_vandnqrt_acc",
+                    "V6.vandnqrt.acc.128B" => "__builtin_HEXAGON_V6_vandnqrt_acc_128B",
+                    "V6.vandqrt" => "__builtin_HEXAGON_V6_vandqrt",
+                    "V6.vandqrt.128B" => "__builtin_HEXAGON_V6_vandqrt_128B",
+                    "V6.vandqrt.acc" => "__builtin_HEXAGON_V6_vandqrt_acc",
+                    "V6.vandqrt.acc.128B" => "__builtin_HEXAGON_V6_vandqrt_acc_128B",
+                    "V6.vandvnqv" => "__builtin_HEXAGON_V6_vandvnqv",
+                    "V6.vandvnqv.128B" => "__builtin_HEXAGON_V6_vandvnqv_128B",
+                    "V6.vandvqv" => "__builtin_HEXAGON_V6_vandvqv",
+                    "V6.vandvqv.128B" => "__builtin_HEXAGON_V6_vandvqv_128B",
+                    "V6.vandvrt" => "__builtin_HEXAGON_V6_vandvrt",
+                    "V6.vandvrt.128B" => "__builtin_HEXAGON_V6_vandvrt_128B",
+                    "V6.vandvrt.acc" => "__builtin_HEXAGON_V6_vandvrt_acc",
+                    "V6.vandvrt.acc.128B" => "__builtin_HEXAGON_V6_vandvrt_acc_128B",
+                    "V6.vaslh" => "__builtin_HEXAGON_V6_vaslh",
+                    "V6.vaslh.128B" => "__builtin_HEXAGON_V6_vaslh_128B",
+                    "V6.vaslh.acc" => "__builtin_HEXAGON_V6_vaslh_acc",
+                    "V6.vaslh.acc.128B" => "__builtin_HEXAGON_V6_vaslh_acc_128B",
+                    "V6.vaslhv" => "__builtin_HEXAGON_V6_vaslhv",
+                    "V6.vaslhv.128B" => "__builtin_HEXAGON_V6_vaslhv_128B",
+                    "V6.vaslw" => "__builtin_HEXAGON_V6_vaslw",
+                    "V6.vaslw.128B" => "__builtin_HEXAGON_V6_vaslw_128B",
+                    "V6.vaslw.acc" => "__builtin_HEXAGON_V6_vaslw_acc",
+                    "V6.vaslw.acc.128B" => "__builtin_HEXAGON_V6_vaslw_acc_128B",
+                    "V6.vaslwv" => "__builtin_HEXAGON_V6_vaslwv",
+                    "V6.vaslwv.128B" => "__builtin_HEXAGON_V6_vaslwv_128B",
+                    "V6.vasr.into" => "__builtin_HEXAGON_V6_vasr_into",
+                    "V6.vasr.into.128B" => "__builtin_HEXAGON_V6_vasr_into_128B",
+                    "V6.vasrh" => "__builtin_HEXAGON_V6_vasrh",
+                    "V6.vasrh.128B" => "__builtin_HEXAGON_V6_vasrh_128B",
+                    "V6.vasrh.acc" => "__builtin_HEXAGON_V6_vasrh_acc",
+                    "V6.vasrh.acc.128B" => "__builtin_HEXAGON_V6_vasrh_acc_128B",
+                    "V6.vasrhbrndsat" => "__builtin_HEXAGON_V6_vasrhbrndsat",
+                    "V6.vasrhbrndsat.128B" => "__builtin_HEXAGON_V6_vasrhbrndsat_128B",
+                    "V6.vasrhbsat" => "__builtin_HEXAGON_V6_vasrhbsat",
+                    "V6.vasrhbsat.128B" => "__builtin_HEXAGON_V6_vasrhbsat_128B",
+                    "V6.vasrhubrndsat" => "__builtin_HEXAGON_V6_vasrhubrndsat",
+                    "V6.vasrhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrhubrndsat_128B",
+                    "V6.vasrhubsat" => "__builtin_HEXAGON_V6_vasrhubsat",
+                    "V6.vasrhubsat.128B" => "__builtin_HEXAGON_V6_vasrhubsat_128B",
+                    "V6.vasrhv" => "__builtin_HEXAGON_V6_vasrhv",
+                    "V6.vasrhv.128B" => "__builtin_HEXAGON_V6_vasrhv_128B",
+                    "V6.vasruhubrndsat" => "__builtin_HEXAGON_V6_vasruhubrndsat",
+                    "V6.vasruhubrndsat.128B" => "__builtin_HEXAGON_V6_vasruhubrndsat_128B",
+                    "V6.vasruhubsat" => "__builtin_HEXAGON_V6_vasruhubsat",
+                    "V6.vasruhubsat.128B" => "__builtin_HEXAGON_V6_vasruhubsat_128B",
+                    "V6.vasruwuhrndsat" => "__builtin_HEXAGON_V6_vasruwuhrndsat",
+                    "V6.vasruwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasruwuhrndsat_128B",
+                    "V6.vasruwuhsat" => "__builtin_HEXAGON_V6_vasruwuhsat",
+                    "V6.vasruwuhsat.128B" => "__builtin_HEXAGON_V6_vasruwuhsat_128B",
+                    "V6.vasrvuhubrndsat" => "__builtin_HEXAGON_V6_vasrvuhubrndsat",
+                    "V6.vasrvuhubrndsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubrndsat_128B",
+                    "V6.vasrvuhubsat" => "__builtin_HEXAGON_V6_vasrvuhubsat",
+                    "V6.vasrvuhubsat.128B" => "__builtin_HEXAGON_V6_vasrvuhubsat_128B",
+                    "V6.vasrvwuhrndsat" => "__builtin_HEXAGON_V6_vasrvwuhrndsat",
+                    "V6.vasrvwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhrndsat_128B",
+                    "V6.vasrvwuhsat" => "__builtin_HEXAGON_V6_vasrvwuhsat",
+                    "V6.vasrvwuhsat.128B" => "__builtin_HEXAGON_V6_vasrvwuhsat_128B",
+                    "V6.vasrw" => "__builtin_HEXAGON_V6_vasrw",
+                    "V6.vasrw.128B" => "__builtin_HEXAGON_V6_vasrw_128B",
+                    "V6.vasrw.acc" => "__builtin_HEXAGON_V6_vasrw_acc",
+                    "V6.vasrw.acc.128B" => "__builtin_HEXAGON_V6_vasrw_acc_128B",
+                    "V6.vasrwh" => "__builtin_HEXAGON_V6_vasrwh",
+                    "V6.vasrwh.128B" => "__builtin_HEXAGON_V6_vasrwh_128B",
+                    "V6.vasrwhrndsat" => "__builtin_HEXAGON_V6_vasrwhrndsat",
+                    "V6.vasrwhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwhrndsat_128B",
+                    "V6.vasrwhsat" => "__builtin_HEXAGON_V6_vasrwhsat",
+                    "V6.vasrwhsat.128B" => "__builtin_HEXAGON_V6_vasrwhsat_128B",
+                    "V6.vasrwuhrndsat" => "__builtin_HEXAGON_V6_vasrwuhrndsat",
+                    "V6.vasrwuhrndsat.128B" => "__builtin_HEXAGON_V6_vasrwuhrndsat_128B",
+                    "V6.vasrwuhsat" => "__builtin_HEXAGON_V6_vasrwuhsat",
+                    "V6.vasrwuhsat.128B" => "__builtin_HEXAGON_V6_vasrwuhsat_128B",
+                    "V6.vasrwv" => "__builtin_HEXAGON_V6_vasrwv",
+                    "V6.vasrwv.128B" => "__builtin_HEXAGON_V6_vasrwv_128B",
+                    "V6.vassign" => "__builtin_HEXAGON_V6_vassign",
+                    "V6.vassign.128B" => "__builtin_HEXAGON_V6_vassign_128B",
+                    "V6.vassign.fp" => "__builtin_HEXAGON_V6_vassign_fp",
+                    "V6.vassign.fp.128B" => "__builtin_HEXAGON_V6_vassign_fp_128B",
+                    "V6.vassignp" => "__builtin_HEXAGON_V6_vassignp",
+                    "V6.vassignp.128B" => "__builtin_HEXAGON_V6_vassignp_128B",
+                    "V6.vavgb" => "__builtin_HEXAGON_V6_vavgb",
+                    "V6.vavgb.128B" => "__builtin_HEXAGON_V6_vavgb_128B",
+                    "V6.vavgbrnd" => "__builtin_HEXAGON_V6_vavgbrnd",
+                    "V6.vavgbrnd.128B" => "__builtin_HEXAGON_V6_vavgbrnd_128B",
+                    "V6.vavgh" => "__builtin_HEXAGON_V6_vavgh",
+                    "V6.vavgh.128B" => "__builtin_HEXAGON_V6_vavgh_128B",
+                    "V6.vavghrnd" => "__builtin_HEXAGON_V6_vavghrnd",
+                    "V6.vavghrnd.128B" => "__builtin_HEXAGON_V6_vavghrnd_128B",
+                    "V6.vavgub" => "__builtin_HEXAGON_V6_vavgub",
+                    "V6.vavgub.128B" => "__builtin_HEXAGON_V6_vavgub_128B",
+                    "V6.vavgubrnd" => "__builtin_HEXAGON_V6_vavgubrnd",
+                    "V6.vavgubrnd.128B" => "__builtin_HEXAGON_V6_vavgubrnd_128B",
+                    "V6.vavguh" => "__builtin_HEXAGON_V6_vavguh",
+                    "V6.vavguh.128B" => "__builtin_HEXAGON_V6_vavguh_128B",
+                    "V6.vavguhrnd" => "__builtin_HEXAGON_V6_vavguhrnd",
+                    "V6.vavguhrnd.128B" => "__builtin_HEXAGON_V6_vavguhrnd_128B",
+                    "V6.vavguw" => "__builtin_HEXAGON_V6_vavguw",
+                    "V6.vavguw.128B" => "__builtin_HEXAGON_V6_vavguw_128B",
+                    "V6.vavguwrnd" => "__builtin_HEXAGON_V6_vavguwrnd",
+                    "V6.vavguwrnd.128B" => "__builtin_HEXAGON_V6_vavguwrnd_128B",
+                    "V6.vavgw" => "__builtin_HEXAGON_V6_vavgw",
+                    "V6.vavgw.128B" => "__builtin_HEXAGON_V6_vavgw_128B",
+                    "V6.vavgwrnd" => "__builtin_HEXAGON_V6_vavgwrnd",
+                    "V6.vavgwrnd.128B" => "__builtin_HEXAGON_V6_vavgwrnd_128B",
+                    "V6.vcl0h" => "__builtin_HEXAGON_V6_vcl0h",
+                    "V6.vcl0h.128B" => "__builtin_HEXAGON_V6_vcl0h_128B",
+                    "V6.vcl0w" => "__builtin_HEXAGON_V6_vcl0w",
+                    "V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
+                    "V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
+                    "V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
+                    "V6.vconv.h.hf" => "__builtin_HEXAGON_V6_vconv_h_hf",
+                    "V6.vconv.h.hf.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_128B",
+                    "V6.vconv.hf.h" => "__builtin_HEXAGON_V6_vconv_hf_h",
+                    "V6.vconv.hf.h.128B" => "__builtin_HEXAGON_V6_vconv_hf_h_128B",
+                    "V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
+                    "V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
+                    "V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
+                    "V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
+                    "V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
+                    "V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
+                    "V6.vconv.sf.w" => "__builtin_HEXAGON_V6_vconv_sf_w",
+                    "V6.vconv.sf.w.128B" => "__builtin_HEXAGON_V6_vconv_sf_w_128B",
+                    "V6.vconv.w.sf" => "__builtin_HEXAGON_V6_vconv_w_sf",
+                    "V6.vconv.w.sf.128B" => "__builtin_HEXAGON_V6_vconv_w_sf_128B",
+                    "V6.vcvt.b.hf" => "__builtin_HEXAGON_V6_vcvt_b_hf",
+                    "V6.vcvt.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt_b_hf_128B",
+                    "V6.vcvt.bf.sf" => "__builtin_HEXAGON_V6_vcvt_bf_sf",
+                    "V6.vcvt.bf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_bf_sf_128B",
+                    "V6.vcvt.f8.hf" => "__builtin_HEXAGON_V6_vcvt_f8_hf",
+                    "V6.vcvt.f8.hf.128B" => "__builtin_HEXAGON_V6_vcvt_f8_hf_128B",
+                    "V6.vcvt.h.hf" => "__builtin_HEXAGON_V6_vcvt_h_hf",
+                    "V6.vcvt.h.hf.128B" => "__builtin_HEXAGON_V6_vcvt_h_hf_128B",
+                    "V6.vcvt.hf.b" => "__builtin_HEXAGON_V6_vcvt_hf_b",
+                    "V6.vcvt.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt_hf_b_128B",
+                    "V6.vcvt.hf.f8" => "__builtin_HEXAGON_V6_vcvt_hf_f8",
+                    "V6.vcvt.hf.f8.128B" => "__builtin_HEXAGON_V6_vcvt_hf_f8_128B",
+                    "V6.vcvt.hf.h" => "__builtin_HEXAGON_V6_vcvt_hf_h",
+                    "V6.vcvt.hf.h.128B" => "__builtin_HEXAGON_V6_vcvt_hf_h_128B",
+                    "V6.vcvt.hf.sf" => "__builtin_HEXAGON_V6_vcvt_hf_sf",
+                    "V6.vcvt.hf.sf.128B" => "__builtin_HEXAGON_V6_vcvt_hf_sf_128B",
+                    "V6.vcvt.hf.ub" => "__builtin_HEXAGON_V6_vcvt_hf_ub",
+                    "V6.vcvt.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt_hf_ub_128B",
+                    "V6.vcvt.hf.uh" => "__builtin_HEXAGON_V6_vcvt_hf_uh",
+                    "V6.vcvt.hf.uh.128B" => "__builtin_HEXAGON_V6_vcvt_hf_uh_128B",
+                    "V6.vcvt.sf.hf" => "__builtin_HEXAGON_V6_vcvt_sf_hf",
+                    "V6.vcvt.sf.hf.128B" => "__builtin_HEXAGON_V6_vcvt_sf_hf_128B",
+                    "V6.vcvt.ub.hf" => "__builtin_HEXAGON_V6_vcvt_ub_hf",
+                    "V6.vcvt.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt_ub_hf_128B",
+                    "V6.vcvt.uh.hf" => "__builtin_HEXAGON_V6_vcvt_uh_hf",
+                    "V6.vcvt.uh.hf.128B" => "__builtin_HEXAGON_V6_vcvt_uh_hf_128B",
+                    "V6.vcvt2.b.hf" => "__builtin_HEXAGON_V6_vcvt2_b_hf",
+                    "V6.vcvt2.b.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_b_hf_128B",
+                    "V6.vcvt2.hf.b" => "__builtin_HEXAGON_V6_vcvt2_hf_b",
+                    "V6.vcvt2.hf.b.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_b_128B",
+                    "V6.vcvt2.hf.ub" => "__builtin_HEXAGON_V6_vcvt2_hf_ub",
+                    "V6.vcvt2.hf.ub.128B" => "__builtin_HEXAGON_V6_vcvt2_hf_ub_128B",
+                    "V6.vcvt2.ub.hf" => "__builtin_HEXAGON_V6_vcvt2_ub_hf",
+                    "V6.vcvt2.ub.hf.128B" => "__builtin_HEXAGON_V6_vcvt2_ub_hf_128B",
+                    "V6.vd0" => "__builtin_HEXAGON_V6_vd0",
+                    "V6.vd0.128B" => "__builtin_HEXAGON_V6_vd0_128B",
+                    "V6.vdd0" => "__builtin_HEXAGON_V6_vdd0",
+                    "V6.vdd0.128B" => "__builtin_HEXAGON_V6_vdd0_128B",
+                    "V6.vdealb" => "__builtin_HEXAGON_V6_vdealb",
+                    "V6.vdealb.128B" => "__builtin_HEXAGON_V6_vdealb_128B",
+                    "V6.vdealb4w" => "__builtin_HEXAGON_V6_vdealb4w",
+                    "V6.vdealb4w.128B" => "__builtin_HEXAGON_V6_vdealb4w_128B",
+                    "V6.vdealh" => "__builtin_HEXAGON_V6_vdealh",
+                    "V6.vdealh.128B" => "__builtin_HEXAGON_V6_vdealh_128B",
+                    "V6.vdealvdd" => "__builtin_HEXAGON_V6_vdealvdd",
+                    "V6.vdealvdd.128B" => "__builtin_HEXAGON_V6_vdealvdd_128B",
+                    "V6.vdelta" => "__builtin_HEXAGON_V6_vdelta",
+                    "V6.vdelta.128B" => "__builtin_HEXAGON_V6_vdelta_128B",
+                    "V6.vdmpy.sf.hf" => "__builtin_HEXAGON_V6_vdmpy_sf_hf",
+                    "V6.vdmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_128B",
+                    "V6.vdmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc",
+                    "V6.vdmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B",
+                    "V6.vdmpybus" => "__builtin_HEXAGON_V6_vdmpybus",
+                    "V6.vdmpybus.128B" => "__builtin_HEXAGON_V6_vdmpybus_128B",
+                    "V6.vdmpybus.acc" => "__builtin_HEXAGON_V6_vdmpybus_acc",
+                    "V6.vdmpybus.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_acc_128B",
+                    "V6.vdmpybus.dv" => "__builtin_HEXAGON_V6_vdmpybus_dv",
+                    "V6.vdmpybus.dv.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_128B",
+                    "V6.vdmpybus.dv.acc" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc",
+                    "V6.vdmpybus.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B",
+                    "V6.vdmpyhb" => "__builtin_HEXAGON_V6_vdmpyhb",
+                    "V6.vdmpyhb.128B" => "__builtin_HEXAGON_V6_vdmpyhb_128B",
+                    "V6.vdmpyhb.acc" => "__builtin_HEXAGON_V6_vdmpyhb_acc",
+                    "V6.vdmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_acc_128B",
+                    "V6.vdmpyhb.dv" => "__builtin_HEXAGON_V6_vdmpyhb_dv",
+                    "V6.vdmpyhb.dv.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_128B",
+                    "V6.vdmpyhb.dv.acc" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc",
+                    "V6.vdmpyhb.dv.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B",
+                    "V6.vdmpyhisat" => "__builtin_HEXAGON_V6_vdmpyhisat",
+                    "V6.vdmpyhisat.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_128B",
+                    "V6.vdmpyhisat.acc" => "__builtin_HEXAGON_V6_vdmpyhisat_acc",
+                    "V6.vdmpyhisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhisat_acc_128B",
+                    "V6.vdmpyhsat" => "__builtin_HEXAGON_V6_vdmpyhsat",
+                    "V6.vdmpyhsat.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_128B",
+                    "V6.vdmpyhsat.acc" => "__builtin_HEXAGON_V6_vdmpyhsat_acc",
+                    "V6.vdmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsat_acc_128B",
+                    "V6.vdmpyhsuisat" => "__builtin_HEXAGON_V6_vdmpyhsuisat",
+                    "V6.vdmpyhsuisat.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_128B",
+                    "V6.vdmpyhsuisat.acc" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc",
+                    "V6.vdmpyhsuisat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B",
+                    "V6.vdmpyhsusat" => "__builtin_HEXAGON_V6_vdmpyhsusat",
+                    "V6.vdmpyhsusat.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_128B",
+                    "V6.vdmpyhsusat.acc" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc",
+                    "V6.vdmpyhsusat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B",
+                    "V6.vdmpyhvsat" => "__builtin_HEXAGON_V6_vdmpyhvsat",
+                    "V6.vdmpyhvsat.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_128B",
+                    "V6.vdmpyhvsat.acc" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc",
+                    "V6.vdmpyhvsat.acc.128B" => "__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B",
+                    "V6.vdsaduh" => "__builtin_HEXAGON_V6_vdsaduh",
+                    "V6.vdsaduh.128B" => "__builtin_HEXAGON_V6_vdsaduh_128B",
+                    "V6.vdsaduh.acc" => "__builtin_HEXAGON_V6_vdsaduh_acc",
+                    "V6.vdsaduh.acc.128B" => "__builtin_HEXAGON_V6_vdsaduh_acc_128B",
+                    "V6.veqb" => "__builtin_HEXAGON_V6_veqb",
+                    "V6.veqb.128B" => "__builtin_HEXAGON_V6_veqb_128B",
+                    "V6.veqb.and" => "__builtin_HEXAGON_V6_veqb_and",
+                    "V6.veqb.and.128B" => "__builtin_HEXAGON_V6_veqb_and_128B",
+                    "V6.veqb.or" => "__builtin_HEXAGON_V6_veqb_or",
+                    "V6.veqb.or.128B" => "__builtin_HEXAGON_V6_veqb_or_128B",
+                    "V6.veqb.xor" => "__builtin_HEXAGON_V6_veqb_xor",
+                    "V6.veqb.xor.128B" => "__builtin_HEXAGON_V6_veqb_xor_128B",
+                    "V6.veqh" => "__builtin_HEXAGON_V6_veqh",
+                    "V6.veqh.128B" => "__builtin_HEXAGON_V6_veqh_128B",
+                    "V6.veqh.and" => "__builtin_HEXAGON_V6_veqh_and",
+                    "V6.veqh.and.128B" => "__builtin_HEXAGON_V6_veqh_and_128B",
+                    "V6.veqh.or" => "__builtin_HEXAGON_V6_veqh_or",
+                    "V6.veqh.or.128B" => "__builtin_HEXAGON_V6_veqh_or_128B",
+                    "V6.veqh.xor" => "__builtin_HEXAGON_V6_veqh_xor",
+                    "V6.veqh.xor.128B" => "__builtin_HEXAGON_V6_veqh_xor_128B",
+                    "V6.veqw" => "__builtin_HEXAGON_V6_veqw",
+                    "V6.veqw.128B" => "__builtin_HEXAGON_V6_veqw_128B",
+                    "V6.veqw.and" => "__builtin_HEXAGON_V6_veqw_and",
+                    "V6.veqw.and.128B" => "__builtin_HEXAGON_V6_veqw_and_128B",
+                    "V6.veqw.or" => "__builtin_HEXAGON_V6_veqw_or",
+                    "V6.veqw.or.128B" => "__builtin_HEXAGON_V6_veqw_or_128B",
+                    "V6.veqw.xor" => "__builtin_HEXAGON_V6_veqw_xor",
+                    "V6.veqw.xor.128B" => "__builtin_HEXAGON_V6_veqw_xor_128B",
+                    "V6.vfmax.f8" => "__builtin_HEXAGON_V6_vfmax_f8",
+                    "V6.vfmax.f8.128B" => "__builtin_HEXAGON_V6_vfmax_f8_128B",
+                    "V6.vfmax.hf" => "__builtin_HEXAGON_V6_vfmax_hf",
+                    "V6.vfmax.hf.128B" => "__builtin_HEXAGON_V6_vfmax_hf_128B",
+                    "V6.vfmax.sf" => "__builtin_HEXAGON_V6_vfmax_sf",
+                    "V6.vfmax.sf.128B" => "__builtin_HEXAGON_V6_vfmax_sf_128B",
+                    "V6.vfmin.f8" => "__builtin_HEXAGON_V6_vfmin_f8",
+                    "V6.vfmin.f8.128B" => "__builtin_HEXAGON_V6_vfmin_f8_128B",
+                    "V6.vfmin.hf" => "__builtin_HEXAGON_V6_vfmin_hf",
+                    "V6.vfmin.hf.128B" => "__builtin_HEXAGON_V6_vfmin_hf_128B",
+                    "V6.vfmin.sf" => "__builtin_HEXAGON_V6_vfmin_sf",
+                    "V6.vfmin.sf.128B" => "__builtin_HEXAGON_V6_vfmin_sf_128B",
+                    "V6.vfneg.f8" => "__builtin_HEXAGON_V6_vfneg_f8",
+                    "V6.vfneg.f8.128B" => "__builtin_HEXAGON_V6_vfneg_f8_128B",
+                    "V6.vfneg.hf" => "__builtin_HEXAGON_V6_vfneg_hf",
+                    "V6.vfneg.hf.128B" => "__builtin_HEXAGON_V6_vfneg_hf_128B",
+                    "V6.vfneg.sf" => "__builtin_HEXAGON_V6_vfneg_sf",
+                    "V6.vfneg.sf.128B" => "__builtin_HEXAGON_V6_vfneg_sf_128B",
+                    "V6.vgathermh" => "__builtin_HEXAGON_V6_vgathermh",
+                    "V6.vgathermh.128B" => "__builtin_HEXAGON_V6_vgathermh_128B",
+                    "V6.vgathermhq" => "__builtin_HEXAGON_V6_vgathermhq",
+                    "V6.vgathermhq.128B" => "__builtin_HEXAGON_V6_vgathermhq_128B",
+                    "V6.vgathermhw" => "__builtin_HEXAGON_V6_vgathermhw",
+                    "V6.vgathermhw.128B" => "__builtin_HEXAGON_V6_vgathermhw_128B",
+                    "V6.vgathermhwq" => "__builtin_HEXAGON_V6_vgathermhwq",
+                    "V6.vgathermhwq.128B" => "__builtin_HEXAGON_V6_vgathermhwq_128B",
+                    "V6.vgathermw" => "__builtin_HEXAGON_V6_vgathermw",
+                    "V6.vgathermw.128B" => "__builtin_HEXAGON_V6_vgathermw_128B",
+                    "V6.vgathermwq" => "__builtin_HEXAGON_V6_vgathermwq",
+                    "V6.vgathermwq.128B" => "__builtin_HEXAGON_V6_vgathermwq_128B",
+                    "V6.vgtb" => "__builtin_HEXAGON_V6_vgtb",
+                    "V6.vgtb.128B" => "__builtin_HEXAGON_V6_vgtb_128B",
+                    "V6.vgtb.and" => "__builtin_HEXAGON_V6_vgtb_and",
+                    "V6.vgtb.and.128B" => "__builtin_HEXAGON_V6_vgtb_and_128B",
+                    "V6.vgtb.or" => "__builtin_HEXAGON_V6_vgtb_or",
+                    "V6.vgtb.or.128B" => "__builtin_HEXAGON_V6_vgtb_or_128B",
+                    "V6.vgtb.xor" => "__builtin_HEXAGON_V6_vgtb_xor",
+                    "V6.vgtb.xor.128B" => "__builtin_HEXAGON_V6_vgtb_xor_128B",
+                    "V6.vgtbf" => "__builtin_HEXAGON_V6_vgtbf",
+                    "V6.vgtbf.128B" => "__builtin_HEXAGON_V6_vgtbf_128B",
+                    "V6.vgtbf.and" => "__builtin_HEXAGON_V6_vgtbf_and",
+                    "V6.vgtbf.and.128B" => "__builtin_HEXAGON_V6_vgtbf_and_128B",
+                    "V6.vgtbf.or" => "__builtin_HEXAGON_V6_vgtbf_or",
+                    "V6.vgtbf.or.128B" => "__builtin_HEXAGON_V6_vgtbf_or_128B",
+                    "V6.vgtbf.xor" => "__builtin_HEXAGON_V6_vgtbf_xor",
+                    "V6.vgtbf.xor.128B" => "__builtin_HEXAGON_V6_vgtbf_xor_128B",
+                    "V6.vgth" => "__builtin_HEXAGON_V6_vgth",
+                    "V6.vgth.128B" => "__builtin_HEXAGON_V6_vgth_128B",
+                    "V6.vgth.and" => "__builtin_HEXAGON_V6_vgth_and",
+                    "V6.vgth.and.128B" => "__builtin_HEXAGON_V6_vgth_and_128B",
+                    "V6.vgth.or" => "__builtin_HEXAGON_V6_vgth_or",
+                    "V6.vgth.or.128B" => "__builtin_HEXAGON_V6_vgth_or_128B",
+                    "V6.vgth.xor" => "__builtin_HEXAGON_V6_vgth_xor",
+                    "V6.vgth.xor.128B" => "__builtin_HEXAGON_V6_vgth_xor_128B",
+                    "V6.vgthf" => "__builtin_HEXAGON_V6_vgthf",
+                    "V6.vgthf.128B" => "__builtin_HEXAGON_V6_vgthf_128B",
+                    "V6.vgthf.and" => "__builtin_HEXAGON_V6_vgthf_and",
+                    "V6.vgthf.and.128B" => "__builtin_HEXAGON_V6_vgthf_and_128B",
+                    "V6.vgthf.or" => "__builtin_HEXAGON_V6_vgthf_or",
+                    "V6.vgthf.or.128B" => "__builtin_HEXAGON_V6_vgthf_or_128B",
+                    "V6.vgthf.xor" => "__builtin_HEXAGON_V6_vgthf_xor",
+                    "V6.vgthf.xor.128B" => "__builtin_HEXAGON_V6_vgthf_xor_128B",
+                    "V6.vgtsf" => "__builtin_HEXAGON_V6_vgtsf",
+                    "V6.vgtsf.128B" => "__builtin_HEXAGON_V6_vgtsf_128B",
+                    "V6.vgtsf.and" => "__builtin_HEXAGON_V6_vgtsf_and",
+                    "V6.vgtsf.and.128B" => "__builtin_HEXAGON_V6_vgtsf_and_128B",
+                    "V6.vgtsf.or" => "__builtin_HEXAGON_V6_vgtsf_or",
+                    "V6.vgtsf.or.128B" => "__builtin_HEXAGON_V6_vgtsf_or_128B",
+                    "V6.vgtsf.xor" => "__builtin_HEXAGON_V6_vgtsf_xor",
+                    "V6.vgtsf.xor.128B" => "__builtin_HEXAGON_V6_vgtsf_xor_128B",
+                    "V6.vgtub" => "__builtin_HEXAGON_V6_vgtub",
+                    "V6.vgtub.128B" => "__builtin_HEXAGON_V6_vgtub_128B",
+                    "V6.vgtub.and" => "__builtin_HEXAGON_V6_vgtub_and",
+                    "V6.vgtub.and.128B" => "__builtin_HEXAGON_V6_vgtub_and_128B",
+                    "V6.vgtub.or" => "__builtin_HEXAGON_V6_vgtub_or",
+                    "V6.vgtub.or.128B" => "__builtin_HEXAGON_V6_vgtub_or_128B",
+                    "V6.vgtub.xor" => "__builtin_HEXAGON_V6_vgtub_xor",
+                    "V6.vgtub.xor.128B" => "__builtin_HEXAGON_V6_vgtub_xor_128B",
+                    "V6.vgtuh" => "__builtin_HEXAGON_V6_vgtuh",
+                    "V6.vgtuh.128B" => "__builtin_HEXAGON_V6_vgtuh_128B",
+                    "V6.vgtuh.and" => "__builtin_HEXAGON_V6_vgtuh_and",
+                    "V6.vgtuh.and.128B" => "__builtin_HEXAGON_V6_vgtuh_and_128B",
+                    "V6.vgtuh.or" => "__builtin_HEXAGON_V6_vgtuh_or",
+                    "V6.vgtuh.or.128B" => "__builtin_HEXAGON_V6_vgtuh_or_128B",
+                    "V6.vgtuh.xor" => "__builtin_HEXAGON_V6_vgtuh_xor",
+                    "V6.vgtuh.xor.128B" => "__builtin_HEXAGON_V6_vgtuh_xor_128B",
+                    "V6.vgtuw" => "__builtin_HEXAGON_V6_vgtuw",
+                    "V6.vgtuw.128B" => "__builtin_HEXAGON_V6_vgtuw_128B",
+                    "V6.vgtuw.and" => "__builtin_HEXAGON_V6_vgtuw_and",
+                    "V6.vgtuw.and.128B" => "__builtin_HEXAGON_V6_vgtuw_and_128B",
+                    "V6.vgtuw.or" => "__builtin_HEXAGON_V6_vgtuw_or",
+                    "V6.vgtuw.or.128B" => "__builtin_HEXAGON_V6_vgtuw_or_128B",
+                    "V6.vgtuw.xor" => "__builtin_HEXAGON_V6_vgtuw_xor",
+                    "V6.vgtuw.xor.128B" => "__builtin_HEXAGON_V6_vgtuw_xor_128B",
+                    "V6.vgtw" => "__builtin_HEXAGON_V6_vgtw",
+                    "V6.vgtw.128B" => "__builtin_HEXAGON_V6_vgtw_128B",
+                    "V6.vgtw.and" => "__builtin_HEXAGON_V6_vgtw_and",
+                    "V6.vgtw.and.128B" => "__builtin_HEXAGON_V6_vgtw_and_128B",
+                    "V6.vgtw.or" => "__builtin_HEXAGON_V6_vgtw_or",
+                    "V6.vgtw.or.128B" => "__builtin_HEXAGON_V6_vgtw_or_128B",
+                    "V6.vgtw.xor" => "__builtin_HEXAGON_V6_vgtw_xor",
+                    "V6.vgtw.xor.128B" => "__builtin_HEXAGON_V6_vgtw_xor_128B",
+                    "V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
+                    "V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
+                    "V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
+                    "V6.vlalignb.128B" => "__builtin_HEXAGON_V6_vlalignb_128B",
+                    "V6.vlalignbi" => "__builtin_HEXAGON_V6_vlalignbi",
+                    "V6.vlalignbi.128B" => "__builtin_HEXAGON_V6_vlalignbi_128B",
+                    "V6.vlsrb" => "__builtin_HEXAGON_V6_vlsrb",
+                    "V6.vlsrb.128B" => "__builtin_HEXAGON_V6_vlsrb_128B",
+                    "V6.vlsrh" => "__builtin_HEXAGON_V6_vlsrh",
+                    "V6.vlsrh.128B" => "__builtin_HEXAGON_V6_vlsrh_128B",
+                    "V6.vlsrhv" => "__builtin_HEXAGON_V6_vlsrhv",
+                    "V6.vlsrhv.128B" => "__builtin_HEXAGON_V6_vlsrhv_128B",
+                    "V6.vlsrw" => "__builtin_HEXAGON_V6_vlsrw",
+                    "V6.vlsrw.128B" => "__builtin_HEXAGON_V6_vlsrw_128B",
+                    "V6.vlsrwv" => "__builtin_HEXAGON_V6_vlsrwv",
+                    "V6.vlsrwv.128B" => "__builtin_HEXAGON_V6_vlsrwv_128B",
+                    "V6.vlut4" => "__builtin_HEXAGON_V6_vlut4",
+                    "V6.vlut4.128B" => "__builtin_HEXAGON_V6_vlut4_128B",
+                    "V6.vlutb" => "__builtin_HEXAGON_V6_vlutb",
+                    "V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B",
+                    "V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc",
+                    "V6.vlutb.acc.128B" => "__builtin_HEXAGON_V6_vlutb_acc_128B",
+                    "V6.vlutb.dv" => "__builtin_HEXAGON_V6_vlutb_dv",
+                    "V6.vlutb.dv.128B" => "__builtin_HEXAGON_V6_vlutb_dv_128B",
+                    "V6.vlutb.dv.acc" => "__builtin_HEXAGON_V6_vlutb_dv_acc",
+                    "V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B",
+                    "V6.vlutvvb" => "__builtin_HEXAGON_V6_vlutvvb",
+                    "V6.vlutvvb.128B" => "__builtin_HEXAGON_V6_vlutvvb_128B",
+                    "V6.vlutvvb.nm" => "__builtin_HEXAGON_V6_vlutvvb_nm",
+                    "V6.vlutvvb.nm.128B" => "__builtin_HEXAGON_V6_vlutvvb_nm_128B",
+                    "V6.vlutvvb.oracc" => "__builtin_HEXAGON_V6_vlutvvb_oracc",
+                    "V6.vlutvvb.oracc.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracc_128B",
+                    "V6.vlutvvb.oracci" => "__builtin_HEXAGON_V6_vlutvvb_oracci",
+                    "V6.vlutvvb.oracci.128B" => "__builtin_HEXAGON_V6_vlutvvb_oracci_128B",
+                    "V6.vlutvvbi" => "__builtin_HEXAGON_V6_vlutvvbi",
+                    "V6.vlutvvbi.128B" => "__builtin_HEXAGON_V6_vlutvvbi_128B",
+                    "V6.vlutvwh" => "__builtin_HEXAGON_V6_vlutvwh",
+                    "V6.vlutvwh.128B" => "__builtin_HEXAGON_V6_vlutvwh_128B",
+                    "V6.vlutvwh.nm" => "__builtin_HEXAGON_V6_vlutvwh_nm",
+                    "V6.vlutvwh.nm.128B" => "__builtin_HEXAGON_V6_vlutvwh_nm_128B",
+                    "V6.vlutvwh.oracc" => "__builtin_HEXAGON_V6_vlutvwh_oracc",
+                    "V6.vlutvwh.oracc.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracc_128B",
+                    "V6.vlutvwh.oracci" => "__builtin_HEXAGON_V6_vlutvwh_oracci",
+                    "V6.vlutvwh.oracci.128B" => "__builtin_HEXAGON_V6_vlutvwh_oracci_128B",
+                    "V6.vlutvwhi" => "__builtin_HEXAGON_V6_vlutvwhi",
+                    "V6.vlutvwhi.128B" => "__builtin_HEXAGON_V6_vlutvwhi_128B",
+                    "V6.vmax.bf" => "__builtin_HEXAGON_V6_vmax_bf",
+                    "V6.vmax.bf.128B" => "__builtin_HEXAGON_V6_vmax_bf_128B",
+                    "V6.vmax.hf" => "__builtin_HEXAGON_V6_vmax_hf",
+                    "V6.vmax.hf.128B" => "__builtin_HEXAGON_V6_vmax_hf_128B",
+                    "V6.vmax.sf" => "__builtin_HEXAGON_V6_vmax_sf",
+                    "V6.vmax.sf.128B" => "__builtin_HEXAGON_V6_vmax_sf_128B",
+                    "V6.vmaxb" => "__builtin_HEXAGON_V6_vmaxb",
+                    "V6.vmaxb.128B" => "__builtin_HEXAGON_V6_vmaxb_128B",
+                    "V6.vmaxh" => "__builtin_HEXAGON_V6_vmaxh",
+                    "V6.vmaxh.128B" => "__builtin_HEXAGON_V6_vmaxh_128B",
+                    "V6.vmaxub" => "__builtin_HEXAGON_V6_vmaxub",
+                    "V6.vmaxub.128B" => "__builtin_HEXAGON_V6_vmaxub_128B",
+                    "V6.vmaxuh" => "__builtin_HEXAGON_V6_vmaxuh",
+                    "V6.vmaxuh.128B" => "__builtin_HEXAGON_V6_vmaxuh_128B",
+                    "V6.vmaxw" => "__builtin_HEXAGON_V6_vmaxw",
+                    "V6.vmaxw.128B" => "__builtin_HEXAGON_V6_vmaxw_128B",
+                    "V6.vmerge.qf" => "__builtin_HEXAGON_V6_vmerge_qf",
+                    "V6.vmerge.qf.128B" => "__builtin_HEXAGON_V6_vmerge_qf_128B",
+                    "V6.vmin.bf" => "__builtin_HEXAGON_V6_vmin_bf",
+                    "V6.vmin.bf.128B" => "__builtin_HEXAGON_V6_vmin_bf_128B",
+                    "V6.vmin.hf" => "__builtin_HEXAGON_V6_vmin_hf",
+                    "V6.vmin.hf.128B" => "__builtin_HEXAGON_V6_vmin_hf_128B",
+                    "V6.vmin.sf" => "__builtin_HEXAGON_V6_vmin_sf",
+                    "V6.vmin.sf.128B" => "__builtin_HEXAGON_V6_vmin_sf_128B",
+                    "V6.vminb" => "__builtin_HEXAGON_V6_vminb",
+                    "V6.vminb.128B" => "__builtin_HEXAGON_V6_vminb_128B",
+                    "V6.vminh" => "__builtin_HEXAGON_V6_vminh",
+                    "V6.vminh.128B" => "__builtin_HEXAGON_V6_vminh_128B",
+                    "V6.vminub" => "__builtin_HEXAGON_V6_vminub",
+                    "V6.vminub.128B" => "__builtin_HEXAGON_V6_vminub_128B",
+                    "V6.vminuh" => "__builtin_HEXAGON_V6_vminuh",
+                    "V6.vminuh.128B" => "__builtin_HEXAGON_V6_vminuh_128B",
+                    "V6.vminw" => "__builtin_HEXAGON_V6_vminw",
+                    "V6.vminw.128B" => "__builtin_HEXAGON_V6_vminw_128B",
+                    "V6.vmpabus" => "__builtin_HEXAGON_V6_vmpabus",
+                    "V6.vmpabus.128B" => "__builtin_HEXAGON_V6_vmpabus_128B",
+                    "V6.vmpabus.acc" => "__builtin_HEXAGON_V6_vmpabus_acc",
+                    "V6.vmpabus.acc.128B" => "__builtin_HEXAGON_V6_vmpabus_acc_128B",
+                    "V6.vmpabusv" => "__builtin_HEXAGON_V6_vmpabusv",
+                    "V6.vmpabusv.128B" => "__builtin_HEXAGON_V6_vmpabusv_128B",
+                    "V6.vmpabuu" => "__builtin_HEXAGON_V6_vmpabuu",
+                    "V6.vmpabuu.128B" => "__builtin_HEXAGON_V6_vmpabuu_128B",
+                    "V6.vmpabuu.acc" => "__builtin_HEXAGON_V6_vmpabuu_acc",
+                    "V6.vmpabuu.acc.128B" => "__builtin_HEXAGON_V6_vmpabuu_acc_128B",
+                    "V6.vmpabuuv" => "__builtin_HEXAGON_V6_vmpabuuv",
+                    "V6.vmpabuuv.128B" => "__builtin_HEXAGON_V6_vmpabuuv_128B",
+                    "V6.vmpahb" => "__builtin_HEXAGON_V6_vmpahb",
+                    "V6.vmpahb.128B" => "__builtin_HEXAGON_V6_vmpahb_128B",
+                    "V6.vmpahb.acc" => "__builtin_HEXAGON_V6_vmpahb_acc",
+                    "V6.vmpahb.acc.128B" => "__builtin_HEXAGON_V6_vmpahb_acc_128B",
+                    "V6.vmpahhsat" => "__builtin_HEXAGON_V6_vmpahhsat",
+                    "V6.vmpahhsat.128B" => "__builtin_HEXAGON_V6_vmpahhsat_128B",
+                    "V6.vmpauhb" => "__builtin_HEXAGON_V6_vmpauhb",
+                    "V6.vmpauhb.128B" => "__builtin_HEXAGON_V6_vmpauhb_128B",
+                    "V6.vmpauhb.acc" => "__builtin_HEXAGON_V6_vmpauhb_acc",
+                    "V6.vmpauhb.acc.128B" => "__builtin_HEXAGON_V6_vmpauhb_acc_128B",
+                    "V6.vmpauhuhsat" => "__builtin_HEXAGON_V6_vmpauhuhsat",
+                    "V6.vmpauhuhsat.128B" => "__builtin_HEXAGON_V6_vmpauhuhsat_128B",
+                    "V6.vmpsuhuhsat" => "__builtin_HEXAGON_V6_vmpsuhuhsat",
+                    "V6.vmpsuhuhsat.128B" => "__builtin_HEXAGON_V6_vmpsuhuhsat_128B",
+                    "V6.vmpy.hf.f8" => "__builtin_HEXAGON_V6_vmpy_hf_f8",
+                    "V6.vmpy.hf.f8.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_128B",
+                    "V6.vmpy.hf.f8.acc" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc",
+                    "V6.vmpy.hf.f8.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_f8_acc_128B",
+                    "V6.vmpy.hf.hf" => "__builtin_HEXAGON_V6_vmpy_hf_hf",
+                    "V6.vmpy.hf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_128B",
+                    "V6.vmpy.hf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc",
+                    "V6.vmpy.hf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B",
+                    "V6.vmpy.qf16" => "__builtin_HEXAGON_V6_vmpy_qf16",
+                    "V6.vmpy.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_128B",
+                    "V6.vmpy.qf16.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_hf",
+                    "V6.vmpy.qf16.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_hf_128B",
+                    "V6.vmpy.qf16.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf",
+                    "V6.vmpy.qf16.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B",
+                    "V6.vmpy.qf32" => "__builtin_HEXAGON_V6_vmpy_qf32",
+                    "V6.vmpy.qf32.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_128B",
+                    "V6.vmpy.qf32.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_hf",
+                    "V6.vmpy.qf32.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_hf_128B",
+                    "V6.vmpy.qf32.mix.hf" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf",
+                    "V6.vmpy.qf32.mix.hf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B",
+                    "V6.vmpy.qf32.qf16" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16",
+                    "V6.vmpy.qf32.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B",
+                    "V6.vmpy.qf32.sf" => "__builtin_HEXAGON_V6_vmpy_qf32_sf",
+                    "V6.vmpy.qf32.sf.128B" => "__builtin_HEXAGON_V6_vmpy_qf32_sf_128B",
+                    "V6.vmpy.rt.hf" => "__builtin_HEXAGON_V6_vmpy_rt_hf",
+                    "V6.vmpy.rt.hf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_hf_128B",
+                    "V6.vmpy.rt.qf16" => "__builtin_HEXAGON_V6_vmpy_rt_qf16",
+                    "V6.vmpy.rt.qf16.128B" => "__builtin_HEXAGON_V6_vmpy_rt_qf16_128B",
+                    "V6.vmpy.rt.sf" => "__builtin_HEXAGON_V6_vmpy_rt_sf",
+                    "V6.vmpy.rt.sf.128B" => "__builtin_HEXAGON_V6_vmpy_rt_sf_128B",
+                    "V6.vmpy.sf.bf" => "__builtin_HEXAGON_V6_vmpy_sf_bf",
+                    "V6.vmpy.sf.bf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_128B",
+                    "V6.vmpy.sf.bf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc",
+                    "V6.vmpy.sf.bf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B",
+                    "V6.vmpy.sf.hf" => "__builtin_HEXAGON_V6_vmpy_sf_hf",
+                    "V6.vmpy.sf.hf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_128B",
+                    "V6.vmpy.sf.hf.acc" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc",
+                    "V6.vmpy.sf.hf.acc.128B" => "__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B",
+                    "V6.vmpy.sf.sf" => "__builtin_HEXAGON_V6_vmpy_sf_sf",
+                    "V6.vmpy.sf.sf.128B" => "__builtin_HEXAGON_V6_vmpy_sf_sf_128B",
+                    "V6.vmpybus" => "__builtin_HEXAGON_V6_vmpybus",
+                    "V6.vmpybus.128B" => "__builtin_HEXAGON_V6_vmpybus_128B",
+                    "V6.vmpybus.acc" => "__builtin_HEXAGON_V6_vmpybus_acc",
+                    "V6.vmpybus.acc.128B" => "__builtin_HEXAGON_V6_vmpybus_acc_128B",
+                    "V6.vmpybusv" => "__builtin_HEXAGON_V6_vmpybusv",
+                    "V6.vmpybusv.128B" => "__builtin_HEXAGON_V6_vmpybusv_128B",
+                    "V6.vmpybusv.acc" => "__builtin_HEXAGON_V6_vmpybusv_acc",
+                    "V6.vmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vmpybusv_acc_128B",
+                    "V6.vmpybv" => "__builtin_HEXAGON_V6_vmpybv",
+                    "V6.vmpybv.128B" => "__builtin_HEXAGON_V6_vmpybv_128B",
+                    "V6.vmpybv.acc" => "__builtin_HEXAGON_V6_vmpybv_acc",
+                    "V6.vmpybv.acc.128B" => "__builtin_HEXAGON_V6_vmpybv_acc_128B",
+                    "V6.vmpyewuh" => "__builtin_HEXAGON_V6_vmpyewuh",
+                    "V6.vmpyewuh.128B" => "__builtin_HEXAGON_V6_vmpyewuh_128B",
+                    "V6.vmpyewuh.64" => "__builtin_HEXAGON_V6_vmpyewuh_64",
+                    "V6.vmpyewuh.64.128B" => "__builtin_HEXAGON_V6_vmpyewuh_64_128B",
+                    "V6.vmpyh" => "__builtin_HEXAGON_V6_vmpyh",
+                    "V6.vmpyh.128B" => "__builtin_HEXAGON_V6_vmpyh_128B",
+                    "V6.vmpyh.acc" => "__builtin_HEXAGON_V6_vmpyh_acc",
+                    "V6.vmpyh.acc.128B" => "__builtin_HEXAGON_V6_vmpyh_acc_128B",
+                    "V6.vmpyhsat.acc" => "__builtin_HEXAGON_V6_vmpyhsat_acc",
+                    "V6.vmpyhsat.acc.128B" => "__builtin_HEXAGON_V6_vmpyhsat_acc_128B",
+                    "V6.vmpyhsrs" => "__builtin_HEXAGON_V6_vmpyhsrs",
+                    "V6.vmpyhsrs.128B" => "__builtin_HEXAGON_V6_vmpyhsrs_128B",
+                    "V6.vmpyhss" => "__builtin_HEXAGON_V6_vmpyhss",
+                    "V6.vmpyhss.128B" => "__builtin_HEXAGON_V6_vmpyhss_128B",
+                    "V6.vmpyhus" => "__builtin_HEXAGON_V6_vmpyhus",
+                    "V6.vmpyhus.128B" => "__builtin_HEXAGON_V6_vmpyhus_128B",
+                    "V6.vmpyhus.acc" => "__builtin_HEXAGON_V6_vmpyhus_acc",
+                    "V6.vmpyhus.acc.128B" => "__builtin_HEXAGON_V6_vmpyhus_acc_128B",
+                    "V6.vmpyhv" => "__builtin_HEXAGON_V6_vmpyhv",
+                    "V6.vmpyhv.128B" => "__builtin_HEXAGON_V6_vmpyhv_128B",
+                    "V6.vmpyhv.acc" => "__builtin_HEXAGON_V6_vmpyhv_acc",
+                    "V6.vmpyhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyhv_acc_128B",
+                    "V6.vmpyhvsrs" => "__builtin_HEXAGON_V6_vmpyhvsrs",
+                    "V6.vmpyhvsrs.128B" => "__builtin_HEXAGON_V6_vmpyhvsrs_128B",
+                    "V6.vmpyieoh" => "__builtin_HEXAGON_V6_vmpyieoh",
+                    "V6.vmpyieoh.128B" => "__builtin_HEXAGON_V6_vmpyieoh_128B",
+                    "V6.vmpyiewh.acc" => "__builtin_HEXAGON_V6_vmpyiewh_acc",
+                    "V6.vmpyiewh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewh_acc_128B",
+                    "V6.vmpyiewuh" => "__builtin_HEXAGON_V6_vmpyiewuh",
+                    "V6.vmpyiewuh.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_128B",
+                    "V6.vmpyiewuh.acc" => "__builtin_HEXAGON_V6_vmpyiewuh_acc",
+                    "V6.vmpyiewuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiewuh_acc_128B",
+                    "V6.vmpyih" => "__builtin_HEXAGON_V6_vmpyih",
+                    "V6.vmpyih.128B" => "__builtin_HEXAGON_V6_vmpyih_128B",
+                    "V6.vmpyih.acc" => "__builtin_HEXAGON_V6_vmpyih_acc",
+                    "V6.vmpyih.acc.128B" => "__builtin_HEXAGON_V6_vmpyih_acc_128B",
+                    "V6.vmpyihb" => "__builtin_HEXAGON_V6_vmpyihb",
+                    "V6.vmpyihb.128B" => "__builtin_HEXAGON_V6_vmpyihb_128B",
+                    "V6.vmpyihb.acc" => "__builtin_HEXAGON_V6_vmpyihb_acc",
+                    "V6.vmpyihb.acc.128B" => "__builtin_HEXAGON_V6_vmpyihb_acc_128B",
+                    "V6.vmpyiowh" => "__builtin_HEXAGON_V6_vmpyiowh",
+                    "V6.vmpyiowh.128B" => "__builtin_HEXAGON_V6_vmpyiowh_128B",
+                    "V6.vmpyiwb" => "__builtin_HEXAGON_V6_vmpyiwb",
+                    "V6.vmpyiwb.128B" => "__builtin_HEXAGON_V6_vmpyiwb_128B",
+                    "V6.vmpyiwb.acc" => "__builtin_HEXAGON_V6_vmpyiwb_acc",
+                    "V6.vmpyiwb.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwb_acc_128B",
+                    "V6.vmpyiwh" => "__builtin_HEXAGON_V6_vmpyiwh",
+                    "V6.vmpyiwh.128B" => "__builtin_HEXAGON_V6_vmpyiwh_128B",
+                    "V6.vmpyiwh.acc" => "__builtin_HEXAGON_V6_vmpyiwh_acc",
+                    "V6.vmpyiwh.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwh_acc_128B",
+                    "V6.vmpyiwub" => "__builtin_HEXAGON_V6_vmpyiwub",
+                    "V6.vmpyiwub.128B" => "__builtin_HEXAGON_V6_vmpyiwub_128B",
+                    "V6.vmpyiwub.acc" => "__builtin_HEXAGON_V6_vmpyiwub_acc",
+                    "V6.vmpyiwub.acc.128B" => "__builtin_HEXAGON_V6_vmpyiwub_acc_128B",
+                    "V6.vmpyowh" => "__builtin_HEXAGON_V6_vmpyowh",
+                    "V6.vmpyowh.128B" => "__builtin_HEXAGON_V6_vmpyowh_128B",
+                    "V6.vmpyowh.64.acc" => "__builtin_HEXAGON_V6_vmpyowh_64_acc",
+                    "V6.vmpyowh.64.acc.128B" => "__builtin_HEXAGON_V6_vmpyowh_64_acc_128B",
+                    "V6.vmpyowh.rnd" => "__builtin_HEXAGON_V6_vmpyowh_rnd",
+                    "V6.vmpyowh.rnd.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_128B",
+                    "V6.vmpyowh.rnd.sacc" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc",
+                    "V6.vmpyowh.rnd.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B",
+                    "V6.vmpyowh.sacc" => "__builtin_HEXAGON_V6_vmpyowh_sacc",
+                    "V6.vmpyowh.sacc.128B" => "__builtin_HEXAGON_V6_vmpyowh_sacc_128B",
+                    "V6.vmpyub" => "__builtin_HEXAGON_V6_vmpyub",
+                    "V6.vmpyub.128B" => "__builtin_HEXAGON_V6_vmpyub_128B",
+                    "V6.vmpyub.acc" => "__builtin_HEXAGON_V6_vmpyub_acc",
+                    "V6.vmpyub.acc.128B" => "__builtin_HEXAGON_V6_vmpyub_acc_128B",
+                    "V6.vmpyubv" => "__builtin_HEXAGON_V6_vmpyubv",
+                    "V6.vmpyubv.128B" => "__builtin_HEXAGON_V6_vmpyubv_128B",
+                    "V6.vmpyubv.acc" => "__builtin_HEXAGON_V6_vmpyubv_acc",
+                    "V6.vmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vmpyubv_acc_128B",
+                    "V6.vmpyuh" => "__builtin_HEXAGON_V6_vmpyuh",
+                    "V6.vmpyuh.128B" => "__builtin_HEXAGON_V6_vmpyuh_128B",
+                    "V6.vmpyuh.acc" => "__builtin_HEXAGON_V6_vmpyuh_acc",
+                    "V6.vmpyuh.acc.128B" => "__builtin_HEXAGON_V6_vmpyuh_acc_128B",
+                    "V6.vmpyuhe" => "__builtin_HEXAGON_V6_vmpyuhe",
+                    "V6.vmpyuhe.128B" => "__builtin_HEXAGON_V6_vmpyuhe_128B",
+                    "V6.vmpyuhe.acc" => "__builtin_HEXAGON_V6_vmpyuhe_acc",
+                    "V6.vmpyuhe.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhe_acc_128B",
+                    "V6.vmpyuhv" => "__builtin_HEXAGON_V6_vmpyuhv",
+                    "V6.vmpyuhv.128B" => "__builtin_HEXAGON_V6_vmpyuhv_128B",
+                    "V6.vmpyuhv.acc" => "__builtin_HEXAGON_V6_vmpyuhv_acc",
+                    "V6.vmpyuhv.acc.128B" => "__builtin_HEXAGON_V6_vmpyuhv_acc_128B",
+                    "V6.vmpyuhvs" => "__builtin_HEXAGON_V6_vmpyuhvs",
+                    "V6.vmpyuhvs.128B" => "__builtin_HEXAGON_V6_vmpyuhvs_128B",
+                    "V6.vmux" => "__builtin_HEXAGON_V6_vmux",
+                    "V6.vmux.128B" => "__builtin_HEXAGON_V6_vmux_128B",
+                    "V6.vnavgb" => "__builtin_HEXAGON_V6_vnavgb",
+                    "V6.vnavgb.128B" => "__builtin_HEXAGON_V6_vnavgb_128B",
+                    "V6.vnavgh" => "__builtin_HEXAGON_V6_vnavgh",
+                    "V6.vnavgh.128B" => "__builtin_HEXAGON_V6_vnavgh_128B",
+                    "V6.vnavgub" => "__builtin_HEXAGON_V6_vnavgub",
+                    "V6.vnavgub.128B" => "__builtin_HEXAGON_V6_vnavgub_128B",
+                    "V6.vnavgw" => "__builtin_HEXAGON_V6_vnavgw",
+                    "V6.vnavgw.128B" => "__builtin_HEXAGON_V6_vnavgw_128B",
+                    "V6.vnormamth" => "__builtin_HEXAGON_V6_vnormamth",
+                    "V6.vnormamth.128B" => "__builtin_HEXAGON_V6_vnormamth_128B",
+                    "V6.vnormamtw" => "__builtin_HEXAGON_V6_vnormamtw",
+                    "V6.vnormamtw.128B" => "__builtin_HEXAGON_V6_vnormamtw_128B",
+                    "V6.vnot" => "__builtin_HEXAGON_V6_vnot",
+                    "V6.vnot.128B" => "__builtin_HEXAGON_V6_vnot_128B",
+                    "V6.vor" => "__builtin_HEXAGON_V6_vor",
+                    "V6.vor.128B" => "__builtin_HEXAGON_V6_vor_128B",
+                    "V6.vpackeb" => "__builtin_HEXAGON_V6_vpackeb",
+                    "V6.vpackeb.128B" => "__builtin_HEXAGON_V6_vpackeb_128B",
+                    "V6.vpackeh" => "__builtin_HEXAGON_V6_vpackeh",
+                    "V6.vpackeh.128B" => "__builtin_HEXAGON_V6_vpackeh_128B",
+                    "V6.vpackhb.sat" => "__builtin_HEXAGON_V6_vpackhb_sat",
+                    "V6.vpackhb.sat.128B" => "__builtin_HEXAGON_V6_vpackhb_sat_128B",
+                    "V6.vpackhub.sat" => "__builtin_HEXAGON_V6_vpackhub_sat",
+                    "V6.vpackhub.sat.128B" => "__builtin_HEXAGON_V6_vpackhub_sat_128B",
+                    "V6.vpackob" => "__builtin_HEXAGON_V6_vpackob",
+                    "V6.vpackob.128B" => "__builtin_HEXAGON_V6_vpackob_128B",
+                    "V6.vpackoh" => "__builtin_HEXAGON_V6_vpackoh",
+                    "V6.vpackoh.128B" => "__builtin_HEXAGON_V6_vpackoh_128B",
+                    "V6.vpackwh.sat" => "__builtin_HEXAGON_V6_vpackwh_sat",
+                    "V6.vpackwh.sat.128B" => "__builtin_HEXAGON_V6_vpackwh_sat_128B",
+                    "V6.vpackwuh.sat" => "__builtin_HEXAGON_V6_vpackwuh_sat",
+                    "V6.vpackwuh.sat.128B" => "__builtin_HEXAGON_V6_vpackwuh_sat_128B",
+                    "V6.vpopcounth" => "__builtin_HEXAGON_V6_vpopcounth",
+                    "V6.vpopcounth.128B" => "__builtin_HEXAGON_V6_vpopcounth_128B",
+                    "V6.vprefixqb" => "__builtin_HEXAGON_V6_vprefixqb",
+                    "V6.vprefixqb.128B" => "__builtin_HEXAGON_V6_vprefixqb_128B",
+                    "V6.vprefixqh" => "__builtin_HEXAGON_V6_vprefixqh",
+                    "V6.vprefixqh.128B" => "__builtin_HEXAGON_V6_vprefixqh_128B",
+                    "V6.vprefixqw" => "__builtin_HEXAGON_V6_vprefixqw",
+                    "V6.vprefixqw.128B" => "__builtin_HEXAGON_V6_vprefixqw_128B",
+                    "V6.vrdelta" => "__builtin_HEXAGON_V6_vrdelta",
+                    "V6.vrdelta.128B" => "__builtin_HEXAGON_V6_vrdelta_128B",
+                    "V6.vrmpybub.rtt" => "__builtin_HEXAGON_V6_vrmpybub_rtt",
+                    "V6.vrmpybub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_128B",
+                    "V6.vrmpybub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc",
+                    "V6.vrmpybub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B",
+                    "V6.vrmpybus" => "__builtin_HEXAGON_V6_vrmpybus",
+                    "V6.vrmpybus.128B" => "__builtin_HEXAGON_V6_vrmpybus_128B",
+                    "V6.vrmpybus.acc" => "__builtin_HEXAGON_V6_vrmpybus_acc",
+                    "V6.vrmpybus.acc.128B" => "__builtin_HEXAGON_V6_vrmpybus_acc_128B",
+                    "V6.vrmpybusi" => "__builtin_HEXAGON_V6_vrmpybusi",
+                    "V6.vrmpybusi.128B" => "__builtin_HEXAGON_V6_vrmpybusi_128B",
+                    "V6.vrmpybusi.acc" => "__builtin_HEXAGON_V6_vrmpybusi_acc",
+                    "V6.vrmpybusi.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusi_acc_128B",
+                    "V6.vrmpybusv" => "__builtin_HEXAGON_V6_vrmpybusv",
+                    "V6.vrmpybusv.128B" => "__builtin_HEXAGON_V6_vrmpybusv_128B",
+                    "V6.vrmpybusv.acc" => "__builtin_HEXAGON_V6_vrmpybusv_acc",
+                    "V6.vrmpybusv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybusv_acc_128B",
+                    "V6.vrmpybv" => "__builtin_HEXAGON_V6_vrmpybv",
+                    "V6.vrmpybv.128B" => "__builtin_HEXAGON_V6_vrmpybv_128B",
+                    "V6.vrmpybv.acc" => "__builtin_HEXAGON_V6_vrmpybv_acc",
+                    "V6.vrmpybv.acc.128B" => "__builtin_HEXAGON_V6_vrmpybv_acc_128B",
+                    "V6.vrmpyub" => "__builtin_HEXAGON_V6_vrmpyub",
+                    "V6.vrmpyub.128B" => "__builtin_HEXAGON_V6_vrmpyub_128B",
+                    "V6.vrmpyub.acc" => "__builtin_HEXAGON_V6_vrmpyub_acc",
+                    "V6.vrmpyub.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_acc_128B",
+                    "V6.vrmpyub.rtt" => "__builtin_HEXAGON_V6_vrmpyub_rtt",
+                    "V6.vrmpyub.rtt.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_128B",
+                    "V6.vrmpyub.rtt.acc" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc",
+                    "V6.vrmpyub.rtt.acc.128B" => "__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B",
+                    "V6.vrmpyubi" => "__builtin_HEXAGON_V6_vrmpyubi",
+                    "V6.vrmpyubi.128B" => "__builtin_HEXAGON_V6_vrmpyubi_128B",
+                    "V6.vrmpyubi.acc" => "__builtin_HEXAGON_V6_vrmpyubi_acc",
+                    "V6.vrmpyubi.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubi_acc_128B",
+                    "V6.vrmpyubv" => "__builtin_HEXAGON_V6_vrmpyubv",
+                    "V6.vrmpyubv.128B" => "__builtin_HEXAGON_V6_vrmpyubv_128B",
+                    "V6.vrmpyubv.acc" => "__builtin_HEXAGON_V6_vrmpyubv_acc",
+                    "V6.vrmpyubv.acc.128B" => "__builtin_HEXAGON_V6_vrmpyubv_acc_128B",
+                    "V6.vror" => "__builtin_HEXAGON_V6_vror",
+                    "V6.vror.128B" => "__builtin_HEXAGON_V6_vror_128B",
+                    "V6.vrotr" => "__builtin_HEXAGON_V6_vrotr",
+                    "V6.vrotr.128B" => "__builtin_HEXAGON_V6_vrotr_128B",
+                    "V6.vroundhb" => "__builtin_HEXAGON_V6_vroundhb",
+                    "V6.vroundhb.128B" => "__builtin_HEXAGON_V6_vroundhb_128B",
+                    "V6.vroundhub" => "__builtin_HEXAGON_V6_vroundhub",
+                    "V6.vroundhub.128B" => "__builtin_HEXAGON_V6_vroundhub_128B",
+                    "V6.vrounduhub" => "__builtin_HEXAGON_V6_vrounduhub",
+                    "V6.vrounduhub.128B" => "__builtin_HEXAGON_V6_vrounduhub_128B",
+                    "V6.vrounduwuh" => "__builtin_HEXAGON_V6_vrounduwuh",
+                    "V6.vrounduwuh.128B" => "__builtin_HEXAGON_V6_vrounduwuh_128B",
+                    "V6.vroundwh" => "__builtin_HEXAGON_V6_vroundwh",
+                    "V6.vroundwh.128B" => "__builtin_HEXAGON_V6_vroundwh_128B",
+                    "V6.vroundwuh" => "__builtin_HEXAGON_V6_vroundwuh",
+                    "V6.vroundwuh.128B" => "__builtin_HEXAGON_V6_vroundwuh_128B",
+                    "V6.vrsadubi" => "__builtin_HEXAGON_V6_vrsadubi",
+                    "V6.vrsadubi.128B" => "__builtin_HEXAGON_V6_vrsadubi_128B",
+                    "V6.vrsadubi.acc" => "__builtin_HEXAGON_V6_vrsadubi_acc",
+                    "V6.vrsadubi.acc.128B" => "__builtin_HEXAGON_V6_vrsadubi_acc_128B",
+                    "V6.vsatdw" => "__builtin_HEXAGON_V6_vsatdw",
+                    "V6.vsatdw.128B" => "__builtin_HEXAGON_V6_vsatdw_128B",
+                    "V6.vsathub" => "__builtin_HEXAGON_V6_vsathub",
+                    "V6.vsathub.128B" => "__builtin_HEXAGON_V6_vsathub_128B",
+                    "V6.vsatuwuh" => "__builtin_HEXAGON_V6_vsatuwuh",
+                    "V6.vsatuwuh.128B" => "__builtin_HEXAGON_V6_vsatuwuh_128B",
+                    "V6.vsatwh" => "__builtin_HEXAGON_V6_vsatwh",
+                    "V6.vsatwh.128B" => "__builtin_HEXAGON_V6_vsatwh_128B",
+                    "V6.vsb" => "__builtin_HEXAGON_V6_vsb",
+                    "V6.vsb.128B" => "__builtin_HEXAGON_V6_vsb_128B",
+                    "V6.vscattermh" => "__builtin_HEXAGON_V6_vscattermh",
+                    "V6.vscattermh.128B" => "__builtin_HEXAGON_V6_vscattermh_128B",
+                    "V6.vscattermh.add" => "__builtin_HEXAGON_V6_vscattermh_add",
+                    "V6.vscattermh.add.128B" => "__builtin_HEXAGON_V6_vscattermh_add_128B",
+                    "V6.vscattermhq" => "__builtin_HEXAGON_V6_vscattermhq",
+                    "V6.vscattermhq.128B" => "__builtin_HEXAGON_V6_vscattermhq_128B",
+                    "V6.vscattermhw" => "__builtin_HEXAGON_V6_vscattermhw",
+                    "V6.vscattermhw.128B" => "__builtin_HEXAGON_V6_vscattermhw_128B",
+                    "V6.vscattermhw.add" => "__builtin_HEXAGON_V6_vscattermhw_add",
+                    "V6.vscattermhw.add.128B" => "__builtin_HEXAGON_V6_vscattermhw_add_128B",
+                    "V6.vscattermhwq" => "__builtin_HEXAGON_V6_vscattermhwq",
+                    "V6.vscattermhwq.128B" => "__builtin_HEXAGON_V6_vscattermhwq_128B",
+                    "V6.vscattermw" => "__builtin_HEXAGON_V6_vscattermw",
+                    "V6.vscattermw.128B" => "__builtin_HEXAGON_V6_vscattermw_128B",
+                    "V6.vscattermw.add" => "__builtin_HEXAGON_V6_vscattermw_add",
+                    "V6.vscattermw.add.128B" => "__builtin_HEXAGON_V6_vscattermw_add_128B",
+                    "V6.vscattermwq" => "__builtin_HEXAGON_V6_vscattermwq",
+                    "V6.vscattermwq.128B" => "__builtin_HEXAGON_V6_vscattermwq_128B",
+                    "V6.vsh" => "__builtin_HEXAGON_V6_vsh",
+                    "V6.vsh.128B" => "__builtin_HEXAGON_V6_vsh_128B",
+                    "V6.vshufeh" => "__builtin_HEXAGON_V6_vshufeh",
+                    "V6.vshufeh.128B" => "__builtin_HEXAGON_V6_vshufeh_128B",
+                    "V6.vshuffb" => "__builtin_HEXAGON_V6_vshuffb",
+                    "V6.vshuffb.128B" => "__builtin_HEXAGON_V6_vshuffb_128B",
+                    "V6.vshuffeb" => "__builtin_HEXAGON_V6_vshuffeb",
+                    "V6.vshuffeb.128B" => "__builtin_HEXAGON_V6_vshuffeb_128B",
+                    "V6.vshuffh" => "__builtin_HEXAGON_V6_vshuffh",
+                    "V6.vshuffh.128B" => "__builtin_HEXAGON_V6_vshuffh_128B",
+                    "V6.vshuffob" => "__builtin_HEXAGON_V6_vshuffob",
+                    "V6.vshuffob.128B" => "__builtin_HEXAGON_V6_vshuffob_128B",
+                    "V6.vshuffvdd" => "__builtin_HEXAGON_V6_vshuffvdd",
+                    "V6.vshuffvdd.128B" => "__builtin_HEXAGON_V6_vshuffvdd_128B",
+                    "V6.vshufoeb" => "__builtin_HEXAGON_V6_vshufoeb",
+                    "V6.vshufoeb.128B" => "__builtin_HEXAGON_V6_vshufoeb_128B",
+                    "V6.vshufoeh" => "__builtin_HEXAGON_V6_vshufoeh",
+                    "V6.vshufoeh.128B" => "__builtin_HEXAGON_V6_vshufoeh_128B",
+                    "V6.vshufoh" => "__builtin_HEXAGON_V6_vshufoh",
+                    "V6.vshufoh.128B" => "__builtin_HEXAGON_V6_vshufoh_128B",
+                    "V6.vsub.hf" => "__builtin_HEXAGON_V6_vsub_hf",
+                    "V6.vsub.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_128B",
+                    "V6.vsub.hf.f8" => "__builtin_HEXAGON_V6_vsub_hf_f8",
+                    "V6.vsub.hf.f8.128B" => "__builtin_HEXAGON_V6_vsub_hf_f8_128B",
+                    "V6.vsub.hf.hf" => "__builtin_HEXAGON_V6_vsub_hf_hf",
+                    "V6.vsub.hf.hf.128B" => "__builtin_HEXAGON_V6_vsub_hf_hf_128B",
+                    "V6.vsub.qf16" => "__builtin_HEXAGON_V6_vsub_qf16",
+                    "V6.vsub.qf16.128B" => "__builtin_HEXAGON_V6_vsub_qf16_128B",
+                    "V6.vsub.qf16.mix" => "__builtin_HEXAGON_V6_vsub_qf16_mix",
+                    "V6.vsub.qf16.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf16_mix_128B",
+                    "V6.vsub.qf32" => "__builtin_HEXAGON_V6_vsub_qf32",
+                    "V6.vsub.qf32.128B" => "__builtin_HEXAGON_V6_vsub_qf32_128B",
+                    "V6.vsub.qf32.mix" => "__builtin_HEXAGON_V6_vsub_qf32_mix",
+                    "V6.vsub.qf32.mix.128B" => "__builtin_HEXAGON_V6_vsub_qf32_mix_128B",
+                    "V6.vsub.sf" => "__builtin_HEXAGON_V6_vsub_sf",
+                    "V6.vsub.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_128B",
+                    "V6.vsub.sf.bf" => "__builtin_HEXAGON_V6_vsub_sf_bf",
+                    "V6.vsub.sf.bf.128B" => "__builtin_HEXAGON_V6_vsub_sf_bf_128B",
+                    "V6.vsub.sf.hf" => "__builtin_HEXAGON_V6_vsub_sf_hf",
+                    "V6.vsub.sf.hf.128B" => "__builtin_HEXAGON_V6_vsub_sf_hf_128B",
+                    "V6.vsub.sf.sf" => "__builtin_HEXAGON_V6_vsub_sf_sf",
+                    "V6.vsub.sf.sf.128B" => "__builtin_HEXAGON_V6_vsub_sf_sf_128B",
+                    "V6.vsubb" => "__builtin_HEXAGON_V6_vsubb",
+                    "V6.vsubb.128B" => "__builtin_HEXAGON_V6_vsubb_128B",
+                    "V6.vsubb.dv" => "__builtin_HEXAGON_V6_vsubb_dv",
+                    "V6.vsubb.dv.128B" => "__builtin_HEXAGON_V6_vsubb_dv_128B",
+                    "V6.vsubbnq" => "__builtin_HEXAGON_V6_vsubbnq",
+                    "V6.vsubbnq.128B" => "__builtin_HEXAGON_V6_vsubbnq_128B",
+                    "V6.vsubbq" => "__builtin_HEXAGON_V6_vsubbq",
+                    "V6.vsubbq.128B" => "__builtin_HEXAGON_V6_vsubbq_128B",
+                    "V6.vsubbsat" => "__builtin_HEXAGON_V6_vsubbsat",
+                    "V6.vsubbsat.128B" => "__builtin_HEXAGON_V6_vsubbsat_128B",
+                    "V6.vsubbsat.dv" => "__builtin_HEXAGON_V6_vsubbsat_dv",
+                    "V6.vsubbsat.dv.128B" => "__builtin_HEXAGON_V6_vsubbsat_dv_128B",
+                    "V6.vsubh" => "__builtin_HEXAGON_V6_vsubh",
+                    "V6.vsubh.128B" => "__builtin_HEXAGON_V6_vsubh_128B",
+                    "V6.vsubh.dv" => "__builtin_HEXAGON_V6_vsubh_dv",
+                    "V6.vsubh.dv.128B" => "__builtin_HEXAGON_V6_vsubh_dv_128B",
+                    "V6.vsubhnq" => "__builtin_HEXAGON_V6_vsubhnq",
+                    "V6.vsubhnq.128B" => "__builtin_HEXAGON_V6_vsubhnq_128B",
+                    "V6.vsubhq" => "__builtin_HEXAGON_V6_vsubhq",
+                    "V6.vsubhq.128B" => "__builtin_HEXAGON_V6_vsubhq_128B",
+                    "V6.vsubhsat" => "__builtin_HEXAGON_V6_vsubhsat",
+                    "V6.vsubhsat.128B" => "__builtin_HEXAGON_V6_vsubhsat_128B",
+                    "V6.vsubhsat.dv" => "__builtin_HEXAGON_V6_vsubhsat_dv",
+                    "V6.vsubhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubhsat_dv_128B",
+                    "V6.vsubhw" => "__builtin_HEXAGON_V6_vsubhw",
+                    "V6.vsubhw.128B" => "__builtin_HEXAGON_V6_vsubhw_128B",
+                    "V6.vsububh" => "__builtin_HEXAGON_V6_vsububh",
+                    "V6.vsububh.128B" => "__builtin_HEXAGON_V6_vsububh_128B",
+                    "V6.vsububsat" => "__builtin_HEXAGON_V6_vsububsat",
+                    "V6.vsububsat.128B" => "__builtin_HEXAGON_V6_vsububsat_128B",
+                    "V6.vsububsat.dv" => "__builtin_HEXAGON_V6_vsububsat_dv",
+                    "V6.vsububsat.dv.128B" => "__builtin_HEXAGON_V6_vsububsat_dv_128B",
+                    "V6.vsubububb.sat" => "__builtin_HEXAGON_V6_vsubububb_sat",
+                    "V6.vsubububb.sat.128B" => "__builtin_HEXAGON_V6_vsubububb_sat_128B",
+                    "V6.vsubuhsat" => "__builtin_HEXAGON_V6_vsubuhsat",
+                    "V6.vsubuhsat.128B" => "__builtin_HEXAGON_V6_vsubuhsat_128B",
+                    "V6.vsubuhsat.dv" => "__builtin_HEXAGON_V6_vsubuhsat_dv",
+                    "V6.vsubuhsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuhsat_dv_128B",
+                    "V6.vsubuhw" => "__builtin_HEXAGON_V6_vsubuhw",
+                    "V6.vsubuhw.128B" => "__builtin_HEXAGON_V6_vsubuhw_128B",
+                    "V6.vsubuwsat" => "__builtin_HEXAGON_V6_vsubuwsat",
+                    "V6.vsubuwsat.128B" => "__builtin_HEXAGON_V6_vsubuwsat_128B",
+                    "V6.vsubuwsat.dv" => "__builtin_HEXAGON_V6_vsubuwsat_dv",
+                    "V6.vsubuwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubuwsat_dv_128B",
+                    "V6.vsubw" => "__builtin_HEXAGON_V6_vsubw",
+                    "V6.vsubw.128B" => "__builtin_HEXAGON_V6_vsubw_128B",
+                    "V6.vsubw.dv" => "__builtin_HEXAGON_V6_vsubw_dv",
+                    "V6.vsubw.dv.128B" => "__builtin_HEXAGON_V6_vsubw_dv_128B",
+                    "V6.vsubwnq" => "__builtin_HEXAGON_V6_vsubwnq",
+                    "V6.vsubwnq.128B" => "__builtin_HEXAGON_V6_vsubwnq_128B",
+                    "V6.vsubwq" => "__builtin_HEXAGON_V6_vsubwq",
+                    "V6.vsubwq.128B" => "__builtin_HEXAGON_V6_vsubwq_128B",
+                    "V6.vsubwsat" => "__builtin_HEXAGON_V6_vsubwsat",
+                    "V6.vsubwsat.128B" => "__builtin_HEXAGON_V6_vsubwsat_128B",
+                    "V6.vsubwsat.dv" => "__builtin_HEXAGON_V6_vsubwsat_dv",
+                    "V6.vsubwsat.dv.128B" => "__builtin_HEXAGON_V6_vsubwsat_dv_128B",
+                    "V6.vswap" => "__builtin_HEXAGON_V6_vswap",
+                    "V6.vswap.128B" => "__builtin_HEXAGON_V6_vswap_128B",
+                    "V6.vtmpyb" => "__builtin_HEXAGON_V6_vtmpyb",
+                    "V6.vtmpyb.128B" => "__builtin_HEXAGON_V6_vtmpyb_128B",
+                    "V6.vtmpyb.acc" => "__builtin_HEXAGON_V6_vtmpyb_acc",
+                    "V6.vtmpyb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyb_acc_128B",
+                    "V6.vtmpybus" => "__builtin_HEXAGON_V6_vtmpybus",
+                    "V6.vtmpybus.128B" => "__builtin_HEXAGON_V6_vtmpybus_128B",
+                    "V6.vtmpybus.acc" => "__builtin_HEXAGON_V6_vtmpybus_acc",
+                    "V6.vtmpybus.acc.128B" => "__builtin_HEXAGON_V6_vtmpybus_acc_128B",
+                    "V6.vtmpyhb" => "__builtin_HEXAGON_V6_vtmpyhb",
+                    "V6.vtmpyhb.128B" => "__builtin_HEXAGON_V6_vtmpyhb_128B",
+                    "V6.vtmpyhb.acc" => "__builtin_HEXAGON_V6_vtmpyhb_acc",
+                    "V6.vtmpyhb.acc.128B" => "__builtin_HEXAGON_V6_vtmpyhb_acc_128B",
+                    "V6.vunpackb" => "__builtin_HEXAGON_V6_vunpackb",
+                    "V6.vunpackb.128B" => "__builtin_HEXAGON_V6_vunpackb_128B",
+                    "V6.vunpackh" => "__builtin_HEXAGON_V6_vunpackh",
+                    "V6.vunpackh.128B" => "__builtin_HEXAGON_V6_vunpackh_128B",
+                    "V6.vunpackob" => "__builtin_HEXAGON_V6_vunpackob",
+                    "V6.vunpackob.128B" => "__builtin_HEXAGON_V6_vunpackob_128B",
+                    "V6.vunpackoh" => "__builtin_HEXAGON_V6_vunpackoh",
+                    "V6.vunpackoh.128B" => "__builtin_HEXAGON_V6_vunpackoh_128B",
+                    "V6.vunpackub" => "__builtin_HEXAGON_V6_vunpackub",
+                    "V6.vunpackub.128B" => "__builtin_HEXAGON_V6_vunpackub_128B",
+                    "V6.vunpackuh" => "__builtin_HEXAGON_V6_vunpackuh",
+                    "V6.vunpackuh.128B" => "__builtin_HEXAGON_V6_vunpackuh_128B",
+                    "V6.vxor" => "__builtin_HEXAGON_V6_vxor",
+                    "V6.vxor.128B" => "__builtin_HEXAGON_V6_vxor_128B",
+                    "V6.vzb" => "__builtin_HEXAGON_V6_vzb",
+                    "V6.vzb.128B" => "__builtin_HEXAGON_V6_vzb_128B",
+                    "V6.vzh" => "__builtin_HEXAGON_V6_vzh",
+                    "V6.vzh.128B" => "__builtin_HEXAGON_V6_vzh_128B",
+                    "Y2.dccleana" => "__builtin_HEXAGON_Y2_dccleana",
+                    "Y2.dccleaninva" => "__builtin_HEXAGON_Y2_dccleaninva",
+                    "Y2.dcfetch" => "__builtin_HEXAGON_Y2_dcfetch",
+                    "Y2.dcinva" => "__builtin_HEXAGON_Y2_dcinva",
+                    "Y2.dczeroa" => "__builtin_HEXAGON_Y2_dczeroa",
+                    "Y4.l2fetch" => "__builtin_HEXAGON_Y4_l2fetch",
+                    "Y5.l2fetch" => "__builtin_HEXAGON_Y5_l2fetch",
+                    "Y6.dmlink" => "__builtin_HEXAGON_Y6_dmlink",
+                    "Y6.dmpause" => "__builtin_HEXAGON_Y6_dmpause",
+                    "Y6.dmpoll" => "__builtin_HEXAGON_Y6_dmpoll",
+                    "Y6.dmresume" => "__builtin_HEXAGON_Y6_dmresume",
+                    "Y6.dmstart" => "__builtin_HEXAGON_Y6_dmstart",
+                    "Y6.dmwait" => "__builtin_HEXAGON_Y6_dmwait",
+                    "brev.ldb" => "__builtin_brev_ldb",
+                    "brev.ldd" => "__builtin_brev_ldd",
+                    "brev.ldh" => "__builtin_brev_ldh",
+                    "brev.ldub" => "__builtin_brev_ldub",
+                    "brev.lduh" => "__builtin_brev_lduh",
+                    "brev.ldw" => "__builtin_brev_ldw",
+                    "brev.stb" => "__builtin_brev_stb",
+                    "brev.std" => "__builtin_brev_std",
+                    "brev.sth" => "__builtin_brev_sth",
+                    "brev.sthhi" => "__builtin_brev_sthhi",
+                    "brev.stw" => "__builtin_brev_stw",
+                    "circ.ldb" => "__builtin_circ_ldb",
+                    "circ.ldd" => "__builtin_circ_ldd",
+                    "circ.ldh" => "__builtin_circ_ldh",
+                    "circ.ldub" => "__builtin_circ_ldub",
+                    "circ.lduh" => "__builtin_circ_lduh",
+                    "circ.ldw" => "__builtin_circ_ldw",
+                    "circ.stb" => "__builtin_circ_stb",
+                    "circ.std" => "__builtin_circ_std",
+                    "circ.sth" => "__builtin_circ_sth",
+                    "circ.sthhi" => "__builtin_circ_sthhi",
+                    "circ.stw" => "__builtin_circ_stw",
+                    "mm256i.vaddw" => "__builtin__mm256i_vaddw",
+                    "prefetch" => "__builtin_HEXAGON_prefetch",
+                    "vmemcpy" => "__builtin_hexagon_vmemcpy",
+                    "vmemset" => "__builtin_hexagon_vmemset",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            hexagon(name)
+        }
+        "loongarch" => {
+            #[allow(non_snake_case)]
+            fn loongarch(name: &str) -> &str {
+                match name {
+                    // loongarch
+                    "asrtgt.d" => "__builtin_loongarch_asrtgt_d",
+                    "asrtle.d" => "__builtin_loongarch_asrtle_d",
+                    "break" => "__builtin_loongarch_break",
+                    "cacop.d" => "__builtin_loongarch_cacop_d",
+                    "cacop.w" => "__builtin_loongarch_cacop_w",
+                    "cpucfg" => "__builtin_loongarch_cpucfg",
+                    "crc.w.b.w" => "__builtin_loongarch_crc_w_b_w",
+                    "crc.w.d.w" => "__builtin_loongarch_crc_w_d_w",
+                    "crc.w.h.w" => "__builtin_loongarch_crc_w_h_w",
+                    "crc.w.w.w" => "__builtin_loongarch_crc_w_w_w",
+                    "crcc.w.b.w" => "__builtin_loongarch_crcc_w_b_w",
+                    "crcc.w.d.w" => "__builtin_loongarch_crcc_w_d_w",
+                    "crcc.w.h.w" => "__builtin_loongarch_crcc_w_h_w",
+                    "crcc.w.w.w" => "__builtin_loongarch_crcc_w_w_w",
+                    "csrrd.d" => "__builtin_loongarch_csrrd_d",
+                    "csrrd.w" => "__builtin_loongarch_csrrd_w",
+                    "csrwr.d" => "__builtin_loongarch_csrwr_d",
+                    "csrwr.w" => "__builtin_loongarch_csrwr_w",
+                    "csrxchg.d" => "__builtin_loongarch_csrxchg_d",
+                    "csrxchg.w" => "__builtin_loongarch_csrxchg_w",
+                    "dbar" => "__builtin_loongarch_dbar",
+                    "frecipe.d" => "__builtin_loongarch_frecipe_d",
+                    "frecipe.s" => "__builtin_loongarch_frecipe_s",
+                    "frsqrte.d" => "__builtin_loongarch_frsqrte_d",
+                    "frsqrte.s" => "__builtin_loongarch_frsqrte_s",
+                    "ibar" => "__builtin_loongarch_ibar",
+                    "iocsrrd.b" => "__builtin_loongarch_iocsrrd_b",
+                    "iocsrrd.d" => "__builtin_loongarch_iocsrrd_d",
+                    "iocsrrd.h" => "__builtin_loongarch_iocsrrd_h",
+                    "iocsrrd.w" => "__builtin_loongarch_iocsrrd_w",
+                    "iocsrwr.b" => "__builtin_loongarch_iocsrwr_b",
+                    "iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
+                    "iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
+                    "iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
+                    "lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b",
+                    "lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h",
+                    "lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w",
+                    "lasx.vext2xv.du.bu" => "__builtin_lasx_vext2xv_du_bu",
+                    "lasx.vext2xv.du.hu" => "__builtin_lasx_vext2xv_du_hu",
+                    "lasx.vext2xv.du.wu" => "__builtin_lasx_vext2xv_du_wu",
+                    "lasx.vext2xv.h.b" => "__builtin_lasx_vext2xv_h_b",
+                    "lasx.vext2xv.hu.bu" => "__builtin_lasx_vext2xv_hu_bu",
+                    "lasx.vext2xv.w.b" => "__builtin_lasx_vext2xv_w_b",
+                    "lasx.vext2xv.w.h" => "__builtin_lasx_vext2xv_w_h",
+                    "lasx.vext2xv.wu.bu" => "__builtin_lasx_vext2xv_wu_bu",
+                    "lasx.vext2xv.wu.hu" => "__builtin_lasx_vext2xv_wu_hu",
+                    "lasx.xbnz.b" => "__builtin_lasx_xbnz_b",
+                    "lasx.xbnz.d" => "__builtin_lasx_xbnz_d",
+                    "lasx.xbnz.h" => "__builtin_lasx_xbnz_h",
+                    "lasx.xbnz.v" => "__builtin_lasx_xbnz_v",
+                    "lasx.xbnz.w" => "__builtin_lasx_xbnz_w",
+                    "lasx.xbz.b" => "__builtin_lasx_xbz_b",
+                    "lasx.xbz.d" => "__builtin_lasx_xbz_d",
+                    "lasx.xbz.h" => "__builtin_lasx_xbz_h",
+                    "lasx.xbz.v" => "__builtin_lasx_xbz_v",
+                    "lasx.xbz.w" => "__builtin_lasx_xbz_w",
+                    "lasx.xvabsd.b" => "__builtin_lasx_xvabsd_b",
+                    "lasx.xvabsd.bu" => "__builtin_lasx_xvabsd_bu",
+                    "lasx.xvabsd.d" => "__builtin_lasx_xvabsd_d",
+                    "lasx.xvabsd.du" => "__builtin_lasx_xvabsd_du",
+                    "lasx.xvabsd.h" => "__builtin_lasx_xvabsd_h",
+                    "lasx.xvabsd.hu" => "__builtin_lasx_xvabsd_hu",
+                    "lasx.xvabsd.w" => "__builtin_lasx_xvabsd_w",
+                    "lasx.xvabsd.wu" => "__builtin_lasx_xvabsd_wu",
+                    "lasx.xvadd.b" => "__builtin_lasx_xvadd_b",
+                    "lasx.xvadd.d" => "__builtin_lasx_xvadd_d",
+                    "lasx.xvadd.h" => "__builtin_lasx_xvadd_h",
+                    "lasx.xvadd.q" => "__builtin_lasx_xvadd_q",
+                    "lasx.xvadd.w" => "__builtin_lasx_xvadd_w",
+                    "lasx.xvadda.b" => "__builtin_lasx_xvadda_b",
+                    "lasx.xvadda.d" => "__builtin_lasx_xvadda_d",
+                    "lasx.xvadda.h" => "__builtin_lasx_xvadda_h",
+                    "lasx.xvadda.w" => "__builtin_lasx_xvadda_w",
+                    "lasx.xvaddi.bu" => "__builtin_lasx_xvaddi_bu",
+                    "lasx.xvaddi.du" => "__builtin_lasx_xvaddi_du",
+                    "lasx.xvaddi.hu" => "__builtin_lasx_xvaddi_hu",
+                    "lasx.xvaddi.wu" => "__builtin_lasx_xvaddi_wu",
+                    "lasx.xvaddwev.d.w" => "__builtin_lasx_xvaddwev_d_w",
+                    "lasx.xvaddwev.d.wu" => "__builtin_lasx_xvaddwev_d_wu",
+                    "lasx.xvaddwev.d.wu.w" => "__builtin_lasx_xvaddwev_d_wu_w",
+                    "lasx.xvaddwev.h.b" => "__builtin_lasx_xvaddwev_h_b",
+                    "lasx.xvaddwev.h.bu" => "__builtin_lasx_xvaddwev_h_bu",
+                    "lasx.xvaddwev.h.bu.b" => "__builtin_lasx_xvaddwev_h_bu_b",
+                    "lasx.xvaddwev.q.d" => "__builtin_lasx_xvaddwev_q_d",
+                    "lasx.xvaddwev.q.du" => "__builtin_lasx_xvaddwev_q_du",
+                    "lasx.xvaddwev.q.du.d" => "__builtin_lasx_xvaddwev_q_du_d",
+                    "lasx.xvaddwev.w.h" => "__builtin_lasx_xvaddwev_w_h",
+                    "lasx.xvaddwev.w.hu" => "__builtin_lasx_xvaddwev_w_hu",
+                    "lasx.xvaddwev.w.hu.h" => "__builtin_lasx_xvaddwev_w_hu_h",
+                    "lasx.xvaddwod.d.w" => "__builtin_lasx_xvaddwod_d_w",
+                    "lasx.xvaddwod.d.wu" => "__builtin_lasx_xvaddwod_d_wu",
+                    "lasx.xvaddwod.d.wu.w" => "__builtin_lasx_xvaddwod_d_wu_w",
+                    "lasx.xvaddwod.h.b" => "__builtin_lasx_xvaddwod_h_b",
+                    "lasx.xvaddwod.h.bu" => "__builtin_lasx_xvaddwod_h_bu",
+                    "lasx.xvaddwod.h.bu.b" => "__builtin_lasx_xvaddwod_h_bu_b",
+                    "lasx.xvaddwod.q.d" => "__builtin_lasx_xvaddwod_q_d",
+                    "lasx.xvaddwod.q.du" => "__builtin_lasx_xvaddwod_q_du",
+                    "lasx.xvaddwod.q.du.d" => "__builtin_lasx_xvaddwod_q_du_d",
+                    "lasx.xvaddwod.w.h" => "__builtin_lasx_xvaddwod_w_h",
+                    "lasx.xvaddwod.w.hu" => "__builtin_lasx_xvaddwod_w_hu",
+                    "lasx.xvaddwod.w.hu.h" => "__builtin_lasx_xvaddwod_w_hu_h",
+                    "lasx.xvand.v" => "__builtin_lasx_xvand_v",
+                    "lasx.xvandi.b" => "__builtin_lasx_xvandi_b",
+                    "lasx.xvandn.v" => "__builtin_lasx_xvandn_v",
+                    "lasx.xvavg.b" => "__builtin_lasx_xvavg_b",
+                    "lasx.xvavg.bu" => "__builtin_lasx_xvavg_bu",
+                    "lasx.xvavg.d" => "__builtin_lasx_xvavg_d",
+                    "lasx.xvavg.du" => "__builtin_lasx_xvavg_du",
+                    "lasx.xvavg.h" => "__builtin_lasx_xvavg_h",
+                    "lasx.xvavg.hu" => "__builtin_lasx_xvavg_hu",
+                    "lasx.xvavg.w" => "__builtin_lasx_xvavg_w",
+                    "lasx.xvavg.wu" => "__builtin_lasx_xvavg_wu",
+                    "lasx.xvavgr.b" => "__builtin_lasx_xvavgr_b",
+                    "lasx.xvavgr.bu" => "__builtin_lasx_xvavgr_bu",
+                    "lasx.xvavgr.d" => "__builtin_lasx_xvavgr_d",
+                    "lasx.xvavgr.du" => "__builtin_lasx_xvavgr_du",
+                    "lasx.xvavgr.h" => "__builtin_lasx_xvavgr_h",
+                    "lasx.xvavgr.hu" => "__builtin_lasx_xvavgr_hu",
+                    "lasx.xvavgr.w" => "__builtin_lasx_xvavgr_w",
+                    "lasx.xvavgr.wu" => "__builtin_lasx_xvavgr_wu",
+                    "lasx.xvbitclr.b" => "__builtin_lasx_xvbitclr_b",
+                    "lasx.xvbitclr.d" => "__builtin_lasx_xvbitclr_d",
+                    "lasx.xvbitclr.h" => "__builtin_lasx_xvbitclr_h",
+                    "lasx.xvbitclr.w" => "__builtin_lasx_xvbitclr_w",
+                    "lasx.xvbitclri.b" => "__builtin_lasx_xvbitclri_b",
+                    "lasx.xvbitclri.d" => "__builtin_lasx_xvbitclri_d",
+                    "lasx.xvbitclri.h" => "__builtin_lasx_xvbitclri_h",
+                    "lasx.xvbitclri.w" => "__builtin_lasx_xvbitclri_w",
+                    "lasx.xvbitrev.b" => "__builtin_lasx_xvbitrev_b",
+                    "lasx.xvbitrev.d" => "__builtin_lasx_xvbitrev_d",
+                    "lasx.xvbitrev.h" => "__builtin_lasx_xvbitrev_h",
+                    "lasx.xvbitrev.w" => "__builtin_lasx_xvbitrev_w",
+                    "lasx.xvbitrevi.b" => "__builtin_lasx_xvbitrevi_b",
+                    "lasx.xvbitrevi.d" => "__builtin_lasx_xvbitrevi_d",
+                    "lasx.xvbitrevi.h" => "__builtin_lasx_xvbitrevi_h",
+                    "lasx.xvbitrevi.w" => "__builtin_lasx_xvbitrevi_w",
+                    "lasx.xvbitsel.v" => "__builtin_lasx_xvbitsel_v",
+                    "lasx.xvbitseli.b" => "__builtin_lasx_xvbitseli_b",
+                    "lasx.xvbitset.b" => "__builtin_lasx_xvbitset_b",
+                    "lasx.xvbitset.d" => "__builtin_lasx_xvbitset_d",
+                    "lasx.xvbitset.h" => "__builtin_lasx_xvbitset_h",
+                    "lasx.xvbitset.w" => "__builtin_lasx_xvbitset_w",
+                    "lasx.xvbitseti.b" => "__builtin_lasx_xvbitseti_b",
+                    "lasx.xvbitseti.d" => "__builtin_lasx_xvbitseti_d",
+                    "lasx.xvbitseti.h" => "__builtin_lasx_xvbitseti_h",
+                    "lasx.xvbitseti.w" => "__builtin_lasx_xvbitseti_w",
+                    "lasx.xvbsll.v" => "__builtin_lasx_xvbsll_v",
+                    "lasx.xvbsrl.v" => "__builtin_lasx_xvbsrl_v",
+                    "lasx.xvclo.b" => "__builtin_lasx_xvclo_b",
+                    "lasx.xvclo.d" => "__builtin_lasx_xvclo_d",
+                    "lasx.xvclo.h" => "__builtin_lasx_xvclo_h",
+                    "lasx.xvclo.w" => "__builtin_lasx_xvclo_w",
+                    "lasx.xvclz.b" => "__builtin_lasx_xvclz_b",
+                    "lasx.xvclz.d" => "__builtin_lasx_xvclz_d",
+                    "lasx.xvclz.h" => "__builtin_lasx_xvclz_h",
+                    "lasx.xvclz.w" => "__builtin_lasx_xvclz_w",
+                    "lasx.xvdiv.b" => "__builtin_lasx_xvdiv_b",
+                    "lasx.xvdiv.bu" => "__builtin_lasx_xvdiv_bu",
+                    "lasx.xvdiv.d" => "__builtin_lasx_xvdiv_d",
+                    "lasx.xvdiv.du" => "__builtin_lasx_xvdiv_du",
+                    "lasx.xvdiv.h" => "__builtin_lasx_xvdiv_h",
+                    "lasx.xvdiv.hu" => "__builtin_lasx_xvdiv_hu",
+                    "lasx.xvdiv.w" => "__builtin_lasx_xvdiv_w",
+                    "lasx.xvdiv.wu" => "__builtin_lasx_xvdiv_wu",
+                    "lasx.xvexth.d.w" => "__builtin_lasx_xvexth_d_w",
+                    "lasx.xvexth.du.wu" => "__builtin_lasx_xvexth_du_wu",
+                    "lasx.xvexth.h.b" => "__builtin_lasx_xvexth_h_b",
+                    "lasx.xvexth.hu.bu" => "__builtin_lasx_xvexth_hu_bu",
+                    "lasx.xvexth.q.d" => "__builtin_lasx_xvexth_q_d",
+                    "lasx.xvexth.qu.du" => "__builtin_lasx_xvexth_qu_du",
+                    "lasx.xvexth.w.h" => "__builtin_lasx_xvexth_w_h",
+                    "lasx.xvexth.wu.hu" => "__builtin_lasx_xvexth_wu_hu",
+                    "lasx.xvextl.q.d" => "__builtin_lasx_xvextl_q_d",
+                    "lasx.xvextl.qu.du" => "__builtin_lasx_xvextl_qu_du",
+                    "lasx.xvextrins.b" => "__builtin_lasx_xvextrins_b",
+                    "lasx.xvextrins.d" => "__builtin_lasx_xvextrins_d",
+                    "lasx.xvextrins.h" => "__builtin_lasx_xvextrins_h",
+                    "lasx.xvextrins.w" => "__builtin_lasx_xvextrins_w",
+                    "lasx.xvfadd.d" => "__builtin_lasx_xvfadd_d",
+                    "lasx.xvfadd.s" => "__builtin_lasx_xvfadd_s",
+                    "lasx.xvfclass.d" => "__builtin_lasx_xvfclass_d",
+                    "lasx.xvfclass.s" => "__builtin_lasx_xvfclass_s",
+                    "lasx.xvfcmp.caf.d" => "__builtin_lasx_xvfcmp_caf_d",
+                    "lasx.xvfcmp.caf.s" => "__builtin_lasx_xvfcmp_caf_s",
+                    "lasx.xvfcmp.ceq.d" => "__builtin_lasx_xvfcmp_ceq_d",
+                    "lasx.xvfcmp.ceq.s" => "__builtin_lasx_xvfcmp_ceq_s",
+                    "lasx.xvfcmp.cle.d" => "__builtin_lasx_xvfcmp_cle_d",
+                    "lasx.xvfcmp.cle.s" => "__builtin_lasx_xvfcmp_cle_s",
+                    "lasx.xvfcmp.clt.d" => "__builtin_lasx_xvfcmp_clt_d",
+                    "lasx.xvfcmp.clt.s" => "__builtin_lasx_xvfcmp_clt_s",
+                    "lasx.xvfcmp.cne.d" => "__builtin_lasx_xvfcmp_cne_d",
+                    "lasx.xvfcmp.cne.s" => "__builtin_lasx_xvfcmp_cne_s",
+                    "lasx.xvfcmp.cor.d" => "__builtin_lasx_xvfcmp_cor_d",
+                    "lasx.xvfcmp.cor.s" => "__builtin_lasx_xvfcmp_cor_s",
+                    "lasx.xvfcmp.cueq.d" => "__builtin_lasx_xvfcmp_cueq_d",
+                    "lasx.xvfcmp.cueq.s" => "__builtin_lasx_xvfcmp_cueq_s",
+                    "lasx.xvfcmp.cule.d" => "__builtin_lasx_xvfcmp_cule_d",
+                    "lasx.xvfcmp.cule.s" => "__builtin_lasx_xvfcmp_cule_s",
+                    "lasx.xvfcmp.cult.d" => "__builtin_lasx_xvfcmp_cult_d",
+                    "lasx.xvfcmp.cult.s" => "__builtin_lasx_xvfcmp_cult_s",
+                    "lasx.xvfcmp.cun.d" => "__builtin_lasx_xvfcmp_cun_d",
+                    "lasx.xvfcmp.cun.s" => "__builtin_lasx_xvfcmp_cun_s",
+                    "lasx.xvfcmp.cune.d" => "__builtin_lasx_xvfcmp_cune_d",
+                    "lasx.xvfcmp.cune.s" => "__builtin_lasx_xvfcmp_cune_s",
+                    "lasx.xvfcmp.saf.d" => "__builtin_lasx_xvfcmp_saf_d",
+                    "lasx.xvfcmp.saf.s" => "__builtin_lasx_xvfcmp_saf_s",
+                    "lasx.xvfcmp.seq.d" => "__builtin_lasx_xvfcmp_seq_d",
+                    "lasx.xvfcmp.seq.s" => "__builtin_lasx_xvfcmp_seq_s",
+                    "lasx.xvfcmp.sle.d" => "__builtin_lasx_xvfcmp_sle_d",
+                    "lasx.xvfcmp.sle.s" => "__builtin_lasx_xvfcmp_sle_s",
+                    "lasx.xvfcmp.slt.d" => "__builtin_lasx_xvfcmp_slt_d",
+                    "lasx.xvfcmp.slt.s" => "__builtin_lasx_xvfcmp_slt_s",
+                    "lasx.xvfcmp.sne.d" => "__builtin_lasx_xvfcmp_sne_d",
+                    "lasx.xvfcmp.sne.s" => "__builtin_lasx_xvfcmp_sne_s",
+                    "lasx.xvfcmp.sor.d" => "__builtin_lasx_xvfcmp_sor_d",
+                    "lasx.xvfcmp.sor.s" => "__builtin_lasx_xvfcmp_sor_s",
+                    "lasx.xvfcmp.sueq.d" => "__builtin_lasx_xvfcmp_sueq_d",
+                    "lasx.xvfcmp.sueq.s" => "__builtin_lasx_xvfcmp_sueq_s",
+                    "lasx.xvfcmp.sule.d" => "__builtin_lasx_xvfcmp_sule_d",
+                    "lasx.xvfcmp.sule.s" => "__builtin_lasx_xvfcmp_sule_s",
+                    "lasx.xvfcmp.sult.d" => "__builtin_lasx_xvfcmp_sult_d",
+                    "lasx.xvfcmp.sult.s" => "__builtin_lasx_xvfcmp_sult_s",
+                    "lasx.xvfcmp.sun.d" => "__builtin_lasx_xvfcmp_sun_d",
+                    "lasx.xvfcmp.sun.s" => "__builtin_lasx_xvfcmp_sun_s",
+                    "lasx.xvfcmp.sune.d" => "__builtin_lasx_xvfcmp_sune_d",
+                    "lasx.xvfcmp.sune.s" => "__builtin_lasx_xvfcmp_sune_s",
+                    "lasx.xvfcvt.h.s" => "__builtin_lasx_xvfcvt_h_s",
+                    "lasx.xvfcvt.s.d" => "__builtin_lasx_xvfcvt_s_d",
+                    "lasx.xvfcvth.d.s" => "__builtin_lasx_xvfcvth_d_s",
+                    "lasx.xvfcvth.s.h" => "__builtin_lasx_xvfcvth_s_h",
+                    "lasx.xvfcvtl.d.s" => "__builtin_lasx_xvfcvtl_d_s",
+                    "lasx.xvfcvtl.s.h" => "__builtin_lasx_xvfcvtl_s_h",
+                    "lasx.xvfdiv.d" => "__builtin_lasx_xvfdiv_d",
+                    "lasx.xvfdiv.s" => "__builtin_lasx_xvfdiv_s",
+                    "lasx.xvffint.d.l" => "__builtin_lasx_xvffint_d_l",
+                    "lasx.xvffint.d.lu" => "__builtin_lasx_xvffint_d_lu",
+                    "lasx.xvffint.s.l" => "__builtin_lasx_xvffint_s_l",
+                    "lasx.xvffint.s.w" => "__builtin_lasx_xvffint_s_w",
+                    "lasx.xvffint.s.wu" => "__builtin_lasx_xvffint_s_wu",
+                    "lasx.xvffinth.d.w" => "__builtin_lasx_xvffinth_d_w",
+                    "lasx.xvffintl.d.w" => "__builtin_lasx_xvffintl_d_w",
+                    "lasx.xvflogb.d" => "__builtin_lasx_xvflogb_d",
+                    "lasx.xvflogb.s" => "__builtin_lasx_xvflogb_s",
+                    "lasx.xvfmadd.d" => "__builtin_lasx_xvfmadd_d",
+                    "lasx.xvfmadd.s" => "__builtin_lasx_xvfmadd_s",
+                    "lasx.xvfmax.d" => "__builtin_lasx_xvfmax_d",
+                    "lasx.xvfmax.s" => "__builtin_lasx_xvfmax_s",
+                    "lasx.xvfmaxa.d" => "__builtin_lasx_xvfmaxa_d",
+                    "lasx.xvfmaxa.s" => "__builtin_lasx_xvfmaxa_s",
+                    "lasx.xvfmin.d" => "__builtin_lasx_xvfmin_d",
+                    "lasx.xvfmin.s" => "__builtin_lasx_xvfmin_s",
+                    "lasx.xvfmina.d" => "__builtin_lasx_xvfmina_d",
+                    "lasx.xvfmina.s" => "__builtin_lasx_xvfmina_s",
+                    "lasx.xvfmsub.d" => "__builtin_lasx_xvfmsub_d",
+                    "lasx.xvfmsub.s" => "__builtin_lasx_xvfmsub_s",
+                    "lasx.xvfmul.d" => "__builtin_lasx_xvfmul_d",
+                    "lasx.xvfmul.s" => "__builtin_lasx_xvfmul_s",
+                    "lasx.xvfnmadd.d" => "__builtin_lasx_xvfnmadd_d",
+                    "lasx.xvfnmadd.s" => "__builtin_lasx_xvfnmadd_s",
+                    "lasx.xvfnmsub.d" => "__builtin_lasx_xvfnmsub_d",
+                    "lasx.xvfnmsub.s" => "__builtin_lasx_xvfnmsub_s",
+                    "lasx.xvfrecip.d" => "__builtin_lasx_xvfrecip_d",
+                    "lasx.xvfrecip.s" => "__builtin_lasx_xvfrecip_s",
+                    "lasx.xvfrecipe.d" => "__builtin_lasx_xvfrecipe_d",
+                    "lasx.xvfrecipe.s" => "__builtin_lasx_xvfrecipe_s",
+                    "lasx.xvfrint.d" => "__builtin_lasx_xvfrint_d",
+                    "lasx.xvfrint.s" => "__builtin_lasx_xvfrint_s",
+                    "lasx.xvfrintrm.d" => "__builtin_lasx_xvfrintrm_d",
+                    "lasx.xvfrintrm.s" => "__builtin_lasx_xvfrintrm_s",
+                    "lasx.xvfrintrne.d" => "__builtin_lasx_xvfrintrne_d",
+                    "lasx.xvfrintrne.s" => "__builtin_lasx_xvfrintrne_s",
+                    "lasx.xvfrintrp.d" => "__builtin_lasx_xvfrintrp_d",
+                    "lasx.xvfrintrp.s" => "__builtin_lasx_xvfrintrp_s",
+                    "lasx.xvfrintrz.d" => "__builtin_lasx_xvfrintrz_d",
+                    "lasx.xvfrintrz.s" => "__builtin_lasx_xvfrintrz_s",
+                    "lasx.xvfrsqrt.d" => "__builtin_lasx_xvfrsqrt_d",
+                    "lasx.xvfrsqrt.s" => "__builtin_lasx_xvfrsqrt_s",
+                    "lasx.xvfrsqrte.d" => "__builtin_lasx_xvfrsqrte_d",
+                    "lasx.xvfrsqrte.s" => "__builtin_lasx_xvfrsqrte_s",
+                    "lasx.xvfrstp.b" => "__builtin_lasx_xvfrstp_b",
+                    "lasx.xvfrstp.h" => "__builtin_lasx_xvfrstp_h",
+                    "lasx.xvfrstpi.b" => "__builtin_lasx_xvfrstpi_b",
+                    "lasx.xvfrstpi.h" => "__builtin_lasx_xvfrstpi_h",
+                    "lasx.xvfsqrt.d" => "__builtin_lasx_xvfsqrt_d",
+                    "lasx.xvfsqrt.s" => "__builtin_lasx_xvfsqrt_s",
+                    "lasx.xvfsub.d" => "__builtin_lasx_xvfsub_d",
+                    "lasx.xvfsub.s" => "__builtin_lasx_xvfsub_s",
+                    "lasx.xvftint.l.d" => "__builtin_lasx_xvftint_l_d",
+                    "lasx.xvftint.lu.d" => "__builtin_lasx_xvftint_lu_d",
+                    "lasx.xvftint.w.d" => "__builtin_lasx_xvftint_w_d",
+                    "lasx.xvftint.w.s" => "__builtin_lasx_xvftint_w_s",
+                    "lasx.xvftint.wu.s" => "__builtin_lasx_xvftint_wu_s",
+                    "lasx.xvftinth.l.s" => "__builtin_lasx_xvftinth_l_s",
+                    "lasx.xvftintl.l.s" => "__builtin_lasx_xvftintl_l_s",
+                    "lasx.xvftintrm.l.d" => "__builtin_lasx_xvftintrm_l_d",
+                    "lasx.xvftintrm.w.d" => "__builtin_lasx_xvftintrm_w_d",
+                    "lasx.xvftintrm.w.s" => "__builtin_lasx_xvftintrm_w_s",
+                    "lasx.xvftintrmh.l.s" => "__builtin_lasx_xvftintrmh_l_s",
+                    "lasx.xvftintrml.l.s" => "__builtin_lasx_xvftintrml_l_s",
+                    "lasx.xvftintrne.l.d" => "__builtin_lasx_xvftintrne_l_d",
+                    "lasx.xvftintrne.w.d" => "__builtin_lasx_xvftintrne_w_d",
+                    "lasx.xvftintrne.w.s" => "__builtin_lasx_xvftintrne_w_s",
+                    "lasx.xvftintrneh.l.s" => "__builtin_lasx_xvftintrneh_l_s",
+                    "lasx.xvftintrnel.l.s" => "__builtin_lasx_xvftintrnel_l_s",
+                    "lasx.xvftintrp.l.d" => "__builtin_lasx_xvftintrp_l_d",
+                    "lasx.xvftintrp.w.d" => "__builtin_lasx_xvftintrp_w_d",
+                    "lasx.xvftintrp.w.s" => "__builtin_lasx_xvftintrp_w_s",
+                    "lasx.xvftintrph.l.s" => "__builtin_lasx_xvftintrph_l_s",
+                    "lasx.xvftintrpl.l.s" => "__builtin_lasx_xvftintrpl_l_s",
+                    "lasx.xvftintrz.l.d" => "__builtin_lasx_xvftintrz_l_d",
+                    "lasx.xvftintrz.lu.d" => "__builtin_lasx_xvftintrz_lu_d",
+                    "lasx.xvftintrz.w.d" => "__builtin_lasx_xvftintrz_w_d",
+                    "lasx.xvftintrz.w.s" => "__builtin_lasx_xvftintrz_w_s",
+                    "lasx.xvftintrz.wu.s" => "__builtin_lasx_xvftintrz_wu_s",
+                    "lasx.xvftintrzh.l.s" => "__builtin_lasx_xvftintrzh_l_s",
+                    "lasx.xvftintrzl.l.s" => "__builtin_lasx_xvftintrzl_l_s",
+                    "lasx.xvhaddw.d.w" => "__builtin_lasx_xvhaddw_d_w",
+                    "lasx.xvhaddw.du.wu" => "__builtin_lasx_xvhaddw_du_wu",
+                    "lasx.xvhaddw.h.b" => "__builtin_lasx_xvhaddw_h_b",
+                    "lasx.xvhaddw.hu.bu" => "__builtin_lasx_xvhaddw_hu_bu",
+                    "lasx.xvhaddw.q.d" => "__builtin_lasx_xvhaddw_q_d",
+                    "lasx.xvhaddw.qu.du" => "__builtin_lasx_xvhaddw_qu_du",
+                    "lasx.xvhaddw.w.h" => "__builtin_lasx_xvhaddw_w_h",
+                    "lasx.xvhaddw.wu.hu" => "__builtin_lasx_xvhaddw_wu_hu",
+                    "lasx.xvhsubw.d.w" => "__builtin_lasx_xvhsubw_d_w",
+                    "lasx.xvhsubw.du.wu" => "__builtin_lasx_xvhsubw_du_wu",
+                    "lasx.xvhsubw.h.b" => "__builtin_lasx_xvhsubw_h_b",
+                    "lasx.xvhsubw.hu.bu" => "__builtin_lasx_xvhsubw_hu_bu",
+                    "lasx.xvhsubw.q.d" => "__builtin_lasx_xvhsubw_q_d",
+                    "lasx.xvhsubw.qu.du" => "__builtin_lasx_xvhsubw_qu_du",
+                    "lasx.xvhsubw.w.h" => "__builtin_lasx_xvhsubw_w_h",
+                    "lasx.xvhsubw.wu.hu" => "__builtin_lasx_xvhsubw_wu_hu",
+                    "lasx.xvilvh.b" => "__builtin_lasx_xvilvh_b",
+                    "lasx.xvilvh.d" => "__builtin_lasx_xvilvh_d",
+                    "lasx.xvilvh.h" => "__builtin_lasx_xvilvh_h",
+                    "lasx.xvilvh.w" => "__builtin_lasx_xvilvh_w",
+                    "lasx.xvilvl.b" => "__builtin_lasx_xvilvl_b",
+                    "lasx.xvilvl.d" => "__builtin_lasx_xvilvl_d",
+                    "lasx.xvilvl.h" => "__builtin_lasx_xvilvl_h",
+                    "lasx.xvilvl.w" => "__builtin_lasx_xvilvl_w",
+                    "lasx.xvinsgr2vr.d" => "__builtin_lasx_xvinsgr2vr_d",
+                    "lasx.xvinsgr2vr.w" => "__builtin_lasx_xvinsgr2vr_w",
+                    "lasx.xvinsve0.d" => "__builtin_lasx_xvinsve0_d",
+                    "lasx.xvinsve0.w" => "__builtin_lasx_xvinsve0_w",
+                    "lasx.xvld" => "__builtin_lasx_xvld",
+                    "lasx.xvldi" => "__builtin_lasx_xvldi",
+                    "lasx.xvldrepl.b" => "__builtin_lasx_xvldrepl_b",
+                    "lasx.xvldrepl.d" => "__builtin_lasx_xvldrepl_d",
+                    "lasx.xvldrepl.h" => "__builtin_lasx_xvldrepl_h",
+                    "lasx.xvldrepl.w" => "__builtin_lasx_xvldrepl_w",
+                    "lasx.xvldx" => "__builtin_lasx_xvldx",
+                    "lasx.xvmadd.b" => "__builtin_lasx_xvmadd_b",
+                    "lasx.xvmadd.d" => "__builtin_lasx_xvmadd_d",
+                    "lasx.xvmadd.h" => "__builtin_lasx_xvmadd_h",
+                    "lasx.xvmadd.w" => "__builtin_lasx_xvmadd_w",
+                    "lasx.xvmaddwev.d.w" => "__builtin_lasx_xvmaddwev_d_w",
+                    "lasx.xvmaddwev.d.wu" => "__builtin_lasx_xvmaddwev_d_wu",
+                    "lasx.xvmaddwev.d.wu.w" => "__builtin_lasx_xvmaddwev_d_wu_w",
+                    "lasx.xvmaddwev.h.b" => "__builtin_lasx_xvmaddwev_h_b",
+                    "lasx.xvmaddwev.h.bu" => "__builtin_lasx_xvmaddwev_h_bu",
+                    "lasx.xvmaddwev.h.bu.b" => "__builtin_lasx_xvmaddwev_h_bu_b",
+                    "lasx.xvmaddwev.q.d" => "__builtin_lasx_xvmaddwev_q_d",
+                    "lasx.xvmaddwev.q.du" => "__builtin_lasx_xvmaddwev_q_du",
+                    "lasx.xvmaddwev.q.du.d" => "__builtin_lasx_xvmaddwev_q_du_d",
+                    "lasx.xvmaddwev.w.h" => "__builtin_lasx_xvmaddwev_w_h",
+                    "lasx.xvmaddwev.w.hu" => "__builtin_lasx_xvmaddwev_w_hu",
+                    "lasx.xvmaddwev.w.hu.h" => "__builtin_lasx_xvmaddwev_w_hu_h",
+                    "lasx.xvmaddwod.d.w" => "__builtin_lasx_xvmaddwod_d_w",
+                    "lasx.xvmaddwod.d.wu" => "__builtin_lasx_xvmaddwod_d_wu",
+                    "lasx.xvmaddwod.d.wu.w" => "__builtin_lasx_xvmaddwod_d_wu_w",
+                    "lasx.xvmaddwod.h.b" => "__builtin_lasx_xvmaddwod_h_b",
+                    "lasx.xvmaddwod.h.bu" => "__builtin_lasx_xvmaddwod_h_bu",
+                    "lasx.xvmaddwod.h.bu.b" => "__builtin_lasx_xvmaddwod_h_bu_b",
+                    "lasx.xvmaddwod.q.d" => "__builtin_lasx_xvmaddwod_q_d",
+                    "lasx.xvmaddwod.q.du" => "__builtin_lasx_xvmaddwod_q_du",
+                    "lasx.xvmaddwod.q.du.d" => "__builtin_lasx_xvmaddwod_q_du_d",
+                    "lasx.xvmaddwod.w.h" => "__builtin_lasx_xvmaddwod_w_h",
+                    "lasx.xvmaddwod.w.hu" => "__builtin_lasx_xvmaddwod_w_hu",
+                    "lasx.xvmaddwod.w.hu.h" => "__builtin_lasx_xvmaddwod_w_hu_h",
+                    "lasx.xvmax.b" => "__builtin_lasx_xvmax_b",
+                    "lasx.xvmax.bu" => "__builtin_lasx_xvmax_bu",
+                    "lasx.xvmax.d" => "__builtin_lasx_xvmax_d",
+                    "lasx.xvmax.du" => "__builtin_lasx_xvmax_du",
+                    "lasx.xvmax.h" => "__builtin_lasx_xvmax_h",
+                    "lasx.xvmax.hu" => "__builtin_lasx_xvmax_hu",
+                    "lasx.xvmax.w" => "__builtin_lasx_xvmax_w",
+                    "lasx.xvmax.wu" => "__builtin_lasx_xvmax_wu",
+                    "lasx.xvmaxi.b" => "__builtin_lasx_xvmaxi_b",
+                    "lasx.xvmaxi.bu" => "__builtin_lasx_xvmaxi_bu",
+                    "lasx.xvmaxi.d" => "__builtin_lasx_xvmaxi_d",
+                    "lasx.xvmaxi.du" => "__builtin_lasx_xvmaxi_du",
+                    "lasx.xvmaxi.h" => "__builtin_lasx_xvmaxi_h",
+                    "lasx.xvmaxi.hu" => "__builtin_lasx_xvmaxi_hu",
+                    "lasx.xvmaxi.w" => "__builtin_lasx_xvmaxi_w",
+                    "lasx.xvmaxi.wu" => "__builtin_lasx_xvmaxi_wu",
+                    "lasx.xvmin.b" => "__builtin_lasx_xvmin_b",
+                    "lasx.xvmin.bu" => "__builtin_lasx_xvmin_bu",
+                    "lasx.xvmin.d" => "__builtin_lasx_xvmin_d",
+                    "lasx.xvmin.du" => "__builtin_lasx_xvmin_du",
+                    "lasx.xvmin.h" => "__builtin_lasx_xvmin_h",
+                    "lasx.xvmin.hu" => "__builtin_lasx_xvmin_hu",
+                    "lasx.xvmin.w" => "__builtin_lasx_xvmin_w",
+                    "lasx.xvmin.wu" => "__builtin_lasx_xvmin_wu",
+                    "lasx.xvmini.b" => "__builtin_lasx_xvmini_b",
+                    "lasx.xvmini.bu" => "__builtin_lasx_xvmini_bu",
+                    "lasx.xvmini.d" => "__builtin_lasx_xvmini_d",
+                    "lasx.xvmini.du" => "__builtin_lasx_xvmini_du",
+                    "lasx.xvmini.h" => "__builtin_lasx_xvmini_h",
+                    "lasx.xvmini.hu" => "__builtin_lasx_xvmini_hu",
+                    "lasx.xvmini.w" => "__builtin_lasx_xvmini_w",
+                    "lasx.xvmini.wu" => "__builtin_lasx_xvmini_wu",
+                    "lasx.xvmod.b" => "__builtin_lasx_xvmod_b",
+                    "lasx.xvmod.bu" => "__builtin_lasx_xvmod_bu",
+                    "lasx.xvmod.d" => "__builtin_lasx_xvmod_d",
+                    "lasx.xvmod.du" => "__builtin_lasx_xvmod_du",
+                    "lasx.xvmod.h" => "__builtin_lasx_xvmod_h",
+                    "lasx.xvmod.hu" => "__builtin_lasx_xvmod_hu",
+                    "lasx.xvmod.w" => "__builtin_lasx_xvmod_w",
+                    "lasx.xvmod.wu" => "__builtin_lasx_xvmod_wu",
+                    "lasx.xvmskgez.b" => "__builtin_lasx_xvmskgez_b",
+                    "lasx.xvmskltz.b" => "__builtin_lasx_xvmskltz_b",
+                    "lasx.xvmskltz.d" => "__builtin_lasx_xvmskltz_d",
+                    "lasx.xvmskltz.h" => "__builtin_lasx_xvmskltz_h",
+                    "lasx.xvmskltz.w" => "__builtin_lasx_xvmskltz_w",
+                    "lasx.xvmsknz.b" => "__builtin_lasx_xvmsknz_b",
+                    "lasx.xvmsub.b" => "__builtin_lasx_xvmsub_b",
+                    "lasx.xvmsub.d" => "__builtin_lasx_xvmsub_d",
+                    "lasx.xvmsub.h" => "__builtin_lasx_xvmsub_h",
+                    "lasx.xvmsub.w" => "__builtin_lasx_xvmsub_w",
+                    "lasx.xvmuh.b" => "__builtin_lasx_xvmuh_b",
+                    "lasx.xvmuh.bu" => "__builtin_lasx_xvmuh_bu",
+                    "lasx.xvmuh.d" => "__builtin_lasx_xvmuh_d",
+                    "lasx.xvmuh.du" => "__builtin_lasx_xvmuh_du",
+                    "lasx.xvmuh.h" => "__builtin_lasx_xvmuh_h",
+                    "lasx.xvmuh.hu" => "__builtin_lasx_xvmuh_hu",
+                    "lasx.xvmuh.w" => "__builtin_lasx_xvmuh_w",
+                    "lasx.xvmuh.wu" => "__builtin_lasx_xvmuh_wu",
+                    "lasx.xvmul.b" => "__builtin_lasx_xvmul_b",
+                    "lasx.xvmul.d" => "__builtin_lasx_xvmul_d",
+                    "lasx.xvmul.h" => "__builtin_lasx_xvmul_h",
+                    "lasx.xvmul.w" => "__builtin_lasx_xvmul_w",
+                    "lasx.xvmulwev.d.w" => "__builtin_lasx_xvmulwev_d_w",
+                    "lasx.xvmulwev.d.wu" => "__builtin_lasx_xvmulwev_d_wu",
+                    "lasx.xvmulwev.d.wu.w" => "__builtin_lasx_xvmulwev_d_wu_w",
+                    "lasx.xvmulwev.h.b" => "__builtin_lasx_xvmulwev_h_b",
+                    "lasx.xvmulwev.h.bu" => "__builtin_lasx_xvmulwev_h_bu",
+                    "lasx.xvmulwev.h.bu.b" => "__builtin_lasx_xvmulwev_h_bu_b",
+                    "lasx.xvmulwev.q.d" => "__builtin_lasx_xvmulwev_q_d",
+                    "lasx.xvmulwev.q.du" => "__builtin_lasx_xvmulwev_q_du",
+                    "lasx.xvmulwev.q.du.d" => "__builtin_lasx_xvmulwev_q_du_d",
+                    "lasx.xvmulwev.w.h" => "__builtin_lasx_xvmulwev_w_h",
+                    "lasx.xvmulwev.w.hu" => "__builtin_lasx_xvmulwev_w_hu",
+                    "lasx.xvmulwev.w.hu.h" => "__builtin_lasx_xvmulwev_w_hu_h",
+                    "lasx.xvmulwod.d.w" => "__builtin_lasx_xvmulwod_d_w",
+                    "lasx.xvmulwod.d.wu" => "__builtin_lasx_xvmulwod_d_wu",
+                    "lasx.xvmulwod.d.wu.w" => "__builtin_lasx_xvmulwod_d_wu_w",
+                    "lasx.xvmulwod.h.b" => "__builtin_lasx_xvmulwod_h_b",
+                    "lasx.xvmulwod.h.bu" => "__builtin_lasx_xvmulwod_h_bu",
+                    "lasx.xvmulwod.h.bu.b" => "__builtin_lasx_xvmulwod_h_bu_b",
+                    "lasx.xvmulwod.q.d" => "__builtin_lasx_xvmulwod_q_d",
+                    "lasx.xvmulwod.q.du" => "__builtin_lasx_xvmulwod_q_du",
+                    "lasx.xvmulwod.q.du.d" => "__builtin_lasx_xvmulwod_q_du_d",
+                    "lasx.xvmulwod.w.h" => "__builtin_lasx_xvmulwod_w_h",
+                    "lasx.xvmulwod.w.hu" => "__builtin_lasx_xvmulwod_w_hu",
+                    "lasx.xvmulwod.w.hu.h" => "__builtin_lasx_xvmulwod_w_hu_h",
+                    "lasx.xvneg.b" => "__builtin_lasx_xvneg_b",
+                    "lasx.xvneg.d" => "__builtin_lasx_xvneg_d",
+                    "lasx.xvneg.h" => "__builtin_lasx_xvneg_h",
+                    "lasx.xvneg.w" => "__builtin_lasx_xvneg_w",
+                    "lasx.xvnor.v" => "__builtin_lasx_xvnor_v",
+                    "lasx.xvnori.b" => "__builtin_lasx_xvnori_b",
+                    "lasx.xvor.v" => "__builtin_lasx_xvor_v",
+                    "lasx.xvori.b" => "__builtin_lasx_xvori_b",
+                    "lasx.xvorn.v" => "__builtin_lasx_xvorn_v",
+                    "lasx.xvpackev.b" => "__builtin_lasx_xvpackev_b",
+                    "lasx.xvpackev.d" => "__builtin_lasx_xvpackev_d",
+                    "lasx.xvpackev.h" => "__builtin_lasx_xvpackev_h",
+                    "lasx.xvpackev.w" => "__builtin_lasx_xvpackev_w",
+                    "lasx.xvpackod.b" => "__builtin_lasx_xvpackod_b",
+                    "lasx.xvpackod.d" => "__builtin_lasx_xvpackod_d",
+                    "lasx.xvpackod.h" => "__builtin_lasx_xvpackod_h",
+                    "lasx.xvpackod.w" => "__builtin_lasx_xvpackod_w",
+                    "lasx.xvpcnt.b" => "__builtin_lasx_xvpcnt_b",
+                    "lasx.xvpcnt.d" => "__builtin_lasx_xvpcnt_d",
+                    "lasx.xvpcnt.h" => "__builtin_lasx_xvpcnt_h",
+                    "lasx.xvpcnt.w" => "__builtin_lasx_xvpcnt_w",
+                    "lasx.xvperm.w" => "__builtin_lasx_xvperm_w",
+                    "lasx.xvpermi.d" => "__builtin_lasx_xvpermi_d",
+                    "lasx.xvpermi.q" => "__builtin_lasx_xvpermi_q",
+                    "lasx.xvpermi.w" => "__builtin_lasx_xvpermi_w",
+                    "lasx.xvpickev.b" => "__builtin_lasx_xvpickev_b",
+                    "lasx.xvpickev.d" => "__builtin_lasx_xvpickev_d",
+                    "lasx.xvpickev.h" => "__builtin_lasx_xvpickev_h",
+                    "lasx.xvpickev.w" => "__builtin_lasx_xvpickev_w",
+                    "lasx.xvpickod.b" => "__builtin_lasx_xvpickod_b",
+                    "lasx.xvpickod.d" => "__builtin_lasx_xvpickod_d",
+                    "lasx.xvpickod.h" => "__builtin_lasx_xvpickod_h",
+                    "lasx.xvpickod.w" => "__builtin_lasx_xvpickod_w",
+                    "lasx.xvpickve.d" => "__builtin_lasx_xvpickve_d",
+                    "lasx.xvpickve.d.f" => "__builtin_lasx_xvpickve_d_f",
+                    "lasx.xvpickve.w" => "__builtin_lasx_xvpickve_w",
+                    "lasx.xvpickve.w.f" => "__builtin_lasx_xvpickve_w_f",
+                    "lasx.xvpickve2gr.d" => "__builtin_lasx_xvpickve2gr_d",
+                    "lasx.xvpickve2gr.du" => "__builtin_lasx_xvpickve2gr_du",
+                    "lasx.xvpickve2gr.w" => "__builtin_lasx_xvpickve2gr_w",
+                    "lasx.xvpickve2gr.wu" => "__builtin_lasx_xvpickve2gr_wu",
+                    "lasx.xvrepl128vei.b" => "__builtin_lasx_xvrepl128vei_b",
+                    "lasx.xvrepl128vei.d" => "__builtin_lasx_xvrepl128vei_d",
+                    "lasx.xvrepl128vei.h" => "__builtin_lasx_xvrepl128vei_h",
+                    "lasx.xvrepl128vei.w" => "__builtin_lasx_xvrepl128vei_w",
+                    "lasx.xvreplgr2vr.b" => "__builtin_lasx_xvreplgr2vr_b",
+                    "lasx.xvreplgr2vr.d" => "__builtin_lasx_xvreplgr2vr_d",
+                    "lasx.xvreplgr2vr.h" => "__builtin_lasx_xvreplgr2vr_h",
+                    "lasx.xvreplgr2vr.w" => "__builtin_lasx_xvreplgr2vr_w",
+                    "lasx.xvrepli.b" => "__builtin_lasx_xvrepli_b",
+                    "lasx.xvrepli.d" => "__builtin_lasx_xvrepli_d",
+                    "lasx.xvrepli.h" => "__builtin_lasx_xvrepli_h",
+                    "lasx.xvrepli.w" => "__builtin_lasx_xvrepli_w",
+                    "lasx.xvreplve.b" => "__builtin_lasx_xvreplve_b",
+                    "lasx.xvreplve.d" => "__builtin_lasx_xvreplve_d",
+                    "lasx.xvreplve.h" => "__builtin_lasx_xvreplve_h",
+                    "lasx.xvreplve.w" => "__builtin_lasx_xvreplve_w",
+                    "lasx.xvreplve0.b" => "__builtin_lasx_xvreplve0_b",
+                    "lasx.xvreplve0.d" => "__builtin_lasx_xvreplve0_d",
+                    "lasx.xvreplve0.h" => "__builtin_lasx_xvreplve0_h",
+                    "lasx.xvreplve0.q" => "__builtin_lasx_xvreplve0_q",
+                    "lasx.xvreplve0.w" => "__builtin_lasx_xvreplve0_w",
+                    "lasx.xvrotr.b" => "__builtin_lasx_xvrotr_b",
+                    "lasx.xvrotr.d" => "__builtin_lasx_xvrotr_d",
+                    "lasx.xvrotr.h" => "__builtin_lasx_xvrotr_h",
+                    "lasx.xvrotr.w" => "__builtin_lasx_xvrotr_w",
+                    "lasx.xvrotri.b" => "__builtin_lasx_xvrotri_b",
+                    "lasx.xvrotri.d" => "__builtin_lasx_xvrotri_d",
+                    "lasx.xvrotri.h" => "__builtin_lasx_xvrotri_h",
+                    "lasx.xvrotri.w" => "__builtin_lasx_xvrotri_w",
+                    "lasx.xvsadd.b" => "__builtin_lasx_xvsadd_b",
+                    "lasx.xvsadd.bu" => "__builtin_lasx_xvsadd_bu",
+                    "lasx.xvsadd.d" => "__builtin_lasx_xvsadd_d",
+                    "lasx.xvsadd.du" => "__builtin_lasx_xvsadd_du",
+                    "lasx.xvsadd.h" => "__builtin_lasx_xvsadd_h",
+                    "lasx.xvsadd.hu" => "__builtin_lasx_xvsadd_hu",
+                    "lasx.xvsadd.w" => "__builtin_lasx_xvsadd_w",
+                    "lasx.xvsadd.wu" => "__builtin_lasx_xvsadd_wu",
+                    "lasx.xvsat.b" => "__builtin_lasx_xvsat_b",
+                    "lasx.xvsat.bu" => "__builtin_lasx_xvsat_bu",
+                    "lasx.xvsat.d" => "__builtin_lasx_xvsat_d",
+                    "lasx.xvsat.du" => "__builtin_lasx_xvsat_du",
+                    "lasx.xvsat.h" => "__builtin_lasx_xvsat_h",
+                    "lasx.xvsat.hu" => "__builtin_lasx_xvsat_hu",
+                    "lasx.xvsat.w" => "__builtin_lasx_xvsat_w",
+                    "lasx.xvsat.wu" => "__builtin_lasx_xvsat_wu",
+                    "lasx.xvseq.b" => "__builtin_lasx_xvseq_b",
+                    "lasx.xvseq.d" => "__builtin_lasx_xvseq_d",
+                    "lasx.xvseq.h" => "__builtin_lasx_xvseq_h",
+                    "lasx.xvseq.w" => "__builtin_lasx_xvseq_w",
+                    "lasx.xvseqi.b" => "__builtin_lasx_xvseqi_b",
+                    "lasx.xvseqi.d" => "__builtin_lasx_xvseqi_d",
+                    "lasx.xvseqi.h" => "__builtin_lasx_xvseqi_h",
+                    "lasx.xvseqi.w" => "__builtin_lasx_xvseqi_w",
+                    "lasx.xvshuf.b" => "__builtin_lasx_xvshuf_b",
+                    "lasx.xvshuf.d" => "__builtin_lasx_xvshuf_d",
+                    "lasx.xvshuf.h" => "__builtin_lasx_xvshuf_h",
+                    "lasx.xvshuf.w" => "__builtin_lasx_xvshuf_w",
+                    "lasx.xvshuf4i.b" => "__builtin_lasx_xvshuf4i_b",
+                    "lasx.xvshuf4i.d" => "__builtin_lasx_xvshuf4i_d",
+                    "lasx.xvshuf4i.h" => "__builtin_lasx_xvshuf4i_h",
+                    "lasx.xvshuf4i.w" => "__builtin_lasx_xvshuf4i_w",
+                    "lasx.xvsigncov.b" => "__builtin_lasx_xvsigncov_b",
+                    "lasx.xvsigncov.d" => "__builtin_lasx_xvsigncov_d",
+                    "lasx.xvsigncov.h" => "__builtin_lasx_xvsigncov_h",
+                    "lasx.xvsigncov.w" => "__builtin_lasx_xvsigncov_w",
+                    "lasx.xvsle.b" => "__builtin_lasx_xvsle_b",
+                    "lasx.xvsle.bu" => "__builtin_lasx_xvsle_bu",
+                    "lasx.xvsle.d" => "__builtin_lasx_xvsle_d",
+                    "lasx.xvsle.du" => "__builtin_lasx_xvsle_du",
+                    "lasx.xvsle.h" => "__builtin_lasx_xvsle_h",
+                    "lasx.xvsle.hu" => "__builtin_lasx_xvsle_hu",
+                    "lasx.xvsle.w" => "__builtin_lasx_xvsle_w",
+                    "lasx.xvsle.wu" => "__builtin_lasx_xvsle_wu",
+                    "lasx.xvslei.b" => "__builtin_lasx_xvslei_b",
+                    "lasx.xvslei.bu" => "__builtin_lasx_xvslei_bu",
+                    "lasx.xvslei.d" => "__builtin_lasx_xvslei_d",
+                    "lasx.xvslei.du" => "__builtin_lasx_xvslei_du",
+                    "lasx.xvslei.h" => "__builtin_lasx_xvslei_h",
+                    "lasx.xvslei.hu" => "__builtin_lasx_xvslei_hu",
+                    "lasx.xvslei.w" => "__builtin_lasx_xvslei_w",
+                    "lasx.xvslei.wu" => "__builtin_lasx_xvslei_wu",
+                    "lasx.xvsll.b" => "__builtin_lasx_xvsll_b",
+                    "lasx.xvsll.d" => "__builtin_lasx_xvsll_d",
+                    "lasx.xvsll.h" => "__builtin_lasx_xvsll_h",
+                    "lasx.xvsll.w" => "__builtin_lasx_xvsll_w",
+                    "lasx.xvslli.b" => "__builtin_lasx_xvslli_b",
+                    "lasx.xvslli.d" => "__builtin_lasx_xvslli_d",
+                    "lasx.xvslli.h" => "__builtin_lasx_xvslli_h",
+                    "lasx.xvslli.w" => "__builtin_lasx_xvslli_w",
+                    "lasx.xvsllwil.d.w" => "__builtin_lasx_xvsllwil_d_w",
+                    "lasx.xvsllwil.du.wu" => "__builtin_lasx_xvsllwil_du_wu",
+                    "lasx.xvsllwil.h.b" => "__builtin_lasx_xvsllwil_h_b",
+                    "lasx.xvsllwil.hu.bu" => "__builtin_lasx_xvsllwil_hu_bu",
+                    "lasx.xvsllwil.w.h" => "__builtin_lasx_xvsllwil_w_h",
+                    "lasx.xvsllwil.wu.hu" => "__builtin_lasx_xvsllwil_wu_hu",
+                    "lasx.xvslt.b" => "__builtin_lasx_xvslt_b",
+                    "lasx.xvslt.bu" => "__builtin_lasx_xvslt_bu",
+                    "lasx.xvslt.d" => "__builtin_lasx_xvslt_d",
+                    "lasx.xvslt.du" => "__builtin_lasx_xvslt_du",
+                    "lasx.xvslt.h" => "__builtin_lasx_xvslt_h",
+                    "lasx.xvslt.hu" => "__builtin_lasx_xvslt_hu",
+                    "lasx.xvslt.w" => "__builtin_lasx_xvslt_w",
+                    "lasx.xvslt.wu" => "__builtin_lasx_xvslt_wu",
+                    "lasx.xvslti.b" => "__builtin_lasx_xvslti_b",
+                    "lasx.xvslti.bu" => "__builtin_lasx_xvslti_bu",
+                    "lasx.xvslti.d" => "__builtin_lasx_xvslti_d",
+                    "lasx.xvslti.du" => "__builtin_lasx_xvslti_du",
+                    "lasx.xvslti.h" => "__builtin_lasx_xvslti_h",
+                    "lasx.xvslti.hu" => "__builtin_lasx_xvslti_hu",
+                    "lasx.xvslti.w" => "__builtin_lasx_xvslti_w",
+                    "lasx.xvslti.wu" => "__builtin_lasx_xvslti_wu",
+                    "lasx.xvsra.b" => "__builtin_lasx_xvsra_b",
+                    "lasx.xvsra.d" => "__builtin_lasx_xvsra_d",
+                    "lasx.xvsra.h" => "__builtin_lasx_xvsra_h",
+                    "lasx.xvsra.w" => "__builtin_lasx_xvsra_w",
+                    "lasx.xvsrai.b" => "__builtin_lasx_xvsrai_b",
+                    "lasx.xvsrai.d" => "__builtin_lasx_xvsrai_d",
+                    "lasx.xvsrai.h" => "__builtin_lasx_xvsrai_h",
+                    "lasx.xvsrai.w" => "__builtin_lasx_xvsrai_w",
+                    "lasx.xvsran.b.h" => "__builtin_lasx_xvsran_b_h",
+                    "lasx.xvsran.h.w" => "__builtin_lasx_xvsran_h_w",
+                    "lasx.xvsran.w.d" => "__builtin_lasx_xvsran_w_d",
+                    "lasx.xvsrani.b.h" => "__builtin_lasx_xvsrani_b_h",
+                    "lasx.xvsrani.d.q" => "__builtin_lasx_xvsrani_d_q",
+                    "lasx.xvsrani.h.w" => "__builtin_lasx_xvsrani_h_w",
+                    "lasx.xvsrani.w.d" => "__builtin_lasx_xvsrani_w_d",
+                    "lasx.xvsrar.b" => "__builtin_lasx_xvsrar_b",
+                    "lasx.xvsrar.d" => "__builtin_lasx_xvsrar_d",
+                    "lasx.xvsrar.h" => "__builtin_lasx_xvsrar_h",
+                    "lasx.xvsrar.w" => "__builtin_lasx_xvsrar_w",
+                    "lasx.xvsrari.b" => "__builtin_lasx_xvsrari_b",
+                    "lasx.xvsrari.d" => "__builtin_lasx_xvsrari_d",
+                    "lasx.xvsrari.h" => "__builtin_lasx_xvsrari_h",
+                    "lasx.xvsrari.w" => "__builtin_lasx_xvsrari_w",
+                    "lasx.xvsrarn.b.h" => "__builtin_lasx_xvsrarn_b_h",
+                    "lasx.xvsrarn.h.w" => "__builtin_lasx_xvsrarn_h_w",
+                    "lasx.xvsrarn.w.d" => "__builtin_lasx_xvsrarn_w_d",
+                    "lasx.xvsrarni.b.h" => "__builtin_lasx_xvsrarni_b_h",
+                    "lasx.xvsrarni.d.q" => "__builtin_lasx_xvsrarni_d_q",
+                    "lasx.xvsrarni.h.w" => "__builtin_lasx_xvsrarni_h_w",
+                    "lasx.xvsrarni.w.d" => "__builtin_lasx_xvsrarni_w_d",
+                    "lasx.xvsrl.b" => "__builtin_lasx_xvsrl_b",
+                    "lasx.xvsrl.d" => "__builtin_lasx_xvsrl_d",
+                    "lasx.xvsrl.h" => "__builtin_lasx_xvsrl_h",
+                    "lasx.xvsrl.w" => "__builtin_lasx_xvsrl_w",
+                    "lasx.xvsrli.b" => "__builtin_lasx_xvsrli_b",
+                    "lasx.xvsrli.d" => "__builtin_lasx_xvsrli_d",
+                    "lasx.xvsrli.h" => "__builtin_lasx_xvsrli_h",
+                    "lasx.xvsrli.w" => "__builtin_lasx_xvsrli_w",
+                    "lasx.xvsrln.b.h" => "__builtin_lasx_xvsrln_b_h",
+                    "lasx.xvsrln.h.w" => "__builtin_lasx_xvsrln_h_w",
+                    "lasx.xvsrln.w.d" => "__builtin_lasx_xvsrln_w_d",
+                    "lasx.xvsrlni.b.h" => "__builtin_lasx_xvsrlni_b_h",
+                    "lasx.xvsrlni.d.q" => "__builtin_lasx_xvsrlni_d_q",
+                    "lasx.xvsrlni.h.w" => "__builtin_lasx_xvsrlni_h_w",
+                    "lasx.xvsrlni.w.d" => "__builtin_lasx_xvsrlni_w_d",
+                    "lasx.xvsrlr.b" => "__builtin_lasx_xvsrlr_b",
+                    "lasx.xvsrlr.d" => "__builtin_lasx_xvsrlr_d",
+                    "lasx.xvsrlr.h" => "__builtin_lasx_xvsrlr_h",
+                    "lasx.xvsrlr.w" => "__builtin_lasx_xvsrlr_w",
+                    "lasx.xvsrlri.b" => "__builtin_lasx_xvsrlri_b",
+                    "lasx.xvsrlri.d" => "__builtin_lasx_xvsrlri_d",
+                    "lasx.xvsrlri.h" => "__builtin_lasx_xvsrlri_h",
+                    "lasx.xvsrlri.w" => "__builtin_lasx_xvsrlri_w",
+                    "lasx.xvsrlrn.b.h" => "__builtin_lasx_xvsrlrn_b_h",
+                    "lasx.xvsrlrn.h.w" => "__builtin_lasx_xvsrlrn_h_w",
+                    "lasx.xvsrlrn.w.d" => "__builtin_lasx_xvsrlrn_w_d",
+                    "lasx.xvsrlrni.b.h" => "__builtin_lasx_xvsrlrni_b_h",
+                    "lasx.xvsrlrni.d.q" => "__builtin_lasx_xvsrlrni_d_q",
+                    "lasx.xvsrlrni.h.w" => "__builtin_lasx_xvsrlrni_h_w",
+                    "lasx.xvsrlrni.w.d" => "__builtin_lasx_xvsrlrni_w_d",
+                    "lasx.xvssran.b.h" => "__builtin_lasx_xvssran_b_h",
+                    "lasx.xvssran.bu.h" => "__builtin_lasx_xvssran_bu_h",
+                    "lasx.xvssran.h.w" => "__builtin_lasx_xvssran_h_w",
+                    "lasx.xvssran.hu.w" => "__builtin_lasx_xvssran_hu_w",
+                    "lasx.xvssran.w.d" => "__builtin_lasx_xvssran_w_d",
+                    "lasx.xvssran.wu.d" => "__builtin_lasx_xvssran_wu_d",
+                    "lasx.xvssrani.b.h" => "__builtin_lasx_xvssrani_b_h",
+                    "lasx.xvssrani.bu.h" => "__builtin_lasx_xvssrani_bu_h",
+                    "lasx.xvssrani.d.q" => "__builtin_lasx_xvssrani_d_q",
+                    "lasx.xvssrani.du.q" => "__builtin_lasx_xvssrani_du_q",
+                    "lasx.xvssrani.h.w" => "__builtin_lasx_xvssrani_h_w",
+                    "lasx.xvssrani.hu.w" => "__builtin_lasx_xvssrani_hu_w",
+                    "lasx.xvssrani.w.d" => "__builtin_lasx_xvssrani_w_d",
+                    "lasx.xvssrani.wu.d" => "__builtin_lasx_xvssrani_wu_d",
+                    "lasx.xvssrarn.b.h" => "__builtin_lasx_xvssrarn_b_h",
+                    "lasx.xvssrarn.bu.h" => "__builtin_lasx_xvssrarn_bu_h",
+                    "lasx.xvssrarn.h.w" => "__builtin_lasx_xvssrarn_h_w",
+                    "lasx.xvssrarn.hu.w" => "__builtin_lasx_xvssrarn_hu_w",
+                    "lasx.xvssrarn.w.d" => "__builtin_lasx_xvssrarn_w_d",
+                    "lasx.xvssrarn.wu.d" => "__builtin_lasx_xvssrarn_wu_d",
+                    "lasx.xvssrarni.b.h" => "__builtin_lasx_xvssrarni_b_h",
+                    "lasx.xvssrarni.bu.h" => "__builtin_lasx_xvssrarni_bu_h",
+                    "lasx.xvssrarni.d.q" => "__builtin_lasx_xvssrarni_d_q",
+                    "lasx.xvssrarni.du.q" => "__builtin_lasx_xvssrarni_du_q",
+                    "lasx.xvssrarni.h.w" => "__builtin_lasx_xvssrarni_h_w",
+                    "lasx.xvssrarni.hu.w" => "__builtin_lasx_xvssrarni_hu_w",
+                    "lasx.xvssrarni.w.d" => "__builtin_lasx_xvssrarni_w_d",
+                    "lasx.xvssrarni.wu.d" => "__builtin_lasx_xvssrarni_wu_d",
+                    "lasx.xvssrln.b.h" => "__builtin_lasx_xvssrln_b_h",
+                    "lasx.xvssrln.bu.h" => "__builtin_lasx_xvssrln_bu_h",
+                    "lasx.xvssrln.h.w" => "__builtin_lasx_xvssrln_h_w",
+                    "lasx.xvssrln.hu.w" => "__builtin_lasx_xvssrln_hu_w",
+                    "lasx.xvssrln.w.d" => "__builtin_lasx_xvssrln_w_d",
+                    "lasx.xvssrln.wu.d" => "__builtin_lasx_xvssrln_wu_d",
+                    "lasx.xvssrlni.b.h" => "__builtin_lasx_xvssrlni_b_h",
+                    "lasx.xvssrlni.bu.h" => "__builtin_lasx_xvssrlni_bu_h",
+                    "lasx.xvssrlni.d.q" => "__builtin_lasx_xvssrlni_d_q",
+                    "lasx.xvssrlni.du.q" => "__builtin_lasx_xvssrlni_du_q",
+                    "lasx.xvssrlni.h.w" => "__builtin_lasx_xvssrlni_h_w",
+                    "lasx.xvssrlni.hu.w" => "__builtin_lasx_xvssrlni_hu_w",
+                    "lasx.xvssrlni.w.d" => "__builtin_lasx_xvssrlni_w_d",
+                    "lasx.xvssrlni.wu.d" => "__builtin_lasx_xvssrlni_wu_d",
+                    "lasx.xvssrlrn.b.h" => "__builtin_lasx_xvssrlrn_b_h",
+                    "lasx.xvssrlrn.bu.h" => "__builtin_lasx_xvssrlrn_bu_h",
+                    "lasx.xvssrlrn.h.w" => "__builtin_lasx_xvssrlrn_h_w",
+                    "lasx.xvssrlrn.hu.w" => "__builtin_lasx_xvssrlrn_hu_w",
+                    "lasx.xvssrlrn.w.d" => "__builtin_lasx_xvssrlrn_w_d",
+                    "lasx.xvssrlrn.wu.d" => "__builtin_lasx_xvssrlrn_wu_d",
+                    "lasx.xvssrlrni.b.h" => "__builtin_lasx_xvssrlrni_b_h",
+                    "lasx.xvssrlrni.bu.h" => "__builtin_lasx_xvssrlrni_bu_h",
+                    "lasx.xvssrlrni.d.q" => "__builtin_lasx_xvssrlrni_d_q",
+                    "lasx.xvssrlrni.du.q" => "__builtin_lasx_xvssrlrni_du_q",
+                    "lasx.xvssrlrni.h.w" => "__builtin_lasx_xvssrlrni_h_w",
+                    "lasx.xvssrlrni.hu.w" => "__builtin_lasx_xvssrlrni_hu_w",
+                    "lasx.xvssrlrni.w.d" => "__builtin_lasx_xvssrlrni_w_d",
+                    "lasx.xvssrlrni.wu.d" => "__builtin_lasx_xvssrlrni_wu_d",
+                    "lasx.xvssub.b" => "__builtin_lasx_xvssub_b",
+                    "lasx.xvssub.bu" => "__builtin_lasx_xvssub_bu",
+                    "lasx.xvssub.d" => "__builtin_lasx_xvssub_d",
+                    "lasx.xvssub.du" => "__builtin_lasx_xvssub_du",
+                    "lasx.xvssub.h" => "__builtin_lasx_xvssub_h",
+                    "lasx.xvssub.hu" => "__builtin_lasx_xvssub_hu",
+                    "lasx.xvssub.w" => "__builtin_lasx_xvssub_w",
+                    "lasx.xvssub.wu" => "__builtin_lasx_xvssub_wu",
+                    "lasx.xvst" => "__builtin_lasx_xvst",
+                    "lasx.xvstelm.b" => "__builtin_lasx_xvstelm_b",
+                    "lasx.xvstelm.d" => "__builtin_lasx_xvstelm_d",
+                    "lasx.xvstelm.h" => "__builtin_lasx_xvstelm_h",
+                    "lasx.xvstelm.w" => "__builtin_lasx_xvstelm_w",
+                    "lasx.xvstx" => "__builtin_lasx_xvstx",
+                    "lasx.xvsub.b" => "__builtin_lasx_xvsub_b",
+                    "lasx.xvsub.d" => "__builtin_lasx_xvsub_d",
+                    "lasx.xvsub.h" => "__builtin_lasx_xvsub_h",
+                    "lasx.xvsub.q" => "__builtin_lasx_xvsub_q",
+                    "lasx.xvsub.w" => "__builtin_lasx_xvsub_w",
+                    "lasx.xvsubi.bu" => "__builtin_lasx_xvsubi_bu",
+                    "lasx.xvsubi.du" => "__builtin_lasx_xvsubi_du",
+                    "lasx.xvsubi.hu" => "__builtin_lasx_xvsubi_hu",
+                    "lasx.xvsubi.wu" => "__builtin_lasx_xvsubi_wu",
+                    "lasx.xvsubwev.d.w" => "__builtin_lasx_xvsubwev_d_w",
+                    "lasx.xvsubwev.d.wu" => "__builtin_lasx_xvsubwev_d_wu",
+                    "lasx.xvsubwev.h.b" => "__builtin_lasx_xvsubwev_h_b",
+                    "lasx.xvsubwev.h.bu" => "__builtin_lasx_xvsubwev_h_bu",
+                    "lasx.xvsubwev.q.d" => "__builtin_lasx_xvsubwev_q_d",
+                    "lasx.xvsubwev.q.du" => "__builtin_lasx_xvsubwev_q_du",
+                    "lasx.xvsubwev.w.h" => "__builtin_lasx_xvsubwev_w_h",
+                    "lasx.xvsubwev.w.hu" => "__builtin_lasx_xvsubwev_w_hu",
+                    "lasx.xvsubwod.d.w" => "__builtin_lasx_xvsubwod_d_w",
+                    "lasx.xvsubwod.d.wu" => "__builtin_lasx_xvsubwod_d_wu",
+                    "lasx.xvsubwod.h.b" => "__builtin_lasx_xvsubwod_h_b",
+                    "lasx.xvsubwod.h.bu" => "__builtin_lasx_xvsubwod_h_bu",
+                    "lasx.xvsubwod.q.d" => "__builtin_lasx_xvsubwod_q_d",
+                    "lasx.xvsubwod.q.du" => "__builtin_lasx_xvsubwod_q_du",
+                    "lasx.xvsubwod.w.h" => "__builtin_lasx_xvsubwod_w_h",
+                    "lasx.xvsubwod.w.hu" => "__builtin_lasx_xvsubwod_w_hu",
+                    "lasx.xvxor.v" => "__builtin_lasx_xvxor_v",
+                    "lasx.xvxori.b" => "__builtin_lasx_xvxori_b",
+                    "lddir.d" => "__builtin_loongarch_lddir_d",
+                    "ldpte.d" => "__builtin_loongarch_ldpte_d",
+                    "lsx.bnz.b" => "__builtin_lsx_bnz_b",
+                    "lsx.bnz.d" => "__builtin_lsx_bnz_d",
+                    "lsx.bnz.h" => "__builtin_lsx_bnz_h",
+                    "lsx.bnz.v" => "__builtin_lsx_bnz_v",
+                    "lsx.bnz.w" => "__builtin_lsx_bnz_w",
+                    "lsx.bz.b" => "__builtin_lsx_bz_b",
+                    "lsx.bz.d" => "__builtin_lsx_bz_d",
+                    "lsx.bz.h" => "__builtin_lsx_bz_h",
+                    "lsx.bz.v" => "__builtin_lsx_bz_v",
+                    "lsx.bz.w" => "__builtin_lsx_bz_w",
+                    "lsx.vabsd.b" => "__builtin_lsx_vabsd_b",
+                    "lsx.vabsd.bu" => "__builtin_lsx_vabsd_bu",
+                    "lsx.vabsd.d" => "__builtin_lsx_vabsd_d",
+                    "lsx.vabsd.du" => "__builtin_lsx_vabsd_du",
+                    "lsx.vabsd.h" => "__builtin_lsx_vabsd_h",
+                    "lsx.vabsd.hu" => "__builtin_lsx_vabsd_hu",
+                    "lsx.vabsd.w" => "__builtin_lsx_vabsd_w",
+                    "lsx.vabsd.wu" => "__builtin_lsx_vabsd_wu",
+                    "lsx.vadd.b" => "__builtin_lsx_vadd_b",
+                    "lsx.vadd.d" => "__builtin_lsx_vadd_d",
+                    "lsx.vadd.h" => "__builtin_lsx_vadd_h",
+                    "lsx.vadd.q" => "__builtin_lsx_vadd_q",
+                    "lsx.vadd.w" => "__builtin_lsx_vadd_w",
+                    "lsx.vadda.b" => "__builtin_lsx_vadda_b",
+                    "lsx.vadda.d" => "__builtin_lsx_vadda_d",
+                    "lsx.vadda.h" => "__builtin_lsx_vadda_h",
+                    "lsx.vadda.w" => "__builtin_lsx_vadda_w",
+                    "lsx.vaddi.bu" => "__builtin_lsx_vaddi_bu",
+                    "lsx.vaddi.du" => "__builtin_lsx_vaddi_du",
+                    "lsx.vaddi.hu" => "__builtin_lsx_vaddi_hu",
+                    "lsx.vaddi.wu" => "__builtin_lsx_vaddi_wu",
+                    "lsx.vaddwev.d.w" => "__builtin_lsx_vaddwev_d_w",
+                    "lsx.vaddwev.d.wu" => "__builtin_lsx_vaddwev_d_wu",
+                    "lsx.vaddwev.d.wu.w" => "__builtin_lsx_vaddwev_d_wu_w",
+                    "lsx.vaddwev.h.b" => "__builtin_lsx_vaddwev_h_b",
+                    "lsx.vaddwev.h.bu" => "__builtin_lsx_vaddwev_h_bu",
+                    "lsx.vaddwev.h.bu.b" => "__builtin_lsx_vaddwev_h_bu_b",
+                    "lsx.vaddwev.q.d" => "__builtin_lsx_vaddwev_q_d",
+                    "lsx.vaddwev.q.du" => "__builtin_lsx_vaddwev_q_du",
+                    "lsx.vaddwev.q.du.d" => "__builtin_lsx_vaddwev_q_du_d",
+                    "lsx.vaddwev.w.h" => "__builtin_lsx_vaddwev_w_h",
+                    "lsx.vaddwev.w.hu" => "__builtin_lsx_vaddwev_w_hu",
+                    "lsx.vaddwev.w.hu.h" => "__builtin_lsx_vaddwev_w_hu_h",
+                    "lsx.vaddwod.d.w" => "__builtin_lsx_vaddwod_d_w",
+                    "lsx.vaddwod.d.wu" => "__builtin_lsx_vaddwod_d_wu",
+                    "lsx.vaddwod.d.wu.w" => "__builtin_lsx_vaddwod_d_wu_w",
+                    "lsx.vaddwod.h.b" => "__builtin_lsx_vaddwod_h_b",
+                    "lsx.vaddwod.h.bu" => "__builtin_lsx_vaddwod_h_bu",
+                    "lsx.vaddwod.h.bu.b" => "__builtin_lsx_vaddwod_h_bu_b",
+                    "lsx.vaddwod.q.d" => "__builtin_lsx_vaddwod_q_d",
+                    "lsx.vaddwod.q.du" => "__builtin_lsx_vaddwod_q_du",
+                    "lsx.vaddwod.q.du.d" => "__builtin_lsx_vaddwod_q_du_d",
+                    "lsx.vaddwod.w.h" => "__builtin_lsx_vaddwod_w_h",
+                    "lsx.vaddwod.w.hu" => "__builtin_lsx_vaddwod_w_hu",
+                    "lsx.vaddwod.w.hu.h" => "__builtin_lsx_vaddwod_w_hu_h",
+                    "lsx.vand.v" => "__builtin_lsx_vand_v",
+                    "lsx.vandi.b" => "__builtin_lsx_vandi_b",
+                    "lsx.vandn.v" => "__builtin_lsx_vandn_v",
+                    "lsx.vavg.b" => "__builtin_lsx_vavg_b",
+                    "lsx.vavg.bu" => "__builtin_lsx_vavg_bu",
+                    "lsx.vavg.d" => "__builtin_lsx_vavg_d",
+                    "lsx.vavg.du" => "__builtin_lsx_vavg_du",
+                    "lsx.vavg.h" => "__builtin_lsx_vavg_h",
+                    "lsx.vavg.hu" => "__builtin_lsx_vavg_hu",
+                    "lsx.vavg.w" => "__builtin_lsx_vavg_w",
+                    "lsx.vavg.wu" => "__builtin_lsx_vavg_wu",
+                    "lsx.vavgr.b" => "__builtin_lsx_vavgr_b",
+                    "lsx.vavgr.bu" => "__builtin_lsx_vavgr_bu",
+                    "lsx.vavgr.d" => "__builtin_lsx_vavgr_d",
+                    "lsx.vavgr.du" => "__builtin_lsx_vavgr_du",
+                    "lsx.vavgr.h" => "__builtin_lsx_vavgr_h",
+                    "lsx.vavgr.hu" => "__builtin_lsx_vavgr_hu",
+                    "lsx.vavgr.w" => "__builtin_lsx_vavgr_w",
+                    "lsx.vavgr.wu" => "__builtin_lsx_vavgr_wu",
+                    "lsx.vbitclr.b" => "__builtin_lsx_vbitclr_b",
+                    "lsx.vbitclr.d" => "__builtin_lsx_vbitclr_d",
+                    "lsx.vbitclr.h" => "__builtin_lsx_vbitclr_h",
+                    "lsx.vbitclr.w" => "__builtin_lsx_vbitclr_w",
+                    "lsx.vbitclri.b" => "__builtin_lsx_vbitclri_b",
+                    "lsx.vbitclri.d" => "__builtin_lsx_vbitclri_d",
+                    "lsx.vbitclri.h" => "__builtin_lsx_vbitclri_h",
+                    "lsx.vbitclri.w" => "__builtin_lsx_vbitclri_w",
+                    "lsx.vbitrev.b" => "__builtin_lsx_vbitrev_b",
+                    "lsx.vbitrev.d" => "__builtin_lsx_vbitrev_d",
+                    "lsx.vbitrev.h" => "__builtin_lsx_vbitrev_h",
+                    "lsx.vbitrev.w" => "__builtin_lsx_vbitrev_w",
+                    "lsx.vbitrevi.b" => "__builtin_lsx_vbitrevi_b",
+                    "lsx.vbitrevi.d" => "__builtin_lsx_vbitrevi_d",
+                    "lsx.vbitrevi.h" => "__builtin_lsx_vbitrevi_h",
+                    "lsx.vbitrevi.w" => "__builtin_lsx_vbitrevi_w",
+                    "lsx.vbitsel.v" => "__builtin_lsx_vbitsel_v",
+                    "lsx.vbitseli.b" => "__builtin_lsx_vbitseli_b",
+                    "lsx.vbitset.b" => "__builtin_lsx_vbitset_b",
+                    "lsx.vbitset.d" => "__builtin_lsx_vbitset_d",
+                    "lsx.vbitset.h" => "__builtin_lsx_vbitset_h",
+                    "lsx.vbitset.w" => "__builtin_lsx_vbitset_w",
+                    "lsx.vbitseti.b" => "__builtin_lsx_vbitseti_b",
+                    "lsx.vbitseti.d" => "__builtin_lsx_vbitseti_d",
+                    "lsx.vbitseti.h" => "__builtin_lsx_vbitseti_h",
+                    "lsx.vbitseti.w" => "__builtin_lsx_vbitseti_w",
+                    "lsx.vbsll.v" => "__builtin_lsx_vbsll_v",
+                    "lsx.vbsrl.v" => "__builtin_lsx_vbsrl_v",
+                    "lsx.vclo.b" => "__builtin_lsx_vclo_b",
+                    "lsx.vclo.d" => "__builtin_lsx_vclo_d",
+                    "lsx.vclo.h" => "__builtin_lsx_vclo_h",
+                    "lsx.vclo.w" => "__builtin_lsx_vclo_w",
+                    "lsx.vclz.b" => "__builtin_lsx_vclz_b",
+                    "lsx.vclz.d" => "__builtin_lsx_vclz_d",
+                    "lsx.vclz.h" => "__builtin_lsx_vclz_h",
+                    "lsx.vclz.w" => "__builtin_lsx_vclz_w",
+                    "lsx.vdiv.b" => "__builtin_lsx_vdiv_b",
+                    "lsx.vdiv.bu" => "__builtin_lsx_vdiv_bu",
+                    "lsx.vdiv.d" => "__builtin_lsx_vdiv_d",
+                    "lsx.vdiv.du" => "__builtin_lsx_vdiv_du",
+                    "lsx.vdiv.h" => "__builtin_lsx_vdiv_h",
+                    "lsx.vdiv.hu" => "__builtin_lsx_vdiv_hu",
+                    "lsx.vdiv.w" => "__builtin_lsx_vdiv_w",
+                    "lsx.vdiv.wu" => "__builtin_lsx_vdiv_wu",
+                    "lsx.vexth.d.w" => "__builtin_lsx_vexth_d_w",
+                    "lsx.vexth.du.wu" => "__builtin_lsx_vexth_du_wu",
+                    "lsx.vexth.h.b" => "__builtin_lsx_vexth_h_b",
+                    "lsx.vexth.hu.bu" => "__builtin_lsx_vexth_hu_bu",
+                    "lsx.vexth.q.d" => "__builtin_lsx_vexth_q_d",
+                    "lsx.vexth.qu.du" => "__builtin_lsx_vexth_qu_du",
+                    "lsx.vexth.w.h" => "__builtin_lsx_vexth_w_h",
+                    "lsx.vexth.wu.hu" => "__builtin_lsx_vexth_wu_hu",
+                    "lsx.vextl.q.d" => "__builtin_lsx_vextl_q_d",
+                    "lsx.vextl.qu.du" => "__builtin_lsx_vextl_qu_du",
+                    "lsx.vextrins.b" => "__builtin_lsx_vextrins_b",
+                    "lsx.vextrins.d" => "__builtin_lsx_vextrins_d",
+                    "lsx.vextrins.h" => "__builtin_lsx_vextrins_h",
+                    "lsx.vextrins.w" => "__builtin_lsx_vextrins_w",
+                    "lsx.vfadd.d" => "__builtin_lsx_vfadd_d",
+                    "lsx.vfadd.s" => "__builtin_lsx_vfadd_s",
+                    "lsx.vfclass.d" => "__builtin_lsx_vfclass_d",
+                    "lsx.vfclass.s" => "__builtin_lsx_vfclass_s",
+                    "lsx.vfcmp.caf.d" => "__builtin_lsx_vfcmp_caf_d",
+                    "lsx.vfcmp.caf.s" => "__builtin_lsx_vfcmp_caf_s",
+                    "lsx.vfcmp.ceq.d" => "__builtin_lsx_vfcmp_ceq_d",
+                    "lsx.vfcmp.ceq.s" => "__builtin_lsx_vfcmp_ceq_s",
+                    "lsx.vfcmp.cle.d" => "__builtin_lsx_vfcmp_cle_d",
+                    "lsx.vfcmp.cle.s" => "__builtin_lsx_vfcmp_cle_s",
+                    "lsx.vfcmp.clt.d" => "__builtin_lsx_vfcmp_clt_d",
+                    "lsx.vfcmp.clt.s" => "__builtin_lsx_vfcmp_clt_s",
+                    "lsx.vfcmp.cne.d" => "__builtin_lsx_vfcmp_cne_d",
+                    "lsx.vfcmp.cne.s" => "__builtin_lsx_vfcmp_cne_s",
+                    "lsx.vfcmp.cor.d" => "__builtin_lsx_vfcmp_cor_d",
+                    "lsx.vfcmp.cor.s" => "__builtin_lsx_vfcmp_cor_s",
+                    "lsx.vfcmp.cueq.d" => "__builtin_lsx_vfcmp_cueq_d",
+                    "lsx.vfcmp.cueq.s" => "__builtin_lsx_vfcmp_cueq_s",
+                    "lsx.vfcmp.cule.d" => "__builtin_lsx_vfcmp_cule_d",
+                    "lsx.vfcmp.cule.s" => "__builtin_lsx_vfcmp_cule_s",
+                    "lsx.vfcmp.cult.d" => "__builtin_lsx_vfcmp_cult_d",
+                    "lsx.vfcmp.cult.s" => "__builtin_lsx_vfcmp_cult_s",
+                    "lsx.vfcmp.cun.d" => "__builtin_lsx_vfcmp_cun_d",
+                    "lsx.vfcmp.cun.s" => "__builtin_lsx_vfcmp_cun_s",
+                    "lsx.vfcmp.cune.d" => "__builtin_lsx_vfcmp_cune_d",
+                    "lsx.vfcmp.cune.s" => "__builtin_lsx_vfcmp_cune_s",
+                    "lsx.vfcmp.saf.d" => "__builtin_lsx_vfcmp_saf_d",
+                    "lsx.vfcmp.saf.s" => "__builtin_lsx_vfcmp_saf_s",
+                    "lsx.vfcmp.seq.d" => "__builtin_lsx_vfcmp_seq_d",
+                    "lsx.vfcmp.seq.s" => "__builtin_lsx_vfcmp_seq_s",
+                    "lsx.vfcmp.sle.d" => "__builtin_lsx_vfcmp_sle_d",
+                    "lsx.vfcmp.sle.s" => "__builtin_lsx_vfcmp_sle_s",
+                    "lsx.vfcmp.slt.d" => "__builtin_lsx_vfcmp_slt_d",
+                    "lsx.vfcmp.slt.s" => "__builtin_lsx_vfcmp_slt_s",
+                    "lsx.vfcmp.sne.d" => "__builtin_lsx_vfcmp_sne_d",
+                    "lsx.vfcmp.sne.s" => "__builtin_lsx_vfcmp_sne_s",
+                    "lsx.vfcmp.sor.d" => "__builtin_lsx_vfcmp_sor_d",
+                    "lsx.vfcmp.sor.s" => "__builtin_lsx_vfcmp_sor_s",
+                    "lsx.vfcmp.sueq.d" => "__builtin_lsx_vfcmp_sueq_d",
+                    "lsx.vfcmp.sueq.s" => "__builtin_lsx_vfcmp_sueq_s",
+                    "lsx.vfcmp.sule.d" => "__builtin_lsx_vfcmp_sule_d",
+                    "lsx.vfcmp.sule.s" => "__builtin_lsx_vfcmp_sule_s",
+                    "lsx.vfcmp.sult.d" => "__builtin_lsx_vfcmp_sult_d",
+                    "lsx.vfcmp.sult.s" => "__builtin_lsx_vfcmp_sult_s",
+                    "lsx.vfcmp.sun.d" => "__builtin_lsx_vfcmp_sun_d",
+                    "lsx.vfcmp.sun.s" => "__builtin_lsx_vfcmp_sun_s",
+                    "lsx.vfcmp.sune.d" => "__builtin_lsx_vfcmp_sune_d",
+                    "lsx.vfcmp.sune.s" => "__builtin_lsx_vfcmp_sune_s",
+                    "lsx.vfcvt.h.s" => "__builtin_lsx_vfcvt_h_s",
+                    "lsx.vfcvt.s.d" => "__builtin_lsx_vfcvt_s_d",
+                    "lsx.vfcvth.d.s" => "__builtin_lsx_vfcvth_d_s",
+                    "lsx.vfcvth.s.h" => "__builtin_lsx_vfcvth_s_h",
+                    "lsx.vfcvtl.d.s" => "__builtin_lsx_vfcvtl_d_s",
+                    "lsx.vfcvtl.s.h" => "__builtin_lsx_vfcvtl_s_h",
+                    "lsx.vfdiv.d" => "__builtin_lsx_vfdiv_d",
+                    "lsx.vfdiv.s" => "__builtin_lsx_vfdiv_s",
+                    "lsx.vffint.d.l" => "__builtin_lsx_vffint_d_l",
+                    "lsx.vffint.d.lu" => "__builtin_lsx_vffint_d_lu",
+                    "lsx.vffint.s.l" => "__builtin_lsx_vffint_s_l",
+                    "lsx.vffint.s.w" => "__builtin_lsx_vffint_s_w",
+                    "lsx.vffint.s.wu" => "__builtin_lsx_vffint_s_wu",
+                    "lsx.vffinth.d.w" => "__builtin_lsx_vffinth_d_w",
+                    "lsx.vffintl.d.w" => "__builtin_lsx_vffintl_d_w",
+                    "lsx.vflogb.d" => "__builtin_lsx_vflogb_d",
+                    "lsx.vflogb.s" => "__builtin_lsx_vflogb_s",
+                    "lsx.vfmadd.d" => "__builtin_lsx_vfmadd_d",
+                    "lsx.vfmadd.s" => "__builtin_lsx_vfmadd_s",
+                    "lsx.vfmax.d" => "__builtin_lsx_vfmax_d",
+                    "lsx.vfmax.s" => "__builtin_lsx_vfmax_s",
+                    "lsx.vfmaxa.d" => "__builtin_lsx_vfmaxa_d",
+                    "lsx.vfmaxa.s" => "__builtin_lsx_vfmaxa_s",
+                    "lsx.vfmin.d" => "__builtin_lsx_vfmin_d",
+                    "lsx.vfmin.s" => "__builtin_lsx_vfmin_s",
+                    "lsx.vfmina.d" => "__builtin_lsx_vfmina_d",
+                    "lsx.vfmina.s" => "__builtin_lsx_vfmina_s",
+                    "lsx.vfmsub.d" => "__builtin_lsx_vfmsub_d",
+                    "lsx.vfmsub.s" => "__builtin_lsx_vfmsub_s",
+                    "lsx.vfmul.d" => "__builtin_lsx_vfmul_d",
+                    "lsx.vfmul.s" => "__builtin_lsx_vfmul_s",
+                    "lsx.vfnmadd.d" => "__builtin_lsx_vfnmadd_d",
+                    "lsx.vfnmadd.s" => "__builtin_lsx_vfnmadd_s",
+                    "lsx.vfnmsub.d" => "__builtin_lsx_vfnmsub_d",
+                    "lsx.vfnmsub.s" => "__builtin_lsx_vfnmsub_s",
+                    "lsx.vfrecip.d" => "__builtin_lsx_vfrecip_d",
+                    "lsx.vfrecip.s" => "__builtin_lsx_vfrecip_s",
+                    "lsx.vfrecipe.d" => "__builtin_lsx_vfrecipe_d",
+                    "lsx.vfrecipe.s" => "__builtin_lsx_vfrecipe_s",
+                    "lsx.vfrint.d" => "__builtin_lsx_vfrint_d",
+                    "lsx.vfrint.s" => "__builtin_lsx_vfrint_s",
+                    "lsx.vfrintrm.d" => "__builtin_lsx_vfrintrm_d",
+                    "lsx.vfrintrm.s" => "__builtin_lsx_vfrintrm_s",
+                    "lsx.vfrintrne.d" => "__builtin_lsx_vfrintrne_d",
+                    "lsx.vfrintrne.s" => "__builtin_lsx_vfrintrne_s",
+                    "lsx.vfrintrp.d" => "__builtin_lsx_vfrintrp_d",
+                    "lsx.vfrintrp.s" => "__builtin_lsx_vfrintrp_s",
+                    "lsx.vfrintrz.d" => "__builtin_lsx_vfrintrz_d",
+                    "lsx.vfrintrz.s" => "__builtin_lsx_vfrintrz_s",
+                    "lsx.vfrsqrt.d" => "__builtin_lsx_vfrsqrt_d",
+                    "lsx.vfrsqrt.s" => "__builtin_lsx_vfrsqrt_s",
+                    "lsx.vfrsqrte.d" => "__builtin_lsx_vfrsqrte_d",
+                    "lsx.vfrsqrte.s" => "__builtin_lsx_vfrsqrte_s",
+                    "lsx.vfrstp.b" => "__builtin_lsx_vfrstp_b",
+                    "lsx.vfrstp.h" => "__builtin_lsx_vfrstp_h",
+                    "lsx.vfrstpi.b" => "__builtin_lsx_vfrstpi_b",
+                    "lsx.vfrstpi.h" => "__builtin_lsx_vfrstpi_h",
+                    "lsx.vfsqrt.d" => "__builtin_lsx_vfsqrt_d",
+                    "lsx.vfsqrt.s" => "__builtin_lsx_vfsqrt_s",
+                    "lsx.vfsub.d" => "__builtin_lsx_vfsub_d",
+                    "lsx.vfsub.s" => "__builtin_lsx_vfsub_s",
+                    "lsx.vftint.l.d" => "__builtin_lsx_vftint_l_d",
+                    "lsx.vftint.lu.d" => "__builtin_lsx_vftint_lu_d",
+                    "lsx.vftint.w.d" => "__builtin_lsx_vftint_w_d",
+                    "lsx.vftint.w.s" => "__builtin_lsx_vftint_w_s",
+                    "lsx.vftint.wu.s" => "__builtin_lsx_vftint_wu_s",
+                    "lsx.vftinth.l.s" => "__builtin_lsx_vftinth_l_s",
+                    "lsx.vftintl.l.s" => "__builtin_lsx_vftintl_l_s",
+                    "lsx.vftintrm.l.d" => "__builtin_lsx_vftintrm_l_d",
+                    "lsx.vftintrm.w.d" => "__builtin_lsx_vftintrm_w_d",
+                    "lsx.vftintrm.w.s" => "__builtin_lsx_vftintrm_w_s",
+                    "lsx.vftintrmh.l.s" => "__builtin_lsx_vftintrmh_l_s",
+                    "lsx.vftintrml.l.s" => "__builtin_lsx_vftintrml_l_s",
+                    "lsx.vftintrne.l.d" => "__builtin_lsx_vftintrne_l_d",
+                    "lsx.vftintrne.w.d" => "__builtin_lsx_vftintrne_w_d",
+                    "lsx.vftintrne.w.s" => "__builtin_lsx_vftintrne_w_s",
+                    "lsx.vftintrneh.l.s" => "__builtin_lsx_vftintrneh_l_s",
+                    "lsx.vftintrnel.l.s" => "__builtin_lsx_vftintrnel_l_s",
+                    "lsx.vftintrp.l.d" => "__builtin_lsx_vftintrp_l_d",
+                    "lsx.vftintrp.w.d" => "__builtin_lsx_vftintrp_w_d",
+                    "lsx.vftintrp.w.s" => "__builtin_lsx_vftintrp_w_s",
+                    "lsx.vftintrph.l.s" => "__builtin_lsx_vftintrph_l_s",
+                    "lsx.vftintrpl.l.s" => "__builtin_lsx_vftintrpl_l_s",
+                    "lsx.vftintrz.l.d" => "__builtin_lsx_vftintrz_l_d",
+                    "lsx.vftintrz.lu.d" => "__builtin_lsx_vftintrz_lu_d",
+                    "lsx.vftintrz.w.d" => "__builtin_lsx_vftintrz_w_d",
+                    "lsx.vftintrz.w.s" => "__builtin_lsx_vftintrz_w_s",
+                    "lsx.vftintrz.wu.s" => "__builtin_lsx_vftintrz_wu_s",
+                    "lsx.vftintrzh.l.s" => "__builtin_lsx_vftintrzh_l_s",
+                    "lsx.vftintrzl.l.s" => "__builtin_lsx_vftintrzl_l_s",
+                    "lsx.vhaddw.d.w" => "__builtin_lsx_vhaddw_d_w",
+                    "lsx.vhaddw.du.wu" => "__builtin_lsx_vhaddw_du_wu",
+                    "lsx.vhaddw.h.b" => "__builtin_lsx_vhaddw_h_b",
+                    "lsx.vhaddw.hu.bu" => "__builtin_lsx_vhaddw_hu_bu",
+                    "lsx.vhaddw.q.d" => "__builtin_lsx_vhaddw_q_d",
+                    "lsx.vhaddw.qu.du" => "__builtin_lsx_vhaddw_qu_du",
+                    "lsx.vhaddw.w.h" => "__builtin_lsx_vhaddw_w_h",
+                    "lsx.vhaddw.wu.hu" => "__builtin_lsx_vhaddw_wu_hu",
+                    "lsx.vhsubw.d.w" => "__builtin_lsx_vhsubw_d_w",
+                    "lsx.vhsubw.du.wu" => "__builtin_lsx_vhsubw_du_wu",
+                    "lsx.vhsubw.h.b" => "__builtin_lsx_vhsubw_h_b",
+                    "lsx.vhsubw.hu.bu" => "__builtin_lsx_vhsubw_hu_bu",
+                    "lsx.vhsubw.q.d" => "__builtin_lsx_vhsubw_q_d",
+                    "lsx.vhsubw.qu.du" => "__builtin_lsx_vhsubw_qu_du",
+                    "lsx.vhsubw.w.h" => "__builtin_lsx_vhsubw_w_h",
+                    "lsx.vhsubw.wu.hu" => "__builtin_lsx_vhsubw_wu_hu",
+                    "lsx.vilvh.b" => "__builtin_lsx_vilvh_b",
+                    "lsx.vilvh.d" => "__builtin_lsx_vilvh_d",
+                    "lsx.vilvh.h" => "__builtin_lsx_vilvh_h",
+                    "lsx.vilvh.w" => "__builtin_lsx_vilvh_w",
+                    "lsx.vilvl.b" => "__builtin_lsx_vilvl_b",
+                    "lsx.vilvl.d" => "__builtin_lsx_vilvl_d",
+                    "lsx.vilvl.h" => "__builtin_lsx_vilvl_h",
+                    "lsx.vilvl.w" => "__builtin_lsx_vilvl_w",
+                    "lsx.vinsgr2vr.b" => "__builtin_lsx_vinsgr2vr_b",
+                    "lsx.vinsgr2vr.d" => "__builtin_lsx_vinsgr2vr_d",
+                    "lsx.vinsgr2vr.h" => "__builtin_lsx_vinsgr2vr_h",
+                    "lsx.vinsgr2vr.w" => "__builtin_lsx_vinsgr2vr_w",
+                    "lsx.vld" => "__builtin_lsx_vld",
+                    "lsx.vldi" => "__builtin_lsx_vldi",
+                    "lsx.vldrepl.b" => "__builtin_lsx_vldrepl_b",
+                    "lsx.vldrepl.d" => "__builtin_lsx_vldrepl_d",
+                    "lsx.vldrepl.h" => "__builtin_lsx_vldrepl_h",
+                    "lsx.vldrepl.w" => "__builtin_lsx_vldrepl_w",
+                    "lsx.vldx" => "__builtin_lsx_vldx",
+                    "lsx.vmadd.b" => "__builtin_lsx_vmadd_b",
+                    "lsx.vmadd.d" => "__builtin_lsx_vmadd_d",
+                    "lsx.vmadd.h" => "__builtin_lsx_vmadd_h",
+                    "lsx.vmadd.w" => "__builtin_lsx_vmadd_w",
+                    "lsx.vmaddwev.d.w" => "__builtin_lsx_vmaddwev_d_w",
+                    "lsx.vmaddwev.d.wu" => "__builtin_lsx_vmaddwev_d_wu",
+                    "lsx.vmaddwev.d.wu.w" => "__builtin_lsx_vmaddwev_d_wu_w",
+                    "lsx.vmaddwev.h.b" => "__builtin_lsx_vmaddwev_h_b",
+                    "lsx.vmaddwev.h.bu" => "__builtin_lsx_vmaddwev_h_bu",
+                    "lsx.vmaddwev.h.bu.b" => "__builtin_lsx_vmaddwev_h_bu_b",
+                    "lsx.vmaddwev.q.d" => "__builtin_lsx_vmaddwev_q_d",
+                    "lsx.vmaddwev.q.du" => "__builtin_lsx_vmaddwev_q_du",
+                    "lsx.vmaddwev.q.du.d" => "__builtin_lsx_vmaddwev_q_du_d",
+                    "lsx.vmaddwev.w.h" => "__builtin_lsx_vmaddwev_w_h",
+                    "lsx.vmaddwev.w.hu" => "__builtin_lsx_vmaddwev_w_hu",
+                    "lsx.vmaddwev.w.hu.h" => "__builtin_lsx_vmaddwev_w_hu_h",
+                    "lsx.vmaddwod.d.w" => "__builtin_lsx_vmaddwod_d_w",
+                    "lsx.vmaddwod.d.wu" => "__builtin_lsx_vmaddwod_d_wu",
+                    "lsx.vmaddwod.d.wu.w" => "__builtin_lsx_vmaddwod_d_wu_w",
+                    "lsx.vmaddwod.h.b" => "__builtin_lsx_vmaddwod_h_b",
+                    "lsx.vmaddwod.h.bu" => "__builtin_lsx_vmaddwod_h_bu",
+                    "lsx.vmaddwod.h.bu.b" => "__builtin_lsx_vmaddwod_h_bu_b",
+                    "lsx.vmaddwod.q.d" => "__builtin_lsx_vmaddwod_q_d",
+                    "lsx.vmaddwod.q.du" => "__builtin_lsx_vmaddwod_q_du",
+                    "lsx.vmaddwod.q.du.d" => "__builtin_lsx_vmaddwod_q_du_d",
+                    "lsx.vmaddwod.w.h" => "__builtin_lsx_vmaddwod_w_h",
+                    "lsx.vmaddwod.w.hu" => "__builtin_lsx_vmaddwod_w_hu",
+                    "lsx.vmaddwod.w.hu.h" => "__builtin_lsx_vmaddwod_w_hu_h",
+                    "lsx.vmax.b" => "__builtin_lsx_vmax_b",
+                    "lsx.vmax.bu" => "__builtin_lsx_vmax_bu",
+                    "lsx.vmax.d" => "__builtin_lsx_vmax_d",
+                    "lsx.vmax.du" => "__builtin_lsx_vmax_du",
+                    "lsx.vmax.h" => "__builtin_lsx_vmax_h",
+                    "lsx.vmax.hu" => "__builtin_lsx_vmax_hu",
+                    "lsx.vmax.w" => "__builtin_lsx_vmax_w",
+                    "lsx.vmax.wu" => "__builtin_lsx_vmax_wu",
+                    "lsx.vmaxi.b" => "__builtin_lsx_vmaxi_b",
+                    "lsx.vmaxi.bu" => "__builtin_lsx_vmaxi_bu",
+                    "lsx.vmaxi.d" => "__builtin_lsx_vmaxi_d",
+                    "lsx.vmaxi.du" => "__builtin_lsx_vmaxi_du",
+                    "lsx.vmaxi.h" => "__builtin_lsx_vmaxi_h",
+                    "lsx.vmaxi.hu" => "__builtin_lsx_vmaxi_hu",
+                    "lsx.vmaxi.w" => "__builtin_lsx_vmaxi_w",
+                    "lsx.vmaxi.wu" => "__builtin_lsx_vmaxi_wu",
+                    "lsx.vmin.b" => "__builtin_lsx_vmin_b",
+                    "lsx.vmin.bu" => "__builtin_lsx_vmin_bu",
+                    "lsx.vmin.d" => "__builtin_lsx_vmin_d",
+                    "lsx.vmin.du" => "__builtin_lsx_vmin_du",
+                    "lsx.vmin.h" => "__builtin_lsx_vmin_h",
+                    "lsx.vmin.hu" => "__builtin_lsx_vmin_hu",
+                    "lsx.vmin.w" => "__builtin_lsx_vmin_w",
+                    "lsx.vmin.wu" => "__builtin_lsx_vmin_wu",
+                    "lsx.vmini.b" => "__builtin_lsx_vmini_b",
+                    "lsx.vmini.bu" => "__builtin_lsx_vmini_bu",
+                    "lsx.vmini.d" => "__builtin_lsx_vmini_d",
+                    "lsx.vmini.du" => "__builtin_lsx_vmini_du",
+                    "lsx.vmini.h" => "__builtin_lsx_vmini_h",
+                    "lsx.vmini.hu" => "__builtin_lsx_vmini_hu",
+                    "lsx.vmini.w" => "__builtin_lsx_vmini_w",
+                    "lsx.vmini.wu" => "__builtin_lsx_vmini_wu",
+                    "lsx.vmod.b" => "__builtin_lsx_vmod_b",
+                    "lsx.vmod.bu" => "__builtin_lsx_vmod_bu",
+                    "lsx.vmod.d" => "__builtin_lsx_vmod_d",
+                    "lsx.vmod.du" => "__builtin_lsx_vmod_du",
+                    "lsx.vmod.h" => "__builtin_lsx_vmod_h",
+                    "lsx.vmod.hu" => "__builtin_lsx_vmod_hu",
+                    "lsx.vmod.w" => "__builtin_lsx_vmod_w",
+                    "lsx.vmod.wu" => "__builtin_lsx_vmod_wu",
+                    "lsx.vmskgez.b" => "__builtin_lsx_vmskgez_b",
+                    "lsx.vmskltz.b" => "__builtin_lsx_vmskltz_b",
+                    "lsx.vmskltz.d" => "__builtin_lsx_vmskltz_d",
+                    "lsx.vmskltz.h" => "__builtin_lsx_vmskltz_h",
+                    "lsx.vmskltz.w" => "__builtin_lsx_vmskltz_w",
+                    "lsx.vmsknz.b" => "__builtin_lsx_vmsknz_b",
+                    "lsx.vmsub.b" => "__builtin_lsx_vmsub_b",
+                    "lsx.vmsub.d" => "__builtin_lsx_vmsub_d",
+                    "lsx.vmsub.h" => "__builtin_lsx_vmsub_h",
+                    "lsx.vmsub.w" => "__builtin_lsx_vmsub_w",
+                    "lsx.vmuh.b" => "__builtin_lsx_vmuh_b",
+                    "lsx.vmuh.bu" => "__builtin_lsx_vmuh_bu",
+                    "lsx.vmuh.d" => "__builtin_lsx_vmuh_d",
+                    "lsx.vmuh.du" => "__builtin_lsx_vmuh_du",
+                    "lsx.vmuh.h" => "__builtin_lsx_vmuh_h",
+                    "lsx.vmuh.hu" => "__builtin_lsx_vmuh_hu",
+                    "lsx.vmuh.w" => "__builtin_lsx_vmuh_w",
+                    "lsx.vmuh.wu" => "__builtin_lsx_vmuh_wu",
+                    "lsx.vmul.b" => "__builtin_lsx_vmul_b",
+                    "lsx.vmul.d" => "__builtin_lsx_vmul_d",
+                    "lsx.vmul.h" => "__builtin_lsx_vmul_h",
+                    "lsx.vmul.w" => "__builtin_lsx_vmul_w",
+                    "lsx.vmulwev.d.w" => "__builtin_lsx_vmulwev_d_w",
+                    "lsx.vmulwev.d.wu" => "__builtin_lsx_vmulwev_d_wu",
+                    "lsx.vmulwev.d.wu.w" => "__builtin_lsx_vmulwev_d_wu_w",
+                    "lsx.vmulwev.h.b" => "__builtin_lsx_vmulwev_h_b",
+                    "lsx.vmulwev.h.bu" => "__builtin_lsx_vmulwev_h_bu",
+                    "lsx.vmulwev.h.bu.b" => "__builtin_lsx_vmulwev_h_bu_b",
+                    "lsx.vmulwev.q.d" => "__builtin_lsx_vmulwev_q_d",
+                    "lsx.vmulwev.q.du" => "__builtin_lsx_vmulwev_q_du",
+                    "lsx.vmulwev.q.du.d" => "__builtin_lsx_vmulwev_q_du_d",
+                    "lsx.vmulwev.w.h" => "__builtin_lsx_vmulwev_w_h",
+                    "lsx.vmulwev.w.hu" => "__builtin_lsx_vmulwev_w_hu",
+                    "lsx.vmulwev.w.hu.h" => "__builtin_lsx_vmulwev_w_hu_h",
+                    "lsx.vmulwod.d.w" => "__builtin_lsx_vmulwod_d_w",
+                    "lsx.vmulwod.d.wu" => "__builtin_lsx_vmulwod_d_wu",
+                    "lsx.vmulwod.d.wu.w" => "__builtin_lsx_vmulwod_d_wu_w",
+                    "lsx.vmulwod.h.b" => "__builtin_lsx_vmulwod_h_b",
+                    "lsx.vmulwod.h.bu" => "__builtin_lsx_vmulwod_h_bu",
+                    "lsx.vmulwod.h.bu.b" => "__builtin_lsx_vmulwod_h_bu_b",
+                    "lsx.vmulwod.q.d" => "__builtin_lsx_vmulwod_q_d",
+                    "lsx.vmulwod.q.du" => "__builtin_lsx_vmulwod_q_du",
+                    "lsx.vmulwod.q.du.d" => "__builtin_lsx_vmulwod_q_du_d",
+                    "lsx.vmulwod.w.h" => "__builtin_lsx_vmulwod_w_h",
+                    "lsx.vmulwod.w.hu" => "__builtin_lsx_vmulwod_w_hu",
+                    "lsx.vmulwod.w.hu.h" => "__builtin_lsx_vmulwod_w_hu_h",
+                    "lsx.vneg.b" => "__builtin_lsx_vneg_b",
+                    "lsx.vneg.d" => "__builtin_lsx_vneg_d",
+                    "lsx.vneg.h" => "__builtin_lsx_vneg_h",
+                    "lsx.vneg.w" => "__builtin_lsx_vneg_w",
+                    "lsx.vnor.v" => "__builtin_lsx_vnor_v",
+                    "lsx.vnori.b" => "__builtin_lsx_vnori_b",
+                    "lsx.vor.v" => "__builtin_lsx_vor_v",
+                    "lsx.vori.b" => "__builtin_lsx_vori_b",
+                    "lsx.vorn.v" => "__builtin_lsx_vorn_v",
+                    "lsx.vpackev.b" => "__builtin_lsx_vpackev_b",
+                    "lsx.vpackev.d" => "__builtin_lsx_vpackev_d",
+                    "lsx.vpackev.h" => "__builtin_lsx_vpackev_h",
+                    "lsx.vpackev.w" => "__builtin_lsx_vpackev_w",
+                    "lsx.vpackod.b" => "__builtin_lsx_vpackod_b",
+                    "lsx.vpackod.d" => "__builtin_lsx_vpackod_d",
+                    "lsx.vpackod.h" => "__builtin_lsx_vpackod_h",
+                    "lsx.vpackod.w" => "__builtin_lsx_vpackod_w",
+                    "lsx.vpcnt.b" => "__builtin_lsx_vpcnt_b",
+                    "lsx.vpcnt.d" => "__builtin_lsx_vpcnt_d",
+                    "lsx.vpcnt.h" => "__builtin_lsx_vpcnt_h",
+                    "lsx.vpcnt.w" => "__builtin_lsx_vpcnt_w",
+                    "lsx.vpermi.w" => "__builtin_lsx_vpermi_w",
+                    "lsx.vpickev.b" => "__builtin_lsx_vpickev_b",
+                    "lsx.vpickev.d" => "__builtin_lsx_vpickev_d",
+                    "lsx.vpickev.h" => "__builtin_lsx_vpickev_h",
+                    "lsx.vpickev.w" => "__builtin_lsx_vpickev_w",
+                    "lsx.vpickod.b" => "__builtin_lsx_vpickod_b",
+                    "lsx.vpickod.d" => "__builtin_lsx_vpickod_d",
+                    "lsx.vpickod.h" => "__builtin_lsx_vpickod_h",
+                    "lsx.vpickod.w" => "__builtin_lsx_vpickod_w",
+                    "lsx.vpickve2gr.b" => "__builtin_lsx_vpickve2gr_b",
+                    "lsx.vpickve2gr.bu" => "__builtin_lsx_vpickve2gr_bu",
+                    "lsx.vpickve2gr.d" => "__builtin_lsx_vpickve2gr_d",
+                    "lsx.vpickve2gr.du" => "__builtin_lsx_vpickve2gr_du",
+                    "lsx.vpickve2gr.h" => "__builtin_lsx_vpickve2gr_h",
+                    "lsx.vpickve2gr.hu" => "__builtin_lsx_vpickve2gr_hu",
+                    "lsx.vpickve2gr.w" => "__builtin_lsx_vpickve2gr_w",
+                    "lsx.vpickve2gr.wu" => "__builtin_lsx_vpickve2gr_wu",
+                    "lsx.vreplgr2vr.b" => "__builtin_lsx_vreplgr2vr_b",
+                    "lsx.vreplgr2vr.d" => "__builtin_lsx_vreplgr2vr_d",
+                    "lsx.vreplgr2vr.h" => "__builtin_lsx_vreplgr2vr_h",
+                    "lsx.vreplgr2vr.w" => "__builtin_lsx_vreplgr2vr_w",
+                    "lsx.vrepli.b" => "__builtin_lsx_vrepli_b",
+                    "lsx.vrepli.d" => "__builtin_lsx_vrepli_d",
+                    "lsx.vrepli.h" => "__builtin_lsx_vrepli_h",
+                    "lsx.vrepli.w" => "__builtin_lsx_vrepli_w",
+                    "lsx.vreplve.b" => "__builtin_lsx_vreplve_b",
+                    "lsx.vreplve.d" => "__builtin_lsx_vreplve_d",
+                    "lsx.vreplve.h" => "__builtin_lsx_vreplve_h",
+                    "lsx.vreplve.w" => "__builtin_lsx_vreplve_w",
+                    "lsx.vreplvei.b" => "__builtin_lsx_vreplvei_b",
+                    "lsx.vreplvei.d" => "__builtin_lsx_vreplvei_d",
+                    "lsx.vreplvei.h" => "__builtin_lsx_vreplvei_h",
+                    "lsx.vreplvei.w" => "__builtin_lsx_vreplvei_w",
+                    "lsx.vrotr.b" => "__builtin_lsx_vrotr_b",
+                    "lsx.vrotr.d" => "__builtin_lsx_vrotr_d",
+                    "lsx.vrotr.h" => "__builtin_lsx_vrotr_h",
+                    "lsx.vrotr.w" => "__builtin_lsx_vrotr_w",
+                    "lsx.vrotri.b" => "__builtin_lsx_vrotri_b",
+                    "lsx.vrotri.d" => "__builtin_lsx_vrotri_d",
+                    "lsx.vrotri.h" => "__builtin_lsx_vrotri_h",
+                    "lsx.vrotri.w" => "__builtin_lsx_vrotri_w",
+                    "lsx.vsadd.b" => "__builtin_lsx_vsadd_b",
+                    "lsx.vsadd.bu" => "__builtin_lsx_vsadd_bu",
+                    "lsx.vsadd.d" => "__builtin_lsx_vsadd_d",
+                    "lsx.vsadd.du" => "__builtin_lsx_vsadd_du",
+                    "lsx.vsadd.h" => "__builtin_lsx_vsadd_h",
+                    "lsx.vsadd.hu" => "__builtin_lsx_vsadd_hu",
+                    "lsx.vsadd.w" => "__builtin_lsx_vsadd_w",
+                    "lsx.vsadd.wu" => "__builtin_lsx_vsadd_wu",
+                    "lsx.vsat.b" => "__builtin_lsx_vsat_b",
+                    "lsx.vsat.bu" => "__builtin_lsx_vsat_bu",
+                    "lsx.vsat.d" => "__builtin_lsx_vsat_d",
+                    "lsx.vsat.du" => "__builtin_lsx_vsat_du",
+                    "lsx.vsat.h" => "__builtin_lsx_vsat_h",
+                    "lsx.vsat.hu" => "__builtin_lsx_vsat_hu",
+                    "lsx.vsat.w" => "__builtin_lsx_vsat_w",
+                    "lsx.vsat.wu" => "__builtin_lsx_vsat_wu",
+                    "lsx.vseq.b" => "__builtin_lsx_vseq_b",
+                    "lsx.vseq.d" => "__builtin_lsx_vseq_d",
+                    "lsx.vseq.h" => "__builtin_lsx_vseq_h",
+                    "lsx.vseq.w" => "__builtin_lsx_vseq_w",
+                    "lsx.vseqi.b" => "__builtin_lsx_vseqi_b",
+                    "lsx.vseqi.d" => "__builtin_lsx_vseqi_d",
+                    "lsx.vseqi.h" => "__builtin_lsx_vseqi_h",
+                    "lsx.vseqi.w" => "__builtin_lsx_vseqi_w",
+                    "lsx.vshuf.b" => "__builtin_lsx_vshuf_b",
+                    "lsx.vshuf.d" => "__builtin_lsx_vshuf_d",
+                    "lsx.vshuf.h" => "__builtin_lsx_vshuf_h",
+                    "lsx.vshuf.w" => "__builtin_lsx_vshuf_w",
+                    "lsx.vshuf4i.b" => "__builtin_lsx_vshuf4i_b",
+                    "lsx.vshuf4i.d" => "__builtin_lsx_vshuf4i_d",
+                    "lsx.vshuf4i.h" => "__builtin_lsx_vshuf4i_h",
+                    "lsx.vshuf4i.w" => "__builtin_lsx_vshuf4i_w",
+                    "lsx.vsigncov.b" => "__builtin_lsx_vsigncov_b",
+                    "lsx.vsigncov.d" => "__builtin_lsx_vsigncov_d",
+                    "lsx.vsigncov.h" => "__builtin_lsx_vsigncov_h",
+                    "lsx.vsigncov.w" => "__builtin_lsx_vsigncov_w",
+                    "lsx.vsle.b" => "__builtin_lsx_vsle_b",
+                    "lsx.vsle.bu" => "__builtin_lsx_vsle_bu",
+                    "lsx.vsle.d" => "__builtin_lsx_vsle_d",
+                    "lsx.vsle.du" => "__builtin_lsx_vsle_du",
+                    "lsx.vsle.h" => "__builtin_lsx_vsle_h",
+                    "lsx.vsle.hu" => "__builtin_lsx_vsle_hu",
+                    "lsx.vsle.w" => "__builtin_lsx_vsle_w",
+                    "lsx.vsle.wu" => "__builtin_lsx_vsle_wu",
+                    "lsx.vslei.b" => "__builtin_lsx_vslei_b",
+                    "lsx.vslei.bu" => "__builtin_lsx_vslei_bu",
+                    "lsx.vslei.d" => "__builtin_lsx_vslei_d",
+                    "lsx.vslei.du" => "__builtin_lsx_vslei_du",
+                    "lsx.vslei.h" => "__builtin_lsx_vslei_h",
+                    "lsx.vslei.hu" => "__builtin_lsx_vslei_hu",
+                    "lsx.vslei.w" => "__builtin_lsx_vslei_w",
+                    "lsx.vslei.wu" => "__builtin_lsx_vslei_wu",
+                    "lsx.vsll.b" => "__builtin_lsx_vsll_b",
+                    "lsx.vsll.d" => "__builtin_lsx_vsll_d",
+                    "lsx.vsll.h" => "__builtin_lsx_vsll_h",
+                    "lsx.vsll.w" => "__builtin_lsx_vsll_w",
+                    "lsx.vslli.b" => "__builtin_lsx_vslli_b",
+                    "lsx.vslli.d" => "__builtin_lsx_vslli_d",
+                    "lsx.vslli.h" => "__builtin_lsx_vslli_h",
+                    "lsx.vslli.w" => "__builtin_lsx_vslli_w",
+                    "lsx.vsllwil.d.w" => "__builtin_lsx_vsllwil_d_w",
+                    "lsx.vsllwil.du.wu" => "__builtin_lsx_vsllwil_du_wu",
+                    "lsx.vsllwil.h.b" => "__builtin_lsx_vsllwil_h_b",
+                    "lsx.vsllwil.hu.bu" => "__builtin_lsx_vsllwil_hu_bu",
+                    "lsx.vsllwil.w.h" => "__builtin_lsx_vsllwil_w_h",
+                    "lsx.vsllwil.wu.hu" => "__builtin_lsx_vsllwil_wu_hu",
+                    "lsx.vslt.b" => "__builtin_lsx_vslt_b",
+                    "lsx.vslt.bu" => "__builtin_lsx_vslt_bu",
+                    "lsx.vslt.d" => "__builtin_lsx_vslt_d",
+                    "lsx.vslt.du" => "__builtin_lsx_vslt_du",
+                    "lsx.vslt.h" => "__builtin_lsx_vslt_h",
+                    "lsx.vslt.hu" => "__builtin_lsx_vslt_hu",
+                    "lsx.vslt.w" => "__builtin_lsx_vslt_w",
+                    "lsx.vslt.wu" => "__builtin_lsx_vslt_wu",
+                    "lsx.vslti.b" => "__builtin_lsx_vslti_b",
+                    "lsx.vslti.bu" => "__builtin_lsx_vslti_bu",
+                    "lsx.vslti.d" => "__builtin_lsx_vslti_d",
+                    "lsx.vslti.du" => "__builtin_lsx_vslti_du",
+                    "lsx.vslti.h" => "__builtin_lsx_vslti_h",
+                    "lsx.vslti.hu" => "__builtin_lsx_vslti_hu",
+                    "lsx.vslti.w" => "__builtin_lsx_vslti_w",
+                    "lsx.vslti.wu" => "__builtin_lsx_vslti_wu",
+                    "lsx.vsra.b" => "__builtin_lsx_vsra_b",
+                    "lsx.vsra.d" => "__builtin_lsx_vsra_d",
+                    "lsx.vsra.h" => "__builtin_lsx_vsra_h",
+                    "lsx.vsra.w" => "__builtin_lsx_vsra_w",
+                    "lsx.vsrai.b" => "__builtin_lsx_vsrai_b",
+                    "lsx.vsrai.d" => "__builtin_lsx_vsrai_d",
+                    "lsx.vsrai.h" => "__builtin_lsx_vsrai_h",
+                    "lsx.vsrai.w" => "__builtin_lsx_vsrai_w",
+                    "lsx.vsran.b.h" => "__builtin_lsx_vsran_b_h",
+                    "lsx.vsran.h.w" => "__builtin_lsx_vsran_h_w",
+                    "lsx.vsran.w.d" => "__builtin_lsx_vsran_w_d",
+                    "lsx.vsrani.b.h" => "__builtin_lsx_vsrani_b_h",
+                    "lsx.vsrani.d.q" => "__builtin_lsx_vsrani_d_q",
+                    "lsx.vsrani.h.w" => "__builtin_lsx_vsrani_h_w",
+                    "lsx.vsrani.w.d" => "__builtin_lsx_vsrani_w_d",
+                    "lsx.vsrar.b" => "__builtin_lsx_vsrar_b",
+                    "lsx.vsrar.d" => "__builtin_lsx_vsrar_d",
+                    "lsx.vsrar.h" => "__builtin_lsx_vsrar_h",
+                    "lsx.vsrar.w" => "__builtin_lsx_vsrar_w",
+                    "lsx.vsrari.b" => "__builtin_lsx_vsrari_b",
+                    "lsx.vsrari.d" => "__builtin_lsx_vsrari_d",
+                    "lsx.vsrari.h" => "__builtin_lsx_vsrari_h",
+                    "lsx.vsrari.w" => "__builtin_lsx_vsrari_w",
+                    "lsx.vsrarn.b.h" => "__builtin_lsx_vsrarn_b_h",
+                    "lsx.vsrarn.h.w" => "__builtin_lsx_vsrarn_h_w",
+                    "lsx.vsrarn.w.d" => "__builtin_lsx_vsrarn_w_d",
+                    "lsx.vsrarni.b.h" => "__builtin_lsx_vsrarni_b_h",
+                    "lsx.vsrarni.d.q" => "__builtin_lsx_vsrarni_d_q",
+                    "lsx.vsrarni.h.w" => "__builtin_lsx_vsrarni_h_w",
+                    "lsx.vsrarni.w.d" => "__builtin_lsx_vsrarni_w_d",
+                    "lsx.vsrl.b" => "__builtin_lsx_vsrl_b",
+                    "lsx.vsrl.d" => "__builtin_lsx_vsrl_d",
+                    "lsx.vsrl.h" => "__builtin_lsx_vsrl_h",
+                    "lsx.vsrl.w" => "__builtin_lsx_vsrl_w",
+                    "lsx.vsrli.b" => "__builtin_lsx_vsrli_b",
+                    "lsx.vsrli.d" => "__builtin_lsx_vsrli_d",
+                    "lsx.vsrli.h" => "__builtin_lsx_vsrli_h",
+                    "lsx.vsrli.w" => "__builtin_lsx_vsrli_w",
+                    "lsx.vsrln.b.h" => "__builtin_lsx_vsrln_b_h",
+                    "lsx.vsrln.h.w" => "__builtin_lsx_vsrln_h_w",
+                    "lsx.vsrln.w.d" => "__builtin_lsx_vsrln_w_d",
+                    "lsx.vsrlni.b.h" => "__builtin_lsx_vsrlni_b_h",
+                    "lsx.vsrlni.d.q" => "__builtin_lsx_vsrlni_d_q",
+                    "lsx.vsrlni.h.w" => "__builtin_lsx_vsrlni_h_w",
+                    "lsx.vsrlni.w.d" => "__builtin_lsx_vsrlni_w_d",
+                    "lsx.vsrlr.b" => "__builtin_lsx_vsrlr_b",
+                    "lsx.vsrlr.d" => "__builtin_lsx_vsrlr_d",
+                    "lsx.vsrlr.h" => "__builtin_lsx_vsrlr_h",
+                    "lsx.vsrlr.w" => "__builtin_lsx_vsrlr_w",
+                    "lsx.vsrlri.b" => "__builtin_lsx_vsrlri_b",
+                    "lsx.vsrlri.d" => "__builtin_lsx_vsrlri_d",
+                    "lsx.vsrlri.h" => "__builtin_lsx_vsrlri_h",
+                    "lsx.vsrlri.w" => "__builtin_lsx_vsrlri_w",
+                    "lsx.vsrlrn.b.h" => "__builtin_lsx_vsrlrn_b_h",
+                    "lsx.vsrlrn.h.w" => "__builtin_lsx_vsrlrn_h_w",
+                    "lsx.vsrlrn.w.d" => "__builtin_lsx_vsrlrn_w_d",
+                    "lsx.vsrlrni.b.h" => "__builtin_lsx_vsrlrni_b_h",
+                    "lsx.vsrlrni.d.q" => "__builtin_lsx_vsrlrni_d_q",
+                    "lsx.vsrlrni.h.w" => "__builtin_lsx_vsrlrni_h_w",
+                    "lsx.vsrlrni.w.d" => "__builtin_lsx_vsrlrni_w_d",
+                    "lsx.vssran.b.h" => "__builtin_lsx_vssran_b_h",
+                    "lsx.vssran.bu.h" => "__builtin_lsx_vssran_bu_h",
+                    "lsx.vssran.h.w" => "__builtin_lsx_vssran_h_w",
+                    "lsx.vssran.hu.w" => "__builtin_lsx_vssran_hu_w",
+                    "lsx.vssran.w.d" => "__builtin_lsx_vssran_w_d",
+                    "lsx.vssran.wu.d" => "__builtin_lsx_vssran_wu_d",
+                    "lsx.vssrani.b.h" => "__builtin_lsx_vssrani_b_h",
+                    "lsx.vssrani.bu.h" => "__builtin_lsx_vssrani_bu_h",
+                    "lsx.vssrani.d.q" => "__builtin_lsx_vssrani_d_q",
+                    "lsx.vssrani.du.q" => "__builtin_lsx_vssrani_du_q",
+                    "lsx.vssrani.h.w" => "__builtin_lsx_vssrani_h_w",
+                    "lsx.vssrani.hu.w" => "__builtin_lsx_vssrani_hu_w",
+                    "lsx.vssrani.w.d" => "__builtin_lsx_vssrani_w_d",
+                    "lsx.vssrani.wu.d" => "__builtin_lsx_vssrani_wu_d",
+                    "lsx.vssrarn.b.h" => "__builtin_lsx_vssrarn_b_h",
+                    "lsx.vssrarn.bu.h" => "__builtin_lsx_vssrarn_bu_h",
+                    "lsx.vssrarn.h.w" => "__builtin_lsx_vssrarn_h_w",
+                    "lsx.vssrarn.hu.w" => "__builtin_lsx_vssrarn_hu_w",
+                    "lsx.vssrarn.w.d" => "__builtin_lsx_vssrarn_w_d",
+                    "lsx.vssrarn.wu.d" => "__builtin_lsx_vssrarn_wu_d",
+                    "lsx.vssrarni.b.h" => "__builtin_lsx_vssrarni_b_h",
+                    "lsx.vssrarni.bu.h" => "__builtin_lsx_vssrarni_bu_h",
+                    "lsx.vssrarni.d.q" => "__builtin_lsx_vssrarni_d_q",
+                    "lsx.vssrarni.du.q" => "__builtin_lsx_vssrarni_du_q",
+                    "lsx.vssrarni.h.w" => "__builtin_lsx_vssrarni_h_w",
+                    "lsx.vssrarni.hu.w" => "__builtin_lsx_vssrarni_hu_w",
+                    "lsx.vssrarni.w.d" => "__builtin_lsx_vssrarni_w_d",
+                    "lsx.vssrarni.wu.d" => "__builtin_lsx_vssrarni_wu_d",
+                    "lsx.vssrln.b.h" => "__builtin_lsx_vssrln_b_h",
+                    "lsx.vssrln.bu.h" => "__builtin_lsx_vssrln_bu_h",
+                    "lsx.vssrln.h.w" => "__builtin_lsx_vssrln_h_w",
+                    "lsx.vssrln.hu.w" => "__builtin_lsx_vssrln_hu_w",
+                    "lsx.vssrln.w.d" => "__builtin_lsx_vssrln_w_d",
+                    "lsx.vssrln.wu.d" => "__builtin_lsx_vssrln_wu_d",
+                    "lsx.vssrlni.b.h" => "__builtin_lsx_vssrlni_b_h",
+                    "lsx.vssrlni.bu.h" => "__builtin_lsx_vssrlni_bu_h",
+                    "lsx.vssrlni.d.q" => "__builtin_lsx_vssrlni_d_q",
+                    "lsx.vssrlni.du.q" => "__builtin_lsx_vssrlni_du_q",
+                    "lsx.vssrlni.h.w" => "__builtin_lsx_vssrlni_h_w",
+                    "lsx.vssrlni.hu.w" => "__builtin_lsx_vssrlni_hu_w",
+                    "lsx.vssrlni.w.d" => "__builtin_lsx_vssrlni_w_d",
+                    "lsx.vssrlni.wu.d" => "__builtin_lsx_vssrlni_wu_d",
+                    "lsx.vssrlrn.b.h" => "__builtin_lsx_vssrlrn_b_h",
+                    "lsx.vssrlrn.bu.h" => "__builtin_lsx_vssrlrn_bu_h",
+                    "lsx.vssrlrn.h.w" => "__builtin_lsx_vssrlrn_h_w",
+                    "lsx.vssrlrn.hu.w" => "__builtin_lsx_vssrlrn_hu_w",
+                    "lsx.vssrlrn.w.d" => "__builtin_lsx_vssrlrn_w_d",
+                    "lsx.vssrlrn.wu.d" => "__builtin_lsx_vssrlrn_wu_d",
+                    "lsx.vssrlrni.b.h" => "__builtin_lsx_vssrlrni_b_h",
+                    "lsx.vssrlrni.bu.h" => "__builtin_lsx_vssrlrni_bu_h",
+                    "lsx.vssrlrni.d.q" => "__builtin_lsx_vssrlrni_d_q",
+                    "lsx.vssrlrni.du.q" => "__builtin_lsx_vssrlrni_du_q",
+                    "lsx.vssrlrni.h.w" => "__builtin_lsx_vssrlrni_h_w",
+                    "lsx.vssrlrni.hu.w" => "__builtin_lsx_vssrlrni_hu_w",
+                    "lsx.vssrlrni.w.d" => "__builtin_lsx_vssrlrni_w_d",
+                    "lsx.vssrlrni.wu.d" => "__builtin_lsx_vssrlrni_wu_d",
+                    "lsx.vssub.b" => "__builtin_lsx_vssub_b",
+                    "lsx.vssub.bu" => "__builtin_lsx_vssub_bu",
+                    "lsx.vssub.d" => "__builtin_lsx_vssub_d",
+                    "lsx.vssub.du" => "__builtin_lsx_vssub_du",
+                    "lsx.vssub.h" => "__builtin_lsx_vssub_h",
+                    "lsx.vssub.hu" => "__builtin_lsx_vssub_hu",
+                    "lsx.vssub.w" => "__builtin_lsx_vssub_w",
+                    "lsx.vssub.wu" => "__builtin_lsx_vssub_wu",
+                    "lsx.vst" => "__builtin_lsx_vst",
+                    "lsx.vstelm.b" => "__builtin_lsx_vstelm_b",
+                    "lsx.vstelm.d" => "__builtin_lsx_vstelm_d",
+                    "lsx.vstelm.h" => "__builtin_lsx_vstelm_h",
+                    "lsx.vstelm.w" => "__builtin_lsx_vstelm_w",
+                    "lsx.vstx" => "__builtin_lsx_vstx",
+                    "lsx.vsub.b" => "__builtin_lsx_vsub_b",
+                    "lsx.vsub.d" => "__builtin_lsx_vsub_d",
+                    "lsx.vsub.h" => "__builtin_lsx_vsub_h",
+                    "lsx.vsub.q" => "__builtin_lsx_vsub_q",
+                    "lsx.vsub.w" => "__builtin_lsx_vsub_w",
+                    "lsx.vsubi.bu" => "__builtin_lsx_vsubi_bu",
+                    "lsx.vsubi.du" => "__builtin_lsx_vsubi_du",
+                    "lsx.vsubi.hu" => "__builtin_lsx_vsubi_hu",
+                    "lsx.vsubi.wu" => "__builtin_lsx_vsubi_wu",
+                    "lsx.vsubwev.d.w" => "__builtin_lsx_vsubwev_d_w",
+                    "lsx.vsubwev.d.wu" => "__builtin_lsx_vsubwev_d_wu",
+                    "lsx.vsubwev.h.b" => "__builtin_lsx_vsubwev_h_b",
+                    "lsx.vsubwev.h.bu" => "__builtin_lsx_vsubwev_h_bu",
+                    "lsx.vsubwev.q.d" => "__builtin_lsx_vsubwev_q_d",
+                    "lsx.vsubwev.q.du" => "__builtin_lsx_vsubwev_q_du",
+                    "lsx.vsubwev.w.h" => "__builtin_lsx_vsubwev_w_h",
+                    "lsx.vsubwev.w.hu" => "__builtin_lsx_vsubwev_w_hu",
+                    "lsx.vsubwod.d.w" => "__builtin_lsx_vsubwod_d_w",
+                    "lsx.vsubwod.d.wu" => "__builtin_lsx_vsubwod_d_wu",
+                    "lsx.vsubwod.h.b" => "__builtin_lsx_vsubwod_h_b",
+                    "lsx.vsubwod.h.bu" => "__builtin_lsx_vsubwod_h_bu",
+                    "lsx.vsubwod.q.d" => "__builtin_lsx_vsubwod_q_d",
+                    "lsx.vsubwod.q.du" => "__builtin_lsx_vsubwod_q_du",
+                    "lsx.vsubwod.w.h" => "__builtin_lsx_vsubwod_w_h",
+                    "lsx.vsubwod.w.hu" => "__builtin_lsx_vsubwod_w_hu",
+                    "lsx.vxor.v" => "__builtin_lsx_vxor_v",
+                    "lsx.vxori.b" => "__builtin_lsx_vxori_b",
+                    "movfcsr2gr" => "__builtin_loongarch_movfcsr2gr",
+                    "movgr2fcsr" => "__builtin_loongarch_movgr2fcsr",
+                    "syscall" => "__builtin_loongarch_syscall",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            loongarch(name)
+        }
+        "mips" => {
+            #[allow(non_snake_case)]
+            fn mips(name: &str) -> &str {
+                match name {
+                    // mips
+                    "absq.s.ph" => "__builtin_mips_absq_s_ph",
+                    "absq.s.qb" => "__builtin_mips_absq_s_qb",
+                    "absq.s.w" => "__builtin_mips_absq_s_w",
+                    "add.a.b" => "__builtin_msa_add_a_b",
+                    "add.a.d" => "__builtin_msa_add_a_d",
+                    "add.a.h" => "__builtin_msa_add_a_h",
+                    "add.a.w" => "__builtin_msa_add_a_w",
+                    "addq.ph" => "__builtin_mips_addq_ph",
+                    "addq.s.ph" => "__builtin_mips_addq_s_ph",
+                    "addq.s.w" => "__builtin_mips_addq_s_w",
+                    "addqh.ph" => "__builtin_mips_addqh_ph",
+                    "addqh.r.ph" => "__builtin_mips_addqh_r_ph",
+                    "addqh.r.w" => "__builtin_mips_addqh_r_w",
+                    "addqh.w" => "__builtin_mips_addqh_w",
+                    "adds.a.b" => "__builtin_msa_adds_a_b",
+                    "adds.a.d" => "__builtin_msa_adds_a_d",
+                    "adds.a.h" => "__builtin_msa_adds_a_h",
+                    "adds.a.w" => "__builtin_msa_adds_a_w",
+                    "adds.s.b" => "__builtin_msa_adds_s_b",
+                    "adds.s.d" => "__builtin_msa_adds_s_d",
+                    "adds.s.h" => "__builtin_msa_adds_s_h",
+                    "adds.s.w" => "__builtin_msa_adds_s_w",
+                    "adds.u.b" => "__builtin_msa_adds_u_b",
+                    "adds.u.d" => "__builtin_msa_adds_u_d",
+                    "adds.u.h" => "__builtin_msa_adds_u_h",
+                    "adds.u.w" => "__builtin_msa_adds_u_w",
+                    "addsc" => "__builtin_mips_addsc",
+                    "addu.ph" => "__builtin_mips_addu_ph",
+                    "addu.qb" => "__builtin_mips_addu_qb",
+                    "addu.s.ph" => "__builtin_mips_addu_s_ph",
+                    "addu.s.qb" => "__builtin_mips_addu_s_qb",
+                    "adduh.qb" => "__builtin_mips_adduh_qb",
+                    "adduh.r.qb" => "__builtin_mips_adduh_r_qb",
+                    "addv.b" => "__builtin_msa_addv_b",
+                    "addv.d" => "__builtin_msa_addv_d",
+                    "addv.h" => "__builtin_msa_addv_h",
+                    "addv.w" => "__builtin_msa_addv_w",
+                    "addvi.b" => "__builtin_msa_addvi_b",
+                    "addvi.d" => "__builtin_msa_addvi_d",
+                    "addvi.h" => "__builtin_msa_addvi_h",
+                    "addvi.w" => "__builtin_msa_addvi_w",
+                    "addwc" => "__builtin_mips_addwc",
+                    "and.v" => "__builtin_msa_and_v",
+                    "andi.b" => "__builtin_msa_andi_b",
+                    "append" => "__builtin_mips_append",
+                    "asub.s.b" => "__builtin_msa_asub_s_b",
+                    "asub.s.d" => "__builtin_msa_asub_s_d",
+                    "asub.s.h" => "__builtin_msa_asub_s_h",
+                    "asub.s.w" => "__builtin_msa_asub_s_w",
+                    "asub.u.b" => "__builtin_msa_asub_u_b",
+                    "asub.u.d" => "__builtin_msa_asub_u_d",
+                    "asub.u.h" => "__builtin_msa_asub_u_h",
+                    "asub.u.w" => "__builtin_msa_asub_u_w",
+                    "ave.s.b" => "__builtin_msa_ave_s_b",
+                    "ave.s.d" => "__builtin_msa_ave_s_d",
+                    "ave.s.h" => "__builtin_msa_ave_s_h",
+                    "ave.s.w" => "__builtin_msa_ave_s_w",
+                    "ave.u.b" => "__builtin_msa_ave_u_b",
+                    "ave.u.d" => "__builtin_msa_ave_u_d",
+                    "ave.u.h" => "__builtin_msa_ave_u_h",
+                    "ave.u.w" => "__builtin_msa_ave_u_w",
+                    "aver.s.b" => "__builtin_msa_aver_s_b",
+                    "aver.s.d" => "__builtin_msa_aver_s_d",
+                    "aver.s.h" => "__builtin_msa_aver_s_h",
+                    "aver.s.w" => "__builtin_msa_aver_s_w",
+                    "aver.u.b" => "__builtin_msa_aver_u_b",
+                    "aver.u.d" => "__builtin_msa_aver_u_d",
+                    "aver.u.h" => "__builtin_msa_aver_u_h",
+                    "aver.u.w" => "__builtin_msa_aver_u_w",
+                    "balign" => "__builtin_mips_balign",
+                    "bclr.b" => "__builtin_msa_bclr_b",
+                    "bclr.d" => "__builtin_msa_bclr_d",
+                    "bclr.h" => "__builtin_msa_bclr_h",
+                    "bclr.w" => "__builtin_msa_bclr_w",
+                    "bclri.b" => "__builtin_msa_bclri_b",
+                    "bclri.d" => "__builtin_msa_bclri_d",
+                    "bclri.h" => "__builtin_msa_bclri_h",
+                    "bclri.w" => "__builtin_msa_bclri_w",
+                    "binsl.b" => "__builtin_msa_binsl_b",
+                    "binsl.d" => "__builtin_msa_binsl_d",
+                    "binsl.h" => "__builtin_msa_binsl_h",
+                    "binsl.w" => "__builtin_msa_binsl_w",
+                    "binsli.b" => "__builtin_msa_binsli_b",
+                    "binsli.d" => "__builtin_msa_binsli_d",
+                    "binsli.h" => "__builtin_msa_binsli_h",
+                    "binsli.w" => "__builtin_msa_binsli_w",
+                    "binsr.b" => "__builtin_msa_binsr_b",
+                    "binsr.d" => "__builtin_msa_binsr_d",
+                    "binsr.h" => "__builtin_msa_binsr_h",
+                    "binsr.w" => "__builtin_msa_binsr_w",
+                    "binsri.b" => "__builtin_msa_binsri_b",
+                    "binsri.d" => "__builtin_msa_binsri_d",
+                    "binsri.h" => "__builtin_msa_binsri_h",
+                    "binsri.w" => "__builtin_msa_binsri_w",
+                    "bitrev" => "__builtin_mips_bitrev",
+                    "bmnz.v" => "__builtin_msa_bmnz_v",
+                    "bmnzi.b" => "__builtin_msa_bmnzi_b",
+                    "bmz.v" => "__builtin_msa_bmz_v",
+                    "bmzi.b" => "__builtin_msa_bmzi_b",
+                    "bneg.b" => "__builtin_msa_bneg_b",
+                    "bneg.d" => "__builtin_msa_bneg_d",
+                    "bneg.h" => "__builtin_msa_bneg_h",
+                    "bneg.w" => "__builtin_msa_bneg_w",
+                    "bnegi.b" => "__builtin_msa_bnegi_b",
+                    "bnegi.d" => "__builtin_msa_bnegi_d",
+                    "bnegi.h" => "__builtin_msa_bnegi_h",
+                    "bnegi.w" => "__builtin_msa_bnegi_w",
+                    "bnz.b" => "__builtin_msa_bnz_b",
+                    "bnz.d" => "__builtin_msa_bnz_d",
+                    "bnz.h" => "__builtin_msa_bnz_h",
+                    "bnz.v" => "__builtin_msa_bnz_v",
+                    "bnz.w" => "__builtin_msa_bnz_w",
+                    "bposge32" => "__builtin_mips_bposge32",
+                    "bsel.v" => "__builtin_msa_bsel_v",
+                    "bseli.b" => "__builtin_msa_bseli_b",
+                    "bset.b" => "__builtin_msa_bset_b",
+                    "bset.d" => "__builtin_msa_bset_d",
+                    "bset.h" => "__builtin_msa_bset_h",
+                    "bset.w" => "__builtin_msa_bset_w",
+                    "bseti.b" => "__builtin_msa_bseti_b",
+                    "bseti.d" => "__builtin_msa_bseti_d",
+                    "bseti.h" => "__builtin_msa_bseti_h",
+                    "bseti.w" => "__builtin_msa_bseti_w",
+                    "bz.b" => "__builtin_msa_bz_b",
+                    "bz.d" => "__builtin_msa_bz_d",
+                    "bz.h" => "__builtin_msa_bz_h",
+                    "bz.v" => "__builtin_msa_bz_v",
+                    "bz.w" => "__builtin_msa_bz_w",
+                    "ceq.b" => "__builtin_msa_ceq_b",
+                    "ceq.d" => "__builtin_msa_ceq_d",
+                    "ceq.h" => "__builtin_msa_ceq_h",
+                    "ceq.w" => "__builtin_msa_ceq_w",
+                    "ceqi.b" => "__builtin_msa_ceqi_b",
+                    "ceqi.d" => "__builtin_msa_ceqi_d",
+                    "ceqi.h" => "__builtin_msa_ceqi_h",
+                    "ceqi.w" => "__builtin_msa_ceqi_w",
+                    "cfcmsa" => "__builtin_msa_cfcmsa",
+                    "cle.s.b" => "__builtin_msa_cle_s_b",
+                    "cle.s.d" => "__builtin_msa_cle_s_d",
+                    "cle.s.h" => "__builtin_msa_cle_s_h",
+                    "cle.s.w" => "__builtin_msa_cle_s_w",
+                    "cle.u.b" => "__builtin_msa_cle_u_b",
+                    "cle.u.d" => "__builtin_msa_cle_u_d",
+                    "cle.u.h" => "__builtin_msa_cle_u_h",
+                    "cle.u.w" => "__builtin_msa_cle_u_w",
+                    "clei.s.b" => "__builtin_msa_clei_s_b",
+                    "clei.s.d" => "__builtin_msa_clei_s_d",
+                    "clei.s.h" => "__builtin_msa_clei_s_h",
+                    "clei.s.w" => "__builtin_msa_clei_s_w",
+                    "clei.u.b" => "__builtin_msa_clei_u_b",
+                    "clei.u.d" => "__builtin_msa_clei_u_d",
+                    "clei.u.h" => "__builtin_msa_clei_u_h",
+                    "clei.u.w" => "__builtin_msa_clei_u_w",
+                    "clt.s.b" => "__builtin_msa_clt_s_b",
+                    "clt.s.d" => "__builtin_msa_clt_s_d",
+                    "clt.s.h" => "__builtin_msa_clt_s_h",
+                    "clt.s.w" => "__builtin_msa_clt_s_w",
+                    "clt.u.b" => "__builtin_msa_clt_u_b",
+                    "clt.u.d" => "__builtin_msa_clt_u_d",
+                    "clt.u.h" => "__builtin_msa_clt_u_h",
+                    "clt.u.w" => "__builtin_msa_clt_u_w",
+                    "clti.s.b" => "__builtin_msa_clti_s_b",
+                    "clti.s.d" => "__builtin_msa_clti_s_d",
+                    "clti.s.h" => "__builtin_msa_clti_s_h",
+                    "clti.s.w" => "__builtin_msa_clti_s_w",
+                    "clti.u.b" => "__builtin_msa_clti_u_b",
+                    "clti.u.d" => "__builtin_msa_clti_u_d",
+                    "clti.u.h" => "__builtin_msa_clti_u_h",
+                    "clti.u.w" => "__builtin_msa_clti_u_w",
+                    "cmp.eq.ph" => "__builtin_mips_cmp_eq_ph",
+                    "cmp.le.ph" => "__builtin_mips_cmp_le_ph",
+                    "cmp.lt.ph" => "__builtin_mips_cmp_lt_ph",
+                    "cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
+                    "cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
+                    "cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
+                    "cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
+                    "cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
+                    "cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
+                    "cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
+                    "cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
+                    "cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
+                    "copy.s.b" => "__builtin_msa_copy_s_b",
+                    "copy.s.d" => "__builtin_msa_copy_s_d",
+                    "copy.s.h" => "__builtin_msa_copy_s_h",
+                    "copy.s.w" => "__builtin_msa_copy_s_w",
+                    "copy.u.b" => "__builtin_msa_copy_u_b",
+                    "copy.u.d" => "__builtin_msa_copy_u_d",
+                    "copy.u.h" => "__builtin_msa_copy_u_h",
+                    "copy.u.w" => "__builtin_msa_copy_u_w",
+                    "ctcmsa" => "__builtin_msa_ctcmsa",
+                    "div.s.b" => "__builtin_msa_div_s_b",
+                    "div.s.d" => "__builtin_msa_div_s_d",
+                    "div.s.h" => "__builtin_msa_div_s_h",
+                    "div.s.w" => "__builtin_msa_div_s_w",
+                    "div.u.b" => "__builtin_msa_div_u_b",
+                    "div.u.d" => "__builtin_msa_div_u_d",
+                    "div.u.h" => "__builtin_msa_div_u_h",
+                    "div.u.w" => "__builtin_msa_div_u_w",
+                    "dlsa" => "__builtin_mips_dlsa",
+                    "dotp.s.d" => "__builtin_msa_dotp_s_d",
+                    "dotp.s.h" => "__builtin_msa_dotp_s_h",
+                    "dotp.s.w" => "__builtin_msa_dotp_s_w",
+                    "dotp.u.d" => "__builtin_msa_dotp_u_d",
+                    "dotp.u.h" => "__builtin_msa_dotp_u_h",
+                    "dotp.u.w" => "__builtin_msa_dotp_u_w",
+                    "dpa.w.ph" => "__builtin_mips_dpa_w_ph",
+                    "dpadd.s.d" => "__builtin_msa_dpadd_s_d",
+                    "dpadd.s.h" => "__builtin_msa_dpadd_s_h",
+                    "dpadd.s.w" => "__builtin_msa_dpadd_s_w",
+                    "dpadd.u.d" => "__builtin_msa_dpadd_u_d",
+                    "dpadd.u.h" => "__builtin_msa_dpadd_u_h",
+                    "dpadd.u.w" => "__builtin_msa_dpadd_u_w",
+                    "dpaq.s.w.ph" => "__builtin_mips_dpaq_s_w_ph",
+                    "dpaq.sa.l.w" => "__builtin_mips_dpaq_sa_l_w",
+                    "dpaqx.s.w.ph" => "__builtin_mips_dpaqx_s_w_ph",
+                    "dpaqx.sa.w.ph" => "__builtin_mips_dpaqx_sa_w_ph",
+                    "dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
+                    "dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
+                    "dpax.w.ph" => "__builtin_mips_dpax_w_ph",
+                    "dps.w.ph" => "__builtin_mips_dps_w_ph",
+                    "dpsq.s.w.ph" => "__builtin_mips_dpsq_s_w_ph",
+                    "dpsq.sa.l.w" => "__builtin_mips_dpsq_sa_l_w",
+                    "dpsqx.s.w.ph" => "__builtin_mips_dpsqx_s_w_ph",
+                    "dpsqx.sa.w.ph" => "__builtin_mips_dpsqx_sa_w_ph",
+                    "dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
+                    "dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
+                    "dpsub.s.d" => "__builtin_msa_dpsub_s_d",
+                    "dpsub.s.h" => "__builtin_msa_dpsub_s_h",
+                    "dpsub.s.w" => "__builtin_msa_dpsub_s_w",
+                    "dpsub.u.d" => "__builtin_msa_dpsub_u_d",
+                    "dpsub.u.h" => "__builtin_msa_dpsub_u_h",
+                    "dpsub.u.w" => "__builtin_msa_dpsub_u_w",
+                    "dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
+                    "extp" => "__builtin_mips_extp",
+                    "extpdp" => "__builtin_mips_extpdp",
+                    "extr.r.w" => "__builtin_mips_extr_r_w",
+                    "extr.rs.w" => "__builtin_mips_extr_rs_w",
+                    "extr.s.h" => "__builtin_mips_extr_s_h",
+                    "extr.w" => "__builtin_mips_extr_w",
+                    "fadd.d" => "__builtin_msa_fadd_d",
+                    "fadd.w" => "__builtin_msa_fadd_w",
+                    "fcaf.d" => "__builtin_msa_fcaf_d",
+                    "fcaf.w" => "__builtin_msa_fcaf_w",
+                    "fceq.d" => "__builtin_msa_fceq_d",
+                    "fceq.w" => "__builtin_msa_fceq_w",
+                    "fclass.d" => "__builtin_msa_fclass_d",
+                    "fclass.w" => "__builtin_msa_fclass_w",
+                    "fcle.d" => "__builtin_msa_fcle_d",
+                    "fcle.w" => "__builtin_msa_fcle_w",
+                    "fclt.d" => "__builtin_msa_fclt_d",
+                    "fclt.w" => "__builtin_msa_fclt_w",
+                    "fcne.d" => "__builtin_msa_fcne_d",
+                    "fcne.w" => "__builtin_msa_fcne_w",
+                    "fcor.d" => "__builtin_msa_fcor_d",
+                    "fcor.w" => "__builtin_msa_fcor_w",
+                    "fcueq.d" => "__builtin_msa_fcueq_d",
+                    "fcueq.w" => "__builtin_msa_fcueq_w",
+                    "fcule.d" => "__builtin_msa_fcule_d",
+                    "fcule.w" => "__builtin_msa_fcule_w",
+                    "fcult.d" => "__builtin_msa_fcult_d",
+                    "fcult.w" => "__builtin_msa_fcult_w",
+                    "fcun.d" => "__builtin_msa_fcun_d",
+                    "fcun.w" => "__builtin_msa_fcun_w",
+                    "fcune.d" => "__builtin_msa_fcune_d",
+                    "fcune.w" => "__builtin_msa_fcune_w",
+                    "fdiv.d" => "__builtin_msa_fdiv_d",
+                    "fdiv.w" => "__builtin_msa_fdiv_w",
+                    "fexdo.h" => "__builtin_msa_fexdo_h",
+                    "fexdo.w" => "__builtin_msa_fexdo_w",
+                    "fexp2.d" => "__builtin_msa_fexp2_d",
+                    "fexp2.w" => "__builtin_msa_fexp2_w",
+                    "fexupl.d" => "__builtin_msa_fexupl_d",
+                    "fexupl.w" => "__builtin_msa_fexupl_w",
+                    "fexupr.d" => "__builtin_msa_fexupr_d",
+                    "fexupr.w" => "__builtin_msa_fexupr_w",
+                    "ffint.s.d" => "__builtin_msa_ffint_s_d",
+                    "ffint.s.w" => "__builtin_msa_ffint_s_w",
+                    "ffint.u.d" => "__builtin_msa_ffint_u_d",
+                    "ffint.u.w" => "__builtin_msa_ffint_u_w",
+                    "ffql.d" => "__builtin_msa_ffql_d",
+                    "ffql.w" => "__builtin_msa_ffql_w",
+                    "ffqr.d" => "__builtin_msa_ffqr_d",
+                    "ffqr.w" => "__builtin_msa_ffqr_w",
+                    "fill.b" => "__builtin_msa_fill_b",
+                    "fill.d" => "__builtin_msa_fill_d",
+                    "fill.h" => "__builtin_msa_fill_h",
+                    "fill.w" => "__builtin_msa_fill_w",
+                    "flog2.d" => "__builtin_msa_flog2_d",
+                    "flog2.w" => "__builtin_msa_flog2_w",
+                    "fmadd.d" => "__builtin_msa_fmadd_d",
+                    "fmadd.w" => "__builtin_msa_fmadd_w",
+                    "fmax.a.d" => "__builtin_msa_fmax_a_d",
+                    "fmax.a.w" => "__builtin_msa_fmax_a_w",
+                    "fmax.d" => "__builtin_msa_fmax_d",
+                    "fmax.w" => "__builtin_msa_fmax_w",
+                    "fmin.a.d" => "__builtin_msa_fmin_a_d",
+                    "fmin.a.w" => "__builtin_msa_fmin_a_w",
+                    "fmin.d" => "__builtin_msa_fmin_d",
+                    "fmin.w" => "__builtin_msa_fmin_w",
+                    "fmsub.d" => "__builtin_msa_fmsub_d",
+                    "fmsub.w" => "__builtin_msa_fmsub_w",
+                    "fmul.d" => "__builtin_msa_fmul_d",
+                    "fmul.w" => "__builtin_msa_fmul_w",
+                    "frcp.d" => "__builtin_msa_frcp_d",
+                    "frcp.w" => "__builtin_msa_frcp_w",
+                    "frint.d" => "__builtin_msa_frint_d",
+                    "frint.w" => "__builtin_msa_frint_w",
+                    "frsqrt.d" => "__builtin_msa_frsqrt_d",
+                    "frsqrt.w" => "__builtin_msa_frsqrt_w",
+                    "fsaf.d" => "__builtin_msa_fsaf_d",
+                    "fsaf.w" => "__builtin_msa_fsaf_w",
+                    "fseq.d" => "__builtin_msa_fseq_d",
+                    "fseq.w" => "__builtin_msa_fseq_w",
+                    "fsle.d" => "__builtin_msa_fsle_d",
+                    "fsle.w" => "__builtin_msa_fsle_w",
+                    "fslt.d" => "__builtin_msa_fslt_d",
+                    "fslt.w" => "__builtin_msa_fslt_w",
+                    "fsne.d" => "__builtin_msa_fsne_d",
+                    "fsne.w" => "__builtin_msa_fsne_w",
+                    "fsor.d" => "__builtin_msa_fsor_d",
+                    "fsor.w" => "__builtin_msa_fsor_w",
+                    "fsqrt.d" => "__builtin_msa_fsqrt_d",
+                    "fsqrt.w" => "__builtin_msa_fsqrt_w",
+                    "fsub.d" => "__builtin_msa_fsub_d",
+                    "fsub.w" => "__builtin_msa_fsub_w",
+                    "fsueq.d" => "__builtin_msa_fsueq_d",
+                    "fsueq.w" => "__builtin_msa_fsueq_w",
+                    "fsule.d" => "__builtin_msa_fsule_d",
+                    "fsule.w" => "__builtin_msa_fsule_w",
+                    "fsult.d" => "__builtin_msa_fsult_d",
+                    "fsult.w" => "__builtin_msa_fsult_w",
+                    "fsun.d" => "__builtin_msa_fsun_d",
+                    "fsun.w" => "__builtin_msa_fsun_w",
+                    "fsune.d" => "__builtin_msa_fsune_d",
+                    "fsune.w" => "__builtin_msa_fsune_w",
+                    "ftint.s.d" => "__builtin_msa_ftint_s_d",
+                    "ftint.s.w" => "__builtin_msa_ftint_s_w",
+                    "ftint.u.d" => "__builtin_msa_ftint_u_d",
+                    "ftint.u.w" => "__builtin_msa_ftint_u_w",
+                    "ftq.h" => "__builtin_msa_ftq_h",
+                    "ftq.w" => "__builtin_msa_ftq_w",
+                    "ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
+                    "ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
+                    "ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
+                    "ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
+                    "hadd.s.d" => "__builtin_msa_hadd_s_d",
+                    "hadd.s.h" => "__builtin_msa_hadd_s_h",
+                    "hadd.s.w" => "__builtin_msa_hadd_s_w",
+                    "hadd.u.d" => "__builtin_msa_hadd_u_d",
+                    "hadd.u.h" => "__builtin_msa_hadd_u_h",
+                    "hadd.u.w" => "__builtin_msa_hadd_u_w",
+                    "hsub.s.d" => "__builtin_msa_hsub_s_d",
+                    "hsub.s.h" => "__builtin_msa_hsub_s_h",
+                    "hsub.s.w" => "__builtin_msa_hsub_s_w",
+                    "hsub.u.d" => "__builtin_msa_hsub_u_d",
+                    "hsub.u.h" => "__builtin_msa_hsub_u_h",
+                    "hsub.u.w" => "__builtin_msa_hsub_u_w",
+                    "ilvev.b" => "__builtin_msa_ilvev_b",
+                    "ilvev.d" => "__builtin_msa_ilvev_d",
+                    "ilvev.h" => "__builtin_msa_ilvev_h",
+                    "ilvev.w" => "__builtin_msa_ilvev_w",
+                    "ilvl.b" => "__builtin_msa_ilvl_b",
+                    "ilvl.d" => "__builtin_msa_ilvl_d",
+                    "ilvl.h" => "__builtin_msa_ilvl_h",
+                    "ilvl.w" => "__builtin_msa_ilvl_w",
+                    "ilvod.b" => "__builtin_msa_ilvod_b",
+                    "ilvod.d" => "__builtin_msa_ilvod_d",
+                    "ilvod.h" => "__builtin_msa_ilvod_h",
+                    "ilvod.w" => "__builtin_msa_ilvod_w",
+                    "ilvr.b" => "__builtin_msa_ilvr_b",
+                    "ilvr.d" => "__builtin_msa_ilvr_d",
+                    "ilvr.h" => "__builtin_msa_ilvr_h",
+                    "ilvr.w" => "__builtin_msa_ilvr_w",
+                    "insert.b" => "__builtin_msa_insert_b",
+                    "insert.d" => "__builtin_msa_insert_d",
+                    "insert.h" => "__builtin_msa_insert_h",
+                    "insert.w" => "__builtin_msa_insert_w",
+                    "insv" => "__builtin_mips_insv",
+                    "insve.b" => "__builtin_msa_insve_b",
+                    "insve.d" => "__builtin_msa_insve_d",
+                    "insve.h" => "__builtin_msa_insve_h",
+                    "insve.w" => "__builtin_msa_insve_w",
+                    "lbux" => "__builtin_mips_lbux",
+                    "ld.b" => "__builtin_msa_ld_b",
+                    "ld.d" => "__builtin_msa_ld_d",
+                    "ld.h" => "__builtin_msa_ld_h",
+                    "ld.w" => "__builtin_msa_ld_w",
+                    "ldi.b" => "__builtin_msa_ldi_b",
+                    "ldi.d" => "__builtin_msa_ldi_d",
+                    "ldi.h" => "__builtin_msa_ldi_h",
+                    "ldi.w" => "__builtin_msa_ldi_w",
+                    "ldr.d" => "__builtin_msa_ldr_d",
+                    "ldr.w" => "__builtin_msa_ldr_w",
+                    "lhx" => "__builtin_mips_lhx",
+                    "lsa" => "__builtin_mips_lsa",
+                    "lwx" => "__builtin_mips_lwx",
+                    "madd" => "__builtin_mips_madd",
+                    "madd.q.h" => "__builtin_msa_madd_q_h",
+                    "madd.q.w" => "__builtin_msa_madd_q_w",
+                    "maddr.q.h" => "__builtin_msa_maddr_q_h",
+                    "maddr.q.w" => "__builtin_msa_maddr_q_w",
+                    "maddu" => "__builtin_mips_maddu",
+                    "maddv.b" => "__builtin_msa_maddv_b",
+                    "maddv.d" => "__builtin_msa_maddv_d",
+                    "maddv.h" => "__builtin_msa_maddv_h",
+                    "maddv.w" => "__builtin_msa_maddv_w",
+                    "maq.s.w.phl" => "__builtin_mips_maq_s_w_phl",
+                    "maq.s.w.phr" => "__builtin_mips_maq_s_w_phr",
+                    "maq.sa.w.phl" => "__builtin_mips_maq_sa_w_phl",
+                    "maq.sa.w.phr" => "__builtin_mips_maq_sa_w_phr",
+                    "max.a.b" => "__builtin_msa_max_a_b",
+                    "max.a.d" => "__builtin_msa_max_a_d",
+                    "max.a.h" => "__builtin_msa_max_a_h",
+                    "max.a.w" => "__builtin_msa_max_a_w",
+                    "max.s.b" => "__builtin_msa_max_s_b",
+                    "max.s.d" => "__builtin_msa_max_s_d",
+                    "max.s.h" => "__builtin_msa_max_s_h",
+                    "max.s.w" => "__builtin_msa_max_s_w",
+                    "max.u.b" => "__builtin_msa_max_u_b",
+                    "max.u.d" => "__builtin_msa_max_u_d",
+                    "max.u.h" => "__builtin_msa_max_u_h",
+                    "max.u.w" => "__builtin_msa_max_u_w",
+                    "maxi.s.b" => "__builtin_msa_maxi_s_b",
+                    "maxi.s.d" => "__builtin_msa_maxi_s_d",
+                    "maxi.s.h" => "__builtin_msa_maxi_s_h",
+                    "maxi.s.w" => "__builtin_msa_maxi_s_w",
+                    "maxi.u.b" => "__builtin_msa_maxi_u_b",
+                    "maxi.u.d" => "__builtin_msa_maxi_u_d",
+                    "maxi.u.h" => "__builtin_msa_maxi_u_h",
+                    "maxi.u.w" => "__builtin_msa_maxi_u_w",
+                    "min.a.b" => "__builtin_msa_min_a_b",
+                    "min.a.d" => "__builtin_msa_min_a_d",
+                    "min.a.h" => "__builtin_msa_min_a_h",
+                    "min.a.w" => "__builtin_msa_min_a_w",
+                    "min.s.b" => "__builtin_msa_min_s_b",
+                    "min.s.d" => "__builtin_msa_min_s_d",
+                    "min.s.h" => "__builtin_msa_min_s_h",
+                    "min.s.w" => "__builtin_msa_min_s_w",
+                    "min.u.b" => "__builtin_msa_min_u_b",
+                    "min.u.d" => "__builtin_msa_min_u_d",
+                    "min.u.h" => "__builtin_msa_min_u_h",
+                    "min.u.w" => "__builtin_msa_min_u_w",
+                    "mini.s.b" => "__builtin_msa_mini_s_b",
+                    "mini.s.d" => "__builtin_msa_mini_s_d",
+                    "mini.s.h" => "__builtin_msa_mini_s_h",
+                    "mini.s.w" => "__builtin_msa_mini_s_w",
+                    "mini.u.b" => "__builtin_msa_mini_u_b",
+                    "mini.u.d" => "__builtin_msa_mini_u_d",
+                    "mini.u.h" => "__builtin_msa_mini_u_h",
+                    "mini.u.w" => "__builtin_msa_mini_u_w",
+                    "mod.s.b" => "__builtin_msa_mod_s_b",
+                    "mod.s.d" => "__builtin_msa_mod_s_d",
+                    "mod.s.h" => "__builtin_msa_mod_s_h",
+                    "mod.s.w" => "__builtin_msa_mod_s_w",
+                    "mod.u.b" => "__builtin_msa_mod_u_b",
+                    "mod.u.d" => "__builtin_msa_mod_u_d",
+                    "mod.u.h" => "__builtin_msa_mod_u_h",
+                    "mod.u.w" => "__builtin_msa_mod_u_w",
+                    "modsub" => "__builtin_mips_modsub",
+                    "move.v" => "__builtin_msa_move_v",
+                    "msub" => "__builtin_mips_msub",
+                    "msub.q.h" => "__builtin_msa_msub_q_h",
+                    "msub.q.w" => "__builtin_msa_msub_q_w",
+                    "msubr.q.h" => "__builtin_msa_msubr_q_h",
+                    "msubr.q.w" => "__builtin_msa_msubr_q_w",
+                    "msubu" => "__builtin_mips_msubu",
+                    "msubv.b" => "__builtin_msa_msubv_b",
+                    "msubv.d" => "__builtin_msa_msubv_d",
+                    "msubv.h" => "__builtin_msa_msubv_h",
+                    "msubv.w" => "__builtin_msa_msubv_w",
+                    "mthlip" => "__builtin_mips_mthlip",
+                    "mul.ph" => "__builtin_mips_mul_ph",
+                    "mul.q.h" => "__builtin_msa_mul_q_h",
+                    "mul.q.w" => "__builtin_msa_mul_q_w",
+                    "mul.s.ph" => "__builtin_mips_mul_s_ph",
+                    "muleq.s.w.phl" => "__builtin_mips_muleq_s_w_phl",
+                    "muleq.s.w.phr" => "__builtin_mips_muleq_s_w_phr",
+                    "muleu.s.ph.qbl" => "__builtin_mips_muleu_s_ph_qbl",
+                    "muleu.s.ph.qbr" => "__builtin_mips_muleu_s_ph_qbr",
+                    "mulq.rs.ph" => "__builtin_mips_mulq_rs_ph",
+                    "mulq.rs.w" => "__builtin_mips_mulq_rs_w",
+                    "mulq.s.ph" => "__builtin_mips_mulq_s_ph",
+                    "mulq.s.w" => "__builtin_mips_mulq_s_w",
+                    "mulr.q.h" => "__builtin_msa_mulr_q_h",
+                    "mulr.q.w" => "__builtin_msa_mulr_q_w",
+                    "mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
+                    "mulsaq.s.w.ph" => "__builtin_mips_mulsaq_s_w_ph",
+                    "mult" => "__builtin_mips_mult",
+                    "multu" => "__builtin_mips_multu",
+                    "mulv.b" => "__builtin_msa_mulv_b",
+                    "mulv.d" => "__builtin_msa_mulv_d",
+                    "mulv.h" => "__builtin_msa_mulv_h",
+                    "mulv.w" => "__builtin_msa_mulv_w",
+                    "nloc.b" => "__builtin_msa_nloc_b",
+                    "nloc.d" => "__builtin_msa_nloc_d",
+                    "nloc.h" => "__builtin_msa_nloc_h",
+                    "nloc.w" => "__builtin_msa_nloc_w",
+                    "nlzc.b" => "__builtin_msa_nlzc_b",
+                    "nlzc.d" => "__builtin_msa_nlzc_d",
+                    "nlzc.h" => "__builtin_msa_nlzc_h",
+                    "nlzc.w" => "__builtin_msa_nlzc_w",
+                    "nor.v" => "__builtin_msa_nor_v",
+                    "nori.b" => "__builtin_msa_nori_b",
+                    "or.v" => "__builtin_msa_or_v",
+                    "ori.b" => "__builtin_msa_ori_b",
+                    "packrl.ph" => "__builtin_mips_packrl_ph",
+                    "pckev.b" => "__builtin_msa_pckev_b",
+                    "pckev.d" => "__builtin_msa_pckev_d",
+                    "pckev.h" => "__builtin_msa_pckev_h",
+                    "pckev.w" => "__builtin_msa_pckev_w",
+                    "pckod.b" => "__builtin_msa_pckod_b",
+                    "pckod.d" => "__builtin_msa_pckod_d",
+                    "pckod.h" => "__builtin_msa_pckod_h",
+                    "pckod.w" => "__builtin_msa_pckod_w",
+                    "pcnt.b" => "__builtin_msa_pcnt_b",
+                    "pcnt.d" => "__builtin_msa_pcnt_d",
+                    "pcnt.h" => "__builtin_msa_pcnt_h",
+                    "pcnt.w" => "__builtin_msa_pcnt_w",
+                    "pick.ph" => "__builtin_mips_pick_ph",
+                    "pick.qb" => "__builtin_mips_pick_qb",
+                    "preceq.w.phl" => "__builtin_mips_preceq_w_phl",
+                    "preceq.w.phr" => "__builtin_mips_preceq_w_phr",
+                    "precequ.ph.qbl" => "__builtin_mips_precequ_ph_qbl",
+                    "precequ.ph.qbla" => "__builtin_mips_precequ_ph_qbla",
+                    "precequ.ph.qbr" => "__builtin_mips_precequ_ph_qbr",
+                    "precequ.ph.qbra" => "__builtin_mips_precequ_ph_qbra",
+                    "preceu.ph.qbl" => "__builtin_mips_preceu_ph_qbl",
+                    "preceu.ph.qbla" => "__builtin_mips_preceu_ph_qbla",
+                    "preceu.ph.qbr" => "__builtin_mips_preceu_ph_qbr",
+                    "preceu.ph.qbra" => "__builtin_mips_preceu_ph_qbra",
+                    "precr.qb.ph" => "__builtin_mips_precr_qb_ph",
+                    "precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
+                    "precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
+                    "precrq.ph.w" => "__builtin_mips_precrq_ph_w",
+                    "precrq.qb.ph" => "__builtin_mips_precrq_qb_ph",
+                    "precrq.rs.ph.w" => "__builtin_mips_precrq_rs_ph_w",
+                    "precrqu.s.qb.ph" => "__builtin_mips_precrqu_s_qb_ph",
+                    "prepend" => "__builtin_mips_prepend",
+                    "raddu.w.qb" => "__builtin_mips_raddu_w_qb",
+                    "rddsp" => "__builtin_mips_rddsp",
+                    "repl.ph" => "__builtin_mips_repl_ph",
+                    "repl.qb" => "__builtin_mips_repl_qb",
+                    "sat.s.b" => "__builtin_msa_sat_s_b",
+                    "sat.s.d" => "__builtin_msa_sat_s_d",
+                    "sat.s.h" => "__builtin_msa_sat_s_h",
+                    "sat.s.w" => "__builtin_msa_sat_s_w",
+                    "sat.u.b" => "__builtin_msa_sat_u_b",
+                    "sat.u.d" => "__builtin_msa_sat_u_d",
+                    "sat.u.h" => "__builtin_msa_sat_u_h",
+                    "sat.u.w" => "__builtin_msa_sat_u_w",
+                    "shf.b" => "__builtin_msa_shf_b",
+                    "shf.h" => "__builtin_msa_shf_h",
+                    "shf.w" => "__builtin_msa_shf_w",
+                    "shilo" => "__builtin_mips_shilo",
+                    "shll.ph" => "__builtin_mips_shll_ph",
+                    "shll.qb" => "__builtin_mips_shll_qb",
+                    "shll.s.ph" => "__builtin_mips_shll_s_ph",
+                    "shll.s.w" => "__builtin_mips_shll_s_w",
+                    "shra.ph" => "__builtin_mips_shra_ph",
+                    "shra.qb" => "__builtin_mips_shra_qb",
+                    "shra.r.ph" => "__builtin_mips_shra_r_ph",
+                    "shra.r.qb" => "__builtin_mips_shra_r_qb",
+                    "shra.r.w" => "__builtin_mips_shra_r_w",
+                    "shrl.ph" => "__builtin_mips_shrl_ph",
+                    "shrl.qb" => "__builtin_mips_shrl_qb",
+                    "sld.b" => "__builtin_msa_sld_b",
+                    "sld.d" => "__builtin_msa_sld_d",
+                    "sld.h" => "__builtin_msa_sld_h",
+                    "sld.w" => "__builtin_msa_sld_w",
+                    "sldi.b" => "__builtin_msa_sldi_b",
+                    "sldi.d" => "__builtin_msa_sldi_d",
+                    "sldi.h" => "__builtin_msa_sldi_h",
+                    "sldi.w" => "__builtin_msa_sldi_w",
+                    "sll.b" => "__builtin_msa_sll_b",
+                    "sll.d" => "__builtin_msa_sll_d",
+                    "sll.h" => "__builtin_msa_sll_h",
+                    "sll.w" => "__builtin_msa_sll_w",
+                    "slli.b" => "__builtin_msa_slli_b",
+                    "slli.d" => "__builtin_msa_slli_d",
+                    "slli.h" => "__builtin_msa_slli_h",
+                    "slli.w" => "__builtin_msa_slli_w",
+                    "splat.b" => "__builtin_msa_splat_b",
+                    "splat.d" => "__builtin_msa_splat_d",
+                    "splat.h" => "__builtin_msa_splat_h",
+                    "splat.w" => "__builtin_msa_splat_w",
+                    "splati.b" => "__builtin_msa_splati_b",
+                    "splati.d" => "__builtin_msa_splati_d",
+                    "splati.h" => "__builtin_msa_splati_h",
+                    "splati.w" => "__builtin_msa_splati_w",
+                    "sra.b" => "__builtin_msa_sra_b",
+                    "sra.d" => "__builtin_msa_sra_d",
+                    "sra.h" => "__builtin_msa_sra_h",
+                    "sra.w" => "__builtin_msa_sra_w",
+                    "srai.b" => "__builtin_msa_srai_b",
+                    "srai.d" => "__builtin_msa_srai_d",
+                    "srai.h" => "__builtin_msa_srai_h",
+                    "srai.w" => "__builtin_msa_srai_w",
+                    "srar.b" => "__builtin_msa_srar_b",
+                    "srar.d" => "__builtin_msa_srar_d",
+                    "srar.h" => "__builtin_msa_srar_h",
+                    "srar.w" => "__builtin_msa_srar_w",
+                    "srari.b" => "__builtin_msa_srari_b",
+                    "srari.d" => "__builtin_msa_srari_d",
+                    "srari.h" => "__builtin_msa_srari_h",
+                    "srari.w" => "__builtin_msa_srari_w",
+                    "srl.b" => "__builtin_msa_srl_b",
+                    "srl.d" => "__builtin_msa_srl_d",
+                    "srl.h" => "__builtin_msa_srl_h",
+                    "srl.w" => "__builtin_msa_srl_w",
+                    "srli.b" => "__builtin_msa_srli_b",
+                    "srli.d" => "__builtin_msa_srli_d",
+                    "srli.h" => "__builtin_msa_srli_h",
+                    "srli.w" => "__builtin_msa_srli_w",
+                    "srlr.b" => "__builtin_msa_srlr_b",
+                    "srlr.d" => "__builtin_msa_srlr_d",
+                    "srlr.h" => "__builtin_msa_srlr_h",
+                    "srlr.w" => "__builtin_msa_srlr_w",
+                    "srlri.b" => "__builtin_msa_srlri_b",
+                    "srlri.d" => "__builtin_msa_srlri_d",
+                    "srlri.h" => "__builtin_msa_srlri_h",
+                    "srlri.w" => "__builtin_msa_srlri_w",
+                    "st.b" => "__builtin_msa_st_b",
+                    "st.d" => "__builtin_msa_st_d",
+                    "st.h" => "__builtin_msa_st_h",
+                    "st.w" => "__builtin_msa_st_w",
+                    "str.d" => "__builtin_msa_str_d",
+                    "str.w" => "__builtin_msa_str_w",
+                    "subq.ph" => "__builtin_mips_subq_ph",
+                    "subq.s.ph" => "__builtin_mips_subq_s_ph",
+                    "subq.s.w" => "__builtin_mips_subq_s_w",
+                    "subqh.ph" => "__builtin_mips_subqh_ph",
+                    "subqh.r.ph" => "__builtin_mips_subqh_r_ph",
+                    "subqh.r.w" => "__builtin_mips_subqh_r_w",
+                    "subqh.w" => "__builtin_mips_subqh_w",
+                    "subs.s.b" => "__builtin_msa_subs_s_b",
+                    "subs.s.d" => "__builtin_msa_subs_s_d",
+                    "subs.s.h" => "__builtin_msa_subs_s_h",
+                    "subs.s.w" => "__builtin_msa_subs_s_w",
+                    "subs.u.b" => "__builtin_msa_subs_u_b",
+                    "subs.u.d" => "__builtin_msa_subs_u_d",
+                    "subs.u.h" => "__builtin_msa_subs_u_h",
+                    "subs.u.w" => "__builtin_msa_subs_u_w",
+                    "subsus.u.b" => "__builtin_msa_subsus_u_b",
+                    "subsus.u.d" => "__builtin_msa_subsus_u_d",
+                    "subsus.u.h" => "__builtin_msa_subsus_u_h",
+                    "subsus.u.w" => "__builtin_msa_subsus_u_w",
+                    "subsuu.s.b" => "__builtin_msa_subsuu_s_b",
+                    "subsuu.s.d" => "__builtin_msa_subsuu_s_d",
+                    "subsuu.s.h" => "__builtin_msa_subsuu_s_h",
+                    "subsuu.s.w" => "__builtin_msa_subsuu_s_w",
+                    "subu.ph" => "__builtin_mips_subu_ph",
+                    "subu.qb" => "__builtin_mips_subu_qb",
+                    "subu.s.ph" => "__builtin_mips_subu_s_ph",
+                    "subu.s.qb" => "__builtin_mips_subu_s_qb",
+                    "subuh.qb" => "__builtin_mips_subuh_qb",
+                    "subuh.r.qb" => "__builtin_mips_subuh_r_qb",
+                    "subv.b" => "__builtin_msa_subv_b",
+                    "subv.d" => "__builtin_msa_subv_d",
+                    "subv.h" => "__builtin_msa_subv_h",
+                    "subv.w" => "__builtin_msa_subv_w",
+                    "subvi.b" => "__builtin_msa_subvi_b",
+                    "subvi.d" => "__builtin_msa_subvi_d",
+                    "subvi.h" => "__builtin_msa_subvi_h",
+                    "subvi.w" => "__builtin_msa_subvi_w",
+                    "vshf.b" => "__builtin_msa_vshf_b",
+                    "vshf.d" => "__builtin_msa_vshf_d",
+                    "vshf.h" => "__builtin_msa_vshf_h",
+                    "vshf.w" => "__builtin_msa_vshf_w",
+                    "wrdsp" => "__builtin_mips_wrdsp",
+                    "xor.v" => "__builtin_msa_xor_v",
+                    "xori.b" => "__builtin_msa_xori_b",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            mips(name)
+        }
+        "nvvm" => {
+            #[allow(non_snake_case)]
+            fn nvvm(name: &str) -> &str {
+                match name {
+                    // nvvm
+                    "abs.i" => "__nvvm_abs_i",
+                    "abs.ll" => "__nvvm_abs_ll",
+                    "activemask" => "__nvvm_activemask",
+                    "add.rm.d" => "__nvvm_add_rm_d",
+                    "add.rm.f" => "__nvvm_add_rm_f",
+                    "add.rm.ftz.f" => "__nvvm_add_rm_ftz_f",
+                    "add.rn.d" => "__nvvm_add_rn_d",
+                    "add.rn.f" => "__nvvm_add_rn_f",
+                    "add.rn.ftz.f" => "__nvvm_add_rn_ftz_f",
+                    "add.rp.d" => "__nvvm_add_rp_d",
+                    "add.rp.f" => "__nvvm_add_rp_f",
+                    "add.rp.ftz.f" => "__nvvm_add_rp_ftz_f",
+                    "add.rz.d" => "__nvvm_add_rz_d",
+                    "add.rz.f" => "__nvvm_add_rz_f",
+                    "add.rz.ftz.f" => "__nvvm_add_rz_ftz_f",
+                    "bar.sync" => "__nvvm_bar_sync",
+                    "bar.warp.sync" => "__nvvm_bar_warp_sync",
+                    "barrier0" => "__nvvm_bar0",
+                    // [DUPLICATE]: "barrier0" => "__syncthreads",
+                    "barrier0.and" => "__nvvm_bar0_and",
+                    "barrier0.or" => "__nvvm_bar0_or",
+                    "barrier0.popc" => "__nvvm_bar0_popc",
+                    "bf16x2.to.ue8m0x2.rp" => "__nvvm_bf16x2_to_ue8m0x2_rp",
+                    "bf16x2.to.ue8m0x2.rp.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rp_satfinite",
+                    "bf16x2.to.ue8m0x2.rz" => "__nvvm_bf16x2_to_ue8m0x2_rz",
+                    "bf16x2.to.ue8m0x2.rz.satfinite" => "__nvvm_bf16x2_to_ue8m0x2_rz_satfinite",
+                    "bf2h.rn" => "__nvvm_bf2h_rn",
+                    "bf2h.rn.ftz" => "__nvvm_bf2h_rn_ftz",
+                    "bitcast.d2ll" => "__nvvm_bitcast_d2ll",
+                    "bitcast.f2i" => "__nvvm_bitcast_f2i",
+                    "bitcast.i2f" => "__nvvm_bitcast_i2f",
+                    "bitcast.ll2d" => "__nvvm_bitcast_ll2d",
+                    "brev32" => "__nvvm_brev32",
+                    "brev64" => "__nvvm_brev64",
+                    "ceil.d" => "__nvvm_ceil_d",
+                    "ceil.f" => "__nvvm_ceil_f",
+                    "ceil.ftz.f" => "__nvvm_ceil_ftz_f",
+                    "clz.i" => "__nvvm_clz_i",
+                    "clz.ll" => "__nvvm_clz_ll",
+                    "cos.approx.f" => "__nvvm_cos_approx_f",
+                    "cos.approx.ftz.f" => "__nvvm_cos_approx_ftz_f",
+                    "cp.async.commit.group" => "__nvvm_cp_async_commit_group",
+                    "cp.async.mbarrier.arrive" => "__nvvm_cp_async_mbarrier_arrive",
+                    "cp.async.mbarrier.arrive.noinc" => "__nvvm_cp_async_mbarrier_arrive_noinc",
+                    "cp.async.mbarrier.arrive.noinc.shared" => {
+                        "__nvvm_cp_async_mbarrier_arrive_noinc_shared"
+                    }
+                    "cp.async.mbarrier.arrive.shared" => "__nvvm_cp_async_mbarrier_arrive_shared",
+                    "cp.async.wait.all" => "__nvvm_cp_async_wait_all",
+                    "cp.async.wait.group" => "__nvvm_cp_async_wait_group",
+                    "d2f.rm" => "__nvvm_d2f_rm",
+                    "d2f.rm.ftz" => "__nvvm_d2f_rm_ftz",
+                    "d2f.rn" => "__nvvm_d2f_rn",
+                    "d2f.rn.ftz" => "__nvvm_d2f_rn_ftz",
+                    "d2f.rp" => "__nvvm_d2f_rp",
+                    "d2f.rp.ftz" => "__nvvm_d2f_rp_ftz",
+                    "d2f.rz" => "__nvvm_d2f_rz",
+                    "d2f.rz.ftz" => "__nvvm_d2f_rz_ftz",
+                    "d2i.hi" => "__nvvm_d2i_hi",
+                    "d2i.lo" => "__nvvm_d2i_lo",
+                    "d2i.rm" => "__nvvm_d2i_rm",
+                    "d2i.rn" => "__nvvm_d2i_rn",
+                    "d2i.rp" => "__nvvm_d2i_rp",
+                    "d2i.rz" => "__nvvm_d2i_rz",
+                    "d2ll.rm" => "__nvvm_d2ll_rm",
+                    "d2ll.rn" => "__nvvm_d2ll_rn",
+                    "d2ll.rp" => "__nvvm_d2ll_rp",
+                    "d2ll.rz" => "__nvvm_d2ll_rz",
+                    "d2ui.rm" => "__nvvm_d2ui_rm",
+                    "d2ui.rn" => "__nvvm_d2ui_rn",
+                    "d2ui.rp" => "__nvvm_d2ui_rp",
+                    "d2ui.rz" => "__nvvm_d2ui_rz",
+                    "d2ull.rm" => "__nvvm_d2ull_rm",
+                    "d2ull.rn" => "__nvvm_d2ull_rn",
+                    "d2ull.rp" => "__nvvm_d2ull_rp",
+                    "d2ull.rz" => "__nvvm_d2ull_rz",
+                    "div.approx.f" => "__nvvm_div_approx_f",
+                    "div.approx.ftz.f" => "__nvvm_div_approx_ftz_f",
+                    "div.full" => "__nvvm_div_full",
+                    "div.full.ftz" => "__nvvm_div_full_ftz",
+                    "div.rm.d" => "__nvvm_div_rm_d",
+                    "div.rm.f" => "__nvvm_div_rm_f",
+                    "div.rm.ftz.f" => "__nvvm_div_rm_ftz_f",
+                    "div.rn.d" => "__nvvm_div_rn_d",
+                    "div.rn.f" => "__nvvm_div_rn_f",
+                    "div.rn.ftz.f" => "__nvvm_div_rn_ftz_f",
+                    "div.rp.d" => "__nvvm_div_rp_d",
+                    "div.rp.f" => "__nvvm_div_rp_f",
+                    "div.rp.ftz.f" => "__nvvm_div_rp_ftz_f",
+                    "div.rz.d" => "__nvvm_div_rz_d",
+                    "div.rz.f" => "__nvvm_div_rz_f",
+                    "div.rz.ftz.f" => "__nvvm_div_rz_ftz_f",
+                    "e2m1x2.to.f16x2.rn" => "__nvvm_e2m1x2_to_f16x2_rn",
+                    "e2m1x2.to.f16x2.rn.relu" => "__nvvm_e2m1x2_to_f16x2_rn_relu",
+                    "e2m3x2.to.f16x2.rn" => "__nvvm_e2m3x2_to_f16x2_rn",
+                    "e2m3x2.to.f16x2.rn.relu" => "__nvvm_e2m3x2_to_f16x2_rn_relu",
+                    "e3m2x2.to.f16x2.rn" => "__nvvm_e3m2x2_to_f16x2_rn",
+                    "e3m2x2.to.f16x2.rn.relu" => "__nvvm_e3m2x2_to_f16x2_rn_relu",
+                    "e4m3x2.to.f16x2.rn" => "__nvvm_e4m3x2_to_f16x2_rn",
+                    "e4m3x2.to.f16x2.rn.relu" => "__nvvm_e4m3x2_to_f16x2_rn_relu",
+                    "e5m2x2.to.f16x2.rn" => "__nvvm_e5m2x2_to_f16x2_rn",
+                    "e5m2x2.to.f16x2.rn.relu" => "__nvvm_e5m2x2_to_f16x2_rn_relu",
+                    "ex2.approx.d" => "__nvvm_ex2_approx_d",
+                    "ex2.approx.f" => "__nvvm_ex2_approx_f",
+                    "ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f",
+                    "exit" => "__nvvm_exit",
+                    "f16x2.to.e4m3x2.rn" => "__nvvm_f16x2_to_e4m3x2_rn",
+                    "f16x2.to.e4m3x2.rn.relu" => "__nvvm_f16x2_to_e4m3x2_rn_relu",
+                    "f16x2.to.e5m2x2.rn" => "__nvvm_f16x2_to_e5m2x2_rn",
+                    "f16x2.to.e5m2x2.rn.relu" => "__nvvm_f16x2_to_e5m2x2_rn_relu",
+                    "f2bf16.rn" => "__nvvm_f2bf16_rn",
+                    "f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
+                    "f2bf16.rz" => "__nvvm_f2bf16_rz",
+                    "f2bf16.rz.relu" => "__nvvm_f2bf16_rz_relu",
+                    "f2h.rn" => "__nvvm_f2h_rn",
+                    "f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
+                    "f2i.rm" => "__nvvm_f2i_rm",
+                    "f2i.rm.ftz" => "__nvvm_f2i_rm_ftz",
+                    "f2i.rn" => "__nvvm_f2i_rn",
+                    "f2i.rn.ftz" => "__nvvm_f2i_rn_ftz",
+                    "f2i.rp" => "__nvvm_f2i_rp",
+                    "f2i.rp.ftz" => "__nvvm_f2i_rp_ftz",
+                    "f2i.rz" => "__nvvm_f2i_rz",
+                    "f2i.rz.ftz" => "__nvvm_f2i_rz_ftz",
+                    "f2ll.rm" => "__nvvm_f2ll_rm",
+                    "f2ll.rm.ftz" => "__nvvm_f2ll_rm_ftz",
+                    "f2ll.rn" => "__nvvm_f2ll_rn",
+                    "f2ll.rn.ftz" => "__nvvm_f2ll_rn_ftz",
+                    "f2ll.rp" => "__nvvm_f2ll_rp",
+                    "f2ll.rp.ftz" => "__nvvm_f2ll_rp_ftz",
+                    "f2ll.rz" => "__nvvm_f2ll_rz",
+                    "f2ll.rz.ftz" => "__nvvm_f2ll_rz_ftz",
+                    "f2tf32.rn" => "__nvvm_f2tf32_rn",
+                    "f2tf32.rn.relu" => "__nvvm_f2tf32_rn_relu",
+                    "f2tf32.rn.relu.satfinite" => "__nvvm_f2tf32_rn_relu_satfinite",
+                    "f2tf32.rn.satfinite" => "__nvvm_f2tf32_rn_satfinite",
+                    "f2tf32.rna" => "__nvvm_f2tf32_rna",
+                    "f2tf32.rna.satfinite" => "__nvvm_f2tf32_rna_satfinite",
+                    "f2tf32.rz" => "__nvvm_f2tf32_rz",
+                    "f2tf32.rz.relu" => "__nvvm_f2tf32_rz_relu",
+                    "f2tf32.rz.relu.satfinite" => "__nvvm_f2tf32_rz_relu_satfinite",
+                    "f2tf32.rz.satfinite" => "__nvvm_f2tf32_rz_satfinite",
+                    "f2ui.rm" => "__nvvm_f2ui_rm",
+                    "f2ui.rm.ftz" => "__nvvm_f2ui_rm_ftz",
+                    "f2ui.rn" => "__nvvm_f2ui_rn",
+                    "f2ui.rn.ftz" => "__nvvm_f2ui_rn_ftz",
+                    "f2ui.rp" => "__nvvm_f2ui_rp",
+                    "f2ui.rp.ftz" => "__nvvm_f2ui_rp_ftz",
+                    "f2ui.rz" => "__nvvm_f2ui_rz",
+                    "f2ui.rz.ftz" => "__nvvm_f2ui_rz_ftz",
+                    "f2ull.rm" => "__nvvm_f2ull_rm",
+                    "f2ull.rm.ftz" => "__nvvm_f2ull_rm_ftz",
+                    "f2ull.rn" => "__nvvm_f2ull_rn",
+                    "f2ull.rn.ftz" => "__nvvm_f2ull_rn_ftz",
+                    "f2ull.rp" => "__nvvm_f2ull_rp",
+                    "f2ull.rp.ftz" => "__nvvm_f2ull_rp_ftz",
+                    "f2ull.rz" => "__nvvm_f2ull_rz",
+                    "f2ull.rz.ftz" => "__nvvm_f2ull_rz_ftz",
+                    "fabs.d" => "__nvvm_fabs_d",
+                    "fabs.f" => "__nvvm_fabs_f",
+                    "fabs.ftz.f" => "__nvvm_fabs_ftz_f",
+                    "ff.to.e2m1x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m1x2_rn_relu_satfinite",
+                    "ff.to.e2m1x2.rn.satfinite" => "__nvvm_ff_to_e2m1x2_rn_satfinite",
+                    "ff.to.e2m3x2.rn.relu.satfinite" => "__nvvm_ff_to_e2m3x2_rn_relu_satfinite",
+                    "ff.to.e2m3x2.rn.satfinite" => "__nvvm_ff_to_e2m3x2_rn_satfinite",
+                    "ff.to.e3m2x2.rn.relu.satfinite" => "__nvvm_ff_to_e3m2x2_rn_relu_satfinite",
+                    "ff.to.e3m2x2.rn.satfinite" => "__nvvm_ff_to_e3m2x2_rn_satfinite",
+                    "ff.to.e4m3x2.rn" => "__nvvm_ff_to_e4m3x2_rn",
+                    "ff.to.e4m3x2.rn.relu" => "__nvvm_ff_to_e4m3x2_rn_relu",
+                    "ff.to.e5m2x2.rn" => "__nvvm_ff_to_e5m2x2_rn",
+                    "ff.to.e5m2x2.rn.relu" => "__nvvm_ff_to_e5m2x2_rn_relu",
+                    "ff.to.ue8m0x2.rp" => "__nvvm_ff_to_ue8m0x2_rp",
+                    "ff.to.ue8m0x2.rp.satfinite" => "__nvvm_ff_to_ue8m0x2_rp_satfinite",
+                    "ff.to.ue8m0x2.rz" => "__nvvm_ff_to_ue8m0x2_rz",
+                    "ff.to.ue8m0x2.rz.satfinite" => "__nvvm_ff_to_ue8m0x2_rz_satfinite",
+                    "ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
+                    "ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
+                    "ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
+                    "ff2bf16x2.rz.relu" => "__nvvm_ff2bf16x2_rz_relu",
+                    "ff2f16x2.rn" => "__nvvm_ff2f16x2_rn",
+                    "ff2f16x2.rn.relu" => "__nvvm_ff2f16x2_rn_relu",
+                    "ff2f16x2.rz" => "__nvvm_ff2f16x2_rz",
+                    "ff2f16x2.rz.relu" => "__nvvm_ff2f16x2_rz_relu",
+                    "floor.d" => "__nvvm_floor_d",
+                    "floor.f" => "__nvvm_floor_f",
+                    "floor.ftz.f" => "__nvvm_floor_ftz_f",
+                    "fma.rm.d" => "__nvvm_fma_rm_d",
+                    "fma.rm.f" => "__nvvm_fma_rm_f",
+                    "fma.rm.ftz.f" => "__nvvm_fma_rm_ftz_f",
+                    "fma.rn.bf16" => "__nvvm_fma_rn_bf16",
+                    "fma.rn.bf16x2" => "__nvvm_fma_rn_bf16x2",
+                    "fma.rn.d" => "__nvvm_fma_rn_d",
+                    "fma.rn.f" => "__nvvm_fma_rn_f",
+                    "fma.rn.ftz.bf16" => "__nvvm_fma_rn_ftz_bf16",
+                    "fma.rn.ftz.bf16x2" => "__nvvm_fma_rn_ftz_bf16x2",
+                    "fma.rn.ftz.f" => "__nvvm_fma_rn_ftz_f",
+                    "fma.rn.ftz.relu.bf16" => "__nvvm_fma_rn_ftz_relu_bf16",
+                    "fma.rn.ftz.relu.bf16x2" => "__nvvm_fma_rn_ftz_relu_bf16x2",
+                    "fma.rn.ftz.sat.bf16" => "__nvvm_fma_rn_ftz_sat_bf16",
+                    "fma.rn.ftz.sat.bf16x2" => "__nvvm_fma_rn_ftz_sat_bf16x2",
+                    "fma.rn.relu.bf16" => "__nvvm_fma_rn_relu_bf16",
+                    "fma.rn.relu.bf16x2" => "__nvvm_fma_rn_relu_bf16x2",
+                    "fma.rn.sat.bf16" => "__nvvm_fma_rn_sat_bf16",
+                    "fma.rn.sat.bf16x2" => "__nvvm_fma_rn_sat_bf16x2",
+                    "fma.rp.d" => "__nvvm_fma_rp_d",
+                    "fma.rp.f" => "__nvvm_fma_rp_f",
+                    "fma.rp.ftz.f" => "__nvvm_fma_rp_ftz_f",
+                    "fma.rz.d" => "__nvvm_fma_rz_d",
+                    "fma.rz.f" => "__nvvm_fma_rz_f",
+                    "fma.rz.ftz.f" => "__nvvm_fma_rz_ftz_f",
+                    "fmax.bf16" => "__nvvm_fmax_bf16",
+                    "fmax.bf16x2" => "__nvvm_fmax_bf16x2",
+                    "fmax.d" => "__nvvm_fmax_d",
+                    "fmax.f" => "__nvvm_fmax_f",
+                    "fmax.ftz.bf16" => "__nvvm_fmax_ftz_bf16",
+                    "fmax.ftz.bf16x2" => "__nvvm_fmax_ftz_bf16x2",
+                    "fmax.ftz.f" => "__nvvm_fmax_ftz_f",
+                    "fmax.ftz.nan.bf16" => "__nvvm_fmax_ftz_nan_bf16",
+                    "fmax.ftz.nan.bf16x2" => "__nvvm_fmax_ftz_nan_bf16x2",
+                    "fmax.ftz.nan.f" => "__nvvm_fmax_ftz_nan_f",
+                    "fmax.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16",
+                    "fmax.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_nan_xorsign_abs_bf16x2",
+                    "fmax.ftz.nan.xorsign.abs.f" => "__nvvm_fmax_ftz_nan_xorsign_abs_f",
+                    "fmax.ftz.xorsign.abs.bf16" => "__nvvm_fmax_ftz_xorsign_abs_bf16",
+                    "fmax.ftz.xorsign.abs.bf16x2" => "__nvvm_fmax_ftz_xorsign_abs_bf16x2",
+                    "fmax.ftz.xorsign.abs.f" => "__nvvm_fmax_ftz_xorsign_abs_f",
+                    "fmax.nan.bf16" => "__nvvm_fmax_nan_bf16",
+                    "fmax.nan.bf16x2" => "__nvvm_fmax_nan_bf16x2",
+                    "fmax.nan.f" => "__nvvm_fmax_nan_f",
+                    "fmax.nan.xorsign.abs.bf16" => "__nvvm_fmax_nan_xorsign_abs_bf16",
+                    "fmax.nan.xorsign.abs.bf16x2" => "__nvvm_fmax_nan_xorsign_abs_bf16x2",
+                    "fmax.nan.xorsign.abs.f" => "__nvvm_fmax_nan_xorsign_abs_f",
+                    "fmax.xorsign.abs.bf16" => "__nvvm_fmax_xorsign_abs_bf16",
+                    "fmax.xorsign.abs.bf16x2" => "__nvvm_fmax_xorsign_abs_bf16x2",
+                    "fmax.xorsign.abs.f" => "__nvvm_fmax_xorsign_abs_f",
+                    "fmin.bf16" => "__nvvm_fmin_bf16",
+                    "fmin.bf16x2" => "__nvvm_fmin_bf16x2",
+                    "fmin.d" => "__nvvm_fmin_d",
+                    "fmin.f" => "__nvvm_fmin_f",
+                    "fmin.ftz.bf16" => "__nvvm_fmin_ftz_bf16",
+                    "fmin.ftz.bf16x2" => "__nvvm_fmin_ftz_bf16x2",
+                    "fmin.ftz.f" => "__nvvm_fmin_ftz_f",
+                    "fmin.ftz.nan.bf16" => "__nvvm_fmin_ftz_nan_bf16",
+                    "fmin.ftz.nan.bf16x2" => "__nvvm_fmin_ftz_nan_bf16x2",
+                    "fmin.ftz.nan.f" => "__nvvm_fmin_ftz_nan_f",
+                    "fmin.ftz.nan.xorsign.abs.bf16" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16",
+                    "fmin.ftz.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_nan_xorsign_abs_bf16x2",
+                    "fmin.ftz.nan.xorsign.abs.f" => "__nvvm_fmin_ftz_nan_xorsign_abs_f",
+                    "fmin.ftz.xorsign.abs.bf16" => "__nvvm_fmin_ftz_xorsign_abs_bf16",
+                    "fmin.ftz.xorsign.abs.bf16x2" => "__nvvm_fmin_ftz_xorsign_abs_bf16x2",
+                    "fmin.ftz.xorsign.abs.f" => "__nvvm_fmin_ftz_xorsign_abs_f",
+                    "fmin.nan.bf16" => "__nvvm_fmin_nan_bf16",
+                    "fmin.nan.bf16x2" => "__nvvm_fmin_nan_bf16x2",
+                    "fmin.nan.f" => "__nvvm_fmin_nan_f",
+                    "fmin.nan.xorsign.abs.bf16" => "__nvvm_fmin_nan_xorsign_abs_bf16",
+                    "fmin.nan.xorsign.abs.bf16x2" => "__nvvm_fmin_nan_xorsign_abs_bf16x2",
+                    "fmin.nan.xorsign.abs.f" => "__nvvm_fmin_nan_xorsign_abs_f",
+                    "fmin.xorsign.abs.bf16" => "__nvvm_fmin_xorsign_abs_bf16",
+                    "fmin.xorsign.abs.bf16x2" => "__nvvm_fmin_xorsign_abs_bf16x2",
+                    "fmin.xorsign.abs.f" => "__nvvm_fmin_xorsign_abs_f",
+                    "fns" => "__nvvm_fns",
+                    "h2f" => "__nvvm_h2f",
+                    "i2d.rm" => "__nvvm_i2d_rm",
+                    "i2d.rn" => "__nvvm_i2d_rn",
+                    "i2d.rp" => "__nvvm_i2d_rp",
+                    "i2d.rz" => "__nvvm_i2d_rz",
+                    "i2f.rm" => "__nvvm_i2f_rm",
+                    "i2f.rn" => "__nvvm_i2f_rn",
+                    "i2f.rp" => "__nvvm_i2f_rp",
+                    "i2f.rz" => "__nvvm_i2f_rz",
+                    "isspacep.const" => "__nvvm_isspacep_const",
+                    "isspacep.global" => "__nvvm_isspacep_global",
+                    "isspacep.local" => "__nvvm_isspacep_local",
+                    "isspacep.shared" => "__nvvm_isspacep_shared",
+                    "isspacep.shared.cluster" => "__nvvm_isspacep_shared_cluster",
+                    "istypep.sampler" => "__nvvm_istypep_sampler",
+                    "istypep.surface" => "__nvvm_istypep_surface",
+                    "istypep.texture" => "__nvvm_istypep_texture",
+                    "lg2.approx.d" => "__nvvm_lg2_approx_d",
+                    "lg2.approx.f" => "__nvvm_lg2_approx_f",
+                    "lg2.approx.ftz.f" => "__nvvm_lg2_approx_ftz_f",
+                    "ll2d.rm" => "__nvvm_ll2d_rm",
+                    "ll2d.rn" => "__nvvm_ll2d_rn",
+                    "ll2d.rp" => "__nvvm_ll2d_rp",
+                    "ll2d.rz" => "__nvvm_ll2d_rz",
+                    "ll2f.rm" => "__nvvm_ll2f_rm",
+                    "ll2f.rn" => "__nvvm_ll2f_rn",
+                    "ll2f.rp" => "__nvvm_ll2f_rp",
+                    "ll2f.rz" => "__nvvm_ll2f_rz",
+                    "lohi.i2d" => "__nvvm_lohi_i2d",
+                    "match.any.sync.i32" => "__nvvm_match_any_sync_i32",
+                    "match.any.sync.i64" => "__nvvm_match_any_sync_i64",
+                    "max.i" => "__nvvm_max_i",
+                    "max.ll" => "__nvvm_max_ll",
+                    "max.ui" => "__nvvm_max_ui",
+                    "max.ull" => "__nvvm_max_ull",
+                    "mbarrier.arrive" => "__nvvm_mbarrier_arrive",
+                    "mbarrier.arrive.drop" => "__nvvm_mbarrier_arrive_drop",
+                    "mbarrier.arrive.drop.noComplete" => "__nvvm_mbarrier_arrive_drop_noComplete",
+                    "mbarrier.arrive.drop.noComplete.shared" => {
+                        "__nvvm_mbarrier_arrive_drop_noComplete_shared"
+                    }
+                    "mbarrier.arrive.drop.shared" => "__nvvm_mbarrier_arrive_drop_shared",
+                    "mbarrier.arrive.noComplete" => "__nvvm_mbarrier_arrive_noComplete",
+                    "mbarrier.arrive.noComplete.shared" => {
+                        "__nvvm_mbarrier_arrive_noComplete_shared"
+                    }
+                    "mbarrier.arrive.shared" => "__nvvm_mbarrier_arrive_shared",
+                    "mbarrier.init" => "__nvvm_mbarrier_init",
+                    "mbarrier.init.shared" => "__nvvm_mbarrier_init_shared",
+                    "mbarrier.inval" => "__nvvm_mbarrier_inval",
+                    "mbarrier.inval.shared" => "__nvvm_mbarrier_inval_shared",
+                    "mbarrier.pending.count" => "__nvvm_mbarrier_pending_count",
+                    "mbarrier.test.wait" => "__nvvm_mbarrier_test_wait",
+                    "mbarrier.test.wait.shared" => "__nvvm_mbarrier_test_wait_shared",
+                    "membar.cta" => "__nvvm_membar_cta",
+                    "membar.gl" => "__nvvm_membar_gl",
+                    "membar.sys" => "__nvvm_membar_sys",
+                    "min.i" => "__nvvm_min_i",
+                    "min.ll" => "__nvvm_min_ll",
+                    "min.ui" => "__nvvm_min_ui",
+                    "min.ull" => "__nvvm_min_ull",
+                    "mul.rm.d" => "__nvvm_mul_rm_d",
+                    "mul.rm.f" => "__nvvm_mul_rm_f",
+                    "mul.rm.ftz.f" => "__nvvm_mul_rm_ftz_f",
+                    "mul.rn.d" => "__nvvm_mul_rn_d",
+                    "mul.rn.f" => "__nvvm_mul_rn_f",
+                    "mul.rn.ftz.f" => "__nvvm_mul_rn_ftz_f",
+                    "mul.rp.d" => "__nvvm_mul_rp_d",
+                    "mul.rp.f" => "__nvvm_mul_rp_f",
+                    "mul.rp.ftz.f" => "__nvvm_mul_rp_ftz_f",
+                    "mul.rz.d" => "__nvvm_mul_rz_d",
+                    "mul.rz.f" => "__nvvm_mul_rz_f",
+                    "mul.rz.ftz.f" => "__nvvm_mul_rz_ftz_f",
+                    "mul24.i" => "__nvvm_mul24_i",
+                    "mul24.ui" => "__nvvm_mul24_ui",
+                    "mulhi.i" => "__nvvm_mulhi_i",
+                    "mulhi.ll" => "__nvvm_mulhi_ll",
+                    "mulhi.s" => "__nvvm_mulhi_s",
+                    "mulhi.ui" => "__nvvm_mulhi_ui",
+                    "mulhi.ull" => "__nvvm_mulhi_ull",
+                    "mulhi.us" => "__nvvm_mulhi_us",
+                    "nanosleep" => "__nvvm_nanosleep",
+                    "neg.bf16" => "__nvvm_neg_bf16",
+                    "neg.bf16x2" => "__nvvm_neg_bf16x2",
+                    "popc.i" => "__nvvm_popc_i",
+                    "popc.ll" => "__nvvm_popc_ll",
+                    "prmt" => "__nvvm_prmt",
+                    "rcp.approx.ftz.d" => "__nvvm_rcp_approx_ftz_d",
+                    "rcp.approx.ftz.f" => "__nvvm_rcp_approx_ftz_f",
+                    "rcp.rm.d" => "__nvvm_rcp_rm_d",
+                    "rcp.rm.f" => "__nvvm_rcp_rm_f",
+                    "rcp.rm.ftz.f" => "__nvvm_rcp_rm_ftz_f",
+                    "rcp.rn.d" => "__nvvm_rcp_rn_d",
+                    "rcp.rn.f" => "__nvvm_rcp_rn_f",
+                    "rcp.rn.ftz.f" => "__nvvm_rcp_rn_ftz_f",
+                    "rcp.rp.d" => "__nvvm_rcp_rp_d",
+                    "rcp.rp.f" => "__nvvm_rcp_rp_f",
+                    "rcp.rp.ftz.f" => "__nvvm_rcp_rp_ftz_f",
+                    "rcp.rz.d" => "__nvvm_rcp_rz_d",
+                    "rcp.rz.f" => "__nvvm_rcp_rz_f",
+                    "rcp.rz.ftz.f" => "__nvvm_rcp_rz_ftz_f",
+                    "read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_clock",
+                    // [DUPLICATE]: "read.ptx.sreg.clock" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_clock64",
+                    // [DUPLICATE]: "read.ptx.sreg.clock64" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.ctaid.w" => "__nvvm_read_ptx_sreg_ctaid_w",
+                    "read.ptx.sreg.ctaid.x" => "__nvvm_read_ptx_sreg_ctaid_x",
+                    "read.ptx.sreg.ctaid.y" => "__nvvm_read_ptx_sreg_ctaid_y",
+                    "read.ptx.sreg.ctaid.z" => "__nvvm_read_ptx_sreg_ctaid_z",
+                    "read.ptx.sreg.envreg0" => "__nvvm_read_ptx_sreg_envreg0",
+                    "read.ptx.sreg.envreg1" => "__nvvm_read_ptx_sreg_envreg1",
+                    "read.ptx.sreg.envreg10" => "__nvvm_read_ptx_sreg_envreg10",
+                    "read.ptx.sreg.envreg11" => "__nvvm_read_ptx_sreg_envreg11",
+                    "read.ptx.sreg.envreg12" => "__nvvm_read_ptx_sreg_envreg12",
+                    "read.ptx.sreg.envreg13" => "__nvvm_read_ptx_sreg_envreg13",
+                    "read.ptx.sreg.envreg14" => "__nvvm_read_ptx_sreg_envreg14",
+                    "read.ptx.sreg.envreg15" => "__nvvm_read_ptx_sreg_envreg15",
+                    "read.ptx.sreg.envreg16" => "__nvvm_read_ptx_sreg_envreg16",
+                    "read.ptx.sreg.envreg17" => "__nvvm_read_ptx_sreg_envreg17",
+                    "read.ptx.sreg.envreg18" => "__nvvm_read_ptx_sreg_envreg18",
+                    "read.ptx.sreg.envreg19" => "__nvvm_read_ptx_sreg_envreg19",
+                    "read.ptx.sreg.envreg2" => "__nvvm_read_ptx_sreg_envreg2",
+                    "read.ptx.sreg.envreg20" => "__nvvm_read_ptx_sreg_envreg20",
+                    "read.ptx.sreg.envreg21" => "__nvvm_read_ptx_sreg_envreg21",
+                    "read.ptx.sreg.envreg22" => "__nvvm_read_ptx_sreg_envreg22",
+                    "read.ptx.sreg.envreg23" => "__nvvm_read_ptx_sreg_envreg23",
+                    "read.ptx.sreg.envreg24" => "__nvvm_read_ptx_sreg_envreg24",
+                    "read.ptx.sreg.envreg25" => "__nvvm_read_ptx_sreg_envreg25",
+                    "read.ptx.sreg.envreg26" => "__nvvm_read_ptx_sreg_envreg26",
+                    "read.ptx.sreg.envreg27" => "__nvvm_read_ptx_sreg_envreg27",
+                    "read.ptx.sreg.envreg28" => "__nvvm_read_ptx_sreg_envreg28",
+                    "read.ptx.sreg.envreg29" => "__nvvm_read_ptx_sreg_envreg29",
+                    "read.ptx.sreg.envreg3" => "__nvvm_read_ptx_sreg_envreg3",
+                    "read.ptx.sreg.envreg30" => "__nvvm_read_ptx_sreg_envreg30",
+                    "read.ptx.sreg.envreg31" => "__nvvm_read_ptx_sreg_envreg31",
+                    "read.ptx.sreg.envreg4" => "__nvvm_read_ptx_sreg_envreg4",
+                    "read.ptx.sreg.envreg5" => "__nvvm_read_ptx_sreg_envreg5",
+                    "read.ptx.sreg.envreg6" => "__nvvm_read_ptx_sreg_envreg6",
+                    "read.ptx.sreg.envreg7" => "__nvvm_read_ptx_sreg_envreg7",
+                    "read.ptx.sreg.envreg8" => "__nvvm_read_ptx_sreg_envreg8",
+                    "read.ptx.sreg.envreg9" => "__nvvm_read_ptx_sreg_envreg9",
+                    "read.ptx.sreg.globaltimer" => "__nvvm_read_ptx_sreg_globaltimer",
+                    "read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_gridid",
+                    // [DUPLICATE]: "read.ptx.sreg.gridid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_laneid",
+                    // [DUPLICATE]: "read.ptx.sreg.laneid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_lanemask_eq",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.eq" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_lanemask_ge",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.ge" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_lanemask_gt",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.gt" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_lanemask_le",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.le" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_lanemask_lt",
+                    // [DUPLICATE]: "read.ptx.sreg.lanemask.lt" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.nctaid.w" => "__nvvm_read_ptx_sreg_nctaid_w",
+                    "read.ptx.sreg.nctaid.x" => "__nvvm_read_ptx_sreg_nctaid_x",
+                    "read.ptx.sreg.nctaid.y" => "__nvvm_read_ptx_sreg_nctaid_y",
+                    "read.ptx.sreg.nctaid.z" => "__nvvm_read_ptx_sreg_nctaid_z",
+                    "read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_nsmid",
+                    // [DUPLICATE]: "read.ptx.sreg.nsmid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.ntid.w" => "__nvvm_read_ptx_sreg_ntid_w",
+                    "read.ptx.sreg.ntid.x" => "__nvvm_read_ptx_sreg_ntid_x",
+                    "read.ptx.sreg.ntid.y" => "__nvvm_read_ptx_sreg_ntid_y",
+                    "read.ptx.sreg.ntid.z" => "__nvvm_read_ptx_sreg_ntid_z",
+                    "read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_nwarpid",
+                    // [DUPLICATE]: "read.ptx.sreg.nwarpid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_pm0",
+                    // [DUPLICATE]: "read.ptx.sreg.pm0" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_pm1",
+                    // [DUPLICATE]: "read.ptx.sreg.pm1" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_pm2",
+                    // [DUPLICATE]: "read.ptx.sreg.pm2" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_pm3",
+                    // [DUPLICATE]: "read.ptx.sreg.pm3" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_smid",
+                    // [DUPLICATE]: "read.ptx.sreg.smid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.tid.w" => "__nvvm_read_ptx_sreg_tid_w",
+                    "read.ptx.sreg.tid.x" => "__nvvm_read_ptx_sreg_tid_x",
+                    "read.ptx.sreg.tid.y" => "__nvvm_read_ptx_sreg_tid_y",
+                    "read.ptx.sreg.tid.z" => "__nvvm_read_ptx_sreg_tid_z",
+                    "read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_warpid",
+                    // [DUPLICATE]: "read.ptx.sreg.warpid" => "__nvvm_read_ptx_sreg_",
+                    "read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_warpsize",
+                    // [DUPLICATE]: "read.ptx.sreg.warpsize" => "__nvvm_read_ptx_sreg_",
+                    "redux.sync.add" => "__nvvm_redux_sync_add",
+                    "redux.sync.and" => "__nvvm_redux_sync_and",
+                    "redux.sync.fmax" => "__nvvm_redux_sync_fmax",
+                    "redux.sync.fmax.NaN" => "__nvvm_redux_sync_fmax_NaN",
+                    "redux.sync.fmax.abs" => "__nvvm_redux_sync_fmax_abs",
+                    "redux.sync.fmax.abs.NaN" => "__nvvm_redux_sync_fmax_abs_NaN",
+                    "redux.sync.fmin" => "__nvvm_redux_sync_fmin",
+                    "redux.sync.fmin.NaN" => "__nvvm_redux_sync_fmin_NaN",
+                    "redux.sync.fmin.abs" => "__nvvm_redux_sync_fmin_abs",
+                    "redux.sync.fmin.abs.NaN" => "__nvvm_redux_sync_fmin_abs_NaN",
+                    "redux.sync.max" => "__nvvm_redux_sync_max",
+                    "redux.sync.min" => "__nvvm_redux_sync_min",
+                    "redux.sync.or" => "__nvvm_redux_sync_or",
+                    "redux.sync.umax" => "__nvvm_redux_sync_umax",
+                    "redux.sync.umin" => "__nvvm_redux_sync_umin",
+                    "redux.sync.xor" => "__nvvm_redux_sync_xor",
+                    "reflect" => "__nvvm_reflect",
+                    "rotate.b32" => "__nvvm_rotate_b32",
+                    "rotate.b64" => "__nvvm_rotate_b64",
+                    "rotate.right.b64" => "__nvvm_rotate_right_b64",
+                    "round.d" => "__nvvm_round_d",
+                    "round.f" => "__nvvm_round_f",
+                    "round.ftz.f" => "__nvvm_round_ftz_f",
+                    "rsqrt.approx.d" => "__nvvm_rsqrt_approx_d",
+                    "rsqrt.approx.f" => "__nvvm_rsqrt_approx_f",
+                    "rsqrt.approx.ftz.d" => "__nvvm_rsqrt_approx_ftz_d",
+                    "rsqrt.approx.ftz.f" => "__nvvm_rsqrt_approx_ftz_f",
+                    "sad.i" => "__nvvm_sad_i",
+                    "sad.ll" => "__nvvm_sad_ll",
+                    "sad.s" => "__nvvm_sad_s",
+                    "sad.ui" => "__nvvm_sad_ui",
+                    "sad.ull" => "__nvvm_sad_ull",
+                    "sad.us" => "__nvvm_sad_us",
+                    "saturate.d" => "__nvvm_saturate_d",
+                    "saturate.f" => "__nvvm_saturate_f",
+                    "saturate.ftz.f" => "__nvvm_saturate_ftz_f",
+                    "shfl.bfly.f32" => "__nvvm_shfl_bfly_f32",
+                    "shfl.bfly.i32" => "__nvvm_shfl_bfly_i32",
+                    "shfl.down.f32" => "__nvvm_shfl_down_f32",
+                    "shfl.down.i32" => "__nvvm_shfl_down_i32",
+                    "shfl.idx.f32" => "__nvvm_shfl_idx_f32",
+                    "shfl.idx.i32" => "__nvvm_shfl_idx_i32",
+                    "shfl.sync.bfly.f32" => "__nvvm_shfl_sync_bfly_f32",
+                    "shfl.sync.bfly.i32" => "__nvvm_shfl_sync_bfly_i32",
+                    "shfl.sync.down.f32" => "__nvvm_shfl_sync_down_f32",
+                    "shfl.sync.down.i32" => "__nvvm_shfl_sync_down_i32",
+                    "shfl.sync.idx.f32" => "__nvvm_shfl_sync_idx_f32",
+                    "shfl.sync.idx.i32" => "__nvvm_shfl_sync_idx_i32",
+                    "shfl.sync.up.f32" => "__nvvm_shfl_sync_up_f32",
+                    "shfl.sync.up.i32" => "__nvvm_shfl_sync_up_i32",
+                    "shfl.up.f32" => "__nvvm_shfl_up_f32",
+                    "shfl.up.i32" => "__nvvm_shfl_up_i32",
+                    "sin.approx.f" => "__nvvm_sin_approx_f",
+                    "sin.approx.ftz.f" => "__nvvm_sin_approx_ftz_f",
+                    "sqrt.approx.f" => "__nvvm_sqrt_approx_f",
+                    "sqrt.approx.ftz.f" => "__nvvm_sqrt_approx_ftz_f",
+                    "sqrt.f" => "__nvvm_sqrt_f",
+                    "sqrt.rm.d" => "__nvvm_sqrt_rm_d",
+                    "sqrt.rm.f" => "__nvvm_sqrt_rm_f",
+                    "sqrt.rm.ftz.f" => "__nvvm_sqrt_rm_ftz_f",
+                    "sqrt.rn.d" => "__nvvm_sqrt_rn_d",
+                    "sqrt.rn.f" => "__nvvm_sqrt_rn_f",
+                    "sqrt.rn.ftz.f" => "__nvvm_sqrt_rn_ftz_f",
+                    "sqrt.rp.d" => "__nvvm_sqrt_rp_d",
+                    "sqrt.rp.f" => "__nvvm_sqrt_rp_f",
+                    "sqrt.rp.ftz.f" => "__nvvm_sqrt_rp_ftz_f",
+                    "sqrt.rz.d" => "__nvvm_sqrt_rz_d",
+                    "sqrt.rz.f" => "__nvvm_sqrt_rz_f",
+                    "sqrt.rz.ftz.f" => "__nvvm_sqrt_rz_ftz_f",
+                    "suq.array.size" => "__nvvm_suq_array_size",
+                    "suq.channel.data.type" => "__nvvm_suq_channel_data_type",
+                    "suq.channel.order" => "__nvvm_suq_channel_order",
+                    "suq.depth" => "__nvvm_suq_depth",
+                    "suq.height" => "__nvvm_suq_height",
+                    "suq.width" => "__nvvm_suq_width",
+                    "sust.b.1d.array.i16.clamp" => "__nvvm_sust_b_1d_array_i16_clamp",
+                    "sust.b.1d.array.i16.trap" => "__nvvm_sust_b_1d_array_i16_trap",
+                    "sust.b.1d.array.i16.zero" => "__nvvm_sust_b_1d_array_i16_zero",
+                    "sust.b.1d.array.i32.clamp" => "__nvvm_sust_b_1d_array_i32_clamp",
+                    "sust.b.1d.array.i32.trap" => "__nvvm_sust_b_1d_array_i32_trap",
+                    "sust.b.1d.array.i32.zero" => "__nvvm_sust_b_1d_array_i32_zero",
+                    "sust.b.1d.array.i64.clamp" => "__nvvm_sust_b_1d_array_i64_clamp",
+                    "sust.b.1d.array.i64.trap" => "__nvvm_sust_b_1d_array_i64_trap",
+                    "sust.b.1d.array.i64.zero" => "__nvvm_sust_b_1d_array_i64_zero",
+                    "sust.b.1d.array.i8.clamp" => "__nvvm_sust_b_1d_array_i8_clamp",
+                    "sust.b.1d.array.i8.trap" => "__nvvm_sust_b_1d_array_i8_trap",
+                    "sust.b.1d.array.i8.zero" => "__nvvm_sust_b_1d_array_i8_zero",
+                    "sust.b.1d.array.v2i16.clamp" => "__nvvm_sust_b_1d_array_v2i16_clamp",
+                    "sust.b.1d.array.v2i16.trap" => "__nvvm_sust_b_1d_array_v2i16_trap",
+                    "sust.b.1d.array.v2i16.zero" => "__nvvm_sust_b_1d_array_v2i16_zero",
+                    "sust.b.1d.array.v2i32.clamp" => "__nvvm_sust_b_1d_array_v2i32_clamp",
+                    "sust.b.1d.array.v2i32.trap" => "__nvvm_sust_b_1d_array_v2i32_trap",
+                    "sust.b.1d.array.v2i32.zero" => "__nvvm_sust_b_1d_array_v2i32_zero",
+                    "sust.b.1d.array.v2i64.clamp" => "__nvvm_sust_b_1d_array_v2i64_clamp",
+                    "sust.b.1d.array.v2i64.trap" => "__nvvm_sust_b_1d_array_v2i64_trap",
+                    "sust.b.1d.array.v2i64.zero" => "__nvvm_sust_b_1d_array_v2i64_zero",
+                    "sust.b.1d.array.v2i8.clamp" => "__nvvm_sust_b_1d_array_v2i8_clamp",
+                    "sust.b.1d.array.v2i8.trap" => "__nvvm_sust_b_1d_array_v2i8_trap",
+                    "sust.b.1d.array.v2i8.zero" => "__nvvm_sust_b_1d_array_v2i8_zero",
+                    "sust.b.1d.array.v4i16.clamp" => "__nvvm_sust_b_1d_array_v4i16_clamp",
+                    "sust.b.1d.array.v4i16.trap" => "__nvvm_sust_b_1d_array_v4i16_trap",
+                    "sust.b.1d.array.v4i16.zero" => "__nvvm_sust_b_1d_array_v4i16_zero",
+                    "sust.b.1d.array.v4i32.clamp" => "__nvvm_sust_b_1d_array_v4i32_clamp",
+                    "sust.b.1d.array.v4i32.trap" => "__nvvm_sust_b_1d_array_v4i32_trap",
+                    "sust.b.1d.array.v4i32.zero" => "__nvvm_sust_b_1d_array_v4i32_zero",
+                    "sust.b.1d.array.v4i8.clamp" => "__nvvm_sust_b_1d_array_v4i8_clamp",
+                    "sust.b.1d.array.v4i8.trap" => "__nvvm_sust_b_1d_array_v4i8_trap",
+                    "sust.b.1d.array.v4i8.zero" => "__nvvm_sust_b_1d_array_v4i8_zero",
+                    "sust.b.1d.i16.clamp" => "__nvvm_sust_b_1d_i16_clamp",
+                    "sust.b.1d.i16.trap" => "__nvvm_sust_b_1d_i16_trap",
+                    "sust.b.1d.i16.zero" => "__nvvm_sust_b_1d_i16_zero",
+                    "sust.b.1d.i32.clamp" => "__nvvm_sust_b_1d_i32_clamp",
+                    "sust.b.1d.i32.trap" => "__nvvm_sust_b_1d_i32_trap",
+                    "sust.b.1d.i32.zero" => "__nvvm_sust_b_1d_i32_zero",
+                    "sust.b.1d.i64.clamp" => "__nvvm_sust_b_1d_i64_clamp",
+                    "sust.b.1d.i64.trap" => "__nvvm_sust_b_1d_i64_trap",
+                    "sust.b.1d.i64.zero" => "__nvvm_sust_b_1d_i64_zero",
+                    "sust.b.1d.i8.clamp" => "__nvvm_sust_b_1d_i8_clamp",
+                    "sust.b.1d.i8.trap" => "__nvvm_sust_b_1d_i8_trap",
+                    "sust.b.1d.i8.zero" => "__nvvm_sust_b_1d_i8_zero",
+                    "sust.b.1d.v2i16.clamp" => "__nvvm_sust_b_1d_v2i16_clamp",
+                    "sust.b.1d.v2i16.trap" => "__nvvm_sust_b_1d_v2i16_trap",
+                    "sust.b.1d.v2i16.zero" => "__nvvm_sust_b_1d_v2i16_zero",
+                    "sust.b.1d.v2i32.clamp" => "__nvvm_sust_b_1d_v2i32_clamp",
+                    "sust.b.1d.v2i32.trap" => "__nvvm_sust_b_1d_v2i32_trap",
+                    "sust.b.1d.v2i32.zero" => "__nvvm_sust_b_1d_v2i32_zero",
+                    "sust.b.1d.v2i64.clamp" => "__nvvm_sust_b_1d_v2i64_clamp",
+                    "sust.b.1d.v2i64.trap" => "__nvvm_sust_b_1d_v2i64_trap",
+                    "sust.b.1d.v2i64.zero" => "__nvvm_sust_b_1d_v2i64_zero",
+                    "sust.b.1d.v2i8.clamp" => "__nvvm_sust_b_1d_v2i8_clamp",
+                    "sust.b.1d.v2i8.trap" => "__nvvm_sust_b_1d_v2i8_trap",
+                    "sust.b.1d.v2i8.zero" => "__nvvm_sust_b_1d_v2i8_zero",
+                    "sust.b.1d.v4i16.clamp" => "__nvvm_sust_b_1d_v4i16_clamp",
+                    "sust.b.1d.v4i16.trap" => "__nvvm_sust_b_1d_v4i16_trap",
+                    "sust.b.1d.v4i16.zero" => "__nvvm_sust_b_1d_v4i16_zero",
+                    "sust.b.1d.v4i32.clamp" => "__nvvm_sust_b_1d_v4i32_clamp",
+                    "sust.b.1d.v4i32.trap" => "__nvvm_sust_b_1d_v4i32_trap",
+                    "sust.b.1d.v4i32.zero" => "__nvvm_sust_b_1d_v4i32_zero",
+                    "sust.b.1d.v4i8.clamp" => "__nvvm_sust_b_1d_v4i8_clamp",
+                    "sust.b.1d.v4i8.trap" => "__nvvm_sust_b_1d_v4i8_trap",
+                    "sust.b.1d.v4i8.zero" => "__nvvm_sust_b_1d_v4i8_zero",
+                    "sust.b.2d.array.i16.clamp" => "__nvvm_sust_b_2d_array_i16_clamp",
+                    "sust.b.2d.array.i16.trap" => "__nvvm_sust_b_2d_array_i16_trap",
+                    "sust.b.2d.array.i16.zero" => "__nvvm_sust_b_2d_array_i16_zero",
+                    "sust.b.2d.array.i32.clamp" => "__nvvm_sust_b_2d_array_i32_clamp",
+                    "sust.b.2d.array.i32.trap" => "__nvvm_sust_b_2d_array_i32_trap",
+                    "sust.b.2d.array.i32.zero" => "__nvvm_sust_b_2d_array_i32_zero",
+                    "sust.b.2d.array.i64.clamp" => "__nvvm_sust_b_2d_array_i64_clamp",
+                    "sust.b.2d.array.i64.trap" => "__nvvm_sust_b_2d_array_i64_trap",
+                    "sust.b.2d.array.i64.zero" => "__nvvm_sust_b_2d_array_i64_zero",
+                    "sust.b.2d.array.i8.clamp" => "__nvvm_sust_b_2d_array_i8_clamp",
+                    "sust.b.2d.array.i8.trap" => "__nvvm_sust_b_2d_array_i8_trap",
+                    "sust.b.2d.array.i8.zero" => "__nvvm_sust_b_2d_array_i8_zero",
+                    "sust.b.2d.array.v2i16.clamp" => "__nvvm_sust_b_2d_array_v2i16_clamp",
+                    "sust.b.2d.array.v2i16.trap" => "__nvvm_sust_b_2d_array_v2i16_trap",
+                    "sust.b.2d.array.v2i16.zero" => "__nvvm_sust_b_2d_array_v2i16_zero",
+                    "sust.b.2d.array.v2i32.clamp" => "__nvvm_sust_b_2d_array_v2i32_clamp",
+                    "sust.b.2d.array.v2i32.trap" => "__nvvm_sust_b_2d_array_v2i32_trap",
+                    "sust.b.2d.array.v2i32.zero" => "__nvvm_sust_b_2d_array_v2i32_zero",
+                    "sust.b.2d.array.v2i64.clamp" => "__nvvm_sust_b_2d_array_v2i64_clamp",
+                    "sust.b.2d.array.v2i64.trap" => "__nvvm_sust_b_2d_array_v2i64_trap",
+                    "sust.b.2d.array.v2i64.zero" => "__nvvm_sust_b_2d_array_v2i64_zero",
+                    "sust.b.2d.array.v2i8.clamp" => "__nvvm_sust_b_2d_array_v2i8_clamp",
+                    "sust.b.2d.array.v2i8.trap" => "__nvvm_sust_b_2d_array_v2i8_trap",
+                    "sust.b.2d.array.v2i8.zero" => "__nvvm_sust_b_2d_array_v2i8_zero",
+                    "sust.b.2d.array.v4i16.clamp" => "__nvvm_sust_b_2d_array_v4i16_clamp",
+                    "sust.b.2d.array.v4i16.trap" => "__nvvm_sust_b_2d_array_v4i16_trap",
+                    "sust.b.2d.array.v4i16.zero" => "__nvvm_sust_b_2d_array_v4i16_zero",
+                    "sust.b.2d.array.v4i32.clamp" => "__nvvm_sust_b_2d_array_v4i32_clamp",
+                    "sust.b.2d.array.v4i32.trap" => "__nvvm_sust_b_2d_array_v4i32_trap",
+                    "sust.b.2d.array.v4i32.zero" => "__nvvm_sust_b_2d_array_v4i32_zero",
+                    "sust.b.2d.array.v4i8.clamp" => "__nvvm_sust_b_2d_array_v4i8_clamp",
+                    "sust.b.2d.array.v4i8.trap" => "__nvvm_sust_b_2d_array_v4i8_trap",
+                    "sust.b.2d.array.v4i8.zero" => "__nvvm_sust_b_2d_array_v4i8_zero",
+                    "sust.b.2d.i16.clamp" => "__nvvm_sust_b_2d_i16_clamp",
+                    "sust.b.2d.i16.trap" => "__nvvm_sust_b_2d_i16_trap",
+                    "sust.b.2d.i16.zero" => "__nvvm_sust_b_2d_i16_zero",
+                    "sust.b.2d.i32.clamp" => "__nvvm_sust_b_2d_i32_clamp",
+                    "sust.b.2d.i32.trap" => "__nvvm_sust_b_2d_i32_trap",
+                    "sust.b.2d.i32.zero" => "__nvvm_sust_b_2d_i32_zero",
+                    "sust.b.2d.i64.clamp" => "__nvvm_sust_b_2d_i64_clamp",
+                    "sust.b.2d.i64.trap" => "__nvvm_sust_b_2d_i64_trap",
+                    "sust.b.2d.i64.zero" => "__nvvm_sust_b_2d_i64_zero",
+                    "sust.b.2d.i8.clamp" => "__nvvm_sust_b_2d_i8_clamp",
+                    "sust.b.2d.i8.trap" => "__nvvm_sust_b_2d_i8_trap",
+                    "sust.b.2d.i8.zero" => "__nvvm_sust_b_2d_i8_zero",
+                    "sust.b.2d.v2i16.clamp" => "__nvvm_sust_b_2d_v2i16_clamp",
+                    "sust.b.2d.v2i16.trap" => "__nvvm_sust_b_2d_v2i16_trap",
+                    "sust.b.2d.v2i16.zero" => "__nvvm_sust_b_2d_v2i16_zero",
+                    "sust.b.2d.v2i32.clamp" => "__nvvm_sust_b_2d_v2i32_clamp",
+                    "sust.b.2d.v2i32.trap" => "__nvvm_sust_b_2d_v2i32_trap",
+                    "sust.b.2d.v2i32.zero" => "__nvvm_sust_b_2d_v2i32_zero",
+                    "sust.b.2d.v2i64.clamp" => "__nvvm_sust_b_2d_v2i64_clamp",
+                    "sust.b.2d.v2i64.trap" => "__nvvm_sust_b_2d_v2i64_trap",
+                    "sust.b.2d.v2i64.zero" => "__nvvm_sust_b_2d_v2i64_zero",
+                    "sust.b.2d.v2i8.clamp" => "__nvvm_sust_b_2d_v2i8_clamp",
+                    "sust.b.2d.v2i8.trap" => "__nvvm_sust_b_2d_v2i8_trap",
+                    "sust.b.2d.v2i8.zero" => "__nvvm_sust_b_2d_v2i8_zero",
+                    "sust.b.2d.v4i16.clamp" => "__nvvm_sust_b_2d_v4i16_clamp",
+                    "sust.b.2d.v4i16.trap" => "__nvvm_sust_b_2d_v4i16_trap",
+                    "sust.b.2d.v4i16.zero" => "__nvvm_sust_b_2d_v4i16_zero",
+                    "sust.b.2d.v4i32.clamp" => "__nvvm_sust_b_2d_v4i32_clamp",
+                    "sust.b.2d.v4i32.trap" => "__nvvm_sust_b_2d_v4i32_trap",
+                    "sust.b.2d.v4i32.zero" => "__nvvm_sust_b_2d_v4i32_zero",
+                    "sust.b.2d.v4i8.clamp" => "__nvvm_sust_b_2d_v4i8_clamp",
+                    "sust.b.2d.v4i8.trap" => "__nvvm_sust_b_2d_v4i8_trap",
+                    "sust.b.2d.v4i8.zero" => "__nvvm_sust_b_2d_v4i8_zero",
+                    "sust.b.3d.i16.clamp" => "__nvvm_sust_b_3d_i16_clamp",
+                    "sust.b.3d.i16.trap" => "__nvvm_sust_b_3d_i16_trap",
+                    "sust.b.3d.i16.zero" => "__nvvm_sust_b_3d_i16_zero",
+                    "sust.b.3d.i32.clamp" => "__nvvm_sust_b_3d_i32_clamp",
+                    "sust.b.3d.i32.trap" => "__nvvm_sust_b_3d_i32_trap",
+                    "sust.b.3d.i32.zero" => "__nvvm_sust_b_3d_i32_zero",
+                    "sust.b.3d.i64.clamp" => "__nvvm_sust_b_3d_i64_clamp",
+                    "sust.b.3d.i64.trap" => "__nvvm_sust_b_3d_i64_trap",
+                    "sust.b.3d.i64.zero" => "__nvvm_sust_b_3d_i64_zero",
+                    "sust.b.3d.i8.clamp" => "__nvvm_sust_b_3d_i8_clamp",
+                    "sust.b.3d.i8.trap" => "__nvvm_sust_b_3d_i8_trap",
+                    "sust.b.3d.i8.zero" => "__nvvm_sust_b_3d_i8_zero",
+                    "sust.b.3d.v2i16.clamp" => "__nvvm_sust_b_3d_v2i16_clamp",
+                    "sust.b.3d.v2i16.trap" => "__nvvm_sust_b_3d_v2i16_trap",
+                    "sust.b.3d.v2i16.zero" => "__nvvm_sust_b_3d_v2i16_zero",
+                    "sust.b.3d.v2i32.clamp" => "__nvvm_sust_b_3d_v2i32_clamp",
+                    "sust.b.3d.v2i32.trap" => "__nvvm_sust_b_3d_v2i32_trap",
+                    "sust.b.3d.v2i32.zero" => "__nvvm_sust_b_3d_v2i32_zero",
+                    "sust.b.3d.v2i64.clamp" => "__nvvm_sust_b_3d_v2i64_clamp",
+                    "sust.b.3d.v2i64.trap" => "__nvvm_sust_b_3d_v2i64_trap",
+                    "sust.b.3d.v2i64.zero" => "__nvvm_sust_b_3d_v2i64_zero",
+                    "sust.b.3d.v2i8.clamp" => "__nvvm_sust_b_3d_v2i8_clamp",
+                    "sust.b.3d.v2i8.trap" => "__nvvm_sust_b_3d_v2i8_trap",
+                    "sust.b.3d.v2i8.zero" => "__nvvm_sust_b_3d_v2i8_zero",
+                    "sust.b.3d.v4i16.clamp" => "__nvvm_sust_b_3d_v4i16_clamp",
+                    "sust.b.3d.v4i16.trap" => "__nvvm_sust_b_3d_v4i16_trap",
+                    "sust.b.3d.v4i16.zero" => "__nvvm_sust_b_3d_v4i16_zero",
+                    "sust.b.3d.v4i32.clamp" => "__nvvm_sust_b_3d_v4i32_clamp",
+                    "sust.b.3d.v4i32.trap" => "__nvvm_sust_b_3d_v4i32_trap",
+                    "sust.b.3d.v4i32.zero" => "__nvvm_sust_b_3d_v4i32_zero",
+                    "sust.b.3d.v4i8.clamp" => "__nvvm_sust_b_3d_v4i8_clamp",
+                    "sust.b.3d.v4i8.trap" => "__nvvm_sust_b_3d_v4i8_trap",
+                    "sust.b.3d.v4i8.zero" => "__nvvm_sust_b_3d_v4i8_zero",
+                    "sust.p.1d.array.i16.trap" => "__nvvm_sust_p_1d_array_i16_trap",
+                    "sust.p.1d.array.i32.trap" => "__nvvm_sust_p_1d_array_i32_trap",
+                    "sust.p.1d.array.i8.trap" => "__nvvm_sust_p_1d_array_i8_trap",
+                    "sust.p.1d.array.v2i16.trap" => "__nvvm_sust_p_1d_array_v2i16_trap",
+                    "sust.p.1d.array.v2i32.trap" => "__nvvm_sust_p_1d_array_v2i32_trap",
+                    "sust.p.1d.array.v2i8.trap" => "__nvvm_sust_p_1d_array_v2i8_trap",
+                    "sust.p.1d.array.v4i16.trap" => "__nvvm_sust_p_1d_array_v4i16_trap",
+                    "sust.p.1d.array.v4i32.trap" => "__nvvm_sust_p_1d_array_v4i32_trap",
+                    "sust.p.1d.array.v4i8.trap" => "__nvvm_sust_p_1d_array_v4i8_trap",
+                    "sust.p.1d.i16.trap" => "__nvvm_sust_p_1d_i16_trap",
+                    "sust.p.1d.i32.trap" => "__nvvm_sust_p_1d_i32_trap",
+                    "sust.p.1d.i8.trap" => "__nvvm_sust_p_1d_i8_trap",
+                    "sust.p.1d.v2i16.trap" => "__nvvm_sust_p_1d_v2i16_trap",
+                    "sust.p.1d.v2i32.trap" => "__nvvm_sust_p_1d_v2i32_trap",
+                    "sust.p.1d.v2i8.trap" => "__nvvm_sust_p_1d_v2i8_trap",
+                    "sust.p.1d.v4i16.trap" => "__nvvm_sust_p_1d_v4i16_trap",
+                    "sust.p.1d.v4i32.trap" => "__nvvm_sust_p_1d_v4i32_trap",
+                    "sust.p.1d.v4i8.trap" => "__nvvm_sust_p_1d_v4i8_trap",
+                    "sust.p.2d.array.i16.trap" => "__nvvm_sust_p_2d_array_i16_trap",
+                    "sust.p.2d.array.i32.trap" => "__nvvm_sust_p_2d_array_i32_trap",
+                    "sust.p.2d.array.i8.trap" => "__nvvm_sust_p_2d_array_i8_trap",
+                    "sust.p.2d.array.v2i16.trap" => "__nvvm_sust_p_2d_array_v2i16_trap",
+                    "sust.p.2d.array.v2i32.trap" => "__nvvm_sust_p_2d_array_v2i32_trap",
+                    "sust.p.2d.array.v2i8.trap" => "__nvvm_sust_p_2d_array_v2i8_trap",
+                    "sust.p.2d.array.v4i16.trap" => "__nvvm_sust_p_2d_array_v4i16_trap",
+                    "sust.p.2d.array.v4i32.trap" => "__nvvm_sust_p_2d_array_v4i32_trap",
+                    "sust.p.2d.array.v4i8.trap" => "__nvvm_sust_p_2d_array_v4i8_trap",
+                    "sust.p.2d.i16.trap" => "__nvvm_sust_p_2d_i16_trap",
+                    "sust.p.2d.i32.trap" => "__nvvm_sust_p_2d_i32_trap",
+                    "sust.p.2d.i8.trap" => "__nvvm_sust_p_2d_i8_trap",
+                    "sust.p.2d.v2i16.trap" => "__nvvm_sust_p_2d_v2i16_trap",
+                    "sust.p.2d.v2i32.trap" => "__nvvm_sust_p_2d_v2i32_trap",
+                    "sust.p.2d.v2i8.trap" => "__nvvm_sust_p_2d_v2i8_trap",
+                    "sust.p.2d.v4i16.trap" => "__nvvm_sust_p_2d_v4i16_trap",
+                    "sust.p.2d.v4i32.trap" => "__nvvm_sust_p_2d_v4i32_trap",
+                    "sust.p.2d.v4i8.trap" => "__nvvm_sust_p_2d_v4i8_trap",
+                    "sust.p.3d.i16.trap" => "__nvvm_sust_p_3d_i16_trap",
+                    "sust.p.3d.i32.trap" => "__nvvm_sust_p_3d_i32_trap",
+                    "sust.p.3d.i8.trap" => "__nvvm_sust_p_3d_i8_trap",
+                    "sust.p.3d.v2i16.trap" => "__nvvm_sust_p_3d_v2i16_trap",
+                    "sust.p.3d.v2i32.trap" => "__nvvm_sust_p_3d_v2i32_trap",
+                    "sust.p.3d.v2i8.trap" => "__nvvm_sust_p_3d_v2i8_trap",
+                    "sust.p.3d.v4i16.trap" => "__nvvm_sust_p_3d_v4i16_trap",
+                    "sust.p.3d.v4i32.trap" => "__nvvm_sust_p_3d_v4i32_trap",
+                    "sust.p.3d.v4i8.trap" => "__nvvm_sust_p_3d_v4i8_trap",
+                    "swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64",
+                    "trunc.d" => "__nvvm_trunc_d",
+                    "trunc.f" => "__nvvm_trunc_f",
+                    "trunc.ftz.f" => "__nvvm_trunc_ftz_f",
+                    "txq.array.size" => "__nvvm_txq_array_size",
+                    "txq.channel.data.type" => "__nvvm_txq_channel_data_type",
+                    "txq.channel.order" => "__nvvm_txq_channel_order",
+                    "txq.depth" => "__nvvm_txq_depth",
+                    "txq.height" => "__nvvm_txq_height",
+                    "txq.num.mipmap.levels" => "__nvvm_txq_num_mipmap_levels",
+                    "txq.num.samples" => "__nvvm_txq_num_samples",
+                    "txq.width" => "__nvvm_txq_width",
+                    "ue8m0x2.to.bf16x2" => "__nvvm_ue8m0x2_to_bf16x2",
+                    "ui2d.rm" => "__nvvm_ui2d_rm",
+                    "ui2d.rn" => "__nvvm_ui2d_rn",
+                    "ui2d.rp" => "__nvvm_ui2d_rp",
+                    "ui2d.rz" => "__nvvm_ui2d_rz",
+                    "ui2f.rm" => "__nvvm_ui2f_rm",
+                    "ui2f.rn" => "__nvvm_ui2f_rn",
+                    "ui2f.rp" => "__nvvm_ui2f_rp",
+                    "ui2f.rz" => "__nvvm_ui2f_rz",
+                    "ull2d.rm" => "__nvvm_ull2d_rm",
+                    "ull2d.rn" => "__nvvm_ull2d_rn",
+                    "ull2d.rp" => "__nvvm_ull2d_rp",
+                    "ull2d.rz" => "__nvvm_ull2d_rz",
+                    "ull2f.rm" => "__nvvm_ull2f_rm",
+                    "ull2f.rn" => "__nvvm_ull2f_rn",
+                    "ull2f.rp" => "__nvvm_ull2f_rp",
+                    "ull2f.rz" => "__nvvm_ull2f_rz",
+                    "vote.all" => "__nvvm_vote_all",
+                    "vote.all.sync" => "__nvvm_vote_all_sync",
+                    "vote.any" => "__nvvm_vote_any",
+                    "vote.any.sync" => "__nvvm_vote_any_sync",
+                    "vote.ballot" => "__nvvm_vote_ballot",
+                    "vote.ballot.sync" => "__nvvm_vote_ballot_sync",
+                    "vote.uni" => "__nvvm_vote_uni",
+                    "vote.uni.sync" => "__nvvm_vote_uni_sync",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            nvvm(name)
+        }
+        "ppc" => {
+            #[allow(non_snake_case)]
+            fn ppc(name: &str) -> &str {
+                match name {
+                    // ppc
+                    "addex" => "__builtin_ppc_addex",
+                    "addf128.round.to.odd" => "__builtin_addf128_round_to_odd",
+                    "addg6s" => "__builtin_addg6s",
+                    "addg6sd" => "__builtin_ppc_addg6s",
+                    "altivec.crypto.vcipher" => "__builtin_altivec_crypto_vcipher",
+                    "altivec.crypto.vcipherlast" => "__builtin_altivec_crypto_vcipherlast",
+                    "altivec.crypto.vncipher" => "__builtin_altivec_crypto_vncipher",
+                    "altivec.crypto.vncipherlast" => "__builtin_altivec_crypto_vncipherlast",
+                    "altivec.crypto.vpermxor" => "__builtin_altivec_crypto_vpermxor",
+                    "altivec.crypto.vpermxor.be" => "__builtin_altivec_crypto_vpermxor_be",
+                    "altivec.crypto.vpmsumb" => "__builtin_altivec_crypto_vpmsumb",
+                    "altivec.crypto.vpmsumd" => "__builtin_altivec_crypto_vpmsumd",
+                    "altivec.crypto.vpmsumh" => "__builtin_altivec_crypto_vpmsumh",
+                    "altivec.crypto.vpmsumw" => "__builtin_altivec_crypto_vpmsumw",
+                    "altivec.crypto.vsbox" => "__builtin_altivec_crypto_vsbox",
+                    "altivec.crypto.vshasigmad" => "__builtin_altivec_crypto_vshasigmad",
+                    "altivec.crypto.vshasigmaw" => "__builtin_altivec_crypto_vshasigmaw",
+                    "altivec.dss" => "__builtin_altivec_dss",
+                    "altivec.dssall" => "__builtin_altivec_dssall",
+                    "altivec.dst" => "__builtin_altivec_dst",
+                    "altivec.dstst" => "__builtin_altivec_dstst",
+                    "altivec.dststt" => "__builtin_altivec_dststt",
+                    "altivec.dstt" => "__builtin_altivec_dstt",
+                    "altivec.mfvscr" => "__builtin_altivec_mfvscr",
+                    "altivec.mtvscr" => "__builtin_altivec_mtvscr",
+                    "altivec.mtvsrbm" => "__builtin_altivec_mtvsrbm",
+                    "altivec.mtvsrdm" => "__builtin_altivec_mtvsrdm",
+                    "altivec.mtvsrhm" => "__builtin_altivec_mtvsrhm",
+                    "altivec.mtvsrqm" => "__builtin_altivec_mtvsrqm",
+                    "altivec.mtvsrwm" => "__builtin_altivec_mtvsrwm",
+                    "altivec.vabsdub" => "__builtin_altivec_vabsdub",
+                    "altivec.vabsduh" => "__builtin_altivec_vabsduh",
+                    "altivec.vabsduw" => "__builtin_altivec_vabsduw",
+                    "altivec.vaddcuq" => "__builtin_altivec_vaddcuq",
+                    "altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
+                    "altivec.vaddecuq" => "__builtin_altivec_vaddecuq",
+                    "altivec.vaddeuqm" => "__builtin_altivec_vaddeuqm",
+                    "altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
+                    "altivec.vaddshs" => "__builtin_altivec_vaddshs",
+                    "altivec.vaddsws" => "__builtin_altivec_vaddsws",
+                    "altivec.vaddubs" => "__builtin_altivec_vaddubs",
+                    "altivec.vadduhs" => "__builtin_altivec_vadduhs",
+                    "altivec.vadduws" => "__builtin_altivec_vadduws",
+                    "altivec.vavgsb" => "__builtin_altivec_vavgsb",
+                    "altivec.vavgsh" => "__builtin_altivec_vavgsh",
+                    "altivec.vavgsw" => "__builtin_altivec_vavgsw",
+                    "altivec.vavgub" => "__builtin_altivec_vavgub",
+                    "altivec.vavguh" => "__builtin_altivec_vavguh",
+                    "altivec.vavguw" => "__builtin_altivec_vavguw",
+                    "altivec.vbpermd" => "__builtin_altivec_vbpermd",
+                    "altivec.vbpermq" => "__builtin_altivec_vbpermq",
+                    "altivec.vcfsx" => "__builtin_altivec_vcfsx",
+                    "altivec.vcfuged" => "__builtin_altivec_vcfuged",
+                    "altivec.vcfux" => "__builtin_altivec_vcfux",
+                    "altivec.vclrlb" => "__builtin_altivec_vclrlb",
+                    "altivec.vclrrb" => "__builtin_altivec_vclrrb",
+                    "altivec.vclzdm" => "__builtin_altivec_vclzdm",
+                    "altivec.vclzlsbb" => "__builtin_altivec_vclzlsbb",
+                    "altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
+                    "altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
+                    "altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
+                    "altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
+                    "altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
+                    "altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
+                    "altivec.vcmpequd" => "__builtin_altivec_vcmpequd",
+                    "altivec.vcmpequd.p" => "__builtin_altivec_vcmpequd_p",
+                    "altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
+                    "altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
+                    "altivec.vcmpequq" => "__builtin_altivec_vcmpequq",
+                    "altivec.vcmpequq.p" => "__builtin_altivec_vcmpequq_p",
+                    "altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
+                    "altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
+                    "altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
+                    "altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
+                    "altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
+                    "altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
+                    "altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
+                    "altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
+                    "altivec.vcmpgtsd" => "__builtin_altivec_vcmpgtsd",
+                    "altivec.vcmpgtsd.p" => "__builtin_altivec_vcmpgtsd_p",
+                    "altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
+                    "altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
+                    "altivec.vcmpgtsq" => "__builtin_altivec_vcmpgtsq",
+                    "altivec.vcmpgtsq.p" => "__builtin_altivec_vcmpgtsq_p",
+                    "altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
+                    "altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
+                    "altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
+                    "altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
+                    "altivec.vcmpgtud" => "__builtin_altivec_vcmpgtud",
+                    "altivec.vcmpgtud.p" => "__builtin_altivec_vcmpgtud_p",
+                    "altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
+                    "altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
+                    "altivec.vcmpgtuq" => "__builtin_altivec_vcmpgtuq",
+                    "altivec.vcmpgtuq.p" => "__builtin_altivec_vcmpgtuq_p",
+                    "altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
+                    "altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
+                    "altivec.vcmpneb" => "__builtin_altivec_vcmpneb",
+                    "altivec.vcmpneb.p" => "__builtin_altivec_vcmpneb_p",
+                    "altivec.vcmpneh" => "__builtin_altivec_vcmpneh",
+                    "altivec.vcmpneh.p" => "__builtin_altivec_vcmpneh_p",
+                    "altivec.vcmpnew" => "__builtin_altivec_vcmpnew",
+                    "altivec.vcmpnew.p" => "__builtin_altivec_vcmpnew_p",
+                    "altivec.vcmpnezb" => "__builtin_altivec_vcmpnezb",
+                    "altivec.vcmpnezb.p" => "__builtin_altivec_vcmpnezb_p",
+                    "altivec.vcmpnezh" => "__builtin_altivec_vcmpnezh",
+                    "altivec.vcmpnezh.p" => "__builtin_altivec_vcmpnezh_p",
+                    "altivec.vcmpnezw" => "__builtin_altivec_vcmpnezw",
+                    "altivec.vcmpnezw.p" => "__builtin_altivec_vcmpnezw_p",
+                    "altivec.vcntmbb" => "__builtin_altivec_vcntmbb",
+                    "altivec.vcntmbd" => "__builtin_altivec_vcntmbd",
+                    "altivec.vcntmbh" => "__builtin_altivec_vcntmbh",
+                    "altivec.vcntmbw" => "__builtin_altivec_vcntmbw",
+                    "altivec.vctsxs" => "__builtin_altivec_vctsxs",
+                    "altivec.vctuxs" => "__builtin_altivec_vctuxs",
+                    "altivec.vctzdm" => "__builtin_altivec_vctzdm",
+                    "altivec.vctzlsbb" => "__builtin_altivec_vctzlsbb",
+                    "altivec.vdivesd" => "__builtin_altivec_vdivesd",
+                    "altivec.vdivesq" => "__builtin_altivec_vdivesq",
+                    "altivec.vdivesw" => "__builtin_altivec_vdivesw",
+                    "altivec.vdiveud" => "__builtin_altivec_vdiveud",
+                    "altivec.vdiveuq" => "__builtin_altivec_vdiveuq",
+                    "altivec.vdiveuw" => "__builtin_altivec_vdiveuw",
+                    "altivec.vexpandbm" => "__builtin_altivec_vexpandbm",
+                    "altivec.vexpanddm" => "__builtin_altivec_vexpanddm",
+                    "altivec.vexpandhm" => "__builtin_altivec_vexpandhm",
+                    "altivec.vexpandqm" => "__builtin_altivec_vexpandqm",
+                    "altivec.vexpandwm" => "__builtin_altivec_vexpandwm",
+                    "altivec.vexptefp" => "__builtin_altivec_vexptefp",
+                    "altivec.vextddvlx" => "__builtin_altivec_vextddvlx",
+                    "altivec.vextddvrx" => "__builtin_altivec_vextddvrx",
+                    "altivec.vextdubvlx" => "__builtin_altivec_vextdubvlx",
+                    "altivec.vextdubvrx" => "__builtin_altivec_vextdubvrx",
+                    "altivec.vextduhvlx" => "__builtin_altivec_vextduhvlx",
+                    "altivec.vextduhvrx" => "__builtin_altivec_vextduhvrx",
+                    "altivec.vextduwvlx" => "__builtin_altivec_vextduwvlx",
+                    "altivec.vextduwvrx" => "__builtin_altivec_vextduwvrx",
+                    "altivec.vextractbm" => "__builtin_altivec_vextractbm",
+                    "altivec.vextractdm" => "__builtin_altivec_vextractdm",
+                    "altivec.vextracthm" => "__builtin_altivec_vextracthm",
+                    "altivec.vextractqm" => "__builtin_altivec_vextractqm",
+                    "altivec.vextractwm" => "__builtin_altivec_vextractwm",
+                    "altivec.vextsb2d" => "__builtin_altivec_vextsb2d",
+                    "altivec.vextsb2w" => "__builtin_altivec_vextsb2w",
+                    "altivec.vextsd2q" => "__builtin_altivec_vextsd2q",
+                    "altivec.vextsh2d" => "__builtin_altivec_vextsh2d",
+                    "altivec.vextsh2w" => "__builtin_altivec_vextsh2w",
+                    "altivec.vextsw2d" => "__builtin_altivec_vextsw2d",
+                    "altivec.vgbbd" => "__builtin_altivec_vgbbd",
+                    "altivec.vgnb" => "__builtin_altivec_vgnb",
+                    "altivec.vinsblx" => "__builtin_altivec_vinsblx",
+                    "altivec.vinsbrx" => "__builtin_altivec_vinsbrx",
+                    "altivec.vinsbvlx" => "__builtin_altivec_vinsbvlx",
+                    "altivec.vinsbvrx" => "__builtin_altivec_vinsbvrx",
+                    "altivec.vinsdlx" => "__builtin_altivec_vinsdlx",
+                    "altivec.vinsdrx" => "__builtin_altivec_vinsdrx",
+                    "altivec.vinshlx" => "__builtin_altivec_vinshlx",
+                    "altivec.vinshrx" => "__builtin_altivec_vinshrx",
+                    "altivec.vinshvlx" => "__builtin_altivec_vinshvlx",
+                    "altivec.vinshvrx" => "__builtin_altivec_vinshvrx",
+                    "altivec.vinswlx" => "__builtin_altivec_vinswlx",
+                    "altivec.vinswrx" => "__builtin_altivec_vinswrx",
+                    "altivec.vinswvlx" => "__builtin_altivec_vinswvlx",
+                    "altivec.vinswvrx" => "__builtin_altivec_vinswvrx",
+                    "altivec.vlogefp" => "__builtin_altivec_vlogefp",
+                    "altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
+                    "altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
+                    "altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+                    "altivec.vmaxsd" => "__builtin_altivec_vmaxsd",
+                    "altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
+                    "altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
+                    "altivec.vmaxub" => "__builtin_altivec_vmaxub",
+                    "altivec.vmaxud" => "__builtin_altivec_vmaxud",
+                    "altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
+                    "altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
+                    "altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
+                    "altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
+                    "altivec.vminfp" => "__builtin_altivec_vminfp",
+                    "altivec.vminsb" => "__builtin_altivec_vminsb",
+                    "altivec.vminsd" => "__builtin_altivec_vminsd",
+                    "altivec.vminsh" => "__builtin_altivec_vminsh",
+                    "altivec.vminsw" => "__builtin_altivec_vminsw",
+                    "altivec.vminub" => "__builtin_altivec_vminub",
+                    "altivec.vminud" => "__builtin_altivec_vminud",
+                    "altivec.vminuh" => "__builtin_altivec_vminuh",
+                    "altivec.vminuw" => "__builtin_altivec_vminuw",
+                    "altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
+                    "altivec.vmsumcud" => "__builtin_altivec_vmsumcud",
+                    "altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
+                    "altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
+                    "altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
+                    "altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
+                    "altivec.vmsumudm" => "__builtin_altivec_vmsumudm",
+                    "altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
+                    "altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
+                    "altivec.vmulesb" => "__builtin_altivec_vmulesb",
+                    "altivec.vmulesd" => "__builtin_altivec_vmulesd",
+                    "altivec.vmulesh" => "__builtin_altivec_vmulesh",
+                    "altivec.vmulesw" => "__builtin_altivec_vmulesw",
+                    "altivec.vmuleub" => "__builtin_altivec_vmuleub",
+                    "altivec.vmuleud" => "__builtin_altivec_vmuleud",
+                    "altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
+                    "altivec.vmuleuw" => "__builtin_altivec_vmuleuw",
+                    "altivec.vmulhsd" => "__builtin_altivec_vmulhsd",
+                    "altivec.vmulhsw" => "__builtin_altivec_vmulhsw",
+                    "altivec.vmulhud" => "__builtin_altivec_vmulhud",
+                    "altivec.vmulhuw" => "__builtin_altivec_vmulhuw",
+                    "altivec.vmulosb" => "__builtin_altivec_vmulosb",
+                    "altivec.vmulosd" => "__builtin_altivec_vmulosd",
+                    "altivec.vmulosh" => "__builtin_altivec_vmulosh",
+                    "altivec.vmulosw" => "__builtin_altivec_vmulosw",
+                    "altivec.vmuloub" => "__builtin_altivec_vmuloub",
+                    "altivec.vmuloud" => "__builtin_altivec_vmuloud",
+                    "altivec.vmulouh" => "__builtin_altivec_vmulouh",
+                    "altivec.vmulouw" => "__builtin_altivec_vmulouw",
+                    "altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
+                    "altivec.vpdepd" => "__builtin_altivec_vpdepd",
+                    "altivec.vperm" => "__builtin_altivec_vperm_4si",
+                    "altivec.vpextd" => "__builtin_altivec_vpextd",
+                    "altivec.vpkpx" => "__builtin_altivec_vpkpx",
+                    "altivec.vpksdss" => "__builtin_altivec_vpksdss",
+                    "altivec.vpksdus" => "__builtin_altivec_vpksdus",
+                    "altivec.vpkshss" => "__builtin_altivec_vpkshss",
+                    "altivec.vpkshus" => "__builtin_altivec_vpkshus",
+                    "altivec.vpkswss" => "__builtin_altivec_vpkswss",
+                    "altivec.vpkswus" => "__builtin_altivec_vpkswus",
+                    "altivec.vpkudus" => "__builtin_altivec_vpkudus",
+                    "altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
+                    "altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
+                    "altivec.vprtybd" => "__builtin_altivec_vprtybd",
+                    "altivec.vprtybq" => "__builtin_altivec_vprtybq",
+                    "altivec.vprtybw" => "__builtin_altivec_vprtybw",
+                    "altivec.vrefp" => "__builtin_altivec_vrefp",
+                    "altivec.vrfim" => "__builtin_altivec_vrfim",
+                    "altivec.vrfin" => "__builtin_altivec_vrfin",
+                    "altivec.vrfip" => "__builtin_altivec_vrfip",
+                    "altivec.vrfiz" => "__builtin_altivec_vrfiz",
+                    "altivec.vrlb" => "__builtin_altivec_vrlb",
+                    "altivec.vrld" => "__builtin_altivec_vrld",
+                    "altivec.vrldmi" => "__builtin_altivec_vrldmi",
+                    "altivec.vrldnm" => "__builtin_altivec_vrldnm",
+                    "altivec.vrlh" => "__builtin_altivec_vrlh",
+                    "altivec.vrlqmi" => "__builtin_altivec_vrlqmi",
+                    "altivec.vrlqnm" => "__builtin_altivec_vrlqnm",
+                    "altivec.vrlw" => "__builtin_altivec_vrlw",
+                    "altivec.vrlwmi" => "__builtin_altivec_vrlwmi",
+                    "altivec.vrlwnm" => "__builtin_altivec_vrlwnm",
+                    "altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
+                    "altivec.vsel" => "__builtin_altivec_vsel_4si",
+                    "altivec.vsl" => "__builtin_altivec_vsl",
+                    "altivec.vslb" => "__builtin_altivec_vslb",
+                    "altivec.vsldbi" => "__builtin_altivec_vsldbi",
+                    "altivec.vslh" => "__builtin_altivec_vslh",
+                    "altivec.vslo" => "__builtin_altivec_vslo",
+                    "altivec.vslv" => "__builtin_altivec_vslv",
+                    "altivec.vslw" => "__builtin_altivec_vslw",
+                    "altivec.vsr" => "__builtin_altivec_vsr",
+                    "altivec.vsrab" => "__builtin_altivec_vsrab",
+                    "altivec.vsrah" => "__builtin_altivec_vsrah",
+                    "altivec.vsraw" => "__builtin_altivec_vsraw",
+                    "altivec.vsrb" => "__builtin_altivec_vsrb",
+                    "altivec.vsrdbi" => "__builtin_altivec_vsrdbi",
+                    "altivec.vsrh" => "__builtin_altivec_vsrh",
+                    "altivec.vsro" => "__builtin_altivec_vsro",
+                    "altivec.vsrv" => "__builtin_altivec_vsrv",
+                    "altivec.vsrw" => "__builtin_altivec_vsrw",
+                    "altivec.vstribl" => "__builtin_altivec_vstribl",
+                    "altivec.vstribl.p" => "__builtin_altivec_vstribl_p",
+                    "altivec.vstribr" => "__builtin_altivec_vstribr",
+                    "altivec.vstribr.p" => "__builtin_altivec_vstribr_p",
+                    "altivec.vstrihl" => "__builtin_altivec_vstrihl",
+                    "altivec.vstrihl.p" => "__builtin_altivec_vstrihl_p",
+                    "altivec.vstrihr" => "__builtin_altivec_vstrihr",
+                    "altivec.vstrihr.p" => "__builtin_altivec_vstrihr_p",
+                    "altivec.vsubcuq" => "__builtin_altivec_vsubcuq",
+                    "altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
+                    "altivec.vsubecuq" => "__builtin_altivec_vsubecuq",
+                    "altivec.vsubeuqm" => "__builtin_altivec_vsubeuqm",
+                    "altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
+                    "altivec.vsubshs" => "__builtin_altivec_vsubshs",
+                    "altivec.vsubsws" => "__builtin_altivec_vsubsws",
+                    "altivec.vsububs" => "__builtin_altivec_vsububs",
+                    "altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
+                    "altivec.vsubuws" => "__builtin_altivec_vsubuws",
+                    "altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
+                    "altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
+                    "altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
+                    "altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
+                    "altivec.vsumsws" => "__builtin_altivec_vsumsws",
+                    "altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
+                    "altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
+                    "altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
+                    "altivec.vupkhsw" => "__builtin_altivec_vupkhsw",
+                    "altivec.vupklpx" => "__builtin_altivec_vupklpx",
+                    "altivec.vupklsb" => "__builtin_altivec_vupklsb",
+                    "altivec.vupklsh" => "__builtin_altivec_vupklsh",
+                    "altivec.vupklsw" => "__builtin_altivec_vupklsw",
+                    "bcdadd" => "__builtin_ppc_bcdadd",
+                    "bcdadd.p" => "__builtin_ppc_bcdadd_p",
+                    "bcdsub" => "__builtin_ppc_bcdsub",
+                    "bcdsub.p" => "__builtin_ppc_bcdsub_p",
+                    "bpermd" => "__builtin_bpermd",
+                    "cbcdtd" => "__builtin_cbcdtd",
+                    "cbcdtdd" => "__builtin_ppc_cbcdtd",
+                    "cdtbcd" => "__builtin_cdtbcd",
+                    "cdtbcdd" => "__builtin_ppc_cdtbcd",
+                    "cfuged" => "__builtin_cfuged",
+                    "cmpeqb" => "__builtin_ppc_cmpeqb",
+                    "cmprb" => "__builtin_ppc_cmprb",
+                    "cntlzdm" => "__builtin_cntlzdm",
+                    "cnttzdm" => "__builtin_cnttzdm",
+                    "compare.exp.eq" => "__builtin_ppc_compare_exp_eq",
+                    "compare.exp.gt" => "__builtin_ppc_compare_exp_gt",
+                    "compare.exp.lt" => "__builtin_ppc_compare_exp_lt",
+                    "compare.exp.uo" => "__builtin_ppc_compare_exp_uo",
+                    "darn" => "__builtin_darn",
+                    "darn32" => "__builtin_darn_32",
+                    "darnraw" => "__builtin_darn_raw",
+                    "dcbf" => "__builtin_dcbf",
+                    "dcbfl" => "__builtin_ppc_dcbfl",
+                    "dcbflp" => "__builtin_ppc_dcbflp",
+                    "dcbst" => "__builtin_ppc_dcbst",
+                    "dcbt" => "__builtin_ppc_dcbt",
+                    "dcbtst" => "__builtin_ppc_dcbtst",
+                    "dcbtstt" => "__builtin_ppc_dcbtstt",
+                    "dcbtt" => "__builtin_ppc_dcbtt",
+                    "dcbz" => "__builtin_ppc_dcbz",
+                    "divde" => "__builtin_divde",
+                    "divdeu" => "__builtin_divdeu",
+                    "divf128.round.to.odd" => "__builtin_divf128_round_to_odd",
+                    "divwe" => "__builtin_divwe",
+                    "divweu" => "__builtin_divweu",
+                    "eieio" => "__builtin_ppc_eieio",
+                    "extract.exp" => "__builtin_ppc_extract_exp",
+                    "extract.sig" => "__builtin_ppc_extract_sig",
+                    "fcfid" => "__builtin_ppc_fcfid",
+                    "fcfud" => "__builtin_ppc_fcfud",
+                    "fctid" => "__builtin_ppc_fctid",
+                    "fctidz" => "__builtin_ppc_fctidz",
+                    "fctiw" => "__builtin_ppc_fctiw",
+                    "fctiwz" => "__builtin_ppc_fctiwz",
+                    "fctudz" => "__builtin_ppc_fctudz",
+                    "fctuwz" => "__builtin_ppc_fctuwz",
+                    "fence" => "__builtin_ppc_fence",
+                    "fmaf128.round.to.odd" => "__builtin_fmaf128_round_to_odd",
+                    "fmsub" => "__builtin_ppc_fmsub",
+                    "fmsubs" => "__builtin_ppc_fmsubs",
+                    "fnabs" => "__builtin_ppc_fnabs",
+                    "fnabss" => "__builtin_ppc_fnabss",
+                    "fnmadd" => "__builtin_ppc_fnmadd",
+                    "fnmadds" => "__builtin_ppc_fnmadds",
+                    "fre" => "__builtin_ppc_fre",
+                    "fres" => "__builtin_ppc_fres",
+                    "frsqrte" => "__builtin_ppc_frsqrte",
+                    "frsqrtes" => "__builtin_ppc_frsqrtes",
+                    "fsel" => "__builtin_ppc_fsel",
+                    "fsels" => "__builtin_ppc_fsels",
+                    "get.texasr" => "__builtin_get_texasr",
+                    "get.texasru" => "__builtin_get_texasru",
+                    "get.tfhar" => "__builtin_get_tfhar",
+                    "get.tfiar" => "__builtin_get_tfiar",
+                    "icbt" => "__builtin_ppc_icbt",
+                    "insert.exp" => "__builtin_ppc_insert_exp",
+                    "iospace.eieio" => "__builtin_ppc_iospace_eieio",
+                    "iospace.lwsync" => "__builtin_ppc_iospace_lwsync",
+                    "iospace.sync" => "__builtin_ppc_iospace_sync",
+                    "isync" => "__builtin_ppc_isync",
+                    "load4r" => "__builtin_ppc_load4r",
+                    "load8r" => "__builtin_ppc_load8r",
+                    "lwsync" => "__builtin_ppc_lwsync",
+                    "maddhd" => "__builtin_ppc_maddhd",
+                    "maddhdu" => "__builtin_ppc_maddhdu",
+                    "maddld" => "__builtin_ppc_maddld",
+                    "mffsl" => "__builtin_ppc_mffsl",
+                    "mfmsr" => "__builtin_ppc_mfmsr",
+                    "mftbu" => "__builtin_ppc_mftbu",
+                    "mtfsb0" => "__builtin_ppc_mtfsb0",
+                    "mtfsb1" => "__builtin_ppc_mtfsb1",
+                    "mtfsfi" => "__builtin_ppc_mtfsfi",
+                    "mtmsr" => "__builtin_ppc_mtmsr",
+                    "mulf128.round.to.odd" => "__builtin_mulf128_round_to_odd",
+                    "mulhd" => "__builtin_ppc_mulhd",
+                    "mulhdu" => "__builtin_ppc_mulhdu",
+                    "mulhw" => "__builtin_ppc_mulhw",
+                    "mulhwu" => "__builtin_ppc_mulhwu",
+                    "pack.longdouble" => "__builtin_pack_longdouble",
+                    "pdepd" => "__builtin_pdepd",
+                    "pextd" => "__builtin_pextd",
+                    "qpx.qvfabs" => "__builtin_qpx_qvfabs",
+                    "qpx.qvfadd" => "__builtin_qpx_qvfadd",
+                    "qpx.qvfadds" => "__builtin_qpx_qvfadds",
+                    "qpx.qvfcfid" => "__builtin_qpx_qvfcfid",
+                    "qpx.qvfcfids" => "__builtin_qpx_qvfcfids",
+                    "qpx.qvfcfidu" => "__builtin_qpx_qvfcfidu",
+                    "qpx.qvfcfidus" => "__builtin_qpx_qvfcfidus",
+                    "qpx.qvfcmpeq" => "__builtin_qpx_qvfcmpeq",
+                    "qpx.qvfcmpgt" => "__builtin_qpx_qvfcmpgt",
+                    "qpx.qvfcmplt" => "__builtin_qpx_qvfcmplt",
+                    "qpx.qvfcpsgn" => "__builtin_qpx_qvfcpsgn",
+                    "qpx.qvfctid" => "__builtin_qpx_qvfctid",
+                    "qpx.qvfctidu" => "__builtin_qpx_qvfctidu",
+                    "qpx.qvfctiduz" => "__builtin_qpx_qvfctiduz",
+                    "qpx.qvfctidz" => "__builtin_qpx_qvfctidz",
+                    "qpx.qvfctiw" => "__builtin_qpx_qvfctiw",
+                    "qpx.qvfctiwu" => "__builtin_qpx_qvfctiwu",
+                    "qpx.qvfctiwuz" => "__builtin_qpx_qvfctiwuz",
+                    "qpx.qvfctiwz" => "__builtin_qpx_qvfctiwz",
+                    "qpx.qvflogical" => "__builtin_qpx_qvflogical",
+                    "qpx.qvfmadd" => "__builtin_qpx_qvfmadd",
+                    "qpx.qvfmadds" => "__builtin_qpx_qvfmadds",
+                    "qpx.qvfmsub" => "__builtin_qpx_qvfmsub",
+                    "qpx.qvfmsubs" => "__builtin_qpx_qvfmsubs",
+                    "qpx.qvfmul" => "__builtin_qpx_qvfmul",
+                    "qpx.qvfmuls" => "__builtin_qpx_qvfmuls",
+                    "qpx.qvfnabs" => "__builtin_qpx_qvfnabs",
+                    "qpx.qvfneg" => "__builtin_qpx_qvfneg",
+                    "qpx.qvfnmadd" => "__builtin_qpx_qvfnmadd",
+                    "qpx.qvfnmadds" => "__builtin_qpx_qvfnmadds",
+                    "qpx.qvfnmsub" => "__builtin_qpx_qvfnmsub",
+                    "qpx.qvfnmsubs" => "__builtin_qpx_qvfnmsubs",
+                    "qpx.qvfperm" => "__builtin_qpx_qvfperm",
+                    "qpx.qvfre" => "__builtin_qpx_qvfre",
+                    "qpx.qvfres" => "__builtin_qpx_qvfres",
+                    "qpx.qvfrim" => "__builtin_qpx_qvfrim",
+                    "qpx.qvfrin" => "__builtin_qpx_qvfrin",
+                    "qpx.qvfrip" => "__builtin_qpx_qvfrip",
+                    "qpx.qvfriz" => "__builtin_qpx_qvfriz",
+                    "qpx.qvfrsp" => "__builtin_qpx_qvfrsp",
+                    "qpx.qvfrsqrte" => "__builtin_qpx_qvfrsqrte",
+                    "qpx.qvfrsqrtes" => "__builtin_qpx_qvfrsqrtes",
+                    "qpx.qvfsel" => "__builtin_qpx_qvfsel",
+                    "qpx.qvfsub" => "__builtin_qpx_qvfsub",
+                    "qpx.qvfsubs" => "__builtin_qpx_qvfsubs",
+                    "qpx.qvftstnan" => "__builtin_qpx_qvftstnan",
+                    "qpx.qvfxmadd" => "__builtin_qpx_qvfxmadd",
+                    "qpx.qvfxmadds" => "__builtin_qpx_qvfxmadds",
+                    "qpx.qvfxmul" => "__builtin_qpx_qvfxmul",
+                    "qpx.qvfxmuls" => "__builtin_qpx_qvfxmuls",
+                    "qpx.qvfxxcpnmadd" => "__builtin_qpx_qvfxxcpnmadd",
+                    "qpx.qvfxxcpnmadds" => "__builtin_qpx_qvfxxcpnmadds",
+                    "qpx.qvfxxmadd" => "__builtin_qpx_qvfxxmadd",
+                    "qpx.qvfxxmadds" => "__builtin_qpx_qvfxxmadds",
+                    "qpx.qvfxxnpmadd" => "__builtin_qpx_qvfxxnpmadd",
+                    "qpx.qvfxxnpmadds" => "__builtin_qpx_qvfxxnpmadds",
+                    "qpx.qvgpci" => "__builtin_qpx_qvgpci",
+                    "qpx.qvlfcd" => "__builtin_qpx_qvlfcd",
+                    "qpx.qvlfcda" => "__builtin_qpx_qvlfcda",
+                    "qpx.qvlfcs" => "__builtin_qpx_qvlfcs",
+                    "qpx.qvlfcsa" => "__builtin_qpx_qvlfcsa",
+                    "qpx.qvlfd" => "__builtin_qpx_qvlfd",
+                    "qpx.qvlfda" => "__builtin_qpx_qvlfda",
+                    "qpx.qvlfiwa" => "__builtin_qpx_qvlfiwa",
+                    "qpx.qvlfiwaa" => "__builtin_qpx_qvlfiwaa",
+                    "qpx.qvlfiwz" => "__builtin_qpx_qvlfiwz",
+                    "qpx.qvlfiwza" => "__builtin_qpx_qvlfiwza",
+                    "qpx.qvlfs" => "__builtin_qpx_qvlfs",
+                    "qpx.qvlfsa" => "__builtin_qpx_qvlfsa",
+                    "qpx.qvlpcld" => "__builtin_qpx_qvlpcld",
+                    "qpx.qvlpcls" => "__builtin_qpx_qvlpcls",
+                    "qpx.qvlpcrd" => "__builtin_qpx_qvlpcrd",
+                    "qpx.qvlpcrs" => "__builtin_qpx_qvlpcrs",
+                    "qpx.qvstfcd" => "__builtin_qpx_qvstfcd",
+                    "qpx.qvstfcda" => "__builtin_qpx_qvstfcda",
+                    "qpx.qvstfcs" => "__builtin_qpx_qvstfcs",
+                    "qpx.qvstfcsa" => "__builtin_qpx_qvstfcsa",
+                    "qpx.qvstfd" => "__builtin_qpx_qvstfd",
+                    "qpx.qvstfda" => "__builtin_qpx_qvstfda",
+                    "qpx.qvstfiw" => "__builtin_qpx_qvstfiw",
+                    "qpx.qvstfiwa" => "__builtin_qpx_qvstfiwa",
+                    "qpx.qvstfs" => "__builtin_qpx_qvstfs",
+                    "qpx.qvstfsa" => "__builtin_qpx_qvstfsa",
+                    "readflm" => "__builtin_readflm",
+                    "rlwimi" => "__builtin_ppc_rlwimi",
+                    "rlwnm" => "__builtin_ppc_rlwnm",
+                    "scalar.extract.expq" => "__builtin_vsx_scalar_extract_expq",
+                    "scalar.insert.exp.qp" => "__builtin_vsx_scalar_insert_exp_qp",
+                    "set.texasr" => "__builtin_set_texasr",
+                    "set.texasru" => "__builtin_set_texasru",
+                    "set.tfhar" => "__builtin_set_tfhar",
+                    "set.tfiar" => "__builtin_set_tfiar",
+                    "setb" => "__builtin_ppc_setb",
+                    "setflm" => "__builtin_setflm",
+                    "setrnd" => "__builtin_setrnd",
+                    "sqrtf128.round.to.odd" => "__builtin_sqrtf128_round_to_odd",
+                    "stbcx" => "__builtin_ppc_stbcx",
+                    "stdcx" => "__builtin_ppc_stdcx",
+                    "stfiw" => "__builtin_ppc_stfiw",
+                    "store2r" => "__builtin_ppc_store2r",
+                    "store4r" => "__builtin_ppc_store4r",
+                    "store8r" => "__builtin_ppc_store8r",
+                    "stwcx" => "__builtin_ppc_stwcx",
+                    "subf128.round.to.odd" => "__builtin_subf128_round_to_odd",
+                    "sync" => "__builtin_ppc_sync",
+                    "tabort" => "__builtin_tabort",
+                    "tabortdc" => "__builtin_tabortdc",
+                    "tabortdci" => "__builtin_tabortdci",
+                    "tabortwc" => "__builtin_tabortwc",
+                    "tabortwci" => "__builtin_tabortwci",
+                    "tbegin" => "__builtin_tbegin",
+                    "tcheck" => "__builtin_tcheck",
+                    "tdw" => "__builtin_ppc_tdw",
+                    "tend" => "__builtin_tend",
+                    "tendall" => "__builtin_tendall",
+                    "trap" => "__builtin_ppc_trap",
+                    "trapd" => "__builtin_ppc_trapd",
+                    "trechkpt" => "__builtin_trechkpt",
+                    "treclaim" => "__builtin_treclaim",
+                    "tresume" => "__builtin_tresume",
+                    "truncf128.round.to.odd" => "__builtin_truncf128_round_to_odd",
+                    "tsr" => "__builtin_tsr",
+                    "tsuspend" => "__builtin_tsuspend",
+                    "ttest" => "__builtin_ttest",
+                    "tw" => "__builtin_ppc_tw",
+                    "unpack.longdouble" => "__builtin_unpack_longdouble",
+                    "vsx.xsmaxdp" => "__builtin_vsx_xsmaxdp",
+                    "vsx.xsmindp" => "__builtin_vsx_xsmindp",
+                    "vsx.xvcmpeqdp" => "__builtin_vsx_xvcmpeqdp",
+                    "vsx.xvcmpeqdp.p" => "__builtin_vsx_xvcmpeqdp_p",
+                    "vsx.xvcmpeqsp" => "__builtin_vsx_xvcmpeqsp",
+                    "vsx.xvcmpeqsp.p" => "__builtin_vsx_xvcmpeqsp_p",
+                    "vsx.xvcmpgedp" => "__builtin_vsx_xvcmpgedp",
+                    "vsx.xvcmpgedp.p" => "__builtin_vsx_xvcmpgedp_p",
+                    "vsx.xvcmpgesp" => "__builtin_vsx_xvcmpgesp",
+                    "vsx.xvcmpgesp.p" => "__builtin_vsx_xvcmpgesp_p",
+                    "vsx.xvcmpgtdp" => "__builtin_vsx_xvcmpgtdp",
+                    "vsx.xvcmpgtdp.p" => "__builtin_vsx_xvcmpgtdp_p",
+                    "vsx.xvcmpgtsp" => "__builtin_vsx_xvcmpgtsp",
+                    "vsx.xvcmpgtsp.p" => "__builtin_vsx_xvcmpgtsp_p",
+                    "vsx.xvcvbf16spn" => "__builtin_vsx_xvcvbf16spn",
+                    "vsx.xvcvdpsp" => "__builtin_vsx_xvcvdpsp",
+                    "vsx.xvcvdpsxws" => "__builtin_vsx_xvcvdpsxws",
+                    "vsx.xvcvdpuxws" => "__builtin_vsx_xvcvdpuxws",
+                    "vsx.xvcvhpsp" => "__builtin_vsx_xvcvhpsp",
+                    "vsx.xvcvspbf16" => "__builtin_vsx_xvcvspbf16",
+                    "vsx.xvcvspdp" => "__builtin_vsx_xvcvspdp",
+                    "vsx.xvcvsphp" => "__builtin_vsx_xvcvsphp",
+                    "vsx.xvcvspsxds" => "__builtin_vsx_xvcvspsxds",
+                    "vsx.xvcvspuxds" => "__builtin_vsx_xvcvspuxds",
+                    "vsx.xvcvsxdsp" => "__builtin_vsx_xvcvsxdsp",
+                    "vsx.xvcvsxwdp" => "__builtin_vsx_xvcvsxwdp",
+                    "vsx.xvcvuxdsp" => "__builtin_vsx_xvcvuxdsp",
+                    "vsx.xvcvuxwdp" => "__builtin_vsx_xvcvuxwdp",
+                    "vsx.xvdivdp" => "__builtin_vsx_xvdivdp",
+                    "vsx.xvdivsp" => "__builtin_vsx_xvdivsp",
+                    "vsx.xviexpdp" => "__builtin_vsx_xviexpdp",
+                    "vsx.xviexpsp" => "__builtin_vsx_xviexpsp",
+                    "vsx.xvmaxdp" => "__builtin_vsx_xvmaxdp",
+                    "vsx.xvmaxsp" => "__builtin_vsx_xvmaxsp",
+                    "vsx.xvmindp" => "__builtin_vsx_xvmindp",
+                    "vsx.xvminsp" => "__builtin_vsx_xvminsp",
+                    "vsx.xvredp" => "__builtin_vsx_xvredp",
+                    "vsx.xvresp" => "__builtin_vsx_xvresp",
+                    "vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
+                    "vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
+                    "vsx.xvtdivdp" => "__builtin_vsx_xvtdivdp",
+                    "vsx.xvtdivsp" => "__builtin_vsx_xvtdivsp",
+                    "vsx.xvtlsbb" => "__builtin_vsx_xvtlsbb",
+                    "vsx.xvtsqrtdp" => "__builtin_vsx_xvtsqrtdp",
+                    "vsx.xvtsqrtsp" => "__builtin_vsx_xvtsqrtsp",
+                    "vsx.xvtstdcdp" => "__builtin_vsx_xvtstdcdp",
+                    "vsx.xvtstdcsp" => "__builtin_vsx_xvtstdcsp",
+                    "vsx.xvxexpdp" => "__builtin_vsx_xvxexpdp",
+                    "vsx.xvxexpsp" => "__builtin_vsx_xvxexpsp",
+                    "vsx.xvxsigdp" => "__builtin_vsx_xvxsigdp",
+                    "vsx.xvxsigsp" => "__builtin_vsx_xvxsigsp",
+                    "vsx.xxblendvb" => "__builtin_vsx_xxblendvb",
+                    "vsx.xxblendvd" => "__builtin_vsx_xxblendvd",
+                    "vsx.xxblendvh" => "__builtin_vsx_xxblendvh",
+                    "vsx.xxblendvw" => "__builtin_vsx_xxblendvw",
+                    "vsx.xxeval" => "__builtin_vsx_xxeval",
+                    "vsx.xxextractuw" => "__builtin_vsx_xxextractuw",
+                    "vsx.xxgenpcvbm" => "__builtin_vsx_xxgenpcvbm",
+                    "vsx.xxgenpcvdm" => "__builtin_vsx_xxgenpcvdm",
+                    "vsx.xxgenpcvhm" => "__builtin_vsx_xxgenpcvhm",
+                    "vsx.xxgenpcvwm" => "__builtin_vsx_xxgenpcvwm",
+                    "vsx.xxinsertw" => "__builtin_vsx_xxinsertw",
+                    "vsx.xxleqv" => "__builtin_vsx_xxleqv",
+                    "vsx.xxpermx" => "__builtin_vsx_xxpermx",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            ppc(name)
+        }
+        "ptx" => {
+            #[allow(non_snake_case)]
+            fn ptx(name: &str) -> &str {
+                match name {
+                    // ptx
+                    "bar.sync" => "__builtin_ptx_bar_sync",
+                    "read.clock" => "__builtin_ptx_read_clock",
+                    "read.clock64" => "__builtin_ptx_read_clock64",
+                    "read.gridid" => "__builtin_ptx_read_gridid",
+                    "read.laneid" => "__builtin_ptx_read_laneid",
+                    "read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
+                    "read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
+                    "read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
+                    "read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
+                    "read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
+                    "read.nsmid" => "__builtin_ptx_read_nsmid",
+                    "read.nwarpid" => "__builtin_ptx_read_nwarpid",
+                    "read.pm0" => "__builtin_ptx_read_pm0",
+                    "read.pm1" => "__builtin_ptx_read_pm1",
+                    "read.pm2" => "__builtin_ptx_read_pm2",
+                    "read.pm3" => "__builtin_ptx_read_pm3",
+                    "read.smid" => "__builtin_ptx_read_smid",
+                    "read.warpid" => "__builtin_ptx_read_warpid",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            ptx(name)
+        }
+        "r600" => {
+            #[allow(non_snake_case)]
+            fn r600(name: &str) -> &str {
+                match name {
+                    // r600
+                    "group.barrier" => "__builtin_r600_group_barrier",
+                    "implicitarg.ptr" => "__builtin_r600_implicitarg_ptr",
+                    "rat.store.typed" => "__builtin_r600_rat_store_typed",
+                    "read.global.size.x" => "__builtin_r600_read_global_size_x",
+                    "read.global.size.y" => "__builtin_r600_read_global_size_y",
+                    "read.global.size.z" => "__builtin_r600_read_global_size_z",
+                    "read.ngroups.x" => "__builtin_r600_read_ngroups_x",
+                    "read.ngroups.y" => "__builtin_r600_read_ngroups_y",
+                    "read.ngroups.z" => "__builtin_r600_read_ngroups_z",
+                    "read.tgid.x" => "__builtin_r600_read_tgid_x",
+                    "read.tgid.y" => "__builtin_r600_read_tgid_y",
+                    "read.tgid.z" => "__builtin_r600_read_tgid_z",
+                    "read.tidig.x" => "__builtin_r600_read_tidig_x",
+                    "read.tidig.y" => "__builtin_r600_read_tidig_y",
+                    "read.tidig.z" => "__builtin_r600_read_tidig_z",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            r600(name)
+        }
+        "riscv" => {
+            #[allow(non_snake_case)]
+            fn riscv(name: &str) -> &str {
+                match name {
+                    // riscv
+                    "aes32dsi" => "__builtin_riscv_aes32dsi",
+                    "aes32dsmi" => "__builtin_riscv_aes32dsmi",
+                    "aes32esi" => "__builtin_riscv_aes32esi",
+                    "aes32esmi" => "__builtin_riscv_aes32esmi",
+                    "aes64ds" => "__builtin_riscv_aes64ds",
+                    "aes64dsm" => "__builtin_riscv_aes64dsm",
+                    "aes64es" => "__builtin_riscv_aes64es",
+                    "aes64esm" => "__builtin_riscv_aes64esm",
+                    "aes64im" => "__builtin_riscv_aes64im",
+                    "aes64ks1i" => "__builtin_riscv_aes64ks1i",
+                    "aes64ks2" => "__builtin_riscv_aes64ks2",
+                    "sha512sig0" => "__builtin_riscv_sha512sig0",
+                    "sha512sig0h" => "__builtin_riscv_sha512sig0h",
+                    "sha512sig0l" => "__builtin_riscv_sha512sig0l",
+                    "sha512sig1" => "__builtin_riscv_sha512sig1",
+                    "sha512sig1h" => "__builtin_riscv_sha512sig1h",
+                    "sha512sig1l" => "__builtin_riscv_sha512sig1l",
+                    "sha512sum0" => "__builtin_riscv_sha512sum0",
+                    "sha512sum0r" => "__builtin_riscv_sha512sum0r",
+                    "sha512sum1" => "__builtin_riscv_sha512sum1",
+                    "sha512sum1r" => "__builtin_riscv_sha512sum1r",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            riscv(name)
+        }
+        "s390" => {
+            #[allow(non_snake_case)]
+            fn s390(name: &str) -> &str {
+                match name {
+                    // s390
+                    "bdepg" => "__builtin_s390_bdepg",
+                    "bextg" => "__builtin_s390_bextg",
+                    "efpc" => "__builtin_s390_efpc",
+                    "etnd" => "__builtin_tx_nesting_depth",
+                    "lcbb" => "__builtin_s390_lcbb",
+                    "ppa.txassist" => "__builtin_tx_assist",
+                    "sfpc" => "__builtin_s390_sfpc",
+                    "tend" => "__builtin_tend",
+                    "vaccb" => "__builtin_s390_vaccb",
+                    "vacccq" => "__builtin_s390_vacccq",
+                    "vaccf" => "__builtin_s390_vaccf",
+                    "vaccg" => "__builtin_s390_vaccg",
+                    "vacch" => "__builtin_s390_vacch",
+                    "vaccq" => "__builtin_s390_vaccq",
+                    "vacq" => "__builtin_s390_vacq",
+                    "vaq" => "__builtin_s390_vaq",
+                    "vavgb" => "__builtin_s390_vavgb",
+                    "vavgf" => "__builtin_s390_vavgf",
+                    "vavgg" => "__builtin_s390_vavgg",
+                    "vavgh" => "__builtin_s390_vavgh",
+                    "vavglb" => "__builtin_s390_vavglb",
+                    "vavglf" => "__builtin_s390_vavglf",
+                    "vavglg" => "__builtin_s390_vavglg",
+                    "vavglh" => "__builtin_s390_vavglh",
+                    "vavglq" => "__builtin_s390_vavglq",
+                    "vavgq" => "__builtin_s390_vavgq",
+                    "vbperm" => "__builtin_s390_vbperm",
+                    "vcfn" => "__builtin_s390_vcfn",
+                    "vcksm" => "__builtin_s390_vcksm",
+                    "vclfnhs" => "__builtin_s390_vclfnhs",
+                    "vclfnls" => "__builtin_s390_vclfnls",
+                    "vcnf" => "__builtin_s390_vcnf",
+                    "vcrnfs" => "__builtin_s390_vcrnfs",
+                    "verimb" => "__builtin_s390_verimb",
+                    "verimf" => "__builtin_s390_verimf",
+                    "verimg" => "__builtin_s390_verimg",
+                    "verimh" => "__builtin_s390_verimh",
+                    "veval" => "__builtin_s390_veval",
+                    "vfaeb" => "__builtin_s390_vfaeb",
+                    "vfaef" => "__builtin_s390_vfaef",
+                    "vfaeh" => "__builtin_s390_vfaeh",
+                    "vfaezb" => "__builtin_s390_vfaezb",
+                    "vfaezf" => "__builtin_s390_vfaezf",
+                    "vfaezh" => "__builtin_s390_vfaezh",
+                    "vfeeb" => "__builtin_s390_vfeeb",
+                    "vfeef" => "__builtin_s390_vfeef",
+                    "vfeeh" => "__builtin_s390_vfeeh",
+                    "vfeezb" => "__builtin_s390_vfeezb",
+                    "vfeezf" => "__builtin_s390_vfeezf",
+                    "vfeezh" => "__builtin_s390_vfeezh",
+                    "vfeneb" => "__builtin_s390_vfeneb",
+                    "vfenef" => "__builtin_s390_vfenef",
+                    "vfeneh" => "__builtin_s390_vfeneh",
+                    "vfenezb" => "__builtin_s390_vfenezb",
+                    "vfenezf" => "__builtin_s390_vfenezf",
+                    "vfenezh" => "__builtin_s390_vfenezh",
+                    "vgemb" => "__builtin_s390_vgemb",
+                    "vgemf" => "__builtin_s390_vgemf",
+                    "vgemg" => "__builtin_s390_vgemg",
+                    "vgemh" => "__builtin_s390_vgemh",
+                    "vgemq" => "__builtin_s390_vgemq",
+                    "vgfmab" => "__builtin_s390_vgfmab",
+                    "vgfmaf" => "__builtin_s390_vgfmaf",
+                    "vgfmag" => "__builtin_s390_vgfmag",
+                    "vgfmah" => "__builtin_s390_vgfmah",
+                    "vgfmb" => "__builtin_s390_vgfmb",
+                    "vgfmf" => "__builtin_s390_vgfmf",
+                    "vgfmg" => "__builtin_s390_vgfmg",
+                    "vgfmh" => "__builtin_s390_vgfmh",
+                    "vistrb" => "__builtin_s390_vistrb",
+                    "vistrf" => "__builtin_s390_vistrf",
+                    "vistrh" => "__builtin_s390_vistrh",
+                    "vlbb" => "__builtin_s390_vlbb",
+                    "vll" => "__builtin_s390_vll",
+                    "vlrl" => "__builtin_s390_vlrlr",
+                    "vmaeb" => "__builtin_s390_vmaeb",
+                    "vmaef" => "__builtin_s390_vmaef",
+                    "vmaeg" => "__builtin_s390_vmaeg",
+                    "vmaeh" => "__builtin_s390_vmaeh",
+                    "vmahb" => "__builtin_s390_vmahb",
+                    "vmahf" => "__builtin_s390_vmahf",
+                    "vmahg" => "__builtin_s390_vmahg",
+                    "vmahh" => "__builtin_s390_vmahh",
+                    "vmahq" => "__builtin_s390_vmahq",
+                    "vmaleb" => "__builtin_s390_vmaleb",
+                    "vmalef" => "__builtin_s390_vmalef",
+                    "vmaleg" => "__builtin_s390_vmaleg",
+                    "vmaleh" => "__builtin_s390_vmaleh",
+                    "vmalhb" => "__builtin_s390_vmalhb",
+                    "vmalhf" => "__builtin_s390_vmalhf",
+                    "vmalhg" => "__builtin_s390_vmalhg",
+                    "vmalhh" => "__builtin_s390_vmalhh",
+                    "vmalhq" => "__builtin_s390_vmalhq",
+                    "vmalob" => "__builtin_s390_vmalob",
+                    "vmalof" => "__builtin_s390_vmalof",
+                    "vmalog" => "__builtin_s390_vmalog",
+                    "vmaloh" => "__builtin_s390_vmaloh",
+                    "vmaob" => "__builtin_s390_vmaob",
+                    "vmaof" => "__builtin_s390_vmaof",
+                    "vmaog" => "__builtin_s390_vmaog",
+                    "vmaoh" => "__builtin_s390_vmaoh",
+                    "vmeb" => "__builtin_s390_vmeb",
+                    "vmef" => "__builtin_s390_vmef",
+                    "vmeg" => "__builtin_s390_vmeg",
+                    "vmeh" => "__builtin_s390_vmeh",
+                    "vmhb" => "__builtin_s390_vmhb",
+                    "vmhf" => "__builtin_s390_vmhf",
+                    "vmhg" => "__builtin_s390_vmhg",
+                    "vmhh" => "__builtin_s390_vmhh",
+                    "vmhq" => "__builtin_s390_vmhq",
+                    "vmleb" => "__builtin_s390_vmleb",
+                    "vmlef" => "__builtin_s390_vmlef",
+                    "vmleg" => "__builtin_s390_vmleg",
+                    "vmleh" => "__builtin_s390_vmleh",
+                    "vmlhb" => "__builtin_s390_vmlhb",
+                    "vmlhf" => "__builtin_s390_vmlhf",
+                    "vmlhg" => "__builtin_s390_vmlhg",
+                    "vmlhh" => "__builtin_s390_vmlhh",
+                    "vmlhq" => "__builtin_s390_vmlhq",
+                    "vmlob" => "__builtin_s390_vmlob",
+                    "vmlof" => "__builtin_s390_vmlof",
+                    "vmlog" => "__builtin_s390_vmlog",
+                    "vmloh" => "__builtin_s390_vmloh",
+                    "vmob" => "__builtin_s390_vmob",
+                    "vmof" => "__builtin_s390_vmof",
+                    "vmog" => "__builtin_s390_vmog",
+                    "vmoh" => "__builtin_s390_vmoh",
+                    "vmslg" => "__builtin_s390_vmslg",
+                    "vpdi" => "__builtin_s390_vpdi",
+                    "vperm" => "__builtin_s390_vperm",
+                    "vpklsf" => "__builtin_s390_vpklsf",
+                    "vpklsg" => "__builtin_s390_vpklsg",
+                    "vpklsh" => "__builtin_s390_vpklsh",
+                    "vpksf" => "__builtin_s390_vpksf",
+                    "vpksg" => "__builtin_s390_vpksg",
+                    "vpksh" => "__builtin_s390_vpksh",
+                    "vsbcbiq" => "__builtin_s390_vsbcbiq",
+                    "vsbiq" => "__builtin_s390_vsbiq",
+                    "vscbib" => "__builtin_s390_vscbib",
+                    "vscbif" => "__builtin_s390_vscbif",
+                    "vscbig" => "__builtin_s390_vscbig",
+                    "vscbih" => "__builtin_s390_vscbih",
+                    "vscbiq" => "__builtin_s390_vscbiq",
+                    "vsl" => "__builtin_s390_vsl",
+                    "vslb" => "__builtin_s390_vslb",
+                    "vsld" => "__builtin_s390_vsld",
+                    "vsldb" => "__builtin_s390_vsldb",
+                    "vsq" => "__builtin_s390_vsq",
+                    "vsra" => "__builtin_s390_vsra",
+                    "vsrab" => "__builtin_s390_vsrab",
+                    "vsrd" => "__builtin_s390_vsrd",
+                    "vsrl" => "__builtin_s390_vsrl",
+                    "vsrlb" => "__builtin_s390_vsrlb",
+                    "vstl" => "__builtin_s390_vstl",
+                    "vstrcb" => "__builtin_s390_vstrcb",
+                    "vstrcf" => "__builtin_s390_vstrcf",
+                    "vstrch" => "__builtin_s390_vstrch",
+                    "vstrczb" => "__builtin_s390_vstrczb",
+                    "vstrczf" => "__builtin_s390_vstrczf",
+                    "vstrczh" => "__builtin_s390_vstrczh",
+                    "vstrl" => "__builtin_s390_vstrlr",
+                    "vsumb" => "__builtin_s390_vsumb",
+                    "vsumgf" => "__builtin_s390_vsumgf",
+                    "vsumgh" => "__builtin_s390_vsumgh",
+                    "vsumh" => "__builtin_s390_vsumh",
+                    "vsumqf" => "__builtin_s390_vsumqf",
+                    "vsumqg" => "__builtin_s390_vsumqg",
+                    "vtm" => "__builtin_s390_vtm",
+                    "vuphb" => "__builtin_s390_vuphb",
+                    "vuphf" => "__builtin_s390_vuphf",
+                    "vuphg" => "__builtin_s390_vuphg",
+                    "vuphh" => "__builtin_s390_vuphh",
+                    "vuplb" => "__builtin_s390_vuplb",
+                    "vuplf" => "__builtin_s390_vuplf",
+                    "vuplg" => "__builtin_s390_vuplg",
+                    "vuplhb" => "__builtin_s390_vuplhb",
+                    "vuplhf" => "__builtin_s390_vuplhf",
+                    "vuplhg" => "__builtin_s390_vuplhg",
+                    "vuplhh" => "__builtin_s390_vuplhh",
+                    "vuplhw" => "__builtin_s390_vuplhw",
+                    "vupllb" => "__builtin_s390_vupllb",
+                    "vupllf" => "__builtin_s390_vupllf",
+                    "vupllg" => "__builtin_s390_vupllg",
+                    "vupllh" => "__builtin_s390_vupllh",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            s390(name)
+        }
+        "ve" => {
+            #[allow(non_snake_case)]
+            fn ve(name: &str) -> &str {
+                match name {
+                    // ve
+                    "vl.andm.MMM" => "__builtin_ve_vl_andm_MMM",
+                    "vl.andm.mmm" => "__builtin_ve_vl_andm_mmm",
+                    "vl.eqvm.MMM" => "__builtin_ve_vl_eqvm_MMM",
+                    "vl.eqvm.mmm" => "__builtin_ve_vl_eqvm_mmm",
+                    "vl.extract.vm512l" => "__builtin_ve_vl_extract_vm512l",
+                    "vl.extract.vm512u" => "__builtin_ve_vl_extract_vm512u",
+                    "vl.fencec.s" => "__builtin_ve_vl_fencec_s",
+                    "vl.fencei" => "__builtin_ve_vl_fencei",
+                    "vl.fencem.s" => "__builtin_ve_vl_fencem_s",
+                    "vl.fidcr.sss" => "__builtin_ve_vl_fidcr_sss",
+                    "vl.insert.vm512l" => "__builtin_ve_vl_insert_vm512l",
+                    "vl.insert.vm512u" => "__builtin_ve_vl_insert_vm512u",
+                    "vl.lcr.sss" => "__builtin_ve_vl_lcr_sss",
+                    "vl.lsv.vvss" => "__builtin_ve_vl_lsv_vvss",
+                    "vl.lvm.MMss" => "__builtin_ve_vl_lvm_MMss",
+                    "vl.lvm.mmss" => "__builtin_ve_vl_lvm_mmss",
+                    "vl.lvsd.svs" => "__builtin_ve_vl_lvsd_svs",
+                    "vl.lvsl.svs" => "__builtin_ve_vl_lvsl_svs",
+                    "vl.lvss.svs" => "__builtin_ve_vl_lvss_svs",
+                    "vl.lzvm.sml" => "__builtin_ve_vl_lzvm_sml",
+                    "vl.negm.MM" => "__builtin_ve_vl_negm_MM",
+                    "vl.negm.mm" => "__builtin_ve_vl_negm_mm",
+                    "vl.nndm.MMM" => "__builtin_ve_vl_nndm_MMM",
+                    "vl.nndm.mmm" => "__builtin_ve_vl_nndm_mmm",
+                    "vl.orm.MMM" => "__builtin_ve_vl_orm_MMM",
+                    "vl.orm.mmm" => "__builtin_ve_vl_orm_mmm",
+                    "vl.pack.f32a" => "__builtin_ve_vl_pack_f32a",
+                    "vl.pack.f32p" => "__builtin_ve_vl_pack_f32p",
+                    "vl.pcvm.sml" => "__builtin_ve_vl_pcvm_sml",
+                    "vl.pfchv.ssl" => "__builtin_ve_vl_pfchv_ssl",
+                    "vl.pfchvnc.ssl" => "__builtin_ve_vl_pfchvnc_ssl",
+                    "vl.pvadds.vsvMvl" => "__builtin_ve_vl_pvadds_vsvMvl",
+                    "vl.pvadds.vsvl" => "__builtin_ve_vl_pvadds_vsvl",
+                    "vl.pvadds.vsvvl" => "__builtin_ve_vl_pvadds_vsvvl",
+                    "vl.pvadds.vvvMvl" => "__builtin_ve_vl_pvadds_vvvMvl",
+                    "vl.pvadds.vvvl" => "__builtin_ve_vl_pvadds_vvvl",
+                    "vl.pvadds.vvvvl" => "__builtin_ve_vl_pvadds_vvvvl",
+                    "vl.pvaddu.vsvMvl" => "__builtin_ve_vl_pvaddu_vsvMvl",
+                    "vl.pvaddu.vsvl" => "__builtin_ve_vl_pvaddu_vsvl",
+                    "vl.pvaddu.vsvvl" => "__builtin_ve_vl_pvaddu_vsvvl",
+                    "vl.pvaddu.vvvMvl" => "__builtin_ve_vl_pvaddu_vvvMvl",
+                    "vl.pvaddu.vvvl" => "__builtin_ve_vl_pvaddu_vvvl",
+                    "vl.pvaddu.vvvvl" => "__builtin_ve_vl_pvaddu_vvvvl",
+                    "vl.pvand.vsvMvl" => "__builtin_ve_vl_pvand_vsvMvl",
+                    "vl.pvand.vsvl" => "__builtin_ve_vl_pvand_vsvl",
+                    "vl.pvand.vsvvl" => "__builtin_ve_vl_pvand_vsvvl",
+                    "vl.pvand.vvvMvl" => "__builtin_ve_vl_pvand_vvvMvl",
+                    "vl.pvand.vvvl" => "__builtin_ve_vl_pvand_vvvl",
+                    "vl.pvand.vvvvl" => "__builtin_ve_vl_pvand_vvvvl",
+                    "vl.pvbrd.vsMvl" => "__builtin_ve_vl_pvbrd_vsMvl",
+                    "vl.pvbrd.vsl" => "__builtin_ve_vl_pvbrd_vsl",
+                    "vl.pvbrd.vsvl" => "__builtin_ve_vl_pvbrd_vsvl",
+                    "vl.pvbrv.vvMvl" => "__builtin_ve_vl_pvbrv_vvMvl",
+                    "vl.pvbrv.vvl" => "__builtin_ve_vl_pvbrv_vvl",
+                    "vl.pvbrv.vvvl" => "__builtin_ve_vl_pvbrv_vvvl",
+                    "vl.pvbrvlo.vvl" => "__builtin_ve_vl_pvbrvlo_vvl",
+                    "vl.pvbrvlo.vvmvl" => "__builtin_ve_vl_pvbrvlo_vvmvl",
+                    "vl.pvbrvlo.vvvl" => "__builtin_ve_vl_pvbrvlo_vvvl",
+                    "vl.pvbrvup.vvl" => "__builtin_ve_vl_pvbrvup_vvl",
+                    "vl.pvbrvup.vvmvl" => "__builtin_ve_vl_pvbrvup_vvmvl",
+                    "vl.pvbrvup.vvvl" => "__builtin_ve_vl_pvbrvup_vvvl",
+                    "vl.pvcmps.vsvMvl" => "__builtin_ve_vl_pvcmps_vsvMvl",
+                    "vl.pvcmps.vsvl" => "__builtin_ve_vl_pvcmps_vsvl",
+                    "vl.pvcmps.vsvvl" => "__builtin_ve_vl_pvcmps_vsvvl",
+                    "vl.pvcmps.vvvMvl" => "__builtin_ve_vl_pvcmps_vvvMvl",
+                    "vl.pvcmps.vvvl" => "__builtin_ve_vl_pvcmps_vvvl",
+                    "vl.pvcmps.vvvvl" => "__builtin_ve_vl_pvcmps_vvvvl",
+                    "vl.pvcmpu.vsvMvl" => "__builtin_ve_vl_pvcmpu_vsvMvl",
+                    "vl.pvcmpu.vsvl" => "__builtin_ve_vl_pvcmpu_vsvl",
+                    "vl.pvcmpu.vsvvl" => "__builtin_ve_vl_pvcmpu_vsvvl",
+                    "vl.pvcmpu.vvvMvl" => "__builtin_ve_vl_pvcmpu_vvvMvl",
+                    "vl.pvcmpu.vvvl" => "__builtin_ve_vl_pvcmpu_vvvl",
+                    "vl.pvcmpu.vvvvl" => "__builtin_ve_vl_pvcmpu_vvvvl",
+                    "vl.pvcvtsw.vvl" => "__builtin_ve_vl_pvcvtsw_vvl",
+                    "vl.pvcvtsw.vvvl" => "__builtin_ve_vl_pvcvtsw_vvvl",
+                    "vl.pvcvtws.vvMvl" => "__builtin_ve_vl_pvcvtws_vvMvl",
+                    "vl.pvcvtws.vvl" => "__builtin_ve_vl_pvcvtws_vvl",
+                    "vl.pvcvtws.vvvl" => "__builtin_ve_vl_pvcvtws_vvvl",
+                    "vl.pvcvtwsrz.vvMvl" => "__builtin_ve_vl_pvcvtwsrz_vvMvl",
+                    "vl.pvcvtwsrz.vvl" => "__builtin_ve_vl_pvcvtwsrz_vvl",
+                    "vl.pvcvtwsrz.vvvl" => "__builtin_ve_vl_pvcvtwsrz_vvvl",
+                    "vl.pveqv.vsvMvl" => "__builtin_ve_vl_pveqv_vsvMvl",
+                    "vl.pveqv.vsvl" => "__builtin_ve_vl_pveqv_vsvl",
+                    "vl.pveqv.vsvvl" => "__builtin_ve_vl_pveqv_vsvvl",
+                    "vl.pveqv.vvvMvl" => "__builtin_ve_vl_pveqv_vvvMvl",
+                    "vl.pveqv.vvvl" => "__builtin_ve_vl_pveqv_vvvl",
+                    "vl.pveqv.vvvvl" => "__builtin_ve_vl_pveqv_vvvvl",
+                    "vl.pvfadd.vsvMvl" => "__builtin_ve_vl_pvfadd_vsvMvl",
+                    "vl.pvfadd.vsvl" => "__builtin_ve_vl_pvfadd_vsvl",
+                    "vl.pvfadd.vsvvl" => "__builtin_ve_vl_pvfadd_vsvvl",
+                    "vl.pvfadd.vvvMvl" => "__builtin_ve_vl_pvfadd_vvvMvl",
+                    "vl.pvfadd.vvvl" => "__builtin_ve_vl_pvfadd_vvvl",
+                    "vl.pvfadd.vvvvl" => "__builtin_ve_vl_pvfadd_vvvvl",
+                    "vl.pvfcmp.vsvMvl" => "__builtin_ve_vl_pvfcmp_vsvMvl",
+                    "vl.pvfcmp.vsvl" => "__builtin_ve_vl_pvfcmp_vsvl",
+                    "vl.pvfcmp.vsvvl" => "__builtin_ve_vl_pvfcmp_vsvvl",
+                    "vl.pvfcmp.vvvMvl" => "__builtin_ve_vl_pvfcmp_vvvMvl",
+                    "vl.pvfcmp.vvvl" => "__builtin_ve_vl_pvfcmp_vvvl",
+                    "vl.pvfcmp.vvvvl" => "__builtin_ve_vl_pvfcmp_vvvvl",
+                    "vl.pvfmad.vsvvMvl" => "__builtin_ve_vl_pvfmad_vsvvMvl",
+                    "vl.pvfmad.vsvvl" => "__builtin_ve_vl_pvfmad_vsvvl",
+                    "vl.pvfmad.vsvvvl" => "__builtin_ve_vl_pvfmad_vsvvvl",
+                    "vl.pvfmad.vvsvMvl" => "__builtin_ve_vl_pvfmad_vvsvMvl",
+                    "vl.pvfmad.vvsvl" => "__builtin_ve_vl_pvfmad_vvsvl",
+                    "vl.pvfmad.vvsvvl" => "__builtin_ve_vl_pvfmad_vvsvvl",
+                    "vl.pvfmad.vvvvMvl" => "__builtin_ve_vl_pvfmad_vvvvMvl",
+                    "vl.pvfmad.vvvvl" => "__builtin_ve_vl_pvfmad_vvvvl",
+                    "vl.pvfmad.vvvvvl" => "__builtin_ve_vl_pvfmad_vvvvvl",
+                    "vl.pvfmax.vsvMvl" => "__builtin_ve_vl_pvfmax_vsvMvl",
+                    "vl.pvfmax.vsvl" => "__builtin_ve_vl_pvfmax_vsvl",
+                    "vl.pvfmax.vsvvl" => "__builtin_ve_vl_pvfmax_vsvvl",
+                    "vl.pvfmax.vvvMvl" => "__builtin_ve_vl_pvfmax_vvvMvl",
+                    "vl.pvfmax.vvvl" => "__builtin_ve_vl_pvfmax_vvvl",
+                    "vl.pvfmax.vvvvl" => "__builtin_ve_vl_pvfmax_vvvvl",
+                    "vl.pvfmin.vsvMvl" => "__builtin_ve_vl_pvfmin_vsvMvl",
+                    "vl.pvfmin.vsvl" => "__builtin_ve_vl_pvfmin_vsvl",
+                    "vl.pvfmin.vsvvl" => "__builtin_ve_vl_pvfmin_vsvvl",
+                    "vl.pvfmin.vvvMvl" => "__builtin_ve_vl_pvfmin_vvvMvl",
+                    "vl.pvfmin.vvvl" => "__builtin_ve_vl_pvfmin_vvvl",
+                    "vl.pvfmin.vvvvl" => "__builtin_ve_vl_pvfmin_vvvvl",
+                    "vl.pvfmkaf.Ml" => "__builtin_ve_vl_pvfmkaf_Ml",
+                    "vl.pvfmkat.Ml" => "__builtin_ve_vl_pvfmkat_Ml",
+                    "vl.pvfmkseq.MvMl" => "__builtin_ve_vl_pvfmkseq_MvMl",
+                    "vl.pvfmkseq.Mvl" => "__builtin_ve_vl_pvfmkseq_Mvl",
+                    "vl.pvfmkseqnan.MvMl" => "__builtin_ve_vl_pvfmkseqnan_MvMl",
+                    "vl.pvfmkseqnan.Mvl" => "__builtin_ve_vl_pvfmkseqnan_Mvl",
+                    "vl.pvfmksge.MvMl" => "__builtin_ve_vl_pvfmksge_MvMl",
+                    "vl.pvfmksge.Mvl" => "__builtin_ve_vl_pvfmksge_Mvl",
+                    "vl.pvfmksgenan.MvMl" => "__builtin_ve_vl_pvfmksgenan_MvMl",
+                    "vl.pvfmksgenan.Mvl" => "__builtin_ve_vl_pvfmksgenan_Mvl",
+                    "vl.pvfmksgt.MvMl" => "__builtin_ve_vl_pvfmksgt_MvMl",
+                    "vl.pvfmksgt.Mvl" => "__builtin_ve_vl_pvfmksgt_Mvl",
+                    "vl.pvfmksgtnan.MvMl" => "__builtin_ve_vl_pvfmksgtnan_MvMl",
+                    "vl.pvfmksgtnan.Mvl" => "__builtin_ve_vl_pvfmksgtnan_Mvl",
+                    "vl.pvfmksle.MvMl" => "__builtin_ve_vl_pvfmksle_MvMl",
+                    "vl.pvfmksle.Mvl" => "__builtin_ve_vl_pvfmksle_Mvl",
+                    "vl.pvfmkslenan.MvMl" => "__builtin_ve_vl_pvfmkslenan_MvMl",
+                    "vl.pvfmkslenan.Mvl" => "__builtin_ve_vl_pvfmkslenan_Mvl",
+                    "vl.pvfmksloeq.mvl" => "__builtin_ve_vl_pvfmksloeq_mvl",
+                    "vl.pvfmksloeq.mvml" => "__builtin_ve_vl_pvfmksloeq_mvml",
+                    "vl.pvfmksloeqnan.mvl" => "__builtin_ve_vl_pvfmksloeqnan_mvl",
+                    "vl.pvfmksloeqnan.mvml" => "__builtin_ve_vl_pvfmksloeqnan_mvml",
+                    "vl.pvfmksloge.mvl" => "__builtin_ve_vl_pvfmksloge_mvl",
+                    "vl.pvfmksloge.mvml" => "__builtin_ve_vl_pvfmksloge_mvml",
+                    "vl.pvfmkslogenan.mvl" => "__builtin_ve_vl_pvfmkslogenan_mvl",
+                    "vl.pvfmkslogenan.mvml" => "__builtin_ve_vl_pvfmkslogenan_mvml",
+                    "vl.pvfmkslogt.mvl" => "__builtin_ve_vl_pvfmkslogt_mvl",
+                    "vl.pvfmkslogt.mvml" => "__builtin_ve_vl_pvfmkslogt_mvml",
+                    "vl.pvfmkslogtnan.mvl" => "__builtin_ve_vl_pvfmkslogtnan_mvl",
+                    "vl.pvfmkslogtnan.mvml" => "__builtin_ve_vl_pvfmkslogtnan_mvml",
+                    "vl.pvfmkslole.mvl" => "__builtin_ve_vl_pvfmkslole_mvl",
+                    "vl.pvfmkslole.mvml" => "__builtin_ve_vl_pvfmkslole_mvml",
+                    "vl.pvfmkslolenan.mvl" => "__builtin_ve_vl_pvfmkslolenan_mvl",
+                    "vl.pvfmkslolenan.mvml" => "__builtin_ve_vl_pvfmkslolenan_mvml",
+                    "vl.pvfmkslolt.mvl" => "__builtin_ve_vl_pvfmkslolt_mvl",
+                    "vl.pvfmkslolt.mvml" => "__builtin_ve_vl_pvfmkslolt_mvml",
+                    "vl.pvfmksloltnan.mvl" => "__builtin_ve_vl_pvfmksloltnan_mvl",
+                    "vl.pvfmksloltnan.mvml" => "__builtin_ve_vl_pvfmksloltnan_mvml",
+                    "vl.pvfmkslonan.mvl" => "__builtin_ve_vl_pvfmkslonan_mvl",
+                    "vl.pvfmkslonan.mvml" => "__builtin_ve_vl_pvfmkslonan_mvml",
+                    "vl.pvfmkslone.mvl" => "__builtin_ve_vl_pvfmkslone_mvl",
+                    "vl.pvfmkslone.mvml" => "__builtin_ve_vl_pvfmkslone_mvml",
+                    "vl.pvfmkslonenan.mvl" => "__builtin_ve_vl_pvfmkslonenan_mvl",
+                    "vl.pvfmkslonenan.mvml" => "__builtin_ve_vl_pvfmkslonenan_mvml",
+                    "vl.pvfmkslonum.mvl" => "__builtin_ve_vl_pvfmkslonum_mvl",
+                    "vl.pvfmkslonum.mvml" => "__builtin_ve_vl_pvfmkslonum_mvml",
+                    "vl.pvfmkslt.MvMl" => "__builtin_ve_vl_pvfmkslt_MvMl",
+                    "vl.pvfmkslt.Mvl" => "__builtin_ve_vl_pvfmkslt_Mvl",
+                    "vl.pvfmksltnan.MvMl" => "__builtin_ve_vl_pvfmksltnan_MvMl",
+                    "vl.pvfmksltnan.Mvl" => "__builtin_ve_vl_pvfmksltnan_Mvl",
+                    "vl.pvfmksnan.MvMl" => "__builtin_ve_vl_pvfmksnan_MvMl",
+                    "vl.pvfmksnan.Mvl" => "__builtin_ve_vl_pvfmksnan_Mvl",
+                    "vl.pvfmksne.MvMl" => "__builtin_ve_vl_pvfmksne_MvMl",
+                    "vl.pvfmksne.Mvl" => "__builtin_ve_vl_pvfmksne_Mvl",
+                    "vl.pvfmksnenan.MvMl" => "__builtin_ve_vl_pvfmksnenan_MvMl",
+                    "vl.pvfmksnenan.Mvl" => "__builtin_ve_vl_pvfmksnenan_Mvl",
+                    "vl.pvfmksnum.MvMl" => "__builtin_ve_vl_pvfmksnum_MvMl",
+                    "vl.pvfmksnum.Mvl" => "__builtin_ve_vl_pvfmksnum_Mvl",
+                    "vl.pvfmksupeq.mvl" => "__builtin_ve_vl_pvfmksupeq_mvl",
+                    "vl.pvfmksupeq.mvml" => "__builtin_ve_vl_pvfmksupeq_mvml",
+                    "vl.pvfmksupeqnan.mvl" => "__builtin_ve_vl_pvfmksupeqnan_mvl",
+                    "vl.pvfmksupeqnan.mvml" => "__builtin_ve_vl_pvfmksupeqnan_mvml",
+                    "vl.pvfmksupge.mvl" => "__builtin_ve_vl_pvfmksupge_mvl",
+                    "vl.pvfmksupge.mvml" => "__builtin_ve_vl_pvfmksupge_mvml",
+                    "vl.pvfmksupgenan.mvl" => "__builtin_ve_vl_pvfmksupgenan_mvl",
+                    "vl.pvfmksupgenan.mvml" => "__builtin_ve_vl_pvfmksupgenan_mvml",
+                    "vl.pvfmksupgt.mvl" => "__builtin_ve_vl_pvfmksupgt_mvl",
+                    "vl.pvfmksupgt.mvml" => "__builtin_ve_vl_pvfmksupgt_mvml",
+                    "vl.pvfmksupgtnan.mvl" => "__builtin_ve_vl_pvfmksupgtnan_mvl",
+                    "vl.pvfmksupgtnan.mvml" => "__builtin_ve_vl_pvfmksupgtnan_mvml",
+                    "vl.pvfmksuple.mvl" => "__builtin_ve_vl_pvfmksuple_mvl",
+                    "vl.pvfmksuple.mvml" => "__builtin_ve_vl_pvfmksuple_mvml",
+                    "vl.pvfmksuplenan.mvl" => "__builtin_ve_vl_pvfmksuplenan_mvl",
+                    "vl.pvfmksuplenan.mvml" => "__builtin_ve_vl_pvfmksuplenan_mvml",
+                    "vl.pvfmksuplt.mvl" => "__builtin_ve_vl_pvfmksuplt_mvl",
+                    "vl.pvfmksuplt.mvml" => "__builtin_ve_vl_pvfmksuplt_mvml",
+                    "vl.pvfmksupltnan.mvl" => "__builtin_ve_vl_pvfmksupltnan_mvl",
+                    "vl.pvfmksupltnan.mvml" => "__builtin_ve_vl_pvfmksupltnan_mvml",
+                    "vl.pvfmksupnan.mvl" => "__builtin_ve_vl_pvfmksupnan_mvl",
+                    "vl.pvfmksupnan.mvml" => "__builtin_ve_vl_pvfmksupnan_mvml",
+                    "vl.pvfmksupne.mvl" => "__builtin_ve_vl_pvfmksupne_mvl",
+                    "vl.pvfmksupne.mvml" => "__builtin_ve_vl_pvfmksupne_mvml",
+                    "vl.pvfmksupnenan.mvl" => "__builtin_ve_vl_pvfmksupnenan_mvl",
+                    "vl.pvfmksupnenan.mvml" => "__builtin_ve_vl_pvfmksupnenan_mvml",
+                    "vl.pvfmksupnum.mvl" => "__builtin_ve_vl_pvfmksupnum_mvl",
+                    "vl.pvfmksupnum.mvml" => "__builtin_ve_vl_pvfmksupnum_mvml",
+                    "vl.pvfmkweq.MvMl" => "__builtin_ve_vl_pvfmkweq_MvMl",
+                    "vl.pvfmkweq.Mvl" => "__builtin_ve_vl_pvfmkweq_Mvl",
+                    "vl.pvfmkweqnan.MvMl" => "__builtin_ve_vl_pvfmkweqnan_MvMl",
+                    "vl.pvfmkweqnan.Mvl" => "__builtin_ve_vl_pvfmkweqnan_Mvl",
+                    "vl.pvfmkwge.MvMl" => "__builtin_ve_vl_pvfmkwge_MvMl",
+                    "vl.pvfmkwge.Mvl" => "__builtin_ve_vl_pvfmkwge_Mvl",
+                    "vl.pvfmkwgenan.MvMl" => "__builtin_ve_vl_pvfmkwgenan_MvMl",
+                    "vl.pvfmkwgenan.Mvl" => "__builtin_ve_vl_pvfmkwgenan_Mvl",
+                    "vl.pvfmkwgt.MvMl" => "__builtin_ve_vl_pvfmkwgt_MvMl",
+                    "vl.pvfmkwgt.Mvl" => "__builtin_ve_vl_pvfmkwgt_Mvl",
+                    "vl.pvfmkwgtnan.MvMl" => "__builtin_ve_vl_pvfmkwgtnan_MvMl",
+                    "vl.pvfmkwgtnan.Mvl" => "__builtin_ve_vl_pvfmkwgtnan_Mvl",
+                    "vl.pvfmkwle.MvMl" => "__builtin_ve_vl_pvfmkwle_MvMl",
+                    "vl.pvfmkwle.Mvl" => "__builtin_ve_vl_pvfmkwle_Mvl",
+                    "vl.pvfmkwlenan.MvMl" => "__builtin_ve_vl_pvfmkwlenan_MvMl",
+                    "vl.pvfmkwlenan.Mvl" => "__builtin_ve_vl_pvfmkwlenan_Mvl",
+                    "vl.pvfmkwloeq.mvl" => "__builtin_ve_vl_pvfmkwloeq_mvl",
+                    "vl.pvfmkwloeq.mvml" => "__builtin_ve_vl_pvfmkwloeq_mvml",
+                    "vl.pvfmkwloeqnan.mvl" => "__builtin_ve_vl_pvfmkwloeqnan_mvl",
+                    "vl.pvfmkwloeqnan.mvml" => "__builtin_ve_vl_pvfmkwloeqnan_mvml",
+                    "vl.pvfmkwloge.mvl" => "__builtin_ve_vl_pvfmkwloge_mvl",
+                    "vl.pvfmkwloge.mvml" => "__builtin_ve_vl_pvfmkwloge_mvml",
+                    "vl.pvfmkwlogenan.mvl" => "__builtin_ve_vl_pvfmkwlogenan_mvl",
+                    "vl.pvfmkwlogenan.mvml" => "__builtin_ve_vl_pvfmkwlogenan_mvml",
+                    "vl.pvfmkwlogt.mvl" => "__builtin_ve_vl_pvfmkwlogt_mvl",
+                    "vl.pvfmkwlogt.mvml" => "__builtin_ve_vl_pvfmkwlogt_mvml",
+                    "vl.pvfmkwlogtnan.mvl" => "__builtin_ve_vl_pvfmkwlogtnan_mvl",
+                    "vl.pvfmkwlogtnan.mvml" => "__builtin_ve_vl_pvfmkwlogtnan_mvml",
+                    "vl.pvfmkwlole.mvl" => "__builtin_ve_vl_pvfmkwlole_mvl",
+                    "vl.pvfmkwlole.mvml" => "__builtin_ve_vl_pvfmkwlole_mvml",
+                    "vl.pvfmkwlolenan.mvl" => "__builtin_ve_vl_pvfmkwlolenan_mvl",
+                    "vl.pvfmkwlolenan.mvml" => "__builtin_ve_vl_pvfmkwlolenan_mvml",
+                    "vl.pvfmkwlolt.mvl" => "__builtin_ve_vl_pvfmkwlolt_mvl",
+                    "vl.pvfmkwlolt.mvml" => "__builtin_ve_vl_pvfmkwlolt_mvml",
+                    "vl.pvfmkwloltnan.mvl" => "__builtin_ve_vl_pvfmkwloltnan_mvl",
+                    "vl.pvfmkwloltnan.mvml" => "__builtin_ve_vl_pvfmkwloltnan_mvml",
+                    "vl.pvfmkwlonan.mvl" => "__builtin_ve_vl_pvfmkwlonan_mvl",
+                    "vl.pvfmkwlonan.mvml" => "__builtin_ve_vl_pvfmkwlonan_mvml",
+                    "vl.pvfmkwlone.mvl" => "__builtin_ve_vl_pvfmkwlone_mvl",
+                    "vl.pvfmkwlone.mvml" => "__builtin_ve_vl_pvfmkwlone_mvml",
+                    "vl.pvfmkwlonenan.mvl" => "__builtin_ve_vl_pvfmkwlonenan_mvl",
+                    "vl.pvfmkwlonenan.mvml" => "__builtin_ve_vl_pvfmkwlonenan_mvml",
+                    "vl.pvfmkwlonum.mvl" => "__builtin_ve_vl_pvfmkwlonum_mvl",
+                    "vl.pvfmkwlonum.mvml" => "__builtin_ve_vl_pvfmkwlonum_mvml",
+                    "vl.pvfmkwlt.MvMl" => "__builtin_ve_vl_pvfmkwlt_MvMl",
+                    "vl.pvfmkwlt.Mvl" => "__builtin_ve_vl_pvfmkwlt_Mvl",
+                    "vl.pvfmkwltnan.MvMl" => "__builtin_ve_vl_pvfmkwltnan_MvMl",
+                    "vl.pvfmkwltnan.Mvl" => "__builtin_ve_vl_pvfmkwltnan_Mvl",
+                    "vl.pvfmkwnan.MvMl" => "__builtin_ve_vl_pvfmkwnan_MvMl",
+                    "vl.pvfmkwnan.Mvl" => "__builtin_ve_vl_pvfmkwnan_Mvl",
+                    "vl.pvfmkwne.MvMl" => "__builtin_ve_vl_pvfmkwne_MvMl",
+                    "vl.pvfmkwne.Mvl" => "__builtin_ve_vl_pvfmkwne_Mvl",
+                    "vl.pvfmkwnenan.MvMl" => "__builtin_ve_vl_pvfmkwnenan_MvMl",
+                    "vl.pvfmkwnenan.Mvl" => "__builtin_ve_vl_pvfmkwnenan_Mvl",
+                    "vl.pvfmkwnum.MvMl" => "__builtin_ve_vl_pvfmkwnum_MvMl",
+                    "vl.pvfmkwnum.Mvl" => "__builtin_ve_vl_pvfmkwnum_Mvl",
+                    "vl.pvfmkwupeq.mvl" => "__builtin_ve_vl_pvfmkwupeq_mvl",
+                    "vl.pvfmkwupeq.mvml" => "__builtin_ve_vl_pvfmkwupeq_mvml",
+                    "vl.pvfmkwupeqnan.mvl" => "__builtin_ve_vl_pvfmkwupeqnan_mvl",
+                    "vl.pvfmkwupeqnan.mvml" => "__builtin_ve_vl_pvfmkwupeqnan_mvml",
+                    "vl.pvfmkwupge.mvl" => "__builtin_ve_vl_pvfmkwupge_mvl",
+                    "vl.pvfmkwupge.mvml" => "__builtin_ve_vl_pvfmkwupge_mvml",
+                    "vl.pvfmkwupgenan.mvl" => "__builtin_ve_vl_pvfmkwupgenan_mvl",
+                    "vl.pvfmkwupgenan.mvml" => "__builtin_ve_vl_pvfmkwupgenan_mvml",
+                    "vl.pvfmkwupgt.mvl" => "__builtin_ve_vl_pvfmkwupgt_mvl",
+                    "vl.pvfmkwupgt.mvml" => "__builtin_ve_vl_pvfmkwupgt_mvml",
+                    "vl.pvfmkwupgtnan.mvl" => "__builtin_ve_vl_pvfmkwupgtnan_mvl",
+                    "vl.pvfmkwupgtnan.mvml" => "__builtin_ve_vl_pvfmkwupgtnan_mvml",
+                    "vl.pvfmkwuple.mvl" => "__builtin_ve_vl_pvfmkwuple_mvl",
+                    "vl.pvfmkwuple.mvml" => "__builtin_ve_vl_pvfmkwuple_mvml",
+                    "vl.pvfmkwuplenan.mvl" => "__builtin_ve_vl_pvfmkwuplenan_mvl",
+                    "vl.pvfmkwuplenan.mvml" => "__builtin_ve_vl_pvfmkwuplenan_mvml",
+                    "vl.pvfmkwuplt.mvl" => "__builtin_ve_vl_pvfmkwuplt_mvl",
+                    "vl.pvfmkwuplt.mvml" => "__builtin_ve_vl_pvfmkwuplt_mvml",
+                    "vl.pvfmkwupltnan.mvl" => "__builtin_ve_vl_pvfmkwupltnan_mvl",
+                    "vl.pvfmkwupltnan.mvml" => "__builtin_ve_vl_pvfmkwupltnan_mvml",
+                    "vl.pvfmkwupnan.mvl" => "__builtin_ve_vl_pvfmkwupnan_mvl",
+                    "vl.pvfmkwupnan.mvml" => "__builtin_ve_vl_pvfmkwupnan_mvml",
+                    "vl.pvfmkwupne.mvl" => "__builtin_ve_vl_pvfmkwupne_mvl",
+                    "vl.pvfmkwupne.mvml" => "__builtin_ve_vl_pvfmkwupne_mvml",
+                    "vl.pvfmkwupnenan.mvl" => "__builtin_ve_vl_pvfmkwupnenan_mvl",
+                    "vl.pvfmkwupnenan.mvml" => "__builtin_ve_vl_pvfmkwupnenan_mvml",
+                    "vl.pvfmkwupnum.mvl" => "__builtin_ve_vl_pvfmkwupnum_mvl",
+                    "vl.pvfmkwupnum.mvml" => "__builtin_ve_vl_pvfmkwupnum_mvml",
+                    "vl.pvfmsb.vsvvMvl" => "__builtin_ve_vl_pvfmsb_vsvvMvl",
+                    "vl.pvfmsb.vsvvl" => "__builtin_ve_vl_pvfmsb_vsvvl",
+                    "vl.pvfmsb.vsvvvl" => "__builtin_ve_vl_pvfmsb_vsvvvl",
+                    "vl.pvfmsb.vvsvMvl" => "__builtin_ve_vl_pvfmsb_vvsvMvl",
+                    "vl.pvfmsb.vvsvl" => "__builtin_ve_vl_pvfmsb_vvsvl",
+                    "vl.pvfmsb.vvsvvl" => "__builtin_ve_vl_pvfmsb_vvsvvl",
+                    "vl.pvfmsb.vvvvMvl" => "__builtin_ve_vl_pvfmsb_vvvvMvl",
+                    "vl.pvfmsb.vvvvl" => "__builtin_ve_vl_pvfmsb_vvvvl",
+                    "vl.pvfmsb.vvvvvl" => "__builtin_ve_vl_pvfmsb_vvvvvl",
+                    "vl.pvfmul.vsvMvl" => "__builtin_ve_vl_pvfmul_vsvMvl",
+                    "vl.pvfmul.vsvl" => "__builtin_ve_vl_pvfmul_vsvl",
+                    "vl.pvfmul.vsvvl" => "__builtin_ve_vl_pvfmul_vsvvl",
+                    "vl.pvfmul.vvvMvl" => "__builtin_ve_vl_pvfmul_vvvMvl",
+                    "vl.pvfmul.vvvl" => "__builtin_ve_vl_pvfmul_vvvl",
+                    "vl.pvfmul.vvvvl" => "__builtin_ve_vl_pvfmul_vvvvl",
+                    "vl.pvfnmad.vsvvMvl" => "__builtin_ve_vl_pvfnmad_vsvvMvl",
+                    "vl.pvfnmad.vsvvl" => "__builtin_ve_vl_pvfnmad_vsvvl",
+                    "vl.pvfnmad.vsvvvl" => "__builtin_ve_vl_pvfnmad_vsvvvl",
+                    "vl.pvfnmad.vvsvMvl" => "__builtin_ve_vl_pvfnmad_vvsvMvl",
+                    "vl.pvfnmad.vvsvl" => "__builtin_ve_vl_pvfnmad_vvsvl",
+                    "vl.pvfnmad.vvsvvl" => "__builtin_ve_vl_pvfnmad_vvsvvl",
+                    "vl.pvfnmad.vvvvMvl" => "__builtin_ve_vl_pvfnmad_vvvvMvl",
+                    "vl.pvfnmad.vvvvl" => "__builtin_ve_vl_pvfnmad_vvvvl",
+                    "vl.pvfnmad.vvvvvl" => "__builtin_ve_vl_pvfnmad_vvvvvl",
+                    "vl.pvfnmsb.vsvvMvl" => "__builtin_ve_vl_pvfnmsb_vsvvMvl",
+                    "vl.pvfnmsb.vsvvl" => "__builtin_ve_vl_pvfnmsb_vsvvl",
+                    "vl.pvfnmsb.vsvvvl" => "__builtin_ve_vl_pvfnmsb_vsvvvl",
+                    "vl.pvfnmsb.vvsvMvl" => "__builtin_ve_vl_pvfnmsb_vvsvMvl",
+                    "vl.pvfnmsb.vvsvl" => "__builtin_ve_vl_pvfnmsb_vvsvl",
+                    "vl.pvfnmsb.vvsvvl" => "__builtin_ve_vl_pvfnmsb_vvsvvl",
+                    "vl.pvfnmsb.vvvvMvl" => "__builtin_ve_vl_pvfnmsb_vvvvMvl",
+                    "vl.pvfnmsb.vvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvl",
+                    "vl.pvfnmsb.vvvvvl" => "__builtin_ve_vl_pvfnmsb_vvvvvl",
+                    "vl.pvfsub.vsvMvl" => "__builtin_ve_vl_pvfsub_vsvMvl",
+                    "vl.pvfsub.vsvl" => "__builtin_ve_vl_pvfsub_vsvl",
+                    "vl.pvfsub.vsvvl" => "__builtin_ve_vl_pvfsub_vsvvl",
+                    "vl.pvfsub.vvvMvl" => "__builtin_ve_vl_pvfsub_vvvMvl",
+                    "vl.pvfsub.vvvl" => "__builtin_ve_vl_pvfsub_vvvl",
+                    "vl.pvfsub.vvvvl" => "__builtin_ve_vl_pvfsub_vvvvl",
+                    "vl.pvldz.vvMvl" => "__builtin_ve_vl_pvldz_vvMvl",
+                    "vl.pvldz.vvl" => "__builtin_ve_vl_pvldz_vvl",
+                    "vl.pvldz.vvvl" => "__builtin_ve_vl_pvldz_vvvl",
+                    "vl.pvldzlo.vvl" => "__builtin_ve_vl_pvldzlo_vvl",
+                    "vl.pvldzlo.vvmvl" => "__builtin_ve_vl_pvldzlo_vvmvl",
+                    "vl.pvldzlo.vvvl" => "__builtin_ve_vl_pvldzlo_vvvl",
+                    "vl.pvldzup.vvl" => "__builtin_ve_vl_pvldzup_vvl",
+                    "vl.pvldzup.vvmvl" => "__builtin_ve_vl_pvldzup_vvmvl",
+                    "vl.pvldzup.vvvl" => "__builtin_ve_vl_pvldzup_vvvl",
+                    "vl.pvmaxs.vsvMvl" => "__builtin_ve_vl_pvmaxs_vsvMvl",
+                    "vl.pvmaxs.vsvl" => "__builtin_ve_vl_pvmaxs_vsvl",
+                    "vl.pvmaxs.vsvvl" => "__builtin_ve_vl_pvmaxs_vsvvl",
+                    "vl.pvmaxs.vvvMvl" => "__builtin_ve_vl_pvmaxs_vvvMvl",
+                    "vl.pvmaxs.vvvl" => "__builtin_ve_vl_pvmaxs_vvvl",
+                    "vl.pvmaxs.vvvvl" => "__builtin_ve_vl_pvmaxs_vvvvl",
+                    "vl.pvmins.vsvMvl" => "__builtin_ve_vl_pvmins_vsvMvl",
+                    "vl.pvmins.vsvl" => "__builtin_ve_vl_pvmins_vsvl",
+                    "vl.pvmins.vsvvl" => "__builtin_ve_vl_pvmins_vsvvl",
+                    "vl.pvmins.vvvMvl" => "__builtin_ve_vl_pvmins_vvvMvl",
+                    "vl.pvmins.vvvl" => "__builtin_ve_vl_pvmins_vvvl",
+                    "vl.pvmins.vvvvl" => "__builtin_ve_vl_pvmins_vvvvl",
+                    "vl.pvor.vsvMvl" => "__builtin_ve_vl_pvor_vsvMvl",
+                    "vl.pvor.vsvl" => "__builtin_ve_vl_pvor_vsvl",
+                    "vl.pvor.vsvvl" => "__builtin_ve_vl_pvor_vsvvl",
+                    "vl.pvor.vvvMvl" => "__builtin_ve_vl_pvor_vvvMvl",
+                    "vl.pvor.vvvl" => "__builtin_ve_vl_pvor_vvvl",
+                    "vl.pvor.vvvvl" => "__builtin_ve_vl_pvor_vvvvl",
+                    "vl.pvpcnt.vvMvl" => "__builtin_ve_vl_pvpcnt_vvMvl",
+                    "vl.pvpcnt.vvl" => "__builtin_ve_vl_pvpcnt_vvl",
+                    "vl.pvpcnt.vvvl" => "__builtin_ve_vl_pvpcnt_vvvl",
+                    "vl.pvpcntlo.vvl" => "__builtin_ve_vl_pvpcntlo_vvl",
+                    "vl.pvpcntlo.vvmvl" => "__builtin_ve_vl_pvpcntlo_vvmvl",
+                    "vl.pvpcntlo.vvvl" => "__builtin_ve_vl_pvpcntlo_vvvl",
+                    "vl.pvpcntup.vvl" => "__builtin_ve_vl_pvpcntup_vvl",
+                    "vl.pvpcntup.vvmvl" => "__builtin_ve_vl_pvpcntup_vvmvl",
+                    "vl.pvpcntup.vvvl" => "__builtin_ve_vl_pvpcntup_vvvl",
+                    "vl.pvrcp.vvl" => "__builtin_ve_vl_pvrcp_vvl",
+                    "vl.pvrcp.vvvl" => "__builtin_ve_vl_pvrcp_vvvl",
+                    "vl.pvrsqrt.vvl" => "__builtin_ve_vl_pvrsqrt_vvl",
+                    "vl.pvrsqrt.vvvl" => "__builtin_ve_vl_pvrsqrt_vvvl",
+                    "vl.pvrsqrtnex.vvl" => "__builtin_ve_vl_pvrsqrtnex_vvl",
+                    "vl.pvrsqrtnex.vvvl" => "__builtin_ve_vl_pvrsqrtnex_vvvl",
+                    "vl.pvseq.vl" => "__builtin_ve_vl_pvseq_vl",
+                    "vl.pvseq.vvl" => "__builtin_ve_vl_pvseq_vvl",
+                    "vl.pvseqlo.vl" => "__builtin_ve_vl_pvseqlo_vl",
+                    "vl.pvseqlo.vvl" => "__builtin_ve_vl_pvseqlo_vvl",
+                    "vl.pvsequp.vl" => "__builtin_ve_vl_pvsequp_vl",
+                    "vl.pvsequp.vvl" => "__builtin_ve_vl_pvsequp_vvl",
+                    "vl.pvsla.vvsMvl" => "__builtin_ve_vl_pvsla_vvsMvl",
+                    "vl.pvsla.vvsl" => "__builtin_ve_vl_pvsla_vvsl",
+                    "vl.pvsla.vvsvl" => "__builtin_ve_vl_pvsla_vvsvl",
+                    "vl.pvsla.vvvMvl" => "__builtin_ve_vl_pvsla_vvvMvl",
+                    "vl.pvsla.vvvl" => "__builtin_ve_vl_pvsla_vvvl",
+                    "vl.pvsla.vvvvl" => "__builtin_ve_vl_pvsla_vvvvl",
+                    "vl.pvsll.vvsMvl" => "__builtin_ve_vl_pvsll_vvsMvl",
+                    "vl.pvsll.vvsl" => "__builtin_ve_vl_pvsll_vvsl",
+                    "vl.pvsll.vvsvl" => "__builtin_ve_vl_pvsll_vvsvl",
+                    "vl.pvsll.vvvMvl" => "__builtin_ve_vl_pvsll_vvvMvl",
+                    "vl.pvsll.vvvl" => "__builtin_ve_vl_pvsll_vvvl",
+                    "vl.pvsll.vvvvl" => "__builtin_ve_vl_pvsll_vvvvl",
+                    "vl.pvsra.vvsMvl" => "__builtin_ve_vl_pvsra_vvsMvl",
+                    "vl.pvsra.vvsl" => "__builtin_ve_vl_pvsra_vvsl",
+                    "vl.pvsra.vvsvl" => "__builtin_ve_vl_pvsra_vvsvl",
+                    "vl.pvsra.vvvMvl" => "__builtin_ve_vl_pvsra_vvvMvl",
+                    "vl.pvsra.vvvl" => "__builtin_ve_vl_pvsra_vvvl",
+                    "vl.pvsra.vvvvl" => "__builtin_ve_vl_pvsra_vvvvl",
+                    "vl.pvsrl.vvsMvl" => "__builtin_ve_vl_pvsrl_vvsMvl",
+                    "vl.pvsrl.vvsl" => "__builtin_ve_vl_pvsrl_vvsl",
+                    "vl.pvsrl.vvsvl" => "__builtin_ve_vl_pvsrl_vvsvl",
+                    "vl.pvsrl.vvvMvl" => "__builtin_ve_vl_pvsrl_vvvMvl",
+                    "vl.pvsrl.vvvl" => "__builtin_ve_vl_pvsrl_vvvl",
+                    "vl.pvsrl.vvvvl" => "__builtin_ve_vl_pvsrl_vvvvl",
+                    "vl.pvsubs.vsvMvl" => "__builtin_ve_vl_pvsubs_vsvMvl",
+                    "vl.pvsubs.vsvl" => "__builtin_ve_vl_pvsubs_vsvl",
+                    "vl.pvsubs.vsvvl" => "__builtin_ve_vl_pvsubs_vsvvl",
+                    "vl.pvsubs.vvvMvl" => "__builtin_ve_vl_pvsubs_vvvMvl",
+                    "vl.pvsubs.vvvl" => "__builtin_ve_vl_pvsubs_vvvl",
+                    "vl.pvsubs.vvvvl" => "__builtin_ve_vl_pvsubs_vvvvl",
+                    "vl.pvsubu.vsvMvl" => "__builtin_ve_vl_pvsubu_vsvMvl",
+                    "vl.pvsubu.vsvl" => "__builtin_ve_vl_pvsubu_vsvl",
+                    "vl.pvsubu.vsvvl" => "__builtin_ve_vl_pvsubu_vsvvl",
+                    "vl.pvsubu.vvvMvl" => "__builtin_ve_vl_pvsubu_vvvMvl",
+                    "vl.pvsubu.vvvl" => "__builtin_ve_vl_pvsubu_vvvl",
+                    "vl.pvsubu.vvvvl" => "__builtin_ve_vl_pvsubu_vvvvl",
+                    "vl.pvxor.vsvMvl" => "__builtin_ve_vl_pvxor_vsvMvl",
+                    "vl.pvxor.vsvl" => "__builtin_ve_vl_pvxor_vsvl",
+                    "vl.pvxor.vsvvl" => "__builtin_ve_vl_pvxor_vsvvl",
+                    "vl.pvxor.vvvMvl" => "__builtin_ve_vl_pvxor_vvvMvl",
+                    "vl.pvxor.vvvl" => "__builtin_ve_vl_pvxor_vvvl",
+                    "vl.pvxor.vvvvl" => "__builtin_ve_vl_pvxor_vvvvl",
+                    "vl.scr.sss" => "__builtin_ve_vl_scr_sss",
+                    "vl.svm.sMs" => "__builtin_ve_vl_svm_sMs",
+                    "vl.svm.sms" => "__builtin_ve_vl_svm_sms",
+                    "vl.svob" => "__builtin_ve_vl_svob",
+                    "vl.tovm.sml" => "__builtin_ve_vl_tovm_sml",
+                    "vl.tscr.ssss" => "__builtin_ve_vl_tscr_ssss",
+                    "vl.vaddsl.vsvl" => "__builtin_ve_vl_vaddsl_vsvl",
+                    "vl.vaddsl.vsvmvl" => "__builtin_ve_vl_vaddsl_vsvmvl",
+                    "vl.vaddsl.vsvvl" => "__builtin_ve_vl_vaddsl_vsvvl",
+                    "vl.vaddsl.vvvl" => "__builtin_ve_vl_vaddsl_vvvl",
+                    "vl.vaddsl.vvvmvl" => "__builtin_ve_vl_vaddsl_vvvmvl",
+                    "vl.vaddsl.vvvvl" => "__builtin_ve_vl_vaddsl_vvvvl",
+                    "vl.vaddswsx.vsvl" => "__builtin_ve_vl_vaddswsx_vsvl",
+                    "vl.vaddswsx.vsvmvl" => "__builtin_ve_vl_vaddswsx_vsvmvl",
+                    "vl.vaddswsx.vsvvl" => "__builtin_ve_vl_vaddswsx_vsvvl",
+                    "vl.vaddswsx.vvvl" => "__builtin_ve_vl_vaddswsx_vvvl",
+                    "vl.vaddswsx.vvvmvl" => "__builtin_ve_vl_vaddswsx_vvvmvl",
+                    "vl.vaddswsx.vvvvl" => "__builtin_ve_vl_vaddswsx_vvvvl",
+                    "vl.vaddswzx.vsvl" => "__builtin_ve_vl_vaddswzx_vsvl",
+                    "vl.vaddswzx.vsvmvl" => "__builtin_ve_vl_vaddswzx_vsvmvl",
+                    "vl.vaddswzx.vsvvl" => "__builtin_ve_vl_vaddswzx_vsvvl",
+                    "vl.vaddswzx.vvvl" => "__builtin_ve_vl_vaddswzx_vvvl",
+                    "vl.vaddswzx.vvvmvl" => "__builtin_ve_vl_vaddswzx_vvvmvl",
+                    "vl.vaddswzx.vvvvl" => "__builtin_ve_vl_vaddswzx_vvvvl",
+                    "vl.vaddul.vsvl" => "__builtin_ve_vl_vaddul_vsvl",
+                    "vl.vaddul.vsvmvl" => "__builtin_ve_vl_vaddul_vsvmvl",
+                    "vl.vaddul.vsvvl" => "__builtin_ve_vl_vaddul_vsvvl",
+                    "vl.vaddul.vvvl" => "__builtin_ve_vl_vaddul_vvvl",
+                    "vl.vaddul.vvvmvl" => "__builtin_ve_vl_vaddul_vvvmvl",
+                    "vl.vaddul.vvvvl" => "__builtin_ve_vl_vaddul_vvvvl",
+                    "vl.vadduw.vsvl" => "__builtin_ve_vl_vadduw_vsvl",
+                    "vl.vadduw.vsvmvl" => "__builtin_ve_vl_vadduw_vsvmvl",
+                    "vl.vadduw.vsvvl" => "__builtin_ve_vl_vadduw_vsvvl",
+                    "vl.vadduw.vvvl" => "__builtin_ve_vl_vadduw_vvvl",
+                    "vl.vadduw.vvvmvl" => "__builtin_ve_vl_vadduw_vvvmvl",
+                    "vl.vadduw.vvvvl" => "__builtin_ve_vl_vadduw_vvvvl",
+                    "vl.vand.vsvl" => "__builtin_ve_vl_vand_vsvl",
+                    "vl.vand.vsvmvl" => "__builtin_ve_vl_vand_vsvmvl",
+                    "vl.vand.vsvvl" => "__builtin_ve_vl_vand_vsvvl",
+                    "vl.vand.vvvl" => "__builtin_ve_vl_vand_vvvl",
+                    "vl.vand.vvvmvl" => "__builtin_ve_vl_vand_vvvmvl",
+                    "vl.vand.vvvvl" => "__builtin_ve_vl_vand_vvvvl",
+                    "vl.vbrdd.vsl" => "__builtin_ve_vl_vbrdd_vsl",
+                    "vl.vbrdd.vsmvl" => "__builtin_ve_vl_vbrdd_vsmvl",
+                    "vl.vbrdd.vsvl" => "__builtin_ve_vl_vbrdd_vsvl",
+                    "vl.vbrdl.vsl" => "__builtin_ve_vl_vbrdl_vsl",
+                    "vl.vbrdl.vsmvl" => "__builtin_ve_vl_vbrdl_vsmvl",
+                    "vl.vbrdl.vsvl" => "__builtin_ve_vl_vbrdl_vsvl",
+                    "vl.vbrds.vsl" => "__builtin_ve_vl_vbrds_vsl",
+                    "vl.vbrds.vsmvl" => "__builtin_ve_vl_vbrds_vsmvl",
+                    "vl.vbrds.vsvl" => "__builtin_ve_vl_vbrds_vsvl",
+                    "vl.vbrdw.vsl" => "__builtin_ve_vl_vbrdw_vsl",
+                    "vl.vbrdw.vsmvl" => "__builtin_ve_vl_vbrdw_vsmvl",
+                    "vl.vbrdw.vsvl" => "__builtin_ve_vl_vbrdw_vsvl",
+                    "vl.vbrv.vvl" => "__builtin_ve_vl_vbrv_vvl",
+                    "vl.vbrv.vvmvl" => "__builtin_ve_vl_vbrv_vvmvl",
+                    "vl.vbrv.vvvl" => "__builtin_ve_vl_vbrv_vvvl",
+                    "vl.vcmpsl.vsvl" => "__builtin_ve_vl_vcmpsl_vsvl",
+                    "vl.vcmpsl.vsvmvl" => "__builtin_ve_vl_vcmpsl_vsvmvl",
+                    "vl.vcmpsl.vsvvl" => "__builtin_ve_vl_vcmpsl_vsvvl",
+                    "vl.vcmpsl.vvvl" => "__builtin_ve_vl_vcmpsl_vvvl",
+                    "vl.vcmpsl.vvvmvl" => "__builtin_ve_vl_vcmpsl_vvvmvl",
+                    "vl.vcmpsl.vvvvl" => "__builtin_ve_vl_vcmpsl_vvvvl",
+                    "vl.vcmpswsx.vsvl" => "__builtin_ve_vl_vcmpswsx_vsvl",
+                    "vl.vcmpswsx.vsvmvl" => "__builtin_ve_vl_vcmpswsx_vsvmvl",
+                    "vl.vcmpswsx.vsvvl" => "__builtin_ve_vl_vcmpswsx_vsvvl",
+                    "vl.vcmpswsx.vvvl" => "__builtin_ve_vl_vcmpswsx_vvvl",
+                    "vl.vcmpswsx.vvvmvl" => "__builtin_ve_vl_vcmpswsx_vvvmvl",
+                    "vl.vcmpswsx.vvvvl" => "__builtin_ve_vl_vcmpswsx_vvvvl",
+                    "vl.vcmpswzx.vsvl" => "__builtin_ve_vl_vcmpswzx_vsvl",
+                    "vl.vcmpswzx.vsvmvl" => "__builtin_ve_vl_vcmpswzx_vsvmvl",
+                    "vl.vcmpswzx.vsvvl" => "__builtin_ve_vl_vcmpswzx_vsvvl",
+                    "vl.vcmpswzx.vvvl" => "__builtin_ve_vl_vcmpswzx_vvvl",
+                    "vl.vcmpswzx.vvvmvl" => "__builtin_ve_vl_vcmpswzx_vvvmvl",
+                    "vl.vcmpswzx.vvvvl" => "__builtin_ve_vl_vcmpswzx_vvvvl",
+                    "vl.vcmpul.vsvl" => "__builtin_ve_vl_vcmpul_vsvl",
+                    "vl.vcmpul.vsvmvl" => "__builtin_ve_vl_vcmpul_vsvmvl",
+                    "vl.vcmpul.vsvvl" => "__builtin_ve_vl_vcmpul_vsvvl",
+                    "vl.vcmpul.vvvl" => "__builtin_ve_vl_vcmpul_vvvl",
+                    "vl.vcmpul.vvvmvl" => "__builtin_ve_vl_vcmpul_vvvmvl",
+                    "vl.vcmpul.vvvvl" => "__builtin_ve_vl_vcmpul_vvvvl",
+                    "vl.vcmpuw.vsvl" => "__builtin_ve_vl_vcmpuw_vsvl",
+                    "vl.vcmpuw.vsvmvl" => "__builtin_ve_vl_vcmpuw_vsvmvl",
+                    "vl.vcmpuw.vsvvl" => "__builtin_ve_vl_vcmpuw_vsvvl",
+                    "vl.vcmpuw.vvvl" => "__builtin_ve_vl_vcmpuw_vvvl",
+                    "vl.vcmpuw.vvvmvl" => "__builtin_ve_vl_vcmpuw_vvvmvl",
+                    "vl.vcmpuw.vvvvl" => "__builtin_ve_vl_vcmpuw_vvvvl",
+                    "vl.vcp.vvmvl" => "__builtin_ve_vl_vcp_vvmvl",
+                    "vl.vcvtdl.vvl" => "__builtin_ve_vl_vcvtdl_vvl",
+                    "vl.vcvtdl.vvvl" => "__builtin_ve_vl_vcvtdl_vvvl",
+                    "vl.vcvtds.vvl" => "__builtin_ve_vl_vcvtds_vvl",
+                    "vl.vcvtds.vvvl" => "__builtin_ve_vl_vcvtds_vvvl",
+                    "vl.vcvtdw.vvl" => "__builtin_ve_vl_vcvtdw_vvl",
+                    "vl.vcvtdw.vvvl" => "__builtin_ve_vl_vcvtdw_vvvl",
+                    "vl.vcvtld.vvl" => "__builtin_ve_vl_vcvtld_vvl",
+                    "vl.vcvtld.vvmvl" => "__builtin_ve_vl_vcvtld_vvmvl",
+                    "vl.vcvtld.vvvl" => "__builtin_ve_vl_vcvtld_vvvl",
+                    "vl.vcvtldrz.vvl" => "__builtin_ve_vl_vcvtldrz_vvl",
+                    "vl.vcvtldrz.vvmvl" => "__builtin_ve_vl_vcvtldrz_vvmvl",
+                    "vl.vcvtldrz.vvvl" => "__builtin_ve_vl_vcvtldrz_vvvl",
+                    "vl.vcvtsd.vvl" => "__builtin_ve_vl_vcvtsd_vvl",
+                    "vl.vcvtsd.vvvl" => "__builtin_ve_vl_vcvtsd_vvvl",
+                    "vl.vcvtsw.vvl" => "__builtin_ve_vl_vcvtsw_vvl",
+                    "vl.vcvtsw.vvvl" => "__builtin_ve_vl_vcvtsw_vvvl",
+                    "vl.vcvtwdsx.vvl" => "__builtin_ve_vl_vcvtwdsx_vvl",
+                    "vl.vcvtwdsx.vvmvl" => "__builtin_ve_vl_vcvtwdsx_vvmvl",
+                    "vl.vcvtwdsx.vvvl" => "__builtin_ve_vl_vcvtwdsx_vvvl",
+                    "vl.vcvtwdsxrz.vvl" => "__builtin_ve_vl_vcvtwdsxrz_vvl",
+                    "vl.vcvtwdsxrz.vvmvl" => "__builtin_ve_vl_vcvtwdsxrz_vvmvl",
+                    "vl.vcvtwdsxrz.vvvl" => "__builtin_ve_vl_vcvtwdsxrz_vvvl",
+                    "vl.vcvtwdzx.vvl" => "__builtin_ve_vl_vcvtwdzx_vvl",
+                    "vl.vcvtwdzx.vvmvl" => "__builtin_ve_vl_vcvtwdzx_vvmvl",
+                    "vl.vcvtwdzx.vvvl" => "__builtin_ve_vl_vcvtwdzx_vvvl",
+                    "vl.vcvtwdzxrz.vvl" => "__builtin_ve_vl_vcvtwdzxrz_vvl",
+                    "vl.vcvtwdzxrz.vvmvl" => "__builtin_ve_vl_vcvtwdzxrz_vvmvl",
+                    "vl.vcvtwdzxrz.vvvl" => "__builtin_ve_vl_vcvtwdzxrz_vvvl",
+                    "vl.vcvtwssx.vvl" => "__builtin_ve_vl_vcvtwssx_vvl",
+                    "vl.vcvtwssx.vvmvl" => "__builtin_ve_vl_vcvtwssx_vvmvl",
+                    "vl.vcvtwssx.vvvl" => "__builtin_ve_vl_vcvtwssx_vvvl",
+                    "vl.vcvtwssxrz.vvl" => "__builtin_ve_vl_vcvtwssxrz_vvl",
+                    "vl.vcvtwssxrz.vvmvl" => "__builtin_ve_vl_vcvtwssxrz_vvmvl",
+                    "vl.vcvtwssxrz.vvvl" => "__builtin_ve_vl_vcvtwssxrz_vvvl",
+                    "vl.vcvtwszx.vvl" => "__builtin_ve_vl_vcvtwszx_vvl",
+                    "vl.vcvtwszx.vvmvl" => "__builtin_ve_vl_vcvtwszx_vvmvl",
+                    "vl.vcvtwszx.vvvl" => "__builtin_ve_vl_vcvtwszx_vvvl",
+                    "vl.vcvtwszxrz.vvl" => "__builtin_ve_vl_vcvtwszxrz_vvl",
+                    "vl.vcvtwszxrz.vvmvl" => "__builtin_ve_vl_vcvtwszxrz_vvmvl",
+                    "vl.vcvtwszxrz.vvvl" => "__builtin_ve_vl_vcvtwszxrz_vvvl",
+                    "vl.vdivsl.vsvl" => "__builtin_ve_vl_vdivsl_vsvl",
+                    "vl.vdivsl.vsvmvl" => "__builtin_ve_vl_vdivsl_vsvmvl",
+                    "vl.vdivsl.vsvvl" => "__builtin_ve_vl_vdivsl_vsvvl",
+                    "vl.vdivsl.vvsl" => "__builtin_ve_vl_vdivsl_vvsl",
+                    "vl.vdivsl.vvsmvl" => "__builtin_ve_vl_vdivsl_vvsmvl",
+                    "vl.vdivsl.vvsvl" => "__builtin_ve_vl_vdivsl_vvsvl",
+                    "vl.vdivsl.vvvl" => "__builtin_ve_vl_vdivsl_vvvl",
+                    "vl.vdivsl.vvvmvl" => "__builtin_ve_vl_vdivsl_vvvmvl",
+                    "vl.vdivsl.vvvvl" => "__builtin_ve_vl_vdivsl_vvvvl",
+                    "vl.vdivswsx.vsvl" => "__builtin_ve_vl_vdivswsx_vsvl",
+                    "vl.vdivswsx.vsvmvl" => "__builtin_ve_vl_vdivswsx_vsvmvl",
+                    "vl.vdivswsx.vsvvl" => "__builtin_ve_vl_vdivswsx_vsvvl",
+                    "vl.vdivswsx.vvsl" => "__builtin_ve_vl_vdivswsx_vvsl",
+                    "vl.vdivswsx.vvsmvl" => "__builtin_ve_vl_vdivswsx_vvsmvl",
+                    "vl.vdivswsx.vvsvl" => "__builtin_ve_vl_vdivswsx_vvsvl",
+                    "vl.vdivswsx.vvvl" => "__builtin_ve_vl_vdivswsx_vvvl",
+                    "vl.vdivswsx.vvvmvl" => "__builtin_ve_vl_vdivswsx_vvvmvl",
+                    "vl.vdivswsx.vvvvl" => "__builtin_ve_vl_vdivswsx_vvvvl",
+                    "vl.vdivswzx.vsvl" => "__builtin_ve_vl_vdivswzx_vsvl",
+                    "vl.vdivswzx.vsvmvl" => "__builtin_ve_vl_vdivswzx_vsvmvl",
+                    "vl.vdivswzx.vsvvl" => "__builtin_ve_vl_vdivswzx_vsvvl",
+                    "vl.vdivswzx.vvsl" => "__builtin_ve_vl_vdivswzx_vvsl",
+                    "vl.vdivswzx.vvsmvl" => "__builtin_ve_vl_vdivswzx_vvsmvl",
+                    "vl.vdivswzx.vvsvl" => "__builtin_ve_vl_vdivswzx_vvsvl",
+                    "vl.vdivswzx.vvvl" => "__builtin_ve_vl_vdivswzx_vvvl",
+                    "vl.vdivswzx.vvvmvl" => "__builtin_ve_vl_vdivswzx_vvvmvl",
+                    "vl.vdivswzx.vvvvl" => "__builtin_ve_vl_vdivswzx_vvvvl",
+                    "vl.vdivul.vsvl" => "__builtin_ve_vl_vdivul_vsvl",
+                    "vl.vdivul.vsvmvl" => "__builtin_ve_vl_vdivul_vsvmvl",
+                    "vl.vdivul.vsvvl" => "__builtin_ve_vl_vdivul_vsvvl",
+                    "vl.vdivul.vvsl" => "__builtin_ve_vl_vdivul_vvsl",
+                    "vl.vdivul.vvsmvl" => "__builtin_ve_vl_vdivul_vvsmvl",
+                    "vl.vdivul.vvsvl" => "__builtin_ve_vl_vdivul_vvsvl",
+                    "vl.vdivul.vvvl" => "__builtin_ve_vl_vdivul_vvvl",
+                    "vl.vdivul.vvvmvl" => "__builtin_ve_vl_vdivul_vvvmvl",
+                    "vl.vdivul.vvvvl" => "__builtin_ve_vl_vdivul_vvvvl",
+                    "vl.vdivuw.vsvl" => "__builtin_ve_vl_vdivuw_vsvl",
+                    "vl.vdivuw.vsvmvl" => "__builtin_ve_vl_vdivuw_vsvmvl",
+                    "vl.vdivuw.vsvvl" => "__builtin_ve_vl_vdivuw_vsvvl",
+                    "vl.vdivuw.vvsl" => "__builtin_ve_vl_vdivuw_vvsl",
+                    "vl.vdivuw.vvsmvl" => "__builtin_ve_vl_vdivuw_vvsmvl",
+                    "vl.vdivuw.vvsvl" => "__builtin_ve_vl_vdivuw_vvsvl",
+                    "vl.vdivuw.vvvl" => "__builtin_ve_vl_vdivuw_vvvl",
+                    "vl.vdivuw.vvvmvl" => "__builtin_ve_vl_vdivuw_vvvmvl",
+                    "vl.vdivuw.vvvvl" => "__builtin_ve_vl_vdivuw_vvvvl",
+                    "vl.veqv.vsvl" => "__builtin_ve_vl_veqv_vsvl",
+                    "vl.veqv.vsvmvl" => "__builtin_ve_vl_veqv_vsvmvl",
+                    "vl.veqv.vsvvl" => "__builtin_ve_vl_veqv_vsvvl",
+                    "vl.veqv.vvvl" => "__builtin_ve_vl_veqv_vvvl",
+                    "vl.veqv.vvvmvl" => "__builtin_ve_vl_veqv_vvvmvl",
+                    "vl.veqv.vvvvl" => "__builtin_ve_vl_veqv_vvvvl",
+                    "vl.vex.vvmvl" => "__builtin_ve_vl_vex_vvmvl",
+                    "vl.vfaddd.vsvl" => "__builtin_ve_vl_vfaddd_vsvl",
+                    "vl.vfaddd.vsvmvl" => "__builtin_ve_vl_vfaddd_vsvmvl",
+                    "vl.vfaddd.vsvvl" => "__builtin_ve_vl_vfaddd_vsvvl",
+                    "vl.vfaddd.vvvl" => "__builtin_ve_vl_vfaddd_vvvl",
+                    "vl.vfaddd.vvvmvl" => "__builtin_ve_vl_vfaddd_vvvmvl",
+                    "vl.vfaddd.vvvvl" => "__builtin_ve_vl_vfaddd_vvvvl",
+                    "vl.vfadds.vsvl" => "__builtin_ve_vl_vfadds_vsvl",
+                    "vl.vfadds.vsvmvl" => "__builtin_ve_vl_vfadds_vsvmvl",
+                    "vl.vfadds.vsvvl" => "__builtin_ve_vl_vfadds_vsvvl",
+                    "vl.vfadds.vvvl" => "__builtin_ve_vl_vfadds_vvvl",
+                    "vl.vfadds.vvvmvl" => "__builtin_ve_vl_vfadds_vvvmvl",
+                    "vl.vfadds.vvvvl" => "__builtin_ve_vl_vfadds_vvvvl",
+                    "vl.vfcmpd.vsvl" => "__builtin_ve_vl_vfcmpd_vsvl",
+                    "vl.vfcmpd.vsvmvl" => "__builtin_ve_vl_vfcmpd_vsvmvl",
+                    "vl.vfcmpd.vsvvl" => "__builtin_ve_vl_vfcmpd_vsvvl",
+                    "vl.vfcmpd.vvvl" => "__builtin_ve_vl_vfcmpd_vvvl",
+                    "vl.vfcmpd.vvvmvl" => "__builtin_ve_vl_vfcmpd_vvvmvl",
+                    "vl.vfcmpd.vvvvl" => "__builtin_ve_vl_vfcmpd_vvvvl",
+                    "vl.vfcmps.vsvl" => "__builtin_ve_vl_vfcmps_vsvl",
+                    "vl.vfcmps.vsvmvl" => "__builtin_ve_vl_vfcmps_vsvmvl",
+                    "vl.vfcmps.vsvvl" => "__builtin_ve_vl_vfcmps_vsvvl",
+                    "vl.vfcmps.vvvl" => "__builtin_ve_vl_vfcmps_vvvl",
+                    "vl.vfcmps.vvvmvl" => "__builtin_ve_vl_vfcmps_vvvmvl",
+                    "vl.vfcmps.vvvvl" => "__builtin_ve_vl_vfcmps_vvvvl",
+                    "vl.vfdivd.vsvl" => "__builtin_ve_vl_vfdivd_vsvl",
+                    "vl.vfdivd.vsvmvl" => "__builtin_ve_vl_vfdivd_vsvmvl",
+                    "vl.vfdivd.vsvvl" => "__builtin_ve_vl_vfdivd_vsvvl",
+                    "vl.vfdivd.vvvl" => "__builtin_ve_vl_vfdivd_vvvl",
+                    "vl.vfdivd.vvvmvl" => "__builtin_ve_vl_vfdivd_vvvmvl",
+                    "vl.vfdivd.vvvvl" => "__builtin_ve_vl_vfdivd_vvvvl",
+                    "vl.vfdivs.vsvl" => "__builtin_ve_vl_vfdivs_vsvl",
+                    "vl.vfdivs.vsvmvl" => "__builtin_ve_vl_vfdivs_vsvmvl",
+                    "vl.vfdivs.vsvvl" => "__builtin_ve_vl_vfdivs_vsvvl",
+                    "vl.vfdivs.vvvl" => "__builtin_ve_vl_vfdivs_vvvl",
+                    "vl.vfdivs.vvvmvl" => "__builtin_ve_vl_vfdivs_vvvmvl",
+                    "vl.vfdivs.vvvvl" => "__builtin_ve_vl_vfdivs_vvvvl",
+                    "vl.vfmadd.vsvvl" => "__builtin_ve_vl_vfmadd_vsvvl",
+                    "vl.vfmadd.vsvvmvl" => "__builtin_ve_vl_vfmadd_vsvvmvl",
+                    "vl.vfmadd.vsvvvl" => "__builtin_ve_vl_vfmadd_vsvvvl",
+                    "vl.vfmadd.vvsvl" => "__builtin_ve_vl_vfmadd_vvsvl",
+                    "vl.vfmadd.vvsvmvl" => "__builtin_ve_vl_vfmadd_vvsvmvl",
+                    "vl.vfmadd.vvsvvl" => "__builtin_ve_vl_vfmadd_vvsvvl",
+                    "vl.vfmadd.vvvvl" => "__builtin_ve_vl_vfmadd_vvvvl",
+                    "vl.vfmadd.vvvvmvl" => "__builtin_ve_vl_vfmadd_vvvvmvl",
+                    "vl.vfmadd.vvvvvl" => "__builtin_ve_vl_vfmadd_vvvvvl",
+                    "vl.vfmads.vsvvl" => "__builtin_ve_vl_vfmads_vsvvl",
+                    "vl.vfmads.vsvvmvl" => "__builtin_ve_vl_vfmads_vsvvmvl",
+                    "vl.vfmads.vsvvvl" => "__builtin_ve_vl_vfmads_vsvvvl",
+                    "vl.vfmads.vvsvl" => "__builtin_ve_vl_vfmads_vvsvl",
+                    "vl.vfmads.vvsvmvl" => "__builtin_ve_vl_vfmads_vvsvmvl",
+                    "vl.vfmads.vvsvvl" => "__builtin_ve_vl_vfmads_vvsvvl",
+                    "vl.vfmads.vvvvl" => "__builtin_ve_vl_vfmads_vvvvl",
+                    "vl.vfmads.vvvvmvl" => "__builtin_ve_vl_vfmads_vvvvmvl",
+                    "vl.vfmads.vvvvvl" => "__builtin_ve_vl_vfmads_vvvvvl",
+                    "vl.vfmaxd.vsvl" => "__builtin_ve_vl_vfmaxd_vsvl",
+                    "vl.vfmaxd.vsvmvl" => "__builtin_ve_vl_vfmaxd_vsvmvl",
+                    "vl.vfmaxd.vsvvl" => "__builtin_ve_vl_vfmaxd_vsvvl",
+                    "vl.vfmaxd.vvvl" => "__builtin_ve_vl_vfmaxd_vvvl",
+                    "vl.vfmaxd.vvvmvl" => "__builtin_ve_vl_vfmaxd_vvvmvl",
+                    "vl.vfmaxd.vvvvl" => "__builtin_ve_vl_vfmaxd_vvvvl",
+                    "vl.vfmaxs.vsvl" => "__builtin_ve_vl_vfmaxs_vsvl",
+                    "vl.vfmaxs.vsvmvl" => "__builtin_ve_vl_vfmaxs_vsvmvl",
+                    "vl.vfmaxs.vsvvl" => "__builtin_ve_vl_vfmaxs_vsvvl",
+                    "vl.vfmaxs.vvvl" => "__builtin_ve_vl_vfmaxs_vvvl",
+                    "vl.vfmaxs.vvvmvl" => "__builtin_ve_vl_vfmaxs_vvvmvl",
+                    "vl.vfmaxs.vvvvl" => "__builtin_ve_vl_vfmaxs_vvvvl",
+                    "vl.vfmind.vsvl" => "__builtin_ve_vl_vfmind_vsvl",
+                    "vl.vfmind.vsvmvl" => "__builtin_ve_vl_vfmind_vsvmvl",
+                    "vl.vfmind.vsvvl" => "__builtin_ve_vl_vfmind_vsvvl",
+                    "vl.vfmind.vvvl" => "__builtin_ve_vl_vfmind_vvvl",
+                    "vl.vfmind.vvvmvl" => "__builtin_ve_vl_vfmind_vvvmvl",
+                    "vl.vfmind.vvvvl" => "__builtin_ve_vl_vfmind_vvvvl",
+                    "vl.vfmins.vsvl" => "__builtin_ve_vl_vfmins_vsvl",
+                    "vl.vfmins.vsvmvl" => "__builtin_ve_vl_vfmins_vsvmvl",
+                    "vl.vfmins.vsvvl" => "__builtin_ve_vl_vfmins_vsvvl",
+                    "vl.vfmins.vvvl" => "__builtin_ve_vl_vfmins_vvvl",
+                    "vl.vfmins.vvvmvl" => "__builtin_ve_vl_vfmins_vvvmvl",
+                    "vl.vfmins.vvvvl" => "__builtin_ve_vl_vfmins_vvvvl",
+                    "vl.vfmkdeq.mvl" => "__builtin_ve_vl_vfmkdeq_mvl",
+                    "vl.vfmkdeq.mvml" => "__builtin_ve_vl_vfmkdeq_mvml",
+                    "vl.vfmkdeqnan.mvl" => "__builtin_ve_vl_vfmkdeqnan_mvl",
+                    "vl.vfmkdeqnan.mvml" => "__builtin_ve_vl_vfmkdeqnan_mvml",
+                    "vl.vfmkdge.mvl" => "__builtin_ve_vl_vfmkdge_mvl",
+                    "vl.vfmkdge.mvml" => "__builtin_ve_vl_vfmkdge_mvml",
+                    "vl.vfmkdgenan.mvl" => "__builtin_ve_vl_vfmkdgenan_mvl",
+                    "vl.vfmkdgenan.mvml" => "__builtin_ve_vl_vfmkdgenan_mvml",
+                    "vl.vfmkdgt.mvl" => "__builtin_ve_vl_vfmkdgt_mvl",
+                    "vl.vfmkdgt.mvml" => "__builtin_ve_vl_vfmkdgt_mvml",
+                    "vl.vfmkdgtnan.mvl" => "__builtin_ve_vl_vfmkdgtnan_mvl",
+                    "vl.vfmkdgtnan.mvml" => "__builtin_ve_vl_vfmkdgtnan_mvml",
+                    "vl.vfmkdle.mvl" => "__builtin_ve_vl_vfmkdle_mvl",
+                    "vl.vfmkdle.mvml" => "__builtin_ve_vl_vfmkdle_mvml",
+                    "vl.vfmkdlenan.mvl" => "__builtin_ve_vl_vfmkdlenan_mvl",
+                    "vl.vfmkdlenan.mvml" => "__builtin_ve_vl_vfmkdlenan_mvml",
+                    "vl.vfmkdlt.mvl" => "__builtin_ve_vl_vfmkdlt_mvl",
+                    "vl.vfmkdlt.mvml" => "__builtin_ve_vl_vfmkdlt_mvml",
+                    "vl.vfmkdltnan.mvl" => "__builtin_ve_vl_vfmkdltnan_mvl",
+                    "vl.vfmkdltnan.mvml" => "__builtin_ve_vl_vfmkdltnan_mvml",
+                    "vl.vfmkdnan.mvl" => "__builtin_ve_vl_vfmkdnan_mvl",
+                    "vl.vfmkdnan.mvml" => "__builtin_ve_vl_vfmkdnan_mvml",
+                    "vl.vfmkdne.mvl" => "__builtin_ve_vl_vfmkdne_mvl",
+                    "vl.vfmkdne.mvml" => "__builtin_ve_vl_vfmkdne_mvml",
+                    "vl.vfmkdnenan.mvl" => "__builtin_ve_vl_vfmkdnenan_mvl",
+                    "vl.vfmkdnenan.mvml" => "__builtin_ve_vl_vfmkdnenan_mvml",
+                    "vl.vfmkdnum.mvl" => "__builtin_ve_vl_vfmkdnum_mvl",
+                    "vl.vfmkdnum.mvml" => "__builtin_ve_vl_vfmkdnum_mvml",
+                    "vl.vfmklaf.ml" => "__builtin_ve_vl_vfmklaf_ml",
+                    "vl.vfmklat.ml" => "__builtin_ve_vl_vfmklat_ml",
+                    "vl.vfmkleq.mvl" => "__builtin_ve_vl_vfmkleq_mvl",
+                    "vl.vfmkleq.mvml" => "__builtin_ve_vl_vfmkleq_mvml",
+                    "vl.vfmkleqnan.mvl" => "__builtin_ve_vl_vfmkleqnan_mvl",
+                    "vl.vfmkleqnan.mvml" => "__builtin_ve_vl_vfmkleqnan_mvml",
+                    "vl.vfmklge.mvl" => "__builtin_ve_vl_vfmklge_mvl",
+                    "vl.vfmklge.mvml" => "__builtin_ve_vl_vfmklge_mvml",
+                    "vl.vfmklgenan.mvl" => "__builtin_ve_vl_vfmklgenan_mvl",
+                    "vl.vfmklgenan.mvml" => "__builtin_ve_vl_vfmklgenan_mvml",
+                    "vl.vfmklgt.mvl" => "__builtin_ve_vl_vfmklgt_mvl",
+                    "vl.vfmklgt.mvml" => "__builtin_ve_vl_vfmklgt_mvml",
+                    "vl.vfmklgtnan.mvl" => "__builtin_ve_vl_vfmklgtnan_mvl",
+                    "vl.vfmklgtnan.mvml" => "__builtin_ve_vl_vfmklgtnan_mvml",
+                    "vl.vfmklle.mvl" => "__builtin_ve_vl_vfmklle_mvl",
+                    "vl.vfmklle.mvml" => "__builtin_ve_vl_vfmklle_mvml",
+                    "vl.vfmkllenan.mvl" => "__builtin_ve_vl_vfmkllenan_mvl",
+                    "vl.vfmkllenan.mvml" => "__builtin_ve_vl_vfmkllenan_mvml",
+                    "vl.vfmkllt.mvl" => "__builtin_ve_vl_vfmkllt_mvl",
+                    "vl.vfmkllt.mvml" => "__builtin_ve_vl_vfmkllt_mvml",
+                    "vl.vfmklltnan.mvl" => "__builtin_ve_vl_vfmklltnan_mvl",
+                    "vl.vfmklltnan.mvml" => "__builtin_ve_vl_vfmklltnan_mvml",
+                    "vl.vfmklnan.mvl" => "__builtin_ve_vl_vfmklnan_mvl",
+                    "vl.vfmklnan.mvml" => "__builtin_ve_vl_vfmklnan_mvml",
+                    "vl.vfmklne.mvl" => "__builtin_ve_vl_vfmklne_mvl",
+                    "vl.vfmklne.mvml" => "__builtin_ve_vl_vfmklne_mvml",
+                    "vl.vfmklnenan.mvl" => "__builtin_ve_vl_vfmklnenan_mvl",
+                    "vl.vfmklnenan.mvml" => "__builtin_ve_vl_vfmklnenan_mvml",
+                    "vl.vfmklnum.mvl" => "__builtin_ve_vl_vfmklnum_mvl",
+                    "vl.vfmklnum.mvml" => "__builtin_ve_vl_vfmklnum_mvml",
+                    "vl.vfmkseq.mvl" => "__builtin_ve_vl_vfmkseq_mvl",
+                    "vl.vfmkseq.mvml" => "__builtin_ve_vl_vfmkseq_mvml",
+                    "vl.vfmkseqnan.mvl" => "__builtin_ve_vl_vfmkseqnan_mvl",
+                    "vl.vfmkseqnan.mvml" => "__builtin_ve_vl_vfmkseqnan_mvml",
+                    "vl.vfmksge.mvl" => "__builtin_ve_vl_vfmksge_mvl",
+                    "vl.vfmksge.mvml" => "__builtin_ve_vl_vfmksge_mvml",
+                    "vl.vfmksgenan.mvl" => "__builtin_ve_vl_vfmksgenan_mvl",
+                    "vl.vfmksgenan.mvml" => "__builtin_ve_vl_vfmksgenan_mvml",
+                    "vl.vfmksgt.mvl" => "__builtin_ve_vl_vfmksgt_mvl",
+                    "vl.vfmksgt.mvml" => "__builtin_ve_vl_vfmksgt_mvml",
+                    "vl.vfmksgtnan.mvl" => "__builtin_ve_vl_vfmksgtnan_mvl",
+                    "vl.vfmksgtnan.mvml" => "__builtin_ve_vl_vfmksgtnan_mvml",
+                    "vl.vfmksle.mvl" => "__builtin_ve_vl_vfmksle_mvl",
+                    "vl.vfmksle.mvml" => "__builtin_ve_vl_vfmksle_mvml",
+                    "vl.vfmkslenan.mvl" => "__builtin_ve_vl_vfmkslenan_mvl",
+                    "vl.vfmkslenan.mvml" => "__builtin_ve_vl_vfmkslenan_mvml",
+                    "vl.vfmkslt.mvl" => "__builtin_ve_vl_vfmkslt_mvl",
+                    "vl.vfmkslt.mvml" => "__builtin_ve_vl_vfmkslt_mvml",
+                    "vl.vfmksltnan.mvl" => "__builtin_ve_vl_vfmksltnan_mvl",
+                    "vl.vfmksltnan.mvml" => "__builtin_ve_vl_vfmksltnan_mvml",
+                    "vl.vfmksnan.mvl" => "__builtin_ve_vl_vfmksnan_mvl",
+                    "vl.vfmksnan.mvml" => "__builtin_ve_vl_vfmksnan_mvml",
+                    "vl.vfmksne.mvl" => "__builtin_ve_vl_vfmksne_mvl",
+                    "vl.vfmksne.mvml" => "__builtin_ve_vl_vfmksne_mvml",
+                    "vl.vfmksnenan.mvl" => "__builtin_ve_vl_vfmksnenan_mvl",
+                    "vl.vfmksnenan.mvml" => "__builtin_ve_vl_vfmksnenan_mvml",
+                    "vl.vfmksnum.mvl" => "__builtin_ve_vl_vfmksnum_mvl",
+                    "vl.vfmksnum.mvml" => "__builtin_ve_vl_vfmksnum_mvml",
+                    "vl.vfmkweq.mvl" => "__builtin_ve_vl_vfmkweq_mvl",
+                    "vl.vfmkweq.mvml" => "__builtin_ve_vl_vfmkweq_mvml",
+                    "vl.vfmkweqnan.mvl" => "__builtin_ve_vl_vfmkweqnan_mvl",
+                    "vl.vfmkweqnan.mvml" => "__builtin_ve_vl_vfmkweqnan_mvml",
+                    "vl.vfmkwge.mvl" => "__builtin_ve_vl_vfmkwge_mvl",
+                    "vl.vfmkwge.mvml" => "__builtin_ve_vl_vfmkwge_mvml",
+                    "vl.vfmkwgenan.mvl" => "__builtin_ve_vl_vfmkwgenan_mvl",
+                    "vl.vfmkwgenan.mvml" => "__builtin_ve_vl_vfmkwgenan_mvml",
+                    "vl.vfmkwgt.mvl" => "__builtin_ve_vl_vfmkwgt_mvl",
+                    "vl.vfmkwgt.mvml" => "__builtin_ve_vl_vfmkwgt_mvml",
+                    "vl.vfmkwgtnan.mvl" => "__builtin_ve_vl_vfmkwgtnan_mvl",
+                    "vl.vfmkwgtnan.mvml" => "__builtin_ve_vl_vfmkwgtnan_mvml",
+                    "vl.vfmkwle.mvl" => "__builtin_ve_vl_vfmkwle_mvl",
+                    "vl.vfmkwle.mvml" => "__builtin_ve_vl_vfmkwle_mvml",
+                    "vl.vfmkwlenan.mvl" => "__builtin_ve_vl_vfmkwlenan_mvl",
+                    "vl.vfmkwlenan.mvml" => "__builtin_ve_vl_vfmkwlenan_mvml",
+                    "vl.vfmkwlt.mvl" => "__builtin_ve_vl_vfmkwlt_mvl",
+                    "vl.vfmkwlt.mvml" => "__builtin_ve_vl_vfmkwlt_mvml",
+                    "vl.vfmkwltnan.mvl" => "__builtin_ve_vl_vfmkwltnan_mvl",
+                    "vl.vfmkwltnan.mvml" => "__builtin_ve_vl_vfmkwltnan_mvml",
+                    "vl.vfmkwnan.mvl" => "__builtin_ve_vl_vfmkwnan_mvl",
+                    "vl.vfmkwnan.mvml" => "__builtin_ve_vl_vfmkwnan_mvml",
+                    "vl.vfmkwne.mvl" => "__builtin_ve_vl_vfmkwne_mvl",
+                    "vl.vfmkwne.mvml" => "__builtin_ve_vl_vfmkwne_mvml",
+                    "vl.vfmkwnenan.mvl" => "__builtin_ve_vl_vfmkwnenan_mvl",
+                    "vl.vfmkwnenan.mvml" => "__builtin_ve_vl_vfmkwnenan_mvml",
+                    "vl.vfmkwnum.mvl" => "__builtin_ve_vl_vfmkwnum_mvl",
+                    "vl.vfmkwnum.mvml" => "__builtin_ve_vl_vfmkwnum_mvml",
+                    "vl.vfmsbd.vsvvl" => "__builtin_ve_vl_vfmsbd_vsvvl",
+                    "vl.vfmsbd.vsvvmvl" => "__builtin_ve_vl_vfmsbd_vsvvmvl",
+                    "vl.vfmsbd.vsvvvl" => "__builtin_ve_vl_vfmsbd_vsvvvl",
+                    "vl.vfmsbd.vvsvl" => "__builtin_ve_vl_vfmsbd_vvsvl",
+                    "vl.vfmsbd.vvsvmvl" => "__builtin_ve_vl_vfmsbd_vvsvmvl",
+                    "vl.vfmsbd.vvsvvl" => "__builtin_ve_vl_vfmsbd_vvsvvl",
+                    "vl.vfmsbd.vvvvl" => "__builtin_ve_vl_vfmsbd_vvvvl",
+                    "vl.vfmsbd.vvvvmvl" => "__builtin_ve_vl_vfmsbd_vvvvmvl",
+                    "vl.vfmsbd.vvvvvl" => "__builtin_ve_vl_vfmsbd_vvvvvl",
+                    "vl.vfmsbs.vsvvl" => "__builtin_ve_vl_vfmsbs_vsvvl",
+                    "vl.vfmsbs.vsvvmvl" => "__builtin_ve_vl_vfmsbs_vsvvmvl",
+                    "vl.vfmsbs.vsvvvl" => "__builtin_ve_vl_vfmsbs_vsvvvl",
+                    "vl.vfmsbs.vvsvl" => "__builtin_ve_vl_vfmsbs_vvsvl",
+                    "vl.vfmsbs.vvsvmvl" => "__builtin_ve_vl_vfmsbs_vvsvmvl",
+                    "vl.vfmsbs.vvsvvl" => "__builtin_ve_vl_vfmsbs_vvsvvl",
+                    "vl.vfmsbs.vvvvl" => "__builtin_ve_vl_vfmsbs_vvvvl",
+                    "vl.vfmsbs.vvvvmvl" => "__builtin_ve_vl_vfmsbs_vvvvmvl",
+                    "vl.vfmsbs.vvvvvl" => "__builtin_ve_vl_vfmsbs_vvvvvl",
+                    "vl.vfmuld.vsvl" => "__builtin_ve_vl_vfmuld_vsvl",
+                    "vl.vfmuld.vsvmvl" => "__builtin_ve_vl_vfmuld_vsvmvl",
+                    "vl.vfmuld.vsvvl" => "__builtin_ve_vl_vfmuld_vsvvl",
+                    "vl.vfmuld.vvvl" => "__builtin_ve_vl_vfmuld_vvvl",
+                    "vl.vfmuld.vvvmvl" => "__builtin_ve_vl_vfmuld_vvvmvl",
+                    "vl.vfmuld.vvvvl" => "__builtin_ve_vl_vfmuld_vvvvl",
+                    "vl.vfmuls.vsvl" => "__builtin_ve_vl_vfmuls_vsvl",
+                    "vl.vfmuls.vsvmvl" => "__builtin_ve_vl_vfmuls_vsvmvl",
+                    "vl.vfmuls.vsvvl" => "__builtin_ve_vl_vfmuls_vsvvl",
+                    "vl.vfmuls.vvvl" => "__builtin_ve_vl_vfmuls_vvvl",
+                    "vl.vfmuls.vvvmvl" => "__builtin_ve_vl_vfmuls_vvvmvl",
+                    "vl.vfmuls.vvvvl" => "__builtin_ve_vl_vfmuls_vvvvl",
+                    "vl.vfnmadd.vsvvl" => "__builtin_ve_vl_vfnmadd_vsvvl",
+                    "vl.vfnmadd.vsvvmvl" => "__builtin_ve_vl_vfnmadd_vsvvmvl",
+                    "vl.vfnmadd.vsvvvl" => "__builtin_ve_vl_vfnmadd_vsvvvl",
+                    "vl.vfnmadd.vvsvl" => "__builtin_ve_vl_vfnmadd_vvsvl",
+                    "vl.vfnmadd.vvsvmvl" => "__builtin_ve_vl_vfnmadd_vvsvmvl",
+                    "vl.vfnmadd.vvsvvl" => "__builtin_ve_vl_vfnmadd_vvsvvl",
+                    "vl.vfnmadd.vvvvl" => "__builtin_ve_vl_vfnmadd_vvvvl",
+                    "vl.vfnmadd.vvvvmvl" => "__builtin_ve_vl_vfnmadd_vvvvmvl",
+                    "vl.vfnmadd.vvvvvl" => "__builtin_ve_vl_vfnmadd_vvvvvl",
+                    "vl.vfnmads.vsvvl" => "__builtin_ve_vl_vfnmads_vsvvl",
+                    "vl.vfnmads.vsvvmvl" => "__builtin_ve_vl_vfnmads_vsvvmvl",
+                    "vl.vfnmads.vsvvvl" => "__builtin_ve_vl_vfnmads_vsvvvl",
+                    "vl.vfnmads.vvsvl" => "__builtin_ve_vl_vfnmads_vvsvl",
+                    "vl.vfnmads.vvsvmvl" => "__builtin_ve_vl_vfnmads_vvsvmvl",
+                    "vl.vfnmads.vvsvvl" => "__builtin_ve_vl_vfnmads_vvsvvl",
+                    "vl.vfnmads.vvvvl" => "__builtin_ve_vl_vfnmads_vvvvl",
+                    "vl.vfnmads.vvvvmvl" => "__builtin_ve_vl_vfnmads_vvvvmvl",
+                    "vl.vfnmads.vvvvvl" => "__builtin_ve_vl_vfnmads_vvvvvl",
+                    "vl.vfnmsbd.vsvvl" => "__builtin_ve_vl_vfnmsbd_vsvvl",
+                    "vl.vfnmsbd.vsvvmvl" => "__builtin_ve_vl_vfnmsbd_vsvvmvl",
+                    "vl.vfnmsbd.vsvvvl" => "__builtin_ve_vl_vfnmsbd_vsvvvl",
+                    "vl.vfnmsbd.vvsvl" => "__builtin_ve_vl_vfnmsbd_vvsvl",
+                    "vl.vfnmsbd.vvsvmvl" => "__builtin_ve_vl_vfnmsbd_vvsvmvl",
+                    "vl.vfnmsbd.vvsvvl" => "__builtin_ve_vl_vfnmsbd_vvsvvl",
+                    "vl.vfnmsbd.vvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvl",
+                    "vl.vfnmsbd.vvvvmvl" => "__builtin_ve_vl_vfnmsbd_vvvvmvl",
+                    "vl.vfnmsbd.vvvvvl" => "__builtin_ve_vl_vfnmsbd_vvvvvl",
+                    "vl.vfnmsbs.vsvvl" => "__builtin_ve_vl_vfnmsbs_vsvvl",
+                    "vl.vfnmsbs.vsvvmvl" => "__builtin_ve_vl_vfnmsbs_vsvvmvl",
+                    "vl.vfnmsbs.vsvvvl" => "__builtin_ve_vl_vfnmsbs_vsvvvl",
+                    "vl.vfnmsbs.vvsvl" => "__builtin_ve_vl_vfnmsbs_vvsvl",
+                    "vl.vfnmsbs.vvsvmvl" => "__builtin_ve_vl_vfnmsbs_vvsvmvl",
+                    "vl.vfnmsbs.vvsvvl" => "__builtin_ve_vl_vfnmsbs_vvsvvl",
+                    "vl.vfnmsbs.vvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvl",
+                    "vl.vfnmsbs.vvvvmvl" => "__builtin_ve_vl_vfnmsbs_vvvvmvl",
+                    "vl.vfnmsbs.vvvvvl" => "__builtin_ve_vl_vfnmsbs_vvvvvl",
+                    "vl.vfrmaxdfst.vvl" => "__builtin_ve_vl_vfrmaxdfst_vvl",
+                    "vl.vfrmaxdfst.vvvl" => "__builtin_ve_vl_vfrmaxdfst_vvvl",
+                    "vl.vfrmaxdlst.vvl" => "__builtin_ve_vl_vfrmaxdlst_vvl",
+                    "vl.vfrmaxdlst.vvvl" => "__builtin_ve_vl_vfrmaxdlst_vvvl",
+                    "vl.vfrmaxsfst.vvl" => "__builtin_ve_vl_vfrmaxsfst_vvl",
+                    "vl.vfrmaxsfst.vvvl" => "__builtin_ve_vl_vfrmaxsfst_vvvl",
+                    "vl.vfrmaxslst.vvl" => "__builtin_ve_vl_vfrmaxslst_vvl",
+                    "vl.vfrmaxslst.vvvl" => "__builtin_ve_vl_vfrmaxslst_vvvl",
+                    "vl.vfrmindfst.vvl" => "__builtin_ve_vl_vfrmindfst_vvl",
+                    "vl.vfrmindfst.vvvl" => "__builtin_ve_vl_vfrmindfst_vvvl",
+                    "vl.vfrmindlst.vvl" => "__builtin_ve_vl_vfrmindlst_vvl",
+                    "vl.vfrmindlst.vvvl" => "__builtin_ve_vl_vfrmindlst_vvvl",
+                    "vl.vfrminsfst.vvl" => "__builtin_ve_vl_vfrminsfst_vvl",
+                    "vl.vfrminsfst.vvvl" => "__builtin_ve_vl_vfrminsfst_vvvl",
+                    "vl.vfrminslst.vvl" => "__builtin_ve_vl_vfrminslst_vvl",
+                    "vl.vfrminslst.vvvl" => "__builtin_ve_vl_vfrminslst_vvvl",
+                    "vl.vfsqrtd.vvl" => "__builtin_ve_vl_vfsqrtd_vvl",
+                    "vl.vfsqrtd.vvvl" => "__builtin_ve_vl_vfsqrtd_vvvl",
+                    "vl.vfsqrts.vvl" => "__builtin_ve_vl_vfsqrts_vvl",
+                    "vl.vfsqrts.vvvl" => "__builtin_ve_vl_vfsqrts_vvvl",
+                    "vl.vfsubd.vsvl" => "__builtin_ve_vl_vfsubd_vsvl",
+                    "vl.vfsubd.vsvmvl" => "__builtin_ve_vl_vfsubd_vsvmvl",
+                    "vl.vfsubd.vsvvl" => "__builtin_ve_vl_vfsubd_vsvvl",
+                    "vl.vfsubd.vvvl" => "__builtin_ve_vl_vfsubd_vvvl",
+                    "vl.vfsubd.vvvmvl" => "__builtin_ve_vl_vfsubd_vvvmvl",
+                    "vl.vfsubd.vvvvl" => "__builtin_ve_vl_vfsubd_vvvvl",
+                    "vl.vfsubs.vsvl" => "__builtin_ve_vl_vfsubs_vsvl",
+                    "vl.vfsubs.vsvmvl" => "__builtin_ve_vl_vfsubs_vsvmvl",
+                    "vl.vfsubs.vsvvl" => "__builtin_ve_vl_vfsubs_vsvvl",
+                    "vl.vfsubs.vvvl" => "__builtin_ve_vl_vfsubs_vvvl",
+                    "vl.vfsubs.vvvmvl" => "__builtin_ve_vl_vfsubs_vvvmvl",
+                    "vl.vfsubs.vvvvl" => "__builtin_ve_vl_vfsubs_vvvvl",
+                    "vl.vfsumd.vvl" => "__builtin_ve_vl_vfsumd_vvl",
+                    "vl.vfsumd.vvml" => "__builtin_ve_vl_vfsumd_vvml",
+                    "vl.vfsums.vvl" => "__builtin_ve_vl_vfsums_vvl",
+                    "vl.vfsums.vvml" => "__builtin_ve_vl_vfsums_vvml",
+                    "vl.vgt.vvssl" => "__builtin_ve_vl_vgt_vvssl",
+                    "vl.vgt.vvssml" => "__builtin_ve_vl_vgt_vvssml",
+                    "vl.vgt.vvssmvl" => "__builtin_ve_vl_vgt_vvssmvl",
+                    "vl.vgt.vvssvl" => "__builtin_ve_vl_vgt_vvssvl",
+                    "vl.vgtlsx.vvssl" => "__builtin_ve_vl_vgtlsx_vvssl",
+                    "vl.vgtlsx.vvssml" => "__builtin_ve_vl_vgtlsx_vvssml",
+                    "vl.vgtlsx.vvssmvl" => "__builtin_ve_vl_vgtlsx_vvssmvl",
+                    "vl.vgtlsx.vvssvl" => "__builtin_ve_vl_vgtlsx_vvssvl",
+                    "vl.vgtlsxnc.vvssl" => "__builtin_ve_vl_vgtlsxnc_vvssl",
+                    "vl.vgtlsxnc.vvssml" => "__builtin_ve_vl_vgtlsxnc_vvssml",
+                    "vl.vgtlsxnc.vvssmvl" => "__builtin_ve_vl_vgtlsxnc_vvssmvl",
+                    "vl.vgtlsxnc.vvssvl" => "__builtin_ve_vl_vgtlsxnc_vvssvl",
+                    "vl.vgtlzx.vvssl" => "__builtin_ve_vl_vgtlzx_vvssl",
+                    "vl.vgtlzx.vvssml" => "__builtin_ve_vl_vgtlzx_vvssml",
+                    "vl.vgtlzx.vvssmvl" => "__builtin_ve_vl_vgtlzx_vvssmvl",
+                    "vl.vgtlzx.vvssvl" => "__builtin_ve_vl_vgtlzx_vvssvl",
+                    "vl.vgtlzxnc.vvssl" => "__builtin_ve_vl_vgtlzxnc_vvssl",
+                    "vl.vgtlzxnc.vvssml" => "__builtin_ve_vl_vgtlzxnc_vvssml",
+                    "vl.vgtlzxnc.vvssmvl" => "__builtin_ve_vl_vgtlzxnc_vvssmvl",
+                    "vl.vgtlzxnc.vvssvl" => "__builtin_ve_vl_vgtlzxnc_vvssvl",
+                    "vl.vgtnc.vvssl" => "__builtin_ve_vl_vgtnc_vvssl",
+                    "vl.vgtnc.vvssml" => "__builtin_ve_vl_vgtnc_vvssml",
+                    "vl.vgtnc.vvssmvl" => "__builtin_ve_vl_vgtnc_vvssmvl",
+                    "vl.vgtnc.vvssvl" => "__builtin_ve_vl_vgtnc_vvssvl",
+                    "vl.vgtu.vvssl" => "__builtin_ve_vl_vgtu_vvssl",
+                    "vl.vgtu.vvssml" => "__builtin_ve_vl_vgtu_vvssml",
+                    "vl.vgtu.vvssmvl" => "__builtin_ve_vl_vgtu_vvssmvl",
+                    "vl.vgtu.vvssvl" => "__builtin_ve_vl_vgtu_vvssvl",
+                    "vl.vgtunc.vvssl" => "__builtin_ve_vl_vgtunc_vvssl",
+                    "vl.vgtunc.vvssml" => "__builtin_ve_vl_vgtunc_vvssml",
+                    "vl.vgtunc.vvssmvl" => "__builtin_ve_vl_vgtunc_vvssmvl",
+                    "vl.vgtunc.vvssvl" => "__builtin_ve_vl_vgtunc_vvssvl",
+                    "vl.vld.vssl" => "__builtin_ve_vl_vld_vssl",
+                    "vl.vld.vssvl" => "__builtin_ve_vl_vld_vssvl",
+                    "vl.vld2d.vssl" => "__builtin_ve_vl_vld2d_vssl",
+                    "vl.vld2d.vssvl" => "__builtin_ve_vl_vld2d_vssvl",
+                    "vl.vld2dnc.vssl" => "__builtin_ve_vl_vld2dnc_vssl",
+                    "vl.vld2dnc.vssvl" => "__builtin_ve_vl_vld2dnc_vssvl",
+                    "vl.vldl2dsx.vssl" => "__builtin_ve_vl_vldl2dsx_vssl",
+                    "vl.vldl2dsx.vssvl" => "__builtin_ve_vl_vldl2dsx_vssvl",
+                    "vl.vldl2dsxnc.vssl" => "__builtin_ve_vl_vldl2dsxnc_vssl",
+                    "vl.vldl2dsxnc.vssvl" => "__builtin_ve_vl_vldl2dsxnc_vssvl",
+                    "vl.vldl2dzx.vssl" => "__builtin_ve_vl_vldl2dzx_vssl",
+                    "vl.vldl2dzx.vssvl" => "__builtin_ve_vl_vldl2dzx_vssvl",
+                    "vl.vldl2dzxnc.vssl" => "__builtin_ve_vl_vldl2dzxnc_vssl",
+                    "vl.vldl2dzxnc.vssvl" => "__builtin_ve_vl_vldl2dzxnc_vssvl",
+                    "vl.vldlsx.vssl" => "__builtin_ve_vl_vldlsx_vssl",
+                    "vl.vldlsx.vssvl" => "__builtin_ve_vl_vldlsx_vssvl",
+                    "vl.vldlsxnc.vssl" => "__builtin_ve_vl_vldlsxnc_vssl",
+                    "vl.vldlsxnc.vssvl" => "__builtin_ve_vl_vldlsxnc_vssvl",
+                    "vl.vldlzx.vssl" => "__builtin_ve_vl_vldlzx_vssl",
+                    "vl.vldlzx.vssvl" => "__builtin_ve_vl_vldlzx_vssvl",
+                    "vl.vldlzxnc.vssl" => "__builtin_ve_vl_vldlzxnc_vssl",
+                    "vl.vldlzxnc.vssvl" => "__builtin_ve_vl_vldlzxnc_vssvl",
+                    "vl.vldnc.vssl" => "__builtin_ve_vl_vldnc_vssl",
+                    "vl.vldnc.vssvl" => "__builtin_ve_vl_vldnc_vssvl",
+                    "vl.vldu.vssl" => "__builtin_ve_vl_vldu_vssl",
+                    "vl.vldu.vssvl" => "__builtin_ve_vl_vldu_vssvl",
+                    "vl.vldu2d.vssl" => "__builtin_ve_vl_vldu2d_vssl",
+                    "vl.vldu2d.vssvl" => "__builtin_ve_vl_vldu2d_vssvl",
+                    "vl.vldu2dnc.vssl" => "__builtin_ve_vl_vldu2dnc_vssl",
+                    "vl.vldu2dnc.vssvl" => "__builtin_ve_vl_vldu2dnc_vssvl",
+                    "vl.vldunc.vssl" => "__builtin_ve_vl_vldunc_vssl",
+                    "vl.vldunc.vssvl" => "__builtin_ve_vl_vldunc_vssvl",
+                    "vl.vldz.vvl" => "__builtin_ve_vl_vldz_vvl",
+                    "vl.vldz.vvmvl" => "__builtin_ve_vl_vldz_vvmvl",
+                    "vl.vldz.vvvl" => "__builtin_ve_vl_vldz_vvvl",
+                    "vl.vmaxsl.vsvl" => "__builtin_ve_vl_vmaxsl_vsvl",
+                    "vl.vmaxsl.vsvmvl" => "__builtin_ve_vl_vmaxsl_vsvmvl",
+                    "vl.vmaxsl.vsvvl" => "__builtin_ve_vl_vmaxsl_vsvvl",
+                    "vl.vmaxsl.vvvl" => "__builtin_ve_vl_vmaxsl_vvvl",
+                    "vl.vmaxsl.vvvmvl" => "__builtin_ve_vl_vmaxsl_vvvmvl",
+                    "vl.vmaxsl.vvvvl" => "__builtin_ve_vl_vmaxsl_vvvvl",
+                    "vl.vmaxswsx.vsvl" => "__builtin_ve_vl_vmaxswsx_vsvl",
+                    "vl.vmaxswsx.vsvmvl" => "__builtin_ve_vl_vmaxswsx_vsvmvl",
+                    "vl.vmaxswsx.vsvvl" => "__builtin_ve_vl_vmaxswsx_vsvvl",
+                    "vl.vmaxswsx.vvvl" => "__builtin_ve_vl_vmaxswsx_vvvl",
+                    "vl.vmaxswsx.vvvmvl" => "__builtin_ve_vl_vmaxswsx_vvvmvl",
+                    "vl.vmaxswsx.vvvvl" => "__builtin_ve_vl_vmaxswsx_vvvvl",
+                    "vl.vmaxswzx.vsvl" => "__builtin_ve_vl_vmaxswzx_vsvl",
+                    "vl.vmaxswzx.vsvmvl" => "__builtin_ve_vl_vmaxswzx_vsvmvl",
+                    "vl.vmaxswzx.vsvvl" => "__builtin_ve_vl_vmaxswzx_vsvvl",
+                    "vl.vmaxswzx.vvvl" => "__builtin_ve_vl_vmaxswzx_vvvl",
+                    "vl.vmaxswzx.vvvmvl" => "__builtin_ve_vl_vmaxswzx_vvvmvl",
+                    "vl.vmaxswzx.vvvvl" => "__builtin_ve_vl_vmaxswzx_vvvvl",
+                    "vl.vminsl.vsvl" => "__builtin_ve_vl_vminsl_vsvl",
+                    "vl.vminsl.vsvmvl" => "__builtin_ve_vl_vminsl_vsvmvl",
+                    "vl.vminsl.vsvvl" => "__builtin_ve_vl_vminsl_vsvvl",
+                    "vl.vminsl.vvvl" => "__builtin_ve_vl_vminsl_vvvl",
+                    "vl.vminsl.vvvmvl" => "__builtin_ve_vl_vminsl_vvvmvl",
+                    "vl.vminsl.vvvvl" => "__builtin_ve_vl_vminsl_vvvvl",
+                    "vl.vminswsx.vsvl" => "__builtin_ve_vl_vminswsx_vsvl",
+                    "vl.vminswsx.vsvmvl" => "__builtin_ve_vl_vminswsx_vsvmvl",
+                    "vl.vminswsx.vsvvl" => "__builtin_ve_vl_vminswsx_vsvvl",
+                    "vl.vminswsx.vvvl" => "__builtin_ve_vl_vminswsx_vvvl",
+                    "vl.vminswsx.vvvmvl" => "__builtin_ve_vl_vminswsx_vvvmvl",
+                    "vl.vminswsx.vvvvl" => "__builtin_ve_vl_vminswsx_vvvvl",
+                    "vl.vminswzx.vsvl" => "__builtin_ve_vl_vminswzx_vsvl",
+                    "vl.vminswzx.vsvmvl" => "__builtin_ve_vl_vminswzx_vsvmvl",
+                    "vl.vminswzx.vsvvl" => "__builtin_ve_vl_vminswzx_vsvvl",
+                    "vl.vminswzx.vvvl" => "__builtin_ve_vl_vminswzx_vvvl",
+                    "vl.vminswzx.vvvmvl" => "__builtin_ve_vl_vminswzx_vvvmvl",
+                    "vl.vminswzx.vvvvl" => "__builtin_ve_vl_vminswzx_vvvvl",
+                    "vl.vmrg.vsvml" => "__builtin_ve_vl_vmrg_vsvml",
+                    "vl.vmrg.vsvmvl" => "__builtin_ve_vl_vmrg_vsvmvl",
+                    "vl.vmrg.vvvml" => "__builtin_ve_vl_vmrg_vvvml",
+                    "vl.vmrg.vvvmvl" => "__builtin_ve_vl_vmrg_vvvmvl",
+                    "vl.vmrgw.vsvMl" => "__builtin_ve_vl_vmrgw_vsvMl",
+                    "vl.vmrgw.vsvMvl" => "__builtin_ve_vl_vmrgw_vsvMvl",
+                    "vl.vmrgw.vvvMl" => "__builtin_ve_vl_vmrgw_vvvMl",
+                    "vl.vmrgw.vvvMvl" => "__builtin_ve_vl_vmrgw_vvvMvl",
+                    "vl.vmulsl.vsvl" => "__builtin_ve_vl_vmulsl_vsvl",
+                    "vl.vmulsl.vsvmvl" => "__builtin_ve_vl_vmulsl_vsvmvl",
+                    "vl.vmulsl.vsvvl" => "__builtin_ve_vl_vmulsl_vsvvl",
+                    "vl.vmulsl.vvvl" => "__builtin_ve_vl_vmulsl_vvvl",
+                    "vl.vmulsl.vvvmvl" => "__builtin_ve_vl_vmulsl_vvvmvl",
+                    "vl.vmulsl.vvvvl" => "__builtin_ve_vl_vmulsl_vvvvl",
+                    "vl.vmulslw.vsvl" => "__builtin_ve_vl_vmulslw_vsvl",
+                    "vl.vmulslw.vsvvl" => "__builtin_ve_vl_vmulslw_vsvvl",
+                    "vl.vmulslw.vvvl" => "__builtin_ve_vl_vmulslw_vvvl",
+                    "vl.vmulslw.vvvvl" => "__builtin_ve_vl_vmulslw_vvvvl",
+                    "vl.vmulswsx.vsvl" => "__builtin_ve_vl_vmulswsx_vsvl",
+                    "vl.vmulswsx.vsvmvl" => "__builtin_ve_vl_vmulswsx_vsvmvl",
+                    "vl.vmulswsx.vsvvl" => "__builtin_ve_vl_vmulswsx_vsvvl",
+                    "vl.vmulswsx.vvvl" => "__builtin_ve_vl_vmulswsx_vvvl",
+                    "vl.vmulswsx.vvvmvl" => "__builtin_ve_vl_vmulswsx_vvvmvl",
+                    "vl.vmulswsx.vvvvl" => "__builtin_ve_vl_vmulswsx_vvvvl",
+                    "vl.vmulswzx.vsvl" => "__builtin_ve_vl_vmulswzx_vsvl",
+                    "vl.vmulswzx.vsvmvl" => "__builtin_ve_vl_vmulswzx_vsvmvl",
+                    "vl.vmulswzx.vsvvl" => "__builtin_ve_vl_vmulswzx_vsvvl",
+                    "vl.vmulswzx.vvvl" => "__builtin_ve_vl_vmulswzx_vvvl",
+                    "vl.vmulswzx.vvvmvl" => "__builtin_ve_vl_vmulswzx_vvvmvl",
+                    "vl.vmulswzx.vvvvl" => "__builtin_ve_vl_vmulswzx_vvvvl",
+                    "vl.vmulul.vsvl" => "__builtin_ve_vl_vmulul_vsvl",
+                    "vl.vmulul.vsvmvl" => "__builtin_ve_vl_vmulul_vsvmvl",
+                    "vl.vmulul.vsvvl" => "__builtin_ve_vl_vmulul_vsvvl",
+                    "vl.vmulul.vvvl" => "__builtin_ve_vl_vmulul_vvvl",
+                    "vl.vmulul.vvvmvl" => "__builtin_ve_vl_vmulul_vvvmvl",
+                    "vl.vmulul.vvvvl" => "__builtin_ve_vl_vmulul_vvvvl",
+                    "vl.vmuluw.vsvl" => "__builtin_ve_vl_vmuluw_vsvl",
+                    "vl.vmuluw.vsvmvl" => "__builtin_ve_vl_vmuluw_vsvmvl",
+                    "vl.vmuluw.vsvvl" => "__builtin_ve_vl_vmuluw_vsvvl",
+                    "vl.vmuluw.vvvl" => "__builtin_ve_vl_vmuluw_vvvl",
+                    "vl.vmuluw.vvvmvl" => "__builtin_ve_vl_vmuluw_vvvmvl",
+                    "vl.vmuluw.vvvvl" => "__builtin_ve_vl_vmuluw_vvvvl",
+                    "vl.vmv.vsvl" => "__builtin_ve_vl_vmv_vsvl",
+                    "vl.vmv.vsvmvl" => "__builtin_ve_vl_vmv_vsvmvl",
+                    "vl.vmv.vsvvl" => "__builtin_ve_vl_vmv_vsvvl",
+                    "vl.vor.vsvl" => "__builtin_ve_vl_vor_vsvl",
+                    "vl.vor.vsvmvl" => "__builtin_ve_vl_vor_vsvmvl",
+                    "vl.vor.vsvvl" => "__builtin_ve_vl_vor_vsvvl",
+                    "vl.vor.vvvl" => "__builtin_ve_vl_vor_vvvl",
+                    "vl.vor.vvvmvl" => "__builtin_ve_vl_vor_vvvmvl",
+                    "vl.vor.vvvvl" => "__builtin_ve_vl_vor_vvvvl",
+                    "vl.vpcnt.vvl" => "__builtin_ve_vl_vpcnt_vvl",
+                    "vl.vpcnt.vvmvl" => "__builtin_ve_vl_vpcnt_vvmvl",
+                    "vl.vpcnt.vvvl" => "__builtin_ve_vl_vpcnt_vvvl",
+                    "vl.vrand.vvl" => "__builtin_ve_vl_vrand_vvl",
+                    "vl.vrand.vvml" => "__builtin_ve_vl_vrand_vvml",
+                    "vl.vrcpd.vvl" => "__builtin_ve_vl_vrcpd_vvl",
+                    "vl.vrcpd.vvvl" => "__builtin_ve_vl_vrcpd_vvvl",
+                    "vl.vrcps.vvl" => "__builtin_ve_vl_vrcps_vvl",
+                    "vl.vrcps.vvvl" => "__builtin_ve_vl_vrcps_vvvl",
+                    "vl.vrmaxslfst.vvl" => "__builtin_ve_vl_vrmaxslfst_vvl",
+                    "vl.vrmaxslfst.vvvl" => "__builtin_ve_vl_vrmaxslfst_vvvl",
+                    "vl.vrmaxsllst.vvl" => "__builtin_ve_vl_vrmaxsllst_vvl",
+                    "vl.vrmaxsllst.vvvl" => "__builtin_ve_vl_vrmaxsllst_vvvl",
+                    "vl.vrmaxswfstsx.vvl" => "__builtin_ve_vl_vrmaxswfstsx_vvl",
+                    "vl.vrmaxswfstsx.vvvl" => "__builtin_ve_vl_vrmaxswfstsx_vvvl",
+                    "vl.vrmaxswfstzx.vvl" => "__builtin_ve_vl_vrmaxswfstzx_vvl",
+                    "vl.vrmaxswfstzx.vvvl" => "__builtin_ve_vl_vrmaxswfstzx_vvvl",
+                    "vl.vrmaxswlstsx.vvl" => "__builtin_ve_vl_vrmaxswlstsx_vvl",
+                    "vl.vrmaxswlstsx.vvvl" => "__builtin_ve_vl_vrmaxswlstsx_vvvl",
+                    "vl.vrmaxswlstzx.vvl" => "__builtin_ve_vl_vrmaxswlstzx_vvl",
+                    "vl.vrmaxswlstzx.vvvl" => "__builtin_ve_vl_vrmaxswlstzx_vvvl",
+                    "vl.vrminslfst.vvl" => "__builtin_ve_vl_vrminslfst_vvl",
+                    "vl.vrminslfst.vvvl" => "__builtin_ve_vl_vrminslfst_vvvl",
+                    "vl.vrminsllst.vvl" => "__builtin_ve_vl_vrminsllst_vvl",
+                    "vl.vrminsllst.vvvl" => "__builtin_ve_vl_vrminsllst_vvvl",
+                    "vl.vrminswfstsx.vvl" => "__builtin_ve_vl_vrminswfstsx_vvl",
+                    "vl.vrminswfstsx.vvvl" => "__builtin_ve_vl_vrminswfstsx_vvvl",
+                    "vl.vrminswfstzx.vvl" => "__builtin_ve_vl_vrminswfstzx_vvl",
+                    "vl.vrminswfstzx.vvvl" => "__builtin_ve_vl_vrminswfstzx_vvvl",
+                    "vl.vrminswlstsx.vvl" => "__builtin_ve_vl_vrminswlstsx_vvl",
+                    "vl.vrminswlstsx.vvvl" => "__builtin_ve_vl_vrminswlstsx_vvvl",
+                    "vl.vrminswlstzx.vvl" => "__builtin_ve_vl_vrminswlstzx_vvl",
+                    "vl.vrminswlstzx.vvvl" => "__builtin_ve_vl_vrminswlstzx_vvvl",
+                    "vl.vror.vvl" => "__builtin_ve_vl_vror_vvl",
+                    "vl.vror.vvml" => "__builtin_ve_vl_vror_vvml",
+                    "vl.vrsqrtd.vvl" => "__builtin_ve_vl_vrsqrtd_vvl",
+                    "vl.vrsqrtd.vvvl" => "__builtin_ve_vl_vrsqrtd_vvvl",
+                    "vl.vrsqrtdnex.vvl" => "__builtin_ve_vl_vrsqrtdnex_vvl",
+                    "vl.vrsqrtdnex.vvvl" => "__builtin_ve_vl_vrsqrtdnex_vvvl",
+                    "vl.vrsqrts.vvl" => "__builtin_ve_vl_vrsqrts_vvl",
+                    "vl.vrsqrts.vvvl" => "__builtin_ve_vl_vrsqrts_vvvl",
+                    "vl.vrsqrtsnex.vvl" => "__builtin_ve_vl_vrsqrtsnex_vvl",
+                    "vl.vrsqrtsnex.vvvl" => "__builtin_ve_vl_vrsqrtsnex_vvvl",
+                    "vl.vrxor.vvl" => "__builtin_ve_vl_vrxor_vvl",
+                    "vl.vrxor.vvml" => "__builtin_ve_vl_vrxor_vvml",
+                    "vl.vsc.vvssl" => "__builtin_ve_vl_vsc_vvssl",
+                    "vl.vsc.vvssml" => "__builtin_ve_vl_vsc_vvssml",
+                    "vl.vscl.vvssl" => "__builtin_ve_vl_vscl_vvssl",
+                    "vl.vscl.vvssml" => "__builtin_ve_vl_vscl_vvssml",
+                    "vl.vsclnc.vvssl" => "__builtin_ve_vl_vsclnc_vvssl",
+                    "vl.vsclnc.vvssml" => "__builtin_ve_vl_vsclnc_vvssml",
+                    "vl.vsclncot.vvssl" => "__builtin_ve_vl_vsclncot_vvssl",
+                    "vl.vsclncot.vvssml" => "__builtin_ve_vl_vsclncot_vvssml",
+                    "vl.vsclot.vvssl" => "__builtin_ve_vl_vsclot_vvssl",
+                    "vl.vsclot.vvssml" => "__builtin_ve_vl_vsclot_vvssml",
+                    "vl.vscnc.vvssl" => "__builtin_ve_vl_vscnc_vvssl",
+                    "vl.vscnc.vvssml" => "__builtin_ve_vl_vscnc_vvssml",
+                    "vl.vscncot.vvssl" => "__builtin_ve_vl_vscncot_vvssl",
+                    "vl.vscncot.vvssml" => "__builtin_ve_vl_vscncot_vvssml",
+                    "vl.vscot.vvssl" => "__builtin_ve_vl_vscot_vvssl",
+                    "vl.vscot.vvssml" => "__builtin_ve_vl_vscot_vvssml",
+                    "vl.vscu.vvssl" => "__builtin_ve_vl_vscu_vvssl",
+                    "vl.vscu.vvssml" => "__builtin_ve_vl_vscu_vvssml",
+                    "vl.vscunc.vvssl" => "__builtin_ve_vl_vscunc_vvssl",
+                    "vl.vscunc.vvssml" => "__builtin_ve_vl_vscunc_vvssml",
+                    "vl.vscuncot.vvssl" => "__builtin_ve_vl_vscuncot_vvssl",
+                    "vl.vscuncot.vvssml" => "__builtin_ve_vl_vscuncot_vvssml",
+                    "vl.vscuot.vvssl" => "__builtin_ve_vl_vscuot_vvssl",
+                    "vl.vscuot.vvssml" => "__builtin_ve_vl_vscuot_vvssml",
+                    "vl.vseq.vl" => "__builtin_ve_vl_vseq_vl",
+                    "vl.vseq.vvl" => "__builtin_ve_vl_vseq_vvl",
+                    "vl.vsfa.vvssl" => "__builtin_ve_vl_vsfa_vvssl",
+                    "vl.vsfa.vvssmvl" => "__builtin_ve_vl_vsfa_vvssmvl",
+                    "vl.vsfa.vvssvl" => "__builtin_ve_vl_vsfa_vvssvl",
+                    "vl.vshf.vvvsl" => "__builtin_ve_vl_vshf_vvvsl",
+                    "vl.vshf.vvvsvl" => "__builtin_ve_vl_vshf_vvvsvl",
+                    "vl.vslal.vvsl" => "__builtin_ve_vl_vslal_vvsl",
+                    "vl.vslal.vvsmvl" => "__builtin_ve_vl_vslal_vvsmvl",
+                    "vl.vslal.vvsvl" => "__builtin_ve_vl_vslal_vvsvl",
+                    "vl.vslal.vvvl" => "__builtin_ve_vl_vslal_vvvl",
+                    "vl.vslal.vvvmvl" => "__builtin_ve_vl_vslal_vvvmvl",
+                    "vl.vslal.vvvvl" => "__builtin_ve_vl_vslal_vvvvl",
+                    "vl.vslawsx.vvsl" => "__builtin_ve_vl_vslawsx_vvsl",
+                    "vl.vslawsx.vvsmvl" => "__builtin_ve_vl_vslawsx_vvsmvl",
+                    "vl.vslawsx.vvsvl" => "__builtin_ve_vl_vslawsx_vvsvl",
+                    "vl.vslawsx.vvvl" => "__builtin_ve_vl_vslawsx_vvvl",
+                    "vl.vslawsx.vvvmvl" => "__builtin_ve_vl_vslawsx_vvvmvl",
+                    "vl.vslawsx.vvvvl" => "__builtin_ve_vl_vslawsx_vvvvl",
+                    "vl.vslawzx.vvsl" => "__builtin_ve_vl_vslawzx_vvsl",
+                    "vl.vslawzx.vvsmvl" => "__builtin_ve_vl_vslawzx_vvsmvl",
+                    "vl.vslawzx.vvsvl" => "__builtin_ve_vl_vslawzx_vvsvl",
+                    "vl.vslawzx.vvvl" => "__builtin_ve_vl_vslawzx_vvvl",
+                    "vl.vslawzx.vvvmvl" => "__builtin_ve_vl_vslawzx_vvvmvl",
+                    "vl.vslawzx.vvvvl" => "__builtin_ve_vl_vslawzx_vvvvl",
+                    "vl.vsll.vvsl" => "__builtin_ve_vl_vsll_vvsl",
+                    "vl.vsll.vvsmvl" => "__builtin_ve_vl_vsll_vvsmvl",
+                    "vl.vsll.vvsvl" => "__builtin_ve_vl_vsll_vvsvl",
+                    "vl.vsll.vvvl" => "__builtin_ve_vl_vsll_vvvl",
+                    "vl.vsll.vvvmvl" => "__builtin_ve_vl_vsll_vvvmvl",
+                    "vl.vsll.vvvvl" => "__builtin_ve_vl_vsll_vvvvl",
+                    "vl.vsral.vvsl" => "__builtin_ve_vl_vsral_vvsl",
+                    "vl.vsral.vvsmvl" => "__builtin_ve_vl_vsral_vvsmvl",
+                    "vl.vsral.vvsvl" => "__builtin_ve_vl_vsral_vvsvl",
+                    "vl.vsral.vvvl" => "__builtin_ve_vl_vsral_vvvl",
+                    "vl.vsral.vvvmvl" => "__builtin_ve_vl_vsral_vvvmvl",
+                    "vl.vsral.vvvvl" => "__builtin_ve_vl_vsral_vvvvl",
+                    "vl.vsrawsx.vvsl" => "__builtin_ve_vl_vsrawsx_vvsl",
+                    "vl.vsrawsx.vvsmvl" => "__builtin_ve_vl_vsrawsx_vvsmvl",
+                    "vl.vsrawsx.vvsvl" => "__builtin_ve_vl_vsrawsx_vvsvl",
+                    "vl.vsrawsx.vvvl" => "__builtin_ve_vl_vsrawsx_vvvl",
+                    "vl.vsrawsx.vvvmvl" => "__builtin_ve_vl_vsrawsx_vvvmvl",
+                    "vl.vsrawsx.vvvvl" => "__builtin_ve_vl_vsrawsx_vvvvl",
+                    "vl.vsrawzx.vvsl" => "__builtin_ve_vl_vsrawzx_vvsl",
+                    "vl.vsrawzx.vvsmvl" => "__builtin_ve_vl_vsrawzx_vvsmvl",
+                    "vl.vsrawzx.vvsvl" => "__builtin_ve_vl_vsrawzx_vvsvl",
+                    "vl.vsrawzx.vvvl" => "__builtin_ve_vl_vsrawzx_vvvl",
+                    "vl.vsrawzx.vvvmvl" => "__builtin_ve_vl_vsrawzx_vvvmvl",
+                    "vl.vsrawzx.vvvvl" => "__builtin_ve_vl_vsrawzx_vvvvl",
+                    "vl.vsrl.vvsl" => "__builtin_ve_vl_vsrl_vvsl",
+                    "vl.vsrl.vvsmvl" => "__builtin_ve_vl_vsrl_vvsmvl",
+                    "vl.vsrl.vvsvl" => "__builtin_ve_vl_vsrl_vvsvl",
+                    "vl.vsrl.vvvl" => "__builtin_ve_vl_vsrl_vvvl",
+                    "vl.vsrl.vvvmvl" => "__builtin_ve_vl_vsrl_vvvmvl",
+                    "vl.vsrl.vvvvl" => "__builtin_ve_vl_vsrl_vvvvl",
+                    "vl.vst.vssl" => "__builtin_ve_vl_vst_vssl",
+                    "vl.vst.vssml" => "__builtin_ve_vl_vst_vssml",
+                    "vl.vst2d.vssl" => "__builtin_ve_vl_vst2d_vssl",
+                    "vl.vst2d.vssml" => "__builtin_ve_vl_vst2d_vssml",
+                    "vl.vst2dnc.vssl" => "__builtin_ve_vl_vst2dnc_vssl",
+                    "vl.vst2dnc.vssml" => "__builtin_ve_vl_vst2dnc_vssml",
+                    "vl.vst2dncot.vssl" => "__builtin_ve_vl_vst2dncot_vssl",
+                    "vl.vst2dncot.vssml" => "__builtin_ve_vl_vst2dncot_vssml",
+                    "vl.vst2dot.vssl" => "__builtin_ve_vl_vst2dot_vssl",
+                    "vl.vst2dot.vssml" => "__builtin_ve_vl_vst2dot_vssml",
+                    "vl.vstl.vssl" => "__builtin_ve_vl_vstl_vssl",
+                    "vl.vstl.vssml" => "__builtin_ve_vl_vstl_vssml",
+                    "vl.vstl2d.vssl" => "__builtin_ve_vl_vstl2d_vssl",
+                    "vl.vstl2d.vssml" => "__builtin_ve_vl_vstl2d_vssml",
+                    "vl.vstl2dnc.vssl" => "__builtin_ve_vl_vstl2dnc_vssl",
+                    "vl.vstl2dnc.vssml" => "__builtin_ve_vl_vstl2dnc_vssml",
+                    "vl.vstl2dncot.vssl" => "__builtin_ve_vl_vstl2dncot_vssl",
+                    "vl.vstl2dncot.vssml" => "__builtin_ve_vl_vstl2dncot_vssml",
+                    "vl.vstl2dot.vssl" => "__builtin_ve_vl_vstl2dot_vssl",
+                    "vl.vstl2dot.vssml" => "__builtin_ve_vl_vstl2dot_vssml",
+                    "vl.vstlnc.vssl" => "__builtin_ve_vl_vstlnc_vssl",
+                    "vl.vstlnc.vssml" => "__builtin_ve_vl_vstlnc_vssml",
+                    "vl.vstlncot.vssl" => "__builtin_ve_vl_vstlncot_vssl",
+                    "vl.vstlncot.vssml" => "__builtin_ve_vl_vstlncot_vssml",
+                    "vl.vstlot.vssl" => "__builtin_ve_vl_vstlot_vssl",
+                    "vl.vstlot.vssml" => "__builtin_ve_vl_vstlot_vssml",
+                    "vl.vstnc.vssl" => "__builtin_ve_vl_vstnc_vssl",
+                    "vl.vstnc.vssml" => "__builtin_ve_vl_vstnc_vssml",
+                    "vl.vstncot.vssl" => "__builtin_ve_vl_vstncot_vssl",
+                    "vl.vstncot.vssml" => "__builtin_ve_vl_vstncot_vssml",
+                    "vl.vstot.vssl" => "__builtin_ve_vl_vstot_vssl",
+                    "vl.vstot.vssml" => "__builtin_ve_vl_vstot_vssml",
+                    "vl.vstu.vssl" => "__builtin_ve_vl_vstu_vssl",
+                    "vl.vstu.vssml" => "__builtin_ve_vl_vstu_vssml",
+                    "vl.vstu2d.vssl" => "__builtin_ve_vl_vstu2d_vssl",
+                    "vl.vstu2d.vssml" => "__builtin_ve_vl_vstu2d_vssml",
+                    "vl.vstu2dnc.vssl" => "__builtin_ve_vl_vstu2dnc_vssl",
+                    "vl.vstu2dnc.vssml" => "__builtin_ve_vl_vstu2dnc_vssml",
+                    "vl.vstu2dncot.vssl" => "__builtin_ve_vl_vstu2dncot_vssl",
+                    "vl.vstu2dncot.vssml" => "__builtin_ve_vl_vstu2dncot_vssml",
+                    "vl.vstu2dot.vssl" => "__builtin_ve_vl_vstu2dot_vssl",
+                    "vl.vstu2dot.vssml" => "__builtin_ve_vl_vstu2dot_vssml",
+                    "vl.vstunc.vssl" => "__builtin_ve_vl_vstunc_vssl",
+                    "vl.vstunc.vssml" => "__builtin_ve_vl_vstunc_vssml",
+                    "vl.vstuncot.vssl" => "__builtin_ve_vl_vstuncot_vssl",
+                    "vl.vstuncot.vssml" => "__builtin_ve_vl_vstuncot_vssml",
+                    "vl.vstuot.vssl" => "__builtin_ve_vl_vstuot_vssl",
+                    "vl.vstuot.vssml" => "__builtin_ve_vl_vstuot_vssml",
+                    "vl.vsubsl.vsvl" => "__builtin_ve_vl_vsubsl_vsvl",
+                    "vl.vsubsl.vsvmvl" => "__builtin_ve_vl_vsubsl_vsvmvl",
+                    "vl.vsubsl.vsvvl" => "__builtin_ve_vl_vsubsl_vsvvl",
+                    "vl.vsubsl.vvvl" => "__builtin_ve_vl_vsubsl_vvvl",
+                    "vl.vsubsl.vvvmvl" => "__builtin_ve_vl_vsubsl_vvvmvl",
+                    "vl.vsubsl.vvvvl" => "__builtin_ve_vl_vsubsl_vvvvl",
+                    "vl.vsubswsx.vsvl" => "__builtin_ve_vl_vsubswsx_vsvl",
+                    "vl.vsubswsx.vsvmvl" => "__builtin_ve_vl_vsubswsx_vsvmvl",
+                    "vl.vsubswsx.vsvvl" => "__builtin_ve_vl_vsubswsx_vsvvl",
+                    "vl.vsubswsx.vvvl" => "__builtin_ve_vl_vsubswsx_vvvl",
+                    "vl.vsubswsx.vvvmvl" => "__builtin_ve_vl_vsubswsx_vvvmvl",
+                    "vl.vsubswsx.vvvvl" => "__builtin_ve_vl_vsubswsx_vvvvl",
+                    "vl.vsubswzx.vsvl" => "__builtin_ve_vl_vsubswzx_vsvl",
+                    "vl.vsubswzx.vsvmvl" => "__builtin_ve_vl_vsubswzx_vsvmvl",
+                    "vl.vsubswzx.vsvvl" => "__builtin_ve_vl_vsubswzx_vsvvl",
+                    "vl.vsubswzx.vvvl" => "__builtin_ve_vl_vsubswzx_vvvl",
+                    "vl.vsubswzx.vvvmvl" => "__builtin_ve_vl_vsubswzx_vvvmvl",
+                    "vl.vsubswzx.vvvvl" => "__builtin_ve_vl_vsubswzx_vvvvl",
+                    "vl.vsubul.vsvl" => "__builtin_ve_vl_vsubul_vsvl",
+                    "vl.vsubul.vsvmvl" => "__builtin_ve_vl_vsubul_vsvmvl",
+                    "vl.vsubul.vsvvl" => "__builtin_ve_vl_vsubul_vsvvl",
+                    "vl.vsubul.vvvl" => "__builtin_ve_vl_vsubul_vvvl",
+                    "vl.vsubul.vvvmvl" => "__builtin_ve_vl_vsubul_vvvmvl",
+                    "vl.vsubul.vvvvl" => "__builtin_ve_vl_vsubul_vvvvl",
+                    "vl.vsubuw.vsvl" => "__builtin_ve_vl_vsubuw_vsvl",
+                    "vl.vsubuw.vsvmvl" => "__builtin_ve_vl_vsubuw_vsvmvl",
+                    "vl.vsubuw.vsvvl" => "__builtin_ve_vl_vsubuw_vsvvl",
+                    "vl.vsubuw.vvvl" => "__builtin_ve_vl_vsubuw_vvvl",
+                    "vl.vsubuw.vvvmvl" => "__builtin_ve_vl_vsubuw_vvvmvl",
+                    "vl.vsubuw.vvvvl" => "__builtin_ve_vl_vsubuw_vvvvl",
+                    "vl.vsuml.vvl" => "__builtin_ve_vl_vsuml_vvl",
+                    "vl.vsuml.vvml" => "__builtin_ve_vl_vsuml_vvml",
+                    "vl.vsumwsx.vvl" => "__builtin_ve_vl_vsumwsx_vvl",
+                    "vl.vsumwsx.vvml" => "__builtin_ve_vl_vsumwsx_vvml",
+                    "vl.vsumwzx.vvl" => "__builtin_ve_vl_vsumwzx_vvl",
+                    "vl.vsumwzx.vvml" => "__builtin_ve_vl_vsumwzx_vvml",
+                    "vl.vxor.vsvl" => "__builtin_ve_vl_vxor_vsvl",
+                    "vl.vxor.vsvmvl" => "__builtin_ve_vl_vxor_vsvmvl",
+                    "vl.vxor.vsvvl" => "__builtin_ve_vl_vxor_vsvvl",
+                    "vl.vxor.vvvl" => "__builtin_ve_vl_vxor_vvvl",
+                    "vl.vxor.vvvmvl" => "__builtin_ve_vl_vxor_vvvmvl",
+                    "vl.vxor.vvvvl" => "__builtin_ve_vl_vxor_vvvvl",
+                    "vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
+                    "vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            ve(name)
+        }
+        "x86" => {
+            #[allow(non_snake_case)]
+            fn x86(name: &str) -> &str {
+                match name {
+                    // x86
+                    "aadd32" => "__builtin_ia32_aadd32",
+                    "aadd64" => "__builtin_ia32_aadd64",
+                    "aand32" => "__builtin_ia32_aand32",
+                    "aand64" => "__builtin_ia32_aand64",
+                    "addcarry.u32" => "__builtin_ia32_addcarry_u32",
+                    "addcarry.u64" => "__builtin_ia32_addcarry_u64",
+                    "addcarryx.u32" => "__builtin_ia32_addcarryx_u32",
+                    "addcarryx.u64" => "__builtin_ia32_addcarryx_u64",
+                    "aesni.aesdec" => "__builtin_ia32_aesdec128",
+                    "aesni.aesdec.256" => "__builtin_ia32_aesdec256",
+                    "aesni.aesdec.512" => "__builtin_ia32_aesdec512",
+                    "aesni.aesdeclast" => "__builtin_ia32_aesdeclast128",
+                    "aesni.aesdeclast.256" => "__builtin_ia32_aesdeclast256",
+                    "aesni.aesdeclast.512" => "__builtin_ia32_aesdeclast512",
+                    "aesni.aesenc" => "__builtin_ia32_aesenc128",
+                    "aesni.aesenc.256" => "__builtin_ia32_aesenc256",
+                    "aesni.aesenc.512" => "__builtin_ia32_aesenc512",
+                    "aesni.aesenclast" => "__builtin_ia32_aesenclast128",
+                    "aesni.aesenclast.256" => "__builtin_ia32_aesenclast256",
+                    "aesni.aesenclast.512" => "__builtin_ia32_aesenclast512",
+                    "aesni.aesimc" => "__builtin_ia32_aesimc128",
+                    "aesni.aeskeygenassist" => "__builtin_ia32_aeskeygenassist128",
+                    "aor32" => "__builtin_ia32_aor32",
+                    "aor64" => "__builtin_ia32_aor64",
+                    "avx.addsub.pd.256" => "__builtin_ia32_addsubpd256",
+                    "avx.addsub.ps.256" => "__builtin_ia32_addsubps256",
+                    "avx.blend.pd.256" => "__builtin_ia32_blendpd256",
+                    "avx.blend.ps.256" => "__builtin_ia32_blendps256",
+                    "avx.blendv.pd.256" => "__builtin_ia32_blendvpd256",
+                    "avx.blendv.ps.256" => "__builtin_ia32_blendvps256",
+                    "avx.cmp.pd.256" => "__builtin_ia32_cmppd256",
+                    "avx.cmp.ps.256" => "__builtin_ia32_cmpps256",
+                    "avx.cvt.pd2.ps.256" => "__builtin_ia32_cvtpd2ps256",
+                    "avx.cvt.pd2dq.256" => "__builtin_ia32_cvtpd2dq256",
+                    "avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256",
+                    "avx.cvt.ps2dq.256" => "__builtin_ia32_cvtps2dq256",
+                    "avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256",
+                    "avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256",
+                    "avx.cvtt.pd2dq.256" => "__builtin_ia32_cvttpd2dq256",
+                    "avx.cvtt.ps2dq.256" => "__builtin_ia32_cvttps2dq256",
+                    "avx.dp.ps.256" => "__builtin_ia32_dpps256",
+                    "avx.hadd.pd.256" => "__builtin_ia32_haddpd256",
+                    "avx.hadd.ps.256" => "__builtin_ia32_haddps256",
+                    "avx.hsub.pd.256" => "__builtin_ia32_hsubpd256",
+                    "avx.hsub.ps.256" => "__builtin_ia32_hsubps256",
+                    "avx.ldu.dq.256" => "__builtin_ia32_lddqu256",
+                    "avx.maskload.pd" => "__builtin_ia32_maskloadpd",
+                    "avx.maskload.pd.256" => "__builtin_ia32_maskloadpd256",
+                    "avx.maskload.ps" => "__builtin_ia32_maskloadps",
+                    "avx.maskload.ps.256" => "__builtin_ia32_maskloadps256",
+                    "avx.maskstore.pd" => "__builtin_ia32_maskstorepd",
+                    "avx.maskstore.pd.256" => "__builtin_ia32_maskstorepd256",
+                    "avx.maskstore.ps" => "__builtin_ia32_maskstoreps",
+                    "avx.maskstore.ps.256" => "__builtin_ia32_maskstoreps256",
+                    "avx.max.pd.256" => "__builtin_ia32_maxpd256",
+                    "avx.max.ps.256" => "__builtin_ia32_maxps256",
+                    "avx.min.pd.256" => "__builtin_ia32_minpd256",
+                    "avx.min.ps.256" => "__builtin_ia32_minps256",
+                    "avx.movmsk.pd.256" => "__builtin_ia32_movmskpd256",
+                    "avx.movmsk.ps.256" => "__builtin_ia32_movmskps256",
+                    "avx.ptestc.256" => "__builtin_ia32_ptestc256",
+                    "avx.ptestnzc.256" => "__builtin_ia32_ptestnzc256",
+                    "avx.ptestz.256" => "__builtin_ia32_ptestz256",
+                    "avx.rcp.ps.256" => "__builtin_ia32_rcpps256",
+                    "avx.round.pd.256" => "__builtin_ia32_roundpd256",
+                    "avx.round.ps.256" => "__builtin_ia32_roundps256",
+                    "avx.rsqrt.ps.256" => "__builtin_ia32_rsqrtps256",
+                    "avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256",
+                    "avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256",
+                    "avx.storeu.dq.256" => "__builtin_ia32_storedqu256",
+                    "avx.storeu.pd.256" => "__builtin_ia32_storeupd256",
+                    "avx.storeu.ps.256" => "__builtin_ia32_storeups256",
+                    "avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256",
+                    "avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256",
+                    "avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256",
+                    "avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256",
+                    "avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256",
+                    "avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256",
+                    "avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256",
+                    "avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256",
+                    "avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256",
+                    "avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256",
+                    "avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256",
+                    "avx.vpermilvar.pd" => "__builtin_ia32_vpermilvarpd",
+                    "avx.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256",
+                    "avx.vpermilvar.ps" => "__builtin_ia32_vpermilvarps",
+                    "avx.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256",
+                    "avx.vtestc.pd" => "__builtin_ia32_vtestcpd",
+                    "avx.vtestc.pd.256" => "__builtin_ia32_vtestcpd256",
+                    "avx.vtestc.ps" => "__builtin_ia32_vtestcps",
+                    "avx.vtestc.ps.256" => "__builtin_ia32_vtestcps256",
+                    "avx.vtestnzc.pd" => "__builtin_ia32_vtestnzcpd",
+                    "avx.vtestnzc.pd.256" => "__builtin_ia32_vtestnzcpd256",
+                    "avx.vtestnzc.ps" => "__builtin_ia32_vtestnzcps",
+                    "avx.vtestnzc.ps.256" => "__builtin_ia32_vtestnzcps256",
+                    "avx.vtestz.pd" => "__builtin_ia32_vtestzpd",
+                    "avx.vtestz.pd.256" => "__builtin_ia32_vtestzpd256",
+                    "avx.vtestz.ps" => "__builtin_ia32_vtestzps",
+                    "avx.vtestz.ps.256" => "__builtin_ia32_vtestzps256",
+                    "avx.vzeroall" => "__builtin_ia32_vzeroall",
+                    "avx.vzeroupper" => "__builtin_ia32_vzeroupper",
+                    "avx10.mask.getexp.bf16.128" => "__builtin_ia32_vgetexpbf16128_mask",
+                    "avx10.mask.getexp.bf16.256" => "__builtin_ia32_vgetexpbf16256_mask",
+                    "avx10.mask.getexp.bf16.512" => "__builtin_ia32_vgetexpbf16512_mask",
+                    "avx10.mask.getmant.bf16.128" => "__builtin_ia32_vgetmantbf16128_mask",
+                    "avx10.mask.getmant.bf16.256" => "__builtin_ia32_vgetmantbf16256_mask",
+                    "avx10.mask.getmant.bf16.512" => "__builtin_ia32_vgetmantbf16512_mask",
+                    "avx10.mask.rcp.bf16.128" => "__builtin_ia32_vrcpbf16128_mask",
+                    "avx10.mask.rcp.bf16.256" => "__builtin_ia32_vrcpbf16256_mask",
+                    "avx10.mask.rcp.bf16.512" => "__builtin_ia32_vrcpbf16512_mask",
+                    "avx10.mask.reduce.bf16.128" => "__builtin_ia32_vreducebf16128_mask",
+                    "avx10.mask.reduce.bf16.256" => "__builtin_ia32_vreducebf16256_mask",
+                    "avx10.mask.reduce.bf16.512" => "__builtin_ia32_vreducebf16512_mask",
+                    "avx10.mask.rndscale.bf16.128" => "__builtin_ia32_vrndscalebf16_128_mask",
+                    "avx10.mask.rndscale.bf16.256" => "__builtin_ia32_vrndscalebf16_256_mask",
+                    "avx10.mask.rndscale.bf16.512" => "__builtin_ia32_vrndscalebf16_mask",
+                    "avx10.mask.rsqrt.bf16.128" => "__builtin_ia32_vrsqrtbf16128_mask",
+                    "avx10.mask.rsqrt.bf16.256" => "__builtin_ia32_vrsqrtbf16256_mask",
+                    "avx10.mask.rsqrt.bf16.512" => "__builtin_ia32_vrsqrtbf16512_mask",
+                    "avx10.mask.scalef.bf16.128" => "__builtin_ia32_vscalefbf16128_mask",
+                    "avx10.mask.scalef.bf16.256" => "__builtin_ia32_vscalefbf16256_mask",
+                    "avx10.mask.scalef.bf16.512" => "__builtin_ia32_vscalefbf16512_mask",
+                    "avx10.mask.vcvt2ps2phx.128" => "__builtin_ia32_vcvt2ps2phx128_mask",
+                    "avx10.mask.vcvt2ps2phx.256" => "__builtin_ia32_vcvt2ps2phx256_mask",
+                    "avx10.mask.vcvt2ps2phx.512" => "__builtin_ia32_vcvt2ps2phx512_mask",
+                    "avx10.mask.vcvtbiasph2bf8128" => "__builtin_ia32_vcvtbiasph2bf8_128_mask",
+                    "avx10.mask.vcvtbiasph2bf8256" => "__builtin_ia32_vcvtbiasph2bf8_256_mask",
+                    "avx10.mask.vcvtbiasph2bf8512" => "__builtin_ia32_vcvtbiasph2bf8_512_mask",
+                    "avx10.mask.vcvtbiasph2bf8s128" => "__builtin_ia32_vcvtbiasph2bf8s_128_mask",
+                    "avx10.mask.vcvtbiasph2bf8s256" => "__builtin_ia32_vcvtbiasph2bf8s_256_mask",
+                    "avx10.mask.vcvtbiasph2bf8s512" => "__builtin_ia32_vcvtbiasph2bf8s_512_mask",
+                    "avx10.mask.vcvtbiasph2hf8128" => "__builtin_ia32_vcvtbiasph2hf8_128_mask",
+                    "avx10.mask.vcvtbiasph2hf8256" => "__builtin_ia32_vcvtbiasph2hf8_256_mask",
+                    "avx10.mask.vcvtbiasph2hf8512" => "__builtin_ia32_vcvtbiasph2hf8_512_mask",
+                    "avx10.mask.vcvtbiasph2hf8s128" => "__builtin_ia32_vcvtbiasph2hf8s_128_mask",
+                    "avx10.mask.vcvtbiasph2hf8s256" => "__builtin_ia32_vcvtbiasph2hf8s_256_mask",
+                    "avx10.mask.vcvtbiasph2hf8s512" => "__builtin_ia32_vcvtbiasph2hf8s_512_mask",
+                    "avx10.mask.vcvthf82ph128" => "__builtin_ia32_vcvthf8_2ph128_mask",
+                    "avx10.mask.vcvthf82ph256" => "__builtin_ia32_vcvthf8_2ph256_mask",
+                    "avx10.mask.vcvthf82ph512" => "__builtin_ia32_vcvthf8_2ph512_mask",
+                    "avx10.mask.vcvtph2bf8128" => "__builtin_ia32_vcvtph2bf8_128_mask",
+                    "avx10.mask.vcvtph2bf8256" => "__builtin_ia32_vcvtph2bf8_256_mask",
+                    "avx10.mask.vcvtph2bf8512" => "__builtin_ia32_vcvtph2bf8_512_mask",
+                    "avx10.mask.vcvtph2bf8s128" => "__builtin_ia32_vcvtph2bf8s_128_mask",
+                    "avx10.mask.vcvtph2bf8s256" => "__builtin_ia32_vcvtph2bf8s_256_mask",
+                    "avx10.mask.vcvtph2bf8s512" => "__builtin_ia32_vcvtph2bf8s_512_mask",
+                    "avx10.mask.vcvtph2hf8128" => "__builtin_ia32_vcvtph2hf8_128_mask",
+                    "avx10.mask.vcvtph2hf8256" => "__builtin_ia32_vcvtph2hf8_256_mask",
+                    "avx10.mask.vcvtph2hf8512" => "__builtin_ia32_vcvtph2hf8_512_mask",
+                    "avx10.mask.vcvtph2hf8s128" => "__builtin_ia32_vcvtph2hf8s_128_mask",
+                    "avx10.mask.vcvtph2hf8s256" => "__builtin_ia32_vcvtph2hf8s_256_mask",
+                    "avx10.mask.vcvtph2hf8s512" => "__builtin_ia32_vcvtph2hf8s_512_mask",
+                    "avx10.mask.vcvtph2ibs128" => "__builtin_ia32_vcvtph2ibs128_mask",
+                    "avx10.mask.vcvtph2ibs256" => "__builtin_ia32_vcvtph2ibs256_mask",
+                    "avx10.mask.vcvtph2ibs512" => "__builtin_ia32_vcvtph2ibs512_mask",
+                    "avx10.mask.vcvtph2iubs128" => "__builtin_ia32_vcvtph2iubs128_mask",
+                    "avx10.mask.vcvtph2iubs256" => "__builtin_ia32_vcvtph2iubs256_mask",
+                    "avx10.mask.vcvtph2iubs512" => "__builtin_ia32_vcvtph2iubs512_mask",
+                    "avx10.mask.vcvtps2ibs128" => "__builtin_ia32_vcvtps2ibs128_mask",
+                    "avx10.mask.vcvtps2ibs256" => "__builtin_ia32_vcvtps2ibs256_mask",
+                    "avx10.mask.vcvtps2ibs512" => "__builtin_ia32_vcvtps2ibs512_mask",
+                    "avx10.mask.vcvtps2iubs128" => "__builtin_ia32_vcvtps2iubs128_mask",
+                    "avx10.mask.vcvtps2iubs256" => "__builtin_ia32_vcvtps2iubs256_mask",
+                    "avx10.mask.vcvtps2iubs512" => "__builtin_ia32_vcvtps2iubs512_mask",
+                    "avx10.mask.vcvttpd2dqs.128" => "__builtin_ia32_vcvttpd2dqs128_mask",
+                    "avx10.mask.vcvttpd2dqs.256" => "__builtin_ia32_vcvttpd2dqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2dqs.round.512" => "__builtin_ia32_vcvttpd2dqs512_round_mask",
+                    "avx10.mask.vcvttpd2qqs.128" => "__builtin_ia32_vcvttpd2qqs128_mask",
+                    "avx10.mask.vcvttpd2qqs.256" => "__builtin_ia32_vcvttpd2qqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2qqs.round.512" => "__builtin_ia32_vcvttpd2qqs512_round_mask",
+                    "avx10.mask.vcvttpd2udqs.128" => "__builtin_ia32_vcvttpd2udqs128_mask",
+                    "avx10.mask.vcvttpd2udqs.256" => "__builtin_ia32_vcvttpd2udqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2udqs.round.512" => "__builtin_ia32_vcvttpd2udqs512_round_mask",
+                    "avx10.mask.vcvttpd2uqqs.128" => "__builtin_ia32_vcvttpd2uqqs128_mask",
+                    "avx10.mask.vcvttpd2uqqs.256" => "__builtin_ia32_vcvttpd2uqqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttpd2uqqs.round.512" => "__builtin_ia32_vcvttpd2uqqs512_round_mask",
+                    "avx10.mask.vcvttph2ibs128" => "__builtin_ia32_vcvttph2ibs128_mask",
+                    "avx10.mask.vcvttph2ibs256" => "__builtin_ia32_vcvttph2ibs256_mask",
+                    "avx10.mask.vcvttph2ibs512" => "__builtin_ia32_vcvttph2ibs512_mask",
+                    "avx10.mask.vcvttph2iubs128" => "__builtin_ia32_vcvttph2iubs128_mask",
+                    "avx10.mask.vcvttph2iubs256" => "__builtin_ia32_vcvttph2iubs256_mask",
+                    "avx10.mask.vcvttph2iubs512" => "__builtin_ia32_vcvttph2iubs512_mask",
+                    "avx10.mask.vcvttps2dqs.128" => "__builtin_ia32_vcvttps2dqs128_mask",
+                    "avx10.mask.vcvttps2dqs.256" => "__builtin_ia32_vcvttps2dqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2dqs.round.512" => "__builtin_ia32_vcvttps2dqs512_round_mask",
+                    "avx10.mask.vcvttps2ibs128" => "__builtin_ia32_vcvttps2ibs128_mask",
+                    "avx10.mask.vcvttps2ibs256" => "__builtin_ia32_vcvttps2ibs256_mask",
+                    "avx10.mask.vcvttps2ibs512" => "__builtin_ia32_vcvttps2ibs512_mask",
+                    "avx10.mask.vcvttps2iubs128" => "__builtin_ia32_vcvttps2iubs128_mask",
+                    "avx10.mask.vcvttps2iubs256" => "__builtin_ia32_vcvttps2iubs256_mask",
+                    "avx10.mask.vcvttps2iubs512" => "__builtin_ia32_vcvttps2iubs512_mask",
+                    "avx10.mask.vcvttps2qqs.128" => "__builtin_ia32_vcvttps2qqs128_mask",
+                    "avx10.mask.vcvttps2qqs.256" => "__builtin_ia32_vcvttps2qqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2qqs.round.512" => "__builtin_ia32_vcvttps2qqs512_round_mask",
+                    "avx10.mask.vcvttps2udqs.128" => "__builtin_ia32_vcvttps2udqs128_mask",
+                    "avx10.mask.vcvttps2udqs.256" => "__builtin_ia32_vcvttps2udqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2udqs.round.512" => "__builtin_ia32_vcvttps2udqs512_round_mask",
+                    "avx10.mask.vcvttps2uqqs.128" => "__builtin_ia32_vcvttps2uqqs128_mask",
+                    "avx10.mask.vcvttps2uqqs.256" => "__builtin_ia32_vcvttps2uqqs256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vcvttps2uqqs.round.512" => "__builtin_ia32_vcvttps2uqqs512_round_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxpd.round" => "__builtin_ia32_vminmaxpd512_round_mask",
+                    "avx10.mask.vminmaxpd128" => "__builtin_ia32_vminmaxpd128_mask",
+                    "avx10.mask.vminmaxpd256" => "__builtin_ia32_vminmaxpd256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxph.round" => "__builtin_ia32_vminmaxph512_round_mask",
+                    "avx10.mask.vminmaxph128" => "__builtin_ia32_vminmaxph128_mask",
+                    "avx10.mask.vminmaxph256" => "__builtin_ia32_vminmaxph256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxps.round" => "__builtin_ia32_vminmaxps512_round_mask",
+                    "avx10.mask.vminmaxps128" => "__builtin_ia32_vminmaxps128_mask",
+                    "avx10.mask.vminmaxps256" => "__builtin_ia32_vminmaxps256_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxsd.round" => "__builtin_ia32_vminmaxsd_round_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxsh.round" => "__builtin_ia32_vminmaxsh_round_mask",
+                    // [INVALID CONVERSION]: "avx10.mask.vminmaxss.round" => "__builtin_ia32_vminmaxss_round_mask",
+                    "avx10.vaddbf16128" => "__builtin_ia32_vaddbf16128",
+                    "avx10.vaddbf16256" => "__builtin_ia32_vaddbf16256",
+                    "avx10.vaddbf16512" => "__builtin_ia32_vaddbf16512",
+                    "avx10.vaddpd256" => "__builtin_ia32_vaddpd256_round",
+                    "avx10.vaddph256" => "__builtin_ia32_vaddph256_round",
+                    "avx10.vaddps256" => "__builtin_ia32_vaddps256_round",
+                    "avx10.vcomisbf16eq" => "__builtin_ia32_vcomisbf16eq",
+                    "avx10.vcomisbf16ge" => "__builtin_ia32_vcomisbf16ge",
+                    "avx10.vcomisbf16gt" => "__builtin_ia32_vcomisbf16gt",
+                    "avx10.vcomisbf16le" => "__builtin_ia32_vcomisbf16le",
+                    "avx10.vcomisbf16lt" => "__builtin_ia32_vcomisbf16lt",
+                    "avx10.vcomisbf16neq" => "__builtin_ia32_vcomisbf16neq",
+                    "avx10.vcvt2ph2bf8128" => "__builtin_ia32_vcvt2ph2bf8_128",
+                    "avx10.vcvt2ph2bf8256" => "__builtin_ia32_vcvt2ph2bf8_256",
+                    "avx10.vcvt2ph2bf8512" => "__builtin_ia32_vcvt2ph2bf8_512",
+                    "avx10.vcvt2ph2bf8s128" => "__builtin_ia32_vcvt2ph2bf8s_128",
+                    "avx10.vcvt2ph2bf8s256" => "__builtin_ia32_vcvt2ph2bf8s_256",
+                    "avx10.vcvt2ph2bf8s512" => "__builtin_ia32_vcvt2ph2bf8s_512",
+                    "avx10.vcvt2ph2hf8128" => "__builtin_ia32_vcvt2ph2hf8_128",
+                    "avx10.vcvt2ph2hf8256" => "__builtin_ia32_vcvt2ph2hf8_256",
+                    "avx10.vcvt2ph2hf8512" => "__builtin_ia32_vcvt2ph2hf8_512",
+                    "avx10.vcvt2ph2hf8s128" => "__builtin_ia32_vcvt2ph2hf8s_128",
+                    "avx10.vcvt2ph2hf8s256" => "__builtin_ia32_vcvt2ph2hf8s_256",
+                    "avx10.vcvt2ph2hf8s512" => "__builtin_ia32_vcvt2ph2hf8s_512",
+                    "avx10.vcvtbf162ibs128" => "__builtin_ia32_vcvtbf162ibs128",
+                    "avx10.vcvtbf162ibs256" => "__builtin_ia32_vcvtbf162ibs256",
+                    "avx10.vcvtbf162ibs512" => "__builtin_ia32_vcvtbf162ibs512",
+                    "avx10.vcvtbf162iubs128" => "__builtin_ia32_vcvtbf162iubs128",
+                    "avx10.vcvtbf162iubs256" => "__builtin_ia32_vcvtbf162iubs256",
+                    "avx10.vcvtbf162iubs512" => "__builtin_ia32_vcvtbf162iubs512",
+                    "avx10.vcvttbf162ibs128" => "__builtin_ia32_vcvttbf162ibs128",
+                    "avx10.vcvttbf162ibs256" => "__builtin_ia32_vcvttbf162ibs256",
+                    "avx10.vcvttbf162ibs512" => "__builtin_ia32_vcvttbf162ibs512",
+                    "avx10.vcvttbf162iubs128" => "__builtin_ia32_vcvttbf162iubs128",
+                    "avx10.vcvttbf162iubs256" => "__builtin_ia32_vcvttbf162iubs256",
+                    "avx10.vcvttbf162iubs512" => "__builtin_ia32_vcvttbf162iubs512",
+                    "avx10.vcvttsd2sis" => "__builtin_ia32_vcvttsd2sis32",
+                    "avx10.vcvttsd2sis64" => "__builtin_ia32_vcvttsd2sis64",
+                    "avx10.vcvttsd2usis" => "__builtin_ia32_vcvttsd2usis32",
+                    "avx10.vcvttsd2usis64" => "__builtin_ia32_vcvttsd2usis64",
+                    "avx10.vcvttss2sis" => "__builtin_ia32_vcvttss2sis32",
+                    "avx10.vcvttss2sis64" => "__builtin_ia32_vcvttss2sis64",
+                    "avx10.vcvttss2usis" => "__builtin_ia32_vcvttss2usis32",
+                    "avx10.vcvttss2usis64" => "__builtin_ia32_vcvttss2usis64",
+                    "avx10.vdivbf16128" => "__builtin_ia32_vdivbf16128",
+                    "avx10.vdivbf16256" => "__builtin_ia32_vdivbf16256",
+                    "avx10.vdivbf16512" => "__builtin_ia32_vdivbf16512",
+                    "avx10.vdpphps.128" => "__builtin_ia32_vdpphps128",
+                    "avx10.vdpphps.256" => "__builtin_ia32_vdpphps256",
+                    "avx10.vdpphps.512" => "__builtin_ia32_vdpphps512",
+                    "avx10.vfmadd132bf16128" => "__builtin_ia32_vfmadd132bf16128",
+                    "avx10.vfmadd132bf16256" => "__builtin_ia32_vfmadd132bf16256",
+                    "avx10.vfmadd132bf16512" => "__builtin_ia32_vfmadd132bf16512",
+                    "avx10.vfmadd213bf16128" => "__builtin_ia32_vfmadd213bf16128",
+                    "avx10.vfmadd213bf16256" => "__builtin_ia32_vfmadd213bf16256",
+                    "avx10.vfmadd231bf16128" => "__builtin_ia32_vfmadd231bf16128",
+                    "avx10.vfmadd231bf16256" => "__builtin_ia32_vfmadd231bf16256",
+                    "avx10.vfmadd231bf16512" => "__builtin_ia32_vfmadd231bf16512",
+                    "avx10.vfmsub132bf16128" => "__builtin_ia32_vfmsub132bf16128",
+                    "avx10.vfmsub132bf16256" => "__builtin_ia32_vfmsub132bf16256",
+                    "avx10.vfmsub132bf16512" => "__builtin_ia32_vfmsub132bf16512",
+                    "avx10.vfmsub213bf16128" => "__builtin_ia32_vfmsub213bf16128",
+                    "avx10.vfmsub213bf16256" => "__builtin_ia32_vfmsub213bf16256",
+                    "avx10.vfmsub213bf16512" => "__builtin_ia32_vfmsub213bf16512",
+                    "avx10.vfmsub231bf16128" => "__builtin_ia32_vfmsub231bf16128",
+                    "avx10.vfmsub231bf16256" => "__builtin_ia32_vfmsub231bf16256",
+                    "avx10.vfmsub231bf16512" => "__builtin_ia32_vfmsub231bf16512",
+                    "avx10.vfnmadd132bf16128" => "__builtin_ia32_vfnmadd132bf16128",
+                    "avx10.vfnmadd132bf16256" => "__builtin_ia32_vfnmadd132bf16256",
+                    "avx10.vfnmadd132bf16512" => "__builtin_ia32_vfnmadd132bf16512",
+                    "avx10.vfnmadd213bf16128" => "__builtin_ia32_vfnmadd213bf16128",
+                    "avx10.vfnmadd213bf16256" => "__builtin_ia32_vfnmadd213bf16256",
+                    "avx10.vfnmadd213bf16512" => "__builtin_ia32_vfnmadd213bf16512",
+                    "avx10.vfnmadd231bf16128" => "__builtin_ia32_vfnmadd231bf16128",
+                    "avx10.vfnmadd231bf16256" => "__builtin_ia32_vfnmadd231bf16256",
+                    "avx10.vfnmadd231bf16512" => "__builtin_ia32_vfnmadd231bf16512",
+                    "avx10.vfnmsub132bf16128" => "__builtin_ia32_vfnmsub132bf16128",
+                    "avx10.vfnmsub132bf16256" => "__builtin_ia32_vfnmsub132bf16256",
+                    "avx10.vfnmsub132bf16512" => "__builtin_ia32_vfnmsub132bf16512",
+                    "avx10.vfnmsub213bf16128" => "__builtin_ia32_vfnmsub213bf16128",
+                    "avx10.vfnmsub213bf16256" => "__builtin_ia32_vfnmsub213bf16256",
+                    "avx10.vfnmsub213bf16512" => "__builtin_ia32_vfnmsub213bf16512",
+                    "avx10.vfnmsub231bf16128" => "__builtin_ia32_vfnmsub231bf16128",
+                    "avx10.vfnmsub231bf16256" => "__builtin_ia32_vfnmsub231bf16256",
+                    "avx10.vfnmsub231bf16512" => "__builtin_ia32_vfnmsub231bf16512",
+                    "avx10.vmaxbf16128" => "__builtin_ia32_vmaxbf16128",
+                    "avx10.vmaxbf16256" => "__builtin_ia32_vmaxbf16256",
+                    "avx10.vmaxbf16512" => "__builtin_ia32_vmaxbf16512",
+                    "avx10.vminbf16128" => "__builtin_ia32_vminbf16128",
+                    "avx10.vminbf16256" => "__builtin_ia32_vminbf16256",
+                    "avx10.vminbf16512" => "__builtin_ia32_vminbf16512",
+                    "avx10.vminmaxbf16128" => "__builtin_ia32_vminmaxbf16128",
+                    "avx10.vminmaxbf16256" => "__builtin_ia32_vminmaxbf16256",
+                    "avx10.vminmaxbf16512" => "__builtin_ia32_vminmaxbf16512",
+                    "avx10.vminmaxpd128" => "__builtin_ia32_vminmaxpd128",
+                    "avx10.vminmaxpd256" => "__builtin_ia32_vminmaxpd256",
+                    "avx10.vminmaxph128" => "__builtin_ia32_vminmaxph128",
+                    "avx10.vminmaxph256" => "__builtin_ia32_vminmaxph256",
+                    "avx10.vminmaxps128" => "__builtin_ia32_vminmaxps128",
+                    "avx10.vminmaxps256" => "__builtin_ia32_vminmaxps256",
+                    "avx10.vmovrsb128" => "__builtin_ia32_vmovrsb128",
+                    "avx10.vmovrsb256" => "__builtin_ia32_vmovrsb256",
+                    "avx10.vmovrsb512" => "__builtin_ia32_vmovrsb512",
+                    "avx10.vmovrsd128" => "__builtin_ia32_vmovrsd128",
+                    "avx10.vmovrsd256" => "__builtin_ia32_vmovrsd256",
+                    "avx10.vmovrsd512" => "__builtin_ia32_vmovrsd512",
+                    "avx10.vmovrsq128" => "__builtin_ia32_vmovrsq128",
+                    "avx10.vmovrsq256" => "__builtin_ia32_vmovrsq256",
+                    "avx10.vmovrsq512" => "__builtin_ia32_vmovrsq512",
+                    "avx10.vmovrsw128" => "__builtin_ia32_vmovrsw128",
+                    "avx10.vmovrsw256" => "__builtin_ia32_vmovrsw256",
+                    "avx10.vmovrsw512" => "__builtin_ia32_vmovrsw512",
+                    "avx10.vmpsadbw.512" => "__builtin_ia32_mpsadbw512",
+                    "avx10.vmulbf16128" => "__builtin_ia32_vmulbf16128",
+                    "avx10.vmulbf16256" => "__builtin_ia32_vmulbf16256",
+                    "avx10.vmulbf16512" => "__builtin_ia32_vmulbf16512",
+                    "avx10.vpdpbssd.512" => "__builtin_ia32_vpdpbssd512",
+                    "avx10.vpdpbssds.512" => "__builtin_ia32_vpdpbssds512",
+                    "avx10.vpdpbsud.512" => "__builtin_ia32_vpdpbsud512",
+                    "avx10.vpdpbsuds.512" => "__builtin_ia32_vpdpbsuds512",
+                    "avx10.vpdpbuud.512" => "__builtin_ia32_vpdpbuud512",
+                    "avx10.vpdpbuuds.512" => "__builtin_ia32_vpdpbuuds512",
+                    "avx10.vpdpwsud.512" => "__builtin_ia32_vpdpwsud512",
+                    "avx10.vpdpwsuds.512" => "__builtin_ia32_vpdpwsuds512",
+                    "avx10.vpdpwusd.512" => "__builtin_ia32_vpdpwusd512",
+                    "avx10.vpdpwusds.512" => "__builtin_ia32_vpdpwusds512",
+                    "avx10.vpdpwuud.512" => "__builtin_ia32_vpdpwuud512",
+                    "avx10.vpdpwuuds.512" => "__builtin_ia32_vpdpwuuds512",
+                    "avx10.vsubbf16128" => "__builtin_ia32_vsubbf16128",
+                    "avx10.vsubbf16256" => "__builtin_ia32_vsubbf16256",
+                    "avx10.vsubbf16512" => "__builtin_ia32_vsubbf16512",
+                    "avx2.gather.d.d" => "__builtin_ia32_gatherd_d",
+                    "avx2.gather.d.d.256" => "__builtin_ia32_gatherd_d256",
+                    "avx2.gather.d.pd" => "__builtin_ia32_gatherd_pd",
+                    "avx2.gather.d.pd.256" => "__builtin_ia32_gatherd_pd256",
+                    "avx2.gather.d.ps" => "__builtin_ia32_gatherd_ps",
+                    "avx2.gather.d.ps.256" => "__builtin_ia32_gatherd_ps256",
+                    "avx2.gather.d.q" => "__builtin_ia32_gatherd_q",
+                    "avx2.gather.d.q.256" => "__builtin_ia32_gatherd_q256",
+                    "avx2.gather.q.d" => "__builtin_ia32_gatherq_d",
+                    "avx2.gather.q.d.256" => "__builtin_ia32_gatherq_d256",
+                    "avx2.gather.q.pd" => "__builtin_ia32_gatherq_pd",
+                    "avx2.gather.q.pd.256" => "__builtin_ia32_gatherq_pd256",
+                    "avx2.gather.q.ps" => "__builtin_ia32_gatherq_ps",
+                    "avx2.gather.q.ps.256" => "__builtin_ia32_gatherq_ps256",
+                    "avx2.gather.q.q" => "__builtin_ia32_gatherq_q",
+                    "avx2.gather.q.q.256" => "__builtin_ia32_gatherq_q256",
+                    "avx2.maskload.d" => "__builtin_ia32_maskloadd",
+                    "avx2.maskload.d.256" => "__builtin_ia32_maskloadd256",
+                    "avx2.maskload.q" => "__builtin_ia32_maskloadq",
+                    "avx2.maskload.q.256" => "__builtin_ia32_maskloadq256",
+                    "avx2.maskstore.d" => "__builtin_ia32_maskstored",
+                    "avx2.maskstore.d.256" => "__builtin_ia32_maskstored256",
+                    "avx2.maskstore.q" => "__builtin_ia32_maskstoreq",
+                    "avx2.maskstore.q.256" => "__builtin_ia32_maskstoreq256",
+                    "avx2.movntdqa" => "__builtin_ia32_movntdqa256",
+                    "avx2.mpsadbw" => "__builtin_ia32_mpsadbw256",
+                    "avx2.pabs.b" => "__builtin_ia32_pabsb256",
+                    "avx2.pabs.d" => "__builtin_ia32_pabsd256",
+                    "avx2.pabs.w" => "__builtin_ia32_pabsw256",
+                    "avx2.packssdw" => "__builtin_ia32_packssdw256",
+                    "avx2.packsswb" => "__builtin_ia32_packsswb256",
+                    "avx2.packusdw" => "__builtin_ia32_packusdw256",
+                    "avx2.packuswb" => "__builtin_ia32_packuswb256",
+                    "avx2.padds.b" => "__builtin_ia32_paddsb256",
+                    "avx2.padds.w" => "__builtin_ia32_paddsw256",
+                    "avx2.paddus.b" => "__builtin_ia32_paddusb256",
+                    "avx2.paddus.w" => "__builtin_ia32_paddusw256",
+                    "avx2.pavg.b" => "__builtin_ia32_pavgb256",
+                    "avx2.pavg.w" => "__builtin_ia32_pavgw256",
+                    "avx2.pblendd.128" => "__builtin_ia32_pblendd128",
+                    "avx2.pblendd.256" => "__builtin_ia32_pblendd256",
+                    "avx2.pblendvb" => "__builtin_ia32_pblendvb256",
+                    "avx2.pblendw" => "__builtin_ia32_pblendw256",
+                    "avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128",
+                    "avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256",
+                    "avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128",
+                    "avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256",
+                    "avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128",
+                    "avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256",
+                    "avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128",
+                    "avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256",
+                    "avx2.permd" => "__builtin_ia32_permvarsi256",
+                    "avx2.permps" => "__builtin_ia32_permvarsf256",
+                    "avx2.phadd.d" => "__builtin_ia32_phaddd256",
+                    "avx2.phadd.sw" => "__builtin_ia32_phaddsw256",
+                    "avx2.phadd.w" => "__builtin_ia32_phaddw256",
+                    "avx2.phsub.d" => "__builtin_ia32_phsubd256",
+                    "avx2.phsub.sw" => "__builtin_ia32_phsubsw256",
+                    "avx2.phsub.w" => "__builtin_ia32_phsubw256",
+                    "avx2.pmadd.ub.sw" => "__builtin_ia32_pmaddubsw256",
+                    "avx2.pmadd.wd" => "__builtin_ia32_pmaddwd256",
+                    "avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256",
+                    "avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256",
+                    "avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256",
+                    "avx2.pmaxu.b" => "__builtin_ia32_pmaxub256",
+                    "avx2.pmaxu.d" => "__builtin_ia32_pmaxud256",
+                    "avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256",
+                    "avx2.pmins.b" => "__builtin_ia32_pminsb256",
+                    "avx2.pmins.d" => "__builtin_ia32_pminsd256",
+                    "avx2.pmins.w" => "__builtin_ia32_pminsw256",
+                    "avx2.pminu.b" => "__builtin_ia32_pminub256",
+                    "avx2.pminu.d" => "__builtin_ia32_pminud256",
+                    "avx2.pminu.w" => "__builtin_ia32_pminuw256",
+                    "avx2.pmovmskb" => "__builtin_ia32_pmovmskb256",
+                    "avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256",
+                    "avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256",
+                    "avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256",
+                    "avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256",
+                    "avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256",
+                    "avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256",
+                    "avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256",
+                    "avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256",
+                    "avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256",
+                    "avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256",
+                    "avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256",
+                    "avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256",
+                    "avx2.pmul.dq" => "__builtin_ia32_pmuldq256",
+                    "avx2.pmul.hr.sw" => "__builtin_ia32_pmulhrsw256",
+                    "avx2.pmulh.w" => "__builtin_ia32_pmulhw256",
+                    "avx2.pmulhu.w" => "__builtin_ia32_pmulhuw256",
+                    "avx2.pmulu.dq" => "__builtin_ia32_pmuludq256",
+                    "avx2.psad.bw" => "__builtin_ia32_psadbw256",
+                    "avx2.pshuf.b" => "__builtin_ia32_pshufb256",
+                    "avx2.psign.b" => "__builtin_ia32_psignb256",
+                    "avx2.psign.d" => "__builtin_ia32_psignd256",
+                    "avx2.psign.w" => "__builtin_ia32_psignw256",
+                    "avx2.psll.d" => "__builtin_ia32_pslld256",
+                    "avx2.psll.dq" => "__builtin_ia32_pslldqi256",
+                    "avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift",
+                    "avx2.psll.q" => "__builtin_ia32_psllq256",
+                    "avx2.psll.w" => "__builtin_ia32_psllw256",
+                    "avx2.pslli.d" => "__builtin_ia32_pslldi256",
+                    "avx2.pslli.q" => "__builtin_ia32_psllqi256",
+                    "avx2.pslli.w" => "__builtin_ia32_psllwi256",
+                    "avx2.psllv.d" => "__builtin_ia32_psllv4si",
+                    "avx2.psllv.d.256" => "__builtin_ia32_psllv8si",
+                    "avx2.psllv.q" => "__builtin_ia32_psllv2di",
+                    "avx2.psllv.q.256" => "__builtin_ia32_psllv4di",
+                    "avx2.psra.d" => "__builtin_ia32_psrad256",
+                    "avx2.psra.w" => "__builtin_ia32_psraw256",
+                    "avx2.psrai.d" => "__builtin_ia32_psradi256",
+                    "avx2.psrai.w" => "__builtin_ia32_psrawi256",
+                    "avx2.psrav.d" => "__builtin_ia32_psrav4si",
+                    "avx2.psrav.d.256" => "__builtin_ia32_psrav8si",
+                    "avx2.psrl.d" => "__builtin_ia32_psrld256",
+                    "avx2.psrl.dq" => "__builtin_ia32_psrldqi256",
+                    "avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift",
+                    "avx2.psrl.q" => "__builtin_ia32_psrlq256",
+                    "avx2.psrl.w" => "__builtin_ia32_psrlw256",
+                    "avx2.psrli.d" => "__builtin_ia32_psrldi256",
+                    "avx2.psrli.q" => "__builtin_ia32_psrlqi256",
+                    "avx2.psrli.w" => "__builtin_ia32_psrlwi256",
+                    "avx2.psrlv.d" => "__builtin_ia32_psrlv4si",
+                    "avx2.psrlv.d.256" => "__builtin_ia32_psrlv8si",
+                    "avx2.psrlv.q" => "__builtin_ia32_psrlv2di",
+                    "avx2.psrlv.q.256" => "__builtin_ia32_psrlv4di",
+                    "avx2.psubs.b" => "__builtin_ia32_psubsb256",
+                    "avx2.psubs.w" => "__builtin_ia32_psubsw256",
+                    "avx2.psubus.b" => "__builtin_ia32_psubusb256",
+                    "avx2.psubus.w" => "__builtin_ia32_psubusw256",
+                    "avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256",
+                    "avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps",
+                    "avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256",
+                    "avx2.vextracti128" => "__builtin_ia32_extract128i256",
+                    "avx2.vinserti128" => "__builtin_ia32_insert128i256",
+                    "avx2.vpdpbssd.128" => "__builtin_ia32_vpdpbssd128",
+                    "avx2.vpdpbssd.256" => "__builtin_ia32_vpdpbssd256",
+                    "avx2.vpdpbssds.128" => "__builtin_ia32_vpdpbssds128",
+                    "avx2.vpdpbssds.256" => "__builtin_ia32_vpdpbssds256",
+                    "avx2.vpdpbsud.128" => "__builtin_ia32_vpdpbsud128",
+                    "avx2.vpdpbsud.256" => "__builtin_ia32_vpdpbsud256",
+                    "avx2.vpdpbsuds.128" => "__builtin_ia32_vpdpbsuds128",
+                    "avx2.vpdpbsuds.256" => "__builtin_ia32_vpdpbsuds256",
+                    "avx2.vpdpbuud.128" => "__builtin_ia32_vpdpbuud128",
+                    "avx2.vpdpbuud.256" => "__builtin_ia32_vpdpbuud256",
+                    "avx2.vpdpbuuds.128" => "__builtin_ia32_vpdpbuuds128",
+                    "avx2.vpdpbuuds.256" => "__builtin_ia32_vpdpbuuds256",
+                    "avx2.vpdpwsud.128" => "__builtin_ia32_vpdpwsud128",
+                    "avx2.vpdpwsud.256" => "__builtin_ia32_vpdpwsud256",
+                    "avx2.vpdpwsuds.128" => "__builtin_ia32_vpdpwsuds128",
+                    "avx2.vpdpwsuds.256" => "__builtin_ia32_vpdpwsuds256",
+                    "avx2.vpdpwusd.128" => "__builtin_ia32_vpdpwusd128",
+                    "avx2.vpdpwusd.256" => "__builtin_ia32_vpdpwusd256",
+                    "avx2.vpdpwusds.128" => "__builtin_ia32_vpdpwusds128",
+                    "avx2.vpdpwusds.256" => "__builtin_ia32_vpdpwusds256",
+                    "avx2.vpdpwuud.128" => "__builtin_ia32_vpdpwuud128",
+                    "avx2.vpdpwuud.256" => "__builtin_ia32_vpdpwuud256",
+                    "avx2.vpdpwuuds.128" => "__builtin_ia32_vpdpwuuds128",
+                    "avx2.vpdpwuuds.256" => "__builtin_ia32_vpdpwuuds256",
+                    "avx2.vperm2i128" => "__builtin_ia32_permti256",
+                    "avx512.add.pd.512" => "__builtin_ia32_addpd512",
+                    "avx512.add.ps.512" => "__builtin_ia32_addps512",
+                    "avx512.broadcastmb.128" => "__builtin_ia32_broadcastmb128",
+                    "avx512.broadcastmb.256" => "__builtin_ia32_broadcastmb256",
+                    "avx512.broadcastmb.512" => "__builtin_ia32_broadcastmb512",
+                    "avx512.broadcastmw.128" => "__builtin_ia32_broadcastmw128",
+                    "avx512.broadcastmw.256" => "__builtin_ia32_broadcastmw256",
+                    "avx512.broadcastmw.512" => "__builtin_ia32_broadcastmw512",
+                    "avx512.conflict.d.128" => "__builtin_ia32_vpconflictsi_128",
+                    "avx512.conflict.d.256" => "__builtin_ia32_vpconflictsi_256",
+                    "avx512.conflict.d.512" => "__builtin_ia32_vpconflictsi_512",
+                    "avx512.conflict.q.128" => "__builtin_ia32_vpconflictdi_128",
+                    "avx512.conflict.q.256" => "__builtin_ia32_vpconflictdi_256",
+                    "avx512.conflict.q.512" => "__builtin_ia32_vpconflictdi_512",
+                    "avx512.cvtb2mask.128" => "__builtin_ia32_cvtb2mask128",
+                    "avx512.cvtb2mask.256" => "__builtin_ia32_cvtb2mask256",
+                    "avx512.cvtb2mask.512" => "__builtin_ia32_cvtb2mask512",
+                    "avx512.cvtd2mask.128" => "__builtin_ia32_cvtd2mask128",
+                    "avx512.cvtd2mask.256" => "__builtin_ia32_cvtd2mask256",
+                    "avx512.cvtd2mask.512" => "__builtin_ia32_cvtd2mask512",
+                    "avx512.cvtmask2b.128" => "__builtin_ia32_cvtmask2b128",
+                    "avx512.cvtmask2b.256" => "__builtin_ia32_cvtmask2b256",
+                    "avx512.cvtmask2b.512" => "__builtin_ia32_cvtmask2b512",
+                    "avx512.cvtmask2d.128" => "__builtin_ia32_cvtmask2d128",
+                    "avx512.cvtmask2d.256" => "__builtin_ia32_cvtmask2d256",
+                    "avx512.cvtmask2d.512" => "__builtin_ia32_cvtmask2d512",
+                    "avx512.cvtmask2q.128" => "__builtin_ia32_cvtmask2q128",
+                    "avx512.cvtmask2q.256" => "__builtin_ia32_cvtmask2q256",
+                    "avx512.cvtmask2q.512" => "__builtin_ia32_cvtmask2q512",
+                    "avx512.cvtmask2w.128" => "__builtin_ia32_cvtmask2w128",
+                    "avx512.cvtmask2w.256" => "__builtin_ia32_cvtmask2w256",
+                    "avx512.cvtmask2w.512" => "__builtin_ia32_cvtmask2w512",
+                    "avx512.cvtq2mask.128" => "__builtin_ia32_cvtq2mask128",
+                    "avx512.cvtq2mask.256" => "__builtin_ia32_cvtq2mask256",
+                    "avx512.cvtq2mask.512" => "__builtin_ia32_cvtq2mask512",
+                    "avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi",
+                    "avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64",
+                    "avx512.cvtsi2sd32" => "__builtin_ia32_cvtsi2sd32",
+                    "avx512.cvtsi2sd64" => "__builtin_ia32_cvtsi2sd64",
+                    "avx512.cvtsi2ss32" => "__builtin_ia32_cvtsi2ss32",
+                    "avx512.cvtsi2ss64" => "__builtin_ia32_cvtsi2ss64",
+                    "avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi",
+                    "avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64",
+                    "avx512.cvttsd2si" => "__builtin_ia32_vcvttsd2si32",
+                    "avx512.cvttsd2si64" => "__builtin_ia32_vcvttsd2si64",
+                    "avx512.cvttsd2usi" => "__builtin_ia32_vcvttsd2usi32",
+                    // [DUPLICATE]: "avx512.cvttsd2usi" => "__builtin_ia32_cvttsd2usi",
+                    "avx512.cvttsd2usi64" => "__builtin_ia32_vcvttsd2usi64",
+                    // [DUPLICATE]: "avx512.cvttsd2usi64" => "__builtin_ia32_cvttsd2usi64",
+                    "avx512.cvttss2si" => "__builtin_ia32_vcvttss2si32",
+                    "avx512.cvttss2si64" => "__builtin_ia32_vcvttss2si64",
+                    "avx512.cvttss2usi" => "__builtin_ia32_vcvttss2usi32",
+                    // [DUPLICATE]: "avx512.cvttss2usi" => "__builtin_ia32_cvttss2usi",
+                    "avx512.cvttss2usi64" => "__builtin_ia32_vcvttss2usi64",
+                    // [DUPLICATE]: "avx512.cvttss2usi64" => "__builtin_ia32_cvttss2usi64",
+                    "avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd",
+                    // [DUPLICATE]: "avx512.cvtusi2sd" => "__builtin_ia32_cvtusi2sd32",
+                    "avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss32",
+                    // [DUPLICATE]: "avx512.cvtusi2ss" => "__builtin_ia32_cvtusi2ss",
+                    "avx512.cvtusi642sd" => "__builtin_ia32_cvtusi2sd64",
+                    // [DUPLICATE]: "avx512.cvtusi642sd" => "__builtin_ia32_cvtusi642sd",
+                    "avx512.cvtusi642ss" => "__builtin_ia32_cvtusi2ss64",
+                    // [DUPLICATE]: "avx512.cvtusi642ss" => "__builtin_ia32_cvtusi642ss",
+                    "avx512.cvtw2mask.128" => "__builtin_ia32_cvtw2mask128",
+                    "avx512.cvtw2mask.256" => "__builtin_ia32_cvtw2mask256",
+                    "avx512.cvtw2mask.512" => "__builtin_ia32_cvtw2mask512",
+                    "avx512.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128",
+                    "avx512.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256",
+                    "avx512.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512",
+                    "avx512.div.pd.512" => "__builtin_ia32_divpd512",
+                    "avx512.div.ps.512" => "__builtin_ia32_divps512",
+                    "avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask",
+                    "avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask",
+                    "avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df",
+                    "avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si",
+                    "avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di",
+                    "avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf",
+                    "avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df",
+                    "avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si",
+                    "avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di",
+                    "avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf",
+                    "avx512.gather3div2.df" => "__builtin_ia32_gather3div2df",
+                    "avx512.gather3div2.di" => "__builtin_ia32_gather3div2di",
+                    "avx512.gather3div4.df" => "__builtin_ia32_gather3div4df",
+                    "avx512.gather3div4.di" => "__builtin_ia32_gather3div4di",
+                    "avx512.gather3div4.sf" => "__builtin_ia32_gather3div4sf",
+                    "avx512.gather3div4.si" => "__builtin_ia32_gather3div4si",
+                    "avx512.gather3div8.sf" => "__builtin_ia32_gather3div8sf",
+                    "avx512.gather3div8.si" => "__builtin_ia32_gather3div8si",
+                    "avx512.gather3siv2.df" => "__builtin_ia32_gather3siv2df",
+                    "avx512.gather3siv2.di" => "__builtin_ia32_gather3siv2di",
+                    "avx512.gather3siv4.df" => "__builtin_ia32_gather3siv4df",
+                    "avx512.gather3siv4.di" => "__builtin_ia32_gather3siv4di",
+                    "avx512.gather3siv4.sf" => "__builtin_ia32_gather3siv4sf",
+                    "avx512.gather3siv4.si" => "__builtin_ia32_gather3siv4si",
+                    "avx512.gather3siv8.sf" => "__builtin_ia32_gather3siv8sf",
+                    "avx512.gather3siv8.si" => "__builtin_ia32_gather3siv8si",
+                    "avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd",
+                    "avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps",
+                    "avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd",
+                    "avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps",
+                    "avx512.kand.w" => "__builtin_ia32_kandhi",
+                    "avx512.kandn.w" => "__builtin_ia32_kandnhi",
+                    "avx512.knot.w" => "__builtin_ia32_knothi",
+                    "avx512.kor.w" => "__builtin_ia32_korhi",
+                    "avx512.kortestc.w" => "__builtin_ia32_kortestchi",
+                    "avx512.kortestz.w" => "__builtin_ia32_kortestzhi",
+                    "avx512.kunpck.bw" => "__builtin_ia32_kunpckhi",
+                    "avx512.kunpck.dq" => "__builtin_ia32_kunpckdi",
+                    "avx512.kunpck.wd" => "__builtin_ia32_kunpcksi",
+                    "avx512.kxnor.w" => "__builtin_ia32_kxnorhi",
+                    "avx512.kxor.w" => "__builtin_ia32_kxorhi",
+                    "avx512.mask.add.pd.128" => "__builtin_ia32_addpd128_mask",
+                    "avx512.mask.add.pd.256" => "__builtin_ia32_addpd256_mask",
+                    "avx512.mask.add.pd.512" => "__builtin_ia32_addpd512_mask",
+                    "avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask",
+                    "avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask",
+                    "avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.add.sd.round" => "__builtin_ia32_addsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.add.ss.round" => "__builtin_ia32_addss_round_mask",
+                    "avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask",
+                    "avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask",
+                    "avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask",
+                    "avx512.mask.and.ps.128" => "__builtin_ia32_andps128_mask",
+                    "avx512.mask.and.ps.256" => "__builtin_ia32_andps256_mask",
+                    "avx512.mask.and.ps.512" => "__builtin_ia32_andps512_mask",
+                    "avx512.mask.andn.pd.128" => "__builtin_ia32_andnpd128_mask",
+                    "avx512.mask.andn.pd.256" => "__builtin_ia32_andnpd256_mask",
+                    "avx512.mask.andn.pd.512" => "__builtin_ia32_andnpd512_mask",
+                    "avx512.mask.andn.ps.128" => "__builtin_ia32_andnps128_mask",
+                    "avx512.mask.andn.ps.256" => "__builtin_ia32_andnps256_mask",
+                    "avx512.mask.andn.ps.512" => "__builtin_ia32_andnps512_mask",
+                    "avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask",
+                    "avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask",
+                    "avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask",
+                    "avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask",
+                    "avx512.mask.broadcastf32x2.256" => "__builtin_ia32_broadcastf32x2_256_mask",
+                    "avx512.mask.broadcastf32x2.512" => "__builtin_ia32_broadcastf32x2_512_mask",
+                    "avx512.mask.broadcastf32x4.256" => "__builtin_ia32_broadcastf32x4_256_mask",
+                    "avx512.mask.broadcastf32x4.512" => "__builtin_ia32_broadcastf32x4_512",
+                    "avx512.mask.broadcastf32x8.512" => "__builtin_ia32_broadcastf32x8_512_mask",
+                    "avx512.mask.broadcastf64x2.256" => "__builtin_ia32_broadcastf64x2_256_mask",
+                    "avx512.mask.broadcastf64x2.512" => "__builtin_ia32_broadcastf64x2_512_mask",
+                    "avx512.mask.broadcastf64x4.512" => "__builtin_ia32_broadcastf64x4_512",
+                    "avx512.mask.broadcasti32x2.128" => "__builtin_ia32_broadcasti32x2_128_mask",
+                    "avx512.mask.broadcasti32x2.256" => "__builtin_ia32_broadcasti32x2_256_mask",
+                    "avx512.mask.broadcasti32x2.512" => "__builtin_ia32_broadcasti32x2_512_mask",
+                    "avx512.mask.broadcasti32x4.256" => "__builtin_ia32_broadcasti32x4_256_mask",
+                    "avx512.mask.broadcasti32x4.512" => "__builtin_ia32_broadcasti32x4_512",
+                    "avx512.mask.broadcasti32x8.512" => "__builtin_ia32_broadcasti32x8_512_mask",
+                    "avx512.mask.broadcasti64x2.256" => "__builtin_ia32_broadcasti64x2_256_mask",
+                    "avx512.mask.broadcasti64x2.512" => "__builtin_ia32_broadcasti64x2_512_mask",
+                    "avx512.mask.broadcasti64x4.512" => "__builtin_ia32_broadcasti64x4_512",
+                    "avx512.mask.cmp.pd.128" => "__builtin_ia32_cmppd128_mask",
+                    "avx512.mask.cmp.pd.256" => "__builtin_ia32_cmppd256_mask",
+                    "avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask",
+                    "avx512.mask.cmp.ps.128" => "__builtin_ia32_cmpps128_mask",
+                    "avx512.mask.cmp.ps.256" => "__builtin_ia32_cmpps256_mask",
+                    "avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask",
+                    "avx512.mask.cmp.sd" => "__builtin_ia32_cmpsd_mask",
+                    "avx512.mask.cmp.ss" => "__builtin_ia32_cmpss_mask",
+                    "avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask",
+                    "avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask",
+                    "avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask",
+                    "avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask",
+                    "avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask",
+                    "avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask",
+                    "avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask",
+                    "avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask",
+                    "avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask",
+                    "avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask",
+                    "avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask",
+                    "avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask",
+                    "avx512.mask.compress.store.d.128" => "__builtin_ia32_compressstoresi128_mask",
+                    "avx512.mask.compress.store.d.256" => "__builtin_ia32_compressstoresi256_mask",
+                    "avx512.mask.compress.store.d.512" => "__builtin_ia32_compressstoresi512_mask",
+                    "avx512.mask.compress.store.pd.128" => "__builtin_ia32_compressstoredf128_mask",
+                    "avx512.mask.compress.store.pd.256" => "__builtin_ia32_compressstoredf256_mask",
+                    "avx512.mask.compress.store.pd.512" => "__builtin_ia32_compressstoredf512_mask",
+                    "avx512.mask.compress.store.ps.128" => "__builtin_ia32_compressstoresf128_mask",
+                    "avx512.mask.compress.store.ps.256" => "__builtin_ia32_compressstoresf256_mask",
+                    "avx512.mask.compress.store.ps.512" => "__builtin_ia32_compressstoresf512_mask",
+                    "avx512.mask.compress.store.q.128" => "__builtin_ia32_compressstoredi128_mask",
+                    "avx512.mask.compress.store.q.256" => "__builtin_ia32_compressstoredi256_mask",
+                    "avx512.mask.compress.store.q.512" => "__builtin_ia32_compressstoredi512_mask",
+                    "avx512.mask.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask",
+                    "avx512.mask.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask",
+                    "avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask",
+                    "avx512.mask.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask",
+                    "avx512.mask.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask",
+                    "avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask",
+                    "avx512.mask.cvtdq2pd.128" => "__builtin_ia32_cvtdq2pd128_mask",
+                    "avx512.mask.cvtdq2pd.256" => "__builtin_ia32_cvtdq2pd256_mask",
+                    "avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask",
+                    "avx512.mask.cvtdq2ps.128" => "__builtin_ia32_cvtdq2ps128_mask",
+                    "avx512.mask.cvtdq2ps.256" => "__builtin_ia32_cvtdq2ps256_mask",
+                    "avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask",
+                    "avx512.mask.cvtpd2dq.128" => "__builtin_ia32_cvtpd2dq128_mask",
+                    "avx512.mask.cvtpd2dq.256" => "__builtin_ia32_cvtpd2dq256_mask",
+                    "avx512.mask.cvtpd2dq.512" => "__builtin_ia32_cvtpd2dq512_mask",
+                    "avx512.mask.cvtpd2ps" => "__builtin_ia32_cvtpd2ps_mask",
+                    "avx512.mask.cvtpd2ps.256" => "__builtin_ia32_cvtpd2ps256_mask",
+                    "avx512.mask.cvtpd2ps.512" => "__builtin_ia32_cvtpd2ps512_mask",
+                    "avx512.mask.cvtpd2qq.128" => "__builtin_ia32_cvtpd2qq128_mask",
+                    "avx512.mask.cvtpd2qq.256" => "__builtin_ia32_cvtpd2qq256_mask",
+                    "avx512.mask.cvtpd2qq.512" => "__builtin_ia32_cvtpd2qq512_mask",
+                    "avx512.mask.cvtpd2udq.128" => "__builtin_ia32_cvtpd2udq128_mask",
+                    "avx512.mask.cvtpd2udq.256" => "__builtin_ia32_cvtpd2udq256_mask",
+                    "avx512.mask.cvtpd2udq.512" => "__builtin_ia32_cvtpd2udq512_mask",
+                    "avx512.mask.cvtpd2uqq.128" => "__builtin_ia32_cvtpd2uqq128_mask",
+                    "avx512.mask.cvtpd2uqq.256" => "__builtin_ia32_cvtpd2uqq256_mask",
+                    "avx512.mask.cvtpd2uqq.512" => "__builtin_ia32_cvtpd2uqq512_mask",
+                    "avx512.mask.cvtps2dq.128" => "__builtin_ia32_cvtps2dq128_mask",
+                    "avx512.mask.cvtps2dq.256" => "__builtin_ia32_cvtps2dq256_mask",
+                    "avx512.mask.cvtps2dq.512" => "__builtin_ia32_cvtps2dq512_mask",
+                    "avx512.mask.cvtps2pd.128" => "__builtin_ia32_cvtps2pd128_mask",
+                    "avx512.mask.cvtps2pd.256" => "__builtin_ia32_cvtps2pd256_mask",
+                    "avx512.mask.cvtps2pd.512" => "__builtin_ia32_cvtps2pd512_mask",
+                    "avx512.mask.cvtps2qq.128" => "__builtin_ia32_cvtps2qq128_mask",
+                    "avx512.mask.cvtps2qq.256" => "__builtin_ia32_cvtps2qq256_mask",
+                    "avx512.mask.cvtps2qq.512" => "__builtin_ia32_cvtps2qq512_mask",
+                    "avx512.mask.cvtps2udq.128" => "__builtin_ia32_cvtps2udq128_mask",
+                    "avx512.mask.cvtps2udq.256" => "__builtin_ia32_cvtps2udq256_mask",
+                    "avx512.mask.cvtps2udq.512" => "__builtin_ia32_cvtps2udq512_mask",
+                    "avx512.mask.cvtps2uqq.128" => "__builtin_ia32_cvtps2uqq128_mask",
+                    "avx512.mask.cvtps2uqq.256" => "__builtin_ia32_cvtps2uqq256_mask",
+                    "avx512.mask.cvtps2uqq.512" => "__builtin_ia32_cvtps2uqq512_mask",
+                    "avx512.mask.cvtqq2pd.128" => "__builtin_ia32_cvtqq2pd128_mask",
+                    "avx512.mask.cvtqq2pd.256" => "__builtin_ia32_cvtqq2pd256_mask",
+                    "avx512.mask.cvtqq2pd.512" => "__builtin_ia32_cvtqq2pd512_mask",
+                    "avx512.mask.cvtqq2ps.128" => "__builtin_ia32_cvtqq2ps128_mask",
+                    "avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask",
+                    "avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.cvtsd2ss.round" => "__builtin_ia32_cvtsd2ss_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.cvtss2sd.round" => "__builtin_ia32_cvtss2sd_round_mask",
+                    "avx512.mask.cvttpd2dq.128" => "__builtin_ia32_cvttpd2dq128_mask",
+                    "avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask",
+                    "avx512.mask.cvttpd2dq.512" => "__builtin_ia32_cvttpd2dq512_mask",
+                    "avx512.mask.cvttpd2qq.128" => "__builtin_ia32_cvttpd2qq128_mask",
+                    "avx512.mask.cvttpd2qq.256" => "__builtin_ia32_cvttpd2qq256_mask",
+                    "avx512.mask.cvttpd2qq.512" => "__builtin_ia32_cvttpd2qq512_mask",
+                    "avx512.mask.cvttpd2udq.128" => "__builtin_ia32_cvttpd2udq128_mask",
+                    "avx512.mask.cvttpd2udq.256" => "__builtin_ia32_cvttpd2udq256_mask",
+                    "avx512.mask.cvttpd2udq.512" => "__builtin_ia32_cvttpd2udq512_mask",
+                    "avx512.mask.cvttpd2uqq.128" => "__builtin_ia32_cvttpd2uqq128_mask",
+                    "avx512.mask.cvttpd2uqq.256" => "__builtin_ia32_cvttpd2uqq256_mask",
+                    "avx512.mask.cvttpd2uqq.512" => "__builtin_ia32_cvttpd2uqq512_mask",
+                    "avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask",
+                    "avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask",
+                    "avx512.mask.cvttps2dq.512" => "__builtin_ia32_cvttps2dq512_mask",
+                    "avx512.mask.cvttps2qq.128" => "__builtin_ia32_cvttps2qq128_mask",
+                    "avx512.mask.cvttps2qq.256" => "__builtin_ia32_cvttps2qq256_mask",
+                    "avx512.mask.cvttps2qq.512" => "__builtin_ia32_cvttps2qq512_mask",
+                    "avx512.mask.cvttps2udq.128" => "__builtin_ia32_cvttps2udq128_mask",
+                    "avx512.mask.cvttps2udq.256" => "__builtin_ia32_cvttps2udq256_mask",
+                    "avx512.mask.cvttps2udq.512" => "__builtin_ia32_cvttps2udq512_mask",
+                    "avx512.mask.cvttps2uqq.128" => "__builtin_ia32_cvttps2uqq128_mask",
+                    "avx512.mask.cvttps2uqq.256" => "__builtin_ia32_cvttps2uqq256_mask",
+                    "avx512.mask.cvttps2uqq.512" => "__builtin_ia32_cvttps2uqq512_mask",
+                    "avx512.mask.cvtudq2pd.128" => "__builtin_ia32_cvtudq2pd128_mask",
+                    "avx512.mask.cvtudq2pd.256" => "__builtin_ia32_cvtudq2pd256_mask",
+                    "avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask",
+                    "avx512.mask.cvtudq2ps.128" => "__builtin_ia32_cvtudq2ps128_mask",
+                    "avx512.mask.cvtudq2ps.256" => "__builtin_ia32_cvtudq2ps256_mask",
+                    "avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask",
+                    "avx512.mask.cvtuqq2pd.128" => "__builtin_ia32_cvtuqq2pd128_mask",
+                    "avx512.mask.cvtuqq2pd.256" => "__builtin_ia32_cvtuqq2pd256_mask",
+                    "avx512.mask.cvtuqq2pd.512" => "__builtin_ia32_cvtuqq2pd512_mask",
+                    "avx512.mask.cvtuqq2ps.128" => "__builtin_ia32_cvtuqq2ps128_mask",
+                    "avx512.mask.cvtuqq2ps.256" => "__builtin_ia32_cvtuqq2ps256_mask",
+                    "avx512.mask.cvtuqq2ps.512" => "__builtin_ia32_cvtuqq2ps512_mask",
+                    "avx512.mask.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask",
+                    "avx512.mask.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask",
+                    "avx512.mask.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask",
+                    "avx512.mask.div.pd.128" => "__builtin_ia32_divpd_mask",
+                    "avx512.mask.div.pd.256" => "__builtin_ia32_divpd256_mask",
+                    "avx512.mask.div.pd.512" => "__builtin_ia32_divpd512_mask",
+                    "avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask",
+                    "avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask",
+                    "avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.div.sd.round" => "__builtin_ia32_divsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.div.ss.round" => "__builtin_ia32_divss_round_mask",
+                    "avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask",
+                    "avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask",
+                    "avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask",
+                    "avx512.mask.expand.load.d.128" => "__builtin_ia32_expandloadsi128_mask",
+                    "avx512.mask.expand.load.d.256" => "__builtin_ia32_expandloadsi256_mask",
+                    "avx512.mask.expand.load.d.512" => "__builtin_ia32_expandloadsi512_mask",
+                    "avx512.mask.expand.load.pd.128" => "__builtin_ia32_expandloaddf128_mask",
+                    "avx512.mask.expand.load.pd.256" => "__builtin_ia32_expandloaddf256_mask",
+                    "avx512.mask.expand.load.pd.512" => "__builtin_ia32_expandloaddf512_mask",
+                    "avx512.mask.expand.load.ps.128" => "__builtin_ia32_expandloadsf128_mask",
+                    "avx512.mask.expand.load.ps.256" => "__builtin_ia32_expandloadsf256_mask",
+                    "avx512.mask.expand.load.ps.512" => "__builtin_ia32_expandloadsf512_mask",
+                    "avx512.mask.expand.load.q.128" => "__builtin_ia32_expandloaddi128_mask",
+                    "avx512.mask.expand.load.q.256" => "__builtin_ia32_expandloaddi256_mask",
+                    "avx512.mask.expand.load.q.512" => "__builtin_ia32_expandloaddi512_mask",
+                    "avx512.mask.expand.pd.128" => "__builtin_ia32_expanddf128_mask",
+                    "avx512.mask.expand.pd.256" => "__builtin_ia32_expanddf256_mask",
+                    "avx512.mask.expand.pd.512" => "__builtin_ia32_expanddf512_mask",
+                    "avx512.mask.expand.ps.128" => "__builtin_ia32_expandsf128_mask",
+                    "avx512.mask.expand.ps.256" => "__builtin_ia32_expandsf256_mask",
+                    "avx512.mask.expand.ps.512" => "__builtin_ia32_expandsf512_mask",
+                    "avx512.mask.expand.q.128" => "__builtin_ia32_expanddi128_mask",
+                    "avx512.mask.expand.q.256" => "__builtin_ia32_expanddi256_mask",
+                    "avx512.mask.expand.q.512" => "__builtin_ia32_expanddi512_mask",
+                    "avx512.mask.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_mask",
+                    "avx512.mask.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_mask",
+                    "avx512.mask.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_mask",
+                    "avx512.mask.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_mask",
+                    "avx512.mask.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_mask",
+                    "avx512.mask.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_mask",
+                    "avx512.mask.fixupimm.sd" => "__builtin_ia32_fixupimmsd_mask",
+                    "avx512.mask.fixupimm.ss" => "__builtin_ia32_fixupimmss_mask",
+                    "avx512.mask.fpclass.pd.128" => "__builtin_ia32_fpclasspd128_mask",
+                    "avx512.mask.fpclass.pd.256" => "__builtin_ia32_fpclasspd256_mask",
+                    "avx512.mask.fpclass.pd.512" => "__builtin_ia32_fpclasspd512_mask",
+                    "avx512.mask.fpclass.ps.128" => "__builtin_ia32_fpclassps128_mask",
+                    "avx512.mask.fpclass.ps.256" => "__builtin_ia32_fpclassps256_mask",
+                    "avx512.mask.fpclass.ps.512" => "__builtin_ia32_fpclassps512_mask",
+                    "avx512.mask.fpclass.sd" => "__builtin_ia32_fpclasssd_mask",
+                    "avx512.mask.fpclass.ss" => "__builtin_ia32_fpclassss_mask",
+                    "avx512.mask.getexp.pd.128" => "__builtin_ia32_getexppd128_mask",
+                    "avx512.mask.getexp.pd.256" => "__builtin_ia32_getexppd256_mask",
+                    "avx512.mask.getexp.pd.512" => "__builtin_ia32_getexppd512_mask",
+                    "avx512.mask.getexp.ps.128" => "__builtin_ia32_getexpps128_mask",
+                    "avx512.mask.getexp.ps.256" => "__builtin_ia32_getexpps256_mask",
+                    "avx512.mask.getexp.ps.512" => "__builtin_ia32_getexpps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getexp.sd" => "__builtin_ia32_getexpsd128_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getexp.ss" => "__builtin_ia32_getexpss128_round_mask",
+                    "avx512.mask.getmant.pd.128" => "__builtin_ia32_getmantpd128_mask",
+                    "avx512.mask.getmant.pd.256" => "__builtin_ia32_getmantpd256_mask",
+                    "avx512.mask.getmant.pd.512" => "__builtin_ia32_getmantpd512_mask",
+                    "avx512.mask.getmant.ps.128" => "__builtin_ia32_getmantps128_mask",
+                    "avx512.mask.getmant.ps.256" => "__builtin_ia32_getmantps256_mask",
+                    "avx512.mask.getmant.ps.512" => "__builtin_ia32_getmantps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getmant.sd" => "__builtin_ia32_getmantsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.getmant.ss" => "__builtin_ia32_getmantss_round_mask",
+                    "avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask",
+                    "avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask",
+                    "avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask",
+                    "avx512.mask.insertf64x2.256" => "__builtin_ia32_insertf64x2_256_mask",
+                    "avx512.mask.insertf64x2.512" => "__builtin_ia32_insertf64x2_512_mask",
+                    "avx512.mask.insertf64x4.512" => "__builtin_ia32_insertf64x4_mask",
+                    "avx512.mask.inserti32x4.256" => "__builtin_ia32_inserti32x4_256_mask",
+                    "avx512.mask.inserti32x4.512" => "__builtin_ia32_inserti32x4_mask",
+                    "avx512.mask.inserti32x8.512" => "__builtin_ia32_inserti32x8_mask",
+                    "avx512.mask.inserti64x2.256" => "__builtin_ia32_inserti64x2_256_mask",
+                    "avx512.mask.inserti64x2.512" => "__builtin_ia32_inserti64x2_512_mask",
+                    "avx512.mask.inserti64x4.512" => "__builtin_ia32_inserti64x4_mask",
+                    "avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask",
+                    "avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask",
+                    "avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask",
+                    "avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask",
+                    "avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask",
+                    "avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask",
+                    "avx512.mask.max.pd.128" => "__builtin_ia32_maxpd_mask",
+                    "avx512.mask.max.pd.256" => "__builtin_ia32_maxpd256_mask",
+                    "avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask",
+                    "avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask",
+                    "avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask",
+                    "avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.max.sd.round" => "__builtin_ia32_maxsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.max.ss.round" => "__builtin_ia32_maxss_round_mask",
+                    "avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask",
+                    "avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask",
+                    "avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask",
+                    "avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask",
+                    "avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask",
+                    "avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.min.sd.round" => "__builtin_ia32_minsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.min.ss.round" => "__builtin_ia32_minss_round_mask",
+                    "avx512.mask.move.sd" => "__builtin_ia32_movsd_mask",
+                    "avx512.mask.move.ss" => "__builtin_ia32_movss_mask",
+                    "avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask",
+                    "avx512.mask.mul.pd.256" => "__builtin_ia32_mulpd256_mask",
+                    "avx512.mask.mul.pd.512" => "__builtin_ia32_mulpd512_mask",
+                    "avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask",
+                    "avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask",
+                    "avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.mul.sd.round" => "__builtin_ia32_mulsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.mul.ss.round" => "__builtin_ia32_mulss_round_mask",
+                    "avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask",
+                    "avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask",
+                    "avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask",
+                    "avx512.mask.or.ps.128" => "__builtin_ia32_orps128_mask",
+                    "avx512.mask.or.ps.256" => "__builtin_ia32_orps256_mask",
+                    "avx512.mask.or.ps.512" => "__builtin_ia32_orps512_mask",
+                    "avx512.mask.pabs.b.128" => "__builtin_ia32_pabsb128_mask",
+                    "avx512.mask.pabs.b.256" => "__builtin_ia32_pabsb256_mask",
+                    "avx512.mask.pabs.b.512" => "__builtin_ia32_pabsb512_mask",
+                    "avx512.mask.pabs.d.128" => "__builtin_ia32_pabsd128_mask",
+                    "avx512.mask.pabs.d.256" => "__builtin_ia32_pabsd256_mask",
+                    "avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask",
+                    "avx512.mask.pabs.q.128" => "__builtin_ia32_pabsq128_mask",
+                    "avx512.mask.pabs.q.256" => "__builtin_ia32_pabsq256_mask",
+                    "avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask",
+                    "avx512.mask.pabs.w.128" => "__builtin_ia32_pabsw128_mask",
+                    "avx512.mask.pabs.w.256" => "__builtin_ia32_pabsw256_mask",
+                    "avx512.mask.pabs.w.512" => "__builtin_ia32_pabsw512_mask",
+                    "avx512.mask.packssdw.128" => "__builtin_ia32_packssdw128_mask",
+                    "avx512.mask.packssdw.256" => "__builtin_ia32_packssdw256_mask",
+                    "avx512.mask.packssdw.512" => "__builtin_ia32_packssdw512_mask",
+                    "avx512.mask.packsswb.128" => "__builtin_ia32_packsswb128_mask",
+                    "avx512.mask.packsswb.256" => "__builtin_ia32_packsswb256_mask",
+                    "avx512.mask.packsswb.512" => "__builtin_ia32_packsswb512_mask",
+                    "avx512.mask.packusdw.128" => "__builtin_ia32_packusdw128_mask",
+                    "avx512.mask.packusdw.256" => "__builtin_ia32_packusdw256_mask",
+                    "avx512.mask.packusdw.512" => "__builtin_ia32_packusdw512_mask",
+                    "avx512.mask.packuswb.128" => "__builtin_ia32_packuswb128_mask",
+                    "avx512.mask.packuswb.256" => "__builtin_ia32_packuswb256_mask",
+                    "avx512.mask.packuswb.512" => "__builtin_ia32_packuswb512_mask",
+                    "avx512.mask.padd.b.128" => "__builtin_ia32_paddb128_mask",
+                    "avx512.mask.padd.b.256" => "__builtin_ia32_paddb256_mask",
+                    "avx512.mask.padd.b.512" => "__builtin_ia32_paddb512_mask",
+                    "avx512.mask.padd.d.128" => "__builtin_ia32_paddd128_mask",
+                    "avx512.mask.padd.d.256" => "__builtin_ia32_paddd256_mask",
+                    "avx512.mask.padd.d.512" => "__builtin_ia32_paddd512_mask",
+                    "avx512.mask.padd.q.128" => "__builtin_ia32_paddq128_mask",
+                    "avx512.mask.padd.q.256" => "__builtin_ia32_paddq256_mask",
+                    "avx512.mask.padd.q.512" => "__builtin_ia32_paddq512_mask",
+                    "avx512.mask.padd.w.128" => "__builtin_ia32_paddw128_mask",
+                    "avx512.mask.padd.w.256" => "__builtin_ia32_paddw256_mask",
+                    "avx512.mask.padd.w.512" => "__builtin_ia32_paddw512_mask",
+                    "avx512.mask.padds.b.128" => "__builtin_ia32_paddsb128_mask",
+                    "avx512.mask.padds.b.256" => "__builtin_ia32_paddsb256_mask",
+                    "avx512.mask.padds.b.512" => "__builtin_ia32_paddsb512_mask",
+                    "avx512.mask.padds.w.128" => "__builtin_ia32_paddsw128_mask",
+                    "avx512.mask.padds.w.256" => "__builtin_ia32_paddsw256_mask",
+                    "avx512.mask.padds.w.512" => "__builtin_ia32_paddsw512_mask",
+                    "avx512.mask.paddus.b.128" => "__builtin_ia32_paddusb128_mask",
+                    "avx512.mask.paddus.b.256" => "__builtin_ia32_paddusb256_mask",
+                    "avx512.mask.paddus.b.512" => "__builtin_ia32_paddusb512_mask",
+                    "avx512.mask.paddus.w.128" => "__builtin_ia32_paddusw128_mask",
+                    "avx512.mask.paddus.w.256" => "__builtin_ia32_paddusw256_mask",
+                    "avx512.mask.paddus.w.512" => "__builtin_ia32_paddusw512_mask",
+                    "avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask",
+                    "avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask",
+                    "avx512.mask.pavg.b.128" => "__builtin_ia32_pavgb128_mask",
+                    "avx512.mask.pavg.b.256" => "__builtin_ia32_pavgb256_mask",
+                    "avx512.mask.pavg.b.512" => "__builtin_ia32_pavgb512_mask",
+                    "avx512.mask.pavg.w.128" => "__builtin_ia32_pavgw128_mask",
+                    "avx512.mask.pavg.w.256" => "__builtin_ia32_pavgw256_mask",
+                    "avx512.mask.pavg.w.512" => "__builtin_ia32_pavgw512_mask",
+                    "avx512.mask.pbroadcast.b.gpr.128" => "__builtin_ia32_pbroadcastb128_gpr_mask",
+                    "avx512.mask.pbroadcast.b.gpr.256" => "__builtin_ia32_pbroadcastb256_gpr_mask",
+                    "avx512.mask.pbroadcast.b.gpr.512" => "__builtin_ia32_pbroadcastb512_gpr_mask",
+                    "avx512.mask.pbroadcast.d.gpr.128" => "__builtin_ia32_pbroadcastd128_gpr_mask",
+                    "avx512.mask.pbroadcast.d.gpr.256" => "__builtin_ia32_pbroadcastd256_gpr_mask",
+                    "avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask",
+                    "avx512.mask.pbroadcast.q.gpr.128" => "__builtin_ia32_pbroadcastq128_gpr_mask",
+                    "avx512.mask.pbroadcast.q.gpr.256" => "__builtin_ia32_pbroadcastq256_gpr_mask",
+                    "avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask",
+                    "avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask",
+                    "avx512.mask.pbroadcast.w.gpr.128" => "__builtin_ia32_pbroadcastw128_gpr_mask",
+                    "avx512.mask.pbroadcast.w.gpr.256" => "__builtin_ia32_pbroadcastw256_gpr_mask",
+                    "avx512.mask.pbroadcast.w.gpr.512" => "__builtin_ia32_pbroadcastw512_gpr_mask",
+                    "avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask",
+                    "avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask",
+                    "avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask",
+                    "avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask",
+                    "avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask",
+                    "avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask",
+                    "avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask",
+                    "avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask",
+                    "avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask",
+                    "avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask",
+                    "avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask",
+                    "avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask",
+                    "avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask",
+                    "avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask",
+                    "avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask",
+                    "avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask",
+                    "avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask",
+                    "avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask",
+                    "avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask",
+                    "avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask",
+                    "avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask",
+                    "avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask",
+                    "avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask",
+                    "avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask",
+                    "avx512.mask.permvar.df.256" => "__builtin_ia32_permvardf256_mask",
+                    "avx512.mask.permvar.df.512" => "__builtin_ia32_permvardf512_mask",
+                    "avx512.mask.permvar.di.256" => "__builtin_ia32_permvardi256_mask",
+                    "avx512.mask.permvar.di.512" => "__builtin_ia32_permvardi512_mask",
+                    "avx512.mask.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask",
+                    "avx512.mask.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask",
+                    "avx512.mask.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask",
+                    "avx512.mask.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask",
+                    "avx512.mask.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask",
+                    "avx512.mask.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask",
+                    "avx512.mask.permvar.sf.256" => "__builtin_ia32_permvarsf256_mask",
+                    "avx512.mask.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask",
+                    "avx512.mask.permvar.si.256" => "__builtin_ia32_permvarsi256_mask",
+                    "avx512.mask.permvar.si.512" => "__builtin_ia32_permvarsi512_mask",
+                    "avx512.mask.pmaddubs.w.128" => "__builtin_ia32_pmaddubsw128_mask",
+                    "avx512.mask.pmaddubs.w.256" => "__builtin_ia32_pmaddubsw256_mask",
+                    "avx512.mask.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask",
+                    "avx512.mask.pmaddw.d.128" => "__builtin_ia32_pmaddwd128_mask",
+                    "avx512.mask.pmaddw.d.256" => "__builtin_ia32_pmaddwd256_mask",
+                    "avx512.mask.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask",
+                    "avx512.mask.pmaxs.b.128" => "__builtin_ia32_pmaxsb128_mask",
+                    "avx512.mask.pmaxs.b.256" => "__builtin_ia32_pmaxsb256_mask",
+                    "avx512.mask.pmaxs.b.512" => "__builtin_ia32_pmaxsb512_mask",
+                    "avx512.mask.pmaxs.d.128" => "__builtin_ia32_pmaxsd128_mask",
+                    "avx512.mask.pmaxs.d.256" => "__builtin_ia32_pmaxsd256_mask",
+                    "avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask",
+                    "avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask",
+                    "avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask",
+                    "avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask",
+                    "avx512.mask.pmaxs.w.128" => "__builtin_ia32_pmaxsw128_mask",
+                    "avx512.mask.pmaxs.w.256" => "__builtin_ia32_pmaxsw256_mask",
+                    "avx512.mask.pmaxs.w.512" => "__builtin_ia32_pmaxsw512_mask",
+                    "avx512.mask.pmaxu.b.128" => "__builtin_ia32_pmaxub128_mask",
+                    "avx512.mask.pmaxu.b.256" => "__builtin_ia32_pmaxub256_mask",
+                    "avx512.mask.pmaxu.b.512" => "__builtin_ia32_pmaxub512_mask",
+                    "avx512.mask.pmaxu.d.128" => "__builtin_ia32_pmaxud128_mask",
+                    "avx512.mask.pmaxu.d.256" => "__builtin_ia32_pmaxud256_mask",
+                    "avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask",
+                    "avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask",
+                    "avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask",
+                    "avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask",
+                    "avx512.mask.pmaxu.w.128" => "__builtin_ia32_pmaxuw128_mask",
+                    "avx512.mask.pmaxu.w.256" => "__builtin_ia32_pmaxuw256_mask",
+                    "avx512.mask.pmaxu.w.512" => "__builtin_ia32_pmaxuw512_mask",
+                    "avx512.mask.pmins.b.128" => "__builtin_ia32_pminsb128_mask",
+                    "avx512.mask.pmins.b.256" => "__builtin_ia32_pminsb256_mask",
+                    "avx512.mask.pmins.b.512" => "__builtin_ia32_pminsb512_mask",
+                    "avx512.mask.pmins.d.128" => "__builtin_ia32_pminsd128_mask",
+                    "avx512.mask.pmins.d.256" => "__builtin_ia32_pminsd256_mask",
+                    "avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask",
+                    "avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask",
+                    "avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask",
+                    "avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask",
+                    "avx512.mask.pmins.w.128" => "__builtin_ia32_pminsw128_mask",
+                    "avx512.mask.pmins.w.256" => "__builtin_ia32_pminsw256_mask",
+                    "avx512.mask.pmins.w.512" => "__builtin_ia32_pminsw512_mask",
+                    "avx512.mask.pminu.b.128" => "__builtin_ia32_pminub128_mask",
+                    "avx512.mask.pminu.b.256" => "__builtin_ia32_pminub256_mask",
+                    "avx512.mask.pminu.b.512" => "__builtin_ia32_pminub512_mask",
+                    "avx512.mask.pminu.d.128" => "__builtin_ia32_pminud128_mask",
+                    "avx512.mask.pminu.d.256" => "__builtin_ia32_pminud256_mask",
+                    "avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask",
+                    "avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask",
+                    "avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask",
+                    "avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask",
+                    "avx512.mask.pminu.w.128" => "__builtin_ia32_pminuw128_mask",
+                    "avx512.mask.pminu.w.256" => "__builtin_ia32_pminuw256_mask",
+                    "avx512.mask.pminu.w.512" => "__builtin_ia32_pminuw512_mask",
+                    "avx512.mask.pmov.db.128" => "__builtin_ia32_pmovdb128_mask",
+                    "avx512.mask.pmov.db.256" => "__builtin_ia32_pmovdb256_mask",
+                    "avx512.mask.pmov.db.512" => "__builtin_ia32_pmovdb512_mask",
+                    "avx512.mask.pmov.db.mem.128" => "__builtin_ia32_pmovdb128mem_mask",
+                    "avx512.mask.pmov.db.mem.256" => "__builtin_ia32_pmovdb256mem_mask",
+                    "avx512.mask.pmov.db.mem.512" => "__builtin_ia32_pmovdb512mem_mask",
+                    "avx512.mask.pmov.dw.128" => "__builtin_ia32_pmovdw128_mask",
+                    "avx512.mask.pmov.dw.256" => "__builtin_ia32_pmovdw256_mask",
+                    "avx512.mask.pmov.dw.512" => "__builtin_ia32_pmovdw512_mask",
+                    "avx512.mask.pmov.dw.mem.128" => "__builtin_ia32_pmovdw128mem_mask",
+                    "avx512.mask.pmov.dw.mem.256" => "__builtin_ia32_pmovdw256mem_mask",
+                    "avx512.mask.pmov.dw.mem.512" => "__builtin_ia32_pmovdw512mem_mask",
+                    "avx512.mask.pmov.qb.128" => "__builtin_ia32_pmovqb128_mask",
+                    "avx512.mask.pmov.qb.256" => "__builtin_ia32_pmovqb256_mask",
+                    "avx512.mask.pmov.qb.512" => "__builtin_ia32_pmovqb512_mask",
+                    "avx512.mask.pmov.qb.mem.128" => "__builtin_ia32_pmovqb128mem_mask",
+                    "avx512.mask.pmov.qb.mem.256" => "__builtin_ia32_pmovqb256mem_mask",
+                    "avx512.mask.pmov.qb.mem.512" => "__builtin_ia32_pmovqb512mem_mask",
+                    "avx512.mask.pmov.qd.128" => "__builtin_ia32_pmovqd128_mask",
+                    "avx512.mask.pmov.qd.256" => "__builtin_ia32_pmovqd256_mask",
+                    "avx512.mask.pmov.qd.512" => "__builtin_ia32_pmovqd512_mask",
+                    "avx512.mask.pmov.qd.mem.128" => "__builtin_ia32_pmovqd128mem_mask",
+                    "avx512.mask.pmov.qd.mem.256" => "__builtin_ia32_pmovqd256mem_mask",
+                    "avx512.mask.pmov.qd.mem.512" => "__builtin_ia32_pmovqd512mem_mask",
+                    "avx512.mask.pmov.qw.128" => "__builtin_ia32_pmovqw128_mask",
+                    "avx512.mask.pmov.qw.256" => "__builtin_ia32_pmovqw256_mask",
+                    "avx512.mask.pmov.qw.512" => "__builtin_ia32_pmovqw512_mask",
+                    "avx512.mask.pmov.qw.mem.128" => "__builtin_ia32_pmovqw128mem_mask",
+                    "avx512.mask.pmov.qw.mem.256" => "__builtin_ia32_pmovqw256mem_mask",
+                    "avx512.mask.pmov.qw.mem.512" => "__builtin_ia32_pmovqw512mem_mask",
+                    "avx512.mask.pmov.wb.128" => "__builtin_ia32_pmovwb128_mask",
+                    "avx512.mask.pmov.wb.256" => "__builtin_ia32_pmovwb256_mask",
+                    "avx512.mask.pmov.wb.512" => "__builtin_ia32_pmovwb512_mask",
+                    "avx512.mask.pmov.wb.mem.128" => "__builtin_ia32_pmovwb128mem_mask",
+                    "avx512.mask.pmov.wb.mem.256" => "__builtin_ia32_pmovwb256mem_mask",
+                    "avx512.mask.pmov.wb.mem.512" => "__builtin_ia32_pmovwb512mem_mask",
+                    "avx512.mask.pmovs.db.128" => "__builtin_ia32_pmovsdb128_mask",
+                    "avx512.mask.pmovs.db.256" => "__builtin_ia32_pmovsdb256_mask",
+                    "avx512.mask.pmovs.db.512" => "__builtin_ia32_pmovsdb512_mask",
+                    "avx512.mask.pmovs.db.mem.128" => "__builtin_ia32_pmovsdb128mem_mask",
+                    "avx512.mask.pmovs.db.mem.256" => "__builtin_ia32_pmovsdb256mem_mask",
+                    "avx512.mask.pmovs.db.mem.512" => "__builtin_ia32_pmovsdb512mem_mask",
+                    "avx512.mask.pmovs.dw.128" => "__builtin_ia32_pmovsdw128_mask",
+                    "avx512.mask.pmovs.dw.256" => "__builtin_ia32_pmovsdw256_mask",
+                    "avx512.mask.pmovs.dw.512" => "__builtin_ia32_pmovsdw512_mask",
+                    "avx512.mask.pmovs.dw.mem.128" => "__builtin_ia32_pmovsdw128mem_mask",
+                    "avx512.mask.pmovs.dw.mem.256" => "__builtin_ia32_pmovsdw256mem_mask",
+                    "avx512.mask.pmovs.dw.mem.512" => "__builtin_ia32_pmovsdw512mem_mask",
+                    "avx512.mask.pmovs.qb.128" => "__builtin_ia32_pmovsqb128_mask",
+                    "avx512.mask.pmovs.qb.256" => "__builtin_ia32_pmovsqb256_mask",
+                    "avx512.mask.pmovs.qb.512" => "__builtin_ia32_pmovsqb512_mask",
+                    "avx512.mask.pmovs.qb.mem.128" => "__builtin_ia32_pmovsqb128mem_mask",
+                    "avx512.mask.pmovs.qb.mem.256" => "__builtin_ia32_pmovsqb256mem_mask",
+                    "avx512.mask.pmovs.qb.mem.512" => "__builtin_ia32_pmovsqb512mem_mask",
+                    "avx512.mask.pmovs.qd.128" => "__builtin_ia32_pmovsqd128_mask",
+                    "avx512.mask.pmovs.qd.256" => "__builtin_ia32_pmovsqd256_mask",
+                    "avx512.mask.pmovs.qd.512" => "__builtin_ia32_pmovsqd512_mask",
+                    "avx512.mask.pmovs.qd.mem.128" => "__builtin_ia32_pmovsqd128mem_mask",
+                    "avx512.mask.pmovs.qd.mem.256" => "__builtin_ia32_pmovsqd256mem_mask",
+                    "avx512.mask.pmovs.qd.mem.512" => "__builtin_ia32_pmovsqd512mem_mask",
+                    "avx512.mask.pmovs.qw.128" => "__builtin_ia32_pmovsqw128_mask",
+                    "avx512.mask.pmovs.qw.256" => "__builtin_ia32_pmovsqw256_mask",
+                    "avx512.mask.pmovs.qw.512" => "__builtin_ia32_pmovsqw512_mask",
+                    "avx512.mask.pmovs.qw.mem.128" => "__builtin_ia32_pmovsqw128mem_mask",
+                    "avx512.mask.pmovs.qw.mem.256" => "__builtin_ia32_pmovsqw256mem_mask",
+                    "avx512.mask.pmovs.qw.mem.512" => "__builtin_ia32_pmovsqw512mem_mask",
+                    "avx512.mask.pmovs.wb.128" => "__builtin_ia32_pmovswb128_mask",
+                    "avx512.mask.pmovs.wb.256" => "__builtin_ia32_pmovswb256_mask",
+                    "avx512.mask.pmovs.wb.512" => "__builtin_ia32_pmovswb512_mask",
+                    "avx512.mask.pmovs.wb.mem.128" => "__builtin_ia32_pmovswb128mem_mask",
+                    "avx512.mask.pmovs.wb.mem.256" => "__builtin_ia32_pmovswb256mem_mask",
+                    "avx512.mask.pmovs.wb.mem.512" => "__builtin_ia32_pmovswb512mem_mask",
+                    "avx512.mask.pmovsxb.d.128" => "__builtin_ia32_pmovsxbd128_mask",
+                    "avx512.mask.pmovsxb.d.256" => "__builtin_ia32_pmovsxbd256_mask",
+                    "avx512.mask.pmovsxb.d.512" => "__builtin_ia32_pmovsxbd512_mask",
+                    "avx512.mask.pmovsxb.q.128" => "__builtin_ia32_pmovsxbq128_mask",
+                    "avx512.mask.pmovsxb.q.256" => "__builtin_ia32_pmovsxbq256_mask",
+                    "avx512.mask.pmovsxb.q.512" => "__builtin_ia32_pmovsxbq512_mask",
+                    "avx512.mask.pmovsxb.w.128" => "__builtin_ia32_pmovsxbw128_mask",
+                    "avx512.mask.pmovsxb.w.256" => "__builtin_ia32_pmovsxbw256_mask",
+                    "avx512.mask.pmovsxb.w.512" => "__builtin_ia32_pmovsxbw512_mask",
+                    "avx512.mask.pmovsxd.q.128" => "__builtin_ia32_pmovsxdq128_mask",
+                    "avx512.mask.pmovsxd.q.256" => "__builtin_ia32_pmovsxdq256_mask",
+                    "avx512.mask.pmovsxd.q.512" => "__builtin_ia32_pmovsxdq512_mask",
+                    "avx512.mask.pmovsxw.d.128" => "__builtin_ia32_pmovsxwd128_mask",
+                    "avx512.mask.pmovsxw.d.256" => "__builtin_ia32_pmovsxwd256_mask",
+                    "avx512.mask.pmovsxw.d.512" => "__builtin_ia32_pmovsxwd512_mask",
+                    "avx512.mask.pmovsxw.q.128" => "__builtin_ia32_pmovsxwq128_mask",
+                    "avx512.mask.pmovsxw.q.256" => "__builtin_ia32_pmovsxwq256_mask",
+                    "avx512.mask.pmovsxw.q.512" => "__builtin_ia32_pmovsxwq512_mask",
+                    "avx512.mask.pmovus.db.128" => "__builtin_ia32_pmovusdb128_mask",
+                    "avx512.mask.pmovus.db.256" => "__builtin_ia32_pmovusdb256_mask",
+                    "avx512.mask.pmovus.db.512" => "__builtin_ia32_pmovusdb512_mask",
+                    "avx512.mask.pmovus.db.mem.128" => "__builtin_ia32_pmovusdb128mem_mask",
+                    "avx512.mask.pmovus.db.mem.256" => "__builtin_ia32_pmovusdb256mem_mask",
+                    "avx512.mask.pmovus.db.mem.512" => "__builtin_ia32_pmovusdb512mem_mask",
+                    "avx512.mask.pmovus.dw.128" => "__builtin_ia32_pmovusdw128_mask",
+                    "avx512.mask.pmovus.dw.256" => "__builtin_ia32_pmovusdw256_mask",
+                    "avx512.mask.pmovus.dw.512" => "__builtin_ia32_pmovusdw512_mask",
+                    "avx512.mask.pmovus.dw.mem.128" => "__builtin_ia32_pmovusdw128mem_mask",
+                    "avx512.mask.pmovus.dw.mem.256" => "__builtin_ia32_pmovusdw256mem_mask",
+                    "avx512.mask.pmovus.dw.mem.512" => "__builtin_ia32_pmovusdw512mem_mask",
+                    "avx512.mask.pmovus.qb.128" => "__builtin_ia32_pmovusqb128_mask",
+                    "avx512.mask.pmovus.qb.256" => "__builtin_ia32_pmovusqb256_mask",
+                    "avx512.mask.pmovus.qb.512" => "__builtin_ia32_pmovusqb512_mask",
+                    "avx512.mask.pmovus.qb.mem.128" => "__builtin_ia32_pmovusqb128mem_mask",
+                    "avx512.mask.pmovus.qb.mem.256" => "__builtin_ia32_pmovusqb256mem_mask",
+                    "avx512.mask.pmovus.qb.mem.512" => "__builtin_ia32_pmovusqb512mem_mask",
+                    "avx512.mask.pmovus.qd.128" => "__builtin_ia32_pmovusqd128_mask",
+                    "avx512.mask.pmovus.qd.256" => "__builtin_ia32_pmovusqd256_mask",
+                    "avx512.mask.pmovus.qd.512" => "__builtin_ia32_pmovusqd512_mask",
+                    "avx512.mask.pmovus.qd.mem.128" => "__builtin_ia32_pmovusqd128mem_mask",
+                    "avx512.mask.pmovus.qd.mem.256" => "__builtin_ia32_pmovusqd256mem_mask",
+                    "avx512.mask.pmovus.qd.mem.512" => "__builtin_ia32_pmovusqd512mem_mask",
+                    "avx512.mask.pmovus.qw.128" => "__builtin_ia32_pmovusqw128_mask",
+                    "avx512.mask.pmovus.qw.256" => "__builtin_ia32_pmovusqw256_mask",
+                    "avx512.mask.pmovus.qw.512" => "__builtin_ia32_pmovusqw512_mask",
+                    "avx512.mask.pmovus.qw.mem.128" => "__builtin_ia32_pmovusqw128mem_mask",
+                    "avx512.mask.pmovus.qw.mem.256" => "__builtin_ia32_pmovusqw256mem_mask",
+                    "avx512.mask.pmovus.qw.mem.512" => "__builtin_ia32_pmovusqw512mem_mask",
+                    "avx512.mask.pmovus.wb.128" => "__builtin_ia32_pmovuswb128_mask",
+                    "avx512.mask.pmovus.wb.256" => "__builtin_ia32_pmovuswb256_mask",
+                    "avx512.mask.pmovus.wb.512" => "__builtin_ia32_pmovuswb512_mask",
+                    "avx512.mask.pmovus.wb.mem.128" => "__builtin_ia32_pmovuswb128mem_mask",
+                    "avx512.mask.pmovus.wb.mem.256" => "__builtin_ia32_pmovuswb256mem_mask",
+                    "avx512.mask.pmovus.wb.mem.512" => "__builtin_ia32_pmovuswb512mem_mask",
+                    "avx512.mask.pmovzxb.d.128" => "__builtin_ia32_pmovzxbd128_mask",
+                    "avx512.mask.pmovzxb.d.256" => "__builtin_ia32_pmovzxbd256_mask",
+                    "avx512.mask.pmovzxb.d.512" => "__builtin_ia32_pmovzxbd512_mask",
+                    "avx512.mask.pmovzxb.q.128" => "__builtin_ia32_pmovzxbq128_mask",
+                    "avx512.mask.pmovzxb.q.256" => "__builtin_ia32_pmovzxbq256_mask",
+                    "avx512.mask.pmovzxb.q.512" => "__builtin_ia32_pmovzxbq512_mask",
+                    "avx512.mask.pmovzxb.w.128" => "__builtin_ia32_pmovzxbw128_mask",
+                    "avx512.mask.pmovzxb.w.256" => "__builtin_ia32_pmovzxbw256_mask",
+                    "avx512.mask.pmovzxb.w.512" => "__builtin_ia32_pmovzxbw512_mask",
+                    "avx512.mask.pmovzxd.q.128" => "__builtin_ia32_pmovzxdq128_mask",
+                    "avx512.mask.pmovzxd.q.256" => "__builtin_ia32_pmovzxdq256_mask",
+                    "avx512.mask.pmovzxd.q.512" => "__builtin_ia32_pmovzxdq512_mask",
+                    "avx512.mask.pmovzxw.d.128" => "__builtin_ia32_pmovzxwd128_mask",
+                    "avx512.mask.pmovzxw.d.256" => "__builtin_ia32_pmovzxwd256_mask",
+                    "avx512.mask.pmovzxw.d.512" => "__builtin_ia32_pmovzxwd512_mask",
+                    "avx512.mask.pmovzxw.q.128" => "__builtin_ia32_pmovzxwq128_mask",
+                    "avx512.mask.pmovzxw.q.256" => "__builtin_ia32_pmovzxwq256_mask",
+                    "avx512.mask.pmovzxw.q.512" => "__builtin_ia32_pmovzxwq512_mask",
+                    "avx512.mask.pmul.dq.128" => "__builtin_ia32_pmuldq128_mask",
+                    "avx512.mask.pmul.dq.256" => "__builtin_ia32_pmuldq256_mask",
+                    "avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask",
+                    "avx512.mask.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128_mask",
+                    "avx512.mask.pmul.hr.sw.256" => "__builtin_ia32_pmulhrsw256_mask",
+                    "avx512.mask.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask",
+                    "avx512.mask.pmulh.w.128" => "__builtin_ia32_pmulhw128_mask",
+                    "avx512.mask.pmulh.w.256" => "__builtin_ia32_pmulhw256_mask",
+                    "avx512.mask.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask",
+                    "avx512.mask.pmulhu.w.128" => "__builtin_ia32_pmulhuw128_mask",
+                    "avx512.mask.pmulhu.w.256" => "__builtin_ia32_pmulhuw256_mask",
+                    "avx512.mask.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask",
+                    "avx512.mask.pmull.d.128" => "__builtin_ia32_pmulld128_mask",
+                    "avx512.mask.pmull.d.256" => "__builtin_ia32_pmulld256_mask",
+                    "avx512.mask.pmull.d.512" => "__builtin_ia32_pmulld512_mask",
+                    "avx512.mask.pmull.q.128" => "__builtin_ia32_pmullq128_mask",
+                    "avx512.mask.pmull.q.256" => "__builtin_ia32_pmullq256_mask",
+                    "avx512.mask.pmull.q.512" => "__builtin_ia32_pmullq512_mask",
+                    "avx512.mask.pmull.w.128" => "__builtin_ia32_pmullw128_mask",
+                    "avx512.mask.pmull.w.256" => "__builtin_ia32_pmullw256_mask",
+                    "avx512.mask.pmull.w.512" => "__builtin_ia32_pmullw512_mask",
+                    "avx512.mask.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask",
+                    "avx512.mask.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask",
+                    "avx512.mask.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask",
+                    "avx512.mask.pmulu.dq.128" => "__builtin_ia32_pmuludq128_mask",
+                    "avx512.mask.pmulu.dq.256" => "__builtin_ia32_pmuludq256_mask",
+                    "avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask",
+                    "avx512.mask.prol.d.128" => "__builtin_ia32_prold128_mask",
+                    "avx512.mask.prol.d.256" => "__builtin_ia32_prold256_mask",
+                    "avx512.mask.prol.d.512" => "__builtin_ia32_prold512_mask",
+                    "avx512.mask.prol.q.128" => "__builtin_ia32_prolq128_mask",
+                    "avx512.mask.prol.q.256" => "__builtin_ia32_prolq256_mask",
+                    "avx512.mask.prol.q.512" => "__builtin_ia32_prolq512_mask",
+                    "avx512.mask.prolv.d.128" => "__builtin_ia32_prolvd128_mask",
+                    "avx512.mask.prolv.d.256" => "__builtin_ia32_prolvd256_mask",
+                    "avx512.mask.prolv.d.512" => "__builtin_ia32_prolvd512_mask",
+                    "avx512.mask.prolv.q.128" => "__builtin_ia32_prolvq128_mask",
+                    "avx512.mask.prolv.q.256" => "__builtin_ia32_prolvq256_mask",
+                    "avx512.mask.prolv.q.512" => "__builtin_ia32_prolvq512_mask",
+                    "avx512.mask.pror.d.128" => "__builtin_ia32_prord128_mask",
+                    "avx512.mask.pror.d.256" => "__builtin_ia32_prord256_mask",
+                    "avx512.mask.pror.d.512" => "__builtin_ia32_prord512_mask",
+                    "avx512.mask.pror.q.128" => "__builtin_ia32_prorq128_mask",
+                    "avx512.mask.pror.q.256" => "__builtin_ia32_prorq256_mask",
+                    "avx512.mask.pror.q.512" => "__builtin_ia32_prorq512_mask",
+                    "avx512.mask.prorv.d.128" => "__builtin_ia32_prorvd128_mask",
+                    "avx512.mask.prorv.d.256" => "__builtin_ia32_prorvd256_mask",
+                    "avx512.mask.prorv.d.512" => "__builtin_ia32_prorvd512_mask",
+                    "avx512.mask.prorv.q.128" => "__builtin_ia32_prorvq128_mask",
+                    "avx512.mask.prorv.q.256" => "__builtin_ia32_prorvq256_mask",
+                    "avx512.mask.prorv.q.512" => "__builtin_ia32_prorvq512_mask",
+                    "avx512.mask.pshuf.b.128" => "__builtin_ia32_pshufb128_mask",
+                    "avx512.mask.pshuf.b.256" => "__builtin_ia32_pshufb256_mask",
+                    "avx512.mask.pshuf.b.512" => "__builtin_ia32_pshufb512_mask",
+                    "avx512.mask.psll.d" => "__builtin_ia32_pslld512_mask",
+                    "avx512.mask.psll.d.128" => "__builtin_ia32_pslld128_mask",
+                    "avx512.mask.psll.d.256" => "__builtin_ia32_pslld256_mask",
+                    "avx512.mask.psll.di.128" => "__builtin_ia32_pslldi128_mask",
+                    "avx512.mask.psll.di.256" => "__builtin_ia32_pslldi256_mask",
+                    "avx512.mask.psll.di.512" => "__builtin_ia32_pslldi512_mask",
+                    "avx512.mask.psll.q" => "__builtin_ia32_psllq512_mask",
+                    "avx512.mask.psll.q.128" => "__builtin_ia32_psllq128_mask",
+                    "avx512.mask.psll.q.256" => "__builtin_ia32_psllq256_mask",
+                    "avx512.mask.psll.qi.128" => "__builtin_ia32_psllqi128_mask",
+                    "avx512.mask.psll.qi.256" => "__builtin_ia32_psllqi256_mask",
+                    "avx512.mask.psll.qi.512" => "__builtin_ia32_psllqi512_mask",
+                    "avx512.mask.psll.w.128" => "__builtin_ia32_psllw128_mask",
+                    "avx512.mask.psll.w.256" => "__builtin_ia32_psllw256_mask",
+                    "avx512.mask.psll.w.512" => "__builtin_ia32_psllw512_mask",
+                    "avx512.mask.psll.wi.128" => "__builtin_ia32_psllwi128_mask",
+                    "avx512.mask.psll.wi.256" => "__builtin_ia32_psllwi256_mask",
+                    "avx512.mask.psll.wi.512" => "__builtin_ia32_psllwi512_mask",
+                    "avx512.mask.psllv.d" => "__builtin_ia32_psllv16si_mask",
+                    "avx512.mask.psllv.q" => "__builtin_ia32_psllv8di_mask",
+                    "avx512.mask.psllv16.hi" => "__builtin_ia32_psllv16hi_mask",
+                    "avx512.mask.psllv2.di" => "__builtin_ia32_psllv2di_mask",
+                    "avx512.mask.psllv32hi" => "__builtin_ia32_psllv32hi_mask",
+                    "avx512.mask.psllv4.di" => "__builtin_ia32_psllv4di_mask",
+                    "avx512.mask.psllv4.si" => "__builtin_ia32_psllv4si_mask",
+                    "avx512.mask.psllv8.hi" => "__builtin_ia32_psllv8hi_mask",
+                    "avx512.mask.psllv8.si" => "__builtin_ia32_psllv8si_mask",
+                    "avx512.mask.psra.d" => "__builtin_ia32_psrad512_mask",
+                    "avx512.mask.psra.d.128" => "__builtin_ia32_psrad128_mask",
+                    "avx512.mask.psra.d.256" => "__builtin_ia32_psrad256_mask",
+                    "avx512.mask.psra.di.128" => "__builtin_ia32_psradi128_mask",
+                    "avx512.mask.psra.di.256" => "__builtin_ia32_psradi256_mask",
+                    "avx512.mask.psra.di.512" => "__builtin_ia32_psradi512_mask",
+                    "avx512.mask.psra.q" => "__builtin_ia32_psraq512_mask",
+                    "avx512.mask.psra.q.128" => "__builtin_ia32_psraq128_mask",
+                    "avx512.mask.psra.q.256" => "__builtin_ia32_psraq256_mask",
+                    "avx512.mask.psra.qi.128" => "__builtin_ia32_psraqi128_mask",
+                    "avx512.mask.psra.qi.256" => "__builtin_ia32_psraqi256_mask",
+                    "avx512.mask.psra.qi.512" => "__builtin_ia32_psraqi512_mask",
+                    "avx512.mask.psra.w.128" => "__builtin_ia32_psraw128_mask",
+                    "avx512.mask.psra.w.256" => "__builtin_ia32_psraw256_mask",
+                    "avx512.mask.psra.w.512" => "__builtin_ia32_psraw512_mask",
+                    "avx512.mask.psra.wi.128" => "__builtin_ia32_psrawi128_mask",
+                    "avx512.mask.psra.wi.256" => "__builtin_ia32_psrawi256_mask",
+                    "avx512.mask.psra.wi.512" => "__builtin_ia32_psrawi512_mask",
+                    "avx512.mask.psrav.d" => "__builtin_ia32_psrav16si_mask",
+                    "avx512.mask.psrav.q" => "__builtin_ia32_psrav8di_mask",
+                    "avx512.mask.psrav.q.128" => "__builtin_ia32_psravq128_mask",
+                    "avx512.mask.psrav.q.256" => "__builtin_ia32_psravq256_mask",
+                    "avx512.mask.psrav16.hi" => "__builtin_ia32_psrav16hi_mask",
+                    "avx512.mask.psrav32.hi" => "__builtin_ia32_psrav32hi_mask",
+                    "avx512.mask.psrav4.si" => "__builtin_ia32_psrav4si_mask",
+                    "avx512.mask.psrav8.hi" => "__builtin_ia32_psrav8hi_mask",
+                    "avx512.mask.psrav8.si" => "__builtin_ia32_psrav8si_mask",
+                    "avx512.mask.psrl.d" => "__builtin_ia32_psrld512_mask",
+                    "avx512.mask.psrl.d.128" => "__builtin_ia32_psrld128_mask",
+                    "avx512.mask.psrl.d.256" => "__builtin_ia32_psrld256_mask",
+                    "avx512.mask.psrl.di.128" => "__builtin_ia32_psrldi128_mask",
+                    "avx512.mask.psrl.di.256" => "__builtin_ia32_psrldi256_mask",
+                    "avx512.mask.psrl.di.512" => "__builtin_ia32_psrldi512_mask",
+                    "avx512.mask.psrl.q" => "__builtin_ia32_psrlq512_mask",
+                    "avx512.mask.psrl.q.128" => "__builtin_ia32_psrlq128_mask",
+                    "avx512.mask.psrl.q.256" => "__builtin_ia32_psrlq256_mask",
+                    "avx512.mask.psrl.qi.128" => "__builtin_ia32_psrlqi128_mask",
+                    "avx512.mask.psrl.qi.256" => "__builtin_ia32_psrlqi256_mask",
+                    "avx512.mask.psrl.qi.512" => "__builtin_ia32_psrlqi512_mask",
+                    "avx512.mask.psrl.w.128" => "__builtin_ia32_psrlw128_mask",
+                    "avx512.mask.psrl.w.256" => "__builtin_ia32_psrlw256_mask",
+                    "avx512.mask.psrl.w.512" => "__builtin_ia32_psrlw512_mask",
+                    "avx512.mask.psrl.wi.128" => "__builtin_ia32_psrlwi128_mask",
+                    "avx512.mask.psrl.wi.256" => "__builtin_ia32_psrlwi256_mask",
+                    "avx512.mask.psrl.wi.512" => "__builtin_ia32_psrlwi512_mask",
+                    "avx512.mask.psrlv.d" => "__builtin_ia32_psrlv16si_mask",
+                    "avx512.mask.psrlv.q" => "__builtin_ia32_psrlv8di_mask",
+                    "avx512.mask.psrlv16.hi" => "__builtin_ia32_psrlv16hi_mask",
+                    "avx512.mask.psrlv2.di" => "__builtin_ia32_psrlv2di_mask",
+                    "avx512.mask.psrlv32hi" => "__builtin_ia32_psrlv32hi_mask",
+                    "avx512.mask.psrlv4.di" => "__builtin_ia32_psrlv4di_mask",
+                    "avx512.mask.psrlv4.si" => "__builtin_ia32_psrlv4si_mask",
+                    "avx512.mask.psrlv8.hi" => "__builtin_ia32_psrlv8hi_mask",
+                    "avx512.mask.psrlv8.si" => "__builtin_ia32_psrlv8si_mask",
+                    "avx512.mask.psub.b.128" => "__builtin_ia32_psubb128_mask",
+                    "avx512.mask.psub.b.256" => "__builtin_ia32_psubb256_mask",
+                    "avx512.mask.psub.b.512" => "__builtin_ia32_psubb512_mask",
+                    "avx512.mask.psub.d.128" => "__builtin_ia32_psubd128_mask",
+                    "avx512.mask.psub.d.256" => "__builtin_ia32_psubd256_mask",
+                    "avx512.mask.psub.d.512" => "__builtin_ia32_psubd512_mask",
+                    "avx512.mask.psub.q.128" => "__builtin_ia32_psubq128_mask",
+                    "avx512.mask.psub.q.256" => "__builtin_ia32_psubq256_mask",
+                    "avx512.mask.psub.q.512" => "__builtin_ia32_psubq512_mask",
+                    "avx512.mask.psub.w.128" => "__builtin_ia32_psubw128_mask",
+                    "avx512.mask.psub.w.256" => "__builtin_ia32_psubw256_mask",
+                    "avx512.mask.psub.w.512" => "__builtin_ia32_psubw512_mask",
+                    "avx512.mask.psubs.b.128" => "__builtin_ia32_psubsb128_mask",
+                    "avx512.mask.psubs.b.256" => "__builtin_ia32_psubsb256_mask",
+                    "avx512.mask.psubs.b.512" => "__builtin_ia32_psubsb512_mask",
+                    "avx512.mask.psubs.w.128" => "__builtin_ia32_psubsw128_mask",
+                    "avx512.mask.psubs.w.256" => "__builtin_ia32_psubsw256_mask",
+                    "avx512.mask.psubs.w.512" => "__builtin_ia32_psubsw512_mask",
+                    "avx512.mask.psubus.b.128" => "__builtin_ia32_psubusb128_mask",
+                    "avx512.mask.psubus.b.256" => "__builtin_ia32_psubusb256_mask",
+                    "avx512.mask.psubus.b.512" => "__builtin_ia32_psubusb512_mask",
+                    "avx512.mask.psubus.w.128" => "__builtin_ia32_psubusw128_mask",
+                    "avx512.mask.psubus.w.256" => "__builtin_ia32_psubusw256_mask",
+                    "avx512.mask.psubus.w.512" => "__builtin_ia32_psubusw512_mask",
+                    "avx512.mask.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask",
+                    "avx512.mask.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask",
+                    "avx512.mask.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask",
+                    "avx512.mask.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask",
+                    "avx512.mask.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask",
+                    "avx512.mask.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask",
+                    "avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+                    "avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+                    "avx512.mask.range.pd.128" => "__builtin_ia32_rangepd128_mask",
+                    "avx512.mask.range.pd.256" => "__builtin_ia32_rangepd256_mask",
+                    "avx512.mask.range.pd.512" => "__builtin_ia32_rangepd512_mask",
+                    "avx512.mask.range.ps.128" => "__builtin_ia32_rangeps128_mask",
+                    "avx512.mask.range.ps.256" => "__builtin_ia32_rangeps256_mask",
+                    "avx512.mask.range.ps.512" => "__builtin_ia32_rangeps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.range.sd" => "__builtin_ia32_rangesd128_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.range.ss" => "__builtin_ia32_rangess128_round_mask",
+                    "avx512.mask.reduce.pd.128" => "__builtin_ia32_reducepd128_mask",
+                    "avx512.mask.reduce.pd.256" => "__builtin_ia32_reducepd256_mask",
+                    "avx512.mask.reduce.pd.512" => "__builtin_ia32_reducepd512_mask",
+                    "avx512.mask.reduce.ps.128" => "__builtin_ia32_reduceps128_mask",
+                    "avx512.mask.reduce.ps.256" => "__builtin_ia32_reduceps256_mask",
+                    "avx512.mask.reduce.ps.512" => "__builtin_ia32_reduceps512_mask",
+                    "avx512.mask.reduce.sd" => "__builtin_ia32_reducesd_mask",
+                    "avx512.mask.reduce.ss" => "__builtin_ia32_reducess_mask",
+                    "avx512.mask.rndscale.pd.128" => "__builtin_ia32_rndscalepd_128_mask",
+                    "avx512.mask.rndscale.pd.256" => "__builtin_ia32_rndscalepd_256_mask",
+                    "avx512.mask.rndscale.pd.512" => "__builtin_ia32_rndscalepd_mask",
+                    "avx512.mask.rndscale.ps.128" => "__builtin_ia32_rndscaleps_128_mask",
+                    "avx512.mask.rndscale.ps.256" => "__builtin_ia32_rndscaleps_256_mask",
+                    "avx512.mask.rndscale.ps.512" => "__builtin_ia32_rndscaleps_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.rndscale.sd" => "__builtin_ia32_rndscalesd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.rndscale.ss" => "__builtin_ia32_rndscaless_round_mask",
+                    "avx512.mask.scalef.pd.128" => "__builtin_ia32_scalefpd128_mask",
+                    "avx512.mask.scalef.pd.256" => "__builtin_ia32_scalefpd256_mask",
+                    "avx512.mask.scalef.pd.512" => "__builtin_ia32_scalefpd512_mask",
+                    "avx512.mask.scalef.ps.128" => "__builtin_ia32_scalefps128_mask",
+                    "avx512.mask.scalef.ps.256" => "__builtin_ia32_scalefps256_mask",
+                    "avx512.mask.scalef.ps.512" => "__builtin_ia32_scalefps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.scalef.sd" => "__builtin_ia32_scalefsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.scalef.ss" => "__builtin_ia32_scalefss_round_mask",
+                    "avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask",
+                    "avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask",
+                    "avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask",
+                    "avx512.mask.shuf.f64x2.256" => "__builtin_ia32_shuf_f64x2_256_mask",
+                    "avx512.mask.shuf.i32x4" => "__builtin_ia32_shuf_i32x4_mask",
+                    "avx512.mask.shuf.i32x4.256" => "__builtin_ia32_shuf_i32x4_256_mask",
+                    "avx512.mask.shuf.i64x2" => "__builtin_ia32_shuf_i64x2_mask",
+                    "avx512.mask.shuf.i64x2.256" => "__builtin_ia32_shuf_i64x2_256_mask",
+                    "avx512.mask.shuf.pd.128" => "__builtin_ia32_shufpd128_mask",
+                    "avx512.mask.shuf.pd.256" => "__builtin_ia32_shufpd256_mask",
+                    "avx512.mask.shuf.pd.512" => "__builtin_ia32_shufpd512_mask",
+                    "avx512.mask.shuf.ps.128" => "__builtin_ia32_shufps128_mask",
+                    "avx512.mask.shuf.ps.256" => "__builtin_ia32_shufps256_mask",
+                    "avx512.mask.shuf.ps.512" => "__builtin_ia32_shufps512_mask",
+                    "avx512.mask.sqrt.pd.128" => "__builtin_ia32_sqrtpd128_mask",
+                    "avx512.mask.sqrt.pd.256" => "__builtin_ia32_sqrtpd256_mask",
+                    "avx512.mask.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+                    "avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask",
+                    "avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask",
+                    "avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sqrt.sd" => "__builtin_ia32_sqrtsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sqrt.ss" => "__builtin_ia32_sqrtss_round_mask",
+                    "avx512.mask.store.ss" => "__builtin_ia32_storess_mask",
+                    "avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask",
+                    "avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask",
+                    "avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask",
+                    "avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask",
+                    "avx512.mask.sub.pd.128" => "__builtin_ia32_subpd128_mask",
+                    "avx512.mask.sub.pd.256" => "__builtin_ia32_subpd256_mask",
+                    "avx512.mask.sub.pd.512" => "__builtin_ia32_subpd512_mask",
+                    "avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask",
+                    "avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask",
+                    "avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sub.sd.round" => "__builtin_ia32_subsd_round_mask",
+                    // [INVALID CONVERSION]: "avx512.mask.sub.ss.round" => "__builtin_ia32_subss_round_mask",
+                    "avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask",
+                    "avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask",
+                    "avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask",
+                    "avx512.mask.valign.q.128" => "__builtin_ia32_alignq128_mask",
+                    "avx512.mask.valign.q.256" => "__builtin_ia32_alignq256_mask",
+                    "avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask",
+                    "avx512.mask.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps_mask",
+                    "avx512.mask.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256_mask",
+                    "avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask",
+                    "avx512.mask.vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph_mask",
+                    "avx512.mask.vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256_mask",
+                    "avx512.mask.vcvtps2ph.512" => "__builtin_ia32_vcvtps2ph512_mask",
+                    "avx512.mask.vextractf32x4.256" => "__builtin_ia32_extractf32x4_256_mask",
+                    "avx512.mask.vextractf32x4.512" => "__builtin_ia32_extractf32x4_mask",
+                    "avx512.mask.vextractf32x8.512" => "__builtin_ia32_extractf32x8_mask",
+                    "avx512.mask.vextractf64x2.256" => "__builtin_ia32_extractf64x2_256_mask",
+                    "avx512.mask.vextractf64x2.512" => "__builtin_ia32_extractf64x2_512_mask",
+                    "avx512.mask.vextractf64x4.512" => "__builtin_ia32_extractf64x4_mask",
+                    "avx512.mask.vextracti32x4.256" => "__builtin_ia32_extracti32x4_256_mask",
+                    "avx512.mask.vextracti32x4.512" => "__builtin_ia32_extracti32x4_mask",
+                    "avx512.mask.vextracti32x8.512" => "__builtin_ia32_extracti32x8_mask",
+                    "avx512.mask.vextracti64x2.256" => "__builtin_ia32_extracti64x2_256_mask",
+                    "avx512.mask.vextracti64x2.512" => "__builtin_ia32_extracti64x2_512_mask",
+                    "avx512.mask.vextracti64x4.512" => "__builtin_ia32_extracti64x4_mask",
+                    "avx512.mask.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask",
+                    "avx512.mask.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask",
+                    "avx512.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+                    "avx512.mask.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask",
+                    "avx512.mask.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask",
+                    "avx512.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+                    "avx512.mask.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask",
+                    "avx512.mask.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask",
+                    "avx512.mask.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask",
+                    "avx512.mask.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask",
+                    "avx512.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+                    "avx512.mask.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask",
+                    "avx512.mask.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask",
+                    "avx512.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+                    "avx512.mask.vfnmadd.pd.128" => "__builtin_ia32_vfnmaddpd128_mask",
+                    "avx512.mask.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256_mask",
+                    "avx512.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+                    "avx512.mask.vfnmadd.ps.128" => "__builtin_ia32_vfnmaddps128_mask",
+                    "avx512.mask.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256_mask",
+                    "avx512.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+                    "avx512.mask.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask",
+                    "avx512.mask.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask",
+                    "avx512.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+                    "avx512.mask.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask",
+                    "avx512.mask.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask",
+                    "avx512.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+                    "avx512.mask.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask",
+                    "avx512.mask.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask",
+                    "avx512.mask.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask",
+                    "avx512.mask.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128_mask",
+                    "avx512.mask.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256_mask",
+                    "avx512.mask.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512_mask",
+                    "avx512.mask.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask",
+                    "avx512.mask.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask",
+                    "avx512.mask.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask",
+                    "avx512.mask.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask",
+                    "avx512.mask.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask",
+                    "avx512.mask.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask",
+                    "avx512.mask.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask",
+                    "avx512.mask.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask",
+                    "avx512.mask.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask",
+                    "avx512.mask.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128_mask",
+                    "avx512.mask.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256_mask",
+                    "avx512.mask.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512_mask",
+                    "avx512.mask.vpermilvar.pd.128" => "__builtin_ia32_vpermilvarpd_mask",
+                    "avx512.mask.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256_mask",
+                    "avx512.mask.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask",
+                    "avx512.mask.vpermilvar.ps.128" => "__builtin_ia32_vpermilvarps_mask",
+                    "avx512.mask.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256_mask",
+                    "avx512.mask.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask",
+                    "avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+                    "avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+                    "avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+                    "avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+                    "avx512.mask.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_mask",
+                    "avx512.mask.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_mask",
+                    "avx512.mask.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_mask",
+                    "avx512.mask.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask",
+                    "avx512.mask.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask",
+                    "avx512.mask.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask",
+                    "avx512.mask.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_mask",
+                    "avx512.mask.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_mask",
+                    "avx512.mask.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_mask",
+                    "avx512.mask.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_mask",
+                    "avx512.mask.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_mask",
+                    "avx512.mask.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_mask",
+                    "avx512.mask.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_mask",
+                    "avx512.mask.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_mask",
+                    "avx512.mask.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_mask",
+                    "avx512.mask.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask",
+                    "avx512.mask.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask",
+                    "avx512.mask.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask",
+                    "avx512.mask.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask",
+                    "avx512.mask.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask",
+                    "avx512.mask.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask",
+                    "avx512.mask.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_mask",
+                    "avx512.mask.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask",
+                    "avx512.mask.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask",
+                    "avx512.mask.xor.pd.128" => "__builtin_ia32_xorpd128_mask",
+                    "avx512.mask.xor.pd.256" => "__builtin_ia32_xorpd256_mask",
+                    "avx512.mask.xor.pd.512" => "__builtin_ia32_xorpd512_mask",
+                    "avx512.mask.xor.ps.128" => "__builtin_ia32_xorps128_mask",
+                    "avx512.mask.xor.ps.256" => "__builtin_ia32_xorps256_mask",
+                    "avx512.mask.xor.ps.512" => "__builtin_ia32_xorps512_mask",
+                    "avx512.mask3.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask3",
+                    "avx512.mask3.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask3",
+                    "avx512.mask3.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask3",
+                    "avx512.mask3.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask3",
+                    "avx512.mask3.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask3",
+                    "avx512.mask3.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask3",
+                    "avx512.mask3.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask3",
+                    "avx512.mask3.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask3",
+                    "avx512.mask3.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask3",
+                    "avx512.mask3.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask3",
+                    "avx512.mask3.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask3",
+                    "avx512.mask3.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask3",
+                    "avx512.mask3.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask3",
+                    "avx512.mask3.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask3",
+                    "avx512.mask3.vfmsub.pd.128" => "__builtin_ia32_vfmsubpd128_mask3",
+                    "avx512.mask3.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256_mask3",
+                    "avx512.mask3.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask3",
+                    "avx512.mask3.vfmsub.ps.128" => "__builtin_ia32_vfmsubps128_mask3",
+                    "avx512.mask3.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256_mask3",
+                    "avx512.mask3.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask3",
+                    "avx512.mask3.vfmsubadd.pd.128" => "__builtin_ia32_vfmsubaddpd128_mask3",
+                    "avx512.mask3.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256_mask3",
+                    "avx512.mask3.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask3",
+                    "avx512.mask3.vfmsubadd.ps.128" => "__builtin_ia32_vfmsubaddps128_mask3",
+                    "avx512.mask3.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256_mask3",
+                    "avx512.mask3.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask3",
+                    "avx512.mask3.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask3",
+                    "avx512.mask3.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask3",
+                    "avx512.mask3.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask3",
+                    "avx512.mask3.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask3",
+                    "avx512.mask3.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask3",
+                    "avx512.mask3.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask3",
+                    "avx512.maskz.fixupimm.pd.128" => "__builtin_ia32_fixupimmpd128_maskz",
+                    "avx512.maskz.fixupimm.pd.256" => "__builtin_ia32_fixupimmpd256_maskz",
+                    "avx512.maskz.fixupimm.pd.512" => "__builtin_ia32_fixupimmpd512_maskz",
+                    "avx512.maskz.fixupimm.ps.128" => "__builtin_ia32_fixupimmps128_maskz",
+                    "avx512.maskz.fixupimm.ps.256" => "__builtin_ia32_fixupimmps256_maskz",
+                    "avx512.maskz.fixupimm.ps.512" => "__builtin_ia32_fixupimmps512_maskz",
+                    "avx512.maskz.fixupimm.sd" => "__builtin_ia32_fixupimmsd_maskz",
+                    "avx512.maskz.fixupimm.ss" => "__builtin_ia32_fixupimmss_maskz",
+                    "avx512.maskz.pternlog.d.128" => "__builtin_ia32_pternlogd128_maskz",
+                    "avx512.maskz.pternlog.d.256" => "__builtin_ia32_pternlogd256_maskz",
+                    "avx512.maskz.pternlog.d.512" => "__builtin_ia32_pternlogd512_maskz",
+                    "avx512.maskz.pternlog.q.128" => "__builtin_ia32_pternlogq128_maskz",
+                    "avx512.maskz.pternlog.q.256" => "__builtin_ia32_pternlogq256_maskz",
+                    "avx512.maskz.pternlog.q.512" => "__builtin_ia32_pternlogq512_maskz",
+                    "avx512.maskz.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_maskz",
+                    "avx512.maskz.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_maskz",
+                    "avx512.maskz.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_maskz",
+                    "avx512.maskz.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_maskz",
+                    "avx512.maskz.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_maskz",
+                    "avx512.maskz.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_maskz",
+                    "avx512.maskz.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_maskz",
+                    "avx512.maskz.vfmadd.ss" => "__builtin_ia32_vfmaddss3_maskz",
+                    "avx512.maskz.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_maskz",
+                    "avx512.maskz.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_maskz",
+                    "avx512.maskz.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_maskz",
+                    "avx512.maskz.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_maskz",
+                    "avx512.maskz.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_maskz",
+                    "avx512.maskz.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_maskz",
+                    "avx512.maskz.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_maskz",
+                    "avx512.maskz.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_maskz",
+                    "avx512.maskz.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_maskz",
+                    "avx512.maskz.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_maskz",
+                    "avx512.maskz.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_maskz",
+                    "avx512.maskz.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_maskz",
+                    "avx512.maskz.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_maskz",
+                    "avx512.maskz.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_maskz",
+                    "avx512.maskz.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_maskz",
+                    "avx512.maskz.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_maskz",
+                    "avx512.maskz.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_maskz",
+                    "avx512.maskz.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_maskz",
+                    "avx512.maskz.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_maskz",
+                    "avx512.maskz.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_maskz",
+                    "avx512.maskz.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_maskz",
+                    "avx512.maskz.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_maskz",
+                    "avx512.maskz.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_maskz",
+                    "avx512.maskz.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_maskz",
+                    "avx512.maskz.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_maskz",
+                    "avx512.maskz.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_maskz",
+                    "avx512.maskz.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_maskz",
+                    "avx512.maskz.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_maskz",
+                    "avx512.maskz.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_maskz",
+                    "avx512.maskz.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_maskz",
+                    "avx512.max.pd.512" => "__builtin_ia32_maxpd512",
+                    "avx512.max.ps.512" => "__builtin_ia32_maxps512",
+                    "avx512.min.pd.512" => "__builtin_ia32_minpd512",
+                    "avx512.min.ps.512" => "__builtin_ia32_minps512",
+                    "avx512.movntdqa" => "__builtin_ia32_movntdqa512",
+                    "avx512.mul.pd.512" => "__builtin_ia32_mulpd512",
+                    "avx512.mul.ps.512" => "__builtin_ia32_mulps512",
+                    "avx512.packssdw.512" => "__builtin_ia32_packssdw512",
+                    "avx512.packsswb.512" => "__builtin_ia32_packsswb512",
+                    "avx512.packusdw.512" => "__builtin_ia32_packusdw512",
+                    "avx512.packuswb.512" => "__builtin_ia32_packuswb512",
+                    "avx512.pavg.b.512" => "__builtin_ia32_pavgb512",
+                    "avx512.pavg.w.512" => "__builtin_ia32_pavgw512",
+                    "avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512",
+                    "avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512",
+                    "avx512.permvar.df.256" => "__builtin_ia32_permvardf256",
+                    "avx512.permvar.df.512" => "__builtin_ia32_permvardf512",
+                    "avx512.permvar.di.256" => "__builtin_ia32_permvardi256",
+                    "avx512.permvar.di.512" => "__builtin_ia32_permvardi512",
+                    "avx512.permvar.hi.128" => "__builtin_ia32_permvarhi128",
+                    "avx512.permvar.hi.256" => "__builtin_ia32_permvarhi256",
+                    "avx512.permvar.hi.512" => "__builtin_ia32_permvarhi512",
+                    "avx512.permvar.qi.128" => "__builtin_ia32_permvarqi128",
+                    "avx512.permvar.qi.256" => "__builtin_ia32_permvarqi256",
+                    "avx512.permvar.qi.512" => "__builtin_ia32_permvarqi512",
+                    "avx512.permvar.sf.512" => "__builtin_ia32_permvarsf512",
+                    "avx512.permvar.si.512" => "__builtin_ia32_permvarsi512",
+                    "avx512.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512",
+                    "avx512.pmaddw.d.512" => "__builtin_ia32_pmaddwd512",
+                    "avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512",
+                    "avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512",
+                    "avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512",
+                    "avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512",
+                    "avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512",
+                    "avx512.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512",
+                    "avx512.pmulh.w.512" => "__builtin_ia32_pmulhw512",
+                    "avx512.pmulhu.w.512" => "__builtin_ia32_pmulhuw512",
+                    "avx512.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128",
+                    "avx512.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256",
+                    "avx512.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512",
+                    "avx512.psad.bw.512" => "__builtin_ia32_psadbw512",
+                    "avx512.pshuf.b.512" => "__builtin_ia32_pshufb512",
+                    "avx512.psll.d.512" => "__builtin_ia32_pslld512",
+                    "avx512.psll.dq" => "__builtin_ia32_pslldqi512",
+                    "avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift",
+                    "avx512.psll.q.512" => "__builtin_ia32_psllq512",
+                    "avx512.psll.w.512" => "__builtin_ia32_psllw512",
+                    "avx512.pslli.d.512" => "__builtin_ia32_pslldi512",
+                    "avx512.pslli.q.512" => "__builtin_ia32_psllqi512",
+                    "avx512.pslli.w.512" => "__builtin_ia32_psllwi512",
+                    "avx512.psllv.d.512" => "__builtin_ia32_psllv16si",
+                    "avx512.psllv.q.512" => "__builtin_ia32_psllv8di",
+                    "avx512.psllv.w.128" => "__builtin_ia32_psllv8hi",
+                    "avx512.psllv.w.256" => "__builtin_ia32_psllv16hi",
+                    "avx512.psllv.w.512" => "__builtin_ia32_psllv32hi",
+                    "avx512.psra.d.512" => "__builtin_ia32_psrad512",
+                    "avx512.psra.q.128" => "__builtin_ia32_psraq128",
+                    "avx512.psra.q.256" => "__builtin_ia32_psraq256",
+                    "avx512.psra.q.512" => "__builtin_ia32_psraq512",
+                    "avx512.psra.w.512" => "__builtin_ia32_psraw512",
+                    "avx512.psrai.d.512" => "__builtin_ia32_psradi512",
+                    "avx512.psrai.q.128" => "__builtin_ia32_psraqi128",
+                    "avx512.psrai.q.256" => "__builtin_ia32_psraqi256",
+                    "avx512.psrai.q.512" => "__builtin_ia32_psraqi512",
+                    "avx512.psrai.w.512" => "__builtin_ia32_psrawi512",
+                    "avx512.psrav.d.512" => "__builtin_ia32_psrav16si",
+                    "avx512.psrav.q.128" => "__builtin_ia32_psravq128",
+                    "avx512.psrav.q.256" => "__builtin_ia32_psravq256",
+                    "avx512.psrav.q.512" => "__builtin_ia32_psrav8di",
+                    "avx512.psrav.w.128" => "__builtin_ia32_psrav8hi",
+                    "avx512.psrav.w.256" => "__builtin_ia32_psrav16hi",
+                    "avx512.psrav.w.512" => "__builtin_ia32_psrav32hi",
+                    "avx512.psrl.d.512" => "__builtin_ia32_psrld512",
+                    "avx512.psrl.dq" => "__builtin_ia32_psrldqi512",
+                    "avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift",
+                    "avx512.psrl.q.512" => "__builtin_ia32_psrlq512",
+                    "avx512.psrl.w.512" => "__builtin_ia32_psrlw512",
+                    "avx512.psrli.d.512" => "__builtin_ia32_psrldi512",
+                    "avx512.psrli.q.512" => "__builtin_ia32_psrlqi512",
+                    "avx512.psrli.w.512" => "__builtin_ia32_psrlwi512",
+                    "avx512.psrlv.d.512" => "__builtin_ia32_psrlv16si",
+                    "avx512.psrlv.q.512" => "__builtin_ia32_psrlv8di",
+                    "avx512.psrlv.w.128" => "__builtin_ia32_psrlv8hi",
+                    "avx512.psrlv.w.256" => "__builtin_ia32_psrlv16hi",
+                    "avx512.psrlv.w.512" => "__builtin_ia32_psrlv32hi",
+                    "avx512.pternlog.d.128" => "__builtin_ia32_pternlogd128",
+                    "avx512.pternlog.d.256" => "__builtin_ia32_pternlogd256",
+                    "avx512.pternlog.d.512" => "__builtin_ia32_pternlogd512",
+                    "avx512.pternlog.q.128" => "__builtin_ia32_pternlogq128",
+                    "avx512.pternlog.q.256" => "__builtin_ia32_pternlogq256",
+                    "avx512.pternlog.q.512" => "__builtin_ia32_pternlogq512",
+                    "avx512.ptestm.b.128" => "__builtin_ia32_ptestmb128",
+                    "avx512.ptestm.b.256" => "__builtin_ia32_ptestmb256",
+                    "avx512.ptestm.b.512" => "__builtin_ia32_ptestmb512",
+                    "avx512.ptestm.d.128" => "__builtin_ia32_ptestmd128",
+                    "avx512.ptestm.d.256" => "__builtin_ia32_ptestmd256",
+                    "avx512.ptestm.d.512" => "__builtin_ia32_ptestmd512",
+                    "avx512.ptestm.q.128" => "__builtin_ia32_ptestmq128",
+                    "avx512.ptestm.q.256" => "__builtin_ia32_ptestmq256",
+                    "avx512.ptestm.q.512" => "__builtin_ia32_ptestmq512",
+                    "avx512.ptestm.w.128" => "__builtin_ia32_ptestmw128",
+                    "avx512.ptestm.w.256" => "__builtin_ia32_ptestmw256",
+                    "avx512.ptestm.w.512" => "__builtin_ia32_ptestmw512",
+                    "avx512.ptestnm.b.128" => "__builtin_ia32_ptestnmb128",
+                    "avx512.ptestnm.b.256" => "__builtin_ia32_ptestnmb256",
+                    "avx512.ptestnm.b.512" => "__builtin_ia32_ptestnmb512",
+                    "avx512.ptestnm.d.128" => "__builtin_ia32_ptestnmd128",
+                    "avx512.ptestnm.d.256" => "__builtin_ia32_ptestnmd256",
+                    "avx512.ptestnm.d.512" => "__builtin_ia32_ptestnmd512",
+                    "avx512.ptestnm.q.128" => "__builtin_ia32_ptestnmq128",
+                    "avx512.ptestnm.q.256" => "__builtin_ia32_ptestnmq256",
+                    "avx512.ptestnm.q.512" => "__builtin_ia32_ptestnmq512",
+                    "avx512.ptestnm.w.128" => "__builtin_ia32_ptestnmw128",
+                    "avx512.ptestnm.w.256" => "__builtin_ia32_ptestnmw256",
+                    "avx512.ptestnm.w.512" => "__builtin_ia32_ptestnmw512",
+                    "avx512.rcp14.pd.128" => "__builtin_ia32_rcp14pd128_mask",
+                    "avx512.rcp14.pd.256" => "__builtin_ia32_rcp14pd256_mask",
+                    "avx512.rcp14.pd.512" => "__builtin_ia32_rcp14pd512_mask",
+                    "avx512.rcp14.ps.128" => "__builtin_ia32_rcp14ps128_mask",
+                    "avx512.rcp14.ps.256" => "__builtin_ia32_rcp14ps256_mask",
+                    "avx512.rcp14.ps.512" => "__builtin_ia32_rcp14ps512_mask",
+                    "avx512.rcp14.sd" => "__builtin_ia32_rcp14sd_mask",
+                    "avx512.rcp14.ss" => "__builtin_ia32_rcp14ss_mask",
+                    "avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask",
+                    "avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask",
+                    "avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask",
+                    // [DUPLICATE]: "avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_round_mask",
+                    "avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask",
+                    // [DUPLICATE]: "avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_round_mask",
+                    "avx512.rndscale.sd" => "__builtin_ia32_rndscalesd",
+                    "avx512.rndscale.ss" => "__builtin_ia32_rndscaless",
+                    "avx512.rsqrt14.pd.128" => "__builtin_ia32_rsqrt14pd128_mask",
+                    "avx512.rsqrt14.pd.256" => "__builtin_ia32_rsqrt14pd256_mask",
+                    "avx512.rsqrt14.pd.512" => "__builtin_ia32_rsqrt14pd512_mask",
+                    "avx512.rsqrt14.ps.128" => "__builtin_ia32_rsqrt14ps128_mask",
+                    "avx512.rsqrt14.ps.256" => "__builtin_ia32_rsqrt14ps256_mask",
+                    "avx512.rsqrt14.ps.512" => "__builtin_ia32_rsqrt14ps512_mask",
+                    "avx512.rsqrt14.sd" => "__builtin_ia32_rsqrt14sd_mask",
+                    "avx512.rsqrt14.ss" => "__builtin_ia32_rsqrt14ss_mask",
+                    "avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask",
+                    "avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask",
+                    "avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask",
+                    // [DUPLICATE]: "avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_round_mask",
+                    "avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask",
+                    // [DUPLICATE]: "avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_round_mask",
+                    "avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df",
+                    "avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si",
+                    "avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di",
+                    "avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf",
+                    "avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df",
+                    "avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si",
+                    "avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di",
+                    "avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf",
+                    "avx512.scatterdiv2.df" => "__builtin_ia32_scatterdiv2df",
+                    "avx512.scatterdiv2.di" => "__builtin_ia32_scatterdiv2di",
+                    "avx512.scatterdiv4.df" => "__builtin_ia32_scatterdiv4df",
+                    "avx512.scatterdiv4.di" => "__builtin_ia32_scatterdiv4di",
+                    "avx512.scatterdiv4.sf" => "__builtin_ia32_scatterdiv4sf",
+                    "avx512.scatterdiv4.si" => "__builtin_ia32_scatterdiv4si",
+                    "avx512.scatterdiv8.sf" => "__builtin_ia32_scatterdiv8sf",
+                    "avx512.scatterdiv8.si" => "__builtin_ia32_scatterdiv8si",
+                    "avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd",
+                    "avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps",
+                    "avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd",
+                    "avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps",
+                    "avx512.scattersiv2.df" => "__builtin_ia32_scattersiv2df",
+                    "avx512.scattersiv2.di" => "__builtin_ia32_scattersiv2di",
+                    "avx512.scattersiv4.df" => "__builtin_ia32_scattersiv4df",
+                    "avx512.scattersiv4.di" => "__builtin_ia32_scattersiv4di",
+                    "avx512.scattersiv4.sf" => "__builtin_ia32_scattersiv4sf",
+                    "avx512.scattersiv4.si" => "__builtin_ia32_scattersiv4si",
+                    "avx512.scattersiv8.sf" => "__builtin_ia32_scattersiv8sf",
+                    "avx512.scattersiv8.si" => "__builtin_ia32_scattersiv8si",
+                    "avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask",
+                    "avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask",
+                    "avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd",
+                    "avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss",
+                    "avx512.sub.pd.512" => "__builtin_ia32_subpd512",
+                    "avx512.sub.ps.512" => "__builtin_ia32_subps512",
+                    "avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512",
+                    "avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512",
+                    "avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512",
+                    "avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512",
+                    "avx512.vcomi.sd" => "__builtin_ia32_vcomisd",
+                    "avx512.vcomi.ss" => "__builtin_ia32_vcomiss",
+                    "avx512.vcvtsd2si32" => "__builtin_ia32_vcvtsd2si32",
+                    "avx512.vcvtsd2si64" => "__builtin_ia32_vcvtsd2si64",
+                    "avx512.vcvtsd2usi32" => "__builtin_ia32_vcvtsd2usi32",
+                    "avx512.vcvtsd2usi64" => "__builtin_ia32_vcvtsd2usi64",
+                    "avx512.vcvtss2si32" => "__builtin_ia32_vcvtss2si32",
+                    "avx512.vcvtss2si64" => "__builtin_ia32_vcvtss2si64",
+                    "avx512.vcvtss2usi32" => "__builtin_ia32_vcvtss2usi32",
+                    "avx512.vcvtss2usi64" => "__builtin_ia32_vcvtss2usi64",
+                    "avx512.vpdpbusd.128" => "__builtin_ia32_vpdpbusd128",
+                    "avx512.vpdpbusd.256" => "__builtin_ia32_vpdpbusd256",
+                    "avx512.vpdpbusd.512" => "__builtin_ia32_vpdpbusd512",
+                    "avx512.vpdpbusds.128" => "__builtin_ia32_vpdpbusds128",
+                    "avx512.vpdpbusds.256" => "__builtin_ia32_vpdpbusds256",
+                    "avx512.vpdpbusds.512" => "__builtin_ia32_vpdpbusds512",
+                    "avx512.vpdpwssd.128" => "__builtin_ia32_vpdpwssd128",
+                    "avx512.vpdpwssd.256" => "__builtin_ia32_vpdpwssd256",
+                    "avx512.vpdpwssd.512" => "__builtin_ia32_vpdpwssd512",
+                    "avx512.vpdpwssds.128" => "__builtin_ia32_vpdpwssds128",
+                    "avx512.vpdpwssds.256" => "__builtin_ia32_vpdpwssds256",
+                    "avx512.vpdpwssds.512" => "__builtin_ia32_vpdpwssds512",
+                    "avx512.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128",
+                    "avx512.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256",
+                    "avx512.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512",
+                    "avx512.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128",
+                    "avx512.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256",
+                    "avx512.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512",
+                    "avx512.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128",
+                    "avx512.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256",
+                    "avx512.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512",
+                    "avx512.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128",
+                    "avx512.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256",
+                    "avx512.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512",
+                    "avx512.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128",
+                    "avx512.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256",
+                    "avx512.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512",
+                    "avx512.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128",
+                    "avx512.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256",
+                    "avx512.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512",
+                    "avx512.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512",
+                    "avx512.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512",
+                    "avx512.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128",
+                    "avx512.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256",
+                    "avx512.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512",
+                    "avx512.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128",
+                    "avx512.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256",
+                    "avx512.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512",
+                    "avx512bf16.cvtne2ps2bf16.128" => "__builtin_ia32_cvtne2ps2bf16_128",
+                    "avx512bf16.cvtne2ps2bf16.256" => "__builtin_ia32_cvtne2ps2bf16_256",
+                    "avx512bf16.cvtne2ps2bf16.512" => "__builtin_ia32_cvtne2ps2bf16_512",
+                    "avx512bf16.cvtneps2bf16.256" => "__builtin_ia32_cvtneps2bf16_256",
+                    "avx512bf16.cvtneps2bf16.512" => "__builtin_ia32_cvtneps2bf16_512",
+                    "avx512bf16.dpbf16ps.128" => "__builtin_ia32_dpbf16ps_128",
+                    "avx512bf16.dpbf16ps.256" => "__builtin_ia32_dpbf16ps_256",
+                    "avx512bf16.dpbf16ps.512" => "__builtin_ia32_dpbf16ps_512",
+                    "avx512fp16.add.ph.512" => "__builtin_ia32_addph512",
+                    "avx512fp16.div.ph.512" => "__builtin_ia32_divph512",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.add.sh.round" => "__builtin_ia32_addsh_round_mask",
+                    "avx512fp16.mask.cmp.sh" => "__builtin_ia32_cmpsh_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.div.sh.round" => "__builtin_ia32_divsh_round_mask",
+                    "avx512fp16.mask.fpclass.sh" => "__builtin_ia32_fpclasssh_mask",
+                    "avx512fp16.mask.getexp.ph.128" => "__builtin_ia32_getexpph128_mask",
+                    "avx512fp16.mask.getexp.ph.256" => "__builtin_ia32_getexpph256_mask",
+                    "avx512fp16.mask.getexp.ph.512" => "__builtin_ia32_getexpph512_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.getexp.sh" => "__builtin_ia32_getexpsh128_round_mask",
+                    "avx512fp16.mask.getmant.ph.128" => "__builtin_ia32_getmantph128_mask",
+                    "avx512fp16.mask.getmant.ph.256" => "__builtin_ia32_getmantph256_mask",
+                    "avx512fp16.mask.getmant.ph.512" => "__builtin_ia32_getmantph512_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.getmant.sh" => "__builtin_ia32_getmantsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.max.sh.round" => "__builtin_ia32_maxsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.min.sh.round" => "__builtin_ia32_minsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.mul.sh.round" => "__builtin_ia32_mulsh_round_mask",
+                    "avx512fp16.mask.rcp.ph.128" => "__builtin_ia32_rcpph128_mask",
+                    "avx512fp16.mask.rcp.ph.256" => "__builtin_ia32_rcpph256_mask",
+                    "avx512fp16.mask.rcp.ph.512" => "__builtin_ia32_rcpph512_mask",
+                    "avx512fp16.mask.rcp.sh" => "__builtin_ia32_rcpsh_mask",
+                    "avx512fp16.mask.reduce.ph.128" => "__builtin_ia32_reduceph128_mask",
+                    "avx512fp16.mask.reduce.ph.256" => "__builtin_ia32_reduceph256_mask",
+                    "avx512fp16.mask.reduce.ph.512" => "__builtin_ia32_reduceph512_mask",
+                    "avx512fp16.mask.reduce.sh" => "__builtin_ia32_reducesh_mask",
+                    "avx512fp16.mask.rndscale.ph.128" => "__builtin_ia32_rndscaleph_128_mask",
+                    "avx512fp16.mask.rndscale.ph.256" => "__builtin_ia32_rndscaleph_256_mask",
+                    "avx512fp16.mask.rndscale.ph.512" => "__builtin_ia32_rndscaleph_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.rndscale.sh" => "__builtin_ia32_rndscalesh_round_mask",
+                    "avx512fp16.mask.rsqrt.ph.128" => "__builtin_ia32_rsqrtph128_mask",
+                    "avx512fp16.mask.rsqrt.ph.256" => "__builtin_ia32_rsqrtph256_mask",
+                    "avx512fp16.mask.rsqrt.ph.512" => "__builtin_ia32_rsqrtph512_mask",
+                    "avx512fp16.mask.rsqrt.sh" => "__builtin_ia32_rsqrtsh_mask",
+                    "avx512fp16.mask.scalef.ph.128" => "__builtin_ia32_scalefph128_mask",
+                    "avx512fp16.mask.scalef.ph.256" => "__builtin_ia32_scalefph256_mask",
+                    "avx512fp16.mask.scalef.ph.512" => "__builtin_ia32_scalefph512_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.scalef.sh" => "__builtin_ia32_scalefsh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.sub.sh.round" => "__builtin_ia32_subsh_round_mask",
+                    "avx512fp16.mask.vcvtdq2ph.128" => "__builtin_ia32_vcvtdq2ph128_mask",
+                    "avx512fp16.mask.vcvtpd2ph.128" => "__builtin_ia32_vcvtpd2ph128_mask",
+                    "avx512fp16.mask.vcvtpd2ph.256" => "__builtin_ia32_vcvtpd2ph256_mask",
+                    "avx512fp16.mask.vcvtpd2ph.512" => "__builtin_ia32_vcvtpd2ph512_mask",
+                    "avx512fp16.mask.vcvtph2dq.128" => "__builtin_ia32_vcvtph2dq128_mask",
+                    "avx512fp16.mask.vcvtph2dq.256" => "__builtin_ia32_vcvtph2dq256_mask",
+                    "avx512fp16.mask.vcvtph2dq.512" => "__builtin_ia32_vcvtph2dq512_mask",
+                    "avx512fp16.mask.vcvtph2pd.128" => "__builtin_ia32_vcvtph2pd128_mask",
+                    "avx512fp16.mask.vcvtph2pd.256" => "__builtin_ia32_vcvtph2pd256_mask",
+                    "avx512fp16.mask.vcvtph2pd.512" => "__builtin_ia32_vcvtph2pd512_mask",
+                    "avx512fp16.mask.vcvtph2psx.128" => "__builtin_ia32_vcvtph2psx128_mask",
+                    "avx512fp16.mask.vcvtph2psx.256" => "__builtin_ia32_vcvtph2psx256_mask",
+                    "avx512fp16.mask.vcvtph2psx.512" => "__builtin_ia32_vcvtph2psx512_mask",
+                    "avx512fp16.mask.vcvtph2qq.128" => "__builtin_ia32_vcvtph2qq128_mask",
+                    "avx512fp16.mask.vcvtph2qq.256" => "__builtin_ia32_vcvtph2qq256_mask",
+                    "avx512fp16.mask.vcvtph2qq.512" => "__builtin_ia32_vcvtph2qq512_mask",
+                    "avx512fp16.mask.vcvtph2udq.128" => "__builtin_ia32_vcvtph2udq128_mask",
+                    "avx512fp16.mask.vcvtph2udq.256" => "__builtin_ia32_vcvtph2udq256_mask",
+                    "avx512fp16.mask.vcvtph2udq.512" => "__builtin_ia32_vcvtph2udq512_mask",
+                    "avx512fp16.mask.vcvtph2uqq.128" => "__builtin_ia32_vcvtph2uqq128_mask",
+                    "avx512fp16.mask.vcvtph2uqq.256" => "__builtin_ia32_vcvtph2uqq256_mask",
+                    "avx512fp16.mask.vcvtph2uqq.512" => "__builtin_ia32_vcvtph2uqq512_mask",
+                    "avx512fp16.mask.vcvtph2uw.128" => "__builtin_ia32_vcvtph2uw128_mask",
+                    "avx512fp16.mask.vcvtph2uw.256" => "__builtin_ia32_vcvtph2uw256_mask",
+                    "avx512fp16.mask.vcvtph2uw.512" => "__builtin_ia32_vcvtph2uw512_mask",
+                    "avx512fp16.mask.vcvtph2w.128" => "__builtin_ia32_vcvtph2w128_mask",
+                    "avx512fp16.mask.vcvtph2w.256" => "__builtin_ia32_vcvtph2w256_mask",
+                    "avx512fp16.mask.vcvtph2w.512" => "__builtin_ia32_vcvtph2w512_mask",
+                    "avx512fp16.mask.vcvtps2phx.128" => "__builtin_ia32_vcvtps2phx128_mask",
+                    "avx512fp16.mask.vcvtps2phx.256" => "__builtin_ia32_vcvtps2phx256_mask",
+                    "avx512fp16.mask.vcvtps2phx.512" => "__builtin_ia32_vcvtps2phx512_mask",
+                    "avx512fp16.mask.vcvtqq2ph.128" => "__builtin_ia32_vcvtqq2ph128_mask",
+                    "avx512fp16.mask.vcvtqq2ph.256" => "__builtin_ia32_vcvtqq2ph256_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtsd2sh.round" => "__builtin_ia32_vcvtsd2sh_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtsh2sd.round" => "__builtin_ia32_vcvtsh2sd_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtsh2ss.round" => "__builtin_ia32_vcvtsh2ss_round_mask",
+                    // [INVALID CONVERSION]: "avx512fp16.mask.vcvtss2sh.round" => "__builtin_ia32_vcvtss2sh_round_mask",
+                    "avx512fp16.mask.vcvttph2dq.128" => "__builtin_ia32_vcvttph2dq128_mask",
+                    "avx512fp16.mask.vcvttph2dq.256" => "__builtin_ia32_vcvttph2dq256_mask",
+                    "avx512fp16.mask.vcvttph2dq.512" => "__builtin_ia32_vcvttph2dq512_mask",
+                    "avx512fp16.mask.vcvttph2qq.128" => "__builtin_ia32_vcvttph2qq128_mask",
+                    "avx512fp16.mask.vcvttph2qq.256" => "__builtin_ia32_vcvttph2qq256_mask",
+                    "avx512fp16.mask.vcvttph2qq.512" => "__builtin_ia32_vcvttph2qq512_mask",
+                    "avx512fp16.mask.vcvttph2udq.128" => "__builtin_ia32_vcvttph2udq128_mask",
+                    "avx512fp16.mask.vcvttph2udq.256" => "__builtin_ia32_vcvttph2udq256_mask",
+                    "avx512fp16.mask.vcvttph2udq.512" => "__builtin_ia32_vcvttph2udq512_mask",
+                    "avx512fp16.mask.vcvttph2uqq.128" => "__builtin_ia32_vcvttph2uqq128_mask",
+                    "avx512fp16.mask.vcvttph2uqq.256" => "__builtin_ia32_vcvttph2uqq256_mask",
+                    "avx512fp16.mask.vcvttph2uqq.512" => "__builtin_ia32_vcvttph2uqq512_mask",
+                    "avx512fp16.mask.vcvttph2uw.128" => "__builtin_ia32_vcvttph2uw128_mask",
+                    "avx512fp16.mask.vcvttph2uw.256" => "__builtin_ia32_vcvttph2uw256_mask",
+                    "avx512fp16.mask.vcvttph2uw.512" => "__builtin_ia32_vcvttph2uw512_mask",
+                    "avx512fp16.mask.vcvttph2w.128" => "__builtin_ia32_vcvttph2w128_mask",
+                    "avx512fp16.mask.vcvttph2w.256" => "__builtin_ia32_vcvttph2w256_mask",
+                    "avx512fp16.mask.vcvttph2w.512" => "__builtin_ia32_vcvttph2w512_mask",
+                    "avx512fp16.mask.vcvtudq2ph.128" => "__builtin_ia32_vcvtudq2ph128_mask",
+                    "avx512fp16.mask.vcvtuqq2ph.128" => "__builtin_ia32_vcvtuqq2ph128_mask",
+                    "avx512fp16.mask.vcvtuqq2ph.256" => "__builtin_ia32_vcvtuqq2ph256_mask",
+                    "avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask",
+                    "avx512fp16.mask.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_mask",
+                    "avx512fp16.mask.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_mask3",
+                    "avx512fp16.mask.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_mask",
+                    "avx512fp16.mask.vfcmul.cph.128" => "__builtin_ia32_vfcmulcph128_mask",
+                    "avx512fp16.mask.vfcmul.cph.256" => "__builtin_ia32_vfcmulcph256_mask",
+                    "avx512fp16.mask.vfcmul.cph.512" => "__builtin_ia32_vfcmulcph512_mask",
+                    "avx512fp16.mask.vfcmul.csh" => "__builtin_ia32_vfcmulcsh_mask",
+                    "avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask",
+                    "avx512fp16.mask.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_mask",
+                    "avx512fp16.mask.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_mask3",
+                    "avx512fp16.mask.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_mask",
+                    "avx512fp16.mask.vfmul.cph.128" => "__builtin_ia32_vfmulcph128_mask",
+                    "avx512fp16.mask.vfmul.cph.256" => "__builtin_ia32_vfmulcph256_mask",
+                    "avx512fp16.mask.vfmul.cph.512" => "__builtin_ia32_vfmulcph512_mask",
+                    "avx512fp16.mask.vfmul.csh" => "__builtin_ia32_vfmulcsh_mask",
+                    "avx512fp16.maskz.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_maskz",
+                    "avx512fp16.maskz.vfcmadd.cph.256" => "__builtin_ia32_vfcmaddcph256_maskz",
+                    "avx512fp16.maskz.vfcmadd.cph.512" => "__builtin_ia32_vfcmaddcph512_maskz",
+                    "avx512fp16.maskz.vfcmadd.csh" => "__builtin_ia32_vfcmaddcsh_maskz",
+                    "avx512fp16.maskz.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_maskz",
+                    "avx512fp16.maskz.vfmadd.cph.256" => "__builtin_ia32_vfmaddcph256_maskz",
+                    "avx512fp16.maskz.vfmadd.cph.512" => "__builtin_ia32_vfmaddcph512_maskz",
+                    "avx512fp16.maskz.vfmadd.csh" => "__builtin_ia32_vfmaddcsh_maskz",
+                    "avx512fp16.max.ph.128" => "__builtin_ia32_maxph128",
+                    "avx512fp16.max.ph.256" => "__builtin_ia32_maxph256",
+                    "avx512fp16.max.ph.512" => "__builtin_ia32_maxph512",
+                    "avx512fp16.min.ph.128" => "__builtin_ia32_minph128",
+                    "avx512fp16.min.ph.256" => "__builtin_ia32_minph256",
+                    "avx512fp16.min.ph.512" => "__builtin_ia32_minph512",
+                    "avx512fp16.mul.ph.512" => "__builtin_ia32_mulph512",
+                    "avx512fp16.sub.ph.512" => "__builtin_ia32_subph512",
+                    "avx512fp16.vcomi.sh" => "__builtin_ia32_vcomish",
+                    "avx512fp16.vcvtsh2si32" => "__builtin_ia32_vcvtsh2si32",
+                    "avx512fp16.vcvtsh2si64" => "__builtin_ia32_vcvtsh2si64",
+                    "avx512fp16.vcvtsh2usi32" => "__builtin_ia32_vcvtsh2usi32",
+                    "avx512fp16.vcvtsh2usi64" => "__builtin_ia32_vcvtsh2usi64",
+                    "avx512fp16.vcvtsi2sh" => "__builtin_ia32_vcvtsi2sh",
+                    "avx512fp16.vcvtsi642sh" => "__builtin_ia32_vcvtsi642sh",
+                    "avx512fp16.vcvttsh2si32" => "__builtin_ia32_vcvttsh2si32",
+                    "avx512fp16.vcvttsh2si64" => "__builtin_ia32_vcvttsh2si64",
+                    "avx512fp16.vcvttsh2usi32" => "__builtin_ia32_vcvttsh2usi32",
+                    "avx512fp16.vcvttsh2usi64" => "__builtin_ia32_vcvttsh2usi64",
+                    "avx512fp16.vcvtusi2sh" => "__builtin_ia32_vcvtusi2sh",
+                    "avx512fp16.vcvtusi642sh" => "__builtin_ia32_vcvtusi642sh",
+                    "avx512fp16.vfmaddsub.ph.128" => "__builtin_ia32_vfmaddsubph",
+                    "avx512fp16.vfmaddsub.ph.256" => "__builtin_ia32_vfmaddsubph256",
+                    "axor32" => "__builtin_ia32_axor32",
+                    "axor64" => "__builtin_ia32_axor64",
+                    "bmi.bextr.32" => "__builtin_ia32_bextr_u32",
+                    "bmi.bextr.64" => "__builtin_ia32_bextr_u64",
+                    "bmi.bzhi.32" => "__builtin_ia32_bzhi_si",
+                    "bmi.bzhi.64" => "__builtin_ia32_bzhi_di",
+                    "bmi.pdep.32" => "__builtin_ia32_pdep_si",
+                    "bmi.pdep.64" => "__builtin_ia32_pdep_di",
+                    "bmi.pext.32" => "__builtin_ia32_pext_si",
+                    "bmi.pext.64" => "__builtin_ia32_pext_di",
+                    "cldemote" => "__builtin_ia32_cldemote",
+                    "clflushopt" => "__builtin_ia32_clflushopt",
+                    "clrssbsy" => "__builtin_ia32_clrssbsy",
+                    "clui" => "__builtin_ia32_clui",
+                    "clwb" => "__builtin_ia32_clwb",
+                    "clzero" => "__builtin_ia32_clzero",
+                    "cmpccxadd32" => "__builtin_ia32_cmpccxadd32",
+                    "cmpccxadd64" => "__builtin_ia32_cmpccxadd64",
+                    "directstore32" => "__builtin_ia32_directstore_u32",
+                    "directstore64" => "__builtin_ia32_directstore_u64",
+                    "enqcmd" => "__builtin_ia32_enqcmd",
+                    "enqcmds" => "__builtin_ia32_enqcmds",
+                    "flags.read.u32" => "__builtin_ia32_readeflags_u32",
+                    "flags.read.u64" => "__builtin_ia32_readeflags_u64",
+                    "flags.write.u32" => "__builtin_ia32_writeeflags_u32",
+                    "flags.write.u64" => "__builtin_ia32_writeeflags_u64",
+                    "fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask",
+                    "fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask",
+                    "fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask",
+                    "fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask",
+                    "fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask",
+                    "fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask",
+                    "fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask",
+                    "fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask",
+                    "fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask",
+                    "fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask",
+                    "fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask",
+                    "fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask",
+                    "fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd",
+                    "fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256",
+                    "fma.vfmadd.ps" => "__builtin_ia32_vfmaddps",
+                    "fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256",
+                    "fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd",
+                    "fma.vfmadd.ss" => "__builtin_ia32_vfmaddss",
+                    "fma.vfmaddsub.pd" => "__builtin_ia32_vfmaddsubpd",
+                    "fma.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256",
+                    "fma.vfmaddsub.ps" => "__builtin_ia32_vfmaddsubps",
+                    "fma.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256",
+                    "fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd",
+                    "fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256",
+                    "fma.vfmsub.ps" => "__builtin_ia32_vfmsubps",
+                    "fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256",
+                    "fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd",
+                    "fma.vfmsub.ss" => "__builtin_ia32_vfmsubss",
+                    "fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd",
+                    "fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256",
+                    "fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps",
+                    "fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256",
+                    "fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd",
+                    "fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256",
+                    "fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps",
+                    "fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256",
+                    "fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd",
+                    "fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss",
+                    "fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd",
+                    "fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256",
+                    "fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps",
+                    "fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256",
+                    "fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd",
+                    "fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss",
+                    "fxrstor" => "__builtin_ia32_fxrstor",
+                    "fxrstor64" => "__builtin_ia32_fxrstor64",
+                    "fxsave" => "__builtin_ia32_fxsave",
+                    "fxsave64" => "__builtin_ia32_fxsave64",
+                    "incsspd" => "__builtin_ia32_incsspd",
+                    "incsspq" => "__builtin_ia32_incsspq",
+                    "invpcid" => "__builtin_ia32_invpcid",
+                    "ldtilecfg" => "__builtin_ia32_tile_loadconfig",
+                    "ldtilecfg.internal" => "__builtin_ia32_tile_loadconfig_internal",
+                    "llwpcb" => "__builtin_ia32_llwpcb",
+                    "loadiwkey" => "__builtin_ia32_loadiwkey",
+                    "lwpins32" => "__builtin_ia32_lwpins32",
+                    "lwpins64" => "__builtin_ia32_lwpins64",
+                    "lwpval32" => "__builtin_ia32_lwpval32",
+                    "lwpval64" => "__builtin_ia32_lwpval64",
+                    "mmx.emms" => "__builtin_ia32_emms",
+                    "mmx.femms" => "__builtin_ia32_femms",
+                    "monitorx" => "__builtin_ia32_monitorx",
+                    "movdir64b" => "__builtin_ia32_movdir64b",
+                    "movrsdi" => "__builtin_ia32_movrsdi",
+                    "movrshi" => "__builtin_ia32_movrshi",
+                    "movrsqi" => "__builtin_ia32_movrsqi",
+                    "movrssi" => "__builtin_ia32_movrssi",
+                    "mwaitx" => "__builtin_ia32_mwaitx",
+                    "pclmulqdq" => "__builtin_ia32_pclmulqdq128",
+                    "pclmulqdq.256" => "__builtin_ia32_pclmulqdq256",
+                    "pclmulqdq.512" => "__builtin_ia32_pclmulqdq512",
+                    "prefetchrs" => "__builtin_ia32_prefetchrs",
+                    "ptwrite32" => "__builtin_ia32_ptwrite32",
+                    "ptwrite64" => "__builtin_ia32_ptwrite64",
+                    "rdfsbase.32" => "__builtin_ia32_rdfsbase32",
+                    "rdfsbase.64" => "__builtin_ia32_rdfsbase64",
+                    "rdgsbase.32" => "__builtin_ia32_rdgsbase32",
+                    "rdgsbase.64" => "__builtin_ia32_rdgsbase64",
+                    "rdpid" => "__builtin_ia32_rdpid",
+                    "rdpkru" => "__builtin_ia32_rdpkru",
+                    "rdpmc" => "__builtin_ia32_rdpmc",
+                    "rdpru" => "__builtin_ia32_rdpru",
+                    "rdsspd" => "__builtin_ia32_rdsspd",
+                    "rdsspq" => "__builtin_ia32_rdsspq",
+                    "rdtsc" => "__builtin_ia32_rdtsc",
+                    "rdtscp" => "__builtin_ia32_rdtscp",
+                    "rstorssp" => "__builtin_ia32_rstorssp",
+                    "saveprevssp" => "__builtin_ia32_saveprevssp",
+                    "senduipi" => "__builtin_ia32_senduipi",
+                    "serialize" => "__builtin_ia32_serialize",
+                    "setssbsy" => "__builtin_ia32_setssbsy",
+                    "sha1msg1" => "__builtin_ia32_sha1msg1",
+                    "sha1msg2" => "__builtin_ia32_sha1msg2",
+                    "sha1nexte" => "__builtin_ia32_sha1nexte",
+                    "sha1rnds4" => "__builtin_ia32_sha1rnds4",
+                    "sha256msg1" => "__builtin_ia32_sha256msg1",
+                    "sha256msg2" => "__builtin_ia32_sha256msg2",
+                    "sha256rnds2" => "__builtin_ia32_sha256rnds2",
+                    "slwpcb" => "__builtin_ia32_slwpcb",
+                    "sse.add.ss" => "__builtin_ia32_addss",
+                    "sse.cmp.ps" => "__builtin_ia32_cmpps",
+                    "sse.cmp.ss" => "__builtin_ia32_cmpss",
+                    "sse.comieq.ss" => "__builtin_ia32_comieq",
+                    "sse.comige.ss" => "__builtin_ia32_comige",
+                    "sse.comigt.ss" => "__builtin_ia32_comigt",
+                    "sse.comile.ss" => "__builtin_ia32_comile",
+                    "sse.comilt.ss" => "__builtin_ia32_comilt",
+                    "sse.comineq.ss" => "__builtin_ia32_comineq",
+                    "sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss",
+                    "sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss",
+                    "sse.cvtss2si" => "__builtin_ia32_cvtss2si",
+                    "sse.cvtss2si64" => "__builtin_ia32_cvtss2si64",
+                    "sse.cvttss2si" => "__builtin_ia32_cvttss2si",
+                    "sse.cvttss2si64" => "__builtin_ia32_cvttss2si64",
+                    "sse.div.ss" => "__builtin_ia32_divss",
+                    "sse.max.ps" => "__builtin_ia32_maxps",
+                    "sse.max.ss" => "__builtin_ia32_maxss",
+                    "sse.min.ps" => "__builtin_ia32_minps",
+                    "sse.min.ss" => "__builtin_ia32_minss",
+                    "sse.movmsk.ps" => "__builtin_ia32_movmskps",
+                    "sse.mul.ss" => "__builtin_ia32_mulss",
+                    "sse.rcp.ps" => "__builtin_ia32_rcpps",
+                    "sse.rcp.ss" => "__builtin_ia32_rcpss",
+                    "sse.rsqrt.ps" => "__builtin_ia32_rsqrtps",
+                    "sse.rsqrt.ss" => "__builtin_ia32_rsqrtss",
+                    "sse.sfence" => "__builtin_ia32_sfence",
+                    "sse.sqrt.ps" => "__builtin_ia32_sqrtps",
+                    "sse.sqrt.ss" => "__builtin_ia32_sqrtss",
+                    "sse.storeu.ps" => "__builtin_ia32_storeups",
+                    "sse.sub.ss" => "__builtin_ia32_subss",
+                    "sse.ucomieq.ss" => "__builtin_ia32_ucomieq",
+                    "sse.ucomige.ss" => "__builtin_ia32_ucomige",
+                    "sse.ucomigt.ss" => "__builtin_ia32_ucomigt",
+                    "sse.ucomile.ss" => "__builtin_ia32_ucomile",
+                    "sse.ucomilt.ss" => "__builtin_ia32_ucomilt",
+                    "sse.ucomineq.ss" => "__builtin_ia32_ucomineq",
+                    "sse2.add.sd" => "__builtin_ia32_addsd",
+                    "sse2.clflush" => "__builtin_ia32_clflush",
+                    "sse2.cmp.pd" => "__builtin_ia32_cmppd",
+                    "sse2.cmp.sd" => "__builtin_ia32_cmpsd",
+                    "sse2.comieq.sd" => "__builtin_ia32_comisdeq",
+                    "sse2.comige.sd" => "__builtin_ia32_comisdge",
+                    "sse2.comigt.sd" => "__builtin_ia32_comisdgt",
+                    "sse2.comile.sd" => "__builtin_ia32_comisdle",
+                    "sse2.comilt.sd" => "__builtin_ia32_comisdlt",
+                    "sse2.comineq.sd" => "__builtin_ia32_comisdneq",
+                    "sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd",
+                    "sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps",
+                    "sse2.cvtpd2dq" => "__builtin_ia32_cvtpd2dq",
+                    "sse2.cvtpd2ps" => "__builtin_ia32_cvtpd2ps",
+                    "sse2.cvtps2dq" => "__builtin_ia32_cvtps2dq",
+                    "sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd",
+                    "sse2.cvtsd2si" => "__builtin_ia32_cvtsd2si",
+                    "sse2.cvtsd2si64" => "__builtin_ia32_cvtsd2si64",
+                    "sse2.cvtsd2ss" => "__builtin_ia32_cvtsd2ss",
+                    "sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd",
+                    "sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd",
+                    "sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd",
+                    "sse2.cvttpd2dq" => "__builtin_ia32_cvttpd2dq",
+                    "sse2.cvttps2dq" => "__builtin_ia32_cvttps2dq",
+                    "sse2.cvttsd2si" => "__builtin_ia32_cvttsd2si",
+                    "sse2.cvttsd2si64" => "__builtin_ia32_cvttsd2si64",
+                    "sse2.div.sd" => "__builtin_ia32_divsd",
+                    "sse2.lfence" => "__builtin_ia32_lfence",
+                    "sse2.maskmov.dqu" => "__builtin_ia32_maskmovdqu",
+                    "sse2.max.pd" => "__builtin_ia32_maxpd",
+                    "sse2.max.sd" => "__builtin_ia32_maxsd",
+                    "sse2.mfence" => "__builtin_ia32_mfence",
+                    "sse2.min.pd" => "__builtin_ia32_minpd",
+                    "sse2.min.sd" => "__builtin_ia32_minsd",
+                    "sse2.movmsk.pd" => "__builtin_ia32_movmskpd",
+                    "sse2.mul.sd" => "__builtin_ia32_mulsd",
+                    "sse2.packssdw.128" => "__builtin_ia32_packssdw128",
+                    "sse2.packsswb.128" => "__builtin_ia32_packsswb128",
+                    "sse2.packuswb.128" => "__builtin_ia32_packuswb128",
+                    "sse2.padds.b" => "__builtin_ia32_paddsb128",
+                    "sse2.padds.w" => "__builtin_ia32_paddsw128",
+                    "sse2.paddus.b" => "__builtin_ia32_paddusb128",
+                    "sse2.paddus.w" => "__builtin_ia32_paddusw128",
+                    "sse2.pause" => "__builtin_ia32_pause",
+                    "sse2.pavg.b" => "__builtin_ia32_pavgb128",
+                    "sse2.pavg.w" => "__builtin_ia32_pavgw128",
+                    "sse2.pmadd.wd" => "__builtin_ia32_pmaddwd128",
+                    "sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128",
+                    "sse2.pmaxu.b" => "__builtin_ia32_pmaxub128",
+                    "sse2.pmins.w" => "__builtin_ia32_pminsw128",
+                    "sse2.pminu.b" => "__builtin_ia32_pminub128",
+                    "sse2.pmovmskb.128" => "__builtin_ia32_pmovmskb128",
+                    "sse2.pmulh.w" => "__builtin_ia32_pmulhw128",
+                    "sse2.pmulhu.w" => "__builtin_ia32_pmulhuw128",
+                    "sse2.pmulu.dq" => "__builtin_ia32_pmuludq128",
+                    "sse2.psad.bw" => "__builtin_ia32_psadbw128",
+                    "sse2.pshuf.d" => "__builtin_ia32_pshufd",
+                    "sse2.pshufh.w" => "__builtin_ia32_pshufhw",
+                    "sse2.pshufl.w" => "__builtin_ia32_pshuflw",
+                    "sse2.psll.d" => "__builtin_ia32_pslld128",
+                    "sse2.psll.dq" => "__builtin_ia32_pslldqi128",
+                    "sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift",
+                    "sse2.psll.q" => "__builtin_ia32_psllq128",
+                    "sse2.psll.w" => "__builtin_ia32_psllw128",
+                    "sse2.pslli.d" => "__builtin_ia32_pslldi128",
+                    "sse2.pslli.q" => "__builtin_ia32_psllqi128",
+                    "sse2.pslli.w" => "__builtin_ia32_psllwi128",
+                    "sse2.psra.d" => "__builtin_ia32_psrad128",
+                    "sse2.psra.w" => "__builtin_ia32_psraw128",
+                    "sse2.psrai.d" => "__builtin_ia32_psradi128",
+                    "sse2.psrai.w" => "__builtin_ia32_psrawi128",
+                    "sse2.psrl.d" => "__builtin_ia32_psrld128",
+                    "sse2.psrl.dq" => "__builtin_ia32_psrldqi128",
+                    "sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift",
+                    "sse2.psrl.q" => "__builtin_ia32_psrlq128",
+                    "sse2.psrl.w" => "__builtin_ia32_psrlw128",
+                    "sse2.psrli.d" => "__builtin_ia32_psrldi128",
+                    "sse2.psrli.q" => "__builtin_ia32_psrlqi128",
+                    "sse2.psrli.w" => "__builtin_ia32_psrlwi128",
+                    "sse2.psubs.b" => "__builtin_ia32_psubsb128",
+                    "sse2.psubs.w" => "__builtin_ia32_psubsw128",
+                    "sse2.psubus.b" => "__builtin_ia32_psubusb128",
+                    "sse2.psubus.w" => "__builtin_ia32_psubusw128",
+                    "sse2.sqrt.pd" => "__builtin_ia32_sqrtpd",
+                    "sse2.sqrt.sd" => "__builtin_ia32_sqrtsd",
+                    "sse2.storel.dq" => "__builtin_ia32_storelv4si",
+                    "sse2.storeu.dq" => "__builtin_ia32_storedqu",
+                    "sse2.storeu.pd" => "__builtin_ia32_storeupd",
+                    "sse2.sub.sd" => "__builtin_ia32_subsd",
+                    "sse2.ucomieq.sd" => "__builtin_ia32_ucomisdeq",
+                    "sse2.ucomige.sd" => "__builtin_ia32_ucomisdge",
+                    "sse2.ucomigt.sd" => "__builtin_ia32_ucomisdgt",
+                    "sse2.ucomile.sd" => "__builtin_ia32_ucomisdle",
+                    "sse2.ucomilt.sd" => "__builtin_ia32_ucomisdlt",
+                    "sse2.ucomineq.sd" => "__builtin_ia32_ucomisdneq",
+                    "sse3.addsub.pd" => "__builtin_ia32_addsubpd",
+                    "sse3.addsub.ps" => "__builtin_ia32_addsubps",
+                    "sse3.hadd.pd" => "__builtin_ia32_haddpd",
+                    "sse3.hadd.ps" => "__builtin_ia32_haddps",
+                    "sse3.hsub.pd" => "__builtin_ia32_hsubpd",
+                    "sse3.hsub.ps" => "__builtin_ia32_hsubps",
+                    "sse3.ldu.dq" => "__builtin_ia32_lddqu",
+                    "sse3.monitor" => "__builtin_ia32_monitor",
+                    "sse3.mwait" => "__builtin_ia32_mwait",
+                    "sse41.blendpd" => "__builtin_ia32_blendpd",
+                    "sse41.blendps" => "__builtin_ia32_blendps",
+                    "sse41.blendvpd" => "__builtin_ia32_blendvpd",
+                    "sse41.blendvps" => "__builtin_ia32_blendvps",
+                    "sse41.dppd" => "__builtin_ia32_dppd",
+                    "sse41.dpps" => "__builtin_ia32_dpps",
+                    "sse41.extractps" => "__builtin_ia32_extractps128",
+                    "sse41.insertps" => "__builtin_ia32_insertps128",
+                    "sse41.movntdqa" => "__builtin_ia32_movntdqa",
+                    "sse41.mpsadbw" => "__builtin_ia32_mpsadbw128",
+                    "sse41.packusdw" => "__builtin_ia32_packusdw128",
+                    "sse41.pblendvb" => "__builtin_ia32_pblendvb128",
+                    "sse41.pblendw" => "__builtin_ia32_pblendw128",
+                    "sse41.phminposuw" => "__builtin_ia32_phminposuw128",
+                    "sse41.pmaxsb" => "__builtin_ia32_pmaxsb128",
+                    "sse41.pmaxsd" => "__builtin_ia32_pmaxsd128",
+                    "sse41.pmaxud" => "__builtin_ia32_pmaxud128",
+                    "sse41.pmaxuw" => "__builtin_ia32_pmaxuw128",
+                    "sse41.pminsb" => "__builtin_ia32_pminsb128",
+                    "sse41.pminsd" => "__builtin_ia32_pminsd128",
+                    "sse41.pminud" => "__builtin_ia32_pminud128",
+                    "sse41.pminuw" => "__builtin_ia32_pminuw128",
+                    "sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128",
+                    "sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128",
+                    "sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128",
+                    "sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128",
+                    "sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128",
+                    "sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128",
+                    "sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128",
+                    "sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128",
+                    "sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128",
+                    "sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128",
+                    "sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128",
+                    "sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128",
+                    "sse41.pmuldq" => "__builtin_ia32_pmuldq128",
+                    "sse41.ptestc" => "__builtin_ia32_ptestc128",
+                    "sse41.ptestnzc" => "__builtin_ia32_ptestnzc128",
+                    "sse41.ptestz" => "__builtin_ia32_ptestz128",
+                    "sse41.round.pd" => "__builtin_ia32_roundpd",
+                    "sse41.round.ps" => "__builtin_ia32_roundps",
+                    "sse41.round.sd" => "__builtin_ia32_roundsd",
+                    "sse41.round.ss" => "__builtin_ia32_roundss",
+                    "sse42.crc32.32.16" => "__builtin_ia32_crc32hi",
+                    "sse42.crc32.32.32" => "__builtin_ia32_crc32si",
+                    "sse42.crc32.32.8" => "__builtin_ia32_crc32qi",
+                    "sse42.crc32.64.64" => "__builtin_ia32_crc32di",
+                    "sse42.pcmpestri128" => "__builtin_ia32_pcmpestri128",
+                    "sse42.pcmpestria128" => "__builtin_ia32_pcmpestria128",
+                    "sse42.pcmpestric128" => "__builtin_ia32_pcmpestric128",
+                    "sse42.pcmpestrio128" => "__builtin_ia32_pcmpestrio128",
+                    "sse42.pcmpestris128" => "__builtin_ia32_pcmpestris128",
+                    "sse42.pcmpestriz128" => "__builtin_ia32_pcmpestriz128",
+                    "sse42.pcmpestrm128" => "__builtin_ia32_pcmpestrm128",
+                    "sse42.pcmpistri128" => "__builtin_ia32_pcmpistri128",
+                    "sse42.pcmpistria128" => "__builtin_ia32_pcmpistria128",
+                    "sse42.pcmpistric128" => "__builtin_ia32_pcmpistric128",
+                    "sse42.pcmpistrio128" => "__builtin_ia32_pcmpistrio128",
+                    "sse42.pcmpistris128" => "__builtin_ia32_pcmpistris128",
+                    "sse42.pcmpistriz128" => "__builtin_ia32_pcmpistriz128",
+                    "sse42.pcmpistrm128" => "__builtin_ia32_pcmpistrm128",
+                    "sse4a.extrq" => "__builtin_ia32_extrq",
+                    "sse4a.extrqi" => "__builtin_ia32_extrqi",
+                    "sse4a.insertq" => "__builtin_ia32_insertq",
+                    "sse4a.insertqi" => "__builtin_ia32_insertqi",
+                    "sse4a.movnt.sd" => "__builtin_ia32_movntsd",
+                    "sse4a.movnt.ss" => "__builtin_ia32_movntss",
+                    "ssse3.pabs.b.128" => "__builtin_ia32_pabsb128",
+                    "ssse3.pabs.d.128" => "__builtin_ia32_pabsd128",
+                    "ssse3.pabs.w.128" => "__builtin_ia32_pabsw128",
+                    "ssse3.phadd.d.128" => "__builtin_ia32_phaddd128",
+                    "ssse3.phadd.sw.128" => "__builtin_ia32_phaddsw128",
+                    "ssse3.phadd.w.128" => "__builtin_ia32_phaddw128",
+                    "ssse3.phsub.d.128" => "__builtin_ia32_phsubd128",
+                    "ssse3.phsub.sw.128" => "__builtin_ia32_phsubsw128",
+                    "ssse3.phsub.w.128" => "__builtin_ia32_phsubw128",
+                    "ssse3.pmadd.ub.sw.128" => "__builtin_ia32_pmaddubsw128",
+                    "ssse3.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128",
+                    "ssse3.pshuf.b.128" => "__builtin_ia32_pshufb128",
+                    "ssse3.psign.b.128" => "__builtin_ia32_psignb128",
+                    "ssse3.psign.d.128" => "__builtin_ia32_psignd128",
+                    "ssse3.psign.w.128" => "__builtin_ia32_psignw128",
+                    "sttilecfg" => "__builtin_ia32_tile_storeconfig",
+                    "stui" => "__builtin_ia32_stui",
+                    "subborrow.u32" => "__builtin_ia32_subborrow_u32",
+                    "subborrow.u64" => "__builtin_ia32_subborrow_u64",
+                    "t2rpntlvwz0" => "__builtin_ia32_t2rpntlvwz0",
+                    "t2rpntlvwz0rs" => "__builtin_ia32_t2rpntlvwz0rs",
+                    "t2rpntlvwz0rst1" => "__builtin_ia32_t2rpntlvwz0rst1",
+                    "t2rpntlvwz0t1" => "__builtin_ia32_t2rpntlvwz0t1",
+                    "t2rpntlvwz1" => "__builtin_ia32_t2rpntlvwz1",
+                    "t2rpntlvwz1rs" => "__builtin_ia32_t2rpntlvwz1rs",
+                    "t2rpntlvwz1rst1" => "__builtin_ia32_t2rpntlvwz1rst1",
+                    "t2rpntlvwz1t1" => "__builtin_ia32_t2rpntlvwz1t1",
+                    "tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
+                    "tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
+                    "tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
+                    "tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
+                    "tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
+                    "tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
+                    "tconjtcmmimfp16ps" => "__builtin_ia32_tconjtcmmimfp16ps",
+                    "tconjtcmmimfp16ps.internal" => "__builtin_ia32_tconjtcmmimfp16ps_internal",
+                    "tconjtfp16" => "__builtin_ia32_tconjtfp16",
+                    "tconjtfp16.internal" => "__builtin_ia32_tconjtfp16_internal",
+                    "tcvtrowd2ps" => "__builtin_ia32_tcvtrowd2ps",
+                    "tcvtrowd2ps.internal" => "__builtin_ia32_tcvtrowd2ps_internal",
+                    "tcvtrowps2bf16h" => "__builtin_ia32_tcvtrowps2bf16h",
+                    "tcvtrowps2bf16h.internal" => "__builtin_ia32_tcvtrowps2bf16h_internal",
+                    "tcvtrowps2bf16l" => "__builtin_ia32_tcvtrowps2bf16l",
+                    "tcvtrowps2bf16l.internal" => "__builtin_ia32_tcvtrowps2bf16l_internal",
+                    "tcvtrowps2phh" => "__builtin_ia32_tcvtrowps2phh",
+                    "tcvtrowps2phh.internal" => "__builtin_ia32_tcvtrowps2phh_internal",
+                    "tcvtrowps2phl" => "__builtin_ia32_tcvtrowps2phl",
+                    "tcvtrowps2phl.internal" => "__builtin_ia32_tcvtrowps2phl_internal",
+                    "tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
+                    "tdpbf16ps.internal" => "__builtin_ia32_tdpbf16ps_internal",
+                    "tdpbf8ps" => "__builtin_ia32_tdpbf8ps",
+                    "tdpbf8ps.internal" => "__builtin_ia32_tdpbf8ps_internal",
+                    "tdpbhf8ps" => "__builtin_ia32_tdpbhf8ps",
+                    "tdpbhf8ps.internal" => "__builtin_ia32_tdpbhf8ps_internal",
+                    "tdpbssd" => "__builtin_ia32_tdpbssd",
+                    "tdpbssd.internal" => "__builtin_ia32_tdpbssd_internal",
+                    "tdpbsud" => "__builtin_ia32_tdpbsud",
+                    "tdpbsud.internal" => "__builtin_ia32_tdpbsud_internal",
+                    "tdpbusd" => "__builtin_ia32_tdpbusd",
+                    "tdpbusd.internal" => "__builtin_ia32_tdpbusd_internal",
+                    "tdpbuud" => "__builtin_ia32_tdpbuud",
+                    "tdpbuud.internal" => "__builtin_ia32_tdpbuud_internal",
+                    "tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
+                    "tdpfp16ps.internal" => "__builtin_ia32_tdpfp16ps_internal",
+                    "tdphbf8ps" => "__builtin_ia32_tdphbf8ps",
+                    "tdphbf8ps.internal" => "__builtin_ia32_tdphbf8ps_internal",
+                    "tdphf8ps" => "__builtin_ia32_tdphf8ps",
+                    "tdphf8ps.internal" => "__builtin_ia32_tdphf8ps_internal",
+                    "testui" => "__builtin_ia32_testui",
+                    "tileloadd64" => "__builtin_ia32_tileloadd64",
+                    "tileloadd64.internal" => "__builtin_ia32_tileloadd64_internal",
+                    "tileloaddrs64" => "__builtin_ia32_tileloaddrs64",
+                    "tileloaddrs64.internal" => "__builtin_ia32_tileloaddrs64_internal",
+                    "tileloaddrst164" => "__builtin_ia32_tileloaddrst164",
+                    "tileloaddrst164.internal" => "__builtin_ia32_tileloaddrst164_internal",
+                    "tileloaddt164" => "__builtin_ia32_tileloaddt164",
+                    "tileloaddt164.internal" => "__builtin_ia32_tileloaddt164_internal",
+                    "tilemovrow" => "__builtin_ia32_tilemovrow",
+                    "tilemovrow.internal" => "__builtin_ia32_tilemovrow_internal",
+                    "tilerelease" => "__builtin_ia32_tilerelease",
+                    "tilestored64" => "__builtin_ia32_tilestored64",
+                    "tilestored64.internal" => "__builtin_ia32_tilestored64_internal",
+                    "tilezero" => "__builtin_ia32_tilezero",
+                    "tilezero.internal" => "__builtin_ia32_tilezero_internal",
+                    "tmmultf32ps" => "__builtin_ia32_tmmultf32ps",
+                    "tmmultf32ps.internal" => "__builtin_ia32_tmmultf32ps_internal",
+                    "tpause" => "__builtin_ia32_tpause",
+                    "ttcmmimfp16ps" => "__builtin_ia32_ttcmmimfp16ps",
+                    "ttcmmimfp16ps.internal" => "__builtin_ia32_ttcmmimfp16ps_internal",
+                    "ttcmmrlfp16ps" => "__builtin_ia32_ttcmmrlfp16ps",
+                    "ttcmmrlfp16ps.internal" => "__builtin_ia32_ttcmmrlfp16ps_internal",
+                    "ttdpbf16ps" => "__builtin_ia32_ttdpbf16ps",
+                    "ttdpbf16ps.internal" => "__builtin_ia32_ttdpbf16ps_internal",
+                    "ttdpfp16ps" => "__builtin_ia32_ttdpfp16ps",
+                    "ttdpfp16ps.internal" => "__builtin_ia32_ttdpfp16ps_internal",
+                    "ttmmultf32ps" => "__builtin_ia32_ttmmultf32ps",
+                    "ttmmultf32ps.internal" => "__builtin_ia32_ttmmultf32ps_internal",
+                    "ttransposed" => "__builtin_ia32_ttransposed",
+                    "ttransposed.internal" => "__builtin_ia32_ttransposed_internal",
+                    "umonitor" => "__builtin_ia32_umonitor",
+                    "umwait" => "__builtin_ia32_umwait",
+                    "urdmsr" => "__builtin_ia32_urdmsr",
+                    "uwrmsr" => "__builtin_ia32_uwrmsr",
+                    "vbcstnebf162ps128" => "__builtin_ia32_vbcstnebf162ps128",
+                    "vbcstnebf162ps256" => "__builtin_ia32_vbcstnebf162ps256",
+                    "vbcstnesh2ps128" => "__builtin_ia32_vbcstnesh2ps128",
+                    "vbcstnesh2ps256" => "__builtin_ia32_vbcstnesh2ps256",
+                    "vcvtneebf162ps128" => "__builtin_ia32_vcvtneebf162ps128",
+                    "vcvtneebf162ps256" => "__builtin_ia32_vcvtneebf162ps256",
+                    "vcvtneeph2ps128" => "__builtin_ia32_vcvtneeph2ps128",
+                    "vcvtneeph2ps256" => "__builtin_ia32_vcvtneeph2ps256",
+                    "vcvtneobf162ps128" => "__builtin_ia32_vcvtneobf162ps128",
+                    "vcvtneobf162ps256" => "__builtin_ia32_vcvtneobf162ps256",
+                    "vcvtneoph2ps128" => "__builtin_ia32_vcvtneoph2ps128",
+                    "vcvtneoph2ps256" => "__builtin_ia32_vcvtneoph2ps256",
+                    "vcvtneps2bf16128" => "__builtin_ia32_vcvtneps2bf16128",
+                    "vcvtneps2bf16256" => "__builtin_ia32_vcvtneps2bf16256",
+                    "vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps",
+                    "vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256",
+                    "vcvtps2ph.128" => "__builtin_ia32_vcvtps2ph",
+                    "vcvtps2ph.256" => "__builtin_ia32_vcvtps2ph256",
+                    "vgf2p8affineinvqb.128" => "__builtin_ia32_vgf2p8affineinvqb_v16qi",
+                    "vgf2p8affineinvqb.256" => "__builtin_ia32_vgf2p8affineinvqb_v32qi",
+                    "vgf2p8affineinvqb.512" => "__builtin_ia32_vgf2p8affineinvqb_v64qi",
+                    "vgf2p8affineqb.128" => "__builtin_ia32_vgf2p8affineqb_v16qi",
+                    "vgf2p8affineqb.256" => "__builtin_ia32_vgf2p8affineqb_v32qi",
+                    "vgf2p8affineqb.512" => "__builtin_ia32_vgf2p8affineqb_v64qi",
+                    "vgf2p8mulb.128" => "__builtin_ia32_vgf2p8mulb_v16qi",
+                    "vgf2p8mulb.256" => "__builtin_ia32_vgf2p8mulb_v32qi",
+                    "vgf2p8mulb.512" => "__builtin_ia32_vgf2p8mulb_v64qi",
+                    "vsha512msg1" => "__builtin_ia32_vsha512msg1",
+                    "vsha512msg2" => "__builtin_ia32_vsha512msg2",
+                    "vsha512rnds2" => "__builtin_ia32_vsha512rnds2",
+                    "vsm3msg1" => "__builtin_ia32_vsm3msg1",
+                    "vsm3msg2" => "__builtin_ia32_vsm3msg2",
+                    "vsm3rnds2" => "__builtin_ia32_vsm3rnds2",
+                    "vsm4key4128" => "__builtin_ia32_vsm4key4128",
+                    "vsm4key4256" => "__builtin_ia32_vsm4key4256",
+                    "vsm4key4512" => "__builtin_ia32_vsm4key4512",
+                    "vsm4rnds4128" => "__builtin_ia32_vsm4rnds4128",
+                    "vsm4rnds4256" => "__builtin_ia32_vsm4rnds4256",
+                    "vsm4rnds4512" => "__builtin_ia32_vsm4rnds4512",
+                    "wbinvd" => "__builtin_ia32_wbinvd",
+                    "wbnoinvd" => "__builtin_ia32_wbnoinvd",
+                    "wrfsbase.32" => "__builtin_ia32_wrfsbase32",
+                    "wrfsbase.64" => "__builtin_ia32_wrfsbase64",
+                    "wrgsbase.32" => "__builtin_ia32_wrgsbase32",
+                    "wrgsbase.64" => "__builtin_ia32_wrgsbase64",
+                    "wrpkru" => "__builtin_ia32_wrpkru",
+                    "wrssd" => "__builtin_ia32_wrssd",
+                    "wrssq" => "__builtin_ia32_wrssq",
+                    "wrussd" => "__builtin_ia32_wrussd",
+                    "wrussq" => "__builtin_ia32_wrussq",
+                    "xabort" => "__builtin_ia32_xabort",
+                    "xbegin" => "__builtin_ia32_xbegin",
+                    "xend" => "__builtin_ia32_xend",
+                    "xop.vfrcz.pd" => "__builtin_ia32_vfrczpd",
+                    "xop.vfrcz.pd.256" => "__builtin_ia32_vfrczpd256",
+                    "xop.vfrcz.ps" => "__builtin_ia32_vfrczps",
+                    "xop.vfrcz.ps.256" => "__builtin_ia32_vfrczps256",
+                    "xop.vfrcz.sd" => "__builtin_ia32_vfrczsd",
+                    "xop.vfrcz.ss" => "__builtin_ia32_vfrczss",
+                    "xop.vpcmov" => "__builtin_ia32_vpcmov",
+                    "xop.vpcmov.256" => "__builtin_ia32_vpcmov_256",
+                    "xop.vpcomb" => "__builtin_ia32_vpcomb",
+                    "xop.vpcomd" => "__builtin_ia32_vpcomd",
+                    "xop.vpcomq" => "__builtin_ia32_vpcomq",
+                    "xop.vpcomub" => "__builtin_ia32_vpcomub",
+                    "xop.vpcomud" => "__builtin_ia32_vpcomud",
+                    "xop.vpcomuq" => "__builtin_ia32_vpcomuq",
+                    "xop.vpcomuw" => "__builtin_ia32_vpcomuw",
+                    "xop.vpcomw" => "__builtin_ia32_vpcomw",
+                    "xop.vpermil2pd" => "__builtin_ia32_vpermil2pd",
+                    "xop.vpermil2pd.256" => "__builtin_ia32_vpermil2pd256",
+                    "xop.vpermil2ps" => "__builtin_ia32_vpermil2ps",
+                    "xop.vpermil2ps.256" => "__builtin_ia32_vpermil2ps256",
+                    "xop.vphaddbd" => "__builtin_ia32_vphaddbd",
+                    "xop.vphaddbq" => "__builtin_ia32_vphaddbq",
+                    "xop.vphaddbw" => "__builtin_ia32_vphaddbw",
+                    "xop.vphadddq" => "__builtin_ia32_vphadddq",
+                    "xop.vphaddubd" => "__builtin_ia32_vphaddubd",
+                    "xop.vphaddubq" => "__builtin_ia32_vphaddubq",
+                    "xop.vphaddubw" => "__builtin_ia32_vphaddubw",
+                    "xop.vphaddudq" => "__builtin_ia32_vphaddudq",
+                    "xop.vphadduwd" => "__builtin_ia32_vphadduwd",
+                    "xop.vphadduwq" => "__builtin_ia32_vphadduwq",
+                    "xop.vphaddwd" => "__builtin_ia32_vphaddwd",
+                    "xop.vphaddwq" => "__builtin_ia32_vphaddwq",
+                    "xop.vphsubbw" => "__builtin_ia32_vphsubbw",
+                    "xop.vphsubdq" => "__builtin_ia32_vphsubdq",
+                    "xop.vphsubwd" => "__builtin_ia32_vphsubwd",
+                    "xop.vpmacsdd" => "__builtin_ia32_vpmacsdd",
+                    "xop.vpmacsdqh" => "__builtin_ia32_vpmacsdqh",
+                    "xop.vpmacsdql" => "__builtin_ia32_vpmacsdql",
+                    "xop.vpmacssdd" => "__builtin_ia32_vpmacssdd",
+                    "xop.vpmacssdqh" => "__builtin_ia32_vpmacssdqh",
+                    "xop.vpmacssdql" => "__builtin_ia32_vpmacssdql",
+                    "xop.vpmacsswd" => "__builtin_ia32_vpmacsswd",
+                    "xop.vpmacssww" => "__builtin_ia32_vpmacssww",
+                    "xop.vpmacswd" => "__builtin_ia32_vpmacswd",
+                    "xop.vpmacsww" => "__builtin_ia32_vpmacsww",
+                    "xop.vpmadcsswd" => "__builtin_ia32_vpmadcsswd",
+                    "xop.vpmadcswd" => "__builtin_ia32_vpmadcswd",
+                    "xop.vpperm" => "__builtin_ia32_vpperm",
+                    "xop.vprotb" => "__builtin_ia32_vprotb",
+                    "xop.vprotbi" => "__builtin_ia32_vprotbi",
+                    "xop.vprotd" => "__builtin_ia32_vprotd",
+                    "xop.vprotdi" => "__builtin_ia32_vprotdi",
+                    "xop.vprotq" => "__builtin_ia32_vprotq",
+                    "xop.vprotqi" => "__builtin_ia32_vprotqi",
+                    "xop.vprotw" => "__builtin_ia32_vprotw",
+                    "xop.vprotwi" => "__builtin_ia32_vprotwi",
+                    "xop.vpshab" => "__builtin_ia32_vpshab",
+                    "xop.vpshad" => "__builtin_ia32_vpshad",
+                    "xop.vpshaq" => "__builtin_ia32_vpshaq",
+                    "xop.vpshaw" => "__builtin_ia32_vpshaw",
+                    "xop.vpshlb" => "__builtin_ia32_vpshlb",
+                    "xop.vpshld" => "__builtin_ia32_vpshld",
+                    "xop.vpshlq" => "__builtin_ia32_vpshlq",
+                    "xop.vpshlw" => "__builtin_ia32_vpshlw",
+                    "xresldtrk" => "__builtin_ia32_xresldtrk",
+                    "xsusldtrk" => "__builtin_ia32_xsusldtrk",
+                    "xtest" => "__builtin_ia32_xtest",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            x86(name)
+        }
+        "xcore" => {
+            #[allow(non_snake_case)]
+            fn xcore(name: &str) -> &str {
+                match name {
+                    // xcore
+                    "bitrev" => "__builtin_bitrev",
+                    "getid" => "__builtin_getid",
+                    "getps" => "__builtin_getps",
+                    "setps" => "__builtin_setps",
+                    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+                }
+            }
+            xcore(name)
+        }
+        _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+    }
 }
diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs b/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs
index 0eebd21001a..0b77694f115 100644
--- a/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs
+++ b/compiler/rustc_codegen_gcc/src/intrinsic/llvm.rs
@@ -1012,7 +1012,7 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
     };
     let func = cx.context.get_builtin_function(gcc_name);
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
-    return func;
+    func
 }
 
 #[cfg(feature = "master")]
@@ -1548,10 +1548,13 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
         "llvm.x86.tcmmrlfp16ps" => "__builtin_trap",
 
         // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
-        _ => include!("archs.rs"),
+        _ => map_arch_intrinsic(name),
     };
 
     let func = cx.context.get_target_builtin_function(gcc_name);
     cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
     func
 }
+
+#[cfg(feature = "master")]
+include!("archs.rs");
diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs b/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
index 9e05b8f23aa..09132c34aae 100644
--- a/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
+++ b/compiler/rustc_codegen_gcc/src/intrinsic/mod.rs
@@ -196,6 +196,95 @@ fn get_simple_function<'gcc, 'tcx>(
     ))
 }
 
+fn get_simple_function_f128<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
+    if !cx.supports_f128_type {
+        return None;
+    }
+
+    let f128_type = cx.type_f128();
+    let func_name = match name {
+        sym::ceilf128 => "ceilf128",
+        sym::floorf128 => "floorf128",
+        sym::truncf128 => "truncf128",
+        sym::roundf128 => "roundf128",
+        sym::round_ties_even_f128 => "roundevenf128",
+        sym::sqrtf128 => "sqrtf128",
+        _ => return None,
+    };
+    Some(cx.context.new_function(
+        None,
+        FunctionType::Extern,
+        f128_type,
+        &[cx.context.new_parameter(None, f128_type, "a")],
+        func_name,
+        false,
+    ))
+}
+
+fn get_simple_function_f128_2args<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+) -> Option<Function<'gcc>> {
+    if !cx.supports_f128_type {
+        return None;
+    }
+
+    let f128_type = cx.type_f128();
+    let func_name = match name {
+        sym::maxnumf128 => "fmaxf128",
+        sym::minnumf128 => "fminf128",
+        _ => return None,
+    };
+    Some(cx.context.new_function(
+        None,
+        FunctionType::Extern,
+        f128_type,
+        &[
+            cx.context.new_parameter(None, f128_type, "a"),
+            cx.context.new_parameter(None, f128_type, "b"),
+        ],
+        func_name,
+        false,
+    ))
+}
+
+fn f16_builtin<'gcc, 'tcx>(
+    cx: &CodegenCx<'gcc, 'tcx>,
+    name: Symbol,
+    args: &[OperandRef<'tcx, RValue<'gcc>>],
+) -> RValue<'gcc> {
+    let f32_type = cx.type_f32();
+    let builtin_name = match name {
+        sym::ceilf16 => "__builtin_ceilf",
+        sym::floorf16 => "__builtin_floorf",
+        sym::fmaf16 => "fmaf",
+        sym::maxnumf16 => "__builtin_fmaxf",
+        sym::minnumf16 => "__builtin_fminf",
+        sym::powf16 => "__builtin_powf",
+        sym::powif16 => {
+            let func = cx.context.get_builtin_function("__builtin_powif");
+            let arg0 = cx.context.new_cast(None, args[0].immediate(), f32_type);
+            let args = [arg0, args[1].immediate()];
+            let result = cx.context.new_call(None, func, &args);
+            return cx.context.new_cast(None, result, cx.type_f16());
+        }
+        sym::roundf16 => "__builtin_roundf",
+        sym::round_ties_even_f16 => "__builtin_rintf",
+        sym::sqrtf16 => "__builtin_sqrtf",
+        sym::truncf16 => "__builtin_truncf",
+        _ => unreachable!(),
+    };
+
+    let func = cx.context.get_builtin_function(builtin_name);
+    let args: Vec<_> =
+        args.iter().map(|arg| cx.context.new_cast(None, arg.immediate(), f32_type)).collect();
+    let result = cx.context.new_call(None, func, &args);
+    cx.context.new_cast(None, result, cx.type_f16())
+}
+
 impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> {
     fn codegen_intrinsic_call(
         &mut self,
@@ -211,7 +300,9 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
         let fn_args = instance.args;
 
         let simple = get_simple_intrinsic(self, name);
-        let simple_func = get_simple_function(self, name);
+        let simple_func = get_simple_function(self, name)
+            .or_else(|| get_simple_function_f128(self, name))
+            .or_else(|| get_simple_function_f128_2args(self, name));
 
         // FIXME(tempdragon): Re-enable `clippy::suspicious_else_formatting` if the following issue is solved:
         // https://github.com/rust-lang/rust-clippy/issues/12497
@@ -234,17 +325,55 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
                     &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
                 )
             }
-            sym::fmaf16 => {
-                // TODO(antoyo): use the correct builtin for f16.
-                let func = self.cx.context.get_builtin_function("fmaf");
-                let args: Vec<_> = args
-                    .iter()
-                    .map(|arg| {
-                        self.cx.context.new_cast(self.location, arg.immediate(), self.cx.type_f32())
-                    })
-                    .collect();
-                let result = self.cx.context.new_call(self.location, func, &args);
-                self.cx.context.new_cast(self.location, result, self.cx.type_f16())
+            sym::ceilf16
+            | sym::floorf16
+            | sym::fmaf16
+            | sym::maxnumf16
+            | sym::minnumf16
+            | sym::powf16
+            | sym::powif16
+            | sym::roundf16
+            | sym::round_ties_even_f16
+            | sym::sqrtf16
+            | sym::truncf16 => f16_builtin(self, name, args),
+            sym::fmaf128 => {
+                let f128_type = self.cx.type_f128();
+                let func = self.cx.context.new_function(
+                    None,
+                    FunctionType::Extern,
+                    f128_type,
+                    &[
+                        self.cx.context.new_parameter(None, f128_type, "a"),
+                        self.cx.context.new_parameter(None, f128_type, "b"),
+                        self.cx.context.new_parameter(None, f128_type, "c"),
+                    ],
+                    "fmaf128",
+                    false,
+                );
+                self.cx.context.new_call(
+                    self.location,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                )
+            }
+            sym::powif128 => {
+                let f128_type = self.cx.type_f128();
+                let func = self.cx.context.new_function(
+                    None,
+                    FunctionType::Extern,
+                    f128_type,
+                    &[
+                        self.cx.context.new_parameter(None, f128_type, "a"),
+                        self.cx.context.new_parameter(None, self.int_type, "b"),
+                    ],
+                    "__powitf2",
+                    false,
+                );
+                self.cx.context.new_call(
+                    self.location,
+                    func,
+                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+                )
             }
             sym::is_val_statically_known => {
                 let a = args[0].immediate();
@@ -526,7 +655,7 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc
 
     fn type_checked_load(
         &mut self,
-        _llvtable: Self::Value,
+        _vtable: Self::Value,
         _vtable_byte_offset: u64,
         _typeid: Self::Value,
     ) -> Self::Value {
@@ -622,23 +751,23 @@ impl<'gcc, 'tcx> ArgAbiExt<'gcc, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
                 // We instead thus allocate some scratch space...
                 let scratch_size = cast.size(bx);
                 let scratch_align = cast.align(bx);
-                let llscratch = bx.alloca(scratch_size, scratch_align);
-                bx.lifetime_start(llscratch, scratch_size);
+                let scratch = bx.alloca(scratch_size, scratch_align);
+                bx.lifetime_start(scratch, scratch_size);
 
                 // ... where we first store the value...
-                bx.store(val, llscratch, scratch_align);
+                rustc_codegen_ssa::mir::store_cast(bx, cast, val, scratch, scratch_align);
 
                 // ... and then memcpy it to the intended destination.
                 bx.memcpy(
                     dst.val.llval,
                     self.layout.align.abi,
-                    llscratch,
+                    scratch,
                     scratch_align,
                     bx.const_usize(self.layout.size.bytes()),
                     MemFlags::empty(),
                 );
 
-                bx.lifetime_end(llscratch, scratch_size);
+                bx.lifetime_end(scratch, scratch_size);
             }
         } else {
             OperandValue::Immediate(val).store(bx, dst);
diff --git a/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs b/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs
index 82ef0d0b13a..6f6bc93b8b2 100644
--- a/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs
+++ b/compiler/rustc_codegen_gcc/src/intrinsic/simd.rs
@@ -1081,7 +1081,9 @@ pub fn generic_simd_intrinsic<'a, 'gcc, 'tcx>(
         let (_, element_ty1) = args[1].layout.ty.simd_size_and_type(bx.tcx());
         let (_, element_ty2) = args[2].layout.ty.simd_size_and_type(bx.tcx());
         let (pointer_count, underlying_ty) = match *element_ty1.kind() {
-            ty::RawPtr(p_ty, mutbl) if p_ty == in_elem && mutbl == hir::Mutability::Mut => {
+            ty::RawPtr(p_ty, mutability)
+                if p_ty == in_elem && mutability == hir::Mutability::Mut =>
+            {
                 (ptr_count(element_ty1), non_ptr(element_ty1))
             }
             _ => {
diff --git a/compiler/rustc_codegen_gcc/src/lib.rs b/compiler/rustc_codegen_gcc/src/lib.rs
index 0591ffa42e4..aa57655921d 100644
--- a/compiler/rustc_codegen_gcc/src/lib.rs
+++ b/compiler/rustc_codegen_gcc/src/lib.rs
@@ -3,10 +3,12 @@
  * TODO(antoyo): support #[inline] attributes.
  * TODO(antoyo): support LTO (gcc's equivalent to Full LTO is -flto -flto-partition=one — https://documentation.suse.com/sbp/all/html/SBP-GCC-10/index.html).
  * For Thin LTO, this might be helpful:
+// cspell:disable-next-line
  * In gcc 4.6 -fwhopr was removed and became default with -flto. The non-whopr path can still be executed via -flto-partition=none.
  * Or the new incremental LTO (https://www.phoronix.com/news/GCC-Incremental-LTO-Patches)?
  *
- * Maybe some missing optizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
+ * Maybe some missing optimizations enabled by rustc's LTO is in there: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
+// cspell:disable-next-line
  * Like -fipa-icf (should be already enabled) and maybe -fdevirtualize-at-ltrans.
  * TODO: disable debug info always being emitted. Perhaps this slows down things?
  *
@@ -48,7 +50,6 @@ extern crate rustc_index;
 #[cfg(feature = "master")]
 extern crate rustc_interface;
 extern crate rustc_macros;
-extern crate rustc_metadata;
 extern crate rustc_middle;
 extern crate rustc_session;
 extern crate rustc_span;
@@ -106,7 +107,6 @@ use rustc_codegen_ssa::{CodegenResults, CompiledModule, ModuleCodegen, TargetCon
 use rustc_data_structures::fx::FxIndexMap;
 use rustc_data_structures::sync::IntoDynSyncSend;
 use rustc_errors::DiagCtxtHandle;
-use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_middle::ty::TyCtxt;
 use rustc_middle::util::Providers;
@@ -208,7 +208,7 @@ impl CodegenBackend for GccCodegenBackend {
         #[cfg(not(feature = "master"))]
         {
             let temp_dir = TempDir::new().expect("cannot create temporary directory");
-            let temp_file = temp_dir.into_path().join("result.asm");
+            let temp_file = temp_dir.keep().join("result.asm");
             let check_context = Context::default();
             check_context.set_print_errors_to_stderr(false);
             let _int128_ty = check_context.new_c_type(CType::UInt128t);
@@ -230,20 +230,9 @@ impl CodegenBackend for GccCodegenBackend {
         providers.global_backend_features = |tcx, ()| gcc_util::global_gcc_features(tcx.sess, true)
     }
 
-    fn codegen_crate(
-        &self,
-        tcx: TyCtxt<'_>,
-        metadata: EncodedMetadata,
-        need_metadata_module: bool,
-    ) -> Box<dyn Any> {
+    fn codegen_crate(&self, tcx: TyCtxt<'_>) -> Box<dyn Any> {
         let target_cpu = target_cpu(tcx.sess);
-        let res = codegen_crate(
-            self.clone(),
-            tcx,
-            target_cpu.to_string(),
-            metadata,
-            need_metadata_module,
-        );
+        let res = codegen_crate(self.clone(), tcx, target_cpu.to_string());
 
         Box::new(res)
     }
@@ -443,10 +432,11 @@ impl WriteBackendMethods for GccCodegenBackend {
     ) -> Result<ModuleCodegen<Self::Module>, FatalError> {
         back::write::link(cgcx, dcx, modules)
     }
+
     fn autodiff(
         _cgcx: &CodegenContext<Self>,
         _module: &ModuleCodegen<Self::Module>,
-        _diff_fncs: Vec<AutoDiffItem>,
+        _diff_functions: Vec<AutoDiffItem>,
         _config: &ModuleConfig,
     ) -> Result<(), FatalError> {
         unimplemented!()
@@ -507,12 +497,14 @@ fn target_config(sess: &Session, target_info: &LockedTargetInfo) -> TargetConfig
                     return false;
                 }
                 target_info.cpu_supports(feature)
+                // cSpell:disable
                 /*
                   adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512fp16, avx512ifma,
                   avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,
                   bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
                   sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
                 */
+                // cSpell:enable
             })
             .map(Symbol::intern)
             .collect()
@@ -521,13 +513,16 @@ fn target_config(sess: &Session, target_info: &LockedTargetInfo) -> TargetConfig
     let target_features = f(false);
     let unstable_target_features = f(true);
 
+    let has_reliable_f16 = target_info.supports_target_dependent_type(CType::Float16);
+    let has_reliable_f128 = target_info.supports_target_dependent_type(CType::Float128);
+
     TargetConfig {
         target_features,
         unstable_target_features,
         // There are no known bugs with GCC support for f16 or f128
-        has_reliable_f16: true,
-        has_reliable_f16_math: true,
-        has_reliable_f128: true,
-        has_reliable_f128_math: true,
+        has_reliable_f16,
+        has_reliable_f16_math: has_reliable_f16,
+        has_reliable_f128,
+        has_reliable_f128_math: has_reliable_f128,
     }
 }
diff --git a/compiler/rustc_codegen_gcc/src/type_.rs b/compiler/rustc_codegen_gcc/src/type_.rs
index 4e0a250b550..15a0206607e 100644
--- a/compiler/rustc_codegen_gcc/src/type_.rs
+++ b/compiler/rustc_codegen_gcc/src/type_.rs
@@ -302,13 +302,13 @@ impl<'gcc, 'tcx> BaseTypeCodegenMethods for CodegenCx<'gcc, 'tcx> {
     #[cfg_attr(feature = "master", allow(unused_mut))]
     fn type_array(&self, ty: Type<'gcc>, mut len: u64) -> Type<'gcc> {
         #[cfg(not(feature = "master"))]
-        if let Some(struct_type) = ty.is_struct() {
-            if struct_type.get_field_count() == 0 {
-                // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
-                // size of usize::MAX in test_binary_search, we workaround this by setting the size to
-                // zero for ZSTs.
-                len = 0;
-            }
+        if let Some(struct_type) = ty.is_struct()
+            && struct_type.get_field_count() == 0
+        {
+            // NOTE: since gccjit only supports i32 for the array size and libcore's tests uses a
+            // size of usize::MAX in test_binary_search, we workaround this by setting the size to
+            // zero for ZSTs.
+            len = 0;
         }
 
         self.context.new_array_type(None, ty, len)
diff --git a/compiler/rustc_codegen_gcc/src/type_of.rs b/compiler/rustc_codegen_gcc/src/type_of.rs
index 5745acce6fe..093f902bc3d 100644
--- a/compiler/rustc_codegen_gcc/src/type_of.rs
+++ b/compiler/rustc_codegen_gcc/src/type_of.rs
@@ -217,7 +217,7 @@ impl<'tcx> LayoutGccExt<'tcx> for TyAndLayout<'tcx> {
             let ty = match *self.ty.kind() {
                 // NOTE: we cannot remove this match like in the LLVM codegen because the call
                 // to fn_ptr_backend_type handle the on-stack attribute.
-                // TODO(antoyo): find a less hackish way to hande the on-stack attribute.
+                // TODO(antoyo): find a less hackish way to handle the on-stack attribute.
                 ty::FnPtr(sig_tys, hdr) => cx
                     .fn_ptr_backend_type(cx.fn_abi_of_fn_ptr(sig_tys.with(hdr), ty::List::empty())),
                 _ => self.scalar_gcc_type_at(cx, scalar, Size::ZERO),
diff --git a/compiler/rustc_codegen_gcc/tests/failing-ui-tests.txt b/compiler/rustc_codegen_gcc/tests/failing-ui-tests.txt
index 0a01a661c35..d931f0d3b5e 100644
--- a/compiler/rustc_codegen_gcc/tests/failing-ui-tests.txt
+++ b/compiler/rustc_codegen_gcc/tests/failing-ui-tests.txt
@@ -1,26 +1,12 @@
 tests/ui/allocator/no_std-alloc-error-handler-custom.rs
 tests/ui/allocator/no_std-alloc-error-handler-default.rs
 tests/ui/asm/may_unwind.rs
-tests/ui/functions-closures/parallel-codegen-closures.rs
-tests/ui/linkage-attr/linkage1.rs
-tests/ui/lto/dylib-works.rs
-tests/ui/sepcomp/sepcomp-cci.rs
-tests/ui/sepcomp/sepcomp-extern.rs
-tests/ui/sepcomp/sepcomp-fns-backwards.rs
-tests/ui/sepcomp/sepcomp-fns.rs
-tests/ui/sepcomp/sepcomp-statics.rs
 tests/ui/asm/x86_64/may_unwind.rs
-tests/ui/panics/catch-unwind-bang.rs
 tests/ui/drop/dynamic-drop-async.rs
 tests/ui/cfg/cfg-panic-abort.rs
-tests/ui/drop/repeat-drop.rs
-tests/ui/coroutine/panic-drops-resume.rs
-tests/ui/fmt/format-args-capture.rs
-tests/ui/coroutine/panic-drops.rs
 tests/ui/intrinsics/panic-uninitialized-zeroed.rs
 tests/ui/iterators/iter-sum-overflow-debug.rs
 tests/ui/iterators/iter-sum-overflow-overflow-checks.rs
-tests/ui/mir/mir_calls_to_shims.rs
 tests/ui/mir/mir_drop_order.rs
 tests/ui/mir/mir_let_chains_drop_order.rs
 tests/ui/oom_unwind.rs
@@ -31,27 +17,15 @@ tests/ui/unwind-no-uwtable.rs
 tests/ui/parser/unclosed-delimiter-in-dep.rs
 tests/ui/consts/missing_span_in_backtrace.rs
 tests/ui/drop/dynamic-drop.rs
-tests/ui/issues/issue-43853.rs
-tests/ui/issues/issue-47364.rs
-tests/ui/macros/rfc-2011-nicer-assert-messages/assert-without-captures-does-not-create-unnecessary-code.rs
-tests/ui/rfcs/rfc-1857-stabilize-drop-order/drop-order.rs
 tests/ui/rfcs/rfc-2091-track-caller/std-panic-locations.rs
 tests/ui/simd/issue-17170.rs
 tests/ui/simd/issue-39720.rs
-tests/ui/alloc-error/default-alloc-error-hook.rs
-tests/ui/coroutine/panic-safe.rs
 tests/ui/issues/issue-14875.rs
 tests/ui/issues/issue-29948.rs
-tests/ui/panics/nested_panic_caught.rs
 tests/ui/process/println-with-broken-pipe.rs
 tests/ui/lto/thin-lto-inlines2.rs
-tests/ui/lto/weak-works.rs
-tests/ui/panic-runtime/lto-abort.rs 
-tests/ui/lto/thin-lto-inlines.rs
-tests/ui/lto/thin-lto-global-allocator.rs
-tests/ui/lto/msvc-imp-present.rs
+tests/ui/panic-runtime/lto-abort.rs
 tests/ui/lto/lto-thin-rustc-loads-linker-plugin.rs
-tests/ui/lto/all-crates.rs
 tests/ui/async-await/deep-futures-are-freeze.rs
 tests/ui/coroutine/resume-after-return.rs
 tests/ui/simd/masked-load-store.rs
@@ -59,15 +33,11 @@ tests/ui/simd/repr_packed.rs
 tests/ui/async-await/in-trait/dont-project-to-specializable-projection.rs
 tests/ui/consts/try-operator.rs
 tests/ui/coroutine/unwind-abort-mix.rs
-tests/ui/type-alias-impl-trait/rpit_tait_equality_in_canonical_query.rs
-tests/ui/impl-trait/equality-in-canonical-query.rs
 tests/ui/consts/issue-miri-1910.rs
-tests/ui/mir/mir_heavy_promoted.rs
 tests/ui/consts/const_cmp_type_id.rs
 tests/ui/consts/issue-73976-monomorphic.rs
 tests/ui/consts/issue-94675.rs
 tests/ui/traits/const-traits/const-drop-fail.rs
-tests/ui/traits/const-traits/const-drop.rs
 tests/ui/runtime/on-broken-pipe/child-processes.rs
 tests/ui/sanitizer/cfi/assoc-ty-lifetime-issue-123053.rs
 tests/ui/sanitizer/cfi/async-closures.rs
@@ -85,14 +55,9 @@ tests/ui/sanitizer/cfi/can-reveal-opaques.rs
 tests/ui/sanitizer/kcfi-mangling.rs
 tests/ui/statics/const_generics.rs
 tests/ui/backtrace/dylib-dep.rs
-tests/ui/errors/pic-linker.rs
 tests/ui/delegation/fn-header.rs
-tests/ui/consts/zst_no_llvm_alloc.rs
 tests/ui/consts/const-eval/parse_ints.rs
-tests/ui/simd/intrinsic/generic-arithmetic-pass.rs
 tests/ui/simd/intrinsic/generic-as.rs
-tests/ui/backtrace/backtrace.rs
-tests/ui/lifetimes/tail-expr-lock-poisoning.rs
 tests/ui/runtime/rt-explody-panic-payloads.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline1.rs
 tests/ui/codegen/equal-pointers-unequal/as-cast/inline2.rs
@@ -108,4 +73,9 @@ tests/ui/codegen/equal-pointers-unequal/strict-provenance/segfault.rs
 tests/ui/codegen/equal-pointers-unequal/strict-provenance/zero.rs
 tests/ui/simd/simd-bitmask-notpow2.rs
 tests/ui/codegen/StackColoring-not-blowup-stack-issue-40883.rs
+tests/ui/numbers-arithmetic/u128-as-f32.rs
+tests/ui/lto/all-crates.rs
 tests/ui/uninhabited/uninhabited-transparent-return-abi.rs
+tests/ui/coroutine/panic-drops-resume.rs
+tests/ui/coroutine/panic-drops.rs
+tests/ui/coroutine/panic-safe.rs
diff --git a/compiler/rustc_codegen_gcc/tests/lang_tests_common.rs b/compiler/rustc_codegen_gcc/tests/lang_tests_common.rs
index bdcf14b4b26..9abe97b1087 100644
--- a/compiler/rustc_codegen_gcc/tests/lang_tests_common.rs
+++ b/compiler/rustc_codegen_gcc/tests/lang_tests_common.rs
@@ -57,10 +57,10 @@ pub fn main_inner(profile: Profile) {
 
     #[cfg(not(feature = "master"))]
     fn filter(filename: &Path) -> bool {
-        if let Some(filename) = filename.to_str() {
-            if filename.ends_with("gep.rs") {
-                return false;
-            }
+        if let Some(filename) = filename.to_str()
+            && filename.ends_with("gep.rs")
+        {
+            return false;
         }
         rust_filter(filename)
     }
diff --git a/compiler/rustc_codegen_gcc/tests/run/packed_u128.rs b/compiler/rustc_codegen_gcc/tests/run/packed_u128.rs
new file mode 100644
index 00000000000..b7cc6e21023
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/tests/run/packed_u128.rs
@@ -0,0 +1,31 @@
+// Compiler:
+//
+// Run-time:
+//   status: 0
+
+#![feature(no_core)]
+#![no_std]
+#![no_core]
+#![no_main]
+
+extern crate mini_core;
+use intrinsics::black_box;
+use mini_core::*;
+#[repr(packed(1))]
+pub struct ScalarInt {
+    data: u128,
+    size: u8,
+}
+#[inline(never)]
+#[no_mangle]
+fn read_data(a: &ScalarInt) {
+    black_box(a.data);
+}
+
+#[no_mangle]
+extern "C" fn main(argc: i32, _argv: *const *const u8) -> i32 {
+    let data =
+        [black_box(ScalarInt { data: 0, size: 1 }), black_box(ScalarInt { data: 0, size: 1 })];
+    read_data(&data[1]);
+    0
+}
diff --git a/compiler/rustc_codegen_gcc/tools/cspell_dicts/rust.txt b/compiler/rustc_codegen_gcc/tools/cspell_dicts/rust.txt
new file mode 100644
index 00000000000..379cbd77eef
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/tools/cspell_dicts/rust.txt
@@ -0,0 +1,2 @@
+lateout
+repr
diff --git a/compiler/rustc_codegen_gcc/tools/cspell_dicts/rustc_codegen_gcc.txt b/compiler/rustc_codegen_gcc/tools/cspell_dicts/rustc_codegen_gcc.txt
new file mode 100644
index 00000000000..31023e50ffa
--- /dev/null
+++ b/compiler/rustc_codegen_gcc/tools/cspell_dicts/rustc_codegen_gcc.txt
@@ -0,0 +1,75 @@
+aapcs
+addo
+archs
+ashl
+ashr
+cgcx
+clzll
+cmse
+codegened
+csky
+ctlz
+ctpop
+cttz
+ctzll
+flto
+fmaximumf
+fmuladd
+fmuladdf
+fminimumf
+fmul
+fptosi
+fptosui
+fptoui
+fwrapv
+gimple
+hrtb
+immediates
+liblto
+llbb
+llcx
+llextra
+llfn
+lgcc
+llmod
+llresult
+llret
+ltrans
+llty
+llval
+llvals
+loong
+lshr
+masm
+maximumf
+maxnumf
+mavx
+mcmodel
+minimumf
+minnumf
+monomorphization
+monomorphizations
+monomorphized
+monomorphizing
+movnt
+mulo
+nvptx
+pointee
+powitf
+reassoc
+riscv
+rlib
+roundevenf
+rustc
+sitofp
+sizet
+spir
+subo
+sysv
+tbaa
+uitofp
+unord
+uninlined
+utrunc
+xabort
+zext
diff --git a/compiler/rustc_codegen_gcc/tools/generate_intrinsics.py b/compiler/rustc_codegen_gcc/tools/generate_intrinsics.py
index 181f1e501a4..ed0ebf00719 100644
--- a/compiler/rustc_codegen_gcc/tools/generate_intrinsics.py
+++ b/compiler/rustc_codegen_gcc/tools/generate_intrinsics.py
@@ -168,25 +168,39 @@ def update_intrinsics(llvm_path, llvmint, llvmint2):
         os.path.dirname(os.path.abspath(__file__)),
         "../src/intrinsic/archs.rs",
     )
+    # A hashmap of all architectures. This allows us to first match on the architecture, and then on the intrinsics.
+    # This speeds up the comparison, and makes our code considerably smaller.
+    # Since all intrinsic names start with "llvm.", we skip that prefix.
     print("Updating content of `{}`...".format(output_file))
     with open(output_file, "w", encoding="utf8") as out:
         out.write("// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`\n")
         out.write("// DO NOT EDIT IT!\n")
-        out.write("match name {\n")
+        out.write("/// Translate a given LLVM intrinsic name to an equivalent GCC one.\n")
+        out.write("fn map_arch_intrinsic(name:&str)->&str{\n")
+        out.write('let Some(name) = name.strip_prefix("llvm.") else { unimplemented!("***** unsupported LLVM intrinsic {}", name) };\n')
+        out.write('let Some((arch, name)) = name.split_once(\'.\') else { unimplemented!("***** unsupported LLVM intrinsic {}", name) };\n')
+        out.write("match arch {\n")
         for arch in archs:
             if len(intrinsics[arch]) == 0:
                 continue
+            out.write("\"{}\" => {{ #[allow(non_snake_case)] fn {}(name: &str) -> &str {{ match name {{".format(arch,arch))
             intrinsics[arch].sort(key=lambda x: (x[0], x[2]))
             out.write('    // {}\n'.format(arch))
             for entry in intrinsics[arch]:
+                llvm_name = entry[0].removeprefix("llvm.");
+                llvm_name = llvm_name.removeprefix(arch);
+                llvm_name = llvm_name.removeprefix(".");
                 if entry[2] is True: # if it is a duplicate
-                    out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(entry[0], entry[1]))
+                    out.write('    // [DUPLICATE]: "{}" => "{}",\n'.format(llvm_name, entry[1]))
                 elif "_round_mask" in entry[1]:
-                    out.write('    // [INVALID CONVERSION]: "{}" => "{}",\n'.format(entry[0], entry[1]))
+                    out.write('    // [INVALID CONVERSION]: "{}" => "{}",\n'.format(llvm_name, entry[1]))
                 else:
-                    out.write('    "{}" => "{}",\n'.format(entry[0], entry[1]))
-        out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
-        out.write("}\n")
+                    out.write('    "{}" => "{}",\n'.format(llvm_name, entry[1]))
+            out.write('    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),\n')
+            out.write("}} }} {}(name) }}\n,".format(arch))
+        out.write('    _ => unimplemented!("***** unsupported LLVM architecture {}", name),\n')
+        out.write("}\n}")
+    subprocess.call(["rustfmt", output_file])
     print("Done!")
 
 
diff --git a/compiler/rustc_codegen_llvm/messages.ftl b/compiler/rustc_codegen_llvm/messages.ftl
index bda121c67fb..3faeb9b3b22 100644
--- a/compiler/rustc_codegen_llvm/messages.ftl
+++ b/compiler/rustc_codegen_llvm/messages.ftl
@@ -10,11 +10,6 @@ codegen_llvm_dynamic_linking_with_lto =
 
 codegen_llvm_fixed_x18_invalid_arch = the `-Zfixed-x18` flag is not supported on the `{$arch}` architecture
 
-codegen_llvm_forbidden_ctarget_feature =
-    target feature `{$feature}` cannot be {$enabled} with `-Ctarget-feature`: {$reason}
-    .note = this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release!
-codegen_llvm_forbidden_ctarget_feature_issue = for more information, see issue #116344 <https://github.com/rust-lang/rust/issues/116344>
-
 codegen_llvm_from_llvm_diag = {$message}
 
 codegen_llvm_from_llvm_optimization_diag = {$filename}:{$line}:{$column} {$pass_name} ({$kind}): {$message}
@@ -76,10 +71,6 @@ codegen_llvm_unknown_ctarget_feature_prefix =
 
 codegen_llvm_unknown_debuginfo_compression = unknown debuginfo compression algorithm {$algorithm} - will fall back to uncompressed debuginfo
 
-codegen_llvm_unstable_ctarget_feature =
-    unstable feature specified for `-Ctarget-feature`: `{$feature}`
-    .note = this feature is not stably supported; its behavior can change in the future
-
 codegen_llvm_write_bytecode = failed to write bytecode to {$path}: {$err}
 
 codegen_llvm_write_ir = failed to write LLVM IR to {$path}
diff --git a/compiler/rustc_codegen_llvm/src/abi.rs b/compiler/rustc_codegen_llvm/src/abi.rs
index 119cd634f98..4b07c8aef91 100644
--- a/compiler/rustc_codegen_llvm/src/abi.rs
+++ b/compiler/rustc_codegen_llvm/src/abi.rs
@@ -229,7 +229,7 @@ impl<'ll, 'tcx> ArgAbiExt<'ll, 'tcx> for ArgAbi<'tcx, Ty<'tcx>> {
                 let llscratch = bx.alloca(scratch_size, scratch_align);
                 bx.lifetime_start(llscratch, scratch_size);
                 // ...store the value...
-                bx.store(val, llscratch, scratch_align);
+                rustc_codegen_ssa::mir::store_cast(bx, cast, val, llscratch, scratch_align);
                 // ... and then memcpy it to the intended destination.
                 bx.memcpy(
                     dst.val.llval,
@@ -649,6 +649,10 @@ impl llvm::CallConv {
         match conv {
             CanonAbi::C | CanonAbi::Rust => llvm::CCallConv,
             CanonAbi::RustCold => llvm::PreserveMost,
+            // Functions with this calling convention can only be called from assembly, but it is
+            // possible to declare an `extern "custom"` block, so the backend still needs a calling
+            // convention for declaring foreign functions.
+            CanonAbi::Custom => llvm::CCallConv,
             CanonAbi::GpuKernel => {
                 if arch == "amdgpu" {
                     llvm::AmdgpuKernel
diff --git a/compiler/rustc_codegen_llvm/src/allocator.rs b/compiler/rustc_codegen_llvm/src/allocator.rs
index 4a78e694979..9dca63cfc8d 100644
--- a/compiler/rustc_codegen_llvm/src/allocator.rs
+++ b/compiler/rustc_codegen_llvm/src/allocator.rs
@@ -57,7 +57,7 @@ pub(crate) unsafe fn codegen(
             let from_name = mangle_internal_symbol(tcx, &global_fn_name(method.name));
             let to_name = mangle_internal_symbol(tcx, &default_fn_name(method.name));
 
-            create_wrapper_function(tcx, &cx, &from_name, &to_name, &args, output, false);
+            create_wrapper_function(tcx, &cx, &from_name, Some(&to_name), &args, output, false);
         }
     }
 
@@ -66,7 +66,7 @@ pub(crate) unsafe fn codegen(
         tcx,
         &cx,
         &mangle_internal_symbol(tcx, "__rust_alloc_error_handler"),
-        &mangle_internal_symbol(tcx, alloc_error_handler_name(alloc_error_handler_kind)),
+        Some(&mangle_internal_symbol(tcx, alloc_error_handler_name(alloc_error_handler_kind))),
         &[usize, usize], // size, align
         None,
         true,
@@ -81,11 +81,16 @@ pub(crate) unsafe fn codegen(
         let llval = llvm::LLVMConstInt(i8, val as u64, False);
         llvm::set_initializer(ll_g, llval);
 
-        let name = mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE);
-        let ll_g = cx.declare_global(&name, i8);
-        llvm::set_visibility(ll_g, llvm::Visibility::from_generic(tcx.sess.default_visibility()));
-        let llval = llvm::LLVMConstInt(i8, 0, False);
-        llvm::set_initializer(ll_g, llval);
+        // __rust_no_alloc_shim_is_unstable_v2
+        create_wrapper_function(
+            tcx,
+            &cx,
+            &mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE),
+            None,
+            &[],
+            None,
+            false,
+        );
     }
 
     if tcx.sess.opts.debuginfo != DebugInfo::None {
@@ -99,7 +104,7 @@ fn create_wrapper_function(
     tcx: TyCtxt<'_>,
     cx: &SimpleCx<'_>,
     from_name: &str,
-    to_name: &str,
+    to_name: Option<&str>,
     args: &[&Type],
     output: Option<&Type>,
     no_return: bool,
@@ -128,33 +133,38 @@ fn create_wrapper_function(
         attributes::apply_to_llfn(llfn, llvm::AttributePlace::Function, &[uwtable]);
     }
 
-    let callee = declare_simple_fn(
-        &cx,
-        to_name,
-        llvm::CallConv::CCallConv,
-        llvm::UnnamedAddr::Global,
-        llvm::Visibility::Hidden,
-        ty,
-    );
-    if let Some(no_return) = no_return {
-        // -> ! DIFlagNoReturn
-        attributes::apply_to_llfn(callee, llvm::AttributePlace::Function, &[no_return]);
-    }
-    llvm::set_visibility(callee, llvm::Visibility::Hidden);
-
     let llbb = unsafe { llvm::LLVMAppendBasicBlockInContext(cx.llcx, llfn, c"entry".as_ptr()) };
-
     let mut bx = SBuilder::build(&cx, llbb);
-    let args = args
-        .iter()
-        .enumerate()
-        .map(|(i, _)| llvm::get_param(llfn, i as c_uint))
-        .collect::<Vec<_>>();
-    let ret = bx.call(ty, callee, &args, None);
-    llvm::LLVMSetTailCall(ret, True);
-    if output.is_some() {
-        bx.ret(ret);
+
+    if let Some(to_name) = to_name {
+        let callee = declare_simple_fn(
+            &cx,
+            to_name,
+            llvm::CallConv::CCallConv,
+            llvm::UnnamedAddr::Global,
+            llvm::Visibility::Hidden,
+            ty,
+        );
+        if let Some(no_return) = no_return {
+            // -> ! DIFlagNoReturn
+            attributes::apply_to_llfn(callee, llvm::AttributePlace::Function, &[no_return]);
+        }
+        llvm::set_visibility(callee, llvm::Visibility::Hidden);
+
+        let args = args
+            .iter()
+            .enumerate()
+            .map(|(i, _)| llvm::get_param(llfn, i as c_uint))
+            .collect::<Vec<_>>();
+        let ret = bx.call(ty, callee, &args, None);
+        llvm::LLVMSetTailCall(ret, True);
+        if output.is_some() {
+            bx.ret(ret);
+        } else {
+            bx.ret_void()
+        }
     } else {
+        assert!(output.is_none());
         bx.ret_void()
     }
 }
diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs
index 4185aef8b31..9ddadcf16aa 100644
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@ -1021,6 +1021,15 @@ fn llvm_fixup_input<'ll, 'tcx>(
         ) if element.primitive() == Primitive::Float(Float::F16) => {
             bx.bitcast(value, bx.type_vector(bx.type_i16(), count))
         }
+        (LoongArch(LoongArchInlineAsmRegClass::freg), BackendRepr::Scalar(s))
+            if s.primitive() == Primitive::Float(Float::F16) =>
+        {
+            // Smaller floats are always "NaN-boxed" inside larger floats on LoongArch.
+            let value = bx.bitcast(value, bx.type_i16());
+            let value = bx.zext(value, bx.type_i32());
+            let value = bx.or(value, bx.const_u32(0xFFFF_0000));
+            bx.bitcast(value, bx.type_f32())
+        }
         (Mips(MipsInlineAsmRegClass::reg), BackendRepr::Scalar(s)) => {
             match s.primitive() {
                 // MIPS only supports register-length arithmetics.
@@ -1178,6 +1187,13 @@ fn llvm_fixup_output<'ll, 'tcx>(
         ) if element.primitive() == Primitive::Float(Float::F16) => {
             bx.bitcast(value, bx.type_vector(bx.type_f16(), count))
         }
+        (LoongArch(LoongArchInlineAsmRegClass::freg), BackendRepr::Scalar(s))
+            if s.primitive() == Primitive::Float(Float::F16) =>
+        {
+            let value = bx.bitcast(value, bx.type_i32());
+            let value = bx.trunc(value, bx.type_i16());
+            bx.bitcast(value, bx.type_f16())
+        }
         (Mips(MipsInlineAsmRegClass::reg), BackendRepr::Scalar(s)) => {
             match s.primitive() {
                 // MIPS only supports register-length arithmetics.
@@ -1318,6 +1334,11 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
         ) if element.primitive() == Primitive::Float(Float::F16) => {
             cx.type_vector(cx.type_i16(), count)
         }
+        (LoongArch(LoongArchInlineAsmRegClass::freg), BackendRepr::Scalar(s))
+            if s.primitive() == Primitive::Float(Float::F16) =>
+        {
+            cx.type_f32()
+        }
         (Mips(MipsInlineAsmRegClass::reg), BackendRepr::Scalar(s)) => {
             match s.primitive() {
                 // MIPS only supports register-length arithmetics.
diff --git a/compiler/rustc_codegen_llvm/src/builder.rs b/compiler/rustc_codegen_llvm/src/builder.rs
index ec006b59192..5e9594dd06b 100644
--- a/compiler/rustc_codegen_llvm/src/builder.rs
+++ b/compiler/rustc_codegen_llvm/src/builder.rs
@@ -14,7 +14,6 @@ use rustc_codegen_ssa::mir::place::PlaceRef;
 use rustc_codegen_ssa::traits::*;
 use rustc_data_structures::small_c_str::SmallCStr;
 use rustc_hir::def_id::DefId;
-use rustc_middle::bug;
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrs;
 use rustc_middle::ty::layout::{
     FnAbiError, FnAbiOfHelpers, FnAbiRequest, HasTypingEnv, LayoutError, LayoutOfHelpers,
@@ -484,73 +483,31 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
     fn checked_binop(
         &mut self,
         oop: OverflowOp,
-        ty: Ty<'_>,
+        ty: Ty<'tcx>,
         lhs: Self::Value,
         rhs: Self::Value,
     ) -> (Self::Value, Self::Value) {
-        use rustc_middle::ty::IntTy::*;
-        use rustc_middle::ty::UintTy::*;
-        use rustc_middle::ty::{Int, Uint};
-
-        let new_kind = match ty.kind() {
-            Int(t @ Isize) => Int(t.normalize(self.tcx.sess.target.pointer_width)),
-            Uint(t @ Usize) => Uint(t.normalize(self.tcx.sess.target.pointer_width)),
-            t @ (Uint(_) | Int(_)) => *t,
-            _ => panic!("tried to get overflow intrinsic for op applied to non-int type"),
+        let (size, signed) = ty.int_size_and_signed(self.tcx);
+        let width = size.bits();
+
+        if oop == OverflowOp::Sub && !signed {
+            // Emit sub and icmp instead of llvm.usub.with.overflow. LLVM considers these
+            // to be the canonical form. It will attempt to reform llvm.usub.with.overflow
+            // in the backend if profitable.
+            let sub = self.sub(lhs, rhs);
+            let cmp = self.icmp(IntPredicate::IntULT, lhs, rhs);
+            return (sub, cmp);
+        }
+
+        let oop_str = match oop {
+            OverflowOp::Add => "add",
+            OverflowOp::Sub => "sub",
+            OverflowOp::Mul => "mul",
         };
 
-        let name = match oop {
-            OverflowOp::Add => match new_kind {
-                Int(I8) => "llvm.sadd.with.overflow.i8",
-                Int(I16) => "llvm.sadd.with.overflow.i16",
-                Int(I32) => "llvm.sadd.with.overflow.i32",
-                Int(I64) => "llvm.sadd.with.overflow.i64",
-                Int(I128) => "llvm.sadd.with.overflow.i128",
-
-                Uint(U8) => "llvm.uadd.with.overflow.i8",
-                Uint(U16) => "llvm.uadd.with.overflow.i16",
-                Uint(U32) => "llvm.uadd.with.overflow.i32",
-                Uint(U64) => "llvm.uadd.with.overflow.i64",
-                Uint(U128) => "llvm.uadd.with.overflow.i128",
-
-                _ => unreachable!(),
-            },
-            OverflowOp::Sub => match new_kind {
-                Int(I8) => "llvm.ssub.with.overflow.i8",
-                Int(I16) => "llvm.ssub.with.overflow.i16",
-                Int(I32) => "llvm.ssub.with.overflow.i32",
-                Int(I64) => "llvm.ssub.with.overflow.i64",
-                Int(I128) => "llvm.ssub.with.overflow.i128",
-
-                Uint(_) => {
-                    // Emit sub and icmp instead of llvm.usub.with.overflow. LLVM considers these
-                    // to be the canonical form. It will attempt to reform llvm.usub.with.overflow
-                    // in the backend if profitable.
-                    let sub = self.sub(lhs, rhs);
-                    let cmp = self.icmp(IntPredicate::IntULT, lhs, rhs);
-                    return (sub, cmp);
-                }
-
-                _ => unreachable!(),
-            },
-            OverflowOp::Mul => match new_kind {
-                Int(I8) => "llvm.smul.with.overflow.i8",
-                Int(I16) => "llvm.smul.with.overflow.i16",
-                Int(I32) => "llvm.smul.with.overflow.i32",
-                Int(I64) => "llvm.smul.with.overflow.i64",
-                Int(I128) => "llvm.smul.with.overflow.i128",
-
-                Uint(U8) => "llvm.umul.with.overflow.i8",
-                Uint(U16) => "llvm.umul.with.overflow.i16",
-                Uint(U32) => "llvm.umul.with.overflow.i32",
-                Uint(U64) => "llvm.umul.with.overflow.i64",
-                Uint(U128) => "llvm.umul.with.overflow.i128",
-
-                _ => unreachable!(),
-            },
-        };
+        let name = format!("llvm.{}{oop_str}.with.overflow", if signed { 's' } else { 'u' });
 
-        let res = self.call_intrinsic(name, &[lhs, rhs]);
+        let res = self.call_intrinsic(name, &[self.type_ix(width)], &[lhs, rhs]);
         (self.extract_value(res, 0), self.extract_value(res, 1))
     }
 
@@ -954,11 +911,11 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
     }
 
     fn fptoui_sat(&mut self, val: &'ll Value, dest_ty: &'ll Type) -> &'ll Value {
-        self.fptoint_sat(false, val, dest_ty)
+        self.call_intrinsic("llvm.fptoui.sat", &[dest_ty, self.val_ty(val)], &[val])
     }
 
     fn fptosi_sat(&mut self, val: &'ll Value, dest_ty: &'ll Type) -> &'ll Value {
-        self.fptoint_sat(true, val, dest_ty)
+        self.call_intrinsic("llvm.fptosi.sat", &[dest_ty, self.val_ty(val)], &[val])
     }
 
     fn fptoui(&mut self, val: &'ll Value, dest_ty: &'ll Type) -> &'ll Value {
@@ -981,15 +938,12 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
             if self.cx.type_kind(src_ty) != TypeKind::Vector {
                 let float_width = self.cx.float_width(src_ty);
                 let int_width = self.cx.int_width(dest_ty);
-                let name = match (int_width, float_width) {
-                    (32, 32) => Some("llvm.wasm.trunc.unsigned.i32.f32"),
-                    (32, 64) => Some("llvm.wasm.trunc.unsigned.i32.f64"),
-                    (64, 32) => Some("llvm.wasm.trunc.unsigned.i64.f32"),
-                    (64, 64) => Some("llvm.wasm.trunc.unsigned.i64.f64"),
-                    _ => None,
-                };
-                if let Some(name) = name {
-                    return self.call_intrinsic(name, &[val]);
+                if matches!((int_width, float_width), (32 | 64, 32 | 64)) {
+                    return self.call_intrinsic(
+                        "llvm.wasm.trunc.unsigned",
+                        &[dest_ty, src_ty],
+                        &[val],
+                    );
                 }
             }
         }
@@ -1003,15 +957,12 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
             if self.cx.type_kind(src_ty) != TypeKind::Vector {
                 let float_width = self.cx.float_width(src_ty);
                 let int_width = self.cx.int_width(dest_ty);
-                let name = match (int_width, float_width) {
-                    (32, 32) => Some("llvm.wasm.trunc.signed.i32.f32"),
-                    (32, 64) => Some("llvm.wasm.trunc.signed.i32.f64"),
-                    (64, 32) => Some("llvm.wasm.trunc.signed.i64.f32"),
-                    (64, 64) => Some("llvm.wasm.trunc.signed.i64.f64"),
-                    _ => None,
-                };
-                if let Some(name) = name {
-                    return self.call_intrinsic(name, &[val]);
+                if matches!((int_width, float_width), (32 | 64, 32 | 64)) {
+                    return self.call_intrinsic(
+                        "llvm.wasm.trunc.signed",
+                        &[dest_ty, src_ty],
+                        &[val],
+                    );
                 }
             }
         }
@@ -1084,22 +1035,10 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
             return None;
         }
 
-        let name = match (ty.is_signed(), ty.primitive_size(self.tcx).bits()) {
-            (true, 8) => "llvm.scmp.i8.i8",
-            (true, 16) => "llvm.scmp.i8.i16",
-            (true, 32) => "llvm.scmp.i8.i32",
-            (true, 64) => "llvm.scmp.i8.i64",
-            (true, 128) => "llvm.scmp.i8.i128",
-
-            (false, 8) => "llvm.ucmp.i8.i8",
-            (false, 16) => "llvm.ucmp.i8.i16",
-            (false, 32) => "llvm.ucmp.i8.i32",
-            (false, 64) => "llvm.ucmp.i8.i64",
-            (false, 128) => "llvm.ucmp.i8.i128",
+        let size = ty.primitive_size(self.tcx);
+        let name = if ty.is_signed() { "llvm.scmp" } else { "llvm.ucmp" };
 
-            _ => bug!("three-way compare unsupported for type {ty:?}"),
-        };
-        Some(self.call_intrinsic(name, &[lhs, rhs]))
+        Some(self.call_intrinsic(name, &[self.type_i8(), self.type_ix(size.bits())], &[lhs, rhs]))
     }
 
     /* Miscellaneous instructions */
@@ -1385,11 +1324,11 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
     }
 
     fn lifetime_start(&mut self, ptr: &'ll Value, size: Size) {
-        self.call_lifetime_intrinsic("llvm.lifetime.start.p0i8", ptr, size);
+        self.call_lifetime_intrinsic("llvm.lifetime.start", ptr, size);
     }
 
     fn lifetime_end(&mut self, ptr: &'ll Value, size: Size) {
-        self.call_lifetime_intrinsic("llvm.lifetime.end.p0i8", ptr, size);
+        self.call_lifetime_intrinsic("llvm.lifetime.end", ptr, size);
     }
 
     fn call(
@@ -1454,7 +1393,8 @@ impl<'ll> StaticBuilderMethods for Builder<'_, 'll, '_> {
         // Forward to the `get_static` method of `CodegenCx`
         let global = self.cx().get_static(def_id);
         if self.cx().tcx.is_thread_local_static(def_id) {
-            let pointer = self.call_intrinsic("llvm.threadlocal.address", &[global]);
+            let pointer =
+                self.call_intrinsic("llvm.threadlocal.address", &[self.val_ty(global)], &[global]);
             // Cast to default address space if globals are in a different addrspace
             self.pointercast(pointer, self.type_ptr())
         } else {
@@ -1649,12 +1589,17 @@ impl<'a, 'll, CX: Borrow<SCx<'ll>>> GenericBuilder<'a, 'll, CX> {
 }
 
 impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
-    pub(crate) fn call_intrinsic(&mut self, intrinsic: &str, args: &[&'ll Value]) -> &'ll Value {
-        let (ty, f) = self.cx.get_intrinsic(intrinsic);
+    pub(crate) fn call_intrinsic(
+        &mut self,
+        base_name: impl Into<Cow<'static, str>>,
+        type_params: &[&'ll Type],
+        args: &[&'ll Value],
+    ) -> &'ll Value {
+        let (ty, f) = self.cx.get_intrinsic(base_name.into(), type_params);
         self.call(ty, None, None, f, args, None, None)
     }
 
-    fn call_lifetime_intrinsic(&mut self, intrinsic: &str, ptr: &'ll Value, size: Size) {
+    fn call_lifetime_intrinsic(&mut self, intrinsic: &'static str, ptr: &'ll Value, size: Size) {
         let size = size.bytes();
         if size == 0 {
             return;
@@ -1664,7 +1609,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
             return;
         }
 
-        self.call_intrinsic(intrinsic, &[self.cx.const_u64(size), ptr]);
+        self.call_intrinsic(intrinsic, &[self.val_ty(ptr)], &[self.cx.const_u64(size), ptr]);
     }
 }
 impl<'a, 'll, CX: Borrow<SCx<'ll>>> GenericBuilder<'a, 'll, CX> {
@@ -1689,31 +1634,6 @@ impl<'a, 'll, CX: Borrow<SCx<'ll>>> GenericBuilder<'a, 'll, CX> {
     }
 }
 impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
-    fn fptoint_sat(&mut self, signed: bool, val: &'ll Value, dest_ty: &'ll Type) -> &'ll Value {
-        let src_ty = self.cx.val_ty(val);
-        let (float_ty, int_ty, vector_length) = if self.cx.type_kind(src_ty) == TypeKind::Vector {
-            assert_eq!(self.cx.vector_length(src_ty), self.cx.vector_length(dest_ty));
-            (
-                self.cx.element_type(src_ty),
-                self.cx.element_type(dest_ty),
-                Some(self.cx.vector_length(src_ty)),
-            )
-        } else {
-            (src_ty, dest_ty, None)
-        };
-        let float_width = self.cx.float_width(float_ty);
-        let int_width = self.cx.int_width(int_ty);
-
-        let instr = if signed { "fptosi" } else { "fptoui" };
-        let name = if let Some(vector_length) = vector_length {
-            format!("llvm.{instr}.sat.v{vector_length}i{int_width}.v{vector_length}f{float_width}")
-        } else {
-            format!("llvm.{instr}.sat.i{int_width}.f{float_width}")
-        };
-        let f = self.declare_cfn(&name, llvm::UnnamedAddr::No, self.type_func(&[src_ty], dest_ty));
-        self.call(self.type_func(&[src_ty], dest_ty), None, None, f, &[val], None, None)
-    }
-
     pub(crate) fn landing_pad(
         &mut self,
         ty: &'ll Type,
@@ -1819,7 +1739,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
             // llvm.type.test intrinsic. The LowerTypeTests link-time optimization pass replaces
             // calls to this intrinsic with code to test type membership.
             let typeid = self.get_metadata_value(typeid_metadata);
-            let cond = self.call_intrinsic("llvm.type.test", &[llfn, typeid]);
+            let cond = self.call_intrinsic("llvm.type.test", &[], &[llfn, typeid]);
             let bb_pass = self.append_sibling_block("type_test.pass");
             let bb_fail = self.append_sibling_block("type_test.fail");
             self.cond_br(cond, bb_pass, bb_fail);
@@ -1887,7 +1807,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
         num_counters: &'ll Value,
         index: &'ll Value,
     ) {
-        self.call_intrinsic("llvm.instrprof.increment", &[fn_name, hash, num_counters, index]);
+        self.call_intrinsic("llvm.instrprof.increment", &[], &[fn_name, hash, num_counters, index]);
     }
 
     /// Emits a call to `llvm.instrprof.mcdc.parameters`.
@@ -1906,7 +1826,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
         hash: &'ll Value,
         bitmap_bits: &'ll Value,
     ) {
-        self.call_intrinsic("llvm.instrprof.mcdc.parameters", &[fn_name, hash, bitmap_bits]);
+        self.call_intrinsic("llvm.instrprof.mcdc.parameters", &[], &[fn_name, hash, bitmap_bits]);
     }
 
     #[instrument(level = "debug", skip(self))]
@@ -1918,7 +1838,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
         mcdc_temp: &'ll Value,
     ) {
         let args = &[fn_name, hash, bitmap_index, mcdc_temp];
-        self.call_intrinsic("llvm.instrprof.mcdc.tvbitmap.update", args);
+        self.call_intrinsic("llvm.instrprof.mcdc.tvbitmap.update", &[], args);
     }
 
     #[instrument(level = "debug", skip(self))]
diff --git a/compiler/rustc_codegen_llvm/src/builder/autodiff.rs b/compiler/rustc_codegen_llvm/src/builder/autodiff.rs
index c5c13ac097a..b07d9a5cfca 100644
--- a/compiler/rustc_codegen_llvm/src/builder/autodiff.rs
+++ b/compiler/rustc_codegen_llvm/src/builder/autodiff.rs
@@ -114,7 +114,7 @@ fn match_args_from_caller_to_enzyme<'ll>(
             let mul = unsafe {
                 llvm::LLVMBuildMul(
                     builder.llbuilder,
-                    cx.get_const_i64(elem_bytes_size),
+                    cx.get_const_int(cx.type_i64(), elem_bytes_size),
                     next_outer_arg,
                     UNNAMED,
                 )
@@ -385,7 +385,7 @@ fn generate_enzyme_call<'ll>(
         if attrs.width > 1 {
             let enzyme_width = cx.create_metadata("enzyme_width".to_string()).unwrap();
             args.push(cx.get_metadata_value(enzyme_width));
-            args.push(cx.get_const_i64(attrs.width as u64));
+            args.push(cx.get_const_int(cx.type_i64(), attrs.width as u64));
         }
 
         let has_sret = has_sret(outer_fn);
diff --git a/compiler/rustc_codegen_llvm/src/common.rs b/compiler/rustc_codegen_llvm/src/common.rs
index 3cfa96393e9..ae5add59322 100644
--- a/compiler/rustc_codegen_llvm/src/common.rs
+++ b/compiler/rustc_codegen_llvm/src/common.rs
@@ -99,14 +99,14 @@ impl<'ll, CX: Borrow<SCx<'ll>>> BackendTypes for GenericCx<'ll, CX> {
     type DIVariable = &'ll llvm::debuginfo::DIVariable;
 }
 
-impl<'ll> CodegenCx<'ll, '_> {
+impl<'ll, CX: Borrow<SCx<'ll>>> GenericCx<'ll, CX> {
     pub(crate) fn const_array(&self, ty: &'ll Type, elts: &[&'ll Value]) -> &'ll Value {
         let len = u64::try_from(elts.len()).expect("LLVMConstArray2 elements len overflow");
         unsafe { llvm::LLVMConstArray2(ty, elts.as_ptr(), len) }
     }
 
     pub(crate) fn const_bytes(&self, bytes: &[u8]) -> &'ll Value {
-        bytes_in_context(self.llcx, bytes)
+        bytes_in_context(self.llcx(), bytes)
     }
 
     pub(crate) fn const_get_elt(&self, v: &'ll Value, idx: u64) -> &'ll Value {
diff --git a/compiler/rustc_codegen_llvm/src/context.rs b/compiler/rustc_codegen_llvm/src/context.rs
index 8d6e1d8941b..0324dff6ff2 100644
--- a/compiler/rustc_codegen_llvm/src/context.rs
+++ b/compiler/rustc_codegen_llvm/src/context.rs
@@ -1,4 +1,4 @@
-use std::borrow::Borrow;
+use std::borrow::{Borrow, Cow};
 use std::cell::{Cell, RefCell};
 use std::ffi::{CStr, c_char, c_uint};
 use std::marker::PhantomData;
@@ -137,7 +137,8 @@ pub(crate) struct FullCx<'ll, 'tcx> {
     eh_catch_typeinfo: Cell<Option<&'ll Value>>,
     pub rust_try_fn: Cell<Option<(&'ll Type, &'ll Value)>>,
 
-    intrinsics: RefCell<FxHashMap<&'static str, (&'ll Type, &'ll Value)>>,
+    intrinsics:
+        RefCell<FxHashMap<(Cow<'static, str>, SmallVec<[&'ll Type; 2]>), (&'ll Type, &'ll Value)>>,
 
     /// A counter that is used for generating local symbol names
     local_gen_sym_counter: Cell<usize>,
@@ -678,11 +679,8 @@ impl<'ll, CX: Borrow<SCx<'ll>>> GenericCx<'ll, CX> {
         llvm::LLVMMetadataAsValue(self.llcx(), metadata)
     }
 
-    // FIXME(autodiff): We should split `ConstCodegenMethods` to pull the reusable parts
-    // onto a trait that is also implemented for GenericCx.
-    pub(crate) fn get_const_i64(&self, n: u64) -> &'ll Value {
-        let ty = unsafe { llvm::LLVMInt64TypeInContext(self.llcx()) };
-        unsafe { llvm::LLVMConstInt(ty, n, llvm::False) }
+    pub(crate) fn get_const_int(&self, ty: &'ll Type, val: u64) -> &'ll Value {
+        unsafe { llvm::LLVMConstInt(ty, val, llvm::False) }
     }
 
     pub(crate) fn get_function(&self, name: &str) -> Option<&'ll Value> {
@@ -842,410 +840,41 @@ impl<'ll, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'ll, 'tcx> {
 }
 
 impl<'ll> CodegenCx<'ll, '_> {
-    pub(crate) fn get_intrinsic(&self, key: &str) -> (&'ll Type, &'ll Value) {
-        if let Some(v) = self.intrinsics.borrow().get(key).cloned() {
-            return v;
-        }
-
-        self.declare_intrinsic(key).unwrap_or_else(|| bug!("unknown intrinsic '{}'", key))
-    }
-
-    fn insert_intrinsic(
+    pub(crate) fn get_intrinsic(
         &self,
-        name: &'static str,
-        args: Option<&[&'ll llvm::Type]>,
-        ret: &'ll llvm::Type,
-    ) -> (&'ll llvm::Type, &'ll llvm::Value) {
-        let fn_ty = if let Some(args) = args {
-            self.type_func(args, ret)
-        } else {
-            self.type_variadic_func(&[], ret)
-        };
-        let f = self.declare_cfn(name, llvm::UnnamedAddr::No, fn_ty);
-        self.intrinsics.borrow_mut().insert(name, (fn_ty, f));
-        (fn_ty, f)
-    }
-
-    fn declare_intrinsic(&self, key: &str) -> Option<(&'ll Type, &'ll Value)> {
-        macro_rules! ifn {
-            ($name:expr, fn() -> $ret:expr) => (
-                if key == $name {
-                    return Some(self.insert_intrinsic($name, Some(&[]), $ret));
-                }
-            );
-            ($name:expr, fn(...) -> $ret:expr) => (
-                if key == $name {
-                    return Some(self.insert_intrinsic($name, None, $ret));
-                }
-            );
-            ($name:expr, fn($($arg:expr),*) -> $ret:expr) => (
-                if key == $name {
-                    return Some(self.insert_intrinsic($name, Some(&[$($arg),*]), $ret));
-                }
-            );
-        }
-        macro_rules! mk_struct {
-            ($($field_ty:expr),*) => (self.type_struct( &[$($field_ty),*], false))
-        }
-
-        let ptr = self.type_ptr();
-        let void = self.type_void();
-        let i1 = self.type_i1();
-        let t_i8 = self.type_i8();
-        let t_i16 = self.type_i16();
-        let t_i32 = self.type_i32();
-        let t_i64 = self.type_i64();
-        let t_i128 = self.type_i128();
-        let t_isize = self.type_isize();
-        let t_f16 = self.type_f16();
-        let t_f32 = self.type_f32();
-        let t_f64 = self.type_f64();
-        let t_f128 = self.type_f128();
-        let t_metadata = self.type_metadata();
-        let t_token = self.type_token();
-
-        ifn!("llvm.wasm.get.exception", fn(t_token) -> ptr);
-        ifn!("llvm.wasm.get.ehselector", fn(t_token) -> t_i32);
-
-        ifn!("llvm.wasm.trunc.unsigned.i32.f32", fn(t_f32) -> t_i32);
-        ifn!("llvm.wasm.trunc.unsigned.i32.f64", fn(t_f64) -> t_i32);
-        ifn!("llvm.wasm.trunc.unsigned.i64.f32", fn(t_f32) -> t_i64);
-        ifn!("llvm.wasm.trunc.unsigned.i64.f64", fn(t_f64) -> t_i64);
-        ifn!("llvm.wasm.trunc.signed.i32.f32", fn(t_f32) -> t_i32);
-        ifn!("llvm.wasm.trunc.signed.i32.f64", fn(t_f64) -> t_i32);
-        ifn!("llvm.wasm.trunc.signed.i64.f32", fn(t_f32) -> t_i64);
-        ifn!("llvm.wasm.trunc.signed.i64.f64", fn(t_f64) -> t_i64);
-
-        ifn!("llvm.fptosi.sat.i8.f32", fn(t_f32) -> t_i8);
-        ifn!("llvm.fptosi.sat.i16.f32", fn(t_f32) -> t_i16);
-        ifn!("llvm.fptosi.sat.i32.f32", fn(t_f32) -> t_i32);
-        ifn!("llvm.fptosi.sat.i64.f32", fn(t_f32) -> t_i64);
-        ifn!("llvm.fptosi.sat.i128.f32", fn(t_f32) -> t_i128);
-        ifn!("llvm.fptosi.sat.i8.f64", fn(t_f64) -> t_i8);
-        ifn!("llvm.fptosi.sat.i16.f64", fn(t_f64) -> t_i16);
-        ifn!("llvm.fptosi.sat.i32.f64", fn(t_f64) -> t_i32);
-        ifn!("llvm.fptosi.sat.i64.f64", fn(t_f64) -> t_i64);
-        ifn!("llvm.fptosi.sat.i128.f64", fn(t_f64) -> t_i128);
-
-        ifn!("llvm.fptoui.sat.i8.f32", fn(t_f32) -> t_i8);
-        ifn!("llvm.fptoui.sat.i16.f32", fn(t_f32) -> t_i16);
-        ifn!("llvm.fptoui.sat.i32.f32", fn(t_f32) -> t_i32);
-        ifn!("llvm.fptoui.sat.i64.f32", fn(t_f32) -> t_i64);
-        ifn!("llvm.fptoui.sat.i128.f32", fn(t_f32) -> t_i128);
-        ifn!("llvm.fptoui.sat.i8.f64", fn(t_f64) -> t_i8);
-        ifn!("llvm.fptoui.sat.i16.f64", fn(t_f64) -> t_i16);
-        ifn!("llvm.fptoui.sat.i32.f64", fn(t_f64) -> t_i32);
-        ifn!("llvm.fptoui.sat.i64.f64", fn(t_f64) -> t_i64);
-        ifn!("llvm.fptoui.sat.i128.f64", fn(t_f64) -> t_i128);
-
-        ifn!("llvm.trap", fn() -> void);
-        ifn!("llvm.debugtrap", fn() -> void);
-        ifn!("llvm.frameaddress", fn(t_i32) -> ptr);
-
-        ifn!("llvm.powi.f16.i32", fn(t_f16, t_i32) -> t_f16);
-        ifn!("llvm.powi.f32.i32", fn(t_f32, t_i32) -> t_f32);
-        ifn!("llvm.powi.f64.i32", fn(t_f64, t_i32) -> t_f64);
-        ifn!("llvm.powi.f128.i32", fn(t_f128, t_i32) -> t_f128);
-
-        ifn!("llvm.pow.f16", fn(t_f16, t_f16) -> t_f16);
-        ifn!("llvm.pow.f32", fn(t_f32, t_f32) -> t_f32);
-        ifn!("llvm.pow.f64", fn(t_f64, t_f64) -> t_f64);
-        ifn!("llvm.pow.f128", fn(t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.sqrt.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.sqrt.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.sqrt.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.sqrt.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.sin.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.sin.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.sin.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.sin.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.cos.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.cos.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.cos.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.cos.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.exp.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.exp.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.exp.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.exp.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.exp2.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.exp2.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.exp2.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.exp2.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.log.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.log.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.log.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.log.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.log10.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.log10.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.log10.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.log10.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.log2.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.log2.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.log2.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.log2.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.fma.f16", fn(t_f16, t_f16, t_f16) -> t_f16);
-        ifn!("llvm.fma.f32", fn(t_f32, t_f32, t_f32) -> t_f32);
-        ifn!("llvm.fma.f64", fn(t_f64, t_f64, t_f64) -> t_f64);
-        ifn!("llvm.fma.f128", fn(t_f128, t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.fmuladd.f16", fn(t_f16, t_f16, t_f16) -> t_f16);
-        ifn!("llvm.fmuladd.f32", fn(t_f32, t_f32, t_f32) -> t_f32);
-        ifn!("llvm.fmuladd.f64", fn(t_f64, t_f64, t_f64) -> t_f64);
-        ifn!("llvm.fmuladd.f128", fn(t_f128, t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.fabs.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.fabs.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.fabs.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.fabs.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.minnum.f16", fn(t_f16, t_f16) -> t_f16);
-        ifn!("llvm.minnum.f32", fn(t_f32, t_f32) -> t_f32);
-        ifn!("llvm.minnum.f64", fn(t_f64, t_f64) -> t_f64);
-        ifn!("llvm.minnum.f128", fn(t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.minimum.f16", fn(t_f16, t_f16) -> t_f16);
-        ifn!("llvm.minimum.f32", fn(t_f32, t_f32) -> t_f32);
-        ifn!("llvm.minimum.f64", fn(t_f64, t_f64) -> t_f64);
-        // There are issues on x86_64 and aarch64 with the f128 variant.
-        //  - https://github.com/llvm/llvm-project/issues/139380
-        //  - https://github.com/llvm/llvm-project/issues/139381
-        // ifn!("llvm.minimum.f128", fn(t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.maxnum.f16", fn(t_f16, t_f16) -> t_f16);
-        ifn!("llvm.maxnum.f32", fn(t_f32, t_f32) -> t_f32);
-        ifn!("llvm.maxnum.f64", fn(t_f64, t_f64) -> t_f64);
-        ifn!("llvm.maxnum.f128", fn(t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.maximum.f16", fn(t_f16, t_f16) -> t_f16);
-        ifn!("llvm.maximum.f32", fn(t_f32, t_f32) -> t_f32);
-        ifn!("llvm.maximum.f64", fn(t_f64, t_f64) -> t_f64);
-        // There are issues on x86_64 and aarch64 with the f128 variant.
-        //  - https://github.com/llvm/llvm-project/issues/139380
-        //  - https://github.com/llvm/llvm-project/issues/139381
-        // ifn!("llvm.maximum.f128", fn(t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.floor.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.floor.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.floor.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.floor.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.ceil.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.ceil.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.ceil.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.ceil.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.trunc.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.trunc.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.trunc.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.trunc.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.copysign.f16", fn(t_f16, t_f16) -> t_f16);
-        ifn!("llvm.copysign.f32", fn(t_f32, t_f32) -> t_f32);
-        ifn!("llvm.copysign.f64", fn(t_f64, t_f64) -> t_f64);
-        ifn!("llvm.copysign.f128", fn(t_f128, t_f128) -> t_f128);
-
-        ifn!("llvm.round.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.round.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.round.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.round.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.roundeven.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.roundeven.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.roundeven.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.roundeven.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.rint.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.rint.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.rint.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.rint.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.nearbyint.f16", fn(t_f16) -> t_f16);
-        ifn!("llvm.nearbyint.f32", fn(t_f32) -> t_f32);
-        ifn!("llvm.nearbyint.f64", fn(t_f64) -> t_f64);
-        ifn!("llvm.nearbyint.f128", fn(t_f128) -> t_f128);
-
-        ifn!("llvm.ctpop.i8", fn(t_i8) -> t_i8);
-        ifn!("llvm.ctpop.i16", fn(t_i16) -> t_i16);
-        ifn!("llvm.ctpop.i32", fn(t_i32) -> t_i32);
-        ifn!("llvm.ctpop.i64", fn(t_i64) -> t_i64);
-        ifn!("llvm.ctpop.i128", fn(t_i128) -> t_i128);
-
-        ifn!("llvm.ctlz.i8", fn(t_i8, i1) -> t_i8);
-        ifn!("llvm.ctlz.i16", fn(t_i16, i1) -> t_i16);
-        ifn!("llvm.ctlz.i32", fn(t_i32, i1) -> t_i32);
-        ifn!("llvm.ctlz.i64", fn(t_i64, i1) -> t_i64);
-        ifn!("llvm.ctlz.i128", fn(t_i128, i1) -> t_i128);
-
-        ifn!("llvm.cttz.i8", fn(t_i8, i1) -> t_i8);
-        ifn!("llvm.cttz.i16", fn(t_i16, i1) -> t_i16);
-        ifn!("llvm.cttz.i32", fn(t_i32, i1) -> t_i32);
-        ifn!("llvm.cttz.i64", fn(t_i64, i1) -> t_i64);
-        ifn!("llvm.cttz.i128", fn(t_i128, i1) -> t_i128);
-
-        ifn!("llvm.bswap.i16", fn(t_i16) -> t_i16);
-        ifn!("llvm.bswap.i32", fn(t_i32) -> t_i32);
-        ifn!("llvm.bswap.i64", fn(t_i64) -> t_i64);
-        ifn!("llvm.bswap.i128", fn(t_i128) -> t_i128);
-
-        ifn!("llvm.bitreverse.i8", fn(t_i8) -> t_i8);
-        ifn!("llvm.bitreverse.i16", fn(t_i16) -> t_i16);
-        ifn!("llvm.bitreverse.i32", fn(t_i32) -> t_i32);
-        ifn!("llvm.bitreverse.i64", fn(t_i64) -> t_i64);
-        ifn!("llvm.bitreverse.i128", fn(t_i128) -> t_i128);
-
-        ifn!("llvm.fshl.i8", fn(t_i8, t_i8, t_i8) -> t_i8);
-        ifn!("llvm.fshl.i16", fn(t_i16, t_i16, t_i16) -> t_i16);
-        ifn!("llvm.fshl.i32", fn(t_i32, t_i32, t_i32) -> t_i32);
-        ifn!("llvm.fshl.i64", fn(t_i64, t_i64, t_i64) -> t_i64);
-        ifn!("llvm.fshl.i128", fn(t_i128, t_i128, t_i128) -> t_i128);
-
-        ifn!("llvm.fshr.i8", fn(t_i8, t_i8, t_i8) -> t_i8);
-        ifn!("llvm.fshr.i16", fn(t_i16, t_i16, t_i16) -> t_i16);
-        ifn!("llvm.fshr.i32", fn(t_i32, t_i32, t_i32) -> t_i32);
-        ifn!("llvm.fshr.i64", fn(t_i64, t_i64, t_i64) -> t_i64);
-        ifn!("llvm.fshr.i128", fn(t_i128, t_i128, t_i128) -> t_i128);
-
-        ifn!("llvm.sadd.with.overflow.i8", fn(t_i8, t_i8) -> mk_struct! {t_i8, i1});
-        ifn!("llvm.sadd.with.overflow.i16", fn(t_i16, t_i16) -> mk_struct! {t_i16, i1});
-        ifn!("llvm.sadd.with.overflow.i32", fn(t_i32, t_i32) -> mk_struct! {t_i32, i1});
-        ifn!("llvm.sadd.with.overflow.i64", fn(t_i64, t_i64) -> mk_struct! {t_i64, i1});
-        ifn!("llvm.sadd.with.overflow.i128", fn(t_i128, t_i128) -> mk_struct! {t_i128, i1});
-
-        ifn!("llvm.uadd.with.overflow.i8", fn(t_i8, t_i8) -> mk_struct! {t_i8, i1});
-        ifn!("llvm.uadd.with.overflow.i16", fn(t_i16, t_i16) -> mk_struct! {t_i16, i1});
-        ifn!("llvm.uadd.with.overflow.i32", fn(t_i32, t_i32) -> mk_struct! {t_i32, i1});
-        ifn!("llvm.uadd.with.overflow.i64", fn(t_i64, t_i64) -> mk_struct! {t_i64, i1});
-        ifn!("llvm.uadd.with.overflow.i128", fn(t_i128, t_i128) -> mk_struct! {t_i128, i1});
-
-        ifn!("llvm.ssub.with.overflow.i8", fn(t_i8, t_i8) -> mk_struct! {t_i8, i1});
-        ifn!("llvm.ssub.with.overflow.i16", fn(t_i16, t_i16) -> mk_struct! {t_i16, i1});
-        ifn!("llvm.ssub.with.overflow.i32", fn(t_i32, t_i32) -> mk_struct! {t_i32, i1});
-        ifn!("llvm.ssub.with.overflow.i64", fn(t_i64, t_i64) -> mk_struct! {t_i64, i1});
-        ifn!("llvm.ssub.with.overflow.i128", fn(t_i128, t_i128) -> mk_struct! {t_i128, i1});
-
-        ifn!("llvm.usub.with.overflow.i8", fn(t_i8, t_i8) -> mk_struct! {t_i8, i1});
-        ifn!("llvm.usub.with.overflow.i16", fn(t_i16, t_i16) -> mk_struct! {t_i16, i1});
-        ifn!("llvm.usub.with.overflow.i32", fn(t_i32, t_i32) -> mk_struct! {t_i32, i1});
-        ifn!("llvm.usub.with.overflow.i64", fn(t_i64, t_i64) -> mk_struct! {t_i64, i1});
-        ifn!("llvm.usub.with.overflow.i128", fn(t_i128, t_i128) -> mk_struct! {t_i128, i1});
-
-        ifn!("llvm.smul.with.overflow.i8", fn(t_i8, t_i8) -> mk_struct! {t_i8, i1});
-        ifn!("llvm.smul.with.overflow.i16", fn(t_i16, t_i16) -> mk_struct! {t_i16, i1});
-        ifn!("llvm.smul.with.overflow.i32", fn(t_i32, t_i32) -> mk_struct! {t_i32, i1});
-        ifn!("llvm.smul.with.overflow.i64", fn(t_i64, t_i64) -> mk_struct! {t_i64, i1});
-        ifn!("llvm.smul.with.overflow.i128", fn(t_i128, t_i128) -> mk_struct! {t_i128, i1});
-
-        ifn!("llvm.umul.with.overflow.i8", fn(t_i8, t_i8) -> mk_struct! {t_i8, i1});
-        ifn!("llvm.umul.with.overflow.i16", fn(t_i16, t_i16) -> mk_struct! {t_i16, i1});
-        ifn!("llvm.umul.with.overflow.i32", fn(t_i32, t_i32) -> mk_struct! {t_i32, i1});
-        ifn!("llvm.umul.with.overflow.i64", fn(t_i64, t_i64) -> mk_struct! {t_i64, i1});
-        ifn!("llvm.umul.with.overflow.i128", fn(t_i128, t_i128) -> mk_struct! {t_i128, i1});
-
-        ifn!("llvm.sadd.sat.i8", fn(t_i8, t_i8) -> t_i8);
-        ifn!("llvm.sadd.sat.i16", fn(t_i16, t_i16) -> t_i16);
-        ifn!("llvm.sadd.sat.i32", fn(t_i32, t_i32) -> t_i32);
-        ifn!("llvm.sadd.sat.i64", fn(t_i64, t_i64) -> t_i64);
-        ifn!("llvm.sadd.sat.i128", fn(t_i128, t_i128) -> t_i128);
-
-        ifn!("llvm.uadd.sat.i8", fn(t_i8, t_i8) -> t_i8);
-        ifn!("llvm.uadd.sat.i16", fn(t_i16, t_i16) -> t_i16);
-        ifn!("llvm.uadd.sat.i32", fn(t_i32, t_i32) -> t_i32);
-        ifn!("llvm.uadd.sat.i64", fn(t_i64, t_i64) -> t_i64);
-        ifn!("llvm.uadd.sat.i128", fn(t_i128, t_i128) -> t_i128);
-
-        ifn!("llvm.ssub.sat.i8", fn(t_i8, t_i8) -> t_i8);
-        ifn!("llvm.ssub.sat.i16", fn(t_i16, t_i16) -> t_i16);
-        ifn!("llvm.ssub.sat.i32", fn(t_i32, t_i32) -> t_i32);
-        ifn!("llvm.ssub.sat.i64", fn(t_i64, t_i64) -> t_i64);
-        ifn!("llvm.ssub.sat.i128", fn(t_i128, t_i128) -> t_i128);
-
-        ifn!("llvm.usub.sat.i8", fn(t_i8, t_i8) -> t_i8);
-        ifn!("llvm.usub.sat.i16", fn(t_i16, t_i16) -> t_i16);
-        ifn!("llvm.usub.sat.i32", fn(t_i32, t_i32) -> t_i32);
-        ifn!("llvm.usub.sat.i64", fn(t_i64, t_i64) -> t_i64);
-        ifn!("llvm.usub.sat.i128", fn(t_i128, t_i128) -> t_i128);
-
-        ifn!("llvm.scmp.i8.i8", fn(t_i8, t_i8) -> t_i8);
-        ifn!("llvm.scmp.i8.i16", fn(t_i16, t_i16) -> t_i8);
-        ifn!("llvm.scmp.i8.i32", fn(t_i32, t_i32) -> t_i8);
-        ifn!("llvm.scmp.i8.i64", fn(t_i64, t_i64) -> t_i8);
-        ifn!("llvm.scmp.i8.i128", fn(t_i128, t_i128) -> t_i8);
-
-        ifn!("llvm.ucmp.i8.i8", fn(t_i8, t_i8) -> t_i8);
-        ifn!("llvm.ucmp.i8.i16", fn(t_i16, t_i16) -> t_i8);
-        ifn!("llvm.ucmp.i8.i32", fn(t_i32, t_i32) -> t_i8);
-        ifn!("llvm.ucmp.i8.i64", fn(t_i64, t_i64) -> t_i8);
-        ifn!("llvm.ucmp.i8.i128", fn(t_i128, t_i128) -> t_i8);
-
-        ifn!("llvm.lifetime.start.p0i8", fn(t_i64, ptr) -> void);
-        ifn!("llvm.lifetime.end.p0i8", fn(t_i64, ptr) -> void);
-
-        // FIXME: This is an infinitesimally small portion of the types you can
-        // pass to this intrinsic, if we can ever lazily register intrinsics we
-        // should register these when they're used, that way any type can be
-        // passed.
-        ifn!("llvm.is.constant.i1", fn(i1) -> i1);
-        ifn!("llvm.is.constant.i8", fn(t_i8) -> i1);
-        ifn!("llvm.is.constant.i16", fn(t_i16) -> i1);
-        ifn!("llvm.is.constant.i32", fn(t_i32) -> i1);
-        ifn!("llvm.is.constant.i64", fn(t_i64) -> i1);
-        ifn!("llvm.is.constant.i128", fn(t_i128) -> i1);
-        ifn!("llvm.is.constant.isize", fn(t_isize) -> i1);
-        ifn!("llvm.is.constant.f16", fn(t_f16) -> i1);
-        ifn!("llvm.is.constant.f32", fn(t_f32) -> i1);
-        ifn!("llvm.is.constant.f64", fn(t_f64) -> i1);
-        ifn!("llvm.is.constant.f128", fn(t_f128) -> i1);
-        ifn!("llvm.is.constant.ptr", fn(ptr) -> i1);
-
-        ifn!("llvm.expect.i1", fn(i1, i1) -> i1);
-        ifn!("llvm.eh.typeid.for", fn(ptr) -> t_i32);
-        ifn!("llvm.localescape", fn(...) -> void);
-        ifn!("llvm.localrecover", fn(ptr, ptr, t_i32) -> ptr);
-        ifn!("llvm.x86.seh.recoverfp", fn(ptr, ptr) -> ptr);
-
-        ifn!("llvm.assume", fn(i1) -> void);
-        ifn!("llvm.prefetch", fn(ptr, t_i32, t_i32, t_i32) -> void);
-
+        base_name: Cow<'static, str>,
+        type_params: &[&'ll Type],
+    ) -> (&'ll Type, &'ll Value) {
+        *self
+            .intrinsics
+            .borrow_mut()
+            .entry((base_name, SmallVec::from_slice(type_params)))
+            .or_insert_with_key(|(base_name, type_params)| {
+                self.declare_intrinsic(base_name, type_params)
+            })
+    }
+
+    fn declare_intrinsic(
+        &self,
+        base_name: &str,
+        type_params: &[&'ll Type],
+    ) -> (&'ll Type, &'ll Value) {
         // This isn't an "LLVM intrinsic", but LLVM's optimization passes
         // recognize it like one (including turning it into `bcmp` sometimes)
         // and we use it to implement intrinsics like `raw_eq` and `compare_bytes`
-        match self.sess().target.arch.as_ref() {
-            "avr" | "msp430" => ifn!("memcmp", fn(ptr, ptr, t_isize) -> t_i16),
-            _ => ifn!("memcmp", fn(ptr, ptr, t_isize) -> t_i32),
-        }
-
-        // variadic intrinsics
-        ifn!("llvm.va_start", fn(ptr) -> void);
-        ifn!("llvm.va_end", fn(ptr) -> void);
-        ifn!("llvm.va_copy", fn(ptr, ptr) -> void);
-
-        if self.sess().instrument_coverage() {
-            ifn!("llvm.instrprof.increment", fn(ptr, t_i64, t_i32, t_i32) -> void);
-            ifn!("llvm.instrprof.mcdc.parameters", fn(ptr, t_i64, t_i32) -> void);
-            ifn!("llvm.instrprof.mcdc.tvbitmap.update", fn(ptr, t_i64, t_i32, ptr) -> void);
-        }
-
-        ifn!("llvm.type.test", fn(ptr, t_metadata) -> i1);
-        ifn!("llvm.type.checked.load", fn(ptr, t_i32, t_metadata) -> mk_struct! {ptr, i1});
+        if base_name == "memcmp" {
+            let fn_ty = self
+                .type_func(&[self.type_ptr(), self.type_ptr(), self.type_isize()], self.type_int());
+            let f = self.declare_cfn("memcmp", llvm::UnnamedAddr::No, fn_ty);
 
-        if self.sess().opts.debuginfo != DebugInfo::None {
-            ifn!("llvm.dbg.declare", fn(t_metadata, t_metadata) -> void);
-            ifn!("llvm.dbg.value", fn(t_metadata, t_i64, t_metadata) -> void);
+            return (fn_ty, f);
         }
 
-        ifn!("llvm.ptrmask", fn(ptr, t_isize) -> ptr);
-        ifn!("llvm.threadlocal.address", fn(ptr) -> ptr);
+        let intrinsic = llvm::Intrinsic::lookup(base_name.as_bytes())
+            .unwrap_or_else(|| bug!("Unknown intrinsic: `{base_name}`"));
+        let f = intrinsic.get_declaration(self.llmod, &type_params);
 
-        None
+        (self.get_type_of_global(f), f)
     }
 
     pub(crate) fn eh_catch_typeinfo(&self) -> &'ll Value {
diff --git a/compiler/rustc_codegen_llvm/src/errors.rs b/compiler/rustc_codegen_llvm/src/errors.rs
index eaafc680712..8bc74fbec7e 100644
--- a/compiler/rustc_codegen_llvm/src/errors.rs
+++ b/compiler/rustc_codegen_llvm/src/errors.rs
@@ -24,23 +24,6 @@ pub(crate) struct UnknownCTargetFeature<'a> {
     pub rust_feature: PossibleFeature<'a>,
 }
 
-#[derive(Diagnostic)]
-#[diag(codegen_llvm_unstable_ctarget_feature)]
-#[note]
-pub(crate) struct UnstableCTargetFeature<'a> {
-    pub feature: &'a str,
-}
-
-#[derive(Diagnostic)]
-#[diag(codegen_llvm_forbidden_ctarget_feature)]
-#[note]
-#[note(codegen_llvm_forbidden_ctarget_feature_issue)]
-pub(crate) struct ForbiddenCTargetFeature<'a> {
-    pub feature: &'a str,
-    pub enabled: &'a str,
-    pub reason: &'a str,
-}
-
 #[derive(Subdiagnostic)]
 pub(crate) enum PossibleFeature<'a> {
     #[help(codegen_llvm_possible_feature)]
diff --git a/compiler/rustc_codegen_llvm/src/intrinsic.rs b/compiler/rustc_codegen_llvm/src/intrinsic.rs
index 10697b9a71f..f7f062849a8 100644
--- a/compiler/rustc_codegen_llvm/src/intrinsic.rs
+++ b/compiler/rustc_codegen_llvm/src/intrinsic.rs
@@ -15,7 +15,7 @@ use rustc_middle::ty::{self, GenericArgsRef, Ty};
 use rustc_middle::{bug, span_bug};
 use rustc_span::{Span, Symbol, sym};
 use rustc_symbol_mangling::mangle_internal_symbol;
-use rustc_target::spec::{HasTargetSpec, PanicStrategy};
+use rustc_target::spec::PanicStrategy;
 use tracing::debug;
 
 use crate::abi::FnAbiLlvmExt;
@@ -27,137 +27,140 @@ use crate::type_of::LayoutLlvmExt;
 use crate::va_arg::emit_va_arg;
 use crate::value::Value;
 
-fn get_simple_intrinsic<'ll>(
-    cx: &CodegenCx<'ll, '_>,
+fn call_simple_intrinsic<'ll, 'tcx>(
+    bx: &mut Builder<'_, 'll, 'tcx>,
     name: Symbol,
-) -> Option<(&'ll Type, &'ll Value)> {
-    let llvm_name = match name {
-        sym::sqrtf16 => "llvm.sqrt.f16",
-        sym::sqrtf32 => "llvm.sqrt.f32",
-        sym::sqrtf64 => "llvm.sqrt.f64",
-        sym::sqrtf128 => "llvm.sqrt.f128",
-
-        sym::powif16 => "llvm.powi.f16.i32",
-        sym::powif32 => "llvm.powi.f32.i32",
-        sym::powif64 => "llvm.powi.f64.i32",
-        sym::powif128 => "llvm.powi.f128.i32",
-
-        sym::sinf16 => "llvm.sin.f16",
-        sym::sinf32 => "llvm.sin.f32",
-        sym::sinf64 => "llvm.sin.f64",
-        sym::sinf128 => "llvm.sin.f128",
-
-        sym::cosf16 => "llvm.cos.f16",
-        sym::cosf32 => "llvm.cos.f32",
-        sym::cosf64 => "llvm.cos.f64",
-        sym::cosf128 => "llvm.cos.f128",
-
-        sym::powf16 => "llvm.pow.f16",
-        sym::powf32 => "llvm.pow.f32",
-        sym::powf64 => "llvm.pow.f64",
-        sym::powf128 => "llvm.pow.f128",
-
-        sym::expf16 => "llvm.exp.f16",
-        sym::expf32 => "llvm.exp.f32",
-        sym::expf64 => "llvm.exp.f64",
-        sym::expf128 => "llvm.exp.f128",
-
-        sym::exp2f16 => "llvm.exp2.f16",
-        sym::exp2f32 => "llvm.exp2.f32",
-        sym::exp2f64 => "llvm.exp2.f64",
-        sym::exp2f128 => "llvm.exp2.f128",
-
-        sym::logf16 => "llvm.log.f16",
-        sym::logf32 => "llvm.log.f32",
-        sym::logf64 => "llvm.log.f64",
-        sym::logf128 => "llvm.log.f128",
-
-        sym::log10f16 => "llvm.log10.f16",
-        sym::log10f32 => "llvm.log10.f32",
-        sym::log10f64 => "llvm.log10.f64",
-        sym::log10f128 => "llvm.log10.f128",
-
-        sym::log2f16 => "llvm.log2.f16",
-        sym::log2f32 => "llvm.log2.f32",
-        sym::log2f64 => "llvm.log2.f64",
-        sym::log2f128 => "llvm.log2.f128",
-
-        sym::fmaf16 => "llvm.fma.f16",
-        sym::fmaf32 => "llvm.fma.f32",
-        sym::fmaf64 => "llvm.fma.f64",
-        sym::fmaf128 => "llvm.fma.f128",
-
-        sym::fmuladdf16 => "llvm.fmuladd.f16",
-        sym::fmuladdf32 => "llvm.fmuladd.f32",
-        sym::fmuladdf64 => "llvm.fmuladd.f64",
-        sym::fmuladdf128 => "llvm.fmuladd.f128",
-
-        sym::fabsf16 => "llvm.fabs.f16",
-        sym::fabsf32 => "llvm.fabs.f32",
-        sym::fabsf64 => "llvm.fabs.f64",
-        sym::fabsf128 => "llvm.fabs.f128",
-
-        sym::minnumf16 => "llvm.minnum.f16",
-        sym::minnumf32 => "llvm.minnum.f32",
-        sym::minnumf64 => "llvm.minnum.f64",
-        sym::minnumf128 => "llvm.minnum.f128",
-
-        sym::minimumf16 => "llvm.minimum.f16",
-        sym::minimumf32 => "llvm.minimum.f32",
-        sym::minimumf64 => "llvm.minimum.f64",
+    args: &[OperandRef<'tcx, &'ll Value>],
+) -> Option<&'ll Value> {
+    let (base_name, type_params): (&'static str, &[&'ll Type]) = match name {
+        sym::sqrtf16 => ("llvm.sqrt", &[bx.type_f16()]),
+        sym::sqrtf32 => ("llvm.sqrt", &[bx.type_f32()]),
+        sym::sqrtf64 => ("llvm.sqrt", &[bx.type_f64()]),
+        sym::sqrtf128 => ("llvm.sqrt", &[bx.type_f128()]),
+
+        sym::powif16 => ("llvm.powi", &[bx.type_f16(), bx.type_i32()]),
+        sym::powif32 => ("llvm.powi", &[bx.type_f32(), bx.type_i32()]),
+        sym::powif64 => ("llvm.powi", &[bx.type_f64(), bx.type_i32()]),
+        sym::powif128 => ("llvm.powi", &[bx.type_f128(), bx.type_i32()]),
+
+        sym::sinf16 => ("llvm.sin", &[bx.type_f16()]),
+        sym::sinf32 => ("llvm.sin", &[bx.type_f32()]),
+        sym::sinf64 => ("llvm.sin", &[bx.type_f64()]),
+        sym::sinf128 => ("llvm.sin", &[bx.type_f128()]),
+
+        sym::cosf16 => ("llvm.cos", &[bx.type_f16()]),
+        sym::cosf32 => ("llvm.cos", &[bx.type_f32()]),
+        sym::cosf64 => ("llvm.cos", &[bx.type_f64()]),
+        sym::cosf128 => ("llvm.cos", &[bx.type_f128()]),
+
+        sym::powf16 => ("llvm.pow", &[bx.type_f16()]),
+        sym::powf32 => ("llvm.pow", &[bx.type_f32()]),
+        sym::powf64 => ("llvm.pow", &[bx.type_f64()]),
+        sym::powf128 => ("llvm.pow", &[bx.type_f128()]),
+
+        sym::expf16 => ("llvm.exp", &[bx.type_f16()]),
+        sym::expf32 => ("llvm.exp", &[bx.type_f32()]),
+        sym::expf64 => ("llvm.exp", &[bx.type_f64()]),
+        sym::expf128 => ("llvm.exp", &[bx.type_f128()]),
+
+        sym::exp2f16 => ("llvm.exp2", &[bx.type_f16()]),
+        sym::exp2f32 => ("llvm.exp2", &[bx.type_f32()]),
+        sym::exp2f64 => ("llvm.exp2", &[bx.type_f64()]),
+        sym::exp2f128 => ("llvm.exp2", &[bx.type_f128()]),
+
+        sym::logf16 => ("llvm.log", &[bx.type_f16()]),
+        sym::logf32 => ("llvm.log", &[bx.type_f32()]),
+        sym::logf64 => ("llvm.log", &[bx.type_f64()]),
+        sym::logf128 => ("llvm.log", &[bx.type_f128()]),
+
+        sym::log10f16 => ("llvm.log10", &[bx.type_f16()]),
+        sym::log10f32 => ("llvm.log10", &[bx.type_f32()]),
+        sym::log10f64 => ("llvm.log10", &[bx.type_f64()]),
+        sym::log10f128 => ("llvm.log10", &[bx.type_f128()]),
+
+        sym::log2f16 => ("llvm.log2", &[bx.type_f16()]),
+        sym::log2f32 => ("llvm.log2", &[bx.type_f32()]),
+        sym::log2f64 => ("llvm.log2", &[bx.type_f64()]),
+        sym::log2f128 => ("llvm.log2", &[bx.type_f128()]),
+
+        sym::fmaf16 => ("llvm.fma", &[bx.type_f16()]),
+        sym::fmaf32 => ("llvm.fma", &[bx.type_f32()]),
+        sym::fmaf64 => ("llvm.fma", &[bx.type_f64()]),
+        sym::fmaf128 => ("llvm.fma", &[bx.type_f128()]),
+
+        sym::fmuladdf16 => ("llvm.fmuladd", &[bx.type_f16()]),
+        sym::fmuladdf32 => ("llvm.fmuladd", &[bx.type_f32()]),
+        sym::fmuladdf64 => ("llvm.fmuladd", &[bx.type_f64()]),
+        sym::fmuladdf128 => ("llvm.fmuladd", &[bx.type_f128()]),
+
+        sym::fabsf16 => ("llvm.fabs", &[bx.type_f16()]),
+        sym::fabsf32 => ("llvm.fabs", &[bx.type_f32()]),
+        sym::fabsf64 => ("llvm.fabs", &[bx.type_f64()]),
+        sym::fabsf128 => ("llvm.fabs", &[bx.type_f128()]),
+
+        sym::minnumf16 => ("llvm.minnum", &[bx.type_f16()]),
+        sym::minnumf32 => ("llvm.minnum", &[bx.type_f32()]),
+        sym::minnumf64 => ("llvm.minnum", &[bx.type_f64()]),
+        sym::minnumf128 => ("llvm.minnum", &[bx.type_f128()]),
+
+        sym::minimumf16 => ("llvm.minimum", &[bx.type_f16()]),
+        sym::minimumf32 => ("llvm.minimum", &[bx.type_f32()]),
+        sym::minimumf64 => ("llvm.minimum", &[bx.type_f64()]),
         // There are issues on x86_64 and aarch64 with the f128 variant,
         // let's instead use the instrinsic fallback body.
-        // sym::minimumf128 => "llvm.minimum.f128",
-        sym::maxnumf16 => "llvm.maxnum.f16",
-        sym::maxnumf32 => "llvm.maxnum.f32",
-        sym::maxnumf64 => "llvm.maxnum.f64",
-        sym::maxnumf128 => "llvm.maxnum.f128",
-
-        sym::maximumf16 => "llvm.maximum.f16",
-        sym::maximumf32 => "llvm.maximum.f32",
-        sym::maximumf64 => "llvm.maximum.f64",
+        // sym::minimumf128 => ("llvm.minimum", &[cx.type_f128()]),
+        sym::maxnumf16 => ("llvm.maxnum", &[bx.type_f16()]),
+        sym::maxnumf32 => ("llvm.maxnum", &[bx.type_f32()]),
+        sym::maxnumf64 => ("llvm.maxnum", &[bx.type_f64()]),
+        sym::maxnumf128 => ("llvm.maxnum", &[bx.type_f128()]),
+
+        sym::maximumf16 => ("llvm.maximum", &[bx.type_f16()]),
+        sym::maximumf32 => ("llvm.maximum", &[bx.type_f32()]),
+        sym::maximumf64 => ("llvm.maximum", &[bx.type_f64()]),
         // There are issues on x86_64 and aarch64 with the f128 variant,
         // let's instead use the instrinsic fallback body.
-        // sym::maximumf128 => "llvm.maximum.f128",
-        sym::copysignf16 => "llvm.copysign.f16",
-        sym::copysignf32 => "llvm.copysign.f32",
-        sym::copysignf64 => "llvm.copysign.f64",
-        sym::copysignf128 => "llvm.copysign.f128",
-
-        sym::floorf16 => "llvm.floor.f16",
-        sym::floorf32 => "llvm.floor.f32",
-        sym::floorf64 => "llvm.floor.f64",
-        sym::floorf128 => "llvm.floor.f128",
-
-        sym::ceilf16 => "llvm.ceil.f16",
-        sym::ceilf32 => "llvm.ceil.f32",
-        sym::ceilf64 => "llvm.ceil.f64",
-        sym::ceilf128 => "llvm.ceil.f128",
-
-        sym::truncf16 => "llvm.trunc.f16",
-        sym::truncf32 => "llvm.trunc.f32",
-        sym::truncf64 => "llvm.trunc.f64",
-        sym::truncf128 => "llvm.trunc.f128",
+        // sym::maximumf128 => ("llvm.maximum", &[cx.type_f128()]),
+        sym::copysignf16 => ("llvm.copysign", &[bx.type_f16()]),
+        sym::copysignf32 => ("llvm.copysign", &[bx.type_f32()]),
+        sym::copysignf64 => ("llvm.copysign", &[bx.type_f64()]),
+        sym::copysignf128 => ("llvm.copysign", &[bx.type_f128()]),
+
+        sym::floorf16 => ("llvm.floor", &[bx.type_f16()]),
+        sym::floorf32 => ("llvm.floor", &[bx.type_f32()]),
+        sym::floorf64 => ("llvm.floor", &[bx.type_f64()]),
+        sym::floorf128 => ("llvm.floor", &[bx.type_f128()]),
+
+        sym::ceilf16 => ("llvm.ceil", &[bx.type_f16()]),
+        sym::ceilf32 => ("llvm.ceil", &[bx.type_f32()]),
+        sym::ceilf64 => ("llvm.ceil", &[bx.type_f64()]),
+        sym::ceilf128 => ("llvm.ceil", &[bx.type_f128()]),
+
+        sym::truncf16 => ("llvm.trunc", &[bx.type_f16()]),
+        sym::truncf32 => ("llvm.trunc", &[bx.type_f32()]),
+        sym::truncf64 => ("llvm.trunc", &[bx.type_f64()]),
+        sym::truncf128 => ("llvm.trunc", &[bx.type_f128()]),
 
         // We could use any of `rint`, `nearbyint`, or `roundeven`
         // for this -- they are all identical in semantics when
         // assuming the default FP environment.
         // `rint` is what we used for $forever.
-        sym::round_ties_even_f16 => "llvm.rint.f16",
-        sym::round_ties_even_f32 => "llvm.rint.f32",
-        sym::round_ties_even_f64 => "llvm.rint.f64",
-        sym::round_ties_even_f128 => "llvm.rint.f128",
+        sym::round_ties_even_f16 => ("llvm.rint", &[bx.type_f16()]),
+        sym::round_ties_even_f32 => ("llvm.rint", &[bx.type_f32()]),
+        sym::round_ties_even_f64 => ("llvm.rint", &[bx.type_f64()]),
+        sym::round_ties_even_f128 => ("llvm.rint", &[bx.type_f128()]),
 
-        sym::roundf16 => "llvm.round.f16",
-        sym::roundf32 => "llvm.round.f32",
-        sym::roundf64 => "llvm.round.f64",
-        sym::roundf128 => "llvm.round.f128",
-
-        sym::ptr_mask => "llvm.ptrmask",
+        sym::roundf16 => ("llvm.round", &[bx.type_f16()]),
+        sym::roundf32 => ("llvm.round", &[bx.type_f32()]),
+        sym::roundf64 => ("llvm.round", &[bx.type_f64()]),
+        sym::roundf128 => ("llvm.round", &[bx.type_f128()]),
 
         _ => return None,
     };
-    Some(cx.get_intrinsic(llvm_name))
+    Some(bx.call_intrinsic(
+        base_name,
+        type_params,
+        &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
+    ))
 }
 
 impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
@@ -173,36 +176,24 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
         let name = tcx.item_name(instance.def_id());
         let fn_args = instance.args;
 
-        let simple = get_simple_intrinsic(self, name);
+        let simple = call_simple_intrinsic(self, name, args);
         let llval = match name {
-            _ if simple.is_some() => {
-                let (simple_ty, simple_fn) = simple.unwrap();
-                self.call(
-                    simple_ty,
-                    None,
-                    None,
-                    simple_fn,
-                    &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
-                    None,
-                    Some(instance),
+            _ if simple.is_some() => simple.unwrap(),
+            sym::ptr_mask => {
+                let ptr = args[0].immediate();
+                self.call_intrinsic(
+                    "llvm.ptrmask",
+                    &[self.val_ty(ptr), self.type_isize()],
+                    &[ptr, args[1].immediate()],
                 )
             }
             sym::is_val_statically_known => {
-                let intrinsic_type = args[0].layout.immediate_llvm_type(self.cx);
-                let kind = self.type_kind(intrinsic_type);
-                let intrinsic_name = match kind {
-                    TypeKind::Pointer | TypeKind::Integer => {
-                        Some(format!("llvm.is.constant.{intrinsic_type:?}"))
-                    }
-                    // LLVM float types' intrinsic names differ from their type names.
-                    TypeKind::Half => Some(format!("llvm.is.constant.f16")),
-                    TypeKind::Float => Some(format!("llvm.is.constant.f32")),
-                    TypeKind::Double => Some(format!("llvm.is.constant.f64")),
-                    TypeKind::FP128 => Some(format!("llvm.is.constant.f128")),
-                    _ => None,
-                };
-                if let Some(intrinsic_name) = intrinsic_name {
-                    self.call_intrinsic(&intrinsic_name, &[args[0].immediate()])
+                if let OperandValue::Immediate(imm) = args[0].val {
+                    self.call_intrinsic(
+                        "llvm.is.constant",
+                        &[args[0].layout.immediate_llvm_type(self.cx)],
+                        &[imm],
+                    )
                 } else {
                     self.const_bool(false)
                 }
@@ -246,9 +237,14 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                 );
                 return Ok(());
             }
-            sym::breakpoint => self.call_intrinsic("llvm.debugtrap", &[]),
+            sym::breakpoint => self.call_intrinsic("llvm.debugtrap", &[], &[]),
             sym::va_copy => {
-                self.call_intrinsic("llvm.va_copy", &[args[0].immediate(), args[1].immediate()])
+                let dest = args[0].immediate();
+                self.call_intrinsic(
+                    "llvm.va_copy",
+                    &[self.val_ty(dest)],
+                    &[dest, args[1].immediate()],
+                )
             }
             sym::va_arg => {
                 match result.layout.backend_repr {
@@ -322,14 +318,11 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                     sym::prefetch_write_instruction => (1, 0),
                     _ => bug!(),
                 };
+                let ptr = args[0].immediate();
                 self.call_intrinsic(
                     "llvm.prefetch",
-                    &[
-                        args[0].immediate(),
-                        self.const_i32(rw),
-                        args[1].immediate(),
-                        self.const_i32(cache_type),
-                    ],
+                    &[self.val_ty(ptr)],
+                    &[ptr, self.const_i32(rw), args[1].immediate(), self.const_i32(cache_type)],
                 )
             }
             sym::carrying_mul_add => {
@@ -385,11 +378,13 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                 }
                 let (size, signed) = ty.int_size_and_signed(self.tcx);
                 let width = size.bits();
+                let llty = self.type_ix(width);
                 match name {
                     sym::ctlz | sym::cttz => {
                         let y = self.const_bool(false);
                         let ret = self.call_intrinsic(
-                            &format!("llvm.{name}.i{width}"),
+                            format!("llvm.{name}"),
+                            &[llty],
                             &[args[0].immediate(), y],
                         );
 
@@ -397,62 +392,54 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                     }
                     sym::ctlz_nonzero => {
                         let y = self.const_bool(true);
-                        let llvm_name = &format!("llvm.ctlz.i{width}");
-                        let ret = self.call_intrinsic(llvm_name, &[args[0].immediate(), y]);
+                        let ret =
+                            self.call_intrinsic("llvm.ctlz", &[llty], &[args[0].immediate(), y]);
                         self.intcast(ret, result.layout.llvm_type(self), false)
                     }
                     sym::cttz_nonzero => {
                         let y = self.const_bool(true);
-                        let llvm_name = &format!("llvm.cttz.i{width}");
-                        let ret = self.call_intrinsic(llvm_name, &[args[0].immediate(), y]);
+                        let ret =
+                            self.call_intrinsic("llvm.cttz", &[llty], &[args[0].immediate(), y]);
                         self.intcast(ret, result.layout.llvm_type(self), false)
                     }
                     sym::ctpop => {
-                        let ret = self.call_intrinsic(
-                            &format!("llvm.ctpop.i{width}"),
-                            &[args[0].immediate()],
-                        );
+                        let ret =
+                            self.call_intrinsic("llvm.ctpop", &[llty], &[args[0].immediate()]);
                         self.intcast(ret, result.layout.llvm_type(self), false)
                     }
                     sym::bswap => {
                         if width == 8 {
                             args[0].immediate() // byte swap a u8/i8 is just a no-op
                         } else {
-                            self.call_intrinsic(
-                                &format!("llvm.bswap.i{width}"),
-                                &[args[0].immediate()],
-                            )
+                            self.call_intrinsic("llvm.bswap", &[llty], &[args[0].immediate()])
                         }
                     }
-                    sym::bitreverse => self.call_intrinsic(
-                        &format!("llvm.bitreverse.i{width}"),
-                        &[args[0].immediate()],
-                    ),
+                    sym::bitreverse => {
+                        self.call_intrinsic("llvm.bitreverse", &[llty], &[args[0].immediate()])
+                    }
                     sym::rotate_left | sym::rotate_right => {
                         let is_left = name == sym::rotate_left;
                         let val = args[0].immediate();
                         let raw_shift = args[1].immediate();
                         // rotate = funnel shift with first two args the same
-                        let llvm_name =
-                            &format!("llvm.fsh{}.i{}", if is_left { 'l' } else { 'r' }, width);
+                        let llvm_name = format!("llvm.fsh{}", if is_left { 'l' } else { 'r' });
 
                         // llvm expects shift to be the same type as the values, but rust
                         // always uses `u32`.
                         let raw_shift = self.intcast(raw_shift, self.val_ty(val), false);
 
-                        self.call_intrinsic(llvm_name, &[val, val, raw_shift])
+                        self.call_intrinsic(llvm_name, &[llty], &[val, val, raw_shift])
                     }
                     sym::saturating_add | sym::saturating_sub => {
                         let is_add = name == sym::saturating_add;
                         let lhs = args[0].immediate();
                         let rhs = args[1].immediate();
-                        let llvm_name = &format!(
-                            "llvm.{}{}.sat.i{}",
+                        let llvm_name = format!(
+                            "llvm.{}{}.sat",
                             if signed { 's' } else { 'u' },
                             if is_add { "add" } else { "sub" },
-                            width
                         );
-                        self.call_intrinsic(llvm_name, &[lhs, rhs])
+                        self.call_intrinsic(llvm_name, &[llty], &[lhs, rhs])
                     }
                     _ => bug!(),
                 }
@@ -484,11 +471,8 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                     self.icmp(IntPredicate::IntEQ, a_val, b_val)
                 } else {
                     let n = self.const_usize(layout.size().bytes());
-                    let cmp = self.call_intrinsic("memcmp", &[a, b, n]);
-                    match self.cx.sess().target.arch.as_ref() {
-                        "avr" | "msp430" => self.icmp(IntPredicate::IntEQ, cmp, self.const_i16(0)),
-                        _ => self.icmp(IntPredicate::IntEQ, cmp, self.const_i32(0)),
-                    }
+                    let cmp = self.call_intrinsic("memcmp", &[], &[a, b, n]);
+                    self.icmp(IntPredicate::IntEQ, cmp, self.const_int(self.type_int(), 0))
                 }
             }
 
@@ -496,6 +480,7 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
                 // Here we assume that the `memcmp` provided by the target is a NOP for size 0.
                 let cmp = self.call_intrinsic(
                     "memcmp",
+                    &[],
                     &[args[0].immediate(), args[1].immediate(), args[2].immediate()],
                 );
                 // Some targets have `memcmp` returning `i16`, but the intrinsic is always `i32`.
@@ -619,18 +604,22 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
     }
 
     fn abort(&mut self) {
-        self.call_intrinsic("llvm.trap", &[]);
+        self.call_intrinsic("llvm.trap", &[], &[]);
     }
 
     fn assume(&mut self, val: Self::Value) {
         if self.cx.sess().opts.optimize != rustc_session::config::OptLevel::No {
-            self.call_intrinsic("llvm.assume", &[val]);
+            self.call_intrinsic("llvm.assume", &[], &[val]);
         }
     }
 
     fn expect(&mut self, cond: Self::Value, expected: bool) -> Self::Value {
         if self.cx.sess().opts.optimize != rustc_session::config::OptLevel::No {
-            self.call_intrinsic("llvm.expect.i1", &[cond, self.const_bool(expected)])
+            self.call_intrinsic(
+                "llvm.expect",
+                &[self.type_i1()],
+                &[cond, self.const_bool(expected)],
+            )
         } else {
             cond
         }
@@ -644,17 +633,20 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
     ) -> Self::Value {
         let typeid = self.get_metadata_value(typeid);
         let vtable_byte_offset = self.const_i32(vtable_byte_offset as i32);
-        let type_checked_load =
-            self.call_intrinsic("llvm.type.checked.load", &[llvtable, vtable_byte_offset, typeid]);
+        let type_checked_load = self.call_intrinsic(
+            "llvm.type.checked.load",
+            &[],
+            &[llvtable, vtable_byte_offset, typeid],
+        );
         self.extract_value(type_checked_load, 0)
     }
 
     fn va_start(&mut self, va_list: &'ll Value) -> &'ll Value {
-        self.call_intrinsic("llvm.va_start", &[va_list])
+        self.call_intrinsic("llvm.va_start", &[self.val_ty(va_list)], &[va_list])
     }
 
     fn va_end(&mut self, va_list: &'ll Value) -> &'ll Value {
-        self.call_intrinsic("llvm.va_end", &[va_list])
+        self.call_intrinsic("llvm.va_end", &[self.val_ty(va_list)], &[va_list])
     }
 }
 
@@ -893,8 +885,8 @@ fn codegen_wasm_try<'ll, 'tcx>(
         let null = bx.const_null(bx.type_ptr());
         let funclet = bx.catch_pad(cs, &[null]);
 
-        let ptr = bx.call_intrinsic("llvm.wasm.get.exception", &[funclet.cleanuppad()]);
-        let _sel = bx.call_intrinsic("llvm.wasm.get.ehselector", &[funclet.cleanuppad()]);
+        let ptr = bx.call_intrinsic("llvm.wasm.get.exception", &[], &[funclet.cleanuppad()]);
+        let _sel = bx.call_intrinsic("llvm.wasm.get.ehselector", &[], &[funclet.cleanuppad()]);
 
         let catch_ty = bx.type_func(&[bx.type_ptr(), bx.type_ptr()], bx.type_void());
         bx.call(catch_ty, None, None, catch_func, &[data, ptr], Some(&funclet), None);
@@ -1031,7 +1023,7 @@ fn codegen_emcc_try<'ll, 'tcx>(
         let selector = bx.extract_value(vals, 1);
 
         // Check if the typeid we got is the one for a Rust panic.
-        let rust_typeid = bx.call_intrinsic("llvm.eh.typeid.for", &[tydesc]);
+        let rust_typeid = bx.call_intrinsic("llvm.eh.typeid.for", &[bx.val_ty(tydesc)], &[tydesc]);
         let is_rust_panic = bx.icmp(IntPredicate::IntEQ, selector, rust_typeid);
         let is_rust_panic = bx.zext(is_rust_panic, bx.type_bool());
 
@@ -1522,56 +1514,37 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
             }};
         }
 
-        let (elem_ty_str, elem_ty) = if let ty::Float(f) = in_elem.kind() {
-            let elem_ty = bx.cx.type_float_from_ty(*f);
-            match f.bit_width() {
-                16 => ("f16", elem_ty),
-                32 => ("f32", elem_ty),
-                64 => ("f64", elem_ty),
-                128 => ("f128", elem_ty),
-                _ => return_error!(InvalidMonomorphization::FloatingPointVector {
-                    span,
-                    name,
-                    f_ty: *f,
-                    in_ty,
-                }),
-            }
+        let elem_ty = if let ty::Float(f) = in_elem.kind() {
+            bx.cx.type_float_from_ty(*f)
         } else {
             return_error!(InvalidMonomorphization::FloatingPointType { span, name, in_ty });
         };
 
         let vec_ty = bx.type_vector(elem_ty, in_len);
 
-        let (intr_name, fn_ty) = match name {
-            sym::simd_ceil => ("ceil", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_fabs => ("fabs", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_fcos => ("cos", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_fexp2 => ("exp2", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_fexp => ("exp", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_flog10 => ("log10", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_flog2 => ("log2", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_flog => ("log", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_floor => ("floor", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_fma => ("fma", bx.type_func(&[vec_ty, vec_ty, vec_ty], vec_ty)),
-            sym::simd_relaxed_fma => ("fmuladd", bx.type_func(&[vec_ty, vec_ty, vec_ty], vec_ty)),
-            sym::simd_fsin => ("sin", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_fsqrt => ("sqrt", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_round => ("round", bx.type_func(&[vec_ty], vec_ty)),
-            sym::simd_trunc => ("trunc", bx.type_func(&[vec_ty], vec_ty)),
+        let intr_name = match name {
+            sym::simd_ceil => "llvm.ceil",
+            sym::simd_fabs => "llvm.fabs",
+            sym::simd_fcos => "llvm.cos",
+            sym::simd_fexp2 => "llvm.exp2",
+            sym::simd_fexp => "llvm.exp",
+            sym::simd_flog10 => "llvm.log10",
+            sym::simd_flog2 => "llvm.log2",
+            sym::simd_flog => "llvm.log",
+            sym::simd_floor => "llvm.floor",
+            sym::simd_fma => "llvm.fma",
+            sym::simd_relaxed_fma => "llvm.fmuladd",
+            sym::simd_fsin => "llvm.sin",
+            sym::simd_fsqrt => "llvm.sqrt",
+            sym::simd_round => "llvm.round",
+            sym::simd_trunc => "llvm.trunc",
             _ => return_error!(InvalidMonomorphization::UnrecognizedIntrinsic { span, name }),
         };
-        let llvm_name = &format!("llvm.{intr_name}.v{in_len}{elem_ty_str}");
-        let f = bx.declare_cfn(llvm_name, llvm::UnnamedAddr::No, fn_ty);
-        let c = bx.call(
-            fn_ty,
-            None,
-            None,
-            f,
+        Ok(bx.call_intrinsic(
+            intr_name,
+            &[vec_ty],
             &args.iter().map(|arg| arg.immediate()).collect::<Vec<_>>(),
-            None,
-            None,
-        );
-        Ok(c)
+        ))
     }
 
     if std::matches!(
@@ -1595,29 +1568,6 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         return simd_simple_float_intrinsic(name, in_elem, in_ty, in_len, bx, span, args);
     }
 
-    // FIXME: use:
-    //  https://github.com/llvm-mirror/llvm/blob/master/include/llvm/IR/Function.h#L182
-    //  https://github.com/llvm-mirror/llvm/blob/master/include/llvm/IR/Intrinsics.h#L81
-    fn llvm_vector_str(bx: &Builder<'_, '_, '_>, elem_ty: Ty<'_>, vec_len: u64) -> String {
-        match *elem_ty.kind() {
-            ty::Int(v) => format!(
-                "v{}i{}",
-                vec_len,
-                // Normalize to prevent crash if v: IntTy::Isize
-                v.normalize(bx.target_spec().pointer_width).bit_width().unwrap()
-            ),
-            ty::Uint(v) => format!(
-                "v{}i{}",
-                vec_len,
-                // Normalize to prevent crash if v: UIntTy::Usize
-                v.normalize(bx.target_spec().pointer_width).bit_width().unwrap()
-            ),
-            ty::Float(v) => format!("v{}f{}", vec_len, v.bit_width()),
-            ty::RawPtr(_, _) => format!("v{}p0", vec_len),
-            _ => unreachable!(),
-        }
-    }
-
     fn llvm_vector_ty<'ll>(cx: &CodegenCx<'ll, '_>, elem_ty: Ty<'_>, vec_len: u64) -> &'ll Type {
         let elem_ty = match *elem_ty.kind() {
             ty::Int(v) => cx.type_int_from_ty(v),
@@ -1698,38 +1648,22 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         );
 
         // Alignment of T, must be a constant integer value:
-        let alignment_ty = bx.type_i32();
         let alignment = bx.const_i32(bx.align_of(in_elem).bytes() as i32);
 
         // Truncate the mask vector to a vector of i1s:
         let mask = vector_mask_to_bitmask(bx, args[2].immediate(), mask_elem_bitwidth, in_len);
-        let mask_ty = bx.type_vector(bx.type_i1(), in_len);
 
         // Type of the vector of pointers:
         let llvm_pointer_vec_ty = llvm_vector_ty(bx, element_ty1, in_len);
-        let llvm_pointer_vec_str = llvm_vector_str(bx, element_ty1, in_len);
 
         // Type of the vector of elements:
         let llvm_elem_vec_ty = llvm_vector_ty(bx, element_ty0, in_len);
-        let llvm_elem_vec_str = llvm_vector_str(bx, element_ty0, in_len);
 
-        let llvm_intrinsic =
-            format!("llvm.masked.gather.{llvm_elem_vec_str}.{llvm_pointer_vec_str}");
-        let fn_ty = bx.type_func(
-            &[llvm_pointer_vec_ty, alignment_ty, mask_ty, llvm_elem_vec_ty],
-            llvm_elem_vec_ty,
-        );
-        let f = bx.declare_cfn(&llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-        let v = bx.call(
-            fn_ty,
-            None,
-            None,
-            f,
+        return Ok(bx.call_intrinsic(
+            "llvm.masked.gather",
+            &[llvm_elem_vec_ty, llvm_pointer_vec_ty],
             &[args[1].immediate(), alignment, mask, args[0].immediate()],
-            None,
-            None,
-        );
-        return Ok(v);
+        ));
     }
 
     if name == sym::simd_masked_load {
@@ -1795,32 +1729,20 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         );
 
         let mask = vector_mask_to_bitmask(bx, args[0].immediate(), m_elem_bitwidth, mask_len);
-        let mask_ty = bx.type_vector(bx.type_i1(), mask_len);
 
         // Alignment of T, must be a constant integer value:
-        let alignment_ty = bx.type_i32();
         let alignment = bx.const_i32(bx.align_of(values_elem).bytes() as i32);
 
         let llvm_pointer = bx.type_ptr();
 
         // Type of the vector of elements:
         let llvm_elem_vec_ty = llvm_vector_ty(bx, values_elem, values_len);
-        let llvm_elem_vec_str = llvm_vector_str(bx, values_elem, values_len);
-
-        let llvm_intrinsic = format!("llvm.masked.load.{llvm_elem_vec_str}.p0");
-        let fn_ty = bx
-            .type_func(&[llvm_pointer, alignment_ty, mask_ty, llvm_elem_vec_ty], llvm_elem_vec_ty);
-        let f = bx.declare_cfn(&llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-        let v = bx.call(
-            fn_ty,
-            None,
-            None,
-            f,
+
+        return Ok(bx.call_intrinsic(
+            "llvm.masked.load",
+            &[llvm_elem_vec_ty, llvm_pointer],
             &[args[1].immediate(), alignment, mask, args[2].immediate()],
-            None,
-            None,
-        );
-        return Ok(v);
+        ));
     }
 
     if name == sym::simd_masked_store {
@@ -1880,33 +1802,20 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         );
 
         let mask = vector_mask_to_bitmask(bx, args[0].immediate(), m_elem_bitwidth, mask_len);
-        let mask_ty = bx.type_vector(bx.type_i1(), mask_len);
 
         // Alignment of T, must be a constant integer value:
-        let alignment_ty = bx.type_i32();
         let alignment = bx.const_i32(bx.align_of(values_elem).bytes() as i32);
 
-        let ret_t = bx.type_void();
-
         let llvm_pointer = bx.type_ptr();
 
         // Type of the vector of elements:
         let llvm_elem_vec_ty = llvm_vector_ty(bx, values_elem, values_len);
-        let llvm_elem_vec_str = llvm_vector_str(bx, values_elem, values_len);
-
-        let llvm_intrinsic = format!("llvm.masked.store.{llvm_elem_vec_str}.p0");
-        let fn_ty = bx.type_func(&[llvm_elem_vec_ty, llvm_pointer, alignment_ty, mask_ty], ret_t);
-        let f = bx.declare_cfn(&llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-        let v = bx.call(
-            fn_ty,
-            None,
-            None,
-            f,
+
+        return Ok(bx.call_intrinsic(
+            "llvm.masked.store",
+            &[llvm_elem_vec_ty, llvm_pointer],
             &[args[2].immediate(), args[1].immediate(), alignment, mask],
-            None,
-            None,
-        );
-        return Ok(v);
+        ));
     }
 
     if name == sym::simd_scatter {
@@ -1971,38 +1880,22 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         );
 
         // Alignment of T, must be a constant integer value:
-        let alignment_ty = bx.type_i32();
         let alignment = bx.const_i32(bx.align_of(in_elem).bytes() as i32);
 
         // Truncate the mask vector to a vector of i1s:
         let mask = vector_mask_to_bitmask(bx, args[2].immediate(), mask_elem_bitwidth, in_len);
-        let mask_ty = bx.type_vector(bx.type_i1(), in_len);
-
-        let ret_t = bx.type_void();
 
         // Type of the vector of pointers:
         let llvm_pointer_vec_ty = llvm_vector_ty(bx, element_ty1, in_len);
-        let llvm_pointer_vec_str = llvm_vector_str(bx, element_ty1, in_len);
 
         // Type of the vector of elements:
         let llvm_elem_vec_ty = llvm_vector_ty(bx, element_ty0, in_len);
-        let llvm_elem_vec_str = llvm_vector_str(bx, element_ty0, in_len);
-
-        let llvm_intrinsic =
-            format!("llvm.masked.scatter.{llvm_elem_vec_str}.{llvm_pointer_vec_str}");
-        let fn_ty =
-            bx.type_func(&[llvm_elem_vec_ty, llvm_pointer_vec_ty, alignment_ty, mask_ty], ret_t);
-        let f = bx.declare_cfn(&llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-        let v = bx.call(
-            fn_ty,
-            None,
-            None,
-            f,
+
+        return Ok(bx.call_intrinsic(
+            "llvm.masked.scatter",
+            &[llvm_elem_vec_ty, llvm_pointer_vec_ty],
             &[args[0].immediate(), args[1].immediate(), alignment, mask],
-            None,
-            None,
-        );
-        return Ok(v);
+        ));
     }
 
     macro_rules! arith_red {
@@ -2431,40 +2324,31 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
             },
             in_len as u64,
         );
-        let intrinsic_name = match name {
-            sym::simd_bswap => "bswap",
-            sym::simd_bitreverse => "bitreverse",
-            sym::simd_ctlz => "ctlz",
-            sym::simd_ctpop => "ctpop",
-            sym::simd_cttz => "cttz",
+        let llvm_intrinsic = match name {
+            sym::simd_bswap => "llvm.bswap",
+            sym::simd_bitreverse => "llvm.bitreverse",
+            sym::simd_ctlz => "llvm.ctlz",
+            sym::simd_ctpop => "llvm.ctpop",
+            sym::simd_cttz => "llvm.cttz",
             _ => unreachable!(),
         };
         let int_size = in_elem.int_size_and_signed(bx.tcx()).0.bits();
-        let llvm_intrinsic = &format!("llvm.{}.v{}i{}", intrinsic_name, in_len, int_size,);
 
         return match name {
             // byte swap is no-op for i8/u8
             sym::simd_bswap if int_size == 8 => Ok(args[0].immediate()),
             sym::simd_ctlz | sym::simd_cttz => {
                 // for the (int, i1 immediate) pair, the second arg adds `(0, true) => poison`
-                let fn_ty = bx.type_func(&[vec_ty, bx.type_i1()], vec_ty);
                 let dont_poison_on_zero = bx.const_int(bx.type_i1(), 0);
-                let f = bx.declare_cfn(llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-                Ok(bx.call(
-                    fn_ty,
-                    None,
-                    None,
-                    f,
+                Ok(bx.call_intrinsic(
+                    llvm_intrinsic,
+                    &[vec_ty],
                     &[args[0].immediate(), dont_poison_on_zero],
-                    None,
-                    None,
                 ))
             }
             sym::simd_bswap | sym::simd_bitreverse | sym::simd_ctpop => {
                 // simple unary argument cases
-                let fn_ty = bx.type_func(&[vec_ty], vec_ty);
-                let f = bx.declare_cfn(llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-                Ok(bx.call(fn_ty, None, None, f, &[args[0].immediate()], None, None))
+                Ok(bx.call_intrinsic(llvm_intrinsic, &[vec_ty], &[args[0].immediate()]))
             }
             _ => unreachable!(),
         };
@@ -2495,10 +2379,9 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
         let lhs = args[0].immediate();
         let rhs = args[1].immediate();
         let is_add = name == sym::simd_saturating_add;
-        let ptr_bits = bx.tcx().data_layout.pointer_size.bits() as _;
-        let (signed, elem_width, elem_ty) = match *in_elem.kind() {
-            ty::Int(i) => (true, i.bit_width().unwrap_or(ptr_bits), bx.cx.type_int_from_ty(i)),
-            ty::Uint(i) => (false, i.bit_width().unwrap_or(ptr_bits), bx.cx.type_uint_from_ty(i)),
+        let (signed, elem_ty) = match *in_elem.kind() {
+            ty::Int(i) => (true, bx.cx.type_int_from_ty(i)),
+            ty::Uint(i) => (false, bx.cx.type_uint_from_ty(i)),
             _ => {
                 return_error!(InvalidMonomorphization::ExpectedVectorElementType {
                     span,
@@ -2508,19 +2391,14 @@ fn generic_simd_intrinsic<'ll, 'tcx>(
                 });
             }
         };
-        let llvm_intrinsic = &format!(
-            "llvm.{}{}.sat.v{}i{}",
+        let llvm_intrinsic = format!(
+            "llvm.{}{}.sat",
             if signed { 's' } else { 'u' },
             if is_add { "add" } else { "sub" },
-            in_len,
-            elem_width
         );
         let vec_ty = bx.cx.type_vector(elem_ty, in_len as u64);
 
-        let fn_ty = bx.type_func(&[vec_ty, vec_ty], vec_ty);
-        let f = bx.declare_cfn(llvm_intrinsic, llvm::UnnamedAddr::No, fn_ty);
-        let v = bx.call(fn_ty, None, None, f, &[lhs, rhs], None, None);
-        return Ok(v);
+        return Ok(bx.call_intrinsic(llvm_intrinsic, &[vec_ty], &[lhs, rhs]));
     }
 
     span_bug!(span, "unknown SIMD intrinsic");
diff --git a/compiler/rustc_codegen_llvm/src/lib.rs b/compiler/rustc_codegen_llvm/src/lib.rs
index 6890923a594..cdfffbe47bf 100644
--- a/compiler/rustc_codegen_llvm/src/lib.rs
+++ b/compiler/rustc_codegen_llvm/src/lib.rs
@@ -340,18 +340,11 @@ impl CodegenBackend for LlvmCodegenBackend {
         target_config(sess)
     }
 
-    fn codegen_crate<'tcx>(
-        &self,
-        tcx: TyCtxt<'tcx>,
-        metadata: EncodedMetadata,
-        need_metadata_module: bool,
-    ) -> Box<dyn Any> {
+    fn codegen_crate<'tcx>(&self, tcx: TyCtxt<'tcx>) -> Box<dyn Any> {
         Box::new(rustc_codegen_ssa::base::codegen_crate(
             LlvmCodegenBackend(()),
             tcx,
             crate::llvm_util::target_cpu(tcx.sess).to_string(),
-            metadata,
-            need_metadata_module,
         ))
     }
 
@@ -376,14 +369,20 @@ impl CodegenBackend for LlvmCodegenBackend {
         (codegen_results, work_products)
     }
 
-    fn link(&self, sess: &Session, codegen_results: CodegenResults, outputs: &OutputFilenames) {
+    fn link(
+        &self,
+        sess: &Session,
+        codegen_results: CodegenResults,
+        metadata: EncodedMetadata,
+        outputs: &OutputFilenames,
+    ) {
         use rustc_codegen_ssa::back::link::link_binary;
 
         use crate::back::archive::LlvmArchiveBuilderBuilder;
 
         // Run the linker on any artifacts that resulted from the LLVM run.
         // This should produce either a finished executable or library.
-        link_binary(sess, &LlvmArchiveBuilderBuilder, codegen_results, outputs);
+        link_binary(sess, &LlvmArchiveBuilderBuilder, codegen_results, metadata, outputs);
     }
 }
 
diff --git a/compiler/rustc_codegen_llvm/src/llvm/ffi.rs b/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
index e27fbf94f34..91ada856d59 100644
--- a/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
@@ -15,6 +15,7 @@
 
 use std::fmt::Debug;
 use std::marker::PhantomData;
+use std::num::NonZero;
 use std::ptr;
 
 use bitflags::bitflags;
@@ -1077,8 +1078,6 @@ unsafe extern "C" {
 
     // Operations on other types
     pub(crate) fn LLVMVoidTypeInContext(C: &Context) -> &Type;
-    pub(crate) fn LLVMTokenTypeInContext(C: &Context) -> &Type;
-    pub(crate) fn LLVMMetadataTypeInContext(C: &Context) -> &Type;
 
     // Operations on all values
     pub(crate) fn LLVMTypeOf(Val: &Value) -> &Type;
@@ -1195,6 +1194,15 @@ unsafe extern "C" {
     // Operations on functions
     pub(crate) fn LLVMSetFunctionCallConv(Fn: &Value, CC: c_uint);
 
+    // Operations about llvm intrinsics
+    pub(crate) fn LLVMLookupIntrinsicID(Name: *const c_char, NameLen: size_t) -> c_uint;
+    pub(crate) fn LLVMGetIntrinsicDeclaration<'a>(
+        Mod: &'a Module,
+        ID: NonZero<c_uint>,
+        ParamTypes: *const &'a Type,
+        ParamCount: size_t,
+    ) -> &'a Value;
+
     // Operations on parameters
     pub(crate) fn LLVMIsAArgument(Val: &Value) -> Option<&Value>;
     pub(crate) safe fn LLVMCountParams(Fn: &Value) -> c_uint;
diff --git a/compiler/rustc_codegen_llvm/src/llvm/mod.rs b/compiler/rustc_codegen_llvm/src/llvm/mod.rs
index ed23f911930..661174a80df 100644
--- a/compiler/rustc_codegen_llvm/src/llvm/mod.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm/mod.rs
@@ -1,6 +1,7 @@
 #![allow(non_snake_case)]
 
 use std::ffi::{CStr, CString};
+use std::num::NonZero;
 use std::ptr;
 use std::str::FromStr;
 use std::string::FromUtf8Error;
@@ -327,6 +328,28 @@ pub(crate) fn get_value_name(value: &Value) -> &[u8] {
     }
 }
 
+#[derive(Debug, Copy, Clone)]
+pub(crate) struct Intrinsic {
+    id: NonZero<c_uint>,
+}
+
+impl Intrinsic {
+    pub(crate) fn lookup(name: &[u8]) -> Option<Self> {
+        let id = unsafe { LLVMLookupIntrinsicID(name.as_c_char_ptr(), name.len()) };
+        NonZero::new(id).map(|id| Self { id })
+    }
+
+    pub(crate) fn get_declaration<'ll>(
+        self,
+        llmod: &'ll Module,
+        type_params: &[&'ll Type],
+    ) -> &'ll Value {
+        unsafe {
+            LLVMGetIntrinsicDeclaration(llmod, self.id, type_params.as_ptr(), type_params.len())
+        }
+    }
+}
+
 /// Safe wrapper for `LLVMSetValueName2` from a byte slice
 pub(crate) fn set_value_name(value: &Value, name: &[u8]) {
     unsafe {
diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs
index 9718c95f38a..0e77bc43df8 100644
--- a/compiler/rustc_codegen_llvm/src/llvm_util.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs
@@ -16,6 +16,7 @@ use rustc_fs_util::path_to_c_string;
 use rustc_middle::bug;
 use rustc_session::Session;
 use rustc_session::config::{PrintKind, PrintRequest};
+use rustc_session::features::{StabilityExt, retpoline_features_by_flags};
 use rustc_span::Symbol;
 use rustc_target::spec::{MergeFunctions, PanicStrategy, SmallDataThresholdSupport};
 use rustc_target::target_features::{RUSTC_SPECIAL_FEATURES, RUSTC_SPECIFIC_FEATURES};
@@ -23,8 +24,7 @@ use smallvec::{SmallVec, smallvec};
 
 use crate::back::write::create_informational_target_machine;
 use crate::errors::{
-    FixedX18InvalidArch, ForbiddenCTargetFeature, PossibleFeature, UnknownCTargetFeature,
-    UnknownCTargetFeaturePrefix, UnstableCTargetFeature,
+    FixedX18InvalidArch, PossibleFeature, UnknownCTargetFeature, UnknownCTargetFeaturePrefix,
 };
 use crate::llvm;
 
@@ -707,6 +707,12 @@ pub(crate) fn target_cpu(sess: &Session) -> &str {
     handle_native(cpu_name)
 }
 
+fn llvm_features_by_flags(sess: &Session) -> Vec<&str> {
+    let mut features: Vec<&str> = Vec::new();
+    retpoline_features_by_flags(sess, &mut features);
+    features
+}
+
 /// The list of LLVM features computed from CLI flags (`-Ctarget-cpu`, `-Ctarget-feature`,
 /// `--target` and similar).
 pub(crate) fn global_llvm_features(
@@ -787,7 +793,7 @@ pub(crate) fn global_llvm_features(
 
         // Compute implied features
         let mut all_rust_features = vec![];
-        for feature in sess.opts.cg.target_feature.split(',') {
+        for feature in sess.opts.cg.target_feature.split(',').chain(llvm_features_by_flags(sess)) {
             if let Some(feature) = feature.strip_prefix('+') {
                 all_rust_features.extend(
                     UnordSet::from(sess.target.implied_target_features(feature))
@@ -840,18 +846,7 @@ pub(crate) fn global_llvm_features(
                         sess.dcx().emit_warn(unknown_feature);
                     }
                     Some((_, stability, _)) => {
-                        if let Err(reason) = stability.toggle_allowed() {
-                            sess.dcx().emit_warn(ForbiddenCTargetFeature {
-                                feature,
-                                enabled: if enable { "enabled" } else { "disabled" },
-                                reason,
-                            });
-                        } else if stability.requires_nightly().is_some() {
-                            // An unstable feature. Warn about using it. It makes little sense
-                            // to hard-error here since we just warn about fully unknown
-                            // features above.
-                            sess.dcx().emit_warn(UnstableCTargetFeature { feature });
-                        }
+                        stability.verify_feature_enabled_by_flag(sess, enable, feature);
                     }
                 }
 
diff --git a/compiler/rustc_codegen_llvm/src/type_.rs b/compiler/rustc_codegen_llvm/src/type_.rs
index 169036f5152..453eca2bbe1 100644
--- a/compiler/rustc_codegen_llvm/src/type_.rs
+++ b/compiler/rustc_codegen_llvm/src/type_.rs
@@ -1,4 +1,5 @@
 use std::borrow::Borrow;
+use std::hash::{Hash, Hasher};
 use std::{fmt, ptr};
 
 use libc::{c_char, c_uint};
@@ -25,6 +26,14 @@ impl PartialEq for Type {
     }
 }
 
+impl Eq for Type {}
+
+impl Hash for Type {
+    fn hash<H: Hasher>(&self, state: &mut H) {
+        ptr::hash(self, state);
+    }
+}
+
 impl fmt::Debug for Type {
     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         f.write_str(
@@ -49,13 +58,6 @@ impl<'ll, CX: Borrow<SCx<'ll>>> GenericCx<'ll, CX> {
     pub(crate) fn type_void(&self) -> &'ll Type {
         unsafe { llvm::LLVMVoidTypeInContext(self.llcx()) }
     }
-    pub(crate) fn type_token(&self) -> &'ll Type {
-        unsafe { llvm::LLVMTokenTypeInContext(self.llcx()) }
-    }
-
-    pub(crate) fn type_metadata(&self) -> &'ll Type {
-        unsafe { llvm::LLVMMetadataTypeInContext(self.llcx()) }
-    }
 
     ///x Creates an integer type with the given number of bits, e.g., i24
     pub(crate) fn type_ix(&self, num_bits: u64) -> &'ll Type {
diff --git a/compiler/rustc_codegen_ssa/Cargo.toml b/compiler/rustc_codegen_ssa/Cargo.toml
index e9c4c255bce..cfae1b3ec98 100644
--- a/compiler/rustc_codegen_ssa/Cargo.toml
+++ b/compiler/rustc_codegen_ssa/Cargo.toml
@@ -6,13 +6,11 @@ edition = "2024"
 [dependencies]
 # tidy-alphabetical-start
 ar_archive_writer = "0.4.2"
-arrayvec = { version = "0.7", default-features = false }
 bitflags = "2.4.1"
 bstr = "1.11.3"
 # Pinned so `cargo update` bumps don't cause breakage. Please also update the
 # `cc` in `rustc_llvm` if you update the `cc` here.
 cc = "=1.2.16"
-either = "1.5.0"
 itertools = "0.12"
 pathdiff = "0.2.0"
 regex = "1.4"
diff --git a/compiler/rustc_codegen_ssa/messages.ftl b/compiler/rustc_codegen_ssa/messages.ftl
index 91f6af7fb93..5322fe58cf3 100644
--- a/compiler/rustc_codegen_ssa/messages.ftl
+++ b/compiler/rustc_codegen_ssa/messages.ftl
@@ -198,8 +198,6 @@ codegen_ssa_linking_failed = linking with `{$linker_path}` failed: {$exit_status
 codegen_ssa_malformed_cgu_name =
     found malformed codegen unit name `{$user_path}`. codegen units names must always start with the name of the crate (`{$crate_name}` in this case).
 
-codegen_ssa_metadata_object_file_write = error writing metadata object file: {$error}
-
 codegen_ssa_missing_cpp_build_tool_component = or a necessary component may be missing from the "C++ build tools" workload
 
 codegen_ssa_missing_features = add the missing features in a `target_feature` attribute
diff --git a/compiler/rustc_codegen_ssa/src/back/archive.rs b/compiler/rustc_codegen_ssa/src/back/archive.rs
index 1e1bdfb5977..84a56f6b0b5 100644
--- a/compiler/rustc_codegen_ssa/src/back/archive.rs
+++ b/compiler/rustc_codegen_ssa/src/back/archive.rs
@@ -14,11 +14,12 @@ use object::read::macho::FatArch;
 use rustc_data_structures::fx::FxIndexSet;
 use rustc_data_structures::memmap::Mmap;
 use rustc_fs_util::TempDirBuilder;
+use rustc_metadata::EncodedMetadata;
 use rustc_session::Session;
 use rustc_span::Symbol;
 use tracing::trace;
 
-use super::metadata::search_for_section;
+use super::metadata::{create_compressed_metadata_file, search_for_section};
 use crate::common;
 // Re-exporting for rustc_codegen_llvm::back::archive
 pub use crate::errors::{ArchiveBuildFailure, ExtractBundledLibsError, UnknownArchiveKind};
@@ -58,6 +59,15 @@ impl From<ImportLibraryItem> for COFFShortExport {
 pub trait ArchiveBuilderBuilder {
     fn new_archive_builder<'a>(&self, sess: &'a Session) -> Box<dyn ArchiveBuilder + 'a>;
 
+    fn create_dylib_metadata_wrapper(
+        &self,
+        sess: &Session,
+        metadata: &EncodedMetadata,
+        symbol_name: &str,
+    ) -> Vec<u8> {
+        create_compressed_metadata_file(sess, metadata, symbol_name)
+    }
+
     /// Creates a DLL Import Library <https://docs.microsoft.com/en-us/windows/win32/dlls/dynamic-link-library-creation#creating-an-import-library>.
     /// and returns the path on disk to that import library.
     /// This functions doesn't take `self` so that it can be called from
diff --git a/compiler/rustc_codegen_ssa/src/back/link.rs b/compiler/rustc_codegen_ssa/src/back/link.rs
index 168077260a6..8882ba359b7 100644
--- a/compiler/rustc_codegen_ssa/src/back/link.rs
+++ b/compiler/rustc_codegen_ssa/src/back/link.rs
@@ -23,7 +23,8 @@ use rustc_hir::def_id::{CrateNum, LOCAL_CRATE};
 use rustc_macros::LintDiagnostic;
 use rustc_metadata::fs::{METADATA_FILENAME, copy_to_stdout, emit_wrapper_file};
 use rustc_metadata::{
-    NativeLibSearchFallback, find_native_static_library, walk_native_lib_search_dirs,
+    EncodedMetadata, NativeLibSearchFallback, find_native_static_library,
+    walk_native_lib_search_dirs,
 };
 use rustc_middle::bug;
 use rustc_middle::lint::lint_level;
@@ -68,29 +69,13 @@ pub fn ensure_removed(dcx: DiagCtxtHandle<'_>, path: &Path) {
     }
 }
 
-fn check_link_info_print_request(sess: &Session, crate_types: &[CrateType]) {
-    let print_native_static_libs =
-        sess.opts.prints.iter().any(|p| p.kind == PrintKind::NativeStaticLibs);
-    let has_staticlib = crate_types.iter().any(|ct| *ct == CrateType::Staticlib);
-    if print_native_static_libs {
-        if !has_staticlib {
-            sess.dcx()
-                .warn(format!("cannot output linkage information without staticlib crate-type"));
-            sess.dcx()
-                .note(format!("consider `--crate-type staticlib` to print linkage information"));
-        } else if !sess.opts.output_types.should_link() {
-            sess.dcx()
-                .warn(format!("cannot output linkage information when --emit link is not passed"));
-        }
-    }
-}
-
 /// Performs the linkage portion of the compilation phase. This will generate all
 /// of the requested outputs for this compilation session.
 pub fn link_binary(
     sess: &Session,
     archive_builder_builder: &dyn ArchiveBuilderBuilder,
     codegen_results: CodegenResults,
+    metadata: EncodedMetadata,
     outputs: &OutputFilenames,
 ) {
     let _timer = sess.timer("link_binary");
@@ -142,6 +127,7 @@ pub fn link_binary(
                         sess,
                         archive_builder_builder,
                         &codegen_results,
+                        &metadata,
                         RlibFlavor::Normal,
                         &path,
                     )
@@ -152,6 +138,7 @@ pub fn link_binary(
                         sess,
                         archive_builder_builder,
                         &codegen_results,
+                        &metadata,
                         &out_filename,
                         &path,
                     );
@@ -163,6 +150,7 @@ pub fn link_binary(
                         crate_type,
                         &out_filename,
                         &codegen_results,
+                        &metadata,
                         path.as_ref(),
                     );
                 }
@@ -203,8 +191,6 @@ pub fn link_binary(
         }
     }
 
-    check_link_info_print_request(sess, &codegen_results.crate_info.crate_types);
-
     // Remove the temporary object file and metadata if we aren't saving temps.
     sess.time("link_binary_remove_temps", || {
         // If the user requests that temporaries are saved, don't delete any.
@@ -226,11 +212,7 @@ pub fn link_binary(
         let remove_temps_from_module =
             |module: &CompiledModule| maybe_remove_temps_from_module(false, false, module);
 
-        // Otherwise, always remove the metadata and allocator module temporaries.
-        if let Some(ref metadata_module) = codegen_results.metadata_module {
-            remove_temps_from_module(metadata_module);
-        }
-
+        // Otherwise, always remove the allocator module temporaries.
         if let Some(ref allocator_module) = codegen_results.allocator_module {
             remove_temps_from_module(allocator_module);
         }
@@ -312,6 +294,7 @@ fn link_rlib<'a>(
     sess: &'a Session,
     archive_builder_builder: &dyn ArchiveBuilderBuilder,
     codegen_results: &CodegenResults,
+    metadata: &EncodedMetadata,
     flavor: RlibFlavor,
     tmpdir: &MaybeTempDir,
 ) -> Box<dyn ArchiveBuilder + 'a> {
@@ -319,12 +302,9 @@ fn link_rlib<'a>(
 
     let trailing_metadata = match flavor {
         RlibFlavor::Normal => {
-            let (metadata, metadata_position) = create_wrapper_file(
-                sess,
-                ".rmeta".to_string(),
-                codegen_results.metadata.stub_or_full(),
-            );
-            let metadata = emit_wrapper_file(sess, &metadata, tmpdir, METADATA_FILENAME);
+            let (metadata, metadata_position) =
+                create_wrapper_file(sess, ".rmeta".to_string(), metadata.stub_or_full());
+            let metadata = emit_wrapper_file(sess, &metadata, tmpdir.as_ref(), METADATA_FILENAME);
             match metadata_position {
                 MetadataPosition::First => {
                     // Most of the time metadata in rlib files is wrapped in a "dummy" object
@@ -392,7 +372,7 @@ fn link_rlib<'a>(
             let src = read(path)
                 .unwrap_or_else(|e| sess.dcx().emit_fatal(errors::ReadFileError { message: e }));
             let (data, _) = create_wrapper_file(sess, ".bundled_lib".to_string(), &src);
-            let wrapper_file = emit_wrapper_file(sess, &data, tmpdir, filename.as_str());
+            let wrapper_file = emit_wrapper_file(sess, &data, tmpdir.as_ref(), filename.as_str());
             packed_bundled_libs.push(wrapper_file);
         } else {
             let path = find_native_static_library(lib.name.as_str(), lib.verbatim, sess);
@@ -473,6 +453,7 @@ fn link_staticlib(
     sess: &Session,
     archive_builder_builder: &dyn ArchiveBuilderBuilder,
     codegen_results: &CodegenResults,
+    metadata: &EncodedMetadata,
     out_filename: &Path,
     tempdir: &MaybeTempDir,
 ) {
@@ -481,6 +462,7 @@ fn link_staticlib(
         sess,
         archive_builder_builder,
         codegen_results,
+        metadata,
         RlibFlavor::StaticlibBase,
         tempdir,
     );
@@ -694,6 +676,7 @@ fn link_natively(
     crate_type: CrateType,
     out_filename: &Path,
     codegen_results: &CodegenResults,
+    metadata: &EncodedMetadata,
     tmpdir: &Path,
 ) {
     info!("preparing {:?} to {:?}", crate_type, out_filename);
@@ -718,6 +701,7 @@ fn link_natively(
         tmpdir,
         temp_filename,
         codegen_results,
+        metadata,
         self_contained_components,
     );
 
@@ -1065,11 +1049,11 @@ fn link_natively(
         match strip {
             Strip::Debuginfo => {
                 // FIXME: AIX's strip utility only offers option to strip line number information.
-                strip_with_external_utility(sess, stripcmd, out_filename, &["-X32_64", "-l"])
+                strip_with_external_utility(sess, stripcmd, temp_filename, &["-X32_64", "-l"])
             }
             Strip::Symbols => {
                 // Must be noted this option might remove symbol __aix_rust_metadata and thus removes .info section which contains metadata.
-                strip_with_external_utility(sess, stripcmd, out_filename, &["-X32_64", "-r"])
+                strip_with_external_utility(sess, stripcmd, temp_filename, &["-X32_64", "-r"])
             }
             Strip::None => {}
         }
@@ -2095,17 +2079,25 @@ fn add_local_crate_allocator_objects(cmd: &mut dyn Linker, codegen_results: &Cod
 /// Add object files containing metadata for the current crate.
 fn add_local_crate_metadata_objects(
     cmd: &mut dyn Linker,
+    sess: &Session,
+    archive_builder_builder: &dyn ArchiveBuilderBuilder,
     crate_type: CrateType,
+    tmpdir: &Path,
     codegen_results: &CodegenResults,
+    metadata: &EncodedMetadata,
 ) {
     // When linking a dynamic library, we put the metadata into a section of the
     // executable. This metadata is in a separate object file from the main
-    // object file, so we link that in here.
-    if matches!(crate_type, CrateType::Dylib | CrateType::ProcMacro)
-        && let Some(m) = &codegen_results.metadata_module
-        && let Some(obj) = &m.object
-    {
-        cmd.add_object(obj);
+    // object file, so we create and link it in here.
+    if matches!(crate_type, CrateType::Dylib | CrateType::ProcMacro) {
+        let data = archive_builder_builder.create_dylib_metadata_wrapper(
+            sess,
+            &metadata,
+            &codegen_results.crate_info.metadata_symbol,
+        );
+        let obj = emit_wrapper_file(sess, &data, tmpdir, "rmeta.o");
+
+        cmd.add_object(&obj);
     }
 }
 
@@ -2195,6 +2187,7 @@ fn linker_with_args(
     tmpdir: &Path,
     out_filename: &Path,
     codegen_results: &CodegenResults,
+    metadata: &EncodedMetadata,
     self_contained_components: LinkSelfContainedComponents,
 ) -> Command {
     let self_contained_crt_objects = self_contained_components.is_crt_objects_enabled();
@@ -2269,7 +2262,15 @@ fn linker_with_args(
     // in this DAG so far because they can only depend on other native libraries
     // and such dependencies are also required to be specified.
     add_local_crate_regular_objects(cmd, codegen_results);
-    add_local_crate_metadata_objects(cmd, crate_type, codegen_results);
+    add_local_crate_metadata_objects(
+        cmd,
+        sess,
+        archive_builder_builder,
+        crate_type,
+        tmpdir,
+        codegen_results,
+        metadata,
+    );
     add_local_crate_allocator_objects(cmd, codegen_results);
 
     // Avoid linking to dynamic libraries unless they satisfy some undefined symbols
diff --git a/compiler/rustc_codegen_ssa/src/back/metadata.rs b/compiler/rustc_codegen_ssa/src/back/metadata.rs
index a16862c41ee..d091c46d9c1 100644
--- a/compiler/rustc_codegen_ssa/src/back/metadata.rs
+++ b/compiler/rustc_codegen_ssa/src/back/metadata.rs
@@ -379,6 +379,24 @@ pub(super) fn elf_e_flags(architecture: Architecture, sess: &Session) -> u32 {
             };
             e_flags
         }
+        Architecture::PowerPc64 => {
+            const EF_PPC64_ABI_UNKNOWN: u32 = 0;
+            const EF_PPC64_ABI_ELF_V1: u32 = 1;
+            const EF_PPC64_ABI_ELF_V2: u32 = 2;
+
+            match sess.target.options.llvm_abiname.as_ref() {
+                // If the flags do not correctly indicate the ABI,
+                // linkers such as ld.lld assume that the ppc64 object files are always ELFv2
+                // which leads to broken binaries if ELFv1 is used for the object files.
+                "elfv1" => EF_PPC64_ABI_ELF_V1,
+                "elfv2" => EF_PPC64_ABI_ELF_V2,
+                "" if sess.target.options.binary_format.to_object() == BinaryFormat::Elf => {
+                    bug!("No ABI specified for this PPC64 ELF target");
+                }
+                // Fall back
+                _ => EF_PPC64_ABI_UNKNOWN,
+            }
+        }
         _ => 0,
     }
 }
diff --git a/compiler/rustc_codegen_ssa/src/back/symbol_export.rs b/compiler/rustc_codegen_ssa/src/back/symbol_export.rs
index 92b9b6e132e..d0b6c7470fb 100644
--- a/compiler/rustc_codegen_ssa/src/back/symbol_export.rs
+++ b/compiler/rustc_codegen_ssa/src/back/symbol_export.rs
@@ -219,6 +219,7 @@ fn exported_symbols_provider_local<'tcx>(
             .chain([
                 mangle_internal_symbol(tcx, "__rust_alloc_error_handler"),
                 mangle_internal_symbol(tcx, OomStrategy::SYMBOL),
+                mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE),
             ])
         {
             let exported_symbol = ExportedSymbol::NoDefId(SymbolName::new(tcx, &symbol_name));
@@ -232,19 +233,6 @@ fn exported_symbols_provider_local<'tcx>(
                 },
             ));
         }
-
-        let exported_symbol = ExportedSymbol::NoDefId(SymbolName::new(
-            tcx,
-            &mangle_internal_symbol(tcx, NO_ALLOC_SHIM_IS_UNSTABLE),
-        ));
-        symbols.push((
-            exported_symbol,
-            SymbolExportInfo {
-                level: SymbolExportLevel::Rust,
-                kind: SymbolExportKind::Data,
-                used: false,
-            },
-        ))
     }
 
     if tcx.sess.instrument_coverage() || tcx.sess.opts.cg.profile_generate.enabled() {
diff --git a/compiler/rustc_codegen_ssa/src/back/write.rs b/compiler/rustc_codegen_ssa/src/back/write.rs
index a41ca8ce28b..bbf9cceef2a 100644
--- a/compiler/rustc_codegen_ssa/src/back/write.rs
+++ b/compiler/rustc_codegen_ssa/src/back/write.rs
@@ -24,7 +24,6 @@ use rustc_hir::def_id::{CrateNum, LOCAL_CRATE};
 use rustc_incremental::{
     copy_cgu_workproduct_to_incr_comp_cache_dir, in_incr_comp_dir, in_incr_comp_dir_sess,
 };
-use rustc_metadata::EncodedMetadata;
 use rustc_metadata::fs::copy_to_stdout;
 use rustc_middle::bug;
 use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
@@ -142,7 +141,6 @@ impl ModuleConfig {
             || match kind {
                 ModuleKind::Regular => sess.opts.output_types.contains_key(&OutputType::Object),
                 ModuleKind::Allocator => false,
-                ModuleKind::Metadata => sess.opts.output_types.contains_key(&OutputType::Metadata),
             };
 
         let emit_obj = if !should_emit_obj {
@@ -350,7 +348,6 @@ pub struct CodegenContext<B: WriteBackendMethods> {
     pub output_filenames: Arc<OutputFilenames>,
     pub invocation_temp: Option<String>,
     pub regular_module_config: Arc<ModuleConfig>,
-    pub metadata_module_config: Arc<ModuleConfig>,
     pub allocator_module_config: Arc<ModuleConfig>,
     pub tm_factory: TargetMachineFactoryFn<B>,
     pub msvc_imps_needed: bool,
@@ -395,7 +392,6 @@ impl<B: WriteBackendMethods> CodegenContext<B> {
     pub fn config(&self, kind: ModuleKind) -> &ModuleConfig {
         match kind {
             ModuleKind::Regular => &self.regular_module_config,
-            ModuleKind::Metadata => &self.metadata_module_config,
             ModuleKind::Allocator => &self.allocator_module_config,
         }
     }
@@ -474,8 +470,6 @@ pub(crate) fn start_async_codegen<B: ExtraBackendMethods>(
     backend: B,
     tcx: TyCtxt<'_>,
     target_cpu: String,
-    metadata: EncodedMetadata,
-    metadata_module: Option<CompiledModule>,
 ) -> OngoingCodegen<B> {
     let (coordinator_send, coordinator_receive) = channel();
 
@@ -485,7 +479,6 @@ pub(crate) fn start_async_codegen<B: ExtraBackendMethods>(
     let crate_info = CrateInfo::new(tcx, target_cpu);
 
     let regular_config = ModuleConfig::new(ModuleKind::Regular, tcx, no_builtins);
-    let metadata_config = ModuleConfig::new(ModuleKind::Metadata, tcx, no_builtins);
     let allocator_config = ModuleConfig::new(ModuleKind::Allocator, tcx, no_builtins);
 
     let (shared_emitter, shared_emitter_main) = SharedEmitter::new();
@@ -499,15 +492,12 @@ pub(crate) fn start_async_codegen<B: ExtraBackendMethods>(
         codegen_worker_send,
         coordinator_receive,
         Arc::new(regular_config),
-        Arc::new(metadata_config),
         Arc::new(allocator_config),
         coordinator_send.clone(),
     );
 
     OngoingCodegen {
         backend,
-        metadata,
-        metadata_module,
         crate_info,
 
         codegen_worker_receive,
@@ -843,12 +833,6 @@ pub(crate) fn compute_per_cgu_lto_type(
     sess_crate_types: &[CrateType],
     module_kind: ModuleKind,
 ) -> ComputedLtoType {
-    // Metadata modules never participate in LTO regardless of the lto
-    // settings.
-    if module_kind == ModuleKind::Metadata {
-        return ComputedLtoType::No;
-    }
-
     // If the linker does LTO, we don't have to do it. Note that we
     // keep doing full LTO, if it is requested, as not to break the
     // assumption that the output will be a single module.
@@ -1029,10 +1013,7 @@ fn finish_intra_module_work<B: ExtraBackendMethods>(
     let dcx = cgcx.create_dcx();
     let dcx = dcx.handle();
 
-    if !cgcx.opts.unstable_opts.combine_cgu
-        || module.kind == ModuleKind::Metadata
-        || module.kind == ModuleKind::Allocator
-    {
+    if !cgcx.opts.unstable_opts.combine_cgu || module.kind == ModuleKind::Allocator {
         let module = B::codegen(cgcx, dcx, module, module_config)?;
         Ok(WorkItemResult::Finished(module))
     } else {
@@ -1123,7 +1104,6 @@ fn start_executing_work<B: ExtraBackendMethods>(
     codegen_worker_send: Sender<CguMessage>,
     coordinator_receive: Receiver<Box<dyn Any + Send>>,
     regular_config: Arc<ModuleConfig>,
-    metadata_config: Arc<ModuleConfig>,
     allocator_config: Arc<ModuleConfig>,
     tx_to_llvm_workers: Sender<Box<dyn Any + Send>>,
 ) -> thread::JoinHandle<Result<CompiledModules, ()>> {
@@ -1216,7 +1196,6 @@ fn start_executing_work<B: ExtraBackendMethods>(
         diag_emitter: shared_emitter.clone(),
         output_filenames: Arc::clone(tcx.output_filenames(())),
         regular_module_config: regular_config,
-        metadata_module_config: metadata_config,
         allocator_module_config: allocator_config,
         tm_factory: backend.target_machine_factory(tcx.sess, ol, backend_features),
         msvc_imps_needed: msvc_imps_needed(tcx),
@@ -1673,7 +1652,6 @@ fn start_executing_work<B: ExtraBackendMethods>(
                                     assert!(compiled_allocator_module.is_none());
                                     compiled_allocator_module = Some(compiled_module);
                                 }
-                                ModuleKind::Metadata => bug!("Should be handled separately"),
                             }
                         }
                         Ok(WorkItemResult::NeedsLink(module)) => {
@@ -2055,8 +2033,6 @@ impl<B: ExtraBackendMethods> Drop for Coordinator<B> {
 
 pub struct OngoingCodegen<B: ExtraBackendMethods> {
     pub backend: B,
-    pub metadata: EncodedMetadata,
-    pub metadata_module: Option<CompiledModule>,
     pub crate_info: CrateInfo,
     pub codegen_worker_receive: Receiver<CguMessage>,
     pub shared_emitter_main: SharedEmitterMain,
@@ -2096,12 +2072,10 @@ impl<B: ExtraBackendMethods> OngoingCodegen<B> {
 
         (
             CodegenResults {
-                metadata: self.metadata,
                 crate_info: self.crate_info,
 
                 modules: compiled_modules.modules,
                 allocator_module: compiled_modules.allocator_module,
-                metadata_module: self.metadata_module,
             },
             work_products,
         )
diff --git a/compiler/rustc_codegen_ssa/src/base.rs b/compiler/rustc_codegen_ssa/src/base.rs
index c2d6a26de0f..a3d6c73ba85 100644
--- a/compiler/rustc_codegen_ssa/src/base.rs
+++ b/compiler/rustc_codegen_ssa/src/base.rs
@@ -15,11 +15,10 @@ use rustc_data_structures::unord::UnordMap;
 use rustc_hir::ItemId;
 use rustc_hir::def_id::{DefId, LOCAL_CRATE};
 use rustc_hir::lang_items::LangItem;
-use rustc_metadata::EncodedMetadata;
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrs;
 use rustc_middle::middle::debugger_visualizer::{DebuggerVisualizerFile, DebuggerVisualizerType};
-use rustc_middle::middle::exported_symbols::SymbolExportKind;
-use rustc_middle::middle::{exported_symbols, lang_items};
+use rustc_middle::middle::exported_symbols::{self, SymbolExportKind};
+use rustc_middle::middle::lang_items;
 use rustc_middle::mir::BinOp;
 use rustc_middle::mir::interpret::ErrorHandled;
 use rustc_middle::mir::mono::{CodegenUnit, CodegenUnitNameBuilder, MonoItem, MonoItemPartitions};
@@ -28,7 +27,7 @@ use rustc_middle::ty::layout::{HasTyCtxt, HasTypingEnv, LayoutOf, TyAndLayout};
 use rustc_middle::ty::{self, Instance, Ty, TyCtxt};
 use rustc_middle::{bug, span_bug};
 use rustc_session::Session;
-use rustc_session::config::{self, CrateType, EntryFnType, OutputType};
+use rustc_session::config::{self, CrateType, EntryFnType};
 use rustc_span::{DUMMY_SP, Symbol, sym};
 use rustc_symbol_mangling::mangle_internal_symbol;
 use rustc_trait_selection::infer::{BoundRegionConversionTime, TyCtxtInferExt};
@@ -37,7 +36,6 @@ use tracing::{debug, info};
 
 use crate::assert_module_sources::CguReuse;
 use crate::back::link::are_upstream_rust_objects_already_included;
-use crate::back::metadata::create_compressed_metadata_file;
 use crate::back::write::{
     ComputedLtoType, OngoingCodegen, compute_per_cgu_lto_type, start_async_codegen,
     submit_codegened_module_to_llvm, submit_post_lto_module_to_llvm, submit_pre_lto_module_to_llvm,
@@ -48,8 +46,7 @@ use crate::mir::operand::OperandValue;
 use crate::mir::place::PlaceRef;
 use crate::traits::*;
 use crate::{
-    CachedModuleCodegen, CodegenLintLevels, CompiledModule, CrateInfo, ModuleCodegen, ModuleKind,
-    errors, meth, mir,
+    CachedModuleCodegen, CodegenLintLevels, CrateInfo, ModuleCodegen, ModuleKind, errors, meth, mir,
 };
 
 pub(crate) fn bin_op_to_icmp_predicate(op: BinOp, signed: bool) -> IntPredicate {
@@ -669,12 +666,10 @@ pub fn codegen_crate<B: ExtraBackendMethods>(
     backend: B,
     tcx: TyCtxt<'_>,
     target_cpu: String,
-    metadata: EncodedMetadata,
-    need_metadata_module: bool,
 ) -> OngoingCodegen<B> {
     // Skip crate items and just output metadata in -Z no-codegen mode.
     if tcx.sess.opts.unstable_opts.no_codegen || !tcx.sess.opts.output_types.should_codegen() {
-        let ongoing_codegen = start_async_codegen(backend, tcx, target_cpu, metadata, None);
+        let ongoing_codegen = start_async_codegen(backend, tcx, target_cpu);
 
         ongoing_codegen.codegen_finished(tcx);
 
@@ -707,39 +702,7 @@ pub fn codegen_crate<B: ExtraBackendMethods>(
         }
     }
 
-    let metadata_module = need_metadata_module.then(|| {
-        // Emit compressed metadata object.
-        let metadata_cgu_name =
-            cgu_name_builder.build_cgu_name(LOCAL_CRATE, &["crate"], Some("metadata")).to_string();
-        tcx.sess.time("write_compressed_metadata", || {
-            let file_name = tcx.output_filenames(()).temp_path_for_cgu(
-                OutputType::Metadata,
-                &metadata_cgu_name,
-                tcx.sess.invocation_temp.as_deref(),
-            );
-            let data = create_compressed_metadata_file(
-                tcx.sess,
-                &metadata,
-                &exported_symbols::metadata_symbol_name(tcx),
-            );
-            if let Err(error) = std::fs::write(&file_name, data) {
-                tcx.dcx().emit_fatal(errors::MetadataObjectFileWrite { error });
-            }
-            CompiledModule {
-                name: metadata_cgu_name,
-                kind: ModuleKind::Metadata,
-                object: Some(file_name),
-                dwarf_object: None,
-                bytecode: None,
-                assembly: None,
-                llvm_ir: None,
-                links_from_incr_cache: Vec::new(),
-            }
-        })
-    });
-
-    let ongoing_codegen =
-        start_async_codegen(backend.clone(), tcx, target_cpu, metadata, metadata_module);
+    let ongoing_codegen = start_async_codegen(backend.clone(), tcx, target_cpu);
 
     // Codegen an allocator shim, if necessary.
     if let Some(kind) = allocator_kind_for_codegen(tcx) {
@@ -1010,6 +973,7 @@ impl CrateInfo {
             windows_subsystem,
             natvis_debugger_visualizers: Default::default(),
             lint_levels: CodegenLintLevels::from_tcx(tcx),
+            metadata_symbol: exported_symbols::metadata_symbol_name(tcx),
         };
 
         info.native_libraries.reserve(n_crates);
diff --git a/compiler/rustc_codegen_ssa/src/codegen_attrs.rs b/compiler/rustc_codegen_ssa/src/codegen_attrs.rs
index 0b31fa8fa88..188a9a98ce7 100644
--- a/compiler/rustc_codegen_ssa/src/codegen_attrs.rs
+++ b/compiler/rustc_codegen_ssa/src/codegen_attrs.rs
@@ -4,7 +4,9 @@ use rustc_abi::ExternAbi;
 use rustc_ast::expand::autodiff_attrs::{AutoDiffAttrs, DiffActivity, DiffMode};
 use rustc_ast::{LitKind, MetaItem, MetaItemInner, attr};
 use rustc_attr_data_structures::ReprAttr::ReprAlign;
-use rustc_attr_data_structures::{AttributeKind, InlineAttr, InstructionSetAttr, OptimizeAttr};
+use rustc_attr_data_structures::{
+    AttributeKind, InlineAttr, InstructionSetAttr, OptimizeAttr, find_attr,
+};
 use rustc_data_structures::fx::FxHashMap;
 use rustc_hir::def::DefKind;
 use rustc_hir::def_id::{DefId, LOCAL_CRATE, LocalDefId};
@@ -21,7 +23,6 @@ use rustc_session::parse::feature_err;
 use rustc_session::{Session, lint};
 use rustc_span::{Ident, Span, sym};
 use rustc_target::spec::SanitizerSet;
-use tracing::debug;
 
 use crate::errors;
 use crate::target_features::{check_target_feature_trait_unsafe, from_target_feature_attr};
@@ -83,7 +84,6 @@ fn codegen_fn_attrs(tcx: TyCtxt<'_>, did: LocalDefId) -> CodegenFnAttrs {
 
     let rust_target_features = tcx.rust_target_features(LOCAL_CRATE);
 
-    let mut inline_span = None;
     let mut link_ordinal_span = None;
     let mut no_sanitize_span = None;
     let mut mixed_export_name_no_mangle_lint_state = MixedExportNameAndNoMangleState::default();
@@ -449,48 +449,14 @@ fn codegen_fn_attrs(tcx: TyCtxt<'_>, did: LocalDefId) -> CodegenFnAttrs {
 
     mixed_export_name_no_mangle_lint_state.lint_if_mixed(tcx);
 
-    codegen_fn_attrs.inline = attrs.iter().fold(InlineAttr::None, |ia, attr| {
-        if !attr.has_name(sym::inline) {
-            return ia;
-        }
-
-        if attr.is_word() {
-            return InlineAttr::Hint;
-        }
-        let Some(ref items) = attr.meta_item_list() else {
-            return ia;
-        };
-        inline_span = Some(attr.span());
-
-        let [item] = &items[..] else {
-            tcx.dcx().emit_err(errors::ExpectedOneArgument { span: attr.span() });
-            return InlineAttr::None;
-        };
-
-        if item.has_name(sym::always) {
-            InlineAttr::Always
-        } else if item.has_name(sym::never) {
-            InlineAttr::Never
-        } else {
-            tcx.dcx().emit_err(errors::InvalidArgument { span: items[0].span() });
-
-            InlineAttr::None
-        }
-    });
-    codegen_fn_attrs.inline = attrs.iter().fold(codegen_fn_attrs.inline, |ia, attr| {
-        if !attr.has_name(sym::rustc_force_inline) || !tcx.features().rustc_attrs() {
-            return ia;
-        }
-
-        if attr.is_word() {
-            InlineAttr::Force { attr_span: attr.span(), reason: None }
-        } else if let Some(val) = attr.value_str() {
-            InlineAttr::Force { attr_span: attr.span(), reason: Some(val) }
-        } else {
-            debug!("`rustc_force_inline` not checked by attribute validation");
-            ia
-        }
-    });
+    let inline_span;
+    (codegen_fn_attrs.inline, inline_span) = if let Some((inline_attr, span)) =
+        find_attr!(attrs, AttributeKind::Inline(i, span) => (*i, *span))
+    {
+        (inline_attr, Some(span))
+    } else {
+        (InlineAttr::None, None)
+    };
 
     // naked function MUST NOT be inlined! This attribute is required for the rust compiler itself,
     // but not for the code generation backend because at that point the naked function will just be
@@ -511,7 +477,6 @@ fn codegen_fn_attrs(tcx: TyCtxt<'_>, did: LocalDefId) -> CodegenFnAttrs {
             return OptimizeAttr::Default;
         };
 
-        inline_span = Some(attr.span());
         let [item] = &items[..] else {
             tcx.dcx().emit_err(errors::ExpectedOneArgumentOptimize { span: attr.span() });
             return OptimizeAttr::Default;
diff --git a/compiler/rustc_codegen_ssa/src/errors.rs b/compiler/rustc_codegen_ssa/src/errors.rs
index f843347db92..5387b2a7f81 100644
--- a/compiler/rustc_codegen_ssa/src/errors.rs
+++ b/compiler/rustc_codegen_ssa/src/errors.rs
@@ -209,13 +209,6 @@ pub(crate) struct OutOfRangeInteger {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_ssa_expected_one_argument, code = E0534)]
-pub(crate) struct ExpectedOneArgument {
-    #[primary_span]
-    pub span: Span,
-}
-
-#[derive(Diagnostic)]
 #[diag(codegen_ssa_expected_one_argument, code = E0722)]
 pub(crate) struct ExpectedOneArgumentOptimize {
     #[primary_span]
@@ -223,14 +216,6 @@ pub(crate) struct ExpectedOneArgumentOptimize {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_ssa_invalid_argument, code = E0535)]
-#[help]
-pub(crate) struct InvalidArgument {
-    #[primary_span]
-    pub span: Span,
-}
-
-#[derive(Diagnostic)]
 #[diag(codegen_ssa_invalid_argument, code = E0722)]
 pub(crate) struct InvalidArgumentOptimize {
     #[primary_span]
@@ -778,12 +763,6 @@ pub(crate) struct MultipleMainFunctions {
 }
 
 #[derive(Diagnostic)]
-#[diag(codegen_ssa_metadata_object_file_write)]
-pub(crate) struct MetadataObjectFileWrite {
-    pub error: Error,
-}
-
-#[derive(Diagnostic)]
 #[diag(codegen_ssa_invalid_windows_subsystem)]
 pub(crate) struct InvalidWindowsSubsystem {
     pub subsystem: Symbol,
diff --git a/compiler/rustc_codegen_ssa/src/lib.rs b/compiler/rustc_codegen_ssa/src/lib.rs
index 84919645cf0..523c9f2ad1c 100644
--- a/compiler/rustc_codegen_ssa/src/lib.rs
+++ b/compiler/rustc_codegen_ssa/src/lib.rs
@@ -31,6 +31,7 @@ use rustc_data_structures::unord::UnordMap;
 use rustc_hir::CRATE_HIR_ID;
 use rustc_hir::def_id::CrateNum;
 use rustc_macros::{Decodable, Encodable, HashStable};
+use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::WorkProduct;
 use rustc_middle::lint::LevelAndSource;
 use rustc_middle::middle::debugger_visualizer::DebuggerVisualizerFile;
@@ -169,7 +170,6 @@ pub(crate) struct CachedModuleCodegen {
 #[derive(Copy, Clone, Debug, PartialEq, Encodable, Decodable)]
 pub enum ModuleKind {
     Regular,
-    Metadata,
     Allocator,
 }
 
@@ -233,6 +233,7 @@ pub struct CrateInfo {
     pub windows_subsystem: Option<String>,
     pub natvis_debugger_visualizers: BTreeSet<DebuggerVisualizerFile>,
     pub lint_levels: CodegenLintLevels,
+    pub metadata_symbol: String,
 }
 
 /// Target-specific options that get set in `cfg(...)`.
@@ -257,8 +258,6 @@ pub struct TargetConfig {
 pub struct CodegenResults {
     pub modules: Vec<CompiledModule>,
     pub allocator_module: Option<CompiledModule>,
-    pub metadata_module: Option<CompiledModule>,
-    pub metadata: rustc_metadata::EncodedMetadata,
     pub crate_info: CrateInfo,
 }
 
@@ -303,6 +302,7 @@ impl CodegenResults {
         sess: &Session,
         rlink_file: &Path,
         codegen_results: &CodegenResults,
+        metadata: &EncodedMetadata,
         outputs: &OutputFilenames,
     ) -> Result<usize, io::Error> {
         let mut encoder = FileEncoder::new(rlink_file)?;
@@ -312,6 +312,7 @@ impl CodegenResults {
         encoder.emit_raw_bytes(&RLINK_VERSION.to_be_bytes());
         encoder.emit_str(sess.cfg_version);
         Encodable::encode(codegen_results, &mut encoder);
+        Encodable::encode(metadata, &mut encoder);
         Encodable::encode(outputs, &mut encoder);
         encoder.finish().map_err(|(_path, err)| err)
     }
@@ -319,7 +320,7 @@ impl CodegenResults {
     pub fn deserialize_rlink(
         sess: &Session,
         data: Vec<u8>,
-    ) -> Result<(Self, OutputFilenames), CodegenErrors> {
+    ) -> Result<(Self, EncodedMetadata, OutputFilenames), CodegenErrors> {
         // The Decodable machinery is not used here because it panics if the input data is invalid
         // and because its internal representation may change.
         if !data.starts_with(RLINK_MAGIC) {
@@ -350,8 +351,9 @@ impl CodegenResults {
         }
 
         let codegen_results = CodegenResults::decode(&mut decoder);
+        let metadata = EncodedMetadata::decode(&mut decoder);
         let outputs = OutputFilenames::decode(&mut decoder);
-        Ok((codegen_results, outputs))
+        Ok((codegen_results, metadata, outputs))
     }
 }
 
diff --git a/compiler/rustc_codegen_ssa/src/mir/block.rs b/compiler/rustc_codegen_ssa/src/mir/block.rs
index 43b87171d51..3df97429e09 100644
--- a/compiler/rustc_codegen_ssa/src/mir/block.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/block.rs
@@ -1,6 +1,6 @@
 use std::cmp;
 
-use rustc_abi::{BackendRepr, ExternAbi, HasDataLayout, Reg, Size, WrappingRange};
+use rustc_abi::{Align, BackendRepr, ExternAbi, HasDataLayout, Reg, Size, WrappingRange};
 use rustc_ast as ast;
 use rustc_ast::{InlineAsmOptions, InlineAsmTemplatePiece};
 use rustc_data_structures::packed::Pu128;
@@ -13,7 +13,7 @@ use rustc_middle::{bug, span_bug};
 use rustc_session::config::OptLevel;
 use rustc_span::Span;
 use rustc_span::source_map::Spanned;
-use rustc_target::callconv::{ArgAbi, FnAbi, PassMode};
+use rustc_target::callconv::{ArgAbi, CastTarget, FnAbi, PassMode};
 use tracing::{debug, info};
 
 use super::operand::OperandRef;
@@ -558,8 +558,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
                     }
                     ZeroSized => bug!("ZST return value shouldn't be in PassMode::Cast"),
                 };
-                let ty = bx.cast_backend_type(cast_ty);
-                bx.load(ty, llslot, self.fn_abi.ret.layout.align.abi)
+                load_cast(bx, cast_ty, llslot, self.fn_abi.ret.layout.align.abi)
             }
         };
         bx.ret(llval);
@@ -1618,8 +1617,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
                     MemFlags::empty(),
                 );
                 // ...and then load it with the ABI type.
-                let cast_ty = bx.cast_backend_type(cast);
-                llval = bx.load(cast_ty, llscratch, scratch_align);
+                llval = load_cast(bx, cast, llscratch, scratch_align);
                 bx.lifetime_end(llscratch, scratch_size);
             } else {
                 // We can't use `PlaceRef::load` here because the argument
@@ -1969,3 +1967,47 @@ enum ReturnDest<'tcx, V> {
     /// Store a direct return value to an operand local place.
     DirectOperand(mir::Local),
 }
+
+fn load_cast<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>>(
+    bx: &mut Bx,
+    cast: &CastTarget,
+    ptr: Bx::Value,
+    align: Align,
+) -> Bx::Value {
+    let cast_ty = bx.cast_backend_type(cast);
+    if let Some(offset_from_start) = cast.rest_offset {
+        assert!(cast.prefix[1..].iter().all(|p| p.is_none()));
+        assert_eq!(cast.rest.unit.size, cast.rest.total);
+        let first_ty = bx.reg_backend_type(&cast.prefix[0].unwrap());
+        let second_ty = bx.reg_backend_type(&cast.rest.unit);
+        let first = bx.load(first_ty, ptr, align);
+        let second_ptr = bx.inbounds_ptradd(ptr, bx.const_usize(offset_from_start.bytes()));
+        let second = bx.load(second_ty, second_ptr, align.restrict_for_offset(offset_from_start));
+        let res = bx.cx().const_poison(cast_ty);
+        let res = bx.insert_value(res, first, 0);
+        bx.insert_value(res, second, 1)
+    } else {
+        bx.load(cast_ty, ptr, align)
+    }
+}
+
+pub fn store_cast<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>>(
+    bx: &mut Bx,
+    cast: &CastTarget,
+    value: Bx::Value,
+    ptr: Bx::Value,
+    align: Align,
+) {
+    if let Some(offset_from_start) = cast.rest_offset {
+        assert!(cast.prefix[1..].iter().all(|p| p.is_none()));
+        assert_eq!(cast.rest.unit.size, cast.rest.total);
+        assert!(cast.prefix[0].is_some());
+        let first = bx.extract_value(value, 0);
+        let second = bx.extract_value(value, 1);
+        bx.store(first, ptr, align);
+        let second_ptr = bx.inbounds_ptradd(ptr, bx.const_usize(offset_from_start.bytes()));
+        bx.store(second, second_ptr, align.restrict_for_offset(offset_from_start));
+    } else {
+        bx.store(value, ptr, align);
+    };
+}
diff --git a/compiler/rustc_codegen_ssa/src/mir/debuginfo.rs b/compiler/rustc_codegen_ssa/src/mir/debuginfo.rs
index f731613d67e..025f5fb54f4 100644
--- a/compiler/rustc_codegen_ssa/src/mir/debuginfo.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/debuginfo.rs
@@ -317,7 +317,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
         let name = if bx.sess().fewer_names() {
             None
         } else {
-            Some(match whole_local_var.or(fallback_var.clone()) {
+            Some(match whole_local_var.or_else(|| fallback_var.clone()) {
                 Some(var) if var.name != sym::empty => var.name.to_string(),
                 _ => format!("{local:?}"),
             })
diff --git a/compiler/rustc_codegen_ssa/src/mir/intrinsic.rs b/compiler/rustc_codegen_ssa/src/mir/intrinsic.rs
index e217c09939e..27fcab8ed2d 100644
--- a/compiler/rustc_codegen_ssa/src/mir/intrinsic.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/intrinsic.rs
@@ -118,7 +118,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
                 let (llsize, _) = size_of_val::size_and_align_of_dst(bx, tp_ty, meta);
                 llsize
             }
-            sym::min_align_of_val => {
+            sym::align_of_val => {
                 let tp_ty = fn_args.type_at(0);
                 let (_, meta) = args[0].val.pointer_parts();
                 let (_, llalign) = size_of_val::size_and_align_of_dst(bx, tp_ty, meta);
diff --git a/compiler/rustc_codegen_ssa/src/mir/mod.rs b/compiler/rustc_codegen_ssa/src/mir/mod.rs
index 96a04473aba..66c4af4c935 100644
--- a/compiler/rustc_codegen_ssa/src/mir/mod.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/mod.rs
@@ -26,6 +26,7 @@ pub mod place;
 mod rvalue;
 mod statement;
 
+pub use self::block::store_cast;
 use self::debuginfo::{FunctionDebugContext, PerLocalVarDebugInfo};
 use self::operand::{OperandRef, OperandValue};
 use self::place::PlaceRef;
@@ -259,7 +260,7 @@ pub fn codegen_mir<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>>(
                     }
                     PassMode::Cast { ref cast, .. } => {
                         debug!("alloc: {:?} (return place) -> place", local);
-                        let size = cast.size(&start_bx);
+                        let size = cast.size(&start_bx).max(layout.size);
                         return LocalRef::Place(PlaceRef::alloca_size(&mut start_bx, size, layout));
                     }
                     _ => {}
diff --git a/compiler/rustc_codegen_ssa/src/mir/naked_asm.rs b/compiler/rustc_codegen_ssa/src/mir/naked_asm.rs
index 46fb9a89513..9f66457a740 100644
--- a/compiler/rustc_codegen_ssa/src/mir/naked_asm.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/naked_asm.rs
@@ -1,14 +1,13 @@
 use rustc_abi::{BackendRepr, Float, Integer, Primitive, RegKind};
 use rustc_attr_data_structures::InstructionSetAttr;
-use rustc_hir::def_id::DefId;
 use rustc_middle::mir::mono::{Linkage, MonoItemData, Visibility};
 use rustc_middle::mir::{InlineAsmOperand, START_BLOCK};
 use rustc_middle::ty::layout::{FnAbiOf, LayoutOf, TyAndLayout};
 use rustc_middle::ty::{Instance, Ty, TyCtxt, TypeVisitableExt};
-use rustc_middle::{bug, span_bug, ty};
+use rustc_middle::{bug, ty};
 use rustc_span::sym;
 use rustc_target::callconv::{ArgAbi, FnAbi, PassMode};
-use rustc_target::spec::{BinaryFormat, WasmCAbi};
+use rustc_target::spec::BinaryFormat;
 
 use crate::common;
 use crate::mir::AsmCodegenMethods;
@@ -206,7 +205,7 @@ fn prefix_and_suffix<'tcx>(
     let mut end = String::new();
     match asm_binary_format {
         BinaryFormat::Elf => {
-            let section = link_section.unwrap_or(format!(".text.{asm_name}"));
+            let section = link_section.unwrap_or_else(|| format!(".text.{asm_name}"));
 
             let progbits = match is_arm {
                 true => "%progbits",
@@ -240,7 +239,7 @@ fn prefix_and_suffix<'tcx>(
             }
         }
         BinaryFormat::MachO => {
-            let section = link_section.unwrap_or("__TEXT,__text".to_string());
+            let section = link_section.unwrap_or_else(|| "__TEXT,__text".to_string());
             writeln!(begin, ".pushsection {},regular,pure_instructions", section).unwrap();
             writeln!(begin, ".balign {align_bytes}").unwrap();
             write_linkage(&mut begin).unwrap();
@@ -257,7 +256,7 @@ fn prefix_and_suffix<'tcx>(
             }
         }
         BinaryFormat::Coff => {
-            let section = link_section.unwrap_or(format!(".text.{asm_name}"));
+            let section = link_section.unwrap_or_else(|| format!(".text.{asm_name}"));
             writeln!(begin, ".pushsection {},\"xr\"", section).unwrap();
             writeln!(begin, ".balign {align_bytes}").unwrap();
             write_linkage(&mut begin).unwrap();
@@ -274,7 +273,7 @@ fn prefix_and_suffix<'tcx>(
             }
         }
         BinaryFormat::Wasm => {
-            let section = link_section.unwrap_or(format!(".text.{asm_name}"));
+            let section = link_section.unwrap_or_else(|| format!(".text.{asm_name}"));
 
             writeln!(begin, ".section {section},\"\",@").unwrap();
             // wasm functions cannot be aligned, so skip
@@ -287,12 +286,7 @@ fn prefix_and_suffix<'tcx>(
                 writeln!(begin, "{}", arch_prefix).unwrap();
             }
             writeln!(begin, "{asm_name}:").unwrap();
-            writeln!(
-                begin,
-                ".functype {asm_name} {}",
-                wasm_functype(tcx, fn_abi, instance.def_id())
-            )
-            .unwrap();
+            writeln!(begin, ".functype {asm_name} {}", wasm_functype(tcx, fn_abi)).unwrap();
 
             writeln!(end).unwrap();
             // .size is ignored for function symbols, so we can skip it
@@ -333,7 +327,7 @@ fn prefix_and_suffix<'tcx>(
 /// The webassembly type signature for the given function.
 ///
 /// Used by the `.functype` directive on wasm targets.
-fn wasm_functype<'tcx>(tcx: TyCtxt<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, def_id: DefId) -> String {
+fn wasm_functype<'tcx>(tcx: TyCtxt<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>) -> String {
     let mut signature = String::with_capacity(64);
 
     let ptr_type = match tcx.data_layout.pointer_size.bits() {
@@ -342,17 +336,6 @@ fn wasm_functype<'tcx>(tcx: TyCtxt<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, def_id
         other => bug!("wasm pointer size cannot be {other} bits"),
     };
 
-    // FIXME: remove this once the wasm32-unknown-unknown ABI is fixed
-    // please also add `wasm32-unknown-unknown` back in `tests/assembly/wasm32-naked-fn.rs`
-    // basically the commit introducing this comment should be reverted
-    if let PassMode::Pair { .. } = fn_abi.ret.mode {
-        let _ = WasmCAbi::Legacy { with_lint: true };
-        span_bug!(
-            tcx.def_span(def_id),
-            "cannot return a pair (the wasm32-unknown-unknown ABI is broken, see https://github.com/rust-lang/rust/issues/115666"
-        );
-    }
-
     let hidden_return = matches!(fn_abi.ret.mode, PassMode::Indirect { .. });
 
     signature.push('(');
@@ -366,7 +349,7 @@ fn wasm_functype<'tcx>(tcx: TyCtxt<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, def_id
 
     let mut it = fn_abi.args.iter().peekable();
     while let Some(arg_abi) = it.next() {
-        wasm_type(tcx, &mut signature, arg_abi, ptr_type, def_id);
+        wasm_type(&mut signature, arg_abi, ptr_type);
         if it.peek().is_some() {
             signature.push_str(", ");
         }
@@ -375,7 +358,7 @@ fn wasm_functype<'tcx>(tcx: TyCtxt<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, def_id
     signature.push_str(") -> (");
 
     if !hidden_return {
-        wasm_type(tcx, &mut signature, &fn_abi.ret, ptr_type, def_id);
+        wasm_type(&mut signature, &fn_abi.ret, ptr_type);
     }
 
     signature.push(')');
@@ -383,27 +366,13 @@ fn wasm_functype<'tcx>(tcx: TyCtxt<'tcx>, fn_abi: &FnAbi<'tcx, Ty<'tcx>>, def_id
     signature
 }
 
-fn wasm_type<'tcx>(
-    tcx: TyCtxt<'tcx>,
-    signature: &mut String,
-    arg_abi: &ArgAbi<'_, Ty<'tcx>>,
-    ptr_type: &'static str,
-    def_id: DefId,
-) {
+fn wasm_type<'tcx>(signature: &mut String, arg_abi: &ArgAbi<'_, Ty<'tcx>>, ptr_type: &'static str) {
     match arg_abi.mode {
         PassMode::Ignore => { /* do nothing */ }
         PassMode::Direct(_) => {
             let direct_type = match arg_abi.layout.backend_repr {
                 BackendRepr::Scalar(scalar) => wasm_primitive(scalar.primitive(), ptr_type),
                 BackendRepr::SimdVector { .. } => "v128",
-                BackendRepr::Memory { .. } => {
-                    // FIXME: remove this branch once the wasm32-unknown-unknown ABI is fixed
-                    let _ = WasmCAbi::Legacy { with_lint: true };
-                    span_bug!(
-                        tcx.def_span(def_id),
-                        "cannot use memory args (the wasm32-unknown-unknown ABI is broken, see https://github.com/rust-lang/rust/issues/115666"
-                    );
-                }
                 other => unreachable!("unexpected BackendRepr: {:?}", other),
             };
 
diff --git a/compiler/rustc_codegen_ssa/src/mir/operand.rs b/compiler/rustc_codegen_ssa/src/mir/operand.rs
index e9389ddf93b..99957c67708 100644
--- a/compiler/rustc_codegen_ssa/src/mir/operand.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/operand.rs
@@ -1,9 +1,9 @@
 use std::fmt;
 
-use arrayvec::ArrayVec;
-use either::Either;
 use rustc_abi as abi;
-use rustc_abi::{Align, BackendRepr, FIRST_VARIANT, Primitive, Size, TagEncoding, Variants};
+use rustc_abi::{
+    Align, BackendRepr, FIRST_VARIANT, FieldIdx, Primitive, Size, TagEncoding, VariantIdx, Variants,
+};
 use rustc_middle::mir::interpret::{Pointer, Scalar, alloc_range};
 use rustc_middle::mir::{self, ConstValue};
 use rustc_middle::ty::Ty;
@@ -13,6 +13,7 @@ use rustc_session::config::OptLevel;
 use tracing::{debug, instrument};
 
 use super::place::{PlaceRef, PlaceValue};
+use super::rvalue::transmute_immediate;
 use super::{FunctionCx, LocalRef};
 use crate::common::IntPredicate;
 use crate::traits::*;
@@ -69,31 +70,6 @@ pub enum OperandValue<V> {
 }
 
 impl<V: CodegenObject> OperandValue<V> {
-    /// If this is ZeroSized/Immediate/Pair, return an array of the 0/1/2 values.
-    /// If this is Ref, return the place.
-    #[inline]
-    pub(crate) fn immediates_or_place(self) -> Either<ArrayVec<V, 2>, PlaceValue<V>> {
-        match self {
-            OperandValue::ZeroSized => Either::Left(ArrayVec::new()),
-            OperandValue::Immediate(a) => Either::Left(ArrayVec::from_iter([a])),
-            OperandValue::Pair(a, b) => Either::Left([a, b].into()),
-            OperandValue::Ref(p) => Either::Right(p),
-        }
-    }
-
-    /// Given an array of 0/1/2 immediate values, return ZeroSized/Immediate/Pair.
-    #[inline]
-    pub(crate) fn from_immediates(immediates: ArrayVec<V, 2>) -> Self {
-        let mut it = immediates.into_iter();
-        let Some(a) = it.next() else {
-            return OperandValue::ZeroSized;
-        };
-        let Some(b) = it.next() else {
-            return OperandValue::Immediate(a);
-        };
-        OperandValue::Pair(a, b)
-    }
-
     /// Treat this value as a pointer and return the data pointer and
     /// optional metadata as backend values.
     ///
@@ -595,6 +571,105 @@ impl<'a, 'tcx, V: CodegenObject> OperandRef<'tcx, V> {
             }
         }
     }
+
+    /// Creates an incomplete operand containing the [`abi::Scalar`]s expected based
+    /// on the `layout` passed. This is for use with [`OperandRef::insert_field`]
+    /// later to set the necessary immediate(s).
+    ///
+    /// Returns `None` for `layout`s which cannot be built this way.
+    pub(crate) fn builder(
+        layout: TyAndLayout<'tcx>,
+    ) -> Option<OperandRef<'tcx, Result<V, abi::Scalar>>> {
+        let val = match layout.backend_repr {
+            BackendRepr::Memory { .. } if layout.is_zst() => OperandValue::ZeroSized,
+            BackendRepr::Scalar(s) => OperandValue::Immediate(Err(s)),
+            BackendRepr::ScalarPair(a, b) => OperandValue::Pair(Err(a), Err(b)),
+            BackendRepr::Memory { .. } | BackendRepr::SimdVector { .. } => return None,
+        };
+        Some(OperandRef { val, layout })
+    }
+}
+
+impl<'a, 'tcx, V: CodegenObject> OperandRef<'tcx, Result<V, abi::Scalar>> {
+    pub(crate) fn insert_field<Bx: BuilderMethods<'a, 'tcx, Value = V>>(
+        &mut self,
+        bx: &mut Bx,
+        v: VariantIdx,
+        f: FieldIdx,
+        operand: OperandRef<'tcx, V>,
+    ) {
+        let (expect_zst, is_zero_offset) = if let abi::FieldsShape::Primitive = self.layout.fields {
+            // The other branch looking at field layouts ICEs for primitives,
+            // so we need to handle them separately.
+            // Multiple fields is possible for cases such as aggregating
+            // a thin pointer, where the second field is the unit.
+            assert!(!self.layout.is_zst());
+            assert_eq!(v, FIRST_VARIANT);
+            let first_field = f == FieldIdx::ZERO;
+            (!first_field, first_field)
+        } else {
+            let variant_layout = self.layout.for_variant(bx.cx(), v);
+            let field_layout = variant_layout.field(bx.cx(), f.as_usize());
+            let field_offset = variant_layout.fields.offset(f.as_usize());
+            (field_layout.is_zst(), field_offset == Size::ZERO)
+        };
+
+        let mut update = |tgt: &mut Result<V, abi::Scalar>, src, from_scalar| {
+            let from_bty = bx.cx().type_from_scalar(from_scalar);
+            let to_scalar = tgt.unwrap_err();
+            let to_bty = bx.cx().type_from_scalar(to_scalar);
+            let imm = transmute_immediate(bx, src, from_scalar, from_bty, to_scalar, to_bty);
+            *tgt = Ok(imm);
+        };
+
+        match (operand.val, operand.layout.backend_repr) {
+            (OperandValue::ZeroSized, _) if expect_zst => {}
+            (OperandValue::Immediate(v), BackendRepr::Scalar(from_scalar)) => match &mut self.val {
+                OperandValue::Immediate(val @ Err(_)) if is_zero_offset => {
+                    update(val, v, from_scalar);
+                }
+                OperandValue::Pair(fst @ Err(_), _) if is_zero_offset => {
+                    update(fst, v, from_scalar);
+                }
+                OperandValue::Pair(_, snd @ Err(_)) if !is_zero_offset => {
+                    update(snd, v, from_scalar);
+                }
+                _ => bug!("Tried to insert {operand:?} into {v:?}.{f:?} of {self:?}"),
+            },
+            (OperandValue::Pair(a, b), BackendRepr::ScalarPair(from_sa, from_sb)) => {
+                match &mut self.val {
+                    OperandValue::Pair(fst @ Err(_), snd @ Err(_)) => {
+                        update(fst, a, from_sa);
+                        update(snd, b, from_sb);
+                    }
+                    _ => bug!("Tried to insert {operand:?} into {v:?}.{f:?} of {self:?}"),
+                }
+            }
+            _ => bug!("Unsupported operand {operand:?} inserting into {v:?}.{f:?} of {self:?}"),
+        }
+    }
+
+    /// After having set all necessary fields, this converts the
+    /// `OperandValue<Result<V, _>>` (as obtained from [`OperandRef::builder`])
+    /// to the normal `OperandValue<V>`.
+    ///
+    /// ICEs if any required fields were not set.
+    pub fn build(&self) -> OperandRef<'tcx, V> {
+        let OperandRef { val, layout } = *self;
+
+        let unwrap = |r: Result<V, abi::Scalar>| match r {
+            Ok(v) => v,
+            Err(_) => bug!("OperandRef::build called while fields are missing {self:?}"),
+        };
+
+        let val = match val {
+            OperandValue::ZeroSized => OperandValue::ZeroSized,
+            OperandValue::Immediate(v) => OperandValue::Immediate(unwrap(v)),
+            OperandValue::Pair(a, b) => OperandValue::Pair(unwrap(a), unwrap(b)),
+            OperandValue::Ref(_) => bug!(),
+        };
+        OperandRef { val, layout }
+    }
 }
 
 impl<'a, 'tcx, V: CodegenObject> OperandValue<V> {
diff --git a/compiler/rustc_codegen_ssa/src/mir/rvalue.rs b/compiler/rustc_codegen_ssa/src/mir/rvalue.rs
index b62ac89661f..e1d8b7546cf 100644
--- a/compiler/rustc_codegen_ssa/src/mir/rvalue.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/rvalue.rs
@@ -1,7 +1,6 @@
 use std::assert_matches::assert_matches;
 
-use arrayvec::ArrayVec;
-use rustc_abi::{self as abi, FIRST_VARIANT, FieldIdx};
+use rustc_abi::{self as abi, FIRST_VARIANT};
 use rustc_middle::ty::adjustment::PointerCoercion;
 use rustc_middle::ty::layout::{HasTyCtxt, HasTypingEnv, LayoutOf, TyAndLayout};
 use rustc_middle::ty::{self, Instance, Ty, TyCtxt};
@@ -708,38 +707,15 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
 
                 // `rvalue_creates_operand` has arranged that we only get here if
                 // we can build the aggregate immediate from the field immediates.
-                let mut inputs = ArrayVec::<Bx::Value, 2>::new();
-                let mut input_scalars = ArrayVec::<abi::Scalar, 2>::new();
-                for field_idx in layout.fields.index_by_increasing_offset() {
-                    let field_idx = FieldIdx::from_usize(field_idx);
-                    let op = self.codegen_operand(bx, &fields[field_idx]);
-                    let values = op.val.immediates_or_place().left_or_else(|p| {
-                        bug!("Field {field_idx:?} is {p:?} making {layout:?}");
-                    });
-                    let scalars = self.value_kind(op.layout).scalars().unwrap();
-                    assert_eq!(values.len(), scalars.len());
-                    inputs.extend(values);
-                    input_scalars.extend(scalars);
+                let Some(mut builder) = OperandRef::builder(layout) else {
+                    bug!("Cannot use type in operand builder: {layout:?}")
+                };
+                for (field_idx, field) in fields.iter_enumerated() {
+                    let op = self.codegen_operand(bx, field);
+                    builder.insert_field(bx, FIRST_VARIANT, field_idx, op);
                 }
 
-                let output_scalars = self.value_kind(layout).scalars().unwrap();
-                itertools::izip!(&mut inputs, input_scalars, output_scalars).for_each(
-                    |(v, in_s, out_s)| {
-                        if in_s != out_s {
-                            // We have to be really careful about bool here, because
-                            // `(bool,)` stays i1 but `Cell<bool>` becomes i8.
-                            *v = bx.from_immediate(*v);
-                            *v = bx.to_immediate_scalar(*v, out_s);
-                        }
-                    },
-                );
-
-                let val = OperandValue::from_immediates(inputs);
-                assert!(
-                    val.is_expected_variant_for_type(self.cx, layout),
-                    "Made wrong variant {val:?} for type {layout:?}",
-                );
-                OperandRef { val, layout }
+                builder.build()
             }
             mir::Rvalue::ShallowInitBox(ref operand, content_ty) => {
                 let operand = self.codegen_operand(bx, operand);
@@ -1082,10 +1058,10 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
                     mir::AggregateKind::Coroutine(..) | mir::AggregateKind::CoroutineClosure(..) => false,
                 };
                 allowed_kind && {
-                let ty = rvalue.ty(self.mir, self.cx.tcx());
-                let ty = self.monomorphize(ty);
+                    let ty = rvalue.ty(self.mir, self.cx.tcx());
+                    let ty = self.monomorphize(ty);
                     let layout = self.cx.spanned_layout_of(ty, span);
-                    !self.cx.is_backend_ref(layout)
+                    OperandRef::<Bx::Value>::builder(layout).is_some()
                 }
             }
         }
@@ -1129,23 +1105,12 @@ enum OperandValueKind {
     ZeroSized,
 }
 
-impl OperandValueKind {
-    fn scalars(self) -> Option<ArrayVec<abi::Scalar, 2>> {
-        Some(match self {
-            OperandValueKind::ZeroSized => ArrayVec::new(),
-            OperandValueKind::Immediate(a) => ArrayVec::from_iter([a]),
-            OperandValueKind::Pair(a, b) => [a, b].into(),
-            OperandValueKind::Ref => return None,
-        })
-    }
-}
-
 /// Transmutes one of the immediates from an [`OperandValue::Immediate`]
 /// or an [`OperandValue::Pair`] to an immediate of the target type.
 ///
 /// `to_backend_ty` must be the *non*-immediate backend type (so it will be
 /// `i8`, not `i1`, for `bool`-like types.)
-fn transmute_immediate<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>>(
+pub(super) fn transmute_immediate<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>>(
     bx: &mut Bx,
     mut imm: Bx::Value,
     from_scalar: abi::Scalar,
diff --git a/compiler/rustc_codegen_ssa/src/target_features.rs b/compiler/rustc_codegen_ssa/src/target_features.rs
index 6bb3150c1c5..640d197c219 100644
--- a/compiler/rustc_codegen_ssa/src/target_features.rs
+++ b/compiler/rustc_codegen_ssa/src/target_features.rs
@@ -8,6 +8,7 @@ use rustc_hir::def_id::{DefId, LOCAL_CRATE, LocalDefId};
 use rustc_middle::middle::codegen_fn_attrs::TargetFeature;
 use rustc_middle::query::Providers;
 use rustc_middle::ty::TyCtxt;
+use rustc_session::features::StabilityExt;
 use rustc_session::lint::builtin::AARCH64_SOFTFLOAT_NEON;
 use rustc_session::parse::feature_err;
 use rustc_span::{Span, Symbol, sym};
@@ -66,7 +67,7 @@ pub(crate) fn from_target_feature_attr(
 
             // Only allow target features whose feature gates have been enabled
             // and which are permitted to be toggled.
-            if let Err(reason) = stability.toggle_allowed() {
+            if let Err(reason) = stability.is_toggle_permitted(tcx.sess) {
                 tcx.dcx().emit_err(errors::ForbiddenTargetFeatureAttr {
                     span: item.span(),
                     feature,
diff --git a/compiler/rustc_codegen_ssa/src/traits/backend.rs b/compiler/rustc_codegen_ssa/src/traits/backend.rs
index 95bf3b16685..29ec7eb1da3 100644
--- a/compiler/rustc_codegen_ssa/src/traits/backend.rs
+++ b/compiler/rustc_codegen_ssa/src/traits/backend.rs
@@ -74,12 +74,7 @@ pub trait CodegenBackend {
 
     fn provide(&self, _providers: &mut Providers) {}
 
-    fn codegen_crate<'tcx>(
-        &self,
-        tcx: TyCtxt<'tcx>,
-        metadata: EncodedMetadata,
-        need_metadata_module: bool,
-    ) -> Box<dyn Any>;
+    fn codegen_crate<'tcx>(&self, tcx: TyCtxt<'tcx>) -> Box<dyn Any>;
 
     /// This is called on the returned `Box<dyn Any>` from [`codegen_crate`](Self::codegen_crate)
     ///
@@ -94,8 +89,14 @@ pub trait CodegenBackend {
     ) -> (CodegenResults, FxIndexMap<WorkProductId, WorkProduct>);
 
     /// This is called on the returned [`CodegenResults`] from [`join_codegen`](Self::join_codegen).
-    fn link(&self, sess: &Session, codegen_results: CodegenResults, outputs: &OutputFilenames) {
-        link_binary(sess, &ArArchiveBuilderBuilder, codegen_results, outputs);
+    fn link(
+        &self,
+        sess: &Session,
+        codegen_results: CodegenResults,
+        metadata: EncodedMetadata,
+        outputs: &OutputFilenames,
+    ) {
+        link_binary(sess, &ArArchiveBuilderBuilder, codegen_results, metadata, outputs);
     }
 }
 
diff --git a/compiler/rustc_codegen_ssa/src/traits/builder.rs b/compiler/rustc_codegen_ssa/src/traits/builder.rs
index 7f78bc75695..f35f551d590 100644
--- a/compiler/rustc_codegen_ssa/src/traits/builder.rs
+++ b/compiler/rustc_codegen_ssa/src/traits/builder.rs
@@ -23,7 +23,7 @@ use crate::common::{AtomicRmwBinOp, IntPredicate, RealPredicate, Synchronization
 use crate::mir::operand::{OperandRef, OperandValue};
 use crate::mir::place::{PlaceRef, PlaceValue};
 
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
 pub enum OverflowOp {
     Add,
     Sub,
@@ -215,7 +215,7 @@ pub trait BuilderMethods<'a, 'tcx>:
     fn checked_binop(
         &mut self,
         oop: OverflowOp,
-        ty: Ty<'_>,
+        ty: Ty<'tcx>,
         lhs: Self::Value,
         rhs: Self::Value,
     ) -> (Self::Value, Self::Value);
diff --git a/compiler/rustc_codegen_ssa/src/traits/type_.rs b/compiler/rustc_codegen_ssa/src/traits/type_.rs
index c3fc21a9285..dcd9e25b2c9 100644
--- a/compiler/rustc_codegen_ssa/src/traits/type_.rs
+++ b/compiler/rustc_codegen_ssa/src/traits/type_.rs
@@ -1,4 +1,4 @@
-use rustc_abi::{AddressSpace, Float, Integer, Reg};
+use rustc_abi::{AddressSpace, Float, Integer, Primitive, Reg, Scalar};
 use rustc_middle::bug;
 use rustc_middle::ty::Ty;
 use rustc_middle::ty::layout::{HasTyCtxt, HasTypingEnv, TyAndLayout};
@@ -44,10 +44,10 @@ pub trait DerivedTypeCodegenMethods<'tcx>:
     BaseTypeCodegenMethods + MiscCodegenMethods<'tcx> + HasTyCtxt<'tcx> + HasTypingEnv<'tcx>
 {
     fn type_int(&self) -> Self::Type {
-        match &self.sess().target.c_int_width[..] {
-            "16" => self.type_i16(),
-            "32" => self.type_i32(),
-            "64" => self.type_i64(),
+        match &self.sess().target.c_int_width {
+            16 => self.type_i16(),
+            32 => self.type_i32(),
+            64 => self.type_i64(),
             width => bug!("Unsupported c_int_width: {}", width),
         }
     }
@@ -84,6 +84,24 @@ pub trait DerivedTypeCodegenMethods<'tcx>:
     fn type_is_freeze(&self, ty: Ty<'tcx>) -> bool {
         ty.is_freeze(self.tcx(), self.typing_env())
     }
+
+    fn type_from_primitive(&self, p: Primitive) -> Self::Type {
+        use Primitive::*;
+        match p {
+            Int(i, _) => self.type_from_integer(i),
+            Float(f) => self.type_from_float(f),
+            Pointer(address_space) => self.type_ptr_ext(address_space),
+        }
+    }
+
+    fn type_from_scalar(&self, s: Scalar) -> Self::Type {
+        // `MaybeUninit` being `repr(transparent)` somewhat implies that the type
+        // of a scalar has to be the type of its primitive (which is true in LLVM,
+        // where noundef is a parameter attribute or metadata) but if we ever get
+        // a backend where that's no longer true, every use of this will need to
+        // to carefully scrutinized and re-evaluated.
+        self.type_from_primitive(s.primitive())
+    }
 }
 
 impl<'tcx, T> DerivedTypeCodegenMethods<'tcx> for T where
diff --git a/compiler/rustc_const_eval/src/interpret/intrinsics.rs b/compiler/rustc_const_eval/src/interpret/intrinsics.rs
index ab27182c211..96c39c7bb32 100644
--- a/compiler/rustc_const_eval/src/interpret/intrinsics.rs
+++ b/compiler/rustc_const_eval/src/interpret/intrinsics.rs
@@ -120,7 +120,7 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                 self.copy_op(&val, dest)?;
             }
 
-            sym::min_align_of_val | sym::size_of_val => {
+            sym::align_of_val | sym::size_of_val => {
                 // Avoid `deref_pointer` -- this is not a deref, the ptr does not have to be
                 // dereferenceable!
                 let place = self.ref_to_mplace(&self.read_immediate(&args[0])?)?;
@@ -129,7 +129,7 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                     .ok_or_else(|| err_unsup_format!("`extern type` does not have known layout"))?;
 
                 let result = match intrinsic_name {
-                    sym::min_align_of_val => align.bytes(),
+                    sym::align_of_val => align.bytes(),
                     sym::size_of_val => size.bytes(),
                     _ => bug!(),
                 };
@@ -139,13 +139,13 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
 
             sym::needs_drop | sym::type_id | sym::type_name | sym::variant_count => {
                 let gid = GlobalId { instance, promoted: None };
-                let ty = match intrinsic_name {
-                    sym::variant_count => self.tcx.types.usize,
-                    sym::needs_drop => self.tcx.types.bool,
-                    sym::type_id => self.tcx.types.u128,
-                    sym::type_name => Ty::new_static_str(self.tcx.tcx),
-                    _ => bug!(),
-                };
+                let ty = self
+                    .tcx
+                    .fn_sig(instance.def_id())
+                    .instantiate(self.tcx.tcx, instance.args)
+                    .output()
+                    .no_bound_vars()
+                    .unwrap();
                 let val = self
                     .ctfe_query(|tcx| tcx.const_eval_global_id(self.typing_env, gid, tcx.span))?;
                 let val = self.const_val_to_op(val, ty, Some(dest.layout))?;
diff --git a/compiler/rustc_data_structures/src/aligned.rs b/compiler/rustc_data_structures/src/aligned.rs
index a636d09fcae..111740e5509 100644
--- a/compiler/rustc_data_structures/src/aligned.rs
+++ b/compiler/rustc_data_structures/src/aligned.rs
@@ -1,5 +1,7 @@
 use std::ptr::Alignment;
 
+use rustc_serialize::PointeeSized;
+
 /// Returns the ABI-required minimum alignment of a type in bytes.
 ///
 /// This is equivalent to [`align_of`], but also works for some unsized
@@ -17,7 +19,7 @@ pub const fn align_of<T: ?Sized + Aligned>() -> Alignment {
 /// example `[T]` has alignment of `T`.
 ///
 /// [`align_of::<Self>()`]: align_of
-pub unsafe trait Aligned {
+pub unsafe trait Aligned: PointeeSized {
     /// Alignment of `Self`.
     const ALIGN: Alignment;
 }
diff --git a/compiler/rustc_data_structures/src/lib.rs b/compiler/rustc_data_structures/src/lib.rs
index eb3817a80a7..0431182e9e2 100644
--- a/compiler/rustc_data_structures/src/lib.rs
+++ b/compiler/rustc_data_structures/src/lib.rs
@@ -12,6 +12,7 @@
 #![allow(rustc::potential_query_instability)]
 #![cfg_attr(bootstrap, feature(cfg_match))]
 #![cfg_attr(not(bootstrap), feature(cfg_select))]
+#![cfg_attr(not(bootstrap), feature(sized_hierarchy))]
 #![deny(unsafe_op_in_unsafe_fn)]
 #![doc(html_root_url = "https://doc.rust-lang.org/nightly/nightly-rustc/")]
 #![doc(rust_logo)]
@@ -43,6 +44,9 @@ use std::fmt;
 pub use atomic_ref::AtomicRef;
 pub use ena::{snapshot_vec, undo_log, unify};
 pub use rustc_index::static_assert_size;
+// re-exported for `rustc_smir`
+// FIXME(sized_hierarchy): remove with `cfg(bootstrap)`, see `rustc_serialize/src/lib.rs`
+pub use rustc_serialize::PointeeSized;
 
 pub mod aligned;
 pub mod base_n;
diff --git a/compiler/rustc_data_structures/src/marker.rs b/compiler/rustc_data_structures/src/marker.rs
index e0df1b232e1..4846bc997f1 100644
--- a/compiler/rustc_data_structures/src/marker.rs
+++ b/compiler/rustc_data_structures/src/marker.rs
@@ -1,5 +1,7 @@
 use std::alloc::Allocator;
 
+use rustc_serialize::PointeeSized;
+
 #[diagnostic::on_unimplemented(message = "`{Self}` doesn't implement `DynSend`. \
             Add it to `rustc_data_structures::marker` or use `IntoDynSyncSend` if it's already `Send`")]
 // This is an auto trait for types which can be sent across threads if `sync::is_dyn_thread_safe()`
@@ -15,7 +17,7 @@ pub unsafe auto trait DynSend {}
 pub unsafe auto trait DynSync {}
 
 // Same with `Sync` and `Send`.
-unsafe impl<T: DynSync + ?Sized> DynSend for &T {}
+unsafe impl<T: DynSync + ?Sized + PointeeSized> DynSend for &T {}
 
 macro_rules! impls_dyn_send_neg {
     ($([$t1: ty $(where $($generics1: tt)*)?])*) => {
@@ -27,9 +29,9 @@ macro_rules! impls_dyn_send_neg {
 impls_dyn_send_neg!(
     [std::env::Args]
     [std::env::ArgsOs]
-    [*const T where T: ?Sized]
-    [*mut T where T: ?Sized]
-    [std::ptr::NonNull<T> where T: ?Sized]
+    [*const T where T: ?Sized + PointeeSized]
+    [*mut T where T: ?Sized + PointeeSized]
+    [std::ptr::NonNull<T> where T: ?Sized + PointeeSized]
     [std::rc::Rc<T, A> where T: ?Sized, A: Allocator]
     [std::rc::Weak<T, A> where T: ?Sized, A: Allocator]
     [std::sync::MutexGuard<'_, T> where T: ?Sized]
@@ -100,12 +102,12 @@ macro_rules! impls_dyn_sync_neg {
 impls_dyn_sync_neg!(
     [std::env::Args]
     [std::env::ArgsOs]
-    [*const T where T: ?Sized]
-    [*mut T where T: ?Sized]
+    [*const T where T: ?Sized + PointeeSized]
+    [*mut T where T: ?Sized + PointeeSized]
     [std::cell::Cell<T> where T: ?Sized]
     [std::cell::RefCell<T> where T: ?Sized]
     [std::cell::UnsafeCell<T> where T: ?Sized]
-    [std::ptr::NonNull<T> where T: ?Sized]
+    [std::ptr::NonNull<T> where T: ?Sized + PointeeSized]
     [std::rc::Rc<T, A> where T: ?Sized, A: Allocator]
     [std::rc::Weak<T, A> where T: ?Sized, A: Allocator]
     [std::cell::OnceCell<T> where T]
@@ -175,10 +177,10 @@ impl_dyn_sync!(
     [thin_vec::ThinVec<T> where T: DynSync]
 );
 
-pub fn assert_dyn_sync<T: ?Sized + DynSync>() {}
-pub fn assert_dyn_send<T: ?Sized + DynSend>() {}
-pub fn assert_dyn_send_val<T: ?Sized + DynSend>(_t: &T) {}
-pub fn assert_dyn_send_sync_val<T: ?Sized + DynSync + DynSend>(_t: &T) {}
+pub fn assert_dyn_sync<T: ?Sized + PointeeSized + DynSync>() {}
+pub fn assert_dyn_send<T: ?Sized + PointeeSized + DynSend>() {}
+pub fn assert_dyn_send_val<T: ?Sized + PointeeSized + DynSend>(_t: &T) {}
+pub fn assert_dyn_send_sync_val<T: ?Sized + PointeeSized + DynSync + DynSend>(_t: &T) {}
 
 #[derive(Copy, Clone)]
 pub struct FromDyn<T>(T);
@@ -231,10 +233,10 @@ impl<T> std::ops::DerefMut for FromDyn<T> {
 // an instance of `DynSend` and `DynSync`, since the compiler cannot infer
 // it automatically in some cases. (e.g. Box<dyn Send / Sync>)
 #[derive(Copy, Clone)]
-pub struct IntoDynSyncSend<T: ?Sized>(pub T);
+pub struct IntoDynSyncSend<T: ?Sized + PointeeSized>(pub T);
 
-unsafe impl<T: ?Sized + Send> DynSend for IntoDynSyncSend<T> {}
-unsafe impl<T: ?Sized + Sync> DynSync for IntoDynSyncSend<T> {}
+unsafe impl<T: ?Sized + PointeeSized + Send> DynSend for IntoDynSyncSend<T> {}
+unsafe impl<T: ?Sized + PointeeSized + Sync> DynSync for IntoDynSyncSend<T> {}
 
 impl<T> std::ops::Deref for IntoDynSyncSend<T> {
     type Target = T;
diff --git a/compiler/rustc_data_structures/src/thousands/mod.rs b/compiler/rustc_data_structures/src/thousands/mod.rs
index e7ab7ec2932..b251ebe58f6 100644
--- a/compiler/rustc_data_structures/src/thousands/mod.rs
+++ b/compiler/rustc_data_structures/src/thousands/mod.rs
@@ -1,16 +1,37 @@
-//! This is an extremely bare-bones alternative to the `thousands` crate on
-//! crates.io, for printing large numbers in a readable fashion.
+//! This is a bare-bones alternative to the `thousands` crate on crates.io, for
+//! printing large numbers in a readable fashion.
 
 #[cfg(test)]
 mod tests;
 
-// Converts the number to a string, with underscores as the thousands separator.
-pub fn format_with_underscores(n: usize) -> String {
-    let mut s = n.to_string();
-    let mut i = s.len();
-    while i > 3 {
+fn format_with_underscores(mut s: String) -> String {
+    // Ignore a leading '-'.
+    let start = if s.starts_with('-') { 1 } else { 0 };
+
+    // Stop after the first non-digit, e.g. '.' or 'e' for floats.
+    let non_digit = s[start..].find(|c: char| !c.is_digit(10));
+    let end = if let Some(non_digit) = non_digit { start + non_digit } else { s.len() };
+
+    // Insert underscores within `start..end`.
+    let mut i = end;
+    while i > start + 3 {
         i -= 3;
         s.insert(i, '_');
     }
     s
 }
+
+/// Print a `usize` with underscore separators.
+pub fn usize_with_underscores(n: usize) -> String {
+    format_with_underscores(format!("{n}"))
+}
+
+/// Print an `isize` with underscore separators.
+pub fn isize_with_underscores(n: isize) -> String {
+    format_with_underscores(format!("{n}"))
+}
+
+/// Print an `f64` with precision 1 (one decimal place) and underscore separators.
+pub fn f64p1_with_underscores(n: f64) -> String {
+    format_with_underscores(format!("{n:.1}"))
+}
diff --git a/compiler/rustc_data_structures/src/thousands/tests.rs b/compiler/rustc_data_structures/src/thousands/tests.rs
index 906605d9a93..0f9a648802b 100644
--- a/compiler/rustc_data_structures/src/thousands/tests.rs
+++ b/compiler/rustc_data_structures/src/thousands/tests.rs
@@ -2,13 +2,51 @@ use super::*;
 
 #[test]
 fn test_format_with_underscores() {
-    assert_eq!("0", format_with_underscores(0));
-    assert_eq!("1", format_with_underscores(1));
-    assert_eq!("99", format_with_underscores(99));
-    assert_eq!("345", format_with_underscores(345));
-    assert_eq!("1_000", format_with_underscores(1_000));
-    assert_eq!("12_001", format_with_underscores(12_001));
-    assert_eq!("999_999", format_with_underscores(999_999));
-    assert_eq!("1_000_000", format_with_underscores(1_000_000));
-    assert_eq!("12_345_678", format_with_underscores(12_345_678));
+    assert_eq!("", format_with_underscores("".to_string()));
+    assert_eq!("0", format_with_underscores("0".to_string()));
+    assert_eq!("12_345.67e14", format_with_underscores("12345.67e14".to_string()));
+    assert_eq!("-1_234.5678e10", format_with_underscores("-1234.5678e10".to_string()));
+    assert_eq!("------", format_with_underscores("------".to_string()));
+    assert_eq!("abcdefgh", format_with_underscores("abcdefgh".to_string()));
+    assert_eq!("-1b", format_with_underscores("-1b".to_string()));
+    assert_eq!("-3_456xyz", format_with_underscores("-3456xyz".to_string()));
+}
+
+#[test]
+fn test_usize_with_underscores() {
+    assert_eq!("0", usize_with_underscores(0));
+    assert_eq!("1", usize_with_underscores(1));
+    assert_eq!("99", usize_with_underscores(99));
+    assert_eq!("345", usize_with_underscores(345));
+    assert_eq!("1_000", usize_with_underscores(1_000));
+    assert_eq!("12_001", usize_with_underscores(12_001));
+    assert_eq!("999_999", usize_with_underscores(999_999));
+    assert_eq!("1_000_000", usize_with_underscores(1_000_000));
+    assert_eq!("12_345_678", usize_with_underscores(12_345_678));
+}
+
+#[test]
+fn test_isize_with_underscores() {
+    assert_eq!("0", isize_with_underscores(0));
+    assert_eq!("-1", isize_with_underscores(-1));
+    assert_eq!("99", isize_with_underscores(99));
+    assert_eq!("345", isize_with_underscores(345));
+    assert_eq!("-1_000", isize_with_underscores(-1_000));
+    assert_eq!("12_001", isize_with_underscores(12_001));
+    assert_eq!("-999_999", isize_with_underscores(-999_999));
+    assert_eq!("1_000_000", isize_with_underscores(1_000_000));
+    assert_eq!("-12_345_678", isize_with_underscores(-12_345_678));
+}
+
+#[test]
+fn test_f64p1_with_underscores() {
+    assert_eq!("0.0", f64p1_with_underscores(0f64));
+    assert_eq!("0.0", f64p1_with_underscores(0.00000001));
+    assert_eq!("-0.0", f64p1_with_underscores(-0.00000001));
+    assert_eq!("1.0", f64p1_with_underscores(0.9999999));
+    assert_eq!("-1.0", f64p1_with_underscores(-0.9999999));
+    assert_eq!("345.5", f64p1_with_underscores(345.4999999));
+    assert_eq!("-100_000.0", f64p1_with_underscores(-100_000f64));
+    assert_eq!("123_456_789.1", f64p1_with_underscores(123456789.123456789));
+    assert_eq!("-123_456_789.1", f64p1_with_underscores(-123456789.123456789));
 }
diff --git a/compiler/rustc_driver_impl/src/lib.rs b/compiler/rustc_driver_impl/src/lib.rs
index 54a331a4904..d53126d0414 100644
--- a/compiler/rustc_driver_impl/src/lib.rs
+++ b/compiler/rustc_driver_impl/src/lib.rs
@@ -557,27 +557,34 @@ fn process_rlink(sess: &Session, compiler: &interface::Compiler) {
         let rlink_data = fs::read(file).unwrap_or_else(|err| {
             dcx.emit_fatal(RlinkUnableToRead { err });
         });
-        let (codegen_results, outputs) = match CodegenResults::deserialize_rlink(sess, rlink_data) {
-            Ok((codegen, outputs)) => (codegen, outputs),
-            Err(err) => {
-                match err {
-                    CodegenErrors::WrongFileType => dcx.emit_fatal(RLinkWrongFileType),
-                    CodegenErrors::EmptyVersionNumber => dcx.emit_fatal(RLinkEmptyVersionNumber),
-                    CodegenErrors::EncodingVersionMismatch { version_array, rlink_version } => dcx
-                        .emit_fatal(RLinkEncodingVersionMismatch { version_array, rlink_version }),
-                    CodegenErrors::RustcVersionMismatch { rustc_version } => {
-                        dcx.emit_fatal(RLinkRustcVersionMismatch {
-                            rustc_version,
-                            current_version: sess.cfg_version,
-                        })
-                    }
-                    CodegenErrors::CorruptFile => {
-                        dcx.emit_fatal(RlinkCorruptFile { file });
-                    }
-                };
-            }
-        };
-        compiler.codegen_backend.link(sess, codegen_results, &outputs);
+        let (codegen_results, metadata, outputs) =
+            match CodegenResults::deserialize_rlink(sess, rlink_data) {
+                Ok((codegen, metadata, outputs)) => (codegen, metadata, outputs),
+                Err(err) => {
+                    match err {
+                        CodegenErrors::WrongFileType => dcx.emit_fatal(RLinkWrongFileType),
+                        CodegenErrors::EmptyVersionNumber => {
+                            dcx.emit_fatal(RLinkEmptyVersionNumber)
+                        }
+                        CodegenErrors::EncodingVersionMismatch { version_array, rlink_version } => {
+                            dcx.emit_fatal(RLinkEncodingVersionMismatch {
+                                version_array,
+                                rlink_version,
+                            })
+                        }
+                        CodegenErrors::RustcVersionMismatch { rustc_version } => {
+                            dcx.emit_fatal(RLinkRustcVersionMismatch {
+                                rustc_version,
+                                current_version: sess.cfg_version,
+                            })
+                        }
+                        CodegenErrors::CorruptFile => {
+                            dcx.emit_fatal(RlinkCorruptFile { file });
+                        }
+                    };
+                }
+            };
+        compiler.codegen_backend.link(sess, codegen_results, metadata, &outputs);
     } else {
         dcx.emit_fatal(RlinkNotAFile {});
     }
@@ -1500,13 +1507,31 @@ pub fn init_rustc_env_logger(early_dcx: &EarlyDiagCtxt) {
 
 /// This allows tools to enable rust logging without having to magically match rustc's
 /// tracing crate version. In contrast to `init_rustc_env_logger` it allows you to choose
-/// the values directly rather than having to set an environment variable.
+/// the logger config directly rather than having to set an environment variable.
 pub fn init_logger(early_dcx: &EarlyDiagCtxt, cfg: rustc_log::LoggerConfig) {
     if let Err(error) = rustc_log::init_logger(cfg) {
         early_dcx.early_fatal(error.to_string());
     }
 }
 
+/// This allows tools to enable rust logging without having to magically match rustc's
+/// tracing crate version. In contrast to `init_rustc_env_logger`, it allows you to
+/// choose the logger config directly rather than having to set an environment variable.
+/// Moreover, in contrast to `init_logger`, it allows you to add a custom tracing layer
+/// via `build_subscriber`, for example `|| Registry::default().with(custom_layer)`.
+pub fn init_logger_with_additional_layer<F, T>(
+    early_dcx: &EarlyDiagCtxt,
+    cfg: rustc_log::LoggerConfig,
+    build_subscriber: F,
+) where
+    F: FnOnce() -> T,
+    T: rustc_log::BuildSubscriberRet,
+{
+    if let Err(error) = rustc_log::init_logger_with_additional_layer(cfg, build_subscriber) {
+        early_dcx.early_fatal(error.to_string());
+    }
+}
+
 /// Install our usual `ctrlc` handler, which sets [`rustc_const_eval::CTRL_C_RECEIVED`].
 /// Making this handler optional lets tools can install a different handler, if they wish.
 pub fn install_ctrlc_handler() {
diff --git a/compiler/rustc_error_codes/src/error_codes/E0534.md b/compiler/rustc_error_codes/src/error_codes/E0534.md
index 1ca9411b8d4..023c38c730c 100644
--- a/compiler/rustc_error_codes/src/error_codes/E0534.md
+++ b/compiler/rustc_error_codes/src/error_codes/E0534.md
@@ -1,8 +1,14 @@
+#### Note: this error code is no longer emitted by the compiler
+
+This is because it was too specific to the `inline` attribute.
+Similar diagnostics occur for other attributes too.
+The example here will now emit `E0805`
+
 The `inline` attribute was malformed.
 
 Erroneous code example:
 
-```compile_fail,E0534
+```compile_fail,E0805
 #[inline()] // error: expected one argument
 pub fn something() {}
 
diff --git a/compiler/rustc_error_codes/src/error_codes/E0535.md b/compiler/rustc_error_codes/src/error_codes/E0535.md
index 0cf3118b02c..93e2ba53826 100644
--- a/compiler/rustc_error_codes/src/error_codes/E0535.md
+++ b/compiler/rustc_error_codes/src/error_codes/E0535.md
@@ -1,8 +1,13 @@
-An unknown argument was given to the `inline` attribute.
+#### Note: this error code is no longer emitted by the compiler
+
+This is because it was too specific to the `inline` attribute.
+Similar diagnostics occur for other attributes too.
+The example here will now emit `E0539`
+
 
 Erroneous code example:
 
-```compile_fail,E0535
+```compile_fail,E0539
 #[inline(unknown)] // error: invalid argument
 pub fn something() {}
 
diff --git a/compiler/rustc_error_codes/src/error_codes/E0539.md b/compiler/rustc_error_codes/src/error_codes/E0539.md
index 6b2e23ba2d8..c76b60ac108 100644
--- a/compiler/rustc_error_codes/src/error_codes/E0539.md
+++ b/compiler/rustc_error_codes/src/error_codes/E0539.md
@@ -24,8 +24,7 @@ struct Stable;
 const fn stable_fn() {}
 ```
 
-Meta items are the key-value pairs inside of an attribute.
-To fix these issues you need to give required key-value pairs.
+To fix the above example, you can write the following:
 
 ```
 #![feature(staged_api)]
@@ -49,3 +48,29 @@ struct Stable;
 #[rustc_const_stable(feature = "stable_fn", since = "1.39.0")] // ok!
 const fn stable_fn() {}
 ```
+
+Several causes of this are,
+an attribute may have expected you to give a list but you gave a
+`name = value` pair:
+
+```compile_fail,E0539
+// wrong, should be `#[repr(C)]`
+#[repr = "C"]
+struct Foo {}
+```
+
+Or a `name = value` pair, but you gave a list:
+
+```compile_fail,E0539
+// wrong, should be `note = "reason"`
+#[deprecated(since = "1.0.0", note("reason"))]
+struct Foo {}
+```
+
+Or it expected some specific word but you gave an unexpected one:
+
+```compile_fail,E0539
+// should be `always` or `never`
+#[inline(maybe_if_you_feel_like_it)]
+fn foo() {}
+```
diff --git a/compiler/rustc_error_codes/src/error_codes/E0565.md b/compiler/rustc_error_codes/src/error_codes/E0565.md
index d5bba941c1d..34152eb7cfe 100644
--- a/compiler/rustc_error_codes/src/error_codes/E0565.md
+++ b/compiler/rustc_error_codes/src/error_codes/E0565.md
@@ -9,10 +9,9 @@ struct Repr {}
 fn main() {}
 ```
 
-Literals in attributes are new and largely unsupported in built-in attributes.
-Work to support literals where appropriate is ongoing. Try using an unquoted
-name instead:
-
+Not all attributes support literals in their input,
+and in some cases they expect an identifier instead.
+That would be the solution in the case of `repr`:
 ```
 #[repr(C)] // ok!
 struct Repr {}
diff --git a/compiler/rustc_error_codes/src/error_codes/E0805.md b/compiler/rustc_error_codes/src/error_codes/E0805.md
new file mode 100644
index 00000000000..b1ed3a11d48
--- /dev/null
+++ b/compiler/rustc_error_codes/src/error_codes/E0805.md
@@ -0,0 +1,26 @@
+An attribute was given an invalid number of arguments
+
+Erroneous code example:
+
+```compile_fail,E0805
+#[inline()] // error! should either have a single argument, or no parentheses
+fn foo() {}
+
+#[inline(always, never)] // error! should have only one argument, not two
+fn bar() {}
+```
+
+To fix this, either give the right number of arguments the attribute needs.
+In the case of inline, this could be none at all:
+
+```
+#[inline]
+fn foo() {}
+```
+
+or only one:
+
+```
+#[inline(always)]
+fn foo() {}
+```
diff --git a/compiler/rustc_error_codes/src/lib.rs b/compiler/rustc_error_codes/src/lib.rs
index 2488d870899..6f5e4829802 100644
--- a/compiler/rustc_error_codes/src/lib.rs
+++ b/compiler/rustc_error_codes/src/lib.rs
@@ -547,6 +547,7 @@ E0801: 0801,
 E0802: 0802,
 E0803: 0803,
 E0804: 0804,
+E0805: 0805,
         );
     )
 }
diff --git a/compiler/rustc_errors/src/emitter.rs b/compiler/rustc_errors/src/emitter.rs
index fe01e289334..6ab6f96079e 100644
--- a/compiler/rustc_errors/src/emitter.rs
+++ b/compiler/rustc_errors/src/emitter.rs
@@ -34,6 +34,7 @@ use crate::snippet::{
     Annotation, AnnotationColumn, AnnotationType, Line, MultilineAnnotation, Style, StyledString,
 };
 use crate::styled_buffer::StyledBuffer;
+use crate::timings::TimingRecord;
 use crate::translation::{Translate, to_fluent_args};
 use crate::{
     CodeSuggestion, DiagInner, DiagMessage, ErrCode, FluentBundle, LazyFallbackBundle, Level,
@@ -164,11 +165,16 @@ impl Margin {
     }
 }
 
+pub enum TimingEvent {
+    Start,
+    End,
+}
+
 const ANONYMIZED_LINE_NUM: &str = "LL";
 
 pub type DynEmitter = dyn Emitter + DynSend;
 
-/// Emitter trait for emitting errors.
+/// Emitter trait for emitting errors and other structured information.
 pub trait Emitter: Translate {
     /// Emit a structured diagnostic.
     fn emit_diagnostic(&mut self, diag: DiagInner, registry: &Registry);
@@ -177,6 +183,10 @@ pub trait Emitter: Translate {
     /// Currently only supported for the JSON format.
     fn emit_artifact_notification(&mut self, _path: &Path, _artifact_type: &str) {}
 
+    /// Emit a timestamp with start/end of a timing section.
+    /// Currently only supported for the JSON format.
+    fn emit_timing_section(&mut self, _record: TimingRecord, _event: TimingEvent) {}
+
     /// Emit a report about future breakage.
     /// Currently only supported for the JSON format.
     fn emit_future_breakage_report(&mut self, _diags: Vec<DiagInner>, _registry: &Registry) {}
diff --git a/compiler/rustc_errors/src/json.rs b/compiler/rustc_errors/src/json.rs
index a6583407b7e..d67e2ba2d60 100644
--- a/compiler/rustc_errors/src/json.rs
+++ b/compiler/rustc_errors/src/json.rs
@@ -28,9 +28,10 @@ use termcolor::{ColorSpec, WriteColor};
 use crate::diagnostic::IsLint;
 use crate::emitter::{
     ColorConfig, Destination, Emitter, HumanEmitter, HumanReadableErrorType, OutputTheme,
-    should_show_source_code,
+    TimingEvent, should_show_source_code,
 };
 use crate::registry::Registry;
+use crate::timings::{TimingRecord, TimingSection};
 use crate::translation::{Translate, to_fluent_args};
 use crate::{
     CodeSuggestion, FluentBundle, LazyFallbackBundle, MultiSpan, SpanLabel, Subdiag, Suggestions,
@@ -104,6 +105,7 @@ impl JsonEmitter {
 enum EmitTyped<'a> {
     Diagnostic(Diagnostic),
     Artifact(ArtifactNotification<'a>),
+    SectionTiming(SectionTimestamp<'a>),
     FutureIncompat(FutureIncompatReport<'a>),
     UnusedExtern(UnusedExterns<'a>),
 }
@@ -135,6 +137,21 @@ impl Emitter for JsonEmitter {
         }
     }
 
+    fn emit_timing_section(&mut self, record: TimingRecord, event: TimingEvent) {
+        let event = match event {
+            TimingEvent::Start => "start",
+            TimingEvent::End => "end",
+        };
+        let name = match record.section {
+            TimingSection::Linking => "link",
+        };
+        let data = SectionTimestamp { name, event, timestamp: record.timestamp };
+        let result = self.emit(EmitTyped::SectionTiming(data));
+        if let Err(e) = result {
+            panic!("failed to print timing section: {e:?}");
+        }
+    }
+
     fn emit_future_breakage_report(&mut self, diags: Vec<crate::DiagInner>, registry: &Registry) {
         let data: Vec<FutureBreakageItem<'_>> = diags
             .into_iter()
@@ -264,6 +281,16 @@ struct ArtifactNotification<'a> {
 }
 
 #[derive(Serialize)]
+struct SectionTimestamp<'a> {
+    /// Name of the section
+    name: &'a str,
+    /// Start/end of the section
+    event: &'a str,
+    /// Opaque timestamp.
+    timestamp: u128,
+}
+
+#[derive(Serialize)]
 struct FutureBreakageItem<'a> {
     // Always EmitTyped::Diagnostic, but we want to make sure it gets serialized
     // with "$message_type".
diff --git a/compiler/rustc_errors/src/lib.rs b/compiler/rustc_errors/src/lib.rs
index 133bd361ee7..0bd259366de 100644
--- a/compiler/rustc_errors/src/lib.rs
+++ b/compiler/rustc_errors/src/lib.rs
@@ -7,6 +7,7 @@
 #![allow(internal_features)]
 #![allow(rustc::diagnostic_outside_of_impl)]
 #![allow(rustc::untranslatable_diagnostic)]
+#![cfg_attr(not(bootstrap), allow(rustc::direct_use_of_rustc_type_ir))]
 #![doc(html_root_url = "https://doc.rust-lang.org/nightly/nightly-rustc/")]
 #![doc(rust_logo)]
 #![feature(array_windows)]
@@ -60,8 +61,9 @@ pub use rustc_error_messages::{
     SubdiagMessage, fallback_fluent_bundle, fluent_bundle,
 };
 use rustc_hashes::Hash128;
-use rustc_lint_defs::LintExpectationId;
+use rustc_hir::HirId;
 pub use rustc_lint_defs::{Applicability, listify, pluralize};
+use rustc_lint_defs::{Lint, LintExpectationId};
 use rustc_macros::{Decodable, Encodable};
 pub use rustc_span::ErrorGuaranteed;
 pub use rustc_span::fatal_error::{FatalError, FatalErrorMarker};
@@ -73,7 +75,9 @@ pub use snippet::Style;
 pub use termcolor::{Color, ColorSpec, WriteColor};
 use tracing::debug;
 
+use crate::emitter::TimingEvent;
 use crate::registry::Registry;
+use crate::timings::TimingRecord;
 
 pub mod annotate_snippet_emitter_writer;
 pub mod codes;
@@ -89,6 +93,7 @@ mod snippet;
 mod styled_buffer;
 #[cfg(test)]
 mod tests;
+pub mod timings;
 pub mod translation;
 
 pub type PResult<'a, T> = Result<T, Diag<'a>>;
@@ -101,6 +106,19 @@ rustc_data_structures::static_assert_size!(PResult<'_, ()>, 24);
 #[cfg(target_pointer_width = "64")]
 rustc_data_structures::static_assert_size!(PResult<'_, bool>, 24);
 
+/// Used to avoid depending on `rustc_middle` in `rustc_attr_parsing`.
+/// Always the `TyCtxt`.
+pub trait LintEmitter: Copy {
+    #[track_caller]
+    fn emit_node_span_lint(
+        self,
+        lint: &'static Lint,
+        hir_id: HirId,
+        span: impl Into<MultiSpan>,
+        decorator: impl for<'a> LintDiagnostic<'a, ()>,
+    );
+}
+
 #[derive(Debug, PartialEq, Eq, Clone, Copy, Hash, Encodable, Decodable)]
 pub enum SuggestionStyle {
     /// Hide the suggested code when displaying this suggestion inline.
@@ -1142,6 +1160,14 @@ impl<'a> DiagCtxtHandle<'a> {
         self.inner.borrow_mut().emitter.emit_artifact_notification(path, artifact_type);
     }
 
+    pub fn emit_timing_section_start(&self, record: TimingRecord) {
+        self.inner.borrow_mut().emitter.emit_timing_section(record, TimingEvent::Start);
+    }
+
+    pub fn emit_timing_section_end(&self, record: TimingRecord) {
+        self.inner.borrow_mut().emitter.emit_timing_section(record, TimingEvent::End);
+    }
+
     pub fn emit_future_breakage_report(&self) {
         let inner = &mut *self.inner.borrow_mut();
         let diags = std::mem::take(&mut inner.future_breakage_diagnostics);
diff --git a/compiler/rustc_errors/src/timings.rs b/compiler/rustc_errors/src/timings.rs
new file mode 100644
index 00000000000..27fc9df8d79
--- /dev/null
+++ b/compiler/rustc_errors/src/timings.rs
@@ -0,0 +1,80 @@
+use std::time::Instant;
+
+use crate::DiagCtxtHandle;
+
+/// A high-level section of the compilation process.
+#[derive(Copy, Clone, Debug)]
+pub enum TimingSection {
+    /// Time spent linking.
+    Linking,
+}
+
+/// Section with attached timestamp
+#[derive(Copy, Clone, Debug)]
+pub struct TimingRecord {
+    pub section: TimingSection,
+    /// Microseconds elapsed since some predetermined point in time (~start of the rustc process).
+    pub timestamp: u128,
+}
+
+impl TimingRecord {
+    fn from_origin(origin: Instant, section: TimingSection) -> Self {
+        Self { section, timestamp: Instant::now().duration_since(origin).as_micros() }
+    }
+
+    pub fn section(&self) -> TimingSection {
+        self.section
+    }
+
+    pub fn timestamp(&self) -> u128 {
+        self.timestamp
+    }
+}
+
+/// Manages emission of start/end section timings, enabled through `--json=timings`.
+pub struct TimingSectionHandler {
+    /// Time when the compilation session started.
+    /// If `None`, timing is disabled.
+    origin: Option<Instant>,
+}
+
+impl TimingSectionHandler {
+    pub fn new(enabled: bool) -> Self {
+        let origin = if enabled { Some(Instant::now()) } else { None };
+        Self { origin }
+    }
+
+    /// Returns a RAII guard that will immediately emit a start the provided section, and then emit
+    /// its end when it is dropped.
+    pub fn start_section<'a>(
+        &self,
+        diag_ctxt: DiagCtxtHandle<'a>,
+        section: TimingSection,
+    ) -> TimingSectionGuard<'a> {
+        TimingSectionGuard::create(diag_ctxt, section, self.origin)
+    }
+}
+
+/// RAII wrapper for starting and ending section timings.
+pub struct TimingSectionGuard<'a> {
+    dcx: DiagCtxtHandle<'a>,
+    section: TimingSection,
+    origin: Option<Instant>,
+}
+
+impl<'a> TimingSectionGuard<'a> {
+    fn create(dcx: DiagCtxtHandle<'a>, section: TimingSection, origin: Option<Instant>) -> Self {
+        if let Some(origin) = origin {
+            dcx.emit_timing_section_start(TimingRecord::from_origin(origin, section));
+        }
+        Self { dcx, section, origin }
+    }
+}
+
+impl<'a> Drop for TimingSectionGuard<'a> {
+    fn drop(&mut self) {
+        if let Some(origin) = self.origin {
+            self.dcx.emit_timing_section_end(TimingRecord::from_origin(origin, self.section));
+        }
+    }
+}
diff --git a/compiler/rustc_expand/messages.ftl b/compiler/rustc_expand/messages.ftl
index 08b7a362083..8b7c47dad99 100644
--- a/compiler/rustc_expand/messages.ftl
+++ b/compiler/rustc_expand/messages.ftl
@@ -113,7 +113,7 @@ expand_meta_var_expr_unrecognized_var =
     variable `{$key}` is not recognized in meta-variable expression
 
 expand_missing_fragment_specifier = missing fragment specifier
-    .note = fragment specifiers must be specified in the 2024 edition
+    .note = fragment specifiers must be provided
     .suggestion_add_fragspec = try adding a specifier here
     .valid = {$valid}
 
diff --git a/compiler/rustc_expand/src/base.rs b/compiler/rustc_expand/src/base.rs
index c7b975d8f3e..7a29f8c9fbd 100644
--- a/compiler/rustc_expand/src/base.rs
+++ b/compiler/rustc_expand/src/base.rs
@@ -12,7 +12,7 @@ use rustc_ast::tokenstream::TokenStream;
 use rustc_ast::visit::{AssocCtxt, Visitor};
 use rustc_ast::{self as ast, AttrVec, Attribute, HasAttrs, Item, NodeId, PatKind};
 use rustc_attr_data_structures::{AttributeKind, Deprecation, Stability, find_attr};
-use rustc_data_structures::fx::FxIndexMap;
+use rustc_data_structures::fx::{FxHashMap, FxIndexMap};
 use rustc_data_structures::sync;
 use rustc_errors::{DiagCtxtHandle, ErrorGuaranteed, PResult};
 use rustc_feature::Features;
@@ -35,6 +35,7 @@ use crate::base::ast::MetaItemInner;
 use crate::errors;
 use crate::expand::{self, AstFragment, Invocation};
 use crate::module::DirOwnership;
+use crate::stats::MacroStat;
 
 // When adding new variants, make sure to
 // adjust the `visit_*` / `flat_map_*` calls in `InvocationCollector`
@@ -727,6 +728,7 @@ pub enum SyntaxExtensionKind {
     /// A trivial attribute "macro" that does nothing,
     /// only keeps the attribute and marks it as inert,
     /// thus making it ineligible for further expansion.
+    /// E.g. `#[default]`, `#[rustfmt::skip]`.
     NonMacroAttr,
 
     /// A token-based derive macro.
@@ -1189,6 +1191,8 @@ pub struct ExtCtxt<'a> {
     /// in the AST, but insert it here so that we know
     /// not to expand it again.
     pub(super) expanded_inert_attrs: MarkedAttrs,
+    /// `-Zmacro-stats` data.
+    pub macro_stats: FxHashMap<(Symbol, MacroKind), MacroStat>,
 }
 
 impl<'a> ExtCtxt<'a> {
@@ -1218,6 +1222,7 @@ impl<'a> ExtCtxt<'a> {
             expansions: FxIndexMap::default(),
             expanded_inert_attrs: MarkedAttrs::new(),
             buffered_early_lint: vec![],
+            macro_stats: Default::default(),
         }
     }
 
diff --git a/compiler/rustc_expand/src/expand.rs b/compiler/rustc_expand/src/expand.rs
index 569165a64e5..9fd524ef45c 100644
--- a/compiler/rustc_expand/src/expand.rs
+++ b/compiler/rustc_expand/src/expand.rs
@@ -42,13 +42,22 @@ use crate::module::{
     DirOwnership, ParsedExternalMod, mod_dir_path, mod_file_path_from_attr, parse_external_mod,
 };
 use crate::placeholders::{PlaceholderExpander, placeholder};
+use crate::stats::*;
 
 macro_rules! ast_fragments {
     (
         $($Kind:ident($AstTy:ty) {
             $kind_name:expr;
-            $(one fn $mut_visit_ast:ident; fn $visit_ast:ident;)?
-            $(many fn $flat_map_ast_elt:ident; fn $visit_ast_elt:ident($($args:tt)*);)?
+            $(one
+                fn $mut_visit_ast:ident;
+                fn $visit_ast:ident;
+                fn $ast_to_string:path;
+            )?
+            $(many
+                fn $flat_map_ast_elt:ident;
+                fn $visit_ast_elt:ident($($args:tt)*);
+                fn $ast_to_string_elt:path;
+            )?
             fn $make_ast:ident;
         })*
     ) => {
@@ -61,7 +70,7 @@ macro_rules! ast_fragments {
         }
 
         /// "Discriminant" of an AST fragment.
-        #[derive(Copy, Clone, PartialEq, Eq)]
+        #[derive(Copy, Clone, Debug, PartialEq, Eq)]
         pub enum AstFragmentKind {
             OptExpr,
             MethodReceiverExpr,
@@ -151,6 +160,21 @@ macro_rules! ast_fragments {
                 }
                 V::Result::output()
             }
+
+            pub(crate) fn to_string(&self) -> String {
+                match self {
+                    AstFragment::OptExpr(Some(expr)) => pprust::expr_to_string(expr),
+                    AstFragment::OptExpr(None) => unreachable!(),
+                    AstFragment::MethodReceiverExpr(expr) => pprust::expr_to_string(expr),
+                    $($(AstFragment::$Kind(ast) => $ast_to_string(ast),)?)*
+                    $($(
+                        AstFragment::$Kind(ast) => {
+                            // The closure unwraps a `P` if present, or does nothing otherwise.
+                            elems_to_string(&*ast, |ast| $ast_to_string_elt(&*ast))
+                        }
+                    )?)*
+                }
+            }
         }
 
         impl<'a> MacResult for crate::mbe::macro_rules::ParserAnyMacro<'a> {
@@ -163,76 +187,98 @@ macro_rules! ast_fragments {
 }
 
 ast_fragments! {
-    Expr(P<ast::Expr>) { "expression"; one fn visit_expr; fn visit_expr; fn make_expr; }
-    Pat(P<ast::Pat>) { "pattern"; one fn visit_pat; fn visit_pat; fn make_pat; }
-    Ty(P<ast::Ty>) { "type"; one fn visit_ty; fn visit_ty; fn make_ty; }
+    Expr(P<ast::Expr>) {
+        "expression";
+        one fn visit_expr; fn visit_expr; fn pprust::expr_to_string;
+        fn make_expr;
+    }
+    Pat(P<ast::Pat>) {
+        "pattern";
+        one fn visit_pat; fn visit_pat; fn pprust::pat_to_string;
+        fn make_pat;
+    }
+    Ty(P<ast::Ty>) {
+        "type";
+        one fn visit_ty; fn visit_ty; fn pprust::ty_to_string;
+        fn make_ty;
+    }
     Stmts(SmallVec<[ast::Stmt; 1]>) {
-        "statement"; many fn flat_map_stmt; fn visit_stmt(); fn make_stmts;
+        "statement";
+        many fn flat_map_stmt; fn visit_stmt(); fn pprust::stmt_to_string;
+        fn make_stmts;
     }
     Items(SmallVec<[P<ast::Item>; 1]>) {
-        "item"; many fn flat_map_item; fn visit_item(); fn make_items;
+        "item";
+        many fn flat_map_item; fn visit_item(); fn pprust::item_to_string;
+        fn make_items;
     }
     TraitItems(SmallVec<[P<ast::AssocItem>; 1]>) {
         "trait item";
-        many fn flat_map_assoc_item;
-        fn visit_assoc_item(AssocCtxt::Trait);
+        many fn flat_map_assoc_item; fn visit_assoc_item(AssocCtxt::Trait);
+            fn pprust::assoc_item_to_string;
         fn make_trait_items;
     }
     ImplItems(SmallVec<[P<ast::AssocItem>; 1]>) {
         "impl item";
-        many fn flat_map_assoc_item;
-        fn visit_assoc_item(AssocCtxt::Impl { of_trait: false });
+        many fn flat_map_assoc_item; fn visit_assoc_item(AssocCtxt::Impl { of_trait: false });
+            fn pprust::assoc_item_to_string;
         fn make_impl_items;
     }
     TraitImplItems(SmallVec<[P<ast::AssocItem>; 1]>) {
         "impl item";
-        many fn flat_map_assoc_item;
-        fn visit_assoc_item(AssocCtxt::Impl { of_trait: true });
+        many fn flat_map_assoc_item; fn visit_assoc_item(AssocCtxt::Impl { of_trait: true });
+            fn pprust::assoc_item_to_string;
         fn make_trait_impl_items;
     }
     ForeignItems(SmallVec<[P<ast::ForeignItem>; 1]>) {
         "foreign item";
-        many fn flat_map_foreign_item;
-        fn visit_foreign_item();
+        many fn flat_map_foreign_item; fn visit_foreign_item(); fn pprust::foreign_item_to_string;
         fn make_foreign_items;
     }
     Arms(SmallVec<[ast::Arm; 1]>) {
-        "match arm"; many fn flat_map_arm; fn visit_arm(); fn make_arms;
+        "match arm";
+        many fn flat_map_arm; fn visit_arm(); fn unreachable_to_string;
+        fn make_arms;
     }
     ExprFields(SmallVec<[ast::ExprField; 1]>) {
-        "field expression"; many fn flat_map_expr_field; fn visit_expr_field(); fn make_expr_fields;
+        "field expression";
+        many fn flat_map_expr_field; fn visit_expr_field(); fn unreachable_to_string;
+        fn make_expr_fields;
     }
     PatFields(SmallVec<[ast::PatField; 1]>) {
         "field pattern";
-        many fn flat_map_pat_field;
-        fn visit_pat_field();
+        many fn flat_map_pat_field; fn visit_pat_field(); fn unreachable_to_string;
         fn make_pat_fields;
     }
     GenericParams(SmallVec<[ast::GenericParam; 1]>) {
         "generic parameter";
-        many fn flat_map_generic_param;
-        fn visit_generic_param();
+        many fn flat_map_generic_param; fn visit_generic_param(); fn unreachable_to_string;
         fn make_generic_params;
     }
     Params(SmallVec<[ast::Param; 1]>) {
-        "function parameter"; many fn flat_map_param; fn visit_param(); fn make_params;
+        "function parameter";
+        many fn flat_map_param; fn visit_param(); fn unreachable_to_string;
+        fn make_params;
     }
     FieldDefs(SmallVec<[ast::FieldDef; 1]>) {
         "field";
-        many fn flat_map_field_def;
-        fn visit_field_def();
+        many fn flat_map_field_def; fn visit_field_def(); fn unreachable_to_string;
         fn make_field_defs;
     }
     Variants(SmallVec<[ast::Variant; 1]>) {
-        "variant"; many fn flat_map_variant; fn visit_variant(); fn make_variants;
+        "variant"; many fn flat_map_variant; fn visit_variant(); fn unreachable_to_string;
+        fn make_variants;
     }
     WherePredicates(SmallVec<[ast::WherePredicate; 1]>) {
         "where predicate";
-        many fn flat_map_where_predicate;
-        fn visit_where_predicate();
+        many fn flat_map_where_predicate; fn visit_where_predicate(); fn unreachable_to_string;
         fn make_where_predicates;
-     }
-    Crate(ast::Crate) { "crate"; one fn visit_crate; fn visit_crate; fn make_crate; }
+    }
+    Crate(ast::Crate) {
+        "crate";
+        one fn visit_crate; fn visit_crate; fn unreachable_to_string;
+        fn make_crate;
+    }
 }
 
 pub enum SupportsMacroExpansion {
@@ -270,7 +316,7 @@ impl AstFragmentKind {
         }
     }
 
-    fn expect_from_annotatables<I: IntoIterator<Item = Annotatable>>(
+    pub(crate) fn expect_from_annotatables<I: IntoIterator<Item = Annotatable>>(
         self,
         items: I,
     ) -> AstFragment {
@@ -686,13 +732,26 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
             return ExpandResult::Ready(invoc.fragment_kind.dummy(invoc.span(), guar));
         }
 
+        let macro_stats = self.cx.sess.opts.unstable_opts.macro_stats;
+
         let (fragment_kind, span) = (invoc.fragment_kind, invoc.span());
         ExpandResult::Ready(match invoc.kind {
             InvocationKind::Bang { mac, span } => match ext {
                 SyntaxExtensionKind::Bang(expander) => {
                     match expander.expand(self.cx, span, mac.args.tokens.clone()) {
                         Ok(tok_result) => {
-                            self.parse_ast_fragment(tok_result, fragment_kind, &mac.path, span)
+                            let fragment =
+                                self.parse_ast_fragment(tok_result, fragment_kind, &mac.path, span);
+                            if macro_stats {
+                                update_bang_macro_stats(
+                                    self.cx,
+                                    fragment_kind,
+                                    span,
+                                    mac,
+                                    &fragment,
+                                );
+                            }
+                            fragment
                         }
                         Err(guar) => return ExpandResult::Ready(fragment_kind.dummy(span, guar)),
                     }
@@ -708,13 +767,15 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
                             });
                         }
                     };
-                    let result = if let Some(result) = fragment_kind.make_from(tok_result) {
-                        result
+                    if let Some(fragment) = fragment_kind.make_from(tok_result) {
+                        if macro_stats {
+                            update_bang_macro_stats(self.cx, fragment_kind, span, mac, &fragment);
+                        }
+                        fragment
                     } else {
                         let guar = self.error_wrong_fragment_kind(fragment_kind, &mac, span);
                         fragment_kind.dummy(span, guar)
-                    };
-                    result
+                    }
                 }
                 _ => unreachable!(),
             },
@@ -746,24 +807,39 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
                         }
                         _ => item.to_tokens(),
                     };
-                    let attr_item = attr.unwrap_normal_item();
+                    let attr_item = attr.get_normal_item();
                     if let AttrArgs::Eq { .. } = attr_item.args {
                         self.cx.dcx().emit_err(UnsupportedKeyValue { span });
                     }
                     let inner_tokens = attr_item.args.inner_tokens();
                     match expander.expand(self.cx, span, inner_tokens, tokens) {
-                        Ok(tok_result) => self.parse_ast_fragment(
-                            tok_result,
-                            fragment_kind,
-                            &attr_item.path,
-                            span,
-                        ),
+                        Ok(tok_result) => {
+                            let fragment = self.parse_ast_fragment(
+                                tok_result,
+                                fragment_kind,
+                                &attr_item.path,
+                                span,
+                            );
+                            if macro_stats {
+                                update_attr_macro_stats(
+                                    self.cx,
+                                    fragment_kind,
+                                    span,
+                                    &attr_item.path,
+                                    &attr,
+                                    item,
+                                    &fragment,
+                                );
+                            }
+                            fragment
+                        }
                         Err(guar) => return ExpandResult::Ready(fragment_kind.dummy(span, guar)),
                     }
                 }
                 SyntaxExtensionKind::LegacyAttr(expander) => {
                     match validate_attr::parse_meta(&self.cx.sess.psess, &attr) {
                         Ok(meta) => {
+                            let item_clone = macro_stats.then(|| item.clone());
                             let items = match expander.expand(self.cx, span, &meta, item, false) {
                                 ExpandResult::Ready(items) => items,
                                 ExpandResult::Retry(item) => {
@@ -782,7 +858,19 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
                                 let guar = self.cx.dcx().emit_err(RemoveExprNotSupported { span });
                                 fragment_kind.dummy(span, guar)
                             } else {
-                                fragment_kind.expect_from_annotatables(items)
+                                let fragment = fragment_kind.expect_from_annotatables(items);
+                                if macro_stats {
+                                    update_attr_macro_stats(
+                                        self.cx,
+                                        fragment_kind,
+                                        span,
+                                        &meta.path,
+                                        &attr,
+                                        item_clone.unwrap(),
+                                        &fragment,
+                                    );
+                                }
+                                fragment
                             }
                         }
                         Err(err) => {
@@ -792,6 +880,7 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
                     }
                 }
                 SyntaxExtensionKind::NonMacroAttr => {
+                    // `-Zmacro-stats` ignores these because they don't do any real expansion.
                     self.cx.expanded_inert_attrs.mark(&attr);
                     item.visit_attrs(|attrs| attrs.insert(pos, attr));
                     fragment_kind.expect_from_annotatables(iter::once(item))
@@ -822,7 +911,17 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
                             });
                         }
                     };
-                    fragment_kind.expect_from_annotatables(items)
+                    let fragment = fragment_kind.expect_from_annotatables(items);
+                    if macro_stats {
+                        update_derive_macro_stats(
+                            self.cx,
+                            fragment_kind,
+                            span,
+                            &meta.path,
+                            &fragment,
+                        );
+                    }
+                    fragment
                 }
                 _ => unreachable!(),
             },
@@ -852,6 +951,7 @@ impl<'a, 'b> MacroExpander<'a, 'b> {
                 let single_delegations = build_single_delegations::<Node>(
                     self.cx, deleg, &item, &suffixes, item.span, true,
                 );
+                // `-Zmacro-stats` ignores these because they don't seem important.
                 fragment_kind.expect_from_annotatables(
                     single_delegations
                         .map(|item| Annotatable::AssocItem(P(item), AssocCtxt::Impl { of_trait })),
@@ -1668,7 +1768,7 @@ impl InvocationCollectorNode for ast::Crate {
     }
 }
 
-impl InvocationCollectorNode for P<ast::Ty> {
+impl InvocationCollectorNode for ast::Ty {
     type OutputTy = P<ast::Ty>;
     const KIND: AstFragmentKind = AstFragmentKind::Ty;
     fn to_annotatable(self) -> Annotatable {
@@ -1691,7 +1791,7 @@ impl InvocationCollectorNode for P<ast::Ty> {
     }
 }
 
-impl InvocationCollectorNode for P<ast::Pat> {
+impl InvocationCollectorNode for ast::Pat {
     type OutputTy = P<ast::Pat>;
     const KIND: AstFragmentKind = AstFragmentKind::Pat;
     fn to_annotatable(self) -> Annotatable {
@@ -1714,11 +1814,11 @@ impl InvocationCollectorNode for P<ast::Pat> {
     }
 }
 
-impl InvocationCollectorNode for P<ast::Expr> {
+impl InvocationCollectorNode for ast::Expr {
     type OutputTy = P<ast::Expr>;
     const KIND: AstFragmentKind = AstFragmentKind::Expr;
     fn to_annotatable(self) -> Annotatable {
-        Annotatable::Expr(self)
+        Annotatable::Expr(P(self))
     }
     fn fragment_to_output(fragment: AstFragment) -> Self::OutputTy {
         fragment.make_expr()
@@ -1855,29 +1955,29 @@ impl DummyAstNode for ast::Crate {
     }
 }
 
-impl DummyAstNode for P<ast::Ty> {
+impl DummyAstNode for ast::Ty {
     fn dummy() -> Self {
-        P(ast::Ty {
+        ast::Ty {
             id: DUMMY_NODE_ID,
             kind: TyKind::Dummy,
             span: Default::default(),
             tokens: Default::default(),
-        })
+        }
     }
 }
 
-impl DummyAstNode for P<ast::Pat> {
+impl DummyAstNode for ast::Pat {
     fn dummy() -> Self {
-        P(ast::Pat {
+        ast::Pat {
             id: DUMMY_NODE_ID,
             kind: PatKind::Wild,
             span: Default::default(),
             tokens: Default::default(),
-        })
+        }
     }
 }
 
-impl DummyAstNode for P<ast::Expr> {
+impl DummyAstNode for ast::Expr {
     fn dummy() -> Self {
         ast::Expr::dummy()
     }
@@ -1885,7 +1985,7 @@ impl DummyAstNode for P<ast::Expr> {
 
 impl DummyAstNode for AstNodeWrapper<P<ast::Expr>, MethodReceiverTag> {
     fn dummy() -> Self {
-        AstNodeWrapper::new(ast::Expr::dummy(), MethodReceiverTag)
+        AstNodeWrapper::new(P(ast::Expr::dummy()), MethodReceiverTag)
     }
 }
 
@@ -2172,7 +2272,7 @@ impl<'a, 'b> InvocationCollector<'a, 'b> {
         }
     }
 
-    fn visit_node<Node: InvocationCollectorNode<OutputTy = Node> + DummyAstNode>(
+    fn visit_node<Node: InvocationCollectorNode<OutputTy: Into<Node>> + DummyAstNode>(
         &mut self,
         node: &mut Node,
     ) {
@@ -2197,6 +2297,7 @@ impl<'a, 'b> InvocationCollector<'a, 'b> {
                         *node = self
                             .collect_attr((attr, pos, derives), n.to_annotatable(), Node::KIND)
                             .make_ast::<Node>()
+                            .into()
                     }
                 },
                 None if node.is_mac_call() => {
@@ -2204,7 +2305,7 @@ impl<'a, 'b> InvocationCollector<'a, 'b> {
                     let (mac, attrs, _) = n.take_mac_call();
                     self.check_attributes(&attrs, &mac);
 
-                    *node = self.collect_bang(mac, Node::KIND).make_ast::<Node>()
+                    *node = self.collect_bang(mac, Node::KIND).make_ast::<Node>().into()
                 }
                 None if node.delegation().is_some() => unreachable!(),
                 None => {
@@ -2314,15 +2415,15 @@ impl<'a, 'b> MutVisitor for InvocationCollector<'a, 'b> {
         self.visit_node(node)
     }
 
-    fn visit_ty(&mut self, node: &mut P<ast::Ty>) {
+    fn visit_ty(&mut self, node: &mut ast::Ty) {
         self.visit_node(node)
     }
 
-    fn visit_pat(&mut self, node: &mut P<ast::Pat>) {
+    fn visit_pat(&mut self, node: &mut ast::Pat) {
         self.visit_node(node)
     }
 
-    fn visit_expr(&mut self, node: &mut P<ast::Expr>) {
+    fn visit_expr(&mut self, node: &mut ast::Expr) {
         // FIXME: Feature gating is performed inconsistently between `Expr` and `OptExpr`.
         if let Some(attr) = node.attrs.first() {
             self.cfg().maybe_emit_expr_attr_err(attr);
diff --git a/compiler/rustc_expand/src/lib.rs b/compiler/rustc_expand/src/lib.rs
index 515d82296ca..64be7649775 100644
--- a/compiler/rustc_expand/src/lib.rs
+++ b/compiler/rustc_expand/src/lib.rs
@@ -20,6 +20,7 @@ mod errors;
 mod mbe;
 mod placeholders;
 mod proc_macro_server;
+mod stats;
 
 pub use mbe::macro_rules::compile_declarative_macro;
 pub mod base;
diff --git a/compiler/rustc_expand/src/mbe/macro_check.rs b/compiler/rustc_expand/src/mbe/macro_check.rs
index 1a2db233b7a..3cd803c3e84 100644
--- a/compiler/rustc_expand/src/mbe/macro_check.rs
+++ b/compiler/rustc_expand/src/mbe/macro_check.rs
@@ -112,9 +112,8 @@ use rustc_ast::{DUMMY_NODE_ID, NodeId};
 use rustc_data_structures::fx::FxHashMap;
 use rustc_errors::MultiSpan;
 use rustc_lint_defs::BuiltinLintDiag;
-use rustc_session::lint::builtin::{META_VARIABLE_MISUSE, MISSING_FRAGMENT_SPECIFIER};
+use rustc_session::lint::builtin::META_VARIABLE_MISUSE;
 use rustc_session::parse::ParseSess;
-use rustc_span::edition::Edition;
 use rustc_span::{ErrorGuaranteed, MacroRulesNormalizedIdent, Span, kw};
 use smallvec::SmallVec;
 
@@ -266,23 +265,11 @@ fn check_binders(
         // Similarly, this can only happen when checking a toplevel macro.
         TokenTree::MetaVarDecl(span, name, kind) => {
             if kind.is_none() && node_id != DUMMY_NODE_ID {
-                // FIXME: Report this as a hard error eventually and remove equivalent errors from
-                // `parse_tt_inner` and `nameize`. Until then the error may be reported twice, once
-                // as a hard error and then once as a buffered lint.
-                if span.edition() >= Edition::Edition2024 {
-                    psess.dcx().emit_err(errors::MissingFragmentSpecifier {
-                        span,
-                        add_span: span.shrink_to_hi(),
-                        valid: VALID_FRAGMENT_NAMES_MSG,
-                    });
-                } else {
-                    psess.buffer_lint(
-                        MISSING_FRAGMENT_SPECIFIER,
-                        span,
-                        node_id,
-                        BuiltinLintDiag::MissingFragmentSpecifier,
-                    );
-                }
+                psess.dcx().emit_err(errors::MissingFragmentSpecifier {
+                    span,
+                    add_span: span.shrink_to_hi(),
+                    valid: VALID_FRAGMENT_NAMES_MSG,
+                });
             }
             if !macros.is_empty() {
                 psess.dcx().span_bug(span, "unexpected MetaVarDecl in nested lhs");
diff --git a/compiler/rustc_expand/src/placeholders.rs b/compiler/rustc_expand/src/placeholders.rs
index 3dcb20c8c76..2c486a02bdf 100644
--- a/compiler/rustc_expand/src/placeholders.rs
+++ b/compiler/rustc_expand/src/placeholders.rs
@@ -332,9 +332,9 @@ impl MutVisitor for PlaceholderExpander {
         }
     }
 
-    fn visit_expr(&mut self, expr: &mut P<ast::Expr>) {
+    fn visit_expr(&mut self, expr: &mut ast::Expr) {
         match expr.kind {
-            ast::ExprKind::MacCall(_) => *expr = self.remove(expr.id).make_expr(),
+            ast::ExprKind::MacCall(_) => *expr = *self.remove(expr.id).make_expr(),
             _ => walk_expr(self, expr),
         }
     }
@@ -399,16 +399,16 @@ impl MutVisitor for PlaceholderExpander {
         stmts
     }
 
-    fn visit_pat(&mut self, pat: &mut P<ast::Pat>) {
+    fn visit_pat(&mut self, pat: &mut ast::Pat) {
         match pat.kind {
-            ast::PatKind::MacCall(_) => *pat = self.remove(pat.id).make_pat(),
+            ast::PatKind::MacCall(_) => *pat = *self.remove(pat.id).make_pat(),
             _ => walk_pat(self, pat),
         }
     }
 
-    fn visit_ty(&mut self, ty: &mut P<ast::Ty>) {
+    fn visit_ty(&mut self, ty: &mut ast::Ty) {
         match ty.kind {
-            ast::TyKind::MacCall(_) => *ty = self.remove(ty.id).make_ty(),
+            ast::TyKind::MacCall(_) => *ty = *self.remove(ty.id).make_ty(),
             _ => walk_ty(self, ty),
         }
     }
diff --git a/compiler/rustc_expand/src/stats.rs b/compiler/rustc_expand/src/stats.rs
new file mode 100644
index 00000000000..6b2ad30dffd
--- /dev/null
+++ b/compiler/rustc_expand/src/stats.rs
@@ -0,0 +1,171 @@
+use std::iter;
+
+use rustc_ast::ptr::P;
+use rustc_ast::{self as ast, DUMMY_NODE_ID, Expr, ExprKind};
+use rustc_ast_pretty::pprust;
+use rustc_span::hygiene::{ExpnKind, MacroKind};
+use rustc_span::{Span, Symbol, kw, sym};
+use smallvec::SmallVec;
+
+use crate::base::{Annotatable, ExtCtxt};
+use crate::expand::{AstFragment, AstFragmentKind};
+
+#[derive(Default)]
+pub struct MacroStat {
+    /// Number of uses of the macro.
+    pub uses: usize,
+
+    /// Net increase in number of lines of code (when pretty-printed), i.e.
+    /// `lines(output) - lines(invocation)`. Can be negative because a macro
+    /// output may be smaller than the invocation.
+    pub lines: isize,
+
+    /// Net increase in number of lines of code (when pretty-printed), i.e.
+    /// `bytes(output) - bytes(invocation)`. Can be negative because a macro
+    /// output may be smaller than the invocation.
+    pub bytes: isize,
+}
+
+pub(crate) fn elems_to_string<T>(elems: &SmallVec<[T; 1]>, f: impl Fn(&T) -> String) -> String {
+    let mut s = String::new();
+    for (i, elem) in elems.iter().enumerate() {
+        if i > 0 {
+            s.push('\n');
+        }
+        s.push_str(&f(elem));
+    }
+    s
+}
+
+pub(crate) fn unreachable_to_string<T>(_: &T) -> String {
+    unreachable!()
+}
+
+pub(crate) fn update_bang_macro_stats(
+    ecx: &mut ExtCtxt<'_>,
+    fragment_kind: AstFragmentKind,
+    span: Span,
+    mac: P<ast::MacCall>,
+    fragment: &AstFragment,
+) {
+    // Does this path match any of the include macros, e.g. `include!`?
+    // Ignore them. They would have large numbers but are entirely
+    // unsurprising and uninteresting.
+    let is_include_path = mac.path == sym::include
+        || mac.path == sym::include_bytes
+        || mac.path == sym::include_str
+        || mac.path == [sym::std, sym::include].as_slice() // std::include
+        || mac.path == [sym::std, sym::include_bytes].as_slice() // std::include_bytes
+        || mac.path == [sym::std, sym::include_str].as_slice(); // std::include_str
+    if is_include_path {
+        return;
+    }
+
+    // The call itself (e.g. `println!("hi")`) is the input. Need to wrap
+    // `mac` in something printable; `ast::Expr` is as good as anything
+    // else.
+    let expr = Expr {
+        id: DUMMY_NODE_ID,
+        kind: ExprKind::MacCall(mac),
+        span: Default::default(),
+        attrs: Default::default(),
+        tokens: None,
+    };
+    let input = pprust::expr_to_string(&expr);
+
+    // Get `mac` back out of `expr`.
+    let ast::Expr { kind: ExprKind::MacCall(mac), .. } = expr else { unreachable!() };
+
+    update_macro_stats(ecx, MacroKind::Bang, fragment_kind, span, &mac.path, &input, fragment);
+}
+
+pub(crate) fn update_attr_macro_stats(
+    ecx: &mut ExtCtxt<'_>,
+    fragment_kind: AstFragmentKind,
+    span: Span,
+    path: &ast::Path,
+    attr: &ast::Attribute,
+    item: Annotatable,
+    fragment: &AstFragment,
+) {
+    // Does this path match `#[derive(...)]` in any of its forms? If so,
+    // ignore it because the individual derives will go through the
+    // `Invocation::Derive` handling separately.
+    let is_derive_path = *path == sym::derive
+        // ::core::prelude::v1::derive
+        || *path == [kw::PathRoot, sym::core, sym::prelude, sym::v1, sym::derive].as_slice();
+    if is_derive_path {
+        return;
+    }
+
+    // The attribute plus the item itself constitute the input, which we
+    // measure.
+    let input = format!(
+        "{}\n{}",
+        pprust::attribute_to_string(attr),
+        fragment_kind.expect_from_annotatables(iter::once(item)).to_string(),
+    );
+    update_macro_stats(ecx, MacroKind::Attr, fragment_kind, span, path, &input, fragment);
+}
+
+pub(crate) fn update_derive_macro_stats(
+    ecx: &mut ExtCtxt<'_>,
+    fragment_kind: AstFragmentKind,
+    span: Span,
+    path: &ast::Path,
+    fragment: &AstFragment,
+) {
+    // Use something like `#[derive(Clone)]` for the measured input, even
+    // though it may have actually appeared in a multi-derive attribute
+    // like `#[derive(Clone, Copy, Debug)]`.
+    let input = format!("#[derive({})]", pprust::path_to_string(path));
+    update_macro_stats(ecx, MacroKind::Derive, fragment_kind, span, path, &input, fragment);
+}
+
+pub(crate) fn update_macro_stats(
+    ecx: &mut ExtCtxt<'_>,
+    macro_kind: MacroKind,
+    fragment_kind: AstFragmentKind,
+    span: Span,
+    path: &ast::Path,
+    input: &str,
+    fragment: &AstFragment,
+) {
+    fn lines_and_bytes(s: &str) -> (usize, usize) {
+        (s.trim_end().split('\n').count(), s.len())
+    }
+
+    // Measure the size of the output by pretty-printing it and counting
+    // the lines and bytes.
+    let name = Symbol::intern(&pprust::path_to_string(path));
+    let output = fragment.to_string();
+    let (in_l, in_b) = lines_and_bytes(input);
+    let (out_l, out_b) = lines_and_bytes(&output);
+
+    // This code is useful for debugging `-Zmacro-stats`. For every
+    // invocation it prints the full input and output.
+    if false {
+        let name = ExpnKind::Macro(macro_kind, name).descr();
+        let crate_name = &ecx.ecfg.crate_name;
+        let span = ecx
+            .sess
+            .source_map()
+            .span_to_string(span, rustc_span::FileNameDisplayPreference::Local);
+        eprint!(
+            "\
+            -------------------------------\n\
+            {name}: [{crate_name}] ({fragment_kind:?}) {span}\n\
+            -------------------------------\n\
+            {input}\n\
+            -- ({in_l} lines, {in_b} bytes) --> ({out_l} lines, {out_b} bytes) --\n\
+            {output}\n\
+        "
+        );
+    }
+
+    // The recorded size is the difference between the input and the output.
+    let entry = ecx.macro_stats.entry((name, macro_kind)).or_insert(MacroStat::default());
+    entry.uses += 1;
+    entry.lines += out_l as isize - in_l as isize;
+    entry.bytes += out_b as isize - in_b as isize;
+}
diff --git a/compiler/rustc_feature/src/accepted.rs b/compiler/rustc_feature/src/accepted.rs
index b1c185220f4..cfe0f4e5d6c 100644
--- a/compiler/rustc_feature/src/accepted.rs
+++ b/compiler/rustc_feature/src/accepted.rs
@@ -220,6 +220,8 @@ declare_features! (
     (accepted, fn_must_use, "1.27.0", Some(43302)),
     /// Allows capturing variables in scope using format_args!
     (accepted, format_args_capture, "1.58.0", Some(67984)),
+    /// Infer generic args for both consts and types.
+    (accepted, generic_arg_infer, "CURRENT_RUSTC_VERSION", Some(85077)),
     /// Allows associated types to be generic, e.g., `type Foo<T>;` (RFC 1598).
     (accepted, generic_associated_types, "1.65.0", Some(44265)),
     /// Allows attributes on lifetime/type formal parameters in generics (RFC 1327).
diff --git a/compiler/rustc_feature/src/builtin_attrs.rs b/compiler/rustc_feature/src/builtin_attrs.rs
index c117e0fcf7c..b5218ec267c 100644
--- a/compiler/rustc_feature/src/builtin_attrs.rs
+++ b/compiler/rustc_feature/src/builtin_attrs.rs
@@ -9,7 +9,7 @@ use rustc_data_structures::fx::FxHashMap;
 use rustc_span::edition::Edition;
 use rustc_span::{Symbol, sym};
 
-use crate::{Features, Stability};
+use crate::Features;
 
 type GateFn = fn(&Features) -> bool;
 
@@ -94,34 +94,24 @@ pub enum AttributeSafety {
     Unsafe { unsafe_since: Option<Edition> },
 }
 
-#[derive(Clone, Copy)]
+#[derive(Clone, Debug, Copy)]
 pub enum AttributeGate {
-    /// Is gated by a given feature gate, reason
-    /// and function to check if enabled
-    Gated(Stability, Symbol, &'static str, fn(&Features) -> bool),
-
+    /// A gated attribute which requires a feature gate to be enabled.
+    Gated {
+        /// The feature gate, for example `#![feature(rustc_attrs)]` for rustc_* attributes.
+        feature: Symbol,
+        /// The error message displayed when an attempt is made to use the attribute without its feature gate.
+        message: &'static str,
+        /// Check function to be called during the `PostExpansionVisitor` pass.
+        check: fn(&Features) -> bool,
+        /// Notes to be displayed when an attempt is made to use the attribute without its feature gate.
+        notes: &'static [&'static str],
+    },
     /// Ungated attribute, can be used on all release channels
     Ungated,
 }
 
-// fn() is not Debug
-impl std::fmt::Debug for AttributeGate {
-    fn fmt(&self, fmt: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
-        match *self {
-            Self::Gated(ref stab, name, expl, _) => {
-                write!(fmt, "Gated({stab:?}, {name}, {expl})")
-            }
-            Self::Ungated => write!(fmt, "Ungated"),
-        }
-    }
-}
-
-impl AttributeGate {
-    fn is_deprecated(&self) -> bool {
-        matches!(*self, Self::Gated(Stability::Deprecated(_, _), ..))
-    }
-}
-
+// FIXME(jdonszelmann): move to rustc_attr_data_structures
 /// A template that the attribute input must match.
 /// Only top-level shape (`#[attr]` vs `#[attr(...)]` vs `#[attr = ...]`) is considered now.
 #[derive(Clone, Copy, Default)]
@@ -138,6 +128,26 @@ pub struct AttributeTemplate {
     pub name_value_str: Option<&'static str>,
 }
 
+impl AttributeTemplate {
+    pub fn suggestions(&self, inner: bool, name: impl std::fmt::Display) -> Vec<String> {
+        let mut suggestions = vec![];
+        let inner = if inner { "!" } else { "" };
+        if self.word {
+            suggestions.push(format!("#{inner}[{name}]"));
+        }
+        if let Some(descr) = self.list {
+            suggestions.push(format!("#{inner}[{name}({descr})]"));
+        }
+        suggestions.extend(self.one_of.iter().map(|&word| format!("#{inner}[{name}({word})]")));
+        if let Some(descr) = self.name_value_str {
+            suggestions.push(format!("#{inner}[{name} = \"{descr}\"]"));
+        }
+        suggestions.sort();
+
+        suggestions
+    }
+}
+
 /// How to handle multiple duplicate attributes on the same item.
 #[derive(Clone, Copy, Default)]
 pub enum AttributeDuplicates {
@@ -192,20 +202,21 @@ pub enum AttributeDuplicates {
 /// A convenience macro for constructing attribute templates.
 /// E.g., `template!(Word, List: "description")` means that the attribute
 /// supports forms `#[attr]` and `#[attr(description)]`.
+#[macro_export]
 macro_rules! template {
-    (Word) => { template!(@ true, None, &[], None) };
-    (List: $descr: expr) => { template!(@ false, Some($descr), &[], None) };
-    (OneOf: $one_of: expr) => { template!(@ false, None, $one_of, None) };
-    (NameValueStr: $descr: expr) => { template!(@ false, None, &[], Some($descr)) };
-    (Word, List: $descr: expr) => { template!(@ true, Some($descr), &[], None) };
-    (Word, NameValueStr: $descr: expr) => { template!(@ true, None, &[], Some($descr)) };
+    (Word) => { $crate::template!(@ true, None, &[], None) };
+    (List: $descr: expr) => { $crate::template!(@ false, Some($descr), &[], None) };
+    (OneOf: $one_of: expr) => { $crate::template!(@ false, None, $one_of, None) };
+    (NameValueStr: $descr: expr) => { $crate::template!(@ false, None, &[], Some($descr)) };
+    (Word, List: $descr: expr) => { $crate::template!(@ true, Some($descr), &[], None) };
+    (Word, NameValueStr: $descr: expr) => { $crate::template!(@ true, None, &[], Some($descr)) };
     (List: $descr1: expr, NameValueStr: $descr2: expr) => {
-        template!(@ false, Some($descr1), &[], Some($descr2))
+        $crate::template!(@ false, Some($descr1), &[], Some($descr2))
     };
     (Word, List: $descr1: expr, NameValueStr: $descr2: expr) => {
-        template!(@ true, Some($descr1), &[], Some($descr2))
+        $crate::template!(@ true, Some($descr1), &[], Some($descr2))
     };
-    (@ $word: expr, $list: expr, $one_of: expr, $name_value_str: expr) => { AttributeTemplate {
+    (@ $word: expr, $list: expr, $one_of: expr, $name_value_str: expr) => { $crate::AttributeTemplate {
         word: $word, list: $list, one_of: $one_of, name_value_str: $name_value_str
     } };
 }
@@ -247,7 +258,7 @@ macro_rules! ungated {
 }
 
 macro_rules! gated {
-    (unsafe $attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $gate:ident, $msg:expr $(,)?) => {
+    (unsafe $attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $gate:ident, $message:expr $(,)?) => {
         BuiltinAttribute {
             name: sym::$attr,
             encode_cross_crate: $encode_cross_crate,
@@ -255,10 +266,15 @@ macro_rules! gated {
             safety: AttributeSafety::Unsafe { unsafe_since: None },
             template: $tpl,
             duplicates: $duplicates,
-            gate: Gated(Stability::Unstable, sym::$gate, $msg, Features::$gate),
+            gate: Gated {
+                feature: sym::$gate,
+                message: $message,
+                check: Features::$gate,
+                notes: &[],
+            },
         }
     };
-    (unsafe $attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $msg:expr $(,)?) => {
+    (unsafe $attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $message:expr $(,)?) => {
         BuiltinAttribute {
             name: sym::$attr,
             encode_cross_crate: $encode_cross_crate,
@@ -266,10 +282,15 @@ macro_rules! gated {
             safety: AttributeSafety::Unsafe { unsafe_since: None },
             template: $tpl,
             duplicates: $duplicates,
-            gate: Gated(Stability::Unstable, sym::$attr, $msg, Features::$attr),
+            gate: Gated {
+                feature: sym::$attr,
+                message: $message,
+                check: Features::$attr,
+                notes: &[],
+            },
         }
     };
-    ($attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $gate:ident, $msg:expr $(,)?) => {
+    ($attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $gate:ident, $message:expr $(,)?) => {
         BuiltinAttribute {
             name: sym::$attr,
             encode_cross_crate: $encode_cross_crate,
@@ -277,10 +298,15 @@ macro_rules! gated {
             safety: AttributeSafety::Normal,
             template: $tpl,
             duplicates: $duplicates,
-            gate: Gated(Stability::Unstable, sym::$gate, $msg, Features::$gate),
+            gate: Gated {
+                feature: sym::$gate,
+                message: $message,
+                check: Features::$gate,
+                notes: &[],
+            },
         }
     };
-    ($attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $msg:expr $(,)?) => {
+    ($attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $message:expr $(,)?) => {
         BuiltinAttribute {
             name: sym::$attr,
             encode_cross_crate: $encode_cross_crate,
@@ -288,7 +314,12 @@ macro_rules! gated {
             safety: AttributeSafety::Normal,
             template: $tpl,
             duplicates: $duplicates,
-            gate: Gated(Stability::Unstable, sym::$attr, $msg, Features::$attr),
+            gate: Gated {
+                feature: sym::$attr,
+                message: $message,
+                check: Features::$attr,
+                notes: &[],
+            },
         }
     };
 }
@@ -304,12 +335,11 @@ macro_rules! rustc_attr {
             concat!(
                 "the `#[",
                 stringify!($attr),
-                "]` attribute is just used for rustc unit tests \
-                and will never be stable",
+                "]` attribute is used for rustc unit tests"
             ),
         )
     };
-    ($attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $msg:expr $(,)?) => {
+    ($attr:ident, $typ:expr, $tpl:expr, $duplicates:expr, $encode_cross_crate:expr, $($notes:expr),* $(,)?) => {
         BuiltinAttribute {
             name: sym::$attr,
             encode_cross_crate: $encode_cross_crate,
@@ -317,7 +347,17 @@ macro_rules! rustc_attr {
             safety: AttributeSafety::Normal,
             template: $tpl,
             duplicates: $duplicates,
-            gate: Gated(Stability::Unstable, sym::rustc_attrs, $msg, Features::rustc_attrs),
+            gate: Gated {
+                feature: sym::rustc_attrs,
+                message: "use of an internal attribute",
+                check: Features::rustc_attrs,
+                notes: &[
+                    concat!("the `#[",
+                    stringify!($attr),
+                    "]` attribute is an internal implementation detail that will never be stable"),
+                    $($notes),*
+                    ]
+            },
         }
     };
 }
@@ -328,9 +368,6 @@ macro_rules! experimental {
     };
 }
 
-const IMPL_DETAIL: &str = "internal implementation detail";
-const INTERNAL_UNSTABLE: &str = "this is an internal attribute that will never be stable";
-
 #[derive(PartialEq)]
 pub enum EncodeCrossCrate {
     Yes,
@@ -668,7 +705,7 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     rustc_attr!(
         rustc_deprecated_safe_2024, Normal, template!(List: r#"audit_that = "...""#),
         ErrorFollowing, EncodeCrossCrate::Yes,
-        "rustc_deprecated_safe_2024 is supposed to be used in libstd only",
+        "`#[rustc_deprecated_safe_2024]` is used to declare functions unsafe across the edition 2024 boundary",
     ),
     rustc_attr!(
         rustc_pub_transparent, Normal, template!(Word),
@@ -695,7 +732,7 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
         ErrorFollowing,
         EncodeCrossCrate::No,
         "`rustc_never_type_options` is used to experiment with never type fallback and work on \
-         never type stabilization, and will never be stable"
+         never type stabilization"
     ),
 
     // ==========================================================================
@@ -704,23 +741,23 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
 
     rustc_attr!(
         rustc_allocator, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, IMPL_DETAIL
+        EncodeCrossCrate::No,
     ),
     rustc_attr!(
         rustc_nounwind, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, IMPL_DETAIL
+        EncodeCrossCrate::No,
     ),
     rustc_attr!(
         rustc_reallocator, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, IMPL_DETAIL
+        EncodeCrossCrate::No,
     ),
     rustc_attr!(
         rustc_deallocator, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, IMPL_DETAIL
+        EncodeCrossCrate::No,
     ),
     rustc_attr!(
         rustc_allocator_zeroed, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, IMPL_DETAIL
+        EncodeCrossCrate::No,
     ),
     gated!(
         default_lib_allocator, Normal, template!(Word), WarnFollowing,
@@ -762,7 +799,7 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     ),
     rustc_attr!(
         rustc_std_internal_symbol, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, INTERNAL_UNSTABLE
+        EncodeCrossCrate::No,
     ),
 
     // ==========================================================================
@@ -772,11 +809,11 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     rustc_attr!(
         rustc_builtin_macro, Normal,
         template!(Word, List: "name, /*opt*/ attributes(name1, name2, ...)"), ErrorFollowing,
-        EncodeCrossCrate::Yes, IMPL_DETAIL
+        EncodeCrossCrate::Yes,
     ),
     rustc_attr!(
         rustc_proc_macro_decls, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, INTERNAL_UNSTABLE
+        EncodeCrossCrate::No,
     ),
     rustc_attr!(
         rustc_macro_transparency, Normal,
@@ -786,7 +823,7 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     rustc_attr!(
         rustc_autodiff, Normal,
         template!(Word, List: r#""...""#), DuplicatesOk,
-        EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        EncodeCrossCrate::Yes,
     ),
     // Traces that are left when `cfg` and `cfg_attr` attributes are expanded.
     // The attributes are not gated, to avoid stability errors, but they cannot be used in stable
@@ -812,54 +849,53 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
             NameValueStr: "message"
         ),
         ErrorFollowing, EncodeCrossCrate::Yes,
-        INTERNAL_UNSTABLE
+        "see `#[diagnostic::on_unimplemented]` for the stable equivalent of this attribute"
     ),
     rustc_attr!(
         rustc_confusables, Normal,
         template!(List: r#""name1", "name2", ..."#),
         ErrorFollowing, EncodeCrossCrate::Yes,
-        INTERNAL_UNSTABLE,
     ),
     // Enumerates "identity-like" conversion methods to suggest on type mismatch.
     rustc_attr!(
         rustc_conversion_suggestion, Normal, template!(Word),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
     // Prevents field reads in the marked trait or method to be considered
     // during dead code analysis.
     rustc_attr!(
         rustc_trivial_field_reads, Normal, template!(Word),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
     // Used by the `rustc::potential_query_instability` lint to warn methods which
     // might not be stable during incremental compilation.
     rustc_attr!(
         rustc_lint_query_instability, Normal, template!(Word),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
     // Used by the `rustc::untracked_query_information` lint to warn methods which
     // might not be stable during incremental compilation.
     rustc_attr!(
         rustc_lint_untracked_query_information, Normal, template!(Word),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
     // Used by the `rustc::diagnostic_outside_of_impl` lints to assist in changes to diagnostic
     // APIs. Any function with this attribute will be checked by that lint.
     rustc_attr!(
         rustc_lint_diagnostics, Normal, template!(Word),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
     // Used by the `rustc::bad_opt_access` lint to identify `DebuggingOptions` and `CodegenOptions`
     // types (as well as any others in future).
     rustc_attr!(
         rustc_lint_opt_ty, Normal, template!(Word),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
     // Used by the `rustc::bad_opt_access` lint on fields
     // types (as well as any others in future).
     rustc_attr!(
         rustc_lint_opt_deny_field_access, Normal, template!(List: "message"),
-        WarnFollowing, EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        WarnFollowing, EncodeCrossCrate::Yes,
     ),
 
     // ==========================================================================
@@ -868,28 +904,30 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
 
     rustc_attr!(
         rustc_promotable, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::No, IMPL_DETAIL),
+        EncodeCrossCrate::No, ),
     rustc_attr!(
         rustc_legacy_const_generics, Normal, template!(List: "N"), ErrorFollowing,
-        EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        EncodeCrossCrate::Yes,
     ),
-    // Do not const-check this function's body. It will always get replaced during CTFE.
+    // Do not const-check this function's body. It will always get replaced during CTFE via `hook_special_const_fn`.
     rustc_attr!(
         rustc_do_not_const_check, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        EncodeCrossCrate::Yes, "`#[rustc_do_not_const_check]` skips const-check for this function's body",
     ),
-    // Ensure the argument to this function is &&str during const-check.
     rustc_attr!(
         rustc_const_panic_str, Normal, template!(Word), WarnFollowing,
-        EncodeCrossCrate::Yes, INTERNAL_UNSTABLE
+        EncodeCrossCrate::Yes, "`#[rustc_const_panic_str]` ensures the argument to this function is &&str during const-check",
     ),
     rustc_attr!(
         rustc_const_stable_indirect, Normal,
-        template!(Word), WarnFollowing, EncodeCrossCrate::No, IMPL_DETAIL,
+        template!(Word),
+        WarnFollowing,
+        EncodeCrossCrate::No,
+        "this is an internal implementation detail",
     ),
     rustc_attr!(
         rustc_intrinsic_const_stable_indirect, Normal,
-        template!(Word), WarnFollowing, EncodeCrossCrate::No, IMPL_DETAIL,
+        template!(Word), WarnFollowing, EncodeCrossCrate::No,  "this is an internal implementation detail",
     ),
     gated!(
         rustc_allow_const_fn_unstable, Normal,
@@ -905,21 +943,21 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
         rustc_layout_scalar_valid_range_start, Normal, template!(List: "value"), ErrorFollowing,
         EncodeCrossCrate::Yes,
         "the `#[rustc_layout_scalar_valid_range_start]` attribute is just used to enable \
-        niche optimizations in libcore and libstd and will never be stable",
+        niche optimizations in the standard library",
     ),
     rustc_attr!(
         rustc_layout_scalar_valid_range_end, Normal, template!(List: "value"), ErrorFollowing,
         EncodeCrossCrate::Yes,
         "the `#[rustc_layout_scalar_valid_range_end]` attribute is just used to enable \
-        niche optimizations in libcore and libstd and will never be stable",
+        niche optimizations in the standard library",
     ),
     rustc_attr!(
         rustc_nonnull_optimization_guaranteed, Normal, template!(Word), WarnFollowing,
         EncodeCrossCrate::Yes,
         "the `#[rustc_nonnull_optimization_guaranteed]` attribute is just used to document \
-        guaranteed niche optimizations in libcore and libstd and will never be stable\n\
-        (note that the compiler does not even check whether the type indeed is being non-null-optimized; \
-        it is your responsibility to ensure that the attribute is only used on types that are optimized)",
+        guaranteed niche optimizations in the standard library",
+        "the compiler does not even check whether the type indeed is being non-null-optimized; \
+        it is your responsibility to ensure that the attribute is only used on types that are optimized",
     ),
 
     // ==========================================================================
@@ -932,17 +970,17 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     rustc_attr!(
         rustc_as_ptr, Normal, template!(Word), ErrorFollowing,
         EncodeCrossCrate::Yes,
-        "#[rustc_as_ptr] is used to mark functions returning pointers to their inner allocations."
+        "`#[rustc_as_ptr]` is used to mark functions returning pointers to their inner allocations."
     ),
     rustc_attr!(
         rustc_pass_by_value, Normal, template!(Word), ErrorFollowing,
         EncodeCrossCrate::Yes,
-        "#[rustc_pass_by_value] is used to mark types that must be passed by value instead of reference."
+        "`#[rustc_pass_by_value]` is used to mark types that must be passed by value instead of reference."
     ),
     rustc_attr!(
         rustc_never_returns_null_ptr, Normal, template!(Word), ErrorFollowing,
         EncodeCrossCrate::Yes,
-        "#[rustc_never_returns_null_ptr] is used to mark functions returning non-null pointers."
+        "`#[rustc_never_returns_null_ptr]` is used to mark functions returning non-null pointers."
     ),
     rustc_attr!(
         rustc_no_implicit_autorefs, AttributeType::Normal, template!(Word), ErrorFollowing, EncodeCrossCrate::Yes,
@@ -950,15 +988,15 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     ),
     rustc_attr!(
         rustc_coherence_is_core, AttributeType::CrateLevel, template!(Word), ErrorFollowing, EncodeCrossCrate::No,
-        "#![rustc_coherence_is_core] allows inherent methods on builtin types, only intended to be used in `core`."
+        "`#![rustc_coherence_is_core]` allows inherent methods on builtin types, only intended to be used in `core`."
     ),
     rustc_attr!(
         rustc_coinductive, AttributeType::Normal, template!(Word), WarnFollowing, EncodeCrossCrate::No,
-        "#![rustc_coinductive] changes a trait to be coinductive, allowing cycles in the trait solver."
+        "`#[rustc_coinductive]` changes a trait to be coinductive, allowing cycles in the trait solver."
     ),
     rustc_attr!(
         rustc_allow_incoherent_impl, AttributeType::Normal, template!(Word), ErrorFollowing, EncodeCrossCrate::No,
-        "#[rustc_allow_incoherent_impl] has to be added to all impl items of an incoherent inherent impl."
+        "`#[rustc_allow_incoherent_impl]` has to be added to all impl items of an incoherent inherent impl."
     ),
     rustc_attr!(
         rustc_preserve_ub_checks, AttributeType::CrateLevel, template!(Word), ErrorFollowing, EncodeCrossCrate::No,
@@ -970,7 +1008,7 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
         template!(Word),
         ErrorFollowing,
         EncodeCrossCrate::No,
-        "#[rustc_deny_explicit_impl] enforces that a trait can have no user-provided impls"
+        "`#[rustc_deny_explicit_impl]` enforces that a trait can have no user-provided impls"
     ),
     rustc_attr!(
         rustc_do_not_implement_via_object,
@@ -978,14 +1016,14 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
         template!(Word),
         ErrorFollowing,
         EncodeCrossCrate::No,
-        "#[rustc_do_not_implement_via_object] opts out of the automatic trait impl for trait objects \
+        "`#[rustc_do_not_implement_via_object]` opts out of the automatic trait impl for trait objects \
         (`impl Trait for dyn Trait`)"
     ),
     rustc_attr!(
         rustc_has_incoherent_inherent_impls, AttributeType::Normal, template!(Word),
         ErrorFollowing, EncodeCrossCrate::Yes,
-        "#[rustc_has_incoherent_inherent_impls] allows the addition of incoherent inherent impls for \
-         the given type by annotating all impl items with #[rustc_allow_incoherent_impl]."
+        "`#[rustc_has_incoherent_inherent_impls]` allows the addition of incoherent inherent impls for \
+         the given type by annotating all impl items with `#[rustc_allow_incoherent_impl]`."
     ),
 
     BuiltinAttribute {
@@ -996,12 +1034,13 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
         safety: AttributeSafety::Normal,
         template: template!(NameValueStr: "name"),
         duplicates: ErrorFollowing,
-        gate: Gated(
-            Stability::Unstable,
-            sym::rustc_attrs,
-            "diagnostic items compiler internal support for linting",
-            Features::rustc_attrs,
-        ),
+        gate: Gated{
+            feature: sym::rustc_attrs,
+            message: "use of an internal attribute",
+            check: Features::rustc_attrs,
+            notes: &["the `#[rustc_diagnostic_item]` attribute allows the compiler to reference types \
+            from the standard library for diagnostic purposes"],
+        },
     },
     gated!(
         // Used in resolve:
@@ -1015,14 +1054,14 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     rustc_attr!(
         rustc_inherit_overflow_checks, Normal, template!(Word), WarnFollowing, EncodeCrossCrate::No,
         "the `#[rustc_inherit_overflow_checks]` attribute is just used to control \
-        overflow checking behavior of several libcore functions that are inlined \
-        across crates and will never be stable",
+        overflow checking behavior of several functions in the standard library that are inlined \
+        across crates",
     ),
     rustc_attr!(
         rustc_reservation_impl, Normal,
         template!(NameValueStr: "reservation message"), ErrorFollowing, EncodeCrossCrate::Yes,
         "the `#[rustc_reservation_impl]` attribute is internally used \
-         for reserving for `for<T> From<!> for T` impl"
+        for reserving `impl<T> From<!> for T` as part of the effort to stabilize `!`"
     ),
     rustc_attr!(
         rustc_test_marker, Normal, template!(NameValueStr: "name"), WarnFollowing,
@@ -1053,12 +1092,13 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
         rustc_must_implement_one_of, Normal, template!(List: "function1, function2, ..."),
         ErrorFollowing, EncodeCrossCrate::No,
         "the `#[rustc_must_implement_one_of]` attribute is used to change minimal complete \
-        definition of a trait, it's currently in experimental form and should be changed before \
-        being exposed outside of the std"
+        definition of a trait. Its syntax and semantics are highly experimental and will be \
+        subject to change before stabilization",
     ),
     rustc_attr!(
         rustc_doc_primitive, Normal, template!(NameValueStr: "primitive name"), ErrorFollowing,
-        EncodeCrossCrate::Yes, r#"`rustc_doc_primitive` is a rustc internal attribute"#,
+        EncodeCrossCrate::Yes, "the `#[rustc_doc_primitive]` attribute is used by the standard library \
+        to provide a way to generate documentation for primitive types",
     ),
     gated!(
         rustc_intrinsic, Normal, template!(Word), ErrorFollowing, EncodeCrossCrate::Yes, intrinsics,
@@ -1066,11 +1106,11 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     ),
     rustc_attr!(
         rustc_no_mir_inline, Normal, template!(Word), WarnFollowing, EncodeCrossCrate::Yes,
-        "#[rustc_no_mir_inline] prevents the MIR inliner from inlining a function while not affecting codegen"
+        "`#[rustc_no_mir_inline]` prevents the MIR inliner from inlining a function while not affecting codegen"
     ),
     rustc_attr!(
         rustc_force_inline, Normal, template!(Word, NameValueStr: "reason"), WarnFollowing, EncodeCrossCrate::Yes,
-        "#[rustc_force_inline] forces a free function to be inlined"
+        "`#[rustc_force_inline]` forces a free function to be inlined"
     ),
 
     // ==========================================================================
@@ -1209,10 +1249,6 @@ pub static BUILTIN_ATTRIBUTES: &[BuiltinAttribute] = &[
     ),
 ];
 
-pub fn deprecated_attributes() -> Vec<&'static BuiltinAttribute> {
-    BUILTIN_ATTRIBUTES.iter().filter(|attr| attr.gate.is_deprecated()).collect()
-}
-
 pub fn is_builtin_attr_name(name: Symbol) -> bool {
     BUILTIN_ATTRIBUTE_MAP.get(&name).is_some()
 }
diff --git a/compiler/rustc_feature/src/lib.rs b/compiler/rustc_feature/src/lib.rs
index 25764755a8f..dbc0daa3d83 100644
--- a/compiler/rustc_feature/src/lib.rs
+++ b/compiler/rustc_feature/src/lib.rs
@@ -40,14 +40,6 @@ pub struct Feature {
     issue: Option<NonZero<u32>>,
 }
 
-#[derive(Copy, Clone, Debug)]
-pub enum Stability {
-    Unstable,
-    // First argument is tracking issue link; second argument is an optional
-    // help message, which defaults to "remove this attribute".
-    Deprecated(&'static str, Option<&'static str>),
-}
-
 #[derive(Clone, Copy, Debug, Hash)]
 pub enum UnstableFeatures {
     /// Disallow use of unstable features, as on beta/stable channels.
@@ -144,9 +136,8 @@ pub fn find_feature_issue(feature: Symbol, issue: GateIssue) -> Option<NonZero<u
 pub use accepted::ACCEPTED_LANG_FEATURES;
 pub use builtin_attrs::{
     AttributeDuplicates, AttributeGate, AttributeSafety, AttributeTemplate, AttributeType,
-    BUILTIN_ATTRIBUTE_MAP, BUILTIN_ATTRIBUTES, BuiltinAttribute, GatedCfg, deprecated_attributes,
-    encode_cross_crate, find_gated_cfg, is_builtin_attr_name, is_stable_diagnostic_attribute,
-    is_valid_for_get_attr,
+    BUILTIN_ATTRIBUTE_MAP, BUILTIN_ATTRIBUTES, BuiltinAttribute, GatedCfg, encode_cross_crate,
+    find_gated_cfg, is_builtin_attr_name, is_stable_diagnostic_attribute, is_valid_for_get_attr,
 };
 pub use removed::REMOVED_LANG_FEATURES;
 pub use unstable::{
diff --git a/compiler/rustc_feature/src/removed.rs b/compiler/rustc_feature/src/removed.rs
index 9738f169595..0cd090b25a4 100644
--- a/compiler/rustc_feature/src/removed.rs
+++ b/compiler/rustc_feature/src/removed.rs
@@ -263,6 +263,8 @@ declare_features! (
     /// Allows unnamed fields of struct and union type
     (removed, unnamed_fields, "1.83.0", Some(49804), Some("feature needs redesign"), 131045),
     (removed, unsafe_no_drop_flag, "1.0.0", None, None),
+    /// Allows unsized rvalues at arguments and parameters.
+    (removed, unsized_locals, "CURRENT_RUSTC_VERSION", Some(48055), Some("removed due to implementation concerns; see https://github.com/rust-lang/rust/issues/111942")),
     (removed, unsized_tuple_coercion, "1.87.0", Some(42877),
      Some("The feature restricts possible layouts for tuples, and this restriction is not worth it."), 137728),
     /// Allows `union` fields that don't implement `Copy` as long as they don't have any drop glue.
diff --git a/compiler/rustc_feature/src/unstable.rs b/compiler/rustc_feature/src/unstable.rs
index 594021d78d2..a7bc6207149 100644
--- a/compiler/rustc_feature/src/unstable.rs
+++ b/compiler/rustc_feature/src/unstable.rs
@@ -237,6 +237,8 @@ declare_features! (
     (internal, profiler_runtime, "1.18.0", None),
     /// Allows using `rustc_*` attributes (RFC 572).
     (internal, rustc_attrs, "1.0.0", None),
+    /// Introduces a hierarchy of `Sized` traits (RFC 3729).
+    (unstable, sized_hierarchy, "CURRENT_RUSTC_VERSION", None),
     /// Allows using the `#[stable]` and `#[unstable]` attributes.
     (internal, staged_api, "1.0.0", None),
     /// Added for testing unstable lints; perma-unstable.
@@ -353,6 +355,8 @@ declare_features! (
     (unstable, abi_avr_interrupt, "1.45.0", Some(69664)),
     /// Allows `extern "C-cmse-nonsecure-call" fn()`.
     (unstable, abi_c_cmse_nonsecure_call, "1.51.0", Some(81391)),
+    /// Allows `extern "custom" fn()`.
+    (unstable, abi_custom, "CURRENT_RUSTC_VERSION", Some(140829)),
     /// Allows `extern "gpu-kernel" fn()`.
     (unstable, abi_gpu_kernel, "1.86.0", Some(135467)),
     /// Allows `extern "msp430-interrupt" fn()`.
@@ -516,8 +520,6 @@ declare_features! (
     (unstable, frontmatter, "1.88.0", Some(136889)),
     /// Allows defining gen blocks and `gen fn`.
     (unstable, gen_blocks, "1.75.0", Some(117078)),
-    /// Infer generic args for both consts and types.
-    (unstable, generic_arg_infer, "1.55.0", Some(85077)),
     /// Allows non-trivial generic constants which have to have wfness manually propagated to callers
     (incomplete, generic_const_exprs, "1.56.0", Some(76560)),
     /// Allows generic parameters and where-clauses on free & associated const items.
@@ -665,8 +667,6 @@ declare_features! (
     (incomplete, unsized_const_params, "1.82.0", Some(95174)),
     /// Allows unsized fn parameters.
     (internal, unsized_fn_params, "1.49.0", Some(48055)),
-    /// Allows unsized rvalues at arguments and parameters.
-    (incomplete, unsized_locals, "1.30.0", Some(48055)),
     /// Allows using the `#[used(linker)]` (or `#[used(compiler)]`) attribute.
     (unstable, used_with_arg, "1.60.0", Some(93798)),
     /// Allows use of attributes in `where` clauses.
diff --git a/compiler/rustc_hir/src/hir.rs b/compiler/rustc_hir/src/hir.rs
index 6f288bb39b9..556f50a85af 100644
--- a/compiler/rustc_hir/src/hir.rs
+++ b/compiler/rustc_hir/src/hir.rs
@@ -34,6 +34,7 @@ use crate::def::{CtorKind, DefKind, PerNS, Res};
 use crate::def_id::{DefId, LocalDefIdMap};
 pub(crate) use crate::hir_id::{HirId, ItemLocalId, ItemLocalMap, OwnerId};
 use crate::intravisit::{FnKind, VisitorExt};
+use crate::lints::DelayedLints;
 
 #[derive(Debug, Copy, Clone, PartialEq, Eq, HashStable_Generic)]
 pub enum AngleBrackets {
@@ -1526,6 +1527,10 @@ pub struct OwnerInfo<'hir> {
     /// Map indicating what traits are in scope for places where this
     /// is relevant; generated by resolve.
     pub trait_map: ItemLocalMap<Box<[TraitCandidate]>>,
+
+    /// Lints delayed during ast lowering to be emitted
+    /// after hir has completely built
+    pub delayed_lints: DelayedLints,
 }
 
 impl<'tcx> OwnerInfo<'tcx> {
@@ -2280,12 +2285,23 @@ pub struct Expr<'hir> {
 }
 
 impl Expr<'_> {
-    pub fn precedence(&self) -> ExprPrecedence {
+    pub fn precedence(
+        &self,
+        for_each_attr: &dyn Fn(HirId, &mut dyn FnMut(&Attribute)),
+    ) -> ExprPrecedence {
+        let prefix_attrs_precedence = || -> ExprPrecedence {
+            let mut has_outer_attr = false;
+            for_each_attr(self.hir_id, &mut |attr: &Attribute| {
+                has_outer_attr |= matches!(attr.style(), AttrStyle::Outer)
+            });
+            if has_outer_attr { ExprPrecedence::Prefix } else { ExprPrecedence::Unambiguous }
+        };
+
         match &self.kind {
             ExprKind::Closure(closure) => {
                 match closure.fn_decl.output {
                     FnRetTy::DefaultReturn(_) => ExprPrecedence::Jump,
-                    FnRetTy::Return(_) => ExprPrecedence::Unambiguous,
+                    FnRetTy::Return(_) => prefix_attrs_precedence(),
                 }
             }
 
@@ -2310,7 +2326,7 @@ impl Expr<'_> {
             | ExprKind::Let(..)
             | ExprKind::Unary(..) => ExprPrecedence::Prefix,
 
-            // Never need parens
+            // Need parens if and only if there are prefix attributes.
             ExprKind::Array(_)
             | ExprKind::Block(..)
             | ExprKind::Call(..)
@@ -2332,9 +2348,9 @@ impl Expr<'_> {
             | ExprKind::Type(..)
             | ExprKind::UnsafeBinderCast(..)
             | ExprKind::Use(..)
-            | ExprKind::Err(_) => ExprPrecedence::Unambiguous,
+            | ExprKind::Err(_) => prefix_attrs_precedence(),
 
-            ExprKind::DropTemps(expr, ..) => expr.precedence(),
+            ExprKind::DropTemps(expr, ..) => expr.precedence(for_each_attr),
         }
     }
 
@@ -3059,6 +3075,7 @@ pub struct TraitItem<'hir> {
     pub kind: TraitItemKind<'hir>,
     pub span: Span,
     pub defaultness: Defaultness,
+    pub has_delayed_lints: bool,
 }
 
 macro_rules! expect_methods_self_kind {
@@ -3163,6 +3180,7 @@ pub struct ImplItem<'hir> {
     pub defaultness: Defaultness,
     pub span: Span,
     pub vis_span: Span,
+    pub has_delayed_lints: bool,
 }
 
 impl<'hir> ImplItem<'hir> {
@@ -4082,6 +4100,7 @@ pub struct Item<'hir> {
     pub kind: ItemKind<'hir>,
     pub span: Span,
     pub vis_span: Span,
+    pub has_delayed_lints: bool,
 }
 
 impl<'hir> Item<'hir> {
@@ -4487,6 +4506,7 @@ pub struct ForeignItem<'hir> {
     pub owner_id: OwnerId,
     pub span: Span,
     pub vis_span: Span,
+    pub has_delayed_lints: bool,
 }
 
 impl ForeignItem<'_> {
@@ -4969,7 +4989,7 @@ mod size_asserts {
     static_assert_size!(Expr<'_>, 64);
     static_assert_size!(ExprKind<'_>, 48);
     static_assert_size!(FnDecl<'_>, 40);
-    static_assert_size!(ForeignItem<'_>, 88);
+    static_assert_size!(ForeignItem<'_>, 96);
     static_assert_size!(ForeignItemKind<'_>, 56);
     static_assert_size!(GenericArg<'_>, 16);
     static_assert_size!(GenericBound<'_>, 64);
diff --git a/compiler/rustc_hir/src/intravisit.rs b/compiler/rustc_hir/src/intravisit.rs
index bebac3a4b78..57e49625148 100644
--- a/compiler/rustc_hir/src/intravisit.rs
+++ b/compiler/rustc_hir/src/intravisit.rs
@@ -537,7 +537,7 @@ pub fn walk_param<'v, V: Visitor<'v>>(visitor: &mut V, param: &'v Param<'v>) ->
 }
 
 pub fn walk_item<'v, V: Visitor<'v>>(visitor: &mut V, item: &'v Item<'v>) -> V::Result {
-    let Item { owner_id: _, kind, span: _, vis_span: _ } = item;
+    let Item { owner_id: _, kind, span: _, vis_span: _, has_delayed_lints: _ } = item;
     try_visit!(visitor.visit_id(item.hir_id()));
     match *kind {
         ItemKind::ExternCrate(orig_name, ident) => {
@@ -656,7 +656,8 @@ pub fn walk_foreign_item<'v, V: Visitor<'v>>(
     visitor: &mut V,
     foreign_item: &'v ForeignItem<'v>,
 ) -> V::Result {
-    let ForeignItem { ident, kind, owner_id: _, span: _, vis_span: _ } = foreign_item;
+    let ForeignItem { ident, kind, owner_id: _, span: _, vis_span: _, has_delayed_lints: _ } =
+        foreign_item;
     try_visit!(visitor.visit_id(foreign_item.hir_id()));
     try_visit!(visitor.visit_ident(*ident));
 
@@ -1205,7 +1206,15 @@ pub fn walk_trait_item<'v, V: Visitor<'v>>(
     visitor: &mut V,
     trait_item: &'v TraitItem<'v>,
 ) -> V::Result {
-    let TraitItem { ident, generics, ref defaultness, ref kind, span, owner_id: _ } = *trait_item;
+    let TraitItem {
+        ident,
+        generics,
+        ref defaultness,
+        ref kind,
+        span,
+        owner_id: _,
+        has_delayed_lints: _,
+    } = *trait_item;
     let hir_id = trait_item.hir_id();
     try_visit!(visitor.visit_ident(ident));
     try_visit!(visitor.visit_generics(&generics));
@@ -1261,6 +1270,7 @@ pub fn walk_impl_item<'v, V: Visitor<'v>>(
         ref defaultness,
         span: _,
         vis_span: _,
+        has_delayed_lints: _,
     } = *impl_item;
 
     try_visit!(visitor.visit_ident(ident));
diff --git a/compiler/rustc_hir/src/lang_items.rs b/compiler/rustc_hir/src/lang_items.rs
index 21d36ed54cd..3a08e5ae336 100644
--- a/compiler/rustc_hir/src/lang_items.rs
+++ b/compiler/rustc_hir/src/lang_items.rs
@@ -165,6 +165,8 @@ pub fn extract(attrs: &[impl AttributeExt]) -> Option<(Symbol, Span)> {
 language_item_table! {
 //  Variant name,            Name,                     Getter method name,         Target                  Generic requirements;
     Sized,                   sym::sized,               sized_trait,                Target::Trait,          GenericRequirement::Exact(0);
+    MetaSized,               sym::meta_sized,          meta_sized_trait,           Target::Trait,          GenericRequirement::Exact(0);
+    PointeeSized,            sym::pointee_sized,       pointee_sized_trait,        Target::Trait,          GenericRequirement::Exact(0);
     Unsize,                  sym::unsize,              unsize_trait,               Target::Trait,          GenericRequirement::Minimum(1);
     /// Trait injected by `#[derive(PartialEq)]`, (i.e. "Partial EQ").
     StructuralPeq,           sym::structural_peq,      structural_peq_trait,       Target::Trait,          GenericRequirement::None;
diff --git a/compiler/rustc_hir/src/lib.rs b/compiler/rustc_hir/src/lib.rs
index c6fe475b460..dafd31336fb 100644
--- a/compiler/rustc_hir/src/lib.rs
+++ b/compiler/rustc_hir/src/lib.rs
@@ -27,6 +27,7 @@ mod hir;
 pub mod hir_id;
 pub mod intravisit;
 pub mod lang_items;
+pub mod lints;
 pub mod pat_util;
 mod stable_hash_impls;
 mod target;
diff --git a/compiler/rustc_hir/src/lints.rs b/compiler/rustc_hir/src/lints.rs
new file mode 100644
index 00000000000..7be6c32e57e
--- /dev/null
+++ b/compiler/rustc_hir/src/lints.rs
@@ -0,0 +1,23 @@
+use rustc_attr_data_structures::lints::AttributeLint;
+use rustc_data_structures::fingerprint::Fingerprint;
+use rustc_macros::HashStable_Generic;
+
+use crate::HirId;
+
+/// During ast lowering, no lints can be emitted.
+/// That is because lints attach to nodes either in the AST, or on the built HIR.
+/// When attached to AST nodes, they're emitted just before building HIR,
+/// and then there's a gap where no lints can be emitted until HIR is done.
+/// The variants in this enum represent lints that are temporarily stashed during
+/// AST lowering to be emitted once HIR is built.
+#[derive(Clone, Debug, HashStable_Generic)]
+pub enum DelayedLint {
+    AttributeParsing(AttributeLint<HirId>),
+}
+
+#[derive(Debug)]
+pub struct DelayedLints {
+    pub lints: Box<[DelayedLint]>,
+    // Only present when the crate hash is needed.
+    pub opt_hash: Option<Fingerprint>,
+}
diff --git a/compiler/rustc_hir/src/stable_hash_impls.rs b/compiler/rustc_hir/src/stable_hash_impls.rs
index 91ea88cae47..6acf1524b60 100644
--- a/compiler/rustc_hir/src/stable_hash_impls.rs
+++ b/compiler/rustc_hir/src/stable_hash_impls.rs
@@ -6,6 +6,7 @@ use crate::hir::{
     AttributeMap, BodyId, Crate, ForeignItemId, ImplItemId, ItemId, OwnerNodes, TraitItemId,
 };
 use crate::hir_id::{HirId, ItemLocalId};
+use crate::lints::DelayedLints;
 
 /// Requirements for a `StableHashingContext` to be used in this crate.
 /// This is a hack to allow using the `HashStable_Generic` derive macro
@@ -102,6 +103,13 @@ impl<'tcx, HirCtx: crate::HashStableContext> HashStable<HirCtx> for OwnerNodes<'
     }
 }
 
+impl<HirCtx: crate::HashStableContext> HashStable<HirCtx> for DelayedLints {
+    fn hash_stable(&self, hcx: &mut HirCtx, hasher: &mut StableHasher) {
+        let DelayedLints { opt_hash, .. } = *self;
+        opt_hash.unwrap().hash_stable(hcx, hasher);
+    }
+}
+
 impl<'tcx, HirCtx: crate::HashStableContext> HashStable<HirCtx> for AttributeMap<'tcx> {
     fn hash_stable(&self, hcx: &mut HirCtx, hasher: &mut StableHasher) {
         // We ignore the `map` since it refers to information included in `opt_hash` which is
diff --git a/compiler/rustc_hir_analysis/Cargo.toml b/compiler/rustc_hir_analysis/Cargo.toml
index 899370b34e4..5d6c49ee862 100644
--- a/compiler/rustc_hir_analysis/Cargo.toml
+++ b/compiler/rustc_hir_analysis/Cargo.toml
@@ -14,6 +14,7 @@ rustc_abi = { path = "../rustc_abi" }
 rustc_arena = { path = "../rustc_arena" }
 rustc_ast = { path = "../rustc_ast" }
 rustc_attr_data_structures = { path = "../rustc_attr_data_structures" }
+rustc_attr_parsing = { path = "../rustc_attr_parsing" }
 rustc_data_structures = { path = "../rustc_data_structures" }
 rustc_errors = { path = "../rustc_errors" }
 rustc_feature = { path = "../rustc_feature" }
diff --git a/compiler/rustc_hir_analysis/messages.ftl b/compiler/rustc_hir_analysis/messages.ftl
index 4fcd9f8a646..f768bd157ab 100644
--- a/compiler/rustc_hir_analysis/messages.ftl
+++ b/compiler/rustc_hir_analysis/messages.ftl
@@ -1,3 +1,7 @@
+hir_analysis_abi_custom_clothed_function =
+    items with the `"custom"` ABI can only be declared externally or defined via naked functions
+    .suggestion = convert this to an `#[unsafe(naked)]` function
+
 hir_analysis_ambiguous_assoc_item = ambiguous associated {$assoc_kind} `{$assoc_ident}` in bounds of `{$qself}`
     .label = ambiguous associated {$assoc_kind} `{$assoc_ident}`
 
@@ -595,7 +599,7 @@ hir_analysis_value_of_associated_struct_already_specified =
     .label = re-bound here
     .previous_bound_label = `{$item_name}` bound here first
 
-hir_analysis_variadic_function_compatible_convention = C-variadic function must have a compatible calling convention, like {$conventions}
+hir_analysis_variadic_function_compatible_convention = C-variadic functions with the {$convention} calling convention are not supported
     .label = C-variadic function must have a compatible calling convention
 
 hir_analysis_variances_of = {$variances}
diff --git a/compiler/rustc_hir_analysis/src/check/check.rs b/compiler/rustc_hir_analysis/src/check/check.rs
index 60ca0155bdd..32fec0604c0 100644
--- a/compiler/rustc_hir_analysis/src/check/check.rs
+++ b/compiler/rustc_hir_analysis/src/check/check.rs
@@ -21,7 +21,7 @@ use rustc_middle::ty::error::TypeErrorToStringExt;
 use rustc_middle::ty::layout::{LayoutError, MAX_SIMD_LANES};
 use rustc_middle::ty::util::Discr;
 use rustc_middle::ty::{
-    AdtDef, BottomUpFolder, GenericArgKind, RegionKind, TypeFoldable, TypeSuperVisitable,
+    AdtDef, BottomUpFolder, FnSig, GenericArgKind, RegionKind, TypeFoldable, TypeSuperVisitable,
     TypeVisitable, TypeVisitableExt, fold_regions,
 };
 use rustc_session::lint::builtin::UNINHABITED_STATIC;
@@ -100,6 +100,18 @@ pub fn check_abi_fn_ptr(tcx: TyCtxt<'_>, hir_id: hir::HirId, span: Span, abi: Ex
     }
 }
 
+pub fn check_custom_abi(tcx: TyCtxt<'_>, def_id: LocalDefId, fn_sig: FnSig<'_>, fn_sig_span: Span) {
+    if fn_sig.abi == ExternAbi::Custom {
+        // Function definitions that use `extern "custom"` must be naked functions.
+        if !tcx.has_attr(def_id, sym::naked) {
+            tcx.dcx().emit_err(crate::errors::AbiCustomClothedFunction {
+                span: fn_sig_span,
+                naked_span: tcx.def_span(def_id).shrink_to_lo(),
+            });
+        }
+    }
+}
+
 fn check_struct(tcx: TyCtxt<'_>, def_id: LocalDefId) {
     let def = tcx.adt_def(def_id);
     let span = tcx.def_span(def_id);
diff --git a/compiler/rustc_hir_analysis/src/check/intrinsic.rs b/compiler/rustc_hir_analysis/src/check/intrinsic.rs
index 481cdaa4c6c..060fc51b7bd 100644
--- a/compiler/rustc_hir_analysis/src/check/intrinsic.rs
+++ b/compiler/rustc_hir_analysis/src/check/intrinsic.rs
@@ -71,7 +71,7 @@ fn intrinsic_operation_unsafety(tcx: TyCtxt<'_>, intrinsic_id: LocalDefId) -> hi
         | sym::box_new
         | sym::breakpoint
         | sym::size_of
-        | sym::min_align_of
+        | sym::align_of
         | sym::needs_drop
         | sym::caller_location
         | sym::add_with_overflow
@@ -200,10 +200,8 @@ pub(crate) fn check_intrinsic_type(
         sym::abort => (0, 0, vec![], tcx.types.never),
         sym::unreachable => (0, 0, vec![], tcx.types.never),
         sym::breakpoint => (0, 0, vec![], tcx.types.unit),
-        sym::size_of | sym::pref_align_of | sym::min_align_of | sym::variant_count => {
-            (1, 0, vec![], tcx.types.usize)
-        }
-        sym::size_of_val | sym::min_align_of_val => {
+        sym::size_of | sym::align_of | sym::variant_count => (1, 0, vec![], tcx.types.usize),
+        sym::size_of_val | sym::align_of_val => {
             (1, 0, vec![Ty::new_imm_ptr(tcx, param(0))], tcx.types.usize)
         }
         sym::rustc_peek => (1, 0, vec![param(0)], param(0)),
diff --git a/compiler/rustc_hir_analysis/src/check/mod.rs b/compiler/rustc_hir_analysis/src/check/mod.rs
index fad8abf5fae..5b8aa28102c 100644
--- a/compiler/rustc_hir_analysis/src/check/mod.rs
+++ b/compiler/rustc_hir_analysis/src/check/mod.rs
@@ -72,10 +72,11 @@ pub mod wfcheck;
 
 use std::num::NonZero;
 
-pub use check::{check_abi, check_abi_fn_ptr};
+pub use check::{check_abi, check_abi_fn_ptr, check_custom_abi};
 use rustc_abi::{ExternAbi, VariantIdx};
 use rustc_data_structures::fx::{FxHashSet, FxIndexMap};
 use rustc_errors::{Diag, ErrorGuaranteed, pluralize, struct_span_code_err};
+use rustc_hir::LangItem;
 use rustc_hir::def_id::{DefId, LocalDefId};
 use rustc_hir::intravisit::Visitor;
 use rustc_index::bit_set::DenseBitSet;
@@ -331,7 +332,7 @@ fn bounds_from_generic_predicates<'tcx>(
             ty::ClauseKind::Trait(trait_predicate) => {
                 let entry = types.entry(trait_predicate.self_ty()).or_default();
                 let def_id = trait_predicate.def_id();
-                if !tcx.is_default_trait(def_id) {
+                if !tcx.is_default_trait(def_id) && !tcx.is_lang_item(def_id, LangItem::Sized) {
                     // Do not add that restriction to the list if it is a positive requirement.
                     entry.push(trait_predicate.def_id());
                 }
diff --git a/compiler/rustc_hir_analysis/src/check/region.rs b/compiler/rustc_hir_analysis/src/check/region.rs
index 7cb31a64e13..c458878da15 100644
--- a/compiler/rustc_hir_analysis/src/check/region.rs
+++ b/compiler/rustc_hir_analysis/src/check/region.rs
@@ -10,6 +10,7 @@ use std::mem;
 
 use rustc_data_structures::fx::FxHashMap;
 use rustc_hir as hir;
+use rustc_hir::def::{CtorKind, DefKind, Res};
 use rustc_hir::def_id::DefId;
 use rustc_hir::intravisit::{self, Visitor};
 use rustc_hir::{Arm, Block, Expr, LetStmt, Pat, PatKind, Stmt};
@@ -752,13 +753,19 @@ fn resolve_local<'tcx>(
                     record_rvalue_scope_if_borrow_expr(visitor, arm.body, blk_id);
                 }
             }
-            hir::ExprKind::Call(..) | hir::ExprKind::MethodCall(..) => {
-                // FIXME(@dingxiangfei2009): choose call arguments here
-                // for candidacy for extended parameter rule application
-            }
-            hir::ExprKind::Index(..) => {
-                // FIXME(@dingxiangfei2009): select the indices
-                // as candidate for rvalue scope rules
+            hir::ExprKind::Call(func, args) => {
+                // Recurse into tuple constructors, such as `Some(&temp())`.
+                //
+                // That way, there is no difference between `Some(..)` and `Some { 0: .. }`,
+                // even though the former is syntactically a function call.
+                if let hir::ExprKind::Path(path) = &func.kind
+                    && let hir::QPath::Resolved(None, path) = path
+                    && let Res::SelfCtor(_) | Res::Def(DefKind::Ctor(_, CtorKind::Fn), _) = path.res
+                {
+                    for arg in args {
+                        record_rvalue_scope_if_borrow_expr(visitor, arg, blk_id);
+                    }
+                }
             }
             _ => {}
         }
diff --git a/compiler/rustc_hir_analysis/src/check/wfcheck.rs b/compiler/rustc_hir_analysis/src/check/wfcheck.rs
index b8dc01cbc03..20d0e87b7a7 100644
--- a/compiler/rustc_hir_analysis/src/check/wfcheck.rs
+++ b/compiler/rustc_hir_analysis/src/check/wfcheck.rs
@@ -1258,6 +1258,11 @@ fn check_trait(tcx: TyCtxt<'_>, item: &hir::Item<'_>) -> Result<(), ErrorGuarant
     debug!(?item.owner_id);
 
     let def_id = item.owner_id.def_id;
+    if tcx.is_lang_item(def_id.into(), LangItem::PointeeSized) {
+        // `PointeeSized` is removed during lowering.
+        return Ok(());
+    }
+
     let trait_def = tcx.trait_def(def_id);
     if trait_def.is_marker
         || matches!(trait_def.specialization_kind, TraitSpecializationKind::Marker)
diff --git a/compiler/rustc_hir_analysis/src/collect.rs b/compiler/rustc_hir_analysis/src/collect.rs
index e1df0d60452..6e22ac5a28a 100644
--- a/compiler/rustc_hir_analysis/src/collect.rs
+++ b/compiler/rustc_hir_analysis/src/collect.rs
@@ -494,7 +494,7 @@ impl<'tcx> HirTyLowerer<'tcx> for ItemCtxt<'tcx> {
 
                 // Only visit the type looking for `_` if we didn't fix the type above
                 visitor.visit_ty_unambig(a);
-                self.lowerer().lower_arg_ty(a, None)
+                self.lowerer().lower_ty(a)
             })
             .collect();
 
diff --git a/compiler/rustc_hir_analysis/src/collect/item_bounds.rs b/compiler/rustc_hir_analysis/src/collect/item_bounds.rs
index 5f1cdeddc19..53c44cdc411 100644
--- a/compiler/rustc_hir_analysis/src/collect/item_bounds.rs
+++ b/compiler/rustc_hir_analysis/src/collect/item_bounds.rs
@@ -44,6 +44,14 @@ fn associated_type_bounds<'tcx>(
             | PredicateFilter::SelfOnly
             | PredicateFilter::SelfTraitThatDefines(_)
             | PredicateFilter::SelfAndAssociatedTypeBounds => {
+                icx.lowerer().add_sizedness_bounds(
+                    &mut bounds,
+                    item_ty,
+                    hir_bounds,
+                    None,
+                    None,
+                    span,
+                );
                 icx.lowerer().add_default_traits(&mut bounds, item_ty, hir_bounds, None, span);
             }
             // `ConstIfConst` is only interested in `~const` bounds.
@@ -333,6 +341,14 @@ fn opaque_type_bounds<'tcx>(
             | PredicateFilter::SelfOnly
             | PredicateFilter::SelfTraitThatDefines(_)
             | PredicateFilter::SelfAndAssociatedTypeBounds => {
+                icx.lowerer().add_sizedness_bounds(
+                    &mut bounds,
+                    item_ty,
+                    hir_bounds,
+                    None,
+                    None,
+                    span,
+                );
                 icx.lowerer().add_default_traits(&mut bounds, item_ty, hir_bounds, None, span);
             }
             //`ConstIfConst` is only interested in `~const` bounds.
diff --git a/compiler/rustc_hir_analysis/src/collect/predicates_of.rs b/compiler/rustc_hir_analysis/src/collect/predicates_of.rs
index ce0f83d0ec2..c337765c5fe 100644
--- a/compiler/rustc_hir_analysis/src/collect/predicates_of.rs
+++ b/compiler/rustc_hir_analysis/src/collect/predicates_of.rs
@@ -162,7 +162,6 @@ fn gather_explicit_predicates_of(tcx: TyCtxt<'_>, def_id: LocalDefId) -> ty::Gen
                         .map(|t| ty::Binder::dummy(t.instantiate_identity()));
                 }
             }
-
             ItemKind::Trait(_, _, _, _, self_bounds, ..)
             | ItemKind::TraitAlias(_, _, self_bounds) => {
                 is_trait = Some((self_bounds, item.span));
@@ -183,21 +182,29 @@ fn gather_explicit_predicates_of(tcx: TyCtxt<'_>, def_id: LocalDefId) -> ty::Gen
     // and the explicit where-clauses, but to get the full set of predicates
     // on a trait we must also consider the bounds that follow the trait's name,
     // like `trait Foo: A + B + C`.
-    if let Some(self_bounds) = is_trait {
+    if let Some((self_bounds, span)) = is_trait {
         let mut bounds = Vec::new();
         icx.lowerer().lower_bounds(
             tcx.types.self_param,
-            self_bounds.0,
+            self_bounds,
             &mut bounds,
             ty::List::empty(),
             PredicateFilter::All,
         );
+        icx.lowerer().add_sizedness_bounds(
+            &mut bounds,
+            tcx.types.self_param,
+            self_bounds,
+            None,
+            Some(def_id),
+            span,
+        );
         icx.lowerer().add_default_super_traits(
             def_id,
             &mut bounds,
-            self_bounds.0,
+            self_bounds,
             hir_generics,
-            self_bounds.1,
+            span,
         );
         predicates.extend(bounds);
     }
@@ -224,6 +231,14 @@ fn gather_explicit_predicates_of(tcx: TyCtxt<'_>, def_id: LocalDefId) -> ty::Gen
                 let param_ty = icx.lowerer().lower_ty_param(param.hir_id);
                 let mut bounds = Vec::new();
                 // Implicit bounds are added to type params unless a `?Trait` bound is found
+                icx.lowerer().add_sizedness_bounds(
+                    &mut bounds,
+                    param_ty,
+                    &[],
+                    Some((param.def_id, hir_generics.predicates)),
+                    None,
+                    param.span,
+                );
                 icx.lowerer().add_default_traits(
                     &mut bounds,
                     param_ty,
diff --git a/compiler/rustc_hir_analysis/src/collect/type_of.rs b/compiler/rustc_hir_analysis/src/collect/type_of.rs
index 141d96b57e5..902a2e15dff 100644
--- a/compiler/rustc_hir_analysis/src/collect/type_of.rs
+++ b/compiler/rustc_hir_analysis/src/collect/type_of.rs
@@ -452,13 +452,6 @@ fn infer_placeholder_type<'tcx>(
             if let Some(ty) = node.ty() {
                 visitor.visit_ty_unambig(ty);
             }
-            // If we have just one span, let's try to steal a const `_` feature error.
-            let try_steal_span = if !tcx.features().generic_arg_infer() && visitor.spans.len() == 1
-            {
-                visitor.spans.first().copied()
-            } else {
-                None
-            };
             // If we didn't find any infer tys, then just fallback to `span`.
             if visitor.spans.is_empty() {
                 visitor.spans.push(span);
@@ -489,15 +482,7 @@ fn infer_placeholder_type<'tcx>(
                 }
             }
 
-            if let Some(try_steal_span) = try_steal_span {
-                cx.dcx().try_steal_replace_and_emit_err(
-                    try_steal_span,
-                    StashKey::UnderscoreForArrayLengths,
-                    diag,
-                )
-            } else {
-                diag.emit()
-            }
+            diag.emit()
         });
     Ty::new_error(tcx, guar)
 }
diff --git a/compiler/rustc_hir_analysis/src/delegation.rs b/compiler/rustc_hir_analysis/src/delegation.rs
index b907ec090e5..f5821aed03f 100644
--- a/compiler/rustc_hir_analysis/src/delegation.rs
+++ b/compiler/rustc_hir_analysis/src/delegation.rs
@@ -276,8 +276,7 @@ fn create_generic_args<'tcx>(
                 tcx.impl_trait_header(parent).unwrap().trait_ref.instantiate_identity().args;
 
             let trait_args = ty::GenericArgs::identity_for_item(tcx, sig_id);
-            let method_args =
-                tcx.mk_args_from_iter(trait_args.iter().skip(callee_generics.parent_count));
+            let method_args = tcx.mk_args(&trait_args[callee_generics.parent_count..]);
             let method_args = build_generic_args(tcx, sig_id, def_id, method_args);
 
             tcx.mk_args_from_iter(parent_args.iter().chain(method_args))
diff --git a/compiler/rustc_hir_analysis/src/errors.rs b/compiler/rustc_hir_analysis/src/errors.rs
index a27d1ed6c53..8de2aec95a7 100644
--- a/compiler/rustc_hir_analysis/src/errors.rs
+++ b/compiler/rustc_hir_analysis/src/errors.rs
@@ -633,7 +633,7 @@ pub(crate) struct VariadicFunctionCompatibleConvention<'a> {
     #[primary_span]
     #[label]
     pub span: Span,
-    pub conventions: &'a str,
+    pub convention: &'a str,
 }
 
 #[derive(Diagnostic)]
@@ -1698,3 +1698,17 @@ pub(crate) struct SelfInTypeAlias {
     #[label]
     pub span: Span,
 }
+
+#[derive(Diagnostic)]
+#[diag(hir_analysis_abi_custom_clothed_function)]
+pub(crate) struct AbiCustomClothedFunction {
+    #[primary_span]
+    pub span: Span,
+    #[suggestion(
+        hir_analysis_suggestion,
+        applicability = "maybe-incorrect",
+        code = "#[unsafe(naked)]\n",
+        style = "short"
+    )]
+    pub naked_span: Span,
+}
diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs
index bdc42c7a2d9..ea1dfdfd806 100644
--- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs
+++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/bounds.rs
@@ -4,15 +4,15 @@ use rustc_data_structures::fx::{FxIndexMap, FxIndexSet};
 use rustc_errors::codes::*;
 use rustc_errors::struct_span_code_err;
 use rustc_hir as hir;
-use rustc_hir::AmbigArg;
 use rustc_hir::def::{DefKind, Res};
 use rustc_hir::def_id::{DefId, LocalDefId};
+use rustc_hir::{AmbigArg, LangItem, PolyTraitRef};
 use rustc_middle::bug;
 use rustc_middle::ty::{
-    self as ty, IsSuggestable, Ty, TyCtxt, TypeFoldable, TypeSuperVisitable, TypeVisitable,
-    TypeVisitableExt, TypeVisitor, Upcast,
+    self as ty, IsSuggestable, Ty, TyCtxt, TypeSuperVisitable, TypeVisitable, TypeVisitableExt,
+    TypeVisitor, Upcast,
 };
-use rustc_span::{ErrorGuaranteed, Ident, Span, Symbol, kw, sym};
+use rustc_span::{ErrorGuaranteed, Ident, Span, Symbol, kw};
 use rustc_trait_selection::traits;
 use smallvec::SmallVec;
 use tracing::{debug, instrument};
@@ -23,23 +23,213 @@ use crate::hir_ty_lowering::{
     AssocItemQSelf, FeedConstTy, HirTyLowerer, PredicateFilter, RegionInferReason,
 };
 
+#[derive(Debug, Default)]
+struct CollectedBound {
+    /// `Trait`
+    positive: bool,
+    /// `?Trait`
+    maybe: bool,
+    /// `!Trait`
+    negative: bool,
+}
+
+impl CollectedBound {
+    /// Returns `true` if any of `Trait`, `?Trait` or `!Trait` were encountered.
+    fn any(&self) -> bool {
+        self.positive || self.maybe || self.negative
+    }
+}
+
+#[derive(Debug)]
+struct CollectedSizednessBounds {
+    // Collected `Sized` bounds
+    sized: CollectedBound,
+    // Collected `MetaSized` bounds
+    meta_sized: CollectedBound,
+    // Collected `PointeeSized` bounds
+    pointee_sized: CollectedBound,
+}
+
+impl CollectedSizednessBounds {
+    /// Returns `true` if any of `Trait`, `?Trait` or `!Trait` were encountered for `Sized`,
+    /// `MetaSized` or `PointeeSized`.
+    fn any(&self) -> bool {
+        self.sized.any() || self.meta_sized.any() || self.pointee_sized.any()
+    }
+}
+
+fn search_bounds_for<'tcx>(
+    hir_bounds: &'tcx [hir::GenericBound<'tcx>],
+    self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
+    mut f: impl FnMut(&'tcx PolyTraitRef<'tcx>),
+) {
+    let mut search_bounds = |hir_bounds: &'tcx [hir::GenericBound<'tcx>]| {
+        for hir_bound in hir_bounds {
+            let hir::GenericBound::Trait(ptr) = hir_bound else {
+                continue;
+            };
+
+            f(ptr)
+        }
+    };
+
+    search_bounds(hir_bounds);
+    if let Some((self_ty, where_clause)) = self_ty_where_predicates {
+        for clause in where_clause {
+            if let hir::WherePredicateKind::BoundPredicate(pred) = clause.kind
+                && pred.is_param_bound(self_ty.to_def_id())
+            {
+                search_bounds(pred.bounds);
+            }
+        }
+    }
+}
+
+fn collect_unbounds<'tcx>(
+    hir_bounds: &'tcx [hir::GenericBound<'tcx>],
+    self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
+) -> SmallVec<[&'tcx PolyTraitRef<'tcx>; 1]> {
+    let mut unbounds: SmallVec<[_; 1]> = SmallVec::new();
+    search_bounds_for(hir_bounds, self_ty_where_predicates, |ptr| {
+        if matches!(ptr.modifiers.polarity, hir::BoundPolarity::Maybe(_)) {
+            unbounds.push(ptr);
+        }
+    });
+    unbounds
+}
+
+fn collect_bounds<'a, 'tcx>(
+    hir_bounds: &'a [hir::GenericBound<'tcx>],
+    self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
+    target_did: DefId,
+) -> CollectedBound {
+    let mut collect_into = CollectedBound::default();
+    search_bounds_for(hir_bounds, self_ty_where_predicates, |ptr| {
+        if !matches!(ptr.trait_ref.path.res, Res::Def(DefKind::Trait, did) if did == target_did) {
+            return;
+        }
+
+        match ptr.modifiers.polarity {
+            hir::BoundPolarity::Maybe(_) => collect_into.maybe = true,
+            hir::BoundPolarity::Negative(_) => collect_into.negative = true,
+            hir::BoundPolarity::Positive => collect_into.positive = true,
+        }
+    });
+    collect_into
+}
+
+fn collect_sizedness_bounds<'tcx>(
+    tcx: TyCtxt<'tcx>,
+    hir_bounds: &'tcx [hir::GenericBound<'tcx>],
+    self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
+    span: Span,
+) -> CollectedSizednessBounds {
+    let sized_did = tcx.require_lang_item(LangItem::Sized, span);
+    let sized = collect_bounds(hir_bounds, self_ty_where_predicates, sized_did);
+
+    let meta_sized_did = tcx.require_lang_item(LangItem::MetaSized, span);
+    let meta_sized = collect_bounds(hir_bounds, self_ty_where_predicates, meta_sized_did);
+
+    let pointee_sized_did = tcx.require_lang_item(LangItem::PointeeSized, span);
+    let pointee_sized = collect_bounds(hir_bounds, self_ty_where_predicates, pointee_sized_did);
+
+    CollectedSizednessBounds { sized, meta_sized, pointee_sized }
+}
+
+/// Add a trait bound for `did`.
+fn add_trait_bound<'tcx>(
+    tcx: TyCtxt<'tcx>,
+    bounds: &mut Vec<(ty::Clause<'tcx>, Span)>,
+    self_ty: Ty<'tcx>,
+    did: DefId,
+    span: Span,
+) {
+    let trait_ref = ty::TraitRef::new(tcx, did, [self_ty]);
+    // Preferable to put sizedness obligations first, since we report better errors for `Sized`
+    // ambiguity.
+    bounds.insert(0, (trait_ref.upcast(tcx), span));
+}
+
 impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
-    pub(crate) fn add_default_traits(
+    /// Skip `PointeeSized` bounds.
+    ///
+    /// `PointeeSized` is a "fake bound" insofar as anywhere a `PointeeSized` bound exists, there
+    /// is actually the absence of any bounds. This avoids limitations around non-global where
+    /// clauses being preferred over item bounds (where `PointeeSized` bounds would be
+    /// proven) - which can result in errors when a `PointeeSized` supertrait/bound/predicate is
+    /// added to some items.
+    pub(crate) fn should_skip_sizedness_bound<'hir>(
+        &self,
+        bound: &'hir hir::GenericBound<'tcx>,
+    ) -> bool {
+        bound
+            .trait_ref()
+            .and_then(|tr| tr.trait_def_id())
+            .map(|did| self.tcx().is_lang_item(did, LangItem::PointeeSized))
+            .unwrap_or(false)
+    }
+
+    /// Adds sizedness bounds to a trait, trait alias, parameter, opaque type or associated type.
+    ///
+    /// - On parameters, opaque type and associated types, add default `Sized` bound if no explicit
+    ///   sizedness bounds are present.
+    /// - On traits and trait aliases, add default `MetaSized` supertrait if no explicit sizedness
+    ///   bounds are present.
+    /// - On parameters, opaque type, associated types and trait aliases, add a `MetaSized` bound if
+    ///   a `?Sized` bound is present.
+    pub(crate) fn add_sizedness_bounds(
         &self,
         bounds: &mut Vec<(ty::Clause<'tcx>, Span)>,
         self_ty: Ty<'tcx>,
-        hir_bounds: &[hir::GenericBound<'tcx>],
+        hir_bounds: &'tcx [hir::GenericBound<'tcx>],
         self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
+        trait_did: Option<LocalDefId>,
         span: Span,
     ) {
-        self.add_default_traits_with_filter(
-            bounds,
-            self_ty,
-            hir_bounds,
-            self_ty_where_predicates,
-            span,
-            |_| true,
-        );
+        let tcx = self.tcx();
+
+        let meta_sized_did = tcx.require_lang_item(LangItem::MetaSized, span);
+        let pointee_sized_did = tcx.require_lang_item(LangItem::PointeeSized, span);
+
+        // If adding sizedness bounds to a trait, then there are some relevant early exits
+        if let Some(trait_did) = trait_did {
+            let trait_did = trait_did.to_def_id();
+            // Never add a default supertrait to `PointeeSized`.
+            if trait_did == pointee_sized_did {
+                return;
+            }
+            // Don't add default sizedness supertraits to auto traits because it isn't possible to
+            // relax an automatically added supertrait on the defn itself.
+            if tcx.trait_is_auto(trait_did) {
+                return;
+            }
+        } else {
+            // Report invalid unbounds on sizedness-bounded generic parameters.
+            let unbounds = collect_unbounds(hir_bounds, self_ty_where_predicates);
+            self.check_and_report_invalid_unbounds_on_param(unbounds);
+        }
+
+        let collected = collect_sizedness_bounds(tcx, hir_bounds, self_ty_where_predicates, span);
+        if (collected.sized.maybe || collected.sized.negative)
+            && !collected.sized.positive
+            && !collected.meta_sized.any()
+            && !collected.pointee_sized.any()
+        {
+            // `?Sized` is equivalent to `MetaSized` (but only add the bound if there aren't any
+            // other explicit ones) - this can happen for trait aliases as well as bounds.
+            add_trait_bound(tcx, bounds, self_ty, meta_sized_did, span);
+        } else if !collected.any() {
+            if trait_did.is_some() {
+                // If there are no explicit sizedness bounds on a trait then add a default
+                // `MetaSized` supertrait.
+                add_trait_bound(tcx, bounds, self_ty, meta_sized_did, span);
+            } else {
+                // If there are no explicit sizedness bounds on a parameter then add a default
+                // `Sized` bound.
+                let sized_did = tcx.require_lang_item(LangItem::Sized, span);
+                add_trait_bound(tcx, bounds, self_ty, sized_did, span);
+            }
+        }
     }
 
     /// Checks whether `Self: DefaultAutoTrait` bounds should be added on trait super bounds
@@ -146,13 +336,12 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
 
         if !self.requires_default_supertraits(trait_bounds, trait_generics) {
             let self_ty_where_predicates = (parent, trait_item.generics.predicates);
-            self.add_default_traits_with_filter(
+            self.add_default_traits(
                 bounds,
                 tcx.types.self_param,
                 &[],
                 Some(self_ty_where_predicates),
                 trait_item.span,
-                |tr| tr != hir::LangItem::Sized,
             );
         }
     }
@@ -174,41 +363,37 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
         assert!(matches!(self.tcx().def_kind(trait_def_id), DefKind::Trait | DefKind::TraitAlias));
         if self.requires_default_supertraits(hir_bounds, hir_generics) {
             let self_ty_where_predicates = (trait_def_id, hir_generics.predicates);
-            self.add_default_traits_with_filter(
+            self.add_default_traits(
                 bounds,
                 self.tcx().types.self_param,
                 hir_bounds,
                 Some(self_ty_where_predicates),
                 span,
-                |default_trait| default_trait != hir::LangItem::Sized,
             );
         }
     }
 
-    pub(crate) fn add_default_traits_with_filter(
+    pub(crate) fn add_default_traits(
         &self,
         bounds: &mut Vec<(ty::Clause<'tcx>, Span)>,
         self_ty: Ty<'tcx>,
         hir_bounds: &[hir::GenericBound<'tcx>],
         self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
         span: Span,
-        f: impl Fn(hir::LangItem) -> bool,
     ) {
-        self.tcx().default_traits().iter().filter(|&&default_trait| f(default_trait)).for_each(
-            |default_trait| {
-                self.add_default_trait(
-                    *default_trait,
-                    bounds,
-                    self_ty,
-                    hir_bounds,
-                    self_ty_where_predicates,
-                    span,
-                );
-            },
-        );
+        self.tcx().default_traits().iter().for_each(|default_trait| {
+            self.add_default_trait(
+                *default_trait,
+                bounds,
+                self_ty,
+                hir_bounds,
+                self_ty_where_predicates,
+                span,
+            );
+        });
     }
 
-    /// Add a `Sized` or `experimental_default_bounds` bounds to the `bounds` if appropriate.
+    /// Add a `experimental_default_bounds` bound to the `bounds` if appropriate.
     ///
     /// Doesn't add the bound if the HIR bounds contain any of `Trait`, `?Trait` or `!Trait`.
     pub(crate) fn add_default_trait(
@@ -220,7 +405,8 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
         self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
         span: Span,
     ) {
-        let trait_id = self.tcx().lang_items().get(trait_);
+        let tcx = self.tcx();
+        let trait_id = tcx.lang_items().get(trait_);
         if let Some(trait_id) = trait_id
             && self.do_not_provide_default_trait_bound(
                 trait_id,
@@ -228,11 +414,7 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
                 self_ty_where_predicates,
             )
         {
-            // There was no `?Trait` or `!Trait` bound;
-            // add `Trait` if it's available.
-            let trait_ref = ty::TraitRef::new(self.tcx(), trait_id, [self_ty]);
-            // Preferable to put this obligation first, since we report better errors for sized ambiguity.
-            bounds.insert(0, (trait_ref.upcast(self.tcx()), span));
+            add_trait_bound(tcx, bounds, self_ty, trait_id, span);
         }
     }
 
@@ -242,90 +424,8 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
         hir_bounds: &'a [hir::GenericBound<'tcx>],
         self_ty_where_predicates: Option<(LocalDefId, &'tcx [hir::WherePredicate<'tcx>])>,
     ) -> bool {
-        let tcx = self.tcx();
-        let mut seen_negative_bound = false;
-        let mut seen_positive_bound = false;
-
-        // Try to find an unbound in bounds.
-        let mut unbounds: SmallVec<[_; 1]> = SmallVec::new();
-        let mut search_bounds = |hir_bounds: &'a [hir::GenericBound<'tcx>]| {
-            for hir_bound in hir_bounds {
-                let hir::GenericBound::Trait(ptr) = hir_bound else {
-                    continue;
-                };
-                match ptr.modifiers.polarity {
-                    hir::BoundPolarity::Maybe(_) => unbounds.push(ptr),
-                    hir::BoundPolarity::Negative(_) => {
-                        if ptr.trait_ref.path.res == Res::Def(DefKind::Trait, trait_def_id) {
-                            seen_negative_bound = true;
-                        }
-                    }
-                    hir::BoundPolarity::Positive => {
-                        if ptr.trait_ref.path.res == Res::Def(DefKind::Trait, trait_def_id) {
-                            seen_positive_bound = true;
-                        }
-                    }
-                }
-            }
-        };
-        search_bounds(hir_bounds);
-        if let Some((self_ty, where_clause)) = self_ty_where_predicates {
-            for clause in where_clause {
-                if let hir::WherePredicateKind::BoundPredicate(pred) = clause.kind
-                    && pred.is_param_bound(self_ty.to_def_id())
-                {
-                    search_bounds(pred.bounds);
-                }
-            }
-        }
-
-        let mut unique_bounds = FxIndexSet::default();
-        let mut seen_repeat = false;
-        for unbound in &unbounds {
-            if let Res::Def(DefKind::Trait, unbound_def_id) = unbound.trait_ref.path.res {
-                seen_repeat |= !unique_bounds.insert(unbound_def_id);
-            }
-        }
-        if unbounds.len() > 1 {
-            let err = errors::MultipleRelaxedDefaultBounds {
-                spans: unbounds.iter().map(|ptr| ptr.span).collect(),
-            };
-            if seen_repeat {
-                self.dcx().emit_err(err);
-            } else if !tcx.features().more_maybe_bounds() {
-                self.tcx().sess.create_feature_err(err, sym::more_maybe_bounds).emit();
-            };
-        }
-
-        let mut seen_unbound = false;
-        for unbound in unbounds {
-            let unbound_def_id = unbound.trait_ref.trait_def_id();
-            if unbound_def_id == Some(trait_def_id) {
-                seen_unbound = true;
-            }
-            let emit_relax_err = || {
-                let unbound_traits = match tcx.sess.opts.unstable_opts.experimental_default_bounds {
-                    true => "`?Sized` and `experimental_default_bounds`",
-                    false => "`?Sized`",
-                };
-                // There was a `?Trait` bound, but it was neither `?Sized` nor `experimental_default_bounds`.
-                self.dcx().span_err(
-                    unbound.span,
-                    format!(
-                        "relaxing a default bound only does something for {}; \
-                    all other traits are not bound by default",
-                        unbound_traits
-                    ),
-                );
-            };
-            match unbound_def_id {
-                Some(def_id) if !tcx.is_default_trait(def_id) => emit_relax_err(),
-                None => emit_relax_err(),
-                _ => {}
-            }
-        }
-
-        !(seen_unbound || seen_negative_bound || seen_positive_bound)
+        let collected = collect_bounds(hir_bounds, self_ty_where_predicates, trait_def_id);
+        !collected.any()
     }
 
     /// Lower HIR bounds into `bounds` given the self type `param_ty` and the overarching late-bound vars if any.
@@ -361,6 +461,10 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
         'tcx: 'hir,
     {
         for hir_bound in hir_bounds {
+            if self.should_skip_sizedness_bound(hir_bound) {
+                continue;
+            }
+
             // In order to avoid cycles, when we're lowering `SelfTraitThatDefines`,
             // we skip over any traits that don't define the given associated type.
             if let PredicateFilter::SelfTraitThatDefines(assoc_ident) = predicate_filter {
@@ -927,7 +1031,7 @@ struct GenericParamAndBoundVarCollector<'a, 'tcx> {
 impl<'tcx> TypeVisitor<TyCtxt<'tcx>> for GenericParamAndBoundVarCollector<'_, 'tcx> {
     type Result = ControlFlow<ErrorGuaranteed>;
 
-    fn visit_binder<T: TypeFoldable<TyCtxt<'tcx>>>(
+    fn visit_binder<T: TypeVisitable<TyCtxt<'tcx>>>(
         &mut self,
         binder: &ty::Binder<'tcx, T>,
     ) -> Self::Result {
diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/dyn_compatibility.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/dyn_compatibility.rs
index c7cdf1d5bd2..05465b47a26 100644
--- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/dyn_compatibility.rs
+++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/dyn_compatibility.rs
@@ -61,14 +61,7 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
         let ast_bounds: Vec<_> =
             hir_bounds.iter().map(|&trait_ref| hir::GenericBound::Trait(trait_ref)).collect();
 
-        self.add_default_traits_with_filter(
-            &mut user_written_bounds,
-            dummy_self,
-            &ast_bounds,
-            None,
-            span,
-            |tr| tr != hir::LangItem::Sized,
-        );
+        self.add_default_traits(&mut user_written_bounds, dummy_self, &ast_bounds, None, span);
 
         let (elaborated_trait_bounds, elaborated_projection_bounds) =
             traits::expand_trait_aliases(tcx, user_written_bounds.iter().copied());
diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/errors.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/errors.rs
index 45fee0fa402..1cda6dff21e 100644
--- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/errors.rs
+++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/errors.rs
@@ -8,7 +8,7 @@ use rustc_errors::{
 };
 use rustc_hir::def::{CtorOf, DefKind, Res};
 use rustc_hir::def_id::DefId;
-use rustc_hir::{self as hir, HirId};
+use rustc_hir::{self as hir, HirId, LangItem, PolyTraitRef};
 use rustc_middle::bug;
 use rustc_middle::ty::fast_reject::{TreatParams, simplify_type};
 use rustc_middle::ty::print::{PrintPolyTraitRefExt as _, PrintTraitRefExt as _};
@@ -34,6 +34,57 @@ use crate::fluent_generated as fluent;
 use crate::hir_ty_lowering::{AssocItemQSelf, HirTyLowerer};
 
 impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
+    /// Check for multiple relaxed default bounds and relaxed bounds of non-sizedness traits.
+    pub(crate) fn check_and_report_invalid_unbounds_on_param(
+        &self,
+        unbounds: SmallVec<[&PolyTraitRef<'_>; 1]>,
+    ) {
+        let tcx = self.tcx();
+
+        let sized_did = tcx.require_lang_item(LangItem::Sized, DUMMY_SP);
+
+        let mut unique_bounds = FxIndexSet::default();
+        let mut seen_repeat = false;
+        for unbound in &unbounds {
+            if let Res::Def(DefKind::Trait, unbound_def_id) = unbound.trait_ref.path.res {
+                seen_repeat |= !unique_bounds.insert(unbound_def_id);
+            }
+        }
+
+        if unbounds.len() > 1 {
+            let err = errors::MultipleRelaxedDefaultBounds {
+                spans: unbounds.iter().map(|ptr| ptr.span).collect(),
+            };
+
+            if seen_repeat {
+                tcx.dcx().emit_err(err);
+            } else if !tcx.features().more_maybe_bounds() {
+                tcx.sess.create_feature_err(err, sym::more_maybe_bounds).emit();
+            };
+        }
+
+        for unbound in unbounds {
+            if let Res::Def(DefKind::Trait, did) = unbound.trait_ref.path.res
+                && ((did == sized_did) || tcx.is_default_trait(did))
+            {
+                continue;
+            }
+
+            let unbound_traits = match tcx.sess.opts.unstable_opts.experimental_default_bounds {
+                true => "`?Sized` and `experimental_default_bounds`",
+                false => "`?Sized`",
+            };
+            self.dcx().span_err(
+                unbound.span,
+                format!(
+                    "relaxing a default bound only does something for {}; all other traits are \
+                     not bound by default",
+                    unbound_traits
+                ),
+            );
+        }
+    }
+
     /// On missing type parameters, emit an E0393 error and provide a structured suggestion using
     /// the type parameter's name as a placeholder.
     pub(crate) fn report_missing_type_params(
diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/generics.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/generics.rs
index 3a26b8331f8..8c7c3750865 100644
--- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/generics.rs
+++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/generics.rs
@@ -8,7 +8,7 @@ use rustc_middle::ty::{
     self, GenericArgsRef, GenericParamDef, GenericParamDefKind, IsSuggestable, Ty,
 };
 use rustc_session::lint::builtin::LATE_BOUND_LIFETIME_ARGUMENTS;
-use rustc_span::{kw, sym};
+use rustc_span::kw;
 use smallvec::SmallVec;
 use tracing::{debug, instrument};
 
@@ -258,19 +258,6 @@ pub fn lower_generic_args<'tcx: 'a, 'a>(
                             GenericParamDefKind::Const { .. },
                             _,
                         ) => {
-                            if let GenericParamDefKind::Const { .. } = param.kind
-                                && let GenericArg::Infer(inf) = arg
-                                && !tcx.features().generic_arg_infer()
-                            {
-                                rustc_session::parse::feature_err(
-                                    tcx.sess,
-                                    sym::generic_arg_infer,
-                                    inf.span,
-                                    "const arguments cannot yet be inferred with `_`",
-                                )
-                                .emit();
-                            }
-
                             // We lower to an infer even when the feature gate is not enabled
                             // as it is useful for diagnostics to be able to see a `ConstKind::Infer`
                             args.push(ctx.provided_kind(&args, param, arg));
diff --git a/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs b/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs
index 4deb47dfff8..bf407cbaccb 100644
--- a/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs
+++ b/compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs
@@ -2708,16 +2708,6 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
         }
     }
 
-    pub fn lower_arg_ty(&self, ty: &hir::Ty<'tcx>, expected_ty: Option<Ty<'tcx>>) -> Ty<'tcx> {
-        match ty.kind {
-            hir::TyKind::Infer(()) if let Some(expected_ty) = expected_ty => {
-                self.record_ty(ty.hir_id, expected_ty, ty.span);
-                expected_ty
-            }
-            _ => self.lower_ty(ty),
-        }
-    }
-
     /// Lower a function type from the HIR to our internal notion of a function signature.
     #[instrument(level = "debug", skip(self, hir_id, safety, abi, decl, generics, hir_ty), ret)]
     pub fn lower_fn_ty(
diff --git a/compiler/rustc_hir_analysis/src/lib.rs b/compiler/rustc_hir_analysis/src/lib.rs
index a92ee89186c..7c8c9425a03 100644
--- a/compiler/rustc_hir_analysis/src/lib.rs
+++ b/compiler/rustc_hir_analysis/src/lib.rs
@@ -92,8 +92,9 @@ mod variance;
 
 pub use errors::NoVariantNamed;
 use rustc_abi::ExternAbi;
-use rustc_hir as hir;
 use rustc_hir::def::DefKind;
+use rustc_hir::lints::DelayedLint;
+use rustc_hir::{self as hir};
 use rustc_middle::middle;
 use rustc_middle::mir::interpret::GlobalId;
 use rustc_middle::query::Providers;
@@ -114,12 +115,6 @@ fn require_c_abi_if_c_variadic(
     abi: ExternAbi,
     span: Span,
 ) {
-    const CONVENTIONS_UNSTABLE: &str =
-        "`C`, `cdecl`, `system`, `aapcs`, `win64`, `sysv64` or `efiapi`";
-    const CONVENTIONS_STABLE: &str = "`C` or `cdecl`";
-    const UNSTABLE_EXPLAIN: &str =
-        "using calling conventions other than `C` or `cdecl` for varargs functions is unstable";
-
     // ABIs which can stably use varargs
     if !decl.c_variadic || matches!(abi, ExternAbi::C { .. } | ExternAbi::Cdecl { .. }) {
         return;
@@ -139,20 +134,18 @@ fn require_c_abi_if_c_variadic(
 
     // Looks like we need to pick an error to emit.
     // Is there any feature which we could have enabled to make this work?
+    let unstable_explain =
+        format!("C-variadic functions with the {abi} calling convention are unstable");
     match abi {
         ExternAbi::System { .. } => {
-            feature_err(&tcx.sess, sym::extern_system_varargs, span, UNSTABLE_EXPLAIN)
+            feature_err(&tcx.sess, sym::extern_system_varargs, span, unstable_explain)
         }
         abi if abi.supports_varargs() => {
-            feature_err(&tcx.sess, sym::extended_varargs_abi_support, span, UNSTABLE_EXPLAIN)
+            feature_err(&tcx.sess, sym::extended_varargs_abi_support, span, unstable_explain)
         }
         _ => tcx.dcx().create_err(errors::VariadicFunctionCompatibleConvention {
             span,
-            conventions: if tcx.sess.opts.unstable_features.is_nightly_build() {
-                CONVENTIONS_UNSTABLE
-            } else {
-                CONVENTIONS_STABLE
-            },
+            convention: &format!("{abi}"),
         }),
     }
     .emit();
@@ -174,6 +167,14 @@ pub fn provide(providers: &mut Providers) {
     };
 }
 
+fn emit_delayed_lint(lint: &DelayedLint, tcx: TyCtxt<'_>) {
+    match lint {
+        DelayedLint::AttributeParsing(attribute_lint) => {
+            rustc_attr_parsing::emit_attribute_lint(attribute_lint, tcx)
+        }
+    }
+}
+
 pub fn check_crate(tcx: TyCtxt<'_>) {
     let _prof_timer = tcx.sess.timer("type_check_crate");
 
@@ -192,6 +193,42 @@ pub fn check_crate(tcx: TyCtxt<'_>) {
         let _: R = tcx.ensure_ok().crate_inherent_impls_overlap_check(());
     });
 
+    tcx.sess.time("emit_ast_lowering_delayed_lints", || {
+        // sanity check in debug mode that all lints are really noticed
+        // and we really will emit them all in the loop right below.
+        //
+        // during ast lowering, when creating items, foreign items, trait items and impl items
+        // we store in them whether they have any lints in their owner node that should be
+        // picked up by `hir_crate_items`. However, theoretically code can run between that
+        // boolean being inserted into the item and the owner node being created.
+        // We don't want any new lints to be emitted there
+        // (though honestly, you have to really try to manage to do that but still),
+        // but this check is there to catch that.
+        #[cfg(debug_assertions)]
+        {
+            // iterate over all owners
+            for owner_id in tcx.hir_crate_items(()).owners() {
+                // if it has delayed lints
+                if let Some(delayed_lints) = tcx.opt_ast_lowering_delayed_lints(owner_id) {
+                    if !delayed_lints.lints.is_empty() {
+                        // assert that delayed_lint_items also picked up this item to have lints
+                        assert!(
+                            tcx.hir_crate_items(()).delayed_lint_items().any(|i| i == owner_id)
+                        );
+                    }
+                }
+            }
+        }
+
+        for owner_id in tcx.hir_crate_items(()).delayed_lint_items() {
+            if let Some(delayed_lints) = tcx.opt_ast_lowering_delayed_lints(owner_id) {
+                for lint in &delayed_lints.lints {
+                    emit_delayed_lint(lint, tcx);
+                }
+            }
+        }
+    });
+
     tcx.par_hir_body_owners(|item_def_id| {
         let def_kind = tcx.def_kind(item_def_id);
         // Make sure we evaluate all static and (non-associated) const items, even if unused.
diff --git a/compiler/rustc_hir_pretty/src/lib.rs b/compiler/rustc_hir_pretty/src/lib.rs
index b23b3125c59..fc507285860 100644
--- a/compiler/rustc_hir_pretty/src/lib.rs
+++ b/compiler/rustc_hir_pretty/src/lib.rs
@@ -80,6 +80,13 @@ impl<'a> State<'a> {
         (self.attrs)(id)
     }
 
+    fn precedence(&self, expr: &hir::Expr<'_>) -> ExprPrecedence {
+        let for_each_attr = |id: HirId, callback: &mut dyn FnMut(&hir::Attribute)| {
+            self.attrs(id).iter().for_each(callback);
+        };
+        expr.precedence(&for_each_attr)
+    }
+
     fn print_attrs_as_inner(&mut self, attrs: &[hir::Attribute]) {
         self.print_either_attributes(attrs, ast::AttrStyle::Inner)
     }
@@ -1164,7 +1171,7 @@ impl<'a> State<'a> {
         }
         self.space();
         self.word_space("=");
-        let npals = || parser::needs_par_as_let_scrutinee(init.precedence());
+        let npals = || parser::needs_par_as_let_scrutinee(self.precedence(init));
         self.print_expr_cond_paren(init, Self::cond_needs_par(init) || npals())
     }
 
@@ -1265,7 +1272,7 @@ impl<'a> State<'a> {
     fn print_expr_call(&mut self, func: &hir::Expr<'_>, args: &[hir::Expr<'_>]) {
         let needs_paren = match func.kind {
             hir::ExprKind::Field(..) => true,
-            _ => func.precedence() < ExprPrecedence::Unambiguous,
+            _ => self.precedence(func) < ExprPrecedence::Unambiguous,
         };
 
         self.print_expr_cond_paren(func, needs_paren);
@@ -1279,7 +1286,10 @@ impl<'a> State<'a> {
         args: &[hir::Expr<'_>],
     ) {
         let base_args = args;
-        self.print_expr_cond_paren(receiver, receiver.precedence() < ExprPrecedence::Unambiguous);
+        self.print_expr_cond_paren(
+            receiver,
+            self.precedence(receiver) < ExprPrecedence::Unambiguous,
+        );
         self.word(".");
         self.print_ident(segment.ident);
 
@@ -1293,8 +1303,8 @@ impl<'a> State<'a> {
 
     fn print_expr_binary(&mut self, op: hir::BinOpKind, lhs: &hir::Expr<'_>, rhs: &hir::Expr<'_>) {
         let binop_prec = op.precedence();
-        let left_prec = lhs.precedence();
-        let right_prec = rhs.precedence();
+        let left_prec = self.precedence(lhs);
+        let right_prec = self.precedence(rhs);
 
         let (mut left_needs_paren, right_needs_paren) = match op.fixity() {
             Fixity::Left => (left_prec < binop_prec, right_prec <= binop_prec),
@@ -1323,7 +1333,7 @@ impl<'a> State<'a> {
 
     fn print_expr_unary(&mut self, op: hir::UnOp, expr: &hir::Expr<'_>) {
         self.word(op.as_str());
-        self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Prefix);
+        self.print_expr_cond_paren(expr, self.precedence(expr) < ExprPrecedence::Prefix);
     }
 
     fn print_expr_addr_of(
@@ -1340,7 +1350,7 @@ impl<'a> State<'a> {
                 self.print_mutability(mutability, true);
             }
         }
-        self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Prefix);
+        self.print_expr_cond_paren(expr, self.precedence(expr) < ExprPrecedence::Prefix);
     }
 
     fn print_literal(&mut self, lit: &hir::Lit) {
@@ -1483,7 +1493,7 @@ impl<'a> State<'a> {
                 self.print_literal(lit);
             }
             hir::ExprKind::Cast(expr, ty) => {
-                self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Cast);
+                self.print_expr_cond_paren(expr, self.precedence(expr) < ExprPrecedence::Cast);
                 self.space();
                 self.word_space("as");
                 self.print_type(ty);
@@ -1580,24 +1590,30 @@ impl<'a> State<'a> {
                 self.print_block(blk, cb, ib);
             }
             hir::ExprKind::Assign(lhs, rhs, _) => {
-                self.print_expr_cond_paren(lhs, lhs.precedence() <= ExprPrecedence::Assign);
+                self.print_expr_cond_paren(lhs, self.precedence(lhs) <= ExprPrecedence::Assign);
                 self.space();
                 self.word_space("=");
-                self.print_expr_cond_paren(rhs, rhs.precedence() < ExprPrecedence::Assign);
+                self.print_expr_cond_paren(rhs, self.precedence(rhs) < ExprPrecedence::Assign);
             }
             hir::ExprKind::AssignOp(op, lhs, rhs) => {
-                self.print_expr_cond_paren(lhs, lhs.precedence() <= ExprPrecedence::Assign);
+                self.print_expr_cond_paren(lhs, self.precedence(lhs) <= ExprPrecedence::Assign);
                 self.space();
                 self.word_space(op.node.as_str());
-                self.print_expr_cond_paren(rhs, rhs.precedence() < ExprPrecedence::Assign);
+                self.print_expr_cond_paren(rhs, self.precedence(rhs) < ExprPrecedence::Assign);
             }
             hir::ExprKind::Field(expr, ident) => {
-                self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Unambiguous);
+                self.print_expr_cond_paren(
+                    expr,
+                    self.precedence(expr) < ExprPrecedence::Unambiguous,
+                );
                 self.word(".");
                 self.print_ident(ident);
             }
             hir::ExprKind::Index(expr, index, _) => {
-                self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Unambiguous);
+                self.print_expr_cond_paren(
+                    expr,
+                    self.precedence(expr) < ExprPrecedence::Unambiguous,
+                );
                 self.word("[");
                 self.print_expr(index);
                 self.word("]");
@@ -1611,7 +1627,7 @@ impl<'a> State<'a> {
                 }
                 if let Some(expr) = opt_expr {
                     self.space();
-                    self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Jump);
+                    self.print_expr_cond_paren(expr, self.precedence(expr) < ExprPrecedence::Jump);
                 }
             }
             hir::ExprKind::Continue(destination) => {
@@ -1625,13 +1641,13 @@ impl<'a> State<'a> {
                 self.word("return");
                 if let Some(expr) = result {
                     self.word(" ");
-                    self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Jump);
+                    self.print_expr_cond_paren(expr, self.precedence(expr) < ExprPrecedence::Jump);
                 }
             }
             hir::ExprKind::Become(result) => {
                 self.word("become");
                 self.word(" ");
-                self.print_expr_cond_paren(result, result.precedence() < ExprPrecedence::Jump);
+                self.print_expr_cond_paren(result, self.precedence(result) < ExprPrecedence::Jump);
             }
             hir::ExprKind::InlineAsm(asm) => {
                 self.word("asm!");
@@ -1669,7 +1685,7 @@ impl<'a> State<'a> {
             }
             hir::ExprKind::Yield(expr, _) => {
                 self.word_space("yield");
-                self.print_expr_cond_paren(expr, expr.precedence() < ExprPrecedence::Jump);
+                self.print_expr_cond_paren(expr, self.precedence(expr) < ExprPrecedence::Jump);
             }
             hir::ExprKind::Err(_) => {
                 self.popen();
diff --git a/compiler/rustc_hir_typeck/messages.ftl b/compiler/rustc_hir_typeck/messages.ftl
index 3bdd1b48666..ac7ff65528d 100644
--- a/compiler/rustc_hir_typeck/messages.ftl
+++ b/compiler/rustc_hir_typeck/messages.ftl
@@ -1,3 +1,7 @@
+hir_typeck_abi_custom_call =
+    functions with the `"custom"` ABI cannot be called
+    .note = an `extern "custom"` function can only be called from within inline assembly
+
 hir_typeck_add_missing_parentheses_in_range = you must surround the range in parentheses to call its `{$func_name}` function
 
 hir_typeck_add_return_type_add = try adding a return type
diff --git a/compiler/rustc_hir_typeck/src/callee.rs b/compiler/rustc_hir_typeck/src/callee.rs
index d173fe7c2c2..80bff09d0a4 100644
--- a/compiler/rustc_hir_typeck/src/callee.rs
+++ b/compiler/rustc_hir_typeck/src/callee.rs
@@ -1,5 +1,6 @@
 use std::iter;
 
+use rustc_abi::ExternAbi;
 use rustc_ast::util::parser::ExprPrecedence;
 use rustc_errors::{Applicability, Diag, ErrorGuaranteed, StashKey};
 use rustc_hir::def::{self, CtorKind, Namespace, Res};
@@ -83,6 +84,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
         while result.is_none() && autoderef.next().is_some() {
             result = self.try_overloaded_call_step(call_expr, callee_expr, arg_exprs, &autoderef);
         }
+        self.check_call_custom_abi(autoderef.final_ty(false), call_expr.span);
         self.register_predicates(autoderef.into_obligations());
 
         let output = match result {
@@ -135,6 +137,22 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
         output
     }
 
+    /// Functions of type `extern "custom" fn(/* ... */)` cannot be called using `ExprKind::Call`.
+    ///
+    /// These functions have a calling convention that is unknown to rust, hence it cannot generate
+    /// code for the call. The only way to execute such a function is via inline assembly.
+    fn check_call_custom_abi(&self, callee_ty: Ty<'tcx>, span: Span) {
+        let abi = match callee_ty.kind() {
+            ty::FnDef(def_id, _) => self.tcx.fn_sig(def_id).skip_binder().skip_binder().abi,
+            ty::FnPtr(_, header) => header.abi,
+            _ => return,
+        };
+
+        if let ExternAbi::Custom = abi {
+            self.tcx.dcx().emit_err(errors::AbiCustomCall { span });
+        }
+    }
+
     #[instrument(level = "debug", skip(self, call_expr, callee_expr, arg_exprs, autoderef), ret)]
     fn try_overloaded_call_step(
         &self,
@@ -602,7 +620,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
             };
 
             if let Ok(rest_snippet) = rest_snippet {
-                let sugg = if callee_expr.precedence() >= ExprPrecedence::Unambiguous {
+                let sugg = if self.precedence(callee_expr) >= ExprPrecedence::Unambiguous {
                     vec![
                         (up_to_rcvr_span, "".to_string()),
                         (rest_span, format!(".{}({rest_snippet}", segment.ident)),
diff --git a/compiler/rustc_hir_typeck/src/cast.rs b/compiler/rustc_hir_typeck/src/cast.rs
index e17cfc15a43..6f8abc1e67d 100644
--- a/compiler/rustc_hir_typeck/src/cast.rs
+++ b/compiler/rustc_hir_typeck/src/cast.rs
@@ -1100,7 +1100,7 @@ impl<'a, 'tcx> CastCheck<'tcx> {
     }
 
     fn lossy_provenance_ptr2int_lint(&self, fcx: &FnCtxt<'a, 'tcx>, t_c: ty::cast::IntTy) {
-        let expr_prec = self.expr.precedence();
+        let expr_prec = fcx.precedence(self.expr);
         let needs_parens = expr_prec < ExprPrecedence::Unambiguous;
 
         let needs_cast = !matches!(t_c, ty::cast::IntTy::U(ty::UintTy::Usize));
diff --git a/compiler/rustc_hir_typeck/src/coercion.rs b/compiler/rustc_hir_typeck/src/coercion.rs
index d9fa56fefeb..24092c01125 100644
--- a/compiler/rustc_hir_typeck/src/coercion.rs
+++ b/compiler/rustc_hir_typeck/src/coercion.rs
@@ -1662,9 +1662,7 @@ impl<'tcx, 'exprs, E: AsCoercionSite> CoerceMany<'tcx, 'exprs, E> {
                             blk_id,
                             expression,
                         );
-                        if !fcx.tcx.features().unsized_locals() {
-                            unsized_return = self.is_return_ty_definitely_unsized(fcx);
-                        }
+                        unsized_return = self.is_return_ty_definitely_unsized(fcx);
                     }
                     ObligationCauseCode::ReturnValue(return_expr_id) => {
                         err = self.report_return_mismatched_types(
@@ -1676,9 +1674,7 @@ impl<'tcx, 'exprs, E: AsCoercionSite> CoerceMany<'tcx, 'exprs, E> {
                             return_expr_id,
                             expression,
                         );
-                        if !fcx.tcx.features().unsized_locals() {
-                            unsized_return = self.is_return_ty_definitely_unsized(fcx);
-                        }
+                        unsized_return = self.is_return_ty_definitely_unsized(fcx);
                     }
                     ObligationCauseCode::MatchExpressionArm(box MatchExpressionArmCause {
                         arm_span,
diff --git a/compiler/rustc_hir_typeck/src/errors.rs b/compiler/rustc_hir_typeck/src/errors.rs
index 774815015d5..abb8cdc1cdf 100644
--- a/compiler/rustc_hir_typeck/src/errors.rs
+++ b/compiler/rustc_hir_typeck/src/errors.rs
@@ -1163,3 +1163,10 @@ pub(crate) struct NakedFunctionsMustNakedAsm {
     #[label]
     pub span: Span,
 }
+
+#[derive(Diagnostic)]
+#[diag(hir_typeck_abi_custom_call)]
+pub(crate) struct AbiCustomCall {
+    #[primary_span]
+    pub span: Span,
+}
diff --git a/compiler/rustc_hir_typeck/src/expr.rs b/compiler/rustc_hir_typeck/src/expr.rs
index dfc7935d02b..55c39d960e7 100644
--- a/compiler/rustc_hir_typeck/src/expr.rs
+++ b/compiler/rustc_hir_typeck/src/expr.rs
@@ -5,7 +5,8 @@
 //!
 //! See [`rustc_hir_analysis::check`] for more context on type checking in general.
 
-use rustc_abi::{FIRST_VARIANT, FieldIdx};
+use rustc_abi::{ExternAbi, FIRST_VARIANT, FieldIdx};
+use rustc_ast::util::parser::ExprPrecedence;
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
 use rustc_data_structures::stack::ensure_sufficient_stack;
 use rustc_data_structures::unord::UnordMap;
@@ -17,7 +18,7 @@ use rustc_errors::{
 use rustc_hir::def::{CtorKind, DefKind, Res};
 use rustc_hir::def_id::DefId;
 use rustc_hir::lang_items::LangItem;
-use rustc_hir::{ExprKind, HirId, QPath};
+use rustc_hir::{Attribute, ExprKind, HirId, QPath};
 use rustc_hir_analysis::NoVariantNamed;
 use rustc_hir_analysis::hir_ty_lowering::{FeedConstTy, HirTyLowerer as _};
 use rustc_infer::infer;
@@ -54,6 +55,30 @@ use crate::{
 };
 
 impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
+    pub(crate) fn precedence(&self, expr: &hir::Expr<'_>) -> ExprPrecedence {
+        let for_each_attr = |id: HirId, callback: &mut dyn FnMut(&Attribute)| {
+            for attr in self.tcx.hir_attrs(id) {
+                // For the purpose of rendering suggestions, disregard attributes
+                // that originate from desugaring of any kind. For example, `x?`
+                // desugars to `#[allow(unreachable_code)] match ...`. Failing to
+                // ignore the prefix attribute in the desugaring would cause this
+                // suggestion:
+                //
+                //     let y: u32 = x?.try_into().unwrap();
+                //                    ++++++++++++++++++++
+                //
+                // to be rendered as:
+                //
+                //     let y: u32 = (x?).try_into().unwrap();
+                //                  +  +++++++++++++++++++++
+                if attr.span().desugaring_kind().is_none() {
+                    callback(attr);
+                }
+            }
+        };
+        expr.precedence(&for_each_attr)
+    }
+
     /// Check an expr with an expectation type, and also demand that the expr's
     /// evaluated type is a subtype of the expectation at the end. This is a
     /// *hard* requirement.
@@ -809,9 +834,8 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
                     );
                 }
             }
-            // Here we want to prevent struct constructors from returning unsized types.
-            // There were two cases this happened: fn pointer coercion in stable
-            // and usual function call in presence of unsized_locals.
+            // Here we want to prevent struct constructors from returning unsized types,
+            // which can happen with fn pointer coercion on stable.
             // Also, as we just want to check sizedness, instead of introducing
             // placeholder lifetimes with probing, we just replace higher lifetimes
             // with fresh vars.
@@ -1627,6 +1651,14 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
                     Some(method.def_id),
                 );
 
+                // Functions of type `extern "custom" fn(/* ... */)` cannot be called using
+                // `ExprKind::MethodCall`. These functions have a calling convention that is
+                // unknown to rust, hence it cannot generate code for the call. The only way
+                // to execute such a function is via inline assembly.
+                if let ExternAbi::Custom = method.sig.abi {
+                    self.tcx.dcx().emit_err(crate::errors::AbiCustomCall { span: expr.span });
+                }
+
                 method.sig.output()
             }
             Err(error) => {
diff --git a/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs b/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs
index a43449a8f99..2df19cb21d5 100644
--- a/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs
+++ b/compiler/rustc_hir_typeck/src/fn_ctxt/_impl.rs
@@ -22,8 +22,9 @@ use rustc_infer::infer::{DefineOpaqueTypes, InferResult};
 use rustc_lint::builtin::SELF_CONSTRUCTOR_FROM_OUTER_ITEM;
 use rustc_middle::ty::adjustment::{Adjust, Adjustment, AutoBorrow, AutoBorrowMutability};
 use rustc_middle::ty::{
-    self, AdtKind, CanonicalUserType, GenericArgsRef, GenericParamDefKind, IsIdentity, Ty, TyCtxt,
-    TypeFoldable, TypeVisitable, TypeVisitableExt, UserArgs, UserSelfTy,
+    self, AdtKind, CanonicalUserType, GenericArgsRef, GenericParamDefKind, IsIdentity,
+    SizedTraitKind, Ty, TyCtxt, TypeFoldable, TypeVisitable, TypeVisitableExt, UserArgs,
+    UserSelfTy,
 };
 use rustc_middle::{bug, span_bug};
 use rustc_session::lint;
@@ -439,7 +440,9 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
                 || {},
             );
             // Sized types have static alignment, and so do slices.
-            if tail.is_trivially_sized(self.tcx) || matches!(tail.kind(), ty::Slice(..)) {
+            if tail.has_trivial_sizedness(self.tcx, SizedTraitKind::Sized)
+                || matches!(tail.kind(), ty::Slice(..))
+            {
                 // Nothing else is required here.
             } else {
                 // We can't be sure, let's required full `Sized`.
diff --git a/compiler/rustc_hir_typeck/src/fn_ctxt/inspect_obligations.rs b/compiler/rustc_hir_typeck/src/fn_ctxt/inspect_obligations.rs
index 7f1f3c3c802..e4c62bf027b 100644
--- a/compiler/rustc_hir_typeck/src/fn_ctxt/inspect_obligations.rs
+++ b/compiler/rustc_hir_typeck/src/fn_ctxt/inspect_obligations.rs
@@ -120,15 +120,7 @@ impl<'a, 'tcx> ProofTreeVisitor<'tcx> for NestedObligationsForSelfTy<'a, 'tcx> {
     fn visit_goal(&mut self, inspect_goal: &InspectGoal<'_, 'tcx>) {
         // No need to walk into goal subtrees that certainly hold, since they
         // wouldn't then be stalled on an infer var.
-        // FIXME: We also walk into normalizes-to goals since their certainty
-        // is forced to `Certainty::Yes` since they pass down ambiguous subgoals
-        // to their parent.
-        if inspect_goal.result() == Ok(Certainty::Yes)
-            && !matches!(
-                inspect_goal.goal().predicate.kind().skip_binder(),
-                ty::PredicateKind::NormalizesTo(_)
-            )
-        {
+        if inspect_goal.result() == Ok(Certainty::Yes) {
             return;
         }
 
diff --git a/compiler/rustc_hir_typeck/src/fn_ctxt/mod.rs b/compiler/rustc_hir_typeck/src/fn_ctxt/mod.rs
index 393556928af..e979798a402 100644
--- a/compiler/rustc_hir_typeck/src/fn_ctxt/mod.rs
+++ b/compiler/rustc_hir_typeck/src/fn_ctxt/mod.rs
@@ -382,7 +382,7 @@ impl<'tcx> HirTyLowerer<'tcx> for FnCtxt<'_, 'tcx> {
         _hir_id: rustc_hir::HirId,
         _hir_ty: Option<&hir::Ty<'_>>,
     ) -> (Vec<Ty<'tcx>>, Ty<'tcx>) {
-        let input_tys = decl.inputs.iter().map(|a| self.lowerer().lower_arg_ty(a, None)).collect();
+        let input_tys = decl.inputs.iter().map(|a| self.lowerer().lower_ty(a)).collect();
 
         let output_ty = match decl.output {
             hir::FnRetTy::Return(output) => self.lowerer().lower_ty(output),
diff --git a/compiler/rustc_hir_typeck/src/fn_ctxt/suggestions.rs b/compiler/rustc_hir_typeck/src/fn_ctxt/suggestions.rs
index 66af085cfd4..7e5f1d97a8b 100644
--- a/compiler/rustc_hir_typeck/src/fn_ctxt/suggestions.rs
+++ b/compiler/rustc_hir_typeck/src/fn_ctxt/suggestions.rs
@@ -399,7 +399,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
                     // so we remove the user's `clone` call.
                     {
                         vec![(receiver_method.ident.span, conversion_method_name.to_string())]
-                    } else if expr.precedence() < ExprPrecedence::Unambiguous {
+                    } else if self.precedence(expr) < ExprPrecedence::Unambiguous {
                         vec![
                             (expr.span.shrink_to_lo(), "(".to_string()),
                             (expr.span.shrink_to_hi(), format!(").{}()", conversion_method_name)),
@@ -1395,7 +1395,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
         {
             let span = expr.span.find_oldest_ancestor_in_same_ctxt();
 
-            let mut sugg = if expr.precedence() >= ExprPrecedence::Unambiguous {
+            let mut sugg = if self.precedence(expr) >= ExprPrecedence::Unambiguous {
                 vec![(span.shrink_to_hi(), ".into()".to_owned())]
             } else {
                 vec![
@@ -3106,7 +3106,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
             "change the type of the numeric literal from `{checked_ty}` to `{expected_ty}`",
         );
 
-        let close_paren = if expr.precedence() < ExprPrecedence::Unambiguous {
+        let close_paren = if self.precedence(expr) < ExprPrecedence::Unambiguous {
             sugg.push((expr.span.shrink_to_lo(), "(".to_string()));
             ")"
         } else {
@@ -3131,7 +3131,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
                 let len = src.trim_end_matches(&checked_ty.to_string()).len();
                 span.with_lo(span.lo() + BytePos(len as u32))
             },
-            if expr.precedence() < ExprPrecedence::Unambiguous {
+            if self.precedence(expr) < ExprPrecedence::Unambiguous {
                 // Readd `)`
                 format!("{expected_ty})")
             } else {
diff --git a/compiler/rustc_hir_typeck/src/gather_locals.rs b/compiler/rustc_hir_typeck/src/gather_locals.rs
index 7d99b0e7869..f1d6476a0f3 100644
--- a/compiler/rustc_hir_typeck/src/gather_locals.rs
+++ b/compiler/rustc_hir_typeck/src/gather_locals.rs
@@ -202,7 +202,7 @@ impl<'a, 'tcx> Visitor<'tcx> for GatherLocalsVisitor<'a, 'tcx> {
                         ),
                     );
                 }
-            } else if !self.fcx.tcx.features().unsized_locals() {
+            } else {
                 self.fcx.require_type_is_sized(
                     var_ty,
                     p.span,
diff --git a/compiler/rustc_hir_typeck/src/lib.rs b/compiler/rustc_hir_typeck/src/lib.rs
index a45a7715340..043a687914b 100644
--- a/compiler/rustc_hir_typeck/src/lib.rs
+++ b/compiler/rustc_hir_typeck/src/lib.rs
@@ -48,7 +48,7 @@ use rustc_errors::{Applicability, ErrorGuaranteed, pluralize, struct_span_code_e
 use rustc_hir as hir;
 use rustc_hir::def::{DefKind, Res};
 use rustc_hir::{HirId, HirIdMap, Node};
-use rustc_hir_analysis::check::check_abi;
+use rustc_hir_analysis::check::{check_abi, check_custom_abi};
 use rustc_hir_analysis::hir_ty_lowering::HirTyLowerer;
 use rustc_infer::traits::{ObligationCauseCode, ObligationInspector, WellFormedLoc};
 use rustc_middle::query::Providers;
@@ -138,7 +138,7 @@ fn typeck_with_inspect<'tcx>(
         // for visit the asm expr of the body.
         let ty = fcx.check_expr(body.value);
         fcx.write_ty(id, ty);
-    } else if let Some(hir::FnSig { header, decl, .. }) = node.fn_sig() {
+    } else if let Some(hir::FnSig { header, decl, span: fn_sig_span }) = node.fn_sig() {
         let fn_sig = if decl.output.is_suggestable_infer_ty().is_some() {
             // In the case that we're recovering `fn() -> W<_>` or some other return
             // type that has an infer in it, lower the type directly so that it'll
@@ -150,6 +150,8 @@ fn typeck_with_inspect<'tcx>(
         };
 
         check_abi(tcx, id, span, fn_sig.abi());
+        check_custom_abi(tcx, def_id, fn_sig.skip_binder(), *fn_sig_span);
+
         loops::check(tcx, def_id, body);
 
         // Compute the function signature from point of view of inside the fn.
diff --git a/compiler/rustc_hir_typeck/src/method/suggest.rs b/compiler/rustc_hir_typeck/src/method/suggest.rs
index 2fac13b7201..288d915e85c 100644
--- a/compiler/rustc_hir_typeck/src/method/suggest.rs
+++ b/compiler/rustc_hir_typeck/src/method/suggest.rs
@@ -14,7 +14,9 @@ use rustc_data_structures::fx::{FxIndexMap, FxIndexSet};
 use rustc_data_structures::sorted_map::SortedMap;
 use rustc_data_structures::unord::UnordSet;
 use rustc_errors::codes::*;
-use rustc_errors::{Applicability, Diag, MultiSpan, StashKey, pluralize, struct_span_code_err};
+use rustc_errors::{
+    Applicability, Diag, DiagStyledString, MultiSpan, StashKey, pluralize, struct_span_code_err,
+};
 use rustc_hir::def::{CtorKind, DefKind, Res};
 use rustc_hir::def_id::DefId;
 use rustc_hir::intravisit::{self, Visitor};
@@ -722,7 +724,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
             {
                 let def_path = tcx.def_path_str(adt_def.did());
                 err.span_suggestion(
-                    ty.span.to(item_ident.span),
+                    sugg_span,
                     format!("to construct a value of type `{}`, use the explicit path", def_path),
                     def_path,
                     Applicability::MachineApplicable,
@@ -1569,7 +1571,11 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
             );
         }
 
-        if rcvr_ty.is_numeric() && rcvr_ty.is_fresh() || restrict_type_params || suggested_derive {
+        if rcvr_ty.is_numeric() && rcvr_ty.is_fresh()
+            || restrict_type_params
+            || suggested_derive
+            || self.lookup_alternative_tuple_impls(&mut err, &unsatisfied_predicates)
+        {
         } else {
             self.suggest_traits_to_import(
                 &mut err,
@@ -1744,6 +1750,119 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
         err.emit()
     }
 
+    /// If the predicate failure is caused by an unmet bound on a tuple, recheck if the bound would
+    /// succeed if all the types on the tuple had no borrows. This is a common problem for libraries
+    /// like Bevy and ORMs, which rely heavily on traits being implemented on tuples.
+    fn lookup_alternative_tuple_impls(
+        &self,
+        err: &mut Diag<'_>,
+        unsatisfied_predicates: &[(
+            ty::Predicate<'tcx>,
+            Option<ty::Predicate<'tcx>>,
+            Option<ObligationCause<'tcx>>,
+        )],
+    ) -> bool {
+        let mut found_tuple = false;
+        for (pred, root, _ob) in unsatisfied_predicates {
+            let mut preds = vec![pred];
+            if let Some(root) = root {
+                // We will look at both the current predicate and the root predicate that caused it
+                // to be needed. If calling something like `<(A, &B)>::default()`, then `pred` is
+                // `&B: Default` and `root` is `(A, &B): Default`, which is the one we are checking
+                // for further down, so we check both.
+                preds.push(root);
+            }
+            for pred in preds {
+                if let Some(clause) = pred.as_clause()
+                    && let Some(clause) = clause.as_trait_clause()
+                    && let ty = clause.self_ty().skip_binder()
+                    && let ty::Tuple(types) = ty.kind()
+                {
+                    let path = clause.skip_binder().trait_ref.print_only_trait_path();
+                    let def_id = clause.def_id();
+                    let ty = Ty::new_tup(
+                        self.tcx,
+                        self.tcx.mk_type_list_from_iter(types.iter().map(|ty| ty.peel_refs())),
+                    );
+                    let args = ty::GenericArgs::for_item(self.tcx, def_id, |param, _| {
+                        if param.index == 0 {
+                            ty.into()
+                        } else {
+                            self.infcx.var_for_def(DUMMY_SP, param)
+                        }
+                    });
+                    if self
+                        .infcx
+                        .type_implements_trait(def_id, args, self.param_env)
+                        .must_apply_modulo_regions()
+                    {
+                        // "`Trait` is implemented for `(A, B)` but not for `(A, &B)`"
+                        let mut msg = DiagStyledString::normal(format!("`{path}` "));
+                        msg.push_highlighted("is");
+                        msg.push_normal(" implemented for `(");
+                        let len = types.len();
+                        for (i, t) in types.iter().enumerate() {
+                            msg.push(
+                                format!("{}", with_forced_trimmed_paths!(t.peel_refs())),
+                                t.peel_refs() != t,
+                            );
+                            if i < len - 1 {
+                                msg.push_normal(", ");
+                            }
+                        }
+                        msg.push_normal(")` but ");
+                        msg.push_highlighted("not");
+                        msg.push_normal(" for `(");
+                        for (i, t) in types.iter().enumerate() {
+                            msg.push(
+                                format!("{}", with_forced_trimmed_paths!(t)),
+                                t.peel_refs() != t,
+                            );
+                            if i < len - 1 {
+                                msg.push_normal(", ");
+                            }
+                        }
+                        msg.push_normal(")`");
+
+                        // Find the span corresponding to the impl that was found to point at it.
+                        if let Some(impl_span) = self
+                            .tcx
+                            .all_impls(def_id)
+                            .filter(|&impl_def_id| {
+                                let header = self.tcx.impl_trait_header(impl_def_id).unwrap();
+                                let trait_ref = header.trait_ref.instantiate(
+                                    self.tcx,
+                                    self.infcx.fresh_args_for_item(DUMMY_SP, impl_def_id),
+                                );
+
+                                let value = ty::fold_regions(self.tcx, ty, |_, _| {
+                                    self.tcx.lifetimes.re_erased
+                                });
+                                // FIXME: Don't bother dealing with non-lifetime binders here...
+                                if value.has_escaping_bound_vars() {
+                                    return false;
+                                }
+                                self.infcx.can_eq(ty::ParamEnv::empty(), trait_ref.self_ty(), value)
+                                    && header.polarity == ty::ImplPolarity::Positive
+                            })
+                            .map(|impl_def_id| self.tcx.def_span(impl_def_id))
+                            .next()
+                        {
+                            err.highlighted_span_note(impl_span, msg.0);
+                        } else {
+                            err.highlighted_note(msg.0);
+                        }
+                        found_tuple = true;
+                    }
+                    // If `pred` was already on the tuple, we don't need to look at the root
+                    // obligation too.
+                    break;
+                }
+            }
+        }
+        found_tuple
+    }
+
     /// If an appropriate error source is not found, check method chain for possible candidates
     fn lookup_segments_chain_for_no_match_method(
         &self,
diff --git a/compiler/rustc_hir_typeck/src/op.rs b/compiler/rustc_hir_typeck/src/op.rs
index 7f7921b66b5..b9d24506986 100644
--- a/compiler/rustc_hir_typeck/src/op.rs
+++ b/compiler/rustc_hir_typeck/src/op.rs
@@ -706,7 +706,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
                         .sess
                         .source_map()
                         .span_to_snippet(lhs_expr.span)
-                        .unwrap_or("_".to_string()),
+                        .unwrap_or_else(|_| "_".to_string()),
                 };
 
                 if op.span().can_be_used_for_suggestions() {
diff --git a/compiler/rustc_hir_typeck/src/upvar.rs b/compiler/rustc_hir_typeck/src/upvar.rs
index 5b5253c7e7e..982cfa2e42b 100644
--- a/compiler/rustc_hir_typeck/src/upvar.rs
+++ b/compiler/rustc_hir_typeck/src/upvar.rs
@@ -492,7 +492,7 @@ impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
         let final_upvar_tys = self.final_upvar_tys(closure_def_id);
         debug!(?closure_hir_id, ?args, ?final_upvar_tys);
 
-        if self.tcx.features().unsized_locals() || self.tcx.features().unsized_fn_params() {
+        if self.tcx.features().unsized_fn_params() {
             for capture in
                 self.typeck_results.borrow().closure_min_captures_flattened(closure_def_id)
             {
diff --git a/compiler/rustc_infer/src/lib.rs b/compiler/rustc_infer/src/lib.rs
index 550707ed4bc..18cee03ba2e 100644
--- a/compiler/rustc_infer/src/lib.rs
+++ b/compiler/rustc_infer/src/lib.rs
@@ -16,6 +16,7 @@
 #![allow(internal_features)]
 #![allow(rustc::diagnostic_outside_of_impl)]
 #![allow(rustc::untranslatable_diagnostic)]
+#![cfg_attr(not(bootstrap), allow(rustc::direct_use_of_rustc_type_ir))]
 #![doc(html_root_url = "https://doc.rust-lang.org/nightly/nightly-rustc/")]
 #![doc(rust_logo)]
 #![feature(assert_matches)]
diff --git a/compiler/rustc_interface/src/passes.rs b/compiler/rustc_interface/src/passes.rs
index 99520a3fea3..02d1ebdb31a 100644
--- a/compiler/rustc_interface/src/passes.rs
+++ b/compiler/rustc_interface/src/passes.rs
@@ -8,9 +8,9 @@ use std::{env, fs, iter};
 use rustc_ast as ast;
 use rustc_codegen_ssa::traits::CodegenBackend;
 use rustc_data_structures::jobserver::Proxy;
-use rustc_data_structures::parallel;
 use rustc_data_structures::steal::Steal;
 use rustc_data_structures::sync::{AppendOnlyIndexVec, FreezeLock, WorkerLocal};
+use rustc_data_structures::{parallel, thousands};
 use rustc_expand::base::{ExtCtxt, LintStoreExpand};
 use rustc_feature::Features;
 use rustc_fs_util::try_canonicalize;
@@ -18,6 +18,7 @@ use rustc_hir::def_id::{LOCAL_CRATE, StableCrateId, StableCrateIdMap};
 use rustc_hir::definitions::Definitions;
 use rustc_incremental::setup_dep_graph;
 use rustc_lint::{BufferedEarlyLint, EarlyCheckNode, LintStore, unerased_lint_store};
+use rustc_metadata::EncodedMetadata;
 use rustc_metadata::creader::CStore;
 use rustc_middle::arena::Arena;
 use rustc_middle::dep_graph::DepsType;
@@ -35,7 +36,8 @@ use rustc_session::parse::feature_err;
 use rustc_session::search_paths::PathKind;
 use rustc_session::{Limit, Session};
 use rustc_span::{
-    DUMMY_SP, ErrorGuaranteed, FileName, SourceFileHash, SourceFileHashAlgorithm, Span, Symbol, sym,
+    DUMMY_SP, ErrorGuaranteed, ExpnKind, FileName, SourceFileHash, SourceFileHashAlgorithm, Span,
+    Symbol, sym,
 };
 use rustc_target::spec::PanicStrategy;
 use rustc_trait_selection::traits;
@@ -205,7 +207,7 @@ fn configure_and_expand(
         // Expand macros now!
         let krate = sess.time("expand_crate", || ecx.monotonic_expander().expand_crate(krate));
 
-        // The rest is error reporting
+        // The rest is error reporting and stats
 
         sess.psess.buffered_lints.with_lock(|buffered_lints: &mut Vec<BufferedEarlyLint>| {
             buffered_lints.append(&mut ecx.buffered_early_lint);
@@ -228,6 +230,10 @@ fn configure_and_expand(
             }
         }
 
+        if ecx.sess.opts.unstable_opts.macro_stats {
+            print_macro_stats(&ecx);
+        }
+
         krate
     });
 
@@ -288,6 +294,76 @@ fn configure_and_expand(
     krate
 }
 
+fn print_macro_stats(ecx: &ExtCtxt<'_>) {
+    use std::fmt::Write;
+
+    // No instability because we immediately sort the produced vector.
+    #[allow(rustc::potential_query_instability)]
+    let mut macro_stats: Vec<_> = ecx
+        .macro_stats
+        .iter()
+        .map(|((name, kind), stat)| {
+            // This gives the desired sort order: sort by bytes, then lines, etc.
+            (stat.bytes, stat.lines, stat.uses, name, *kind)
+        })
+        .collect();
+    macro_stats.sort_unstable();
+    macro_stats.reverse(); // bigger items first
+
+    let prefix = "macro-stats";
+    let name_w = 32;
+    let uses_w = 7;
+    let lines_w = 11;
+    let avg_lines_w = 11;
+    let bytes_w = 11;
+    let avg_bytes_w = 11;
+    let banner_w = name_w + uses_w + lines_w + avg_lines_w + bytes_w + avg_bytes_w;
+
+    // We write all the text into a string and print it with a single
+    // `eprint!`. This is an attempt to minimize interleaved text if multiple
+    // rustc processes are printing macro-stats at the same time (e.g. with
+    // `RUSTFLAGS='-Zmacro-stats' cargo build`). It still doesn't guarantee
+    // non-interleaving, though.
+    let mut s = String::new();
+    _ = writeln!(s, "{prefix} {}", "=".repeat(banner_w));
+    _ = writeln!(s, "{prefix} MACRO EXPANSION STATS: {}", ecx.ecfg.crate_name);
+    _ = writeln!(
+        s,
+        "{prefix} {:<name_w$}{:>uses_w$}{:>lines_w$}{:>avg_lines_w$}{:>bytes_w$}{:>avg_bytes_w$}",
+        "Macro Name", "Uses", "Lines", "Avg Lines", "Bytes", "Avg Bytes",
+    );
+    _ = writeln!(s, "{prefix} {}", "-".repeat(banner_w));
+    // It's helpful to print something when there are no entries, otherwise it
+    // might look like something went wrong.
+    if macro_stats.is_empty() {
+        _ = writeln!(s, "{prefix} (none)");
+    }
+    for (bytes, lines, uses, name, kind) in macro_stats {
+        let mut name = ExpnKind::Macro(kind, *name).descr();
+        let avg_lines = lines as f64 / uses as f64;
+        let avg_bytes = bytes as f64 / uses as f64;
+        if name.len() >= name_w {
+            // If the name is long, print it on a line by itself, then
+            // set the name to empty and print things normally, to show the
+            // stats on the next line.
+            _ = writeln!(s, "{prefix} {:<name_w$}", name);
+            name = String::new();
+        }
+        _ = writeln!(
+            s,
+            "{prefix} {:<name_w$}{:>uses_w$}{:>lines_w$}{:>avg_lines_w$}{:>bytes_w$}{:>avg_bytes_w$}",
+            name,
+            thousands::usize_with_underscores(uses),
+            thousands::isize_with_underscores(lines),
+            thousands::f64p1_with_underscores(avg_lines),
+            thousands::isize_with_underscores(bytes),
+            thousands::f64p1_with_underscores(avg_bytes),
+        );
+    }
+    _ = writeln!(s, "{prefix} {}", "=".repeat(banner_w));
+    eprint!("{s}");
+}
+
 fn early_lint_checks(tcx: TyCtxt<'_>, (): ()) {
     let sess = tcx.sess;
     let (resolver, krate) = &*tcx.resolver_for_lowering().borrow();
@@ -1099,7 +1175,7 @@ fn analysis(tcx: TyCtxt<'_>, (): ()) {
 pub(crate) fn start_codegen<'tcx>(
     codegen_backend: &dyn CodegenBackend,
     tcx: TyCtxt<'tcx>,
-) -> Box<dyn Any> {
+) -> (Box<dyn Any>, EncodedMetadata) {
     // Hook for tests.
     if let Some((def_id, _)) = tcx.entry_fn(())
         && tcx.has_attr(def_id, sym::rustc_delayed_bug_from_inside_query)
@@ -1122,11 +1198,9 @@ pub(crate) fn start_codegen<'tcx>(
 
     info!("Pre-codegen\n{:?}", tcx.debug_stats());
 
-    let (metadata, need_metadata_module) = rustc_metadata::fs::encode_and_write_metadata(tcx);
+    let metadata = rustc_metadata::fs::encode_and_write_metadata(tcx);
 
-    let codegen = tcx.sess.time("codegen_crate", move || {
-        codegen_backend.codegen_crate(tcx, metadata, need_metadata_module)
-    });
+    let codegen = tcx.sess.time("codegen_crate", move || codegen_backend.codegen_crate(tcx));
 
     info!("Post-codegen\n{:?}", tcx.debug_stats());
 
@@ -1136,7 +1210,7 @@ pub(crate) fn start_codegen<'tcx>(
         tcx.sess.code_stats.print_type_sizes();
     }
 
-    codegen
+    (codegen, metadata)
 }
 
 /// Compute and validate the crate name.
diff --git a/compiler/rustc_interface/src/queries.rs b/compiler/rustc_interface/src/queries.rs
index c8914c9be9c..877440ec7d2 100644
--- a/compiler/rustc_interface/src/queries.rs
+++ b/compiler/rustc_interface/src/queries.rs
@@ -4,7 +4,9 @@ use std::sync::Arc;
 use rustc_codegen_ssa::CodegenResults;
 use rustc_codegen_ssa::traits::CodegenBackend;
 use rustc_data_structures::svh::Svh;
+use rustc_errors::timings::TimingSection;
 use rustc_hir::def_id::LOCAL_CRATE;
+use rustc_metadata::EncodedMetadata;
 use rustc_middle::dep_graph::DepGraph;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::Session;
@@ -18,6 +20,7 @@ pub struct Linker {
     output_filenames: Arc<OutputFilenames>,
     // Only present when incr. comp. is enabled.
     crate_hash: Option<Svh>,
+    metadata: EncodedMetadata,
     ongoing_codegen: Box<dyn Any>,
 }
 
@@ -26,7 +29,7 @@ impl Linker {
         tcx: TyCtxt<'_>,
         codegen_backend: &dyn CodegenBackend,
     ) -> Linker {
-        let ongoing_codegen = passes::start_codegen(codegen_backend, tcx);
+        let (ongoing_codegen, metadata) = passes::start_codegen(codegen_backend, tcx);
 
         Linker {
             dep_graph: tcx.dep_graph.clone(),
@@ -36,6 +39,7 @@ impl Linker {
             } else {
                 None
             },
+            metadata,
             ongoing_codegen,
         }
     }
@@ -75,6 +79,7 @@ impl Linker {
                 sess,
                 &rlink_file,
                 &codegen_results,
+                &self.metadata,
                 &*self.output_filenames,
             )
             .unwrap_or_else(|error| {
@@ -84,6 +89,7 @@ impl Linker {
         }
 
         let _timer = sess.prof.verbose_generic_activity("link_crate");
-        codegen_backend.link(sess, codegen_results, &self.output_filenames)
+        let _timing = sess.timings.start_section(sess.dcx(), TimingSection::Linking);
+        codegen_backend.link(sess, codegen_results, self.metadata, &self.output_filenames)
     }
 }
diff --git a/compiler/rustc_interface/src/tests.rs b/compiler/rustc_interface/src/tests.rs
index 558f13a832c..a0012b04c4f 100644
--- a/compiler/rustc_interface/src/tests.rs
+++ b/compiler/rustc_interface/src/tests.rs
@@ -27,7 +27,7 @@ use rustc_span::source_map::{RealFileLoader, SourceMapInputs};
 use rustc_span::{FileName, SourceFileHashAlgorithm, sym};
 use rustc_target::spec::{
     CodeModel, FramePointer, LinkerFlavorCli, MergeFunctions, OnBrokenPipe, PanicStrategy,
-    RelocModel, RelroLevel, SanitizerSet, SplitDebuginfo, StackProtector, TlsModel, WasmCAbi,
+    RelocModel, RelroLevel, SanitizerSet, SplitDebuginfo, StackProtector, TlsModel,
 };
 
 use crate::interface::{initialize_checked_jobserver, parse_cfg};
@@ -709,6 +709,7 @@ fn test_unstable_options_tracking_hash() {
     untracked!(llvm_time_trace, true);
     untracked!(ls, vec!["all".to_owned()]);
     untracked!(macro_backtrace, true);
+    untracked!(macro_stats, true);
     untracked!(meta_stats, true);
     untracked!(mir_include_spans, MirIncludeSpans::On);
     untracked!(nll_facts, true);
@@ -801,6 +802,7 @@ fn test_unstable_options_tracking_hash() {
     tracked!(force_unstable_if_unmarked, true);
     tracked!(function_return, FunctionReturn::ThunkExtern);
     tracked!(function_sections, Some(false));
+    tracked!(hint_mostly_unused, true);
     tracked!(human_readable_cgu_names, true);
     tracked!(incremental_ignore_spans, true);
     tracked!(inline_mir, Some(true));
@@ -881,7 +883,6 @@ fn test_unstable_options_tracking_hash() {
     tracked!(verify_llvm_ir, true);
     tracked!(virtual_function_elimination, true);
     tracked!(wasi_exec_model, Some(WasiExecModel::Reactor));
-    tracked!(wasm_c_abi, WasmCAbi::Spec);
     // tidy-alphabetical-end
 
     macro_rules! tracked_no_crate_hash {
diff --git a/compiler/rustc_lint/messages.ftl b/compiler/rustc_lint/messages.ftl
index fd2e2ba39ac..8d9f2385b71 100644
--- a/compiler/rustc_lint/messages.ftl
+++ b/compiler/rustc_lint/messages.ftl
@@ -72,9 +72,6 @@ lint_builtin_const_no_mangle = const items should never be `#[no_mangle]`
 lint_builtin_decl_unsafe_fn = declaration of an `unsafe` function
 lint_builtin_decl_unsafe_method = declaration of an `unsafe` method
 
-lint_builtin_deprecated_attr_link = use of deprecated attribute `{$name}`: {$reason}. See {$link}
-    .msg_suggestion = {$msg}
-    .default_suggestion = remove this attribute
 lint_builtin_deref_nullptr = dereferencing a null pointer
     .label = this code causes undefined behavior when executed
 
@@ -533,8 +530,6 @@ lint_mismatched_lifetime_syntaxes_suggestion_implicit =
 lint_mismatched_lifetime_syntaxes_suggestion_mixed =
     one option is to remove the lifetime for references and use the anonymous lifetime for paths
 
-lint_missing_fragment_specifier = missing fragment specifier
-
 lint_missing_unsafe_on_extern = extern blocks should be unsafe
     .suggestion = needs `unsafe` before the extern keyword
 
@@ -743,7 +738,8 @@ lint_redundant_semicolons =
         [true] semicolons
         *[false] semicolon
     }
-    .suggestion = remove {$multiple ->
+
+lint_redundant_semicolons_suggestion = remove {$multiple_semicolons ->
         [true] these semicolons
         *[false] this semicolon
     }
@@ -816,6 +812,9 @@ lint_tykind = usage of `ty::TyKind`
 lint_tykind_kind = usage of `ty::TyKind::<kind>`
     .suggestion = try using `ty::<kind>` directly
 
+lint_type_ir_direct_use = do not use `rustc_type_ir` unless you are implementing type system internals
+    .note = use `rustc_middle::ty` instead
+
 lint_type_ir_inherent_usage = do not use `rustc_type_ir::inherent` unless you're inside of the trait solver
     .note = the method or struct you're looking for is likely defined somewhere else downstream in the compiler
 
diff --git a/compiler/rustc_lint/src/builtin.rs b/compiler/rustc_lint/src/builtin.rs
index 69e9f8e1b2c..dedea54f8e0 100644
--- a/compiler/rustc_lint/src/builtin.rs
+++ b/compiler/rustc_lint/src/builtin.rs
@@ -22,7 +22,7 @@ use rustc_ast::visit::{FnCtxt, FnKind};
 use rustc_ast::{self as ast, *};
 use rustc_ast_pretty::pprust::expr_to_string;
 use rustc_errors::{Applicability, LintDiagnostic};
-use rustc_feature::{AttributeGate, BuiltinAttribute, GateIssue, Stability, deprecated_attributes};
+use rustc_feature::GateIssue;
 use rustc_hir as hir;
 use rustc_hir::def::{DefKind, Res};
 use rustc_hir::def_id::{CRATE_DEF_ID, DefId, LocalDefId};
@@ -48,8 +48,7 @@ use rustc_trait_selection::traits::{self};
 
 use crate::errors::BuiltinEllipsisInclusiveRangePatterns;
 use crate::lints::{
-    BuiltinAnonymousParams, BuiltinConstNoMangle, BuiltinDeprecatedAttrLink,
-    BuiltinDeprecatedAttrLinkSuggestion, BuiltinDerefNullptr, BuiltinDoubleNegations,
+    BuiltinAnonymousParams, BuiltinConstNoMangle, BuiltinDerefNullptr, BuiltinDoubleNegations,
     BuiltinDoubleNegationsAddParens, BuiltinEllipsisInclusiveRangePatternsLint,
     BuiltinExplicitOutlives, BuiltinExplicitOutlivesSuggestion, BuiltinFeatureIssueNote,
     BuiltinIncompleteFeatures, BuiltinIncompleteFeaturesHelp, BuiltinInternalFeatures,
@@ -799,53 +798,6 @@ impl EarlyLintPass for AnonymousParameters {
     }
 }
 
-/// Check for use of attributes which have been deprecated.
-#[derive(Clone)]
-pub struct DeprecatedAttr {
-    // This is not free to compute, so we want to keep it around, rather than
-    // compute it for every attribute.
-    depr_attrs: Vec<&'static BuiltinAttribute>,
-}
-
-impl_lint_pass!(DeprecatedAttr => []);
-
-impl Default for DeprecatedAttr {
-    fn default() -> Self {
-        DeprecatedAttr { depr_attrs: deprecated_attributes() }
-    }
-}
-
-impl EarlyLintPass for DeprecatedAttr {
-    fn check_attribute(&mut self, cx: &EarlyContext<'_>, attr: &ast::Attribute) {
-        for BuiltinAttribute { name, gate, .. } in &self.depr_attrs {
-            if attr.ident().map(|ident| ident.name) == Some(*name) {
-                if let &AttributeGate::Gated(
-                    Stability::Deprecated(link, suggestion),
-                    name,
-                    reason,
-                    _,
-                ) = gate
-                {
-                    let suggestion = match suggestion {
-                        Some(msg) => {
-                            BuiltinDeprecatedAttrLinkSuggestion::Msg { suggestion: attr.span, msg }
-                        }
-                        None => {
-                            BuiltinDeprecatedAttrLinkSuggestion::Default { suggestion: attr.span }
-                        }
-                    };
-                    cx.emit_span_lint(
-                        DEPRECATED,
-                        attr.span,
-                        BuiltinDeprecatedAttrLink { name, reason, link, suggestion },
-                    );
-                }
-                return;
-            }
-        }
-    }
-}
-
 fn warn_if_doc(cx: &EarlyContext<'_>, node_span: Span, node_kind: &str, attrs: &[ast::Attribute]) {
     use rustc_ast::token::CommentKind;
 
diff --git a/compiler/rustc_lint/src/context.rs b/compiler/rustc_lint/src/context.rs
index 5679d4566dc..b6bf45dfbcf 100644
--- a/compiler/rustc_lint/src/context.rs
+++ b/compiler/rustc_lint/src/context.rs
@@ -7,6 +7,7 @@ use std::cell::Cell;
 use std::slice;
 
 use rustc_ast::BindingMode;
+use rustc_ast::util::parser::ExprPrecedence;
 use rustc_data_structures::fx::FxIndexMap;
 use rustc_data_structures::sync;
 use rustc_data_structures::unord::UnordMap;
@@ -850,6 +851,20 @@ impl<'tcx> LateContext<'tcx> {
             })
     }
 
+    /// Returns the effective precedence of an expression for the purpose of
+    /// rendering diagnostic. This is not the same as the precedence that would
+    /// be used for pretty-printing HIR by rustc_hir_pretty.
+    pub fn precedence(&self, expr: &hir::Expr<'_>) -> ExprPrecedence {
+        let for_each_attr = |id: hir::HirId, callback: &mut dyn FnMut(&hir::Attribute)| {
+            for attr in self.tcx.hir_attrs(id) {
+                if attr.span().desugaring_kind().is_none() {
+                    callback(attr);
+                }
+            }
+        };
+        expr.precedence(&for_each_attr)
+    }
+
     /// If the given expression is a local binding, find the initializer expression.
     /// If that initializer expression is another local binding, find its initializer again.
     ///
diff --git a/compiler/rustc_lint/src/dangling.rs b/compiler/rustc_lint/src/dangling.rs
index 91c7922638d..c737919db9c 100644
--- a/compiler/rustc_lint/src/dangling.rs
+++ b/compiler/rustc_lint/src/dangling.rs
@@ -1,4 +1,5 @@
 use rustc_ast::visit::{visit_opt, walk_list};
+use rustc_attr_data_structures::{AttributeKind, find_attr};
 use rustc_hir::def_id::LocalDefId;
 use rustc_hir::intravisit::{FnKind, Visitor, walk_expr};
 use rustc_hir::{Block, Body, Expr, ExprKind, FnDecl, LangItem};
@@ -133,7 +134,7 @@ fn lint_expr(cx: &LateContext<'_>, expr: &Expr<'_>) {
         && let ty = cx.typeck_results().expr_ty(receiver)
         && owns_allocation(cx.tcx, ty)
         && let Some(fn_id) = cx.typeck_results().type_dependent_def_id(expr.hir_id)
-        && cx.tcx.has_attr(fn_id, sym::rustc_as_ptr)
+        && find_attr!(cx.tcx.get_all_attrs(fn_id), AttributeKind::AsPtr(_))
     {
         // FIXME: use `emit_node_lint` when `#[primary_span]` is added.
         cx.tcx.emit_node_span_lint(
diff --git a/compiler/rustc_lint/src/early.rs b/compiler/rustc_lint/src/early.rs
index 12666d383f9..48e3bbb79fa 100644
--- a/compiler/rustc_lint/src/early.rs
+++ b/compiler/rustc_lint/src/early.rs
@@ -33,10 +33,8 @@ pub struct EarlyContextAndPass<'ecx, 'tcx, T: EarlyLintPass> {
 }
 
 impl<'ecx, 'tcx, T: EarlyLintPass> EarlyContextAndPass<'ecx, 'tcx, T> {
-    // This always-inlined function is for the hot call site.
-    #[inline(always)]
     #[allow(rustc::diagnostic_outside_of_impl)]
-    fn inlined_check_id(&mut self, id: ast::NodeId) {
+    fn check_id(&mut self, id: ast::NodeId) {
         for early_lint in self.context.buffered.take(id) {
             let BufferedEarlyLint { span, node_id: _, lint_id, diagnostic } = early_lint;
             self.context.opt_span_lint(lint_id.lint, span, |diag| {
@@ -45,11 +43,6 @@ impl<'ecx, 'tcx, T: EarlyLintPass> EarlyContextAndPass<'ecx, 'tcx, T> {
         }
     }
 
-    // This non-inlined function is for the cold call sites.
-    fn check_id(&mut self, id: ast::NodeId) {
-        self.inlined_check_id(id)
-    }
-
     /// Merge the lints specified by any lint attributes into the
     /// current lint context, call the provided function, then reset the
     /// lints in effect to their previous state.
@@ -61,7 +54,6 @@ impl<'ecx, 'tcx, T: EarlyLintPass> EarlyContextAndPass<'ecx, 'tcx, T> {
         debug!(?id);
         let push = self.context.builder.push(attrs, is_crate_node, None);
 
-        self.inlined_check_id(id);
         debug!("early context: enter_attrs({:?})", attrs);
         lint_callback!(self, check_attributes, attrs);
         ensure_sufficient_stack(|| f(self));
@@ -136,12 +128,8 @@ impl<'ast, 'ecx, 'tcx, T: EarlyLintPass> ast_visit::Visitor<'ast>
         // the AST struct that they wrap (e.g. an item)
         self.with_lint_attrs(s.id, s.attrs(), |cx| {
             lint_callback!(cx, check_stmt, s);
+            ast_visit::walk_stmt(cx, s);
         });
-        // The visitor for the AST struct wrapped
-        // by the statement (e.g. `Item`) will call
-        // `with_lint_attrs`, so do this walk
-        // outside of the above `with_lint_attrs` call
-        ast_visit::walk_stmt(self, s);
     }
 
     fn visit_fn(&mut self, fk: ast_visit::FnKind<'ast>, span: Span, id: ast::NodeId) {
diff --git a/compiler/rustc_lint/src/early/diagnostics.rs b/compiler/rustc_lint/src/early/diagnostics.rs
index 60c477dd6c7..3b0a36186b6 100644
--- a/compiler/rustc_lint/src/early/diagnostics.rs
+++ b/compiler/rustc_lint/src/early/diagnostics.rs
@@ -432,9 +432,6 @@ pub fn decorate_builtin_lint(
         BuiltinLintDiag::CfgAttrNoAttributes => {
             lints::CfgAttrNoAttributes.decorate_lint(diag);
         }
-        BuiltinLintDiag::MissingFragmentSpecifier => {
-            lints::MissingFragmentSpecifier.decorate_lint(diag);
-        }
         BuiltinLintDiag::MetaVariableStillRepeating(name) => {
             lints::MetaVariableStillRepeating { name }.decorate_lint(diag);
         }
diff --git a/compiler/rustc_lint/src/impl_trait_overcaptures.rs b/compiler/rustc_lint/src/impl_trait_overcaptures.rs
index 8124d7f7c86..aa6f36a67f0 100644
--- a/compiler/rustc_lint/src/impl_trait_overcaptures.rs
+++ b/compiler/rustc_lint/src/impl_trait_overcaptures.rs
@@ -15,8 +15,7 @@ use rustc_middle::ty::relate::{
     Relate, RelateResult, TypeRelation, structurally_relate_consts, structurally_relate_tys,
 };
 use rustc_middle::ty::{
-    self, Ty, TyCtxt, TypeFoldable, TypeSuperVisitable, TypeVisitable, TypeVisitableExt,
-    TypeVisitor,
+    self, Ty, TyCtxt, TypeSuperVisitable, TypeVisitable, TypeVisitableExt, TypeVisitor,
 };
 use rustc_middle::{bug, span_bug};
 use rustc_session::lint::FutureIncompatibilityReason;
@@ -210,7 +209,7 @@ where
     VarFn: FnOnce() -> FxHashMap<DefId, ty::Variance>,
     OutlivesFn: FnOnce() -> OutlivesEnvironment<'tcx>,
 {
-    fn visit_binder<T: TypeFoldable<TyCtxt<'tcx>>>(&mut self, t: &ty::Binder<'tcx, T>) {
+    fn visit_binder<T: TypeVisitable<TyCtxt<'tcx>>>(&mut self, t: &ty::Binder<'tcx, T>) {
         // When we get into a binder, we need to add its own bound vars to the scope.
         let mut added = vec![];
         for arg in t.bound_vars() {
diff --git a/compiler/rustc_lint/src/internal.rs b/compiler/rustc_lint/src/internal.rs
index 1805a674d68..d8fc46aa9ab 100644
--- a/compiler/rustc_lint/src/internal.rs
+++ b/compiler/rustc_lint/src/internal.rs
@@ -14,8 +14,8 @@ use {rustc_ast as ast, rustc_hir as hir};
 use crate::lints::{
     BadOptAccessDiag, DefaultHashTypesDiag, DiagOutOfImpl, LintPassByHand,
     NonGlobImportTypeIrInherent, QueryInstability, QueryUntracked, SpanUseEqCtxtDiag,
-    SymbolInternStringLiteralDiag, TyQualified, TykindDiag, TykindKind, TypeIrInherentUsage,
-    TypeIrTraitUsage, UntranslatableDiag,
+    SymbolInternStringLiteralDiag, TyQualified, TykindDiag, TykindKind, TypeIrDirectUse,
+    TypeIrInherentUsage, TypeIrTraitUsage, UntranslatableDiag,
 };
 use crate::{EarlyContext, EarlyLintPass, LateContext, LateLintPass, LintContext};
 
@@ -301,8 +301,18 @@ declare_tool_lint! {
     "usage `rustc_type_ir`-specific abstraction traits outside of trait system",
     report_in_external_macro: true
 }
+declare_tool_lint! {
+    /// The `direct_use_of_rustc_type_ir` lint detects usage of `rustc_type_ir`.
+    ///
+    /// This module should only be used within the trait solver and some desirable
+    /// crates like rustc_middle.
+    pub rustc::DIRECT_USE_OF_RUSTC_TYPE_IR,
+    Allow,
+    "usage `rustc_type_ir` abstraction outside of trait system",
+    report_in_external_macro: true
+}
 
-declare_lint_pass!(TypeIr => [NON_GLOB_IMPORT_OF_TYPE_IR_INHERENT, USAGE_OF_TYPE_IR_INHERENT, USAGE_OF_TYPE_IR_TRAITS]);
+declare_lint_pass!(TypeIr => [DIRECT_USE_OF_RUSTC_TYPE_IR, NON_GLOB_IMPORT_OF_TYPE_IR_INHERENT, USAGE_OF_TYPE_IR_INHERENT, USAGE_OF_TYPE_IR_TRAITS]);
 
 impl<'tcx> LateLintPass<'tcx> for TypeIr {
     fn check_expr(&mut self, cx: &LateContext<'tcx>, expr: &'tcx hir::Expr<'tcx>) {
@@ -372,6 +382,21 @@ impl<'tcx> LateLintPass<'tcx> for TypeIr {
             NonGlobImportTypeIrInherent { suggestion: lo.eq_ctxt(hi).then(|| lo.to(hi)), snippet },
         );
     }
+
+    fn check_path(
+        &mut self,
+        cx: &LateContext<'tcx>,
+        path: &rustc_hir::Path<'tcx>,
+        _: rustc_hir::HirId,
+    ) {
+        if let Some(seg) = path.segments.iter().find(|seg| {
+            seg.res
+                .opt_def_id()
+                .is_some_and(|def_id| cx.tcx.is_diagnostic_item(sym::type_ir, def_id))
+        }) {
+            cx.emit_span_lint(DIRECT_USE_OF_RUSTC_TYPE_IR, seg.ident.span, TypeIrDirectUse);
+        }
+    }
 }
 
 declare_tool_lint! {
diff --git a/compiler/rustc_lint/src/lib.rs b/compiler/rustc_lint/src/lib.rs
index 72bfeaddbf1..20568f35a47 100644
--- a/compiler/rustc_lint/src/lib.rs
+++ b/compiler/rustc_lint/src/lib.rs
@@ -174,7 +174,6 @@ early_lint_methods!(
             AnonymousParameters: AnonymousParameters,
             EllipsisInclusiveRangePatterns: EllipsisInclusiveRangePatterns::default(),
             NonCamelCaseTypes: NonCamelCaseTypes,
-            DeprecatedAttr: DeprecatedAttr::default(),
             WhileTrue: WhileTrue,
             NonAsciiIdents: NonAsciiIdents,
             IncompleteInternalFeatures: IncompleteInternalFeatures,
@@ -619,6 +618,12 @@ fn register_builtins(store: &mut LintStore) {
         "converted into hard error, \
          see <https://github.com/rust-lang/rust/issues/116558> for more information",
     );
+    store.register_removed(
+        "missing_fragment_specifier",
+        "converted into hard error, \
+         see <https://github.com/rust-lang/rust/issues/40107> for more information",
+    );
+    store.register_removed("wasm_c_abi", "the wasm C ABI has been fixed");
 }
 
 fn register_internals(store: &mut LintStore) {
@@ -663,6 +668,7 @@ fn register_internals(store: &mut LintStore) {
             LintId::of(USAGE_OF_TYPE_IR_TRAITS),
             LintId::of(BAD_OPT_ACCESS),
             LintId::of(SPAN_USE_EQ_CTXT),
+            LintId::of(DIRECT_USE_OF_RUSTC_TYPE_IR),
         ],
     );
 }
diff --git a/compiler/rustc_lint/src/lifetime_syntax.rs b/compiler/rustc_lint/src/lifetime_syntax.rs
index 31b038e6a46..95b7b69bd5a 100644
--- a/compiler/rustc_lint/src/lifetime_syntax.rs
+++ b/compiler/rustc_lint/src/lifetime_syntax.rs
@@ -84,19 +84,45 @@ impl<'tcx> LateLintPass<'tcx> for LifetimeSyntax {
         _: rustc_span::Span,
         _: rustc_span::def_id::LocalDefId,
     ) {
-        let mut input_map = Default::default();
-        let mut output_map = Default::default();
+        check_fn_like(cx, fd);
+    }
 
-        for input in fd.inputs {
-            LifetimeInfoCollector::collect(input, &mut input_map);
+    #[instrument(skip_all)]
+    fn check_trait_item(&mut self, cx: &LateContext<'tcx>, ti: &'tcx hir::TraitItem<'tcx>) {
+        match ti.kind {
+            hir::TraitItemKind::Const(..) => {}
+            hir::TraitItemKind::Fn(fn_sig, _trait_fn) => check_fn_like(cx, fn_sig.decl),
+            hir::TraitItemKind::Type(..) => {}
         }
+    }
 
-        if let hir::FnRetTy::Return(output) = fd.output {
-            LifetimeInfoCollector::collect(output, &mut output_map);
+    #[instrument(skip_all)]
+    fn check_foreign_item(
+        &mut self,
+        cx: &LateContext<'tcx>,
+        fi: &'tcx rustc_hir::ForeignItem<'tcx>,
+    ) {
+        match fi.kind {
+            hir::ForeignItemKind::Fn(fn_sig, _idents, _generics) => check_fn_like(cx, fn_sig.decl),
+            hir::ForeignItemKind::Static(..) => {}
+            hir::ForeignItemKind::Type => {}
         }
+    }
+}
+
+fn check_fn_like<'tcx>(cx: &LateContext<'tcx>, fd: &'tcx hir::FnDecl<'tcx>) {
+    let mut input_map = Default::default();
+    let mut output_map = Default::default();
 
-        report_mismatches(cx, &input_map, &output_map);
+    for input in fd.inputs {
+        LifetimeInfoCollector::collect(input, &mut input_map);
     }
+
+    if let hir::FnRetTy::Return(output) = fd.output {
+        LifetimeInfoCollector::collect(output, &mut output_map);
+    }
+
+    report_mismatches(cx, &input_map, &output_map);
 }
 
 #[instrument(skip_all)]
diff --git a/compiler/rustc_lint/src/lints.rs b/compiler/rustc_lint/src/lints.rs
index 9d3c74a9a2b..abdf8e3853b 100644
--- a/compiler/rustc_lint/src/lints.rs
+++ b/compiler/rustc_lint/src/lints.rs
@@ -199,32 +199,6 @@ pub(crate) struct BuiltinAnonymousParams<'a> {
     pub ty_snip: &'a str,
 }
 
-// FIXME(davidtwco) translatable deprecated attr
-#[derive(LintDiagnostic)]
-#[diag(lint_builtin_deprecated_attr_link)]
-pub(crate) struct BuiltinDeprecatedAttrLink<'a> {
-    pub name: Symbol,
-    pub reason: &'a str,
-    pub link: &'a str,
-    #[subdiagnostic]
-    pub suggestion: BuiltinDeprecatedAttrLinkSuggestion<'a>,
-}
-
-#[derive(Subdiagnostic)]
-pub(crate) enum BuiltinDeprecatedAttrLinkSuggestion<'a> {
-    #[suggestion(lint_msg_suggestion, code = "", applicability = "machine-applicable")]
-    Msg {
-        #[primary_span]
-        suggestion: Span,
-        msg: &'a str,
-    },
-    #[suggestion(lint_default_suggestion, code = "", applicability = "machine-applicable")]
-    Default {
-        #[primary_span]
-        suggestion: Span,
-    },
-}
-
 #[derive(LintDiagnostic)]
 #[diag(lint_builtin_unused_doc_comment)]
 pub(crate) struct BuiltinUnusedDocComment<'a> {
@@ -996,6 +970,11 @@ pub(crate) struct TypeIrInherentUsage;
 pub(crate) struct TypeIrTraitUsage;
 
 #[derive(LintDiagnostic)]
+#[diag(lint_type_ir_direct_use)]
+#[note]
+pub(crate) struct TypeIrDirectUse;
+
+#[derive(LintDiagnostic)]
 #[diag(lint_non_glob_import_type_ir_inherent)]
 pub(crate) struct NonGlobImportTypeIrInherent {
     #[suggestion(code = "{snippet}", applicability = "maybe-incorrect")]
@@ -1564,8 +1543,16 @@ pub(crate) struct PassByValueDiag {
 #[diag(lint_redundant_semicolons)]
 pub(crate) struct RedundantSemicolonsDiag {
     pub multiple: bool,
-    #[suggestion(code = "", applicability = "maybe-incorrect")]
-    pub suggestion: Span,
+    #[subdiagnostic]
+    pub suggestion: Option<RedundantSemicolonsSuggestion>,
+}
+
+#[derive(Subdiagnostic)]
+#[suggestion(lint_redundant_semicolons_suggestion, code = "", applicability = "maybe-incorrect")]
+pub(crate) struct RedundantSemicolonsSuggestion {
+    pub multiple_semicolons: bool,
+    #[primary_span]
+    pub span: Span,
 }
 
 // traits.rs
@@ -2617,10 +2604,6 @@ pub(crate) struct DuplicateMacroAttribute;
 pub(crate) struct CfgAttrNoAttributes;
 
 #[derive(LintDiagnostic)]
-#[diag(lint_missing_fragment_specifier)]
-pub(crate) struct MissingFragmentSpecifier;
-
-#[derive(LintDiagnostic)]
 #[diag(lint_metavariable_still_repeating)]
 pub(crate) struct MetaVariableStillRepeating {
     pub name: MacroRulesNormalizedIdent,
@@ -2648,6 +2631,7 @@ pub(crate) struct UnusedCrateDependency {
     pub local_crate: Symbol,
 }
 
+// FIXME(jdonszelmann): duplicated in rustc_attr_parsing, should be moved there completely.
 #[derive(LintDiagnostic)]
 #[diag(lint_ill_formed_attribute_input)]
 pub(crate) struct IllFormedAttributeInput {
diff --git a/compiler/rustc_lint/src/multiple_supertrait_upcastable.rs b/compiler/rustc_lint/src/multiple_supertrait_upcastable.rs
index dea7c8ac708..3cc55eaa0f2 100644
--- a/compiler/rustc_lint/src/multiple_supertrait_upcastable.rs
+++ b/compiler/rustc_lint/src/multiple_supertrait_upcastable.rs
@@ -46,7 +46,8 @@ impl<'tcx> LateLintPass<'tcx> for MultipleSupertraitUpcastable {
                 .tcx
                 .explicit_super_predicates_of(def_id)
                 .iter_identity_copied()
-                .filter_map(|(pred, _)| pred.as_trait_clause());
+                .filter_map(|(pred, _)| pred.as_trait_clause())
+                .filter(|pred| !cx.tcx.is_lang_item(pred.def_id(), hir::LangItem::MetaSized));
             if direct_super_traits_iter.count() > 1 {
                 cx.emit_span_lint(
                     MULTIPLE_SUPERTRAIT_UPCASTABLE,
diff --git a/compiler/rustc_lint/src/nonstandard_style.rs b/compiler/rustc_lint/src/nonstandard_style.rs
index 31c18074466..1b60466a589 100644
--- a/compiler/rustc_lint/src/nonstandard_style.rs
+++ b/compiler/rustc_lint/src/nonstandard_style.rs
@@ -164,7 +164,7 @@ impl NonCamelCaseTypes {
 impl EarlyLintPass for NonCamelCaseTypes {
     fn check_item(&mut self, cx: &EarlyContext<'_>, it: &ast::Item) {
         let has_repr_c = matches!(
-            AttributeParser::parse_limited(cx.sess(), &it.attrs, sym::repr, it.span, true),
+            AttributeParser::parse_limited(cx.sess(), &it.attrs, sym::repr, it.span, it.id),
             Some(Attribute::Parsed(AttributeKind::Repr(r))) if r.iter().any(|(r, _)| r == &ReprAttr::ReprC)
         );
 
diff --git a/compiler/rustc_lint/src/redundant_semicolon.rs b/compiler/rustc_lint/src/redundant_semicolon.rs
index b43e4938b73..f6d2fbe4261 100644
--- a/compiler/rustc_lint/src/redundant_semicolon.rs
+++ b/compiler/rustc_lint/src/redundant_semicolon.rs
@@ -2,7 +2,7 @@ use rustc_ast::{Block, StmtKind};
 use rustc_session::{declare_lint, declare_lint_pass};
 use rustc_span::Span;
 
-use crate::lints::RedundantSemicolonsDiag;
+use crate::lints::{RedundantSemicolonsDiag, RedundantSemicolonsSuggestion};
 use crate::{EarlyContext, EarlyLintPass, LintContext};
 
 declare_lint! {
@@ -44,16 +44,21 @@ impl EarlyLintPass for RedundantSemicolons {
 
 fn maybe_lint_redundant_semis(cx: &EarlyContext<'_>, seq: &mut Option<(Span, bool)>) {
     if let Some((span, multiple)) = seq.take() {
-        // FIXME: Find a better way of ignoring the trailing
-        // semicolon from macro expansion
         if span == rustc_span::DUMMY_SP {
             return;
         }
 
+        // Ignore redundant semicolons inside macro expansion.(issue #142143)
+        let suggestion = if span.from_expansion() {
+            None
+        } else {
+            Some(RedundantSemicolonsSuggestion { multiple_semicolons: multiple, span })
+        };
+
         cx.emit_span_lint(
             REDUNDANT_SEMICOLONS,
             span,
-            RedundantSemicolonsDiag { multiple, suggestion: span },
+            RedundantSemicolonsDiag { multiple, suggestion },
         );
     }
 }
diff --git a/compiler/rustc_lint/src/types.rs b/compiler/rustc_lint/src/types.rs
index fec23354c91..aaba0c14b1c 100644
--- a/compiler/rustc_lint/src/types.rs
+++ b/compiler/rustc_lint/src/types.rs
@@ -196,7 +196,8 @@ declare_lint! {
     /// same address after being merged together.
     UNPREDICTABLE_FUNCTION_POINTER_COMPARISONS,
     Warn,
-    "detects unpredictable function pointer comparisons"
+    "detects unpredictable function pointer comparisons",
+    report_in_external_macro
 }
 
 #[derive(Copy, Clone, Default)]
diff --git a/compiler/rustc_lint_defs/src/builtin.rs b/compiler/rustc_lint_defs/src/builtin.rs
index 777118e69fb..b0ea9689e50 100644
--- a/compiler/rustc_lint_defs/src/builtin.rs
+++ b/compiler/rustc_lint_defs/src/builtin.rs
@@ -65,7 +65,6 @@ declare_lint_pass! {
         MACRO_USE_EXTERN_CRATE,
         META_VARIABLE_MISUSE,
         MISSING_ABI,
-        MISSING_FRAGMENT_SPECIFIER,
         MISSING_UNSAFE_ON_EXTERN,
         MUST_NOT_SUSPEND,
         NAMED_ARGUMENTS_USED_POSITIONALLY,
@@ -141,7 +140,6 @@ declare_lint_pass! {
         UNUSED_VARIABLES,
         USELESS_DEPRECATED,
         WARNINGS,
-        WASM_C_ABI,
         // tidy-alphabetical-end
     ]
 }
@@ -1418,51 +1416,6 @@ declare_lint! {
 }
 
 declare_lint! {
-    /// The `missing_fragment_specifier` lint is issued when an unused pattern in a
-    /// `macro_rules!` macro definition has a meta-variable (e.g. `$e`) that is not
-    /// followed by a fragment specifier (e.g. `:expr`).
-    ///
-    /// This warning can always be fixed by removing the unused pattern in the
-    /// `macro_rules!` macro definition.
-    ///
-    /// ### Example
-    ///
-    /// ```rust,compile_fail,edition2021
-    /// macro_rules! foo {
-    ///    () => {};
-    ///    ($name) => { };
-    /// }
-    ///
-    /// fn main() {
-    ///    foo!();
-    /// }
-    /// ```
-    ///
-    /// {{produces}}
-    ///
-    /// ### Explanation
-    ///
-    /// To fix this, remove the unused pattern from the `macro_rules!` macro definition:
-    ///
-    /// ```rust
-    /// macro_rules! foo {
-    ///     () => {};
-    /// }
-    /// fn main() {
-    ///     foo!();
-    /// }
-    /// ```
-    pub MISSING_FRAGMENT_SPECIFIER,
-    Deny,
-    "detects missing fragment specifiers in unused `macro_rules!` patterns",
-    @future_incompatible = FutureIncompatibleInfo {
-        reason: FutureIncompatibilityReason::FutureReleaseError,
-        reference: "issue #40107 <https://github.com/rust-lang/rust/issues/40107>",
-        report_in_deps: true,
-    };
-}
-
-declare_lint! {
     /// The `late_bound_lifetime_arguments` lint detects generic lifetime
     /// arguments in path segments with late bound lifetime parameters.
     ///
@@ -3664,7 +3617,7 @@ declare_lint! {
     "use of unsupported calling convention",
     @future_incompatible = FutureIncompatibleInfo {
         reason: FutureIncompatibilityReason::FutureReleaseError,
-        report_in_deps: true,
+        report_in_deps: false,
         reference: "issue #137018 <https://github.com/rust-lang/rust/issues/137018>",
     };
 }
@@ -4146,6 +4099,7 @@ declare_lint! {
     @future_incompatible = FutureIncompatibleInfo {
         reason: FutureIncompatibilityReason::EditionAndFutureReleaseSemanticsChange(Edition::Edition2024),
         reference: "<https://doc.rust-lang.org/nightly/edition-guide/rust-2024/never-type-fallback.html>",
+        report_in_deps: true,
     };
     @edition Edition2024 => Deny;
     report_in_external_macro
@@ -4200,6 +4154,7 @@ declare_lint! {
     @future_incompatible = FutureIncompatibleInfo {
         reason: FutureIncompatibilityReason::EditionAndFutureReleaseError(Edition::Edition2024),
         reference: "<https://doc.rust-lang.org/nightly/edition-guide/rust-2024/never-type-fallback.html>",
+        report_in_deps: true,
     };
     report_in_external_macro
 }
@@ -5027,50 +4982,6 @@ declare_lint! {
 }
 
 declare_lint! {
-    /// The `wasm_c_abi` lint detects usage of the `extern "C"` ABI of wasm that is affected
-    /// by a planned ABI change that has the goal of aligning Rust with the standard C ABI
-    /// of this target.
-    ///
-    /// ### Example
-    ///
-    /// ```rust,ignore (needs wasm32-unknown-unknown)
-    /// #[repr(C)]
-    /// struct MyType(i32, i32);
-    ///
-    /// extern "C" my_fun(x: MyType) {}
-    /// ```
-    ///
-    /// This will produce:
-    ///
-    /// ```text
-    /// error: this function function definition is affected by the wasm ABI transition: it passes an argument of non-scalar type `MyType`
-    ///   --> $DIR/wasm_c_abi_transition.rs:17:1
-    ///    |
-    ///    | pub extern "C" fn my_fun(_x: MyType) {}
-    ///    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-    ///    |
-    ///    = warning: this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release!
-    ///    = note: for more information, see issue #138762 <https://github.com/rust-lang/rust/issues/138762>
-    ///    = help: the "C" ABI Rust uses on wasm32-unknown-unknown will change to align with the standard "C" ABI for this target
-    /// ```
-    ///
-    /// ### Explanation
-    ///
-    /// Rust has historically implemented a non-spec-compliant C ABI on wasm32-unknown-unknown. This
-    /// has caused incompatibilities with other compilers and Wasm targets. In a future version
-    /// of Rust, this will be fixed, and therefore code relying on the non-spec-compliant C ABI will
-    /// stop functioning.
-    pub WASM_C_ABI,
-    Warn,
-    "detects code relying on rustc's non-spec-compliant wasm C ABI",
-    @future_incompatible = FutureIncompatibleInfo {
-        reason: FutureIncompatibilityReason::FutureReleaseError,
-        reference: "issue #138762 <https://github.com/rust-lang/rust/issues/138762>",
-        report_in_deps: true,
-    };
-}
-
-declare_lint! {
     /// The `aarch64_softfloat_neon` lint detects usage of `#[target_feature(enable = "neon")]` on
     /// softfloat aarch64 targets. Enabling this target feature causes LLVM to alter the ABI of
     /// function calls, making this attribute unsound to use.
diff --git a/compiler/rustc_lint_defs/src/lib.rs b/compiler/rustc_lint_defs/src/lib.rs
index 1d9b7a7fcb9..cd402c9234f 100644
--- a/compiler/rustc_lint_defs/src/lib.rs
+++ b/compiler/rustc_lint_defs/src/lib.rs
@@ -778,7 +778,6 @@ pub enum BuiltinLintDiag {
     UnnameableTestItems,
     DuplicateMacroAttribute,
     CfgAttrNoAttributes,
-    MissingFragmentSpecifier,
     MetaVariableStillRepeating(MacroRulesNormalizedIdent),
     MetaVariableWrongOperator,
     DuplicateMatcherBinding,
diff --git a/compiler/rustc_log/src/lib.rs b/compiler/rustc_log/src/lib.rs
index 1bb502ca3d0..df648bbd489 100644
--- a/compiler/rustc_log/src/lib.rs
+++ b/compiler/rustc_log/src/lib.rs
@@ -43,6 +43,7 @@ use tracing_subscriber::filter::{Directive, EnvFilter, LevelFilter};
 use tracing_subscriber::fmt::FmtContext;
 use tracing_subscriber::fmt::format::{self, FormatEvent, FormatFields};
 use tracing_subscriber::layer::SubscriberExt;
+use tracing_subscriber::{Layer, Registry};
 
 /// The values of all the environment variables that matter for configuring a logger.
 /// Errors are explicitly preserved so that we can share error handling.
@@ -72,6 +73,36 @@ impl LoggerConfig {
 
 /// Initialize the logger with the given values for the filter, coloring, and other options env variables.
 pub fn init_logger(cfg: LoggerConfig) -> Result<(), Error> {
+    init_logger_with_additional_layer(cfg, || Registry::default())
+}
+
+/// Trait alias for the complex return type of `build_subscriber` in
+/// [init_logger_with_additional_layer]. A [Registry] with any composition of [tracing::Subscriber]s
+/// (e.g. `Registry::default().with(custom_layer)`) should be compatible with this type.
+/// Having an alias is also useful so rustc_driver_impl does not need to explicitly depend on
+/// `tracing_subscriber`.
+pub trait BuildSubscriberRet:
+    tracing::Subscriber + for<'span> tracing_subscriber::registry::LookupSpan<'span> + Send + Sync
+{
+}
+
+impl<
+    T: tracing::Subscriber + for<'span> tracing_subscriber::registry::LookupSpan<'span> + Send + Sync,
+> BuildSubscriberRet for T
+{
+}
+
+/// Initialize the logger with the given values for the filter, coloring, and other options env variables.
+/// Additionally add a custom layer to collect logging and tracing events via `build_subscriber`,
+/// for example: `|| Registry::default().with(custom_layer)`.
+pub fn init_logger_with_additional_layer<F, T>(
+    cfg: LoggerConfig,
+    build_subscriber: F,
+) -> Result<(), Error>
+where
+    F: FnOnce() -> T,
+    T: BuildSubscriberRet,
+{
     let filter = match cfg.filter {
         Ok(env) => EnvFilter::new(env),
         _ => EnvFilter::default().add_directive(Directive::from(LevelFilter::WARN)),
@@ -124,7 +155,7 @@ pub fn init_logger(cfg: LoggerConfig) -> Result<(), Error> {
         Err(_) => {} // no wraptree
     }
 
-    let subscriber = tracing_subscriber::Registry::default().with(filter).with(layer);
+    let subscriber = build_subscriber().with(layer.with_filter(filter));
     match cfg.backtrace {
         Ok(backtrace_target) => {
             let fmt_layer = tracing_subscriber::fmt::layer()
diff --git a/compiler/rustc_metadata/src/fs.rs b/compiler/rustc_metadata/src/fs.rs
index e57534b847e..1eaad26ff8e 100644
--- a/compiler/rustc_metadata/src/fs.rs
+++ b/compiler/rustc_metadata/src/fs.rs
@@ -4,9 +4,9 @@ use std::{fs, io};
 use rustc_data_structures::temp_dir::MaybeTempDir;
 use rustc_fs_util::TempDirBuilder;
 use rustc_middle::ty::TyCtxt;
+use rustc_session::Session;
 use rustc_session::config::{CrateType, OutFileName, OutputType};
 use rustc_session::output::filename_for_metadata;
-use rustc_session::{MetadataKind, Session};
 
 use crate::errors::{
     BinaryOutputToTty, FailedCopyToStdout, FailedCreateEncodedMetadata, FailedCreateFile,
@@ -22,13 +22,8 @@ pub const METADATA_FILENAME: &str = "lib.rmeta";
 /// building an `.rlib` (stomping over one another), or writing an `.rmeta` into a
 /// directory being searched for `extern crate` (observing an incomplete file).
 /// The returned path is the temporary file containing the complete metadata.
-pub fn emit_wrapper_file(
-    sess: &Session,
-    data: &[u8],
-    tmpdir: &MaybeTempDir,
-    name: &str,
-) -> PathBuf {
-    let out_filename = tmpdir.as_ref().join(name);
+pub fn emit_wrapper_file(sess: &Session, data: &[u8], tmpdir: &Path, name: &str) -> PathBuf {
+    let out_filename = tmpdir.join(name);
     let result = fs::write(&out_filename, data);
 
     if let Err(err) = result {
@@ -38,7 +33,7 @@ pub fn emit_wrapper_file(
     out_filename
 }
 
-pub fn encode_and_write_metadata(tcx: TyCtxt<'_>) -> (EncodedMetadata, bool) {
+pub fn encode_and_write_metadata(tcx: TyCtxt<'_>) -> EncodedMetadata {
     let out_filename = filename_for_metadata(tcx.sess, tcx.output_filenames(()));
     // To avoid races with another rustc process scanning the output directory,
     // we need to write the file somewhere else and atomically move it to its
@@ -59,25 +54,20 @@ pub fn encode_and_write_metadata(tcx: TyCtxt<'_>) -> (EncodedMetadata, bool) {
         None
     };
 
-    // Always create a file at `metadata_filename`, even if we have nothing to write to it.
-    // This simplifies the creation of the output `out_filename` when requested.
-    let metadata_kind = tcx.metadata_kind();
-    match metadata_kind {
-        MetadataKind::None => {
-            std::fs::File::create(&metadata_filename).unwrap_or_else(|err| {
-                tcx.dcx().emit_fatal(FailedCreateFile { filename: &metadata_filename, err });
+    if tcx.needs_metadata() {
+        encode_metadata(tcx, &metadata_filename, metadata_stub_filename.as_deref());
+    } else {
+        // Always create a file at `metadata_filename`, even if we have nothing to write to it.
+        // This simplifies the creation of the output `out_filename` when requested.
+        std::fs::File::create(&metadata_filename).unwrap_or_else(|err| {
+            tcx.dcx().emit_fatal(FailedCreateFile { filename: &metadata_filename, err });
+        });
+        if let Some(metadata_stub_filename) = &metadata_stub_filename {
+            std::fs::File::create(metadata_stub_filename).unwrap_or_else(|err| {
+                tcx.dcx().emit_fatal(FailedCreateFile { filename: &metadata_stub_filename, err });
             });
-            if let Some(metadata_stub_filename) = &metadata_stub_filename {
-                std::fs::File::create(metadata_stub_filename).unwrap_or_else(|err| {
-                    tcx.dcx()
-                        .emit_fatal(FailedCreateFile { filename: &metadata_stub_filename, err });
-                });
-            }
-        }
-        MetadataKind::Uncompressed | MetadataKind::Compressed => {
-            encode_metadata(tcx, &metadata_filename, metadata_stub_filename.as_deref())
         }
-    };
+    }
 
     let _prof_timer = tcx.sess.prof.generic_activity("write_crate_metadata");
 
@@ -118,9 +108,7 @@ pub fn encode_and_write_metadata(tcx: TyCtxt<'_>) -> (EncodedMetadata, bool) {
                 tcx.dcx().emit_fatal(FailedCreateEncodedMetadata { err });
             });
 
-    let need_metadata_module = metadata_kind == MetadataKind::Compressed;
-
-    (metadata, need_metadata_module)
+    metadata
 }
 
 #[cfg(not(target_os = "linux"))]
diff --git a/compiler/rustc_metadata/src/locator.rs b/compiler/rustc_metadata/src/locator.rs
index 79015aab5d3..259bcb1b96d 100644
--- a/compiler/rustc_metadata/src/locator.rs
+++ b/compiler/rustc_metadata/src/locator.rs
@@ -1196,7 +1196,7 @@ impl CrateError {
                             .opts
                             .crate_name
                             .clone()
-                            .unwrap_or("<unknown>".to_string()),
+                            .unwrap_or_else(|| "<unknown>".to_string()),
                         is_nightly_build: sess.is_nightly_build(),
                         profiler_runtime: Symbol::intern(&sess.opts.unstable_opts.profiler_runtime),
                         locator_triple: locator.triple,
@@ -1217,7 +1217,11 @@ impl CrateError {
                     crate_name,
                     add_info: String::new(),
                     missing_core,
-                    current_crate: sess.opts.crate_name.clone().unwrap_or("<unknown>".to_string()),
+                    current_crate: sess
+                        .opts
+                        .crate_name
+                        .clone()
+                        .unwrap_or_else(|| "<unknown>".to_string()),
                     is_nightly_build: sess.is_nightly_build(),
                     profiler_runtime: Symbol::intern(&sess.opts.unstable_opts.profiler_runtime),
                     locator_triple: sess.opts.target_triple.clone(),
diff --git a/compiler/rustc_metadata/src/native_libs.rs b/compiler/rustc_metadata/src/native_libs.rs
index 5cdeb8935f7..f10d71f4c65 100644
--- a/compiler/rustc_metadata/src/native_libs.rs
+++ b/compiler/rustc_metadata/src/native_libs.rs
@@ -705,7 +705,7 @@ impl<'tcx> Collector<'tcx> {
             .map_or(import_name_type, |ord| Some(PeImportNameType::Ordinal(ord)));
 
         DllImport {
-            name: codegen_fn_attrs.link_name.unwrap_or(self.tcx.item_name(item)),
+            name: codegen_fn_attrs.link_name.unwrap_or_else(|| self.tcx.item_name(item)),
             import_name_type,
             calling_convention,
             span,
diff --git a/compiler/rustc_metadata/src/rmeta/decoder.rs b/compiler/rustc_metadata/src/rmeta/decoder.rs
index 1dae858b7ef..0bc980b4d9f 100644
--- a/compiler/rustc_metadata/src/rmeta/decoder.rs
+++ b/compiler/rustc_metadata/src/rmeta/decoder.rs
@@ -1,7 +1,7 @@
 // Decoding metadata from a single crate's metadata
 
 use std::iter::TrustedLen;
-use std::path::Path;
+use std::path::{Path, PathBuf};
 use std::sync::{Arc, OnceLock};
 use std::{io, iter, mem};
 
@@ -1610,10 +1610,14 @@ impl<'a> CrateMetadataRef<'a> {
     /// Proc macro crates don't currently export spans, so this function does not have
     /// to work for them.
     fn imported_source_file(self, source_file_index: u32, sess: &Session) -> ImportedSourceFile {
-        fn filter<'a>(sess: &Session, path: Option<&'a Path>) -> Option<&'a Path> {
+        fn filter<'a>(
+            sess: &Session,
+            real_source_base_dir: &Option<PathBuf>,
+            path: Option<&'a Path>,
+        ) -> Option<&'a Path> {
             path.filter(|_| {
                 // Only spend time on further checks if we have what to translate *to*.
-                sess.opts.real_rust_source_base_dir.is_some()
+                real_source_base_dir.is_some()
                 // Some tests need the translation to be always skipped.
                 && sess.opts.unstable_opts.translate_remapped_path_to_local_path
             })
@@ -1625,84 +1629,92 @@ impl<'a> CrateMetadataRef<'a> {
             })
         }
 
-        let try_to_translate_virtual_to_real = |name: &mut rustc_span::FileName| {
-            // Translate the virtual `/rustc/$hash` prefix back to a real directory
-            // that should hold actual sources, where possible.
-            //
-            // NOTE: if you update this, you might need to also update bootstrap's code for generating
-            // the `rust-src` component in `Src::run` in `src/bootstrap/dist.rs`.
-            let virtual_rust_source_base_dir = [
-                filter(sess, option_env!("CFG_VIRTUAL_RUST_SOURCE_BASE_DIR").map(Path::new)),
-                filter(sess, sess.opts.unstable_opts.simulate_remapped_rust_src_base.as_deref()),
-            ];
+        let try_to_translate_virtual_to_real =
+            |virtual_source_base_dir: Option<&str>,
+             real_source_base_dir: &Option<PathBuf>,
+             name: &mut rustc_span::FileName| {
+                let virtual_source_base_dir = [
+                    filter(sess, real_source_base_dir, virtual_source_base_dir.map(Path::new)),
+                    filter(
+                        sess,
+                        real_source_base_dir,
+                        sess.opts.unstable_opts.simulate_remapped_rust_src_base.as_deref(),
+                    ),
+                ];
 
-            debug!(
-                "try_to_translate_virtual_to_real(name={:?}): \
-                 virtual_rust_source_base_dir={:?}, real_rust_source_base_dir={:?}",
-                name, virtual_rust_source_base_dir, sess.opts.real_rust_source_base_dir,
-            );
+                debug!(
+                    "try_to_translate_virtual_to_real(name={:?}): \
+                     virtual_source_base_dir={:?}, real_source_base_dir={:?}",
+                    name, virtual_source_base_dir, real_source_base_dir,
+                );
 
-            for virtual_dir in virtual_rust_source_base_dir.iter().flatten() {
-                if let Some(real_dir) = &sess.opts.real_rust_source_base_dir
+                for virtual_dir in virtual_source_base_dir.iter().flatten() {
+                    if let Some(real_dir) = &real_source_base_dir
+                        && let rustc_span::FileName::Real(old_name) = name
+                        && let rustc_span::RealFileName::Remapped { local_path: _, virtual_name } =
+                            old_name
+                        && let Ok(rest) = virtual_name.strip_prefix(virtual_dir)
+                    {
+                        let new_path = real_dir.join(rest);
+
+                        debug!(
+                            "try_to_translate_virtual_to_real: `{}` -> `{}`",
+                            virtual_name.display(),
+                            new_path.display(),
+                        );
+
+                        // Check if the translated real path is affected by any user-requested
+                        // remaps via --remap-path-prefix. Apply them if so.
+                        // Note that this is a special case for imported rust-src paths specified by
+                        // https://rust-lang.github.io/rfcs/3127-trim-paths.html#handling-sysroot-paths.
+                        // Other imported paths are not currently remapped (see #66251).
+                        let (user_remapped, applied) =
+                            sess.source_map().path_mapping().map_prefix(&new_path);
+                        let new_name = if applied {
+                            rustc_span::RealFileName::Remapped {
+                                local_path: Some(new_path.clone()),
+                                virtual_name: user_remapped.to_path_buf(),
+                            }
+                        } else {
+                            rustc_span::RealFileName::LocalPath(new_path)
+                        };
+                        *old_name = new_name;
+                    }
+                }
+            };
+
+        let try_to_translate_real_to_virtual =
+            |virtual_source_base_dir: Option<&str>,
+             real_source_base_dir: &Option<PathBuf>,
+             subdir: &str,
+             name: &mut rustc_span::FileName| {
+                if let Some(virtual_dir) = &sess.opts.unstable_opts.simulate_remapped_rust_src_base
+                    && let Some(real_dir) = real_source_base_dir
                     && let rustc_span::FileName::Real(old_name) = name
-                    && let rustc_span::RealFileName::Remapped { local_path: _, virtual_name } =
-                        old_name
-                    && let Ok(rest) = virtual_name.strip_prefix(virtual_dir)
                 {
-                    // The std library crates are in
-                    // `$sysroot/lib/rustlib/src/rust/library`, whereas other crates
-                    // may be in `$sysroot/lib/rustlib/src/rust/` directly. So we
-                    // detect crates from the std libs and handle them specially.
-                    const STD_LIBS: &[&str] = &[
-                        "core",
-                        "alloc",
-                        "std",
-                        "test",
-                        "term",
-                        "unwind",
-                        "proc_macro",
-                        "panic_abort",
-                        "panic_unwind",
-                        "profiler_builtins",
-                        "rtstartup",
-                        "rustc-std-workspace-core",
-                        "rustc-std-workspace-alloc",
-                        "rustc-std-workspace-std",
-                        "backtrace",
-                    ];
-                    let is_std_lib = STD_LIBS.iter().any(|l| rest.starts_with(l));
-
-                    let new_path = if is_std_lib {
-                        real_dir.join("library").join(rest)
-                    } else {
-                        real_dir.join(rest)
+                    let relative_path = match old_name {
+                        rustc_span::RealFileName::LocalPath(local) => {
+                            local.strip_prefix(real_dir).ok()
+                        }
+                        rustc_span::RealFileName::Remapped { virtual_name, .. } => {
+                            virtual_source_base_dir
+                                .and_then(|virtual_dir| virtual_name.strip_prefix(virtual_dir).ok())
+                        }
                     };
-
                     debug!(
-                        "try_to_translate_virtual_to_real: `{}` -> `{}`",
-                        virtual_name.display(),
-                        new_path.display(),
+                        ?relative_path,
+                        ?virtual_dir,
+                        ?subdir,
+                        "simulate_remapped_rust_src_base"
                     );
-
-                    // Check if the translated real path is affected by any user-requested
-                    // remaps via --remap-path-prefix. Apply them if so.
-                    // Note that this is a special case for imported rust-src paths specified by
-                    // https://rust-lang.github.io/rfcs/3127-trim-paths.html#handling-sysroot-paths.
-                    // Other imported paths are not currently remapped (see #66251).
-                    let (user_remapped, applied) =
-                        sess.source_map().path_mapping().map_prefix(&new_path);
-                    let new_name = if applied {
-                        rustc_span::RealFileName::Remapped {
-                            local_path: Some(new_path.clone()),
-                            virtual_name: user_remapped.to_path_buf(),
-                        }
-                    } else {
-                        rustc_span::RealFileName::LocalPath(new_path)
-                    };
-                    *old_name = new_name;
+                    if let Some(rest) = relative_path.and_then(|p| p.strip_prefix(subdir).ok()) {
+                        *old_name = rustc_span::RealFileName::Remapped {
+                            local_path: None,
+                            virtual_name: virtual_dir.join(subdir).join(rest),
+                        };
+                    }
                 }
-            }
-        };
+            };
 
         let mut import_info = self.cdata.source_map_import_info.lock();
         for _ in import_info.len()..=(source_file_index as usize) {
@@ -1740,36 +1752,45 @@ impl<'a> CrateMetadataRef<'a> {
                 // This is useful for testing so that tests about the effects of
                 // `try_to_translate_virtual_to_real` don't have to worry about how the
                 // compiler is bootstrapped.
-                if let Some(virtual_dir) = &sess.opts.unstable_opts.simulate_remapped_rust_src_base
-                    && let Some(real_dir) = &sess.opts.real_rust_source_base_dir
-                    && let rustc_span::FileName::Real(ref mut old_name) = name
-                {
-                    let relative_path = match old_name {
-                        rustc_span::RealFileName::LocalPath(local) => {
-                            local.strip_prefix(real_dir).ok()
-                        }
-                        rustc_span::RealFileName::Remapped { virtual_name, .. } => {
-                            option_env!("CFG_VIRTUAL_RUST_SOURCE_BASE_DIR")
-                                .and_then(|virtual_dir| virtual_name.strip_prefix(virtual_dir).ok())
-                        }
-                    };
-                    debug!(?relative_path, ?virtual_dir, "simulate_remapped_rust_src_base");
-                    for subdir in ["library", "compiler"] {
-                        if let Some(rest) = relative_path.and_then(|p| p.strip_prefix(subdir).ok())
-                        {
-                            *old_name = rustc_span::RealFileName::Remapped {
-                                local_path: None, // FIXME: maybe we should preserve this?
-                                virtual_name: virtual_dir.join(subdir).join(rest),
-                            };
-                            break;
-                        }
-                    }
-                }
+                try_to_translate_real_to_virtual(
+                    option_env!("CFG_VIRTUAL_RUST_SOURCE_BASE_DIR"),
+                    &sess.opts.real_rust_source_base_dir,
+                    "library",
+                    &mut name,
+                );
+
+                // If this file is under $sysroot/lib/rustlib/rustc-src/
+                // and the user wish to simulate remapping with -Z simulate-remapped-rust-src-base,
+                // then we change `name` to a similar state as if the rust was bootstrapped
+                // with `remap-debuginfo = true`.
+                try_to_translate_real_to_virtual(
+                    option_env!("CFG_VIRTUAL_RUSTC_DEV_SOURCE_BASE_DIR"),
+                    &sess.opts.real_rustc_dev_source_base_dir,
+                    "compiler",
+                    &mut name,
+                );
 
                 // If this file's path has been remapped to `/rustc/$hash`,
-                // we might be able to reverse that (also see comments above,
-                // on `try_to_translate_virtual_to_real`).
-                try_to_translate_virtual_to_real(&mut name);
+                // we might be able to reverse that.
+                //
+                // NOTE: if you update this, you might need to also update bootstrap's code for generating
+                // the `rust-src` component in `Src::run` in `src/bootstrap/dist.rs`.
+                try_to_translate_virtual_to_real(
+                    option_env!("CFG_VIRTUAL_RUST_SOURCE_BASE_DIR"),
+                    &sess.opts.real_rust_source_base_dir,
+                    &mut name,
+                );
+
+                // If this file's path has been remapped to `/rustc-dev/$hash`,
+                // we might be able to reverse that.
+                //
+                // NOTE: if you update this, you might need to also update bootstrap's code for generating
+                // the `rustc-dev` component in `Src::run` in `src/bootstrap/dist.rs`.
+                try_to_translate_virtual_to_real(
+                    option_env!("CFG_VIRTUAL_RUSTC_DEV_SOURCE_BASE_DIR"),
+                    &sess.opts.real_rustc_dev_source_base_dir,
+                    &mut name,
+                );
 
                 let local_version = sess.source_map().new_imported_source_file(
                     name,
diff --git a/compiler/rustc_metadata/src/rmeta/encoder.rs b/compiler/rustc_metadata/src/rmeta/encoder.rs
index 3ab989d2d3b..00bd32eb0eb 100644
--- a/compiler/rustc_metadata/src/rmeta/encoder.rs
+++ b/compiler/rustc_metadata/src/rmeta/encoder.rs
@@ -10,7 +10,7 @@ use rustc_data_structures::fx::{FxIndexMap, FxIndexSet};
 use rustc_data_structures::memmap::{Mmap, MmapMut};
 use rustc_data_structures::sync::{join, par_for_each_in};
 use rustc_data_structures::temp_dir::MaybeTempDir;
-use rustc_data_structures::thousands::format_with_underscores;
+use rustc_data_structures::thousands::usize_with_underscores;
 use rustc_feature::Features;
 use rustc_hir as hir;
 use rustc_hir::def_id::{CRATE_DEF_ID, CRATE_DEF_INDEX, LOCAL_CRATE, LocalDefId, LocalDefIdSet};
@@ -789,7 +789,7 @@ impl<'a, 'tcx> EncodeContext<'a, 'tcx> {
                     "{} {:<23}{:>10} ({:4.1}%)",
                     prefix,
                     label,
-                    format_with_underscores(size),
+                    usize_with_underscores(size),
                     perc(size)
                 );
             }
@@ -798,7 +798,7 @@ impl<'a, 'tcx> EncodeContext<'a, 'tcx> {
                 "{} {:<23}{:>10} (of which {:.1}% are zero bytes)",
                 prefix,
                 "Total",
-                format_with_underscores(total_bytes),
+                usize_with_underscores(total_bytes),
                 perc(zero_bytes)
             );
             eprintln!("{prefix}");
diff --git a/compiler/rustc_middle/src/hir/map.rs b/compiler/rustc_middle/src/hir/map.rs
index 3de97c8c0d9..e5e1ae508ed 100644
--- a/compiler/rustc_middle/src/hir/map.rs
+++ b/compiler/rustc_middle/src/hir/map.rs
@@ -1233,6 +1233,7 @@ pub(super) fn hir_module_items(tcx: TyCtxt<'_>, module_id: LocalModDefId) -> Mod
         body_owners: body_owners.into_boxed_slice(),
         opaques: opaques.into_boxed_slice(),
         nested_bodies: nested_bodies.into_boxed_slice(),
+        delayed_lint_items: Box::new([]),
     }
 }
 
@@ -1254,6 +1255,7 @@ pub(crate) fn hir_crate_items(tcx: TyCtxt<'_>, _: ()) -> ModuleItems {
         body_owners,
         opaques,
         nested_bodies,
+        delayed_lint_items,
         ..
     } = collector;
 
@@ -1266,6 +1268,7 @@ pub(crate) fn hir_crate_items(tcx: TyCtxt<'_>, _: ()) -> ModuleItems {
         body_owners: body_owners.into_boxed_slice(),
         opaques: opaques.into_boxed_slice(),
         nested_bodies: nested_bodies.into_boxed_slice(),
+        delayed_lint_items: delayed_lint_items.into_boxed_slice(),
     }
 }
 
@@ -1282,6 +1285,7 @@ struct ItemCollector<'tcx> {
     body_owners: Vec<LocalDefId>,
     opaques: Vec<LocalDefId>,
     nested_bodies: Vec<LocalDefId>,
+    delayed_lint_items: Vec<OwnerId>,
 }
 
 impl<'tcx> ItemCollector<'tcx> {
@@ -1297,6 +1301,7 @@ impl<'tcx> ItemCollector<'tcx> {
             body_owners: Vec::default(),
             opaques: Vec::default(),
             nested_bodies: Vec::default(),
+            delayed_lint_items: Vec::default(),
         }
     }
 }
@@ -1314,6 +1319,9 @@ impl<'hir> Visitor<'hir> for ItemCollector<'hir> {
         }
 
         self.items.push(item.item_id());
+        if self.crate_collector && item.has_delayed_lints {
+            self.delayed_lint_items.push(item.item_id().owner_id);
+        }
 
         // Items that are modules are handled here instead of in visit_mod.
         if let ItemKind::Mod(_, module) = &item.kind {
@@ -1329,6 +1337,9 @@ impl<'hir> Visitor<'hir> for ItemCollector<'hir> {
 
     fn visit_foreign_item(&mut self, item: &'hir ForeignItem<'hir>) {
         self.foreign_items.push(item.foreign_item_id());
+        if self.crate_collector && item.has_delayed_lints {
+            self.delayed_lint_items.push(item.foreign_item_id().owner_id);
+        }
         intravisit::walk_foreign_item(self, item)
     }
 
@@ -1362,6 +1373,10 @@ impl<'hir> Visitor<'hir> for ItemCollector<'hir> {
         }
 
         self.trait_items.push(item.trait_item_id());
+        if self.crate_collector && item.has_delayed_lints {
+            self.delayed_lint_items.push(item.trait_item_id().owner_id);
+        }
+
         intravisit::walk_trait_item(self, item)
     }
 
@@ -1371,6 +1386,10 @@ impl<'hir> Visitor<'hir> for ItemCollector<'hir> {
         }
 
         self.impl_items.push(item.impl_item_id());
+        if self.crate_collector && item.has_delayed_lints {
+            self.delayed_lint_items.push(item.impl_item_id().owner_id);
+        }
+
         intravisit::walk_impl_item(self, item)
     }
 }
diff --git a/compiler/rustc_middle/src/hir/mod.rs b/compiler/rustc_middle/src/hir/mod.rs
index d1f5caaafb2..9f79ed4b5a5 100644
--- a/compiler/rustc_middle/src/hir/mod.rs
+++ b/compiler/rustc_middle/src/hir/mod.rs
@@ -12,6 +12,7 @@ use rustc_data_structures::stable_hasher::{HashStable, StableHasher};
 use rustc_data_structures::sync::{DynSend, DynSync, try_par_for_each_in};
 use rustc_hir::def::DefKind;
 use rustc_hir::def_id::{DefId, LocalDefId, LocalModDefId};
+use rustc_hir::lints::DelayedLint;
 use rustc_hir::*;
 use rustc_macros::{Decodable, Encodable, HashStable};
 use rustc_span::{ErrorGuaranteed, ExpnId, Span};
@@ -31,6 +32,8 @@ pub struct ModuleItems {
     opaques: Box<[LocalDefId]>,
     body_owners: Box<[LocalDefId]>,
     nested_bodies: Box<[LocalDefId]>,
+    // only filled with hir_crate_items, not with hir_module_items
+    delayed_lint_items: Box<[OwnerId]>,
 }
 
 impl ModuleItems {
@@ -48,6 +51,10 @@ impl ModuleItems {
         self.trait_items.iter().copied()
     }
 
+    pub fn delayed_lint_items(&self) -> impl Iterator<Item = OwnerId> {
+        self.delayed_lint_items.iter().copied()
+    }
+
     /// Returns all items that are associated with some `impl` block (both inherent and trait impl
     /// blocks).
     pub fn impl_items(&self) -> impl Iterator<Item = ImplItemId> {
@@ -161,8 +168,9 @@ impl<'tcx> TyCtxt<'tcx> {
         node: OwnerNode<'_>,
         bodies: &SortedMap<ItemLocalId, &Body<'_>>,
         attrs: &SortedMap<ItemLocalId, &[Attribute]>,
+        delayed_lints: &[DelayedLint],
         define_opaque: Option<&[(Span, LocalDefId)]>,
-    ) -> (Option<Fingerprint>, Option<Fingerprint>) {
+    ) -> (Option<Fingerprint>, Option<Fingerprint>, Option<Fingerprint>) {
         if self.needs_crate_hash() {
             self.with_stable_hashing_context(|mut hcx| {
                 let mut stable_hasher = StableHasher::new();
@@ -178,10 +186,16 @@ impl<'tcx> TyCtxt<'tcx> {
                 define_opaque.hash_stable(&mut hcx, &mut stable_hasher);
 
                 let h2 = stable_hasher.finish();
-                (Some(h1), Some(h2))
+
+                // hash lints emitted during ast lowering
+                let mut stable_hasher = StableHasher::new();
+                delayed_lints.hash_stable(&mut hcx, &mut stable_hasher);
+                let h3 = stable_hasher.finish();
+
+                (Some(h1), Some(h2), Some(h3))
             })
         } else {
-            (None, None)
+            (None, None, None)
         }
     }
 }
@@ -214,6 +228,8 @@ pub fn provide(providers: &mut Providers) {
     providers.hir_attr_map = |tcx, id| {
         tcx.hir_crate(()).owners[id.def_id].as_owner().map_or(AttributeMap::EMPTY, |o| &o.attrs)
     };
+    providers.opt_ast_lowering_delayed_lints =
+        |tcx, id| tcx.hir_crate(()).owners[id.def_id].as_owner().map(|o| &o.delayed_lints);
     providers.def_span = |tcx, def_id| tcx.hir_span(tcx.local_def_id_to_hir_id(def_id));
     providers.def_ident_span = |tcx, def_id| {
         let hir_id = tcx.local_def_id_to_hir_id(def_id);
diff --git a/compiler/rustc_middle/src/lib.rs b/compiler/rustc_middle/src/lib.rs
index 667361b3ca0..c488ef9b575 100644
--- a/compiler/rustc_middle/src/lib.rs
+++ b/compiler/rustc_middle/src/lib.rs
@@ -28,6 +28,8 @@
 #![allow(internal_features)]
 #![allow(rustc::diagnostic_outside_of_impl)]
 #![allow(rustc::untranslatable_diagnostic)]
+#![cfg_attr(not(bootstrap), allow(rustc::direct_use_of_rustc_type_ir))]
+#![cfg_attr(not(bootstrap), feature(sized_hierarchy))]
 #![doc(html_root_url = "https://doc.rust-lang.org/nightly/nightly-rustc/")]
 #![doc(rust_logo)]
 #![feature(allocator_api)]
diff --git a/compiler/rustc_middle/src/middle/mod.rs b/compiler/rustc_middle/src/middle/mod.rs
index 4587dcaddc4..6ca1e620704 100644
--- a/compiler/rustc_middle/src/middle/mod.rs
+++ b/compiler/rustc_middle/src/middle/mod.rs
@@ -12,7 +12,7 @@ pub mod lib_features {
     #[derive(HashStable, TyEncodable, TyDecodable)]
     pub enum FeatureStability {
         AcceptedSince(Symbol),
-        Unstable,
+        Unstable { old_name: Option<Symbol> },
     }
 
     #[derive(HashStable, Debug, Default)]
diff --git a/compiler/rustc_middle/src/middle/stability.rs b/compiler/rustc_middle/src/middle/stability.rs
index 454ab8c107f..ab6a65ed526 100644
--- a/compiler/rustc_middle/src/middle/stability.rs
+++ b/compiler/rustc_middle/src/middle/stability.rs
@@ -411,7 +411,7 @@ impl<'tcx> TyCtxt<'tcx> {
 
         match stability {
             Some(Stability {
-                level: attrs::StabilityLevel::Unstable { reason, issue, is_soft, implied_by },
+                level: attrs::StabilityLevel::Unstable { reason, issue, is_soft, implied_by, .. },
                 feature,
                 ..
             }) => {
diff --git a/compiler/rustc_middle/src/mir/syntax.rs b/compiler/rustc_middle/src/mir/syntax.rs
index f2f975a6968..56f19d7929d 100644
--- a/compiler/rustc_middle/src/mir/syntax.rs
+++ b/compiler/rustc_middle/src/mir/syntax.rs
@@ -1133,13 +1133,6 @@ pub type AssertMessage<'tcx> = AssertKind<Operand<'tcx>>;
 /// Each local naturally corresponds to the place `Place { local, projection: [] }`. This place has
 /// the address of the local's allocation and the type of the local.
 ///
-/// **Needs clarification:** Unsized locals seem to present a bit of an issue. Their allocation
-/// can't actually be created on `StorageLive`, because it's unclear how big to make the allocation.
-/// Furthermore, MIR produces assignments to unsized locals, although that is not permitted under
-/// `#![feature(unsized_locals)]` in Rust. Besides just putting "unsized locals are special and
-/// different" in a bunch of places, I (JakobDegen) don't know how to incorporate this behavior into
-/// the current MIR semantics in a clean way - possibly this needs some design work first.
-///
 /// For places that are not locals, ie they have a non-empty list of projections, we define the
 /// values as a function of the parent place, that is the place with its last [`ProjectionElem`]
 /// stripped. The way this is computed of course depends on the kind of that last projection
diff --git a/compiler/rustc_middle/src/query/keys.rs b/compiler/rustc_middle/src/query/keys.rs
index 9ed1f10455a..4d914c42cfc 100644
--- a/compiler/rustc_middle/src/query/keys.rs
+++ b/compiler/rustc_middle/src/query/keys.rs
@@ -328,6 +328,14 @@ impl Key for (DefId, SimplifiedType) {
     }
 }
 
+impl Key for (DefId, ty::SizedTraitKind) {
+    type Cache<V> = DefaultCache<Self, V>;
+
+    fn default_span(&self, tcx: TyCtxt<'_>) -> Span {
+        self.0.default_span(tcx)
+    }
+}
+
 impl<'tcx> Key for GenericArgsRef<'tcx> {
     type Cache<V> = DefaultCache<Self, V>;
 
diff --git a/compiler/rustc_middle/src/query/mod.rs b/compiler/rustc_middle/src/query/mod.rs
index d8c927e00db..3668f4e12f5 100644
--- a/compiler/rustc_middle/src/query/mod.rs
+++ b/compiler/rustc_middle/src/query/mod.rs
@@ -1,8 +1,64 @@
-//! Defines the various compiler queries.
 //!
-//! For more information on the query system, see
-//! ["Queries: demand-driven compilation"](https://rustc-dev-guide.rust-lang.org/query.html).
-//! This chapter includes instructions for adding new queries.
+//! # The rustc Query System: Query Definitions and Modifiers
+//!
+//! The core processes in rustc are shipped as queries. Each query is a demand-driven function from some key to a value.
+//! The execution result of the function is cached and directly read during the next request, thereby improving compilation efficiency.
+//! Some results are saved locally and directly read during the next compilation, which are core of incremental compilation.
+//!
+//! ## How to Read This Module
+//!
+//! Each `query` block in this file defines a single query, specifying its key and value types, along with various modifiers.
+//! These query definitions are processed by the [`rustc_macros`], which expands them into the necessary boilerplate code
+//! for the query system—including the [`Providers`] struct (a function table for all query implementations, where each field is
+//! a function pointer to the actual provider), caching, and dependency graph integration.
+//! **Note:** The `Providers` struct is not a Rust trait, but a struct generated by the `rustc_macros` to hold all provider functions.
+//! The `rustc_macros` also supports a set of **query modifiers** (see below) that control the behavior of each query.
+//!
+//! The actual provider functions are implemented in various modules and registered into the `Providers` struct
+//! during compiler initialization (see [`rustc_interface::passes::DEFAULT_QUERY_PROVIDERS`]).
+//!
+//! [`rustc_macros`]: https://doc.rust-lang.org/nightly/nightly-rustc/rustc_macros/index.html
+//! [`rustc_interface::passes::DEFAULT_QUERY_PROVIDERS`]: ../../rustc_interface/passes/static.DEFAULT_QUERY_PROVIDERS.html
+//!
+//! ## Query Modifiers
+//!
+//! Query modifiers are special flags that alter the behavior of a query. They are parsed and processed by the `rustc_macros`
+//! The main modifiers are:
+//!
+//! - `desc { ... }`: Sets the human-readable description for diagnostics and profiling. Required for every query.
+//! - `arena_cache`: Use an arena for in-memory caching of the query result.
+//! - `cache_on_disk_if { ... }`: Cache the query result to disk if the provided block evaluates to true.
+//! - `fatal_cycle`: If a dependency cycle is detected, abort compilation with a fatal error.
+//! - `cycle_delay_bug`: If a dependency cycle is detected, emit a delayed bug instead of aborting immediately.
+//! - `cycle_stash`: If a dependency cycle is detected, stash the error for later handling.
+//! - `no_hash`: Do not hash the query result for incremental compilation; just mark as dirty if recomputed.
+//! - `anon`: Make the query anonymous in the dependency graph (no dep node is created).
+//! - `eval_always`: Always evaluate the query, ignoring its dependencies and cached results.
+//! - `depth_limit`: Impose a recursion depth limit on the query to prevent stack overflows.
+//! - `separate_provide_extern`: Use separate provider functions for local and external crates.
+//! - `feedable`: Allow the query result to be set from another query ("fed" externally).
+//! - `return_result_from_ensure_ok`: When called via `tcx.ensure_ok()`, return `Result<(), ErrorGuaranteed>` instead of `()`.
+//!   If the query needs to be executed and returns an error, the error is returned to the caller.
+//!   Only valid for queries returning `Result<_, ErrorGuaranteed>`.
+//!
+//! For the up-to-date list, see the `QueryModifiers` struct in
+//! [`rustc_macros/src/query.rs`](https://github.com/rust-lang/rust/blob/master/compiler/rustc_macros/src/query.rs)
+//! and for more details in incremental compilation, see the
+//! [Query modifiers in incremental compilation](https://rustc-dev-guide.rust-lang.org/queries/incremental-compilation-in-detail.html#query-modifiers) section of the rustc-dev-guide.
+//!
+//! ## Query Expansion and Code Generation
+//!
+//! The [`rustc_macros::rustc_queries`] macro expands each query definition into:
+//! - A method on [`TyCtxt`] (and [`TyCtxtAt`]) for invoking the query.
+//! - Provider traits and structs for supplying the query's value.
+//! - Caching and dependency graph integration.
+//! - Support for incremental compilation, disk caching, and arena allocation as controlled by the modifiers.
+//!
+//! [`rustc_macros::rustc_queries`]: ../../rustc_macros/macro.rustc_queries.html
+//!
+//! The macro-based approach allows the query system to be highly flexible and maintainable, while minimizing boilerplate.
+//!
+//! For more details, see the [rustc-dev-guide](https://rustc-dev-guide.rust-lang.org/query.html).
 
 #![allow(unused_parens)]
 
@@ -81,8 +137,8 @@ use crate::ty::layout::ValidityRequirement;
 use crate::ty::print::{PrintTraitRefExt, describe_as_module};
 use crate::ty::util::AlwaysRequiresDrop;
 use crate::ty::{
-    self, CrateInherentImpls, GenericArg, GenericArgsRef, PseudoCanonicalInput, Ty, TyCtxt,
-    TyCtxtFeed,
+    self, CrateInherentImpls, GenericArg, GenericArgsRef, PseudoCanonicalInput, SizedTraitKind, Ty,
+    TyCtxt, TyCtxtFeed,
 };
 use crate::{dep_graph, mir, thir};
 
@@ -221,6 +277,14 @@ rustc_queries! {
         feedable
     }
 
+    /// Gives access to lints emitted during ast lowering.
+    ///
+    /// This can be conveniently accessed by `tcx.hir_*` methods.
+    /// Avoid calling this query directly.
+    query opt_ast_lowering_delayed_lints(key: hir::OwnerId) -> Option<&'tcx hir::lints::DelayedLints> {
+        desc { |tcx| "getting AST lowering delayed lints in `{}`", tcx.def_path_str(key) }
+    }
+
     /// Returns the *default* of the const pararameter given by `DefId`.
     ///
     /// E.g., given `struct Ty<const N: usize = 3>;` this returns `3` for `N`.
@@ -846,9 +910,10 @@ rustc_queries! {
         cache_on_disk_if { key.is_local() }
         separate_provide_extern
     }
-
-    query adt_sized_constraint(key: DefId) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
-        desc { |tcx| "computing the `Sized` constraint for `{}`", tcx.def_path_str(key) }
+    query adt_sizedness_constraint(
+        key: (DefId, SizedTraitKind)
+    ) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
+        desc { |tcx| "computing the sizedness constraint for `{}`", tcx.def_path_str(key.0) }
     }
 
     query adt_dtorck_constraint(
@@ -1511,7 +1576,7 @@ rustc_queries! {
     query vtable_allocation(key: (Ty<'tcx>, Option<ty::ExistentialTraitRef<'tcx>>)) -> mir::interpret::AllocId {
         desc { |tcx| "vtable const allocation for <{} as {}>",
             key.0,
-            key.1.map(|trait_ref| format!("{trait_ref}")).unwrap_or("_".to_owned())
+            key.1.map(|trait_ref| format!("{trait_ref}")).unwrap_or_else(|| "_".to_owned())
         }
     }
 
diff --git a/compiler/rustc_middle/src/traits/solve.rs b/compiler/rustc_middle/src/traits/solve.rs
index 145561b76c4..ef5223de0e8 100644
--- a/compiler/rustc_middle/src/traits/solve.rs
+++ b/compiler/rustc_middle/src/traits/solve.rs
@@ -49,6 +49,13 @@ impl<'tcx> TypeFoldable<TyCtxt<'tcx>> for ExternalConstraints<'tcx> {
         self,
         folder: &mut F,
     ) -> Result<Self, F::Error> {
+        // Perf testing has found that this check is slightly faster than
+        // folding and re-interning an empty `ExternalConstraintsData`.
+        // See: <https://github.com/rust-lang/rust/pull/142430>.
+        if self.is_empty() {
+            return Ok(self);
+        }
+
         Ok(FallibleTypeFolder::cx(folder).mk_external_constraints(ExternalConstraintsData {
             region_constraints: self.region_constraints.clone().try_fold_with(folder)?,
             opaque_types: self
@@ -64,6 +71,13 @@ impl<'tcx> TypeFoldable<TyCtxt<'tcx>> for ExternalConstraints<'tcx> {
     }
 
     fn fold_with<F: TypeFolder<TyCtxt<'tcx>>>(self, folder: &mut F) -> Self {
+        // Perf testing has found that this check is slightly faster than
+        // folding and re-interning an empty `ExternalConstraintsData`.
+        // See: <https://github.com/rust-lang/rust/pull/142430>.
+        if self.is_empty() {
+            return self;
+        }
+
         TypeFolder::cx(folder).mk_external_constraints(ExternalConstraintsData {
             region_constraints: self.region_constraints.clone().fold_with(folder),
             opaque_types: self.opaque_types.iter().map(|opaque| opaque.fold_with(folder)).collect(),
diff --git a/compiler/rustc_middle/src/ty/adt.rs b/compiler/rustc_middle/src/ty/adt.rs
index d92b4f9c06b..6d5a3abf665 100644
--- a/compiler/rustc_middle/src/ty/adt.rs
+++ b/compiler/rustc_middle/src/ty/adt.rs
@@ -229,8 +229,12 @@ impl<'tcx> rustc_type_ir::inherent::AdtDef<TyCtxt<'tcx>> for AdtDef<'tcx> {
         )
     }
 
-    fn sized_constraint(self, tcx: TyCtxt<'tcx>) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
-        self.sized_constraint(tcx)
+    fn sizedness_constraint(
+        self,
+        tcx: TyCtxt<'tcx>,
+        sizedness: ty::SizedTraitKind,
+    ) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
+        self.sizedness_constraint(tcx, sizedness)
     }
 
     fn is_fundamental(self) -> bool {
@@ -634,10 +638,15 @@ impl<'tcx> AdtDef<'tcx> {
         tcx.adt_async_destructor(self.did())
     }
 
-    /// Returns a type such that `Self: Sized` if and only if that type is `Sized`,
-    /// or `None` if the type is always sized.
-    pub fn sized_constraint(self, tcx: TyCtxt<'tcx>) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
-        if self.is_struct() { tcx.adt_sized_constraint(self.did()) } else { None }
+    /// If this ADT is a struct, returns a type such that `Self: {Meta,Pointee,}Sized` if and only
+    /// if that type is `{Meta,Pointee,}Sized`, or `None` if this ADT is always
+    /// `{Meta,Pointee,}Sized`.
+    pub fn sizedness_constraint(
+        self,
+        tcx: TyCtxt<'tcx>,
+        sizedness: ty::SizedTraitKind,
+    ) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
+        if self.is_struct() { tcx.adt_sizedness_constraint((self.did(), sizedness)) } else { None }
     }
 }
 
diff --git a/compiler/rustc_middle/src/ty/codec.rs b/compiler/rustc_middle/src/ty/codec.rs
index e0f70737add..3d7965f6cfe 100644
--- a/compiler/rustc_middle/src/ty/codec.rs
+++ b/compiler/rustc_middle/src/ty/codec.rs
@@ -13,7 +13,7 @@ use std::marker::DiscriminantKind;
 use rustc_abi::{FieldIdx, VariantIdx};
 use rustc_data_structures::fx::FxHashMap;
 use rustc_hir::def_id::LocalDefId;
-use rustc_serialize::{Decodable, Encodable};
+use rustc_serialize::{Decodable, Encodable, PointeeSized};
 use rustc_span::source_map::Spanned;
 use rustc_span::{Span, SpanDecoder, SpanEncoder};
 
@@ -96,7 +96,7 @@ impl<'tcx, E: TyEncoder<'tcx>> EncodableWithShorthand<'tcx, E> for ty::Predicate
 ///
 /// `Decodable` can still be implemented in cases where `Decodable` is required
 /// by a trait bound.
-pub trait RefDecodable<'tcx, D: TyDecoder<'tcx>> {
+pub trait RefDecodable<'tcx, D: TyDecoder<'tcx>>: PointeeSized {
     fn decode(d: &mut D) -> &'tcx Self;
 }
 
diff --git a/compiler/rustc_middle/src/ty/consts.rs b/compiler/rustc_middle/src/ty/consts.rs
index 455ac660412..2fbaa2221a1 100644
--- a/compiler/rustc_middle/src/ty/consts.rs
+++ b/compiler/rustc_middle/src/ty/consts.rs
@@ -163,6 +163,10 @@ impl<'tcx> rustc_type_ir::inherent::Const<TyCtxt<'tcx>> for Const<'tcx> {
         Const::new_bound(tcx, debruijn, var)
     }
 
+    fn new_placeholder(tcx: TyCtxt<'tcx>, placeholder: ty::PlaceholderConst) -> Self {
+        Const::new_placeholder(tcx, placeholder)
+    }
+
     fn new_unevaluated(interner: TyCtxt<'tcx>, uv: ty::UnevaluatedConst<'tcx>) -> Self {
         Const::new_unevaluated(interner, uv)
     }
diff --git a/compiler/rustc_middle/src/ty/context.rs b/compiler/rustc_middle/src/ty/context.rs
index cb132ae5573..f1395c242f2 100644
--- a/compiler/rustc_middle/src/ty/context.rs
+++ b/compiler/rustc_middle/src/ty/context.rs
@@ -4,7 +4,7 @@
 
 pub mod tls;
 
-use std::assert_matches::{assert_matches, debug_assert_matches};
+use std::assert_matches::debug_assert_matches;
 use std::borrow::Borrow;
 use std::cmp::Ordering;
 use std::env::VarError;
@@ -30,7 +30,7 @@ use rustc_data_structures::sync::{
     self, DynSend, DynSync, FreezeReadGuard, Lock, RwLock, WorkerLocal,
 };
 use rustc_errors::{
-    Applicability, Diag, DiagCtxtHandle, ErrorGuaranteed, LintDiagnostic, MultiSpan,
+    Applicability, Diag, DiagCtxtHandle, ErrorGuaranteed, LintDiagnostic, LintEmitter, MultiSpan,
 };
 use rustc_hir::def::{CtorKind, DefKind};
 use rustc_hir::def_id::{CrateNum, DefId, LOCAL_CRATE, LocalDefId};
@@ -43,11 +43,12 @@ use rustc_macros::{HashStable, TyDecodable, TyEncodable};
 use rustc_query_system::cache::WithDepNode;
 use rustc_query_system::dep_graph::DepNodeIndex;
 use rustc_query_system::ich::StableHashingContext;
+use rustc_serialize::PointeeSized;
 use rustc_serialize::opaque::{FileEncodeResult, FileEncoder};
 use rustc_session::config::CrateType;
 use rustc_session::cstore::{CrateStoreDyn, Untracked};
 use rustc_session::lint::Lint;
-use rustc_session::{Limit, MetadataKind, Session};
+use rustc_session::{Limit, Session};
 use rustc_span::def_id::{CRATE_DEF_ID, DefPathHash, StableCrateId};
 use rustc_span::{DUMMY_SP, Ident, Span, Symbol, kw, sym};
 use rustc_type_ir::TyKind::*;
@@ -283,9 +284,9 @@ impl<'tcx> Interner for TyCtxt<'tcx> {
         def_id: DefId,
         args: ty::GenericArgsRef<'tcx>,
     ) -> (ty::TraitRef<'tcx>, &'tcx [ty::GenericArg<'tcx>]) {
-        assert_matches!(self.def_kind(def_id), DefKind::AssocTy | DefKind::AssocConst);
+        debug_assert_matches!(self.def_kind(def_id), DefKind::AssocTy | DefKind::AssocConst);
         let trait_def_id = self.parent(def_id);
-        assert_matches!(self.def_kind(trait_def_id), DefKind::Trait);
+        debug_assert_matches!(self.def_kind(trait_def_id), DefKind::Trait);
         let trait_generics = self.generics_of(trait_def_id);
         (
             ty::TraitRef::new_from_args(self, trait_def_id, args.truncate_to(self, trait_generics)),
@@ -774,7 +775,9 @@ bidirectional_lang_item_map! {
     FutureOutput,
     Iterator,
     Metadata,
+    MetaSized,
     Option,
+    PointeeSized,
     PointeeTrait,
     Poll,
     Sized,
@@ -1350,8 +1353,8 @@ impl<'tcx> TyCtxtFeed<'tcx, LocalDefId> {
         let bodies = Default::default();
         let attrs = hir::AttributeMap::EMPTY;
 
-        let (opt_hash_including_bodies, _) =
-            self.tcx.hash_owner_nodes(node, &bodies, &attrs.map, attrs.define_opaque);
+        let (opt_hash_including_bodies, _, _) =
+            self.tcx.hash_owner_nodes(node, &bodies, &attrs.map, &[], attrs.define_opaque);
         let node = node.into();
         self.opt_hir_owner_nodes(Some(self.tcx.arena.alloc(hir::OwnerNodes {
             opt_hash_including_bodies,
@@ -1389,6 +1392,18 @@ pub struct TyCtxt<'tcx> {
     gcx: &'tcx GlobalCtxt<'tcx>,
 }
 
+impl<'tcx> LintEmitter for TyCtxt<'tcx> {
+    fn emit_node_span_lint(
+        self,
+        lint: &'static Lint,
+        hir_id: HirId,
+        span: impl Into<MultiSpan>,
+        decorator: impl for<'a> LintDiagnostic<'a, ()>,
+    ) {
+        self.emit_node_span_lint(lint, hir_id, span, decorator);
+    }
+}
+
 // Explicitly implement `DynSync` and `DynSend` for `TyCtxt` to short circuit trait resolution. Its
 // field are asserted to implement these traits below, so this is trivially safe, and it greatly
 // speeds-up compilation of this crate and its dependents.
@@ -1604,16 +1619,17 @@ impl<'tcx> TyCtxt<'tcx> {
         self.reserve_and_set_memory_dedup(alloc, salt)
     }
 
+    /// Traits added on all bounds by default, excluding `Sized` which is treated separately.
     pub fn default_traits(self) -> &'static [rustc_hir::LangItem] {
-        match self.sess.opts.unstable_opts.experimental_default_bounds {
-            true => &[
-                LangItem::Sized,
+        if self.sess.opts.unstable_opts.experimental_default_bounds {
+            &[
                 LangItem::DefaultTrait1,
                 LangItem::DefaultTrait2,
                 LangItem::DefaultTrait3,
                 LangItem::DefaultTrait4,
-            ],
-            false => &[LangItem::Sized],
+            ]
+        } else {
+            &[]
         }
     }
 
@@ -1846,23 +1862,14 @@ impl<'tcx> TyCtxt<'tcx> {
         &self.crate_types
     }
 
-    pub fn metadata_kind(self) -> MetadataKind {
-        self.crate_types()
-            .iter()
-            .map(|ty| match *ty {
-                CrateType::Executable
-                | CrateType::Staticlib
-                | CrateType::Cdylib
-                | CrateType::Sdylib => MetadataKind::None,
-                CrateType::Rlib => MetadataKind::Uncompressed,
-                CrateType::Dylib | CrateType::ProcMacro => MetadataKind::Compressed,
-            })
-            .max()
-            .unwrap_or(MetadataKind::None)
-    }
-
     pub fn needs_metadata(self) -> bool {
-        self.metadata_kind() != MetadataKind::None
+        self.crate_types().iter().any(|ty| match *ty {
+            CrateType::Executable
+            | CrateType::Staticlib
+            | CrateType::Cdylib
+            | CrateType::Sdylib => false,
+            CrateType::Rlib | CrateType::Dylib | CrateType::ProcMacro => true,
+        })
     }
 
     pub fn needs_crate_hash(self) -> bool {
@@ -2535,17 +2542,17 @@ impl<'tcx> TyCtxt<'tcx> {
 // this type just holds a pointer to it, but it still effectively owns it. It
 // impls `Borrow` so that it can be looked up using the original
 // (non-arena-memory-owning) types.
-struct InternedInSet<'tcx, T: ?Sized>(&'tcx T);
+struct InternedInSet<'tcx, T: ?Sized + PointeeSized>(&'tcx T);
 
-impl<'tcx, T: 'tcx + ?Sized> Clone for InternedInSet<'tcx, T> {
+impl<'tcx, T: 'tcx + ?Sized + PointeeSized> Clone for InternedInSet<'tcx, T> {
     fn clone(&self) -> Self {
         InternedInSet(self.0)
     }
 }
 
-impl<'tcx, T: 'tcx + ?Sized> Copy for InternedInSet<'tcx, T> {}
+impl<'tcx, T: 'tcx + ?Sized + PointeeSized> Copy for InternedInSet<'tcx, T> {}
 
-impl<'tcx, T: 'tcx + ?Sized> IntoPointer for InternedInSet<'tcx, T> {
+impl<'tcx, T: 'tcx + ?Sized + PointeeSized> IntoPointer for InternedInSet<'tcx, T> {
     fn into_pointer(&self) -> *const () {
         self.0 as *const _ as *const ()
     }
diff --git a/compiler/rustc_middle/src/ty/generic_args.rs b/compiler/rustc_middle/src/ty/generic_args.rs
index 5e038f91675..7d34d8df3f3 100644
--- a/compiler/rustc_middle/src/ty/generic_args.rs
+++ b/compiler/rustc_middle/src/ty/generic_args.rs
@@ -588,7 +588,7 @@ impl<'tcx> GenericArgs<'tcx> {
     }
 
     pub fn truncate_to(&self, tcx: TyCtxt<'tcx>, generics: &ty::Generics) -> GenericArgsRef<'tcx> {
-        tcx.mk_args_from_iter(self.iter().take(generics.count()))
+        tcx.mk_args(&self[..generics.count()])
     }
 
     pub fn print_as_list(&self) -> String {
diff --git a/compiler/rustc_middle/src/ty/instance.rs b/compiler/rustc_middle/src/ty/instance.rs
index 5ba4e5446e9..68adfb3cdb3 100644
--- a/compiler/rustc_middle/src/ty/instance.rs
+++ b/compiler/rustc_middle/src/ty/instance.rs
@@ -79,7 +79,7 @@ pub enum InstanceKind<'tcx> {
     Intrinsic(DefId),
 
     /// `<T as Trait>::method` where `method` receives unsizeable `self: Self` (part of the
-    /// `unsized_locals` feature).
+    /// `unsized_fn_params` feature).
     ///
     /// The generated shim will take `Self` via `*mut Self` - conceptually this is `&owned Self` -
     /// and dereference the argument to call the original function.
diff --git a/compiler/rustc_middle/src/ty/layout.rs b/compiler/rustc_middle/src/ty/layout.rs
index c2ae6b06192..13c281a6182 100644
--- a/compiler/rustc_middle/src/ty/layout.rs
+++ b/compiler/rustc_middle/src/ty/layout.rs
@@ -16,9 +16,7 @@ use rustc_macros::{HashStable, TyDecodable, TyEncodable, extension};
 use rustc_session::config::OptLevel;
 use rustc_span::{DUMMY_SP, ErrorGuaranteed, Span, Symbol, sym};
 use rustc_target::callconv::FnAbi;
-use rustc_target::spec::{
-    HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, PanicStrategy, Target, WasmCAbi, X86Abi,
-};
+use rustc_target::spec::{HasTargetSpec, HasX86AbiOpt, PanicStrategy, Target, X86Abi};
 use tracing::debug;
 use {rustc_abi as abi, rustc_hir as hir};
 
@@ -565,12 +563,6 @@ impl<'tcx> HasTargetSpec for TyCtxt<'tcx> {
     }
 }
 
-impl<'tcx> HasWasmCAbiOpt for TyCtxt<'tcx> {
-    fn wasm_c_abi_opt(&self) -> WasmCAbi {
-        self.sess.opts.unstable_opts.wasm_c_abi
-    }
-}
-
 impl<'tcx> HasX86AbiOpt for TyCtxt<'tcx> {
     fn x86_abi_opt(&self) -> X86Abi {
         X86Abi {
@@ -625,12 +617,6 @@ impl<'tcx> HasTargetSpec for LayoutCx<'tcx> {
     }
 }
 
-impl<'tcx> HasWasmCAbiOpt for LayoutCx<'tcx> {
-    fn wasm_c_abi_opt(&self) -> WasmCAbi {
-        self.calc.cx.wasm_c_abi_opt()
-    }
-}
-
 impl<'tcx> HasX86AbiOpt for LayoutCx<'tcx> {
     fn x86_abi_opt(&self) -> X86Abi {
         self.calc.cx.x86_abi_opt()
@@ -1266,6 +1252,7 @@ pub fn fn_can_unwind(tcx: TyCtxt<'_>, fn_def_id: Option<DefId>, abi: ExternAbi)
         | RiscvInterruptS
         | CCmseNonSecureCall
         | CCmseNonSecureEntry
+        | Custom
         | Unadjusted => false,
         Rust | RustCall | RustCold => tcx.sess.panic_strategy() == PanicStrategy::Unwind,
     }
diff --git a/compiler/rustc_middle/src/ty/mod.rs b/compiler/rustc_middle/src/ty/mod.rs
index dc3f2844e5a..97408e31854 100644
--- a/compiler/rustc_middle/src/ty/mod.rs
+++ b/compiler/rustc_middle/src/ty/mod.rs
@@ -60,6 +60,7 @@ pub use rustc_type_ir::fast_reject::DeepRejectCtxt;
 )]
 use rustc_type_ir::inherent;
 pub use rustc_type_ir::relate::VarianceDiagInfo;
+pub use rustc_type_ir::solve::SizedTraitKind;
 pub use rustc_type_ir::*;
 #[allow(hidden_glob_reexports, unused_imports)]
 use rustc_type_ir::{InferCtxtLike, Interner};
@@ -933,7 +934,9 @@ impl Placeholder<BoundVar> {
 
 pub type PlaceholderRegion = Placeholder<BoundRegion>;
 
-impl rustc_type_ir::inherent::PlaceholderLike for PlaceholderRegion {
+impl<'tcx> rustc_type_ir::inherent::PlaceholderLike<TyCtxt<'tcx>> for PlaceholderRegion {
+    type Bound = BoundRegion;
+
     fn universe(self) -> UniverseIndex {
         self.universe
     }
@@ -946,14 +949,20 @@ impl rustc_type_ir::inherent::PlaceholderLike for PlaceholderRegion {
         Placeholder { universe: ui, ..self }
     }
 
-    fn new(ui: UniverseIndex, var: BoundVar) -> Self {
+    fn new(ui: UniverseIndex, bound: BoundRegion) -> Self {
+        Placeholder { universe: ui, bound }
+    }
+
+    fn new_anon(ui: UniverseIndex, var: BoundVar) -> Self {
         Placeholder { universe: ui, bound: BoundRegion { var, kind: BoundRegionKind::Anon } }
     }
 }
 
 pub type PlaceholderType = Placeholder<BoundTy>;
 
-impl rustc_type_ir::inherent::PlaceholderLike for PlaceholderType {
+impl<'tcx> rustc_type_ir::inherent::PlaceholderLike<TyCtxt<'tcx>> for PlaceholderType {
+    type Bound = BoundTy;
+
     fn universe(self) -> UniverseIndex {
         self.universe
     }
@@ -966,7 +975,11 @@ impl rustc_type_ir::inherent::PlaceholderLike for PlaceholderType {
         Placeholder { universe: ui, ..self }
     }
 
-    fn new(ui: UniverseIndex, var: BoundVar) -> Self {
+    fn new(ui: UniverseIndex, bound: BoundTy) -> Self {
+        Placeholder { universe: ui, bound }
+    }
+
+    fn new_anon(ui: UniverseIndex, var: BoundVar) -> Self {
         Placeholder { universe: ui, bound: BoundTy { var, kind: BoundTyKind::Anon } }
     }
 }
@@ -980,7 +993,9 @@ pub struct BoundConst<'tcx> {
 
 pub type PlaceholderConst = Placeholder<BoundVar>;
 
-impl rustc_type_ir::inherent::PlaceholderLike for PlaceholderConst {
+impl<'tcx> rustc_type_ir::inherent::PlaceholderLike<TyCtxt<'tcx>> for PlaceholderConst {
+    type Bound = BoundVar;
+
     fn universe(self) -> UniverseIndex {
         self.universe
     }
@@ -993,7 +1008,11 @@ impl rustc_type_ir::inherent::PlaceholderLike for PlaceholderConst {
         Placeholder { universe: ui, ..self }
     }
 
-    fn new(ui: UniverseIndex, var: BoundVar) -> Self {
+    fn new(ui: UniverseIndex, bound: BoundVar) -> Self {
+        Placeholder { universe: ui, bound }
+    }
+
+    fn new_anon(ui: UniverseIndex, var: BoundVar) -> Self {
         Placeholder { universe: ui, bound: var }
     }
 }
diff --git a/compiler/rustc_middle/src/ty/print/pretty.rs b/compiler/rustc_middle/src/ty/print/pretty.rs
index 673a89a8134..c10277c75a7 100644
--- a/compiler/rustc_middle/src/ty/print/pretty.rs
+++ b/compiler/rustc_middle/src/ty/print/pretty.rs
@@ -1069,24 +1069,35 @@ pub trait PrettyPrinter<'tcx>: Printer<'tcx> + fmt::Write {
 
         let mut traits = FxIndexMap::default();
         let mut fn_traits = FxIndexMap::default();
+        let mut lifetimes = SmallVec::<[ty::Region<'tcx>; 1]>::new();
+
         let mut has_sized_bound = false;
         let mut has_negative_sized_bound = false;
-        let mut lifetimes = SmallVec::<[ty::Region<'tcx>; 1]>::new();
+        let mut has_meta_sized_bound = false;
 
         for (predicate, _) in bounds.iter_instantiated_copied(tcx, args) {
             let bound_predicate = predicate.kind();
 
             match bound_predicate.skip_binder() {
                 ty::ClauseKind::Trait(pred) => {
-                    // Don't print `+ Sized`, but rather `+ ?Sized` if absent.
-                    if tcx.is_lang_item(pred.def_id(), LangItem::Sized) {
-                        match pred.polarity {
+                    // With `feature(sized_hierarchy)`, don't print `?Sized` as an alias for
+                    // `MetaSized`, and skip sizedness bounds to be added at the end.
+                    match tcx.as_lang_item(pred.def_id()) {
+                        Some(LangItem::Sized) => match pred.polarity {
                             ty::PredicatePolarity::Positive => {
                                 has_sized_bound = true;
                                 continue;
                             }
                             ty::PredicatePolarity::Negative => has_negative_sized_bound = true,
+                        },
+                        Some(LangItem::MetaSized) => {
+                            has_meta_sized_bound = true;
+                            continue;
+                        }
+                        Some(LangItem::PointeeSized) => {
+                            bug!("`PointeeSized` is removed during lowering");
                         }
+                        _ => (),
                     }
 
                     self.insert_trait_and_projection(
@@ -1255,8 +1266,13 @@ pub trait PrettyPrinter<'tcx>: Printer<'tcx> + fmt::Write {
             })?;
         }
 
+        let using_sized_hierarchy = self.tcx().features().sized_hierarchy();
         let add_sized = has_sized_bound && (first || has_negative_sized_bound);
-        let add_maybe_sized = !has_sized_bound && !has_negative_sized_bound;
+        let add_maybe_sized =
+            has_meta_sized_bound && !has_negative_sized_bound && !using_sized_hierarchy;
+        // Set `has_pointee_sized_bound` if there were no `Sized` or `MetaSized` bounds.
+        let has_pointee_sized_bound =
+            !has_sized_bound && !has_meta_sized_bound && !has_negative_sized_bound;
         if add_sized || add_maybe_sized {
             if !first {
                 write!(self, " + ")?;
@@ -1265,6 +1281,16 @@ pub trait PrettyPrinter<'tcx>: Printer<'tcx> + fmt::Write {
                 write!(self, "?")?;
             }
             write!(self, "Sized")?;
+        } else if has_meta_sized_bound && using_sized_hierarchy {
+            if !first {
+                write!(self, " + ")?;
+            }
+            write!(self, "MetaSized")?;
+        } else if has_pointee_sized_bound && using_sized_hierarchy {
+            if !first {
+                write!(self, " + ")?;
+            }
+            write!(self, "PointeeSized")?;
         }
 
         if !with_forced_trimmed_paths() {
diff --git a/compiler/rustc_middle/src/ty/region.rs b/compiler/rustc_middle/src/ty/region.rs
index 3e4f7a79d53..cc25cd16567 100644
--- a/compiler/rustc_middle/src/ty/region.rs
+++ b/compiler/rustc_middle/src/ty/region.rs
@@ -148,6 +148,10 @@ impl<'tcx> rustc_type_ir::inherent::Region<TyCtxt<'tcx>> for Region<'tcx> {
         Region::new_bound(tcx, debruijn, ty::BoundRegion { var, kind: ty::BoundRegionKind::Anon })
     }
 
+    fn new_placeholder(tcx: TyCtxt<'tcx>, placeholder: ty::PlaceholderRegion) -> Self {
+        Region::new_placeholder(tcx, placeholder)
+    }
+
     fn new_static(tcx: TyCtxt<'tcx>) -> Self {
         tcx.lifetimes.re_static
     }
diff --git a/compiler/rustc_middle/src/ty/sty.rs b/compiler/rustc_middle/src/ty/sty.rs
index cbf545c01c5..58829f72a72 100644
--- a/compiler/rustc_middle/src/ty/sty.rs
+++ b/compiler/rustc_middle/src/ty/sty.rs
@@ -15,6 +15,7 @@ use rustc_hir::def_id::DefId;
 use rustc_macros::{HashStable, TyDecodable, TyEncodable, TypeFoldable, extension};
 use rustc_span::{DUMMY_SP, Span, Symbol, sym};
 use rustc_type_ir::TyKind::*;
+use rustc_type_ir::solve::SizedTraitKind;
 use rustc_type_ir::walk::TypeWalker;
 use rustc_type_ir::{self as ir, BoundVar, CollectAndApply, DynKind, TypeVisitableExt, elaborate};
 use tracing::instrument;
@@ -1677,7 +1678,7 @@ impl<'tcx> Ty<'tcx> {
         let Some(pointee_ty) = self.builtin_deref(true) else {
             bug!("Type {self:?} is not a pointer or reference type")
         };
-        if pointee_ty.is_trivially_sized(tcx) {
+        if pointee_ty.has_trivial_sizedness(tcx, SizedTraitKind::Sized) {
             tcx.types.unit
         } else {
             match pointee_ty.ptr_metadata_ty_or_tail(tcx, |x| x) {
@@ -1778,17 +1779,17 @@ impl<'tcx> Ty<'tcx> {
         }
     }
 
-    /// Fast path helper for testing if a type is `Sized`.
+    /// Fast path helper for testing if a type is `Sized` or `MetaSized`.
     ///
-    /// Returning true means the type is known to implement `Sized`. Returning `false` means
-    /// nothing -- could be sized, might not be.
+    /// Returning true means the type is known to implement the sizedness trait. Returning `false`
+    /// means nothing -- could be sized, might not be.
     ///
     /// Note that we could never rely on the fact that a type such as `[_]` is trivially `!Sized`
     /// because we could be in a type environment with a bound such as `[_]: Copy`. A function with
     /// such a bound obviously never can be called, but that doesn't mean it shouldn't typecheck.
     /// This is why this method doesn't return `Option<bool>`.
     #[instrument(skip(tcx), level = "debug")]
-    pub fn is_trivially_sized(self, tcx: TyCtxt<'tcx>) -> bool {
+    pub fn has_trivial_sizedness(self, tcx: TyCtxt<'tcx>, sizedness: SizedTraitKind) -> bool {
         match self.kind() {
             ty::Infer(ty::IntVar(_) | ty::FloatVar(_))
             | ty::Uint(_)
@@ -1811,13 +1812,20 @@ impl<'tcx> Ty<'tcx> {
             | ty::Error(_)
             | ty::Dynamic(_, _, ty::DynStar) => true,
 
-            ty::Str | ty::Slice(_) | ty::Dynamic(_, _, ty::Dyn) | ty::Foreign(..) => false,
+            ty::Str | ty::Slice(_) | ty::Dynamic(_, _, ty::Dyn) => match sizedness {
+                SizedTraitKind::Sized => false,
+                SizedTraitKind::MetaSized => true,
+            },
+
+            ty::Foreign(..) => match sizedness {
+                SizedTraitKind::Sized | SizedTraitKind::MetaSized => false,
+            },
 
-            ty::Tuple(tys) => tys.last().is_none_or(|ty| ty.is_trivially_sized(tcx)),
+            ty::Tuple(tys) => tys.last().is_none_or(|ty| ty.has_trivial_sizedness(tcx, sizedness)),
 
             ty::Adt(def, args) => def
-                .sized_constraint(tcx)
-                .is_none_or(|ty| ty.instantiate(tcx, args).is_trivially_sized(tcx)),
+                .sizedness_constraint(tcx, sizedness)
+                .is_none_or(|ty| ty.instantiate(tcx, args).has_trivial_sizedness(tcx, sizedness)),
 
             ty::Alias(..) | ty::Param(_) | ty::Placeholder(..) | ty::Bound(..) => false,
 
diff --git a/compiler/rustc_middle/src/ty/util.rs b/compiler/rustc_middle/src/ty/util.rs
index 461d92f8006..51f57e71ce9 100644
--- a/compiler/rustc_middle/src/ty/util.rs
+++ b/compiler/rustc_middle/src/ty/util.rs
@@ -16,6 +16,7 @@ use rustc_index::bit_set::GrowableBitSet;
 use rustc_macros::{HashStable, TyDecodable, TyEncodable, extension};
 use rustc_session::Limit;
 use rustc_span::sym;
+use rustc_type_ir::solve::SizedTraitKind;
 use smallvec::{SmallVec, smallvec};
 use tracing::{debug, instrument};
 
@@ -1132,7 +1133,8 @@ impl<'tcx> Ty<'tcx> {
     /// strange rules like `<T as Foo<'static>>::Bar: Sized` that
     /// actually carry lifetime requirements.
     pub fn is_sized(self, tcx: TyCtxt<'tcx>, typing_env: ty::TypingEnv<'tcx>) -> bool {
-        self.is_trivially_sized(tcx) || tcx.is_sized_raw(typing_env.as_query_input(self))
+        self.has_trivial_sizedness(tcx, SizedTraitKind::Sized)
+            || tcx.is_sized_raw(typing_env.as_query_input(self))
     }
 
     /// Checks whether values of this type `T` implement the `Freeze`
diff --git a/compiler/rustc_middle/src/ty/visit.rs b/compiler/rustc_middle/src/ty/visit.rs
index f8042174599..3853a804a92 100644
--- a/compiler/rustc_middle/src/ty/visit.rs
+++ b/compiler/rustc_middle/src/ty/visit.rs
@@ -66,7 +66,7 @@ impl<'tcx> TyCtxt<'tcx> {
         {
             type Result = ControlFlow<()>;
 
-            fn visit_binder<T: TypeFoldable<TyCtxt<'tcx>>>(
+            fn visit_binder<T: TypeVisitable<TyCtxt<'tcx>>>(
                 &mut self,
                 t: &Binder<'tcx, T>,
             ) -> Self::Result {
@@ -168,7 +168,7 @@ impl LateBoundRegionsCollector {
 }
 
 impl<'tcx> TypeVisitor<TyCtxt<'tcx>> for LateBoundRegionsCollector {
-    fn visit_binder<T: TypeFoldable<TyCtxt<'tcx>>>(&mut self, t: &Binder<'tcx, T>) {
+    fn visit_binder<T: TypeVisitable<TyCtxt<'tcx>>>(&mut self, t: &Binder<'tcx, T>) {
         self.current_index.shift_in(1);
         t.super_visit_with(self);
         self.current_index.shift_out(1);
diff --git a/compiler/rustc_mir_build/src/builder/expr/as_operand.rs b/compiler/rustc_mir_build/src/builder/expr/as_operand.rs
index 2059610ee47..982e7aa8246 100644
--- a/compiler/rustc_mir_build/src/builder/expr/as_operand.rs
+++ b/compiler/rustc_mir_build/src/builder/expr/as_operand.rs
@@ -55,9 +55,9 @@ impl<'a, 'tcx> Builder<'a, 'tcx> {
     /// local variable of unsized type. For example, consider this program:
     ///
     /// ```
-    /// #![feature(unsized_locals, unsized_fn_params)]
+    /// #![feature(unsized_fn_params)]
     /// # use core::fmt::Debug;
-    /// fn foo(p: dyn Debug) { dbg!(p); }
+    /// fn foo(_p: dyn Debug) { /* ... */ }
     ///
     /// fn bar(box_p: Box<dyn Debug>) { foo(*box_p); }
     /// ```
@@ -84,7 +84,7 @@ impl<'a, 'tcx> Builder<'a, 'tcx> {
     /// will actually provide a pointer to the interior of the box, and not move the `dyn Debug`
     /// value to the stack.
     ///
-    /// See #68304 for more details.
+    /// See <https://github.com/rust-lang/rust/issues/68304> for more details.
     pub(crate) fn as_local_call_operand(
         &mut self,
         block: BasicBlock,
diff --git a/compiler/rustc_mir_transform/src/coroutine.rs b/compiler/rustc_mir_transform/src/coroutine.rs
index d5d0d56f528..06c6b46a9c2 100644
--- a/compiler/rustc_mir_transform/src/coroutine.rs
+++ b/compiler/rustc_mir_transform/src/coroutine.rs
@@ -1417,9 +1417,9 @@ fn check_field_tys_sized<'tcx>(
     coroutine_layout: &CoroutineLayout<'tcx>,
     def_id: LocalDefId,
 ) {
-    // No need to check if unsized_locals/unsized_fn_params is disabled,
+    // No need to check if unsized_fn_params is disabled,
     // since we will error during typeck.
-    if !tcx.features().unsized_locals() && !tcx.features().unsized_fn_params() {
+    if !tcx.features().unsized_fn_params() {
         return;
     }
 
diff --git a/compiler/rustc_mir_transform/src/coroutine/drop.rs b/compiler/rustc_mir_transform/src/coroutine/drop.rs
index 6021e795d21..dc68629ec0d 100644
--- a/compiler/rustc_mir_transform/src/coroutine/drop.rs
+++ b/compiler/rustc_mir_transform/src/coroutine/drop.rs
@@ -132,6 +132,7 @@ fn build_poll_switch<'tcx>(
     body: &mut Body<'tcx>,
     poll_enum: Ty<'tcx>,
     poll_unit_place: &Place<'tcx>,
+    fut_pin_place: &Place<'tcx>,
     ready_block: BasicBlock,
     yield_block: BasicBlock,
 ) -> BasicBlock {
@@ -162,9 +163,11 @@ fn build_poll_switch<'tcx>(
             Rvalue::Discriminant(*poll_unit_place),
         ))),
     };
+    let storage_dead =
+        Statement { source_info, kind: StatementKind::StorageDead(fut_pin_place.local) };
     let unreachable_block = insert_term_block(body, TerminatorKind::Unreachable);
     body.basic_blocks_mut().push(BasicBlockData {
-        statements: [discr_assign].to_vec(),
+        statements: [storage_dead, discr_assign].to_vec(),
         terminator: Some(Terminator {
             source_info,
             kind: TerminatorKind::SwitchInt {
@@ -332,10 +335,17 @@ pub(super) fn expand_async_drops<'tcx>(
             kind: StatementKind::Assign(Box::new((context_ref_place, arg))),
         });
         let yield_block = insert_term_block(body, TerminatorKind::Unreachable); // `kind` replaced later to yield
-        let switch_block =
-            build_poll_switch(tcx, body, poll_enum, &poll_unit_place, target, yield_block);
         let (pin_bb, fut_pin_place) =
             build_pin_fut(tcx, body, fut_place.clone(), UnwindAction::Continue);
+        let switch_block = build_poll_switch(
+            tcx,
+            body,
+            poll_enum,
+            &poll_unit_place,
+            &fut_pin_place,
+            target,
+            yield_block,
+        );
         let call_bb = build_poll_call(
             tcx,
             body,
@@ -357,16 +367,17 @@ pub(super) fn expand_async_drops<'tcx>(
                 body.local_decls.push(LocalDecl::new(context_mut_ref, source_info.span)),
             );
             let drop_yield_block = insert_term_block(body, TerminatorKind::Unreachable); // `kind` replaced later to yield
+            let (pin_bb2, fut_pin_place2) =
+                build_pin_fut(tcx, body, fut_place, UnwindAction::Continue);
             let drop_switch_block = build_poll_switch(
                 tcx,
                 body,
                 poll_enum,
                 &poll_unit_place,
+                &fut_pin_place2,
                 drop.unwrap(),
                 drop_yield_block,
             );
-            let (pin_bb2, fut_pin_place2) =
-                build_pin_fut(tcx, body, fut_place, UnwindAction::Continue);
             let drop_call_bb = build_poll_call(
                 tcx,
                 body,
diff --git a/compiler/rustc_mir_transform/src/cross_crate_inline.rs b/compiler/rustc_mir_transform/src/cross_crate_inline.rs
index 727d4a126d2..6d7b7e10ef6 100644
--- a/compiler/rustc_mir_transform/src/cross_crate_inline.rs
+++ b/compiler/rustc_mir_transform/src/cross_crate_inline.rs
@@ -50,6 +50,13 @@ fn cross_crate_inlinable(tcx: TyCtxt<'_>, def_id: LocalDefId) -> bool {
         _ => {}
     }
 
+    // If the crate is likely to be mostly unused, use cross-crate inlining to defer codegen until
+    // the function is referenced, in order to skip codegen for unused functions. This is
+    // intentionally after the check for `inline(never)`, so that `inline(never)` wins.
+    if tcx.sess.opts.unstable_opts.hint_mostly_unused {
+        return true;
+    }
+
     let sig = tcx.fn_sig(def_id).instantiate_identity();
     for ty in sig.inputs().skip_binder().iter().chain(std::iter::once(&sig.output().skip_binder()))
     {
diff --git a/compiler/rustc_mir_transform/src/elaborate_drop.rs b/compiler/rustc_mir_transform/src/elaborate_drop.rs
index 3a5e2620b14..c9bc52c6c7e 100644
--- a/compiler/rustc_mir_transform/src/elaborate_drop.rs
+++ b/compiler/rustc_mir_transform/src/elaborate_drop.rs
@@ -390,6 +390,20 @@ where
             Location { block: self.succ, statement_index: 0 },
             StatementKind::StorageDead(fut.local),
         );
+        // StorageDead(fut) in unwind block (at the begin)
+        if let Unwind::To(block) = unwind {
+            self.elaborator.patch().add_statement(
+                Location { block, statement_index: 0 },
+                StatementKind::StorageDead(fut.local),
+            );
+        }
+        // StorageDead(fut) in dropline block (at the begin)
+        if let Some(block) = dropline {
+            self.elaborator.patch().add_statement(
+                Location { block, statement_index: 0 },
+                StatementKind::StorageDead(fut.local),
+            );
+        }
 
         // #1:pin_obj_bb >>> call Pin<ObjTy>::new_unchecked(&mut obj)
         self.elaborator.patch().patch_terminator(
diff --git a/compiler/rustc_mir_transform/src/gvn.rs b/compiler/rustc_mir_transform/src/gvn.rs
index 92c30d239b5..bda71ceaa55 100644
--- a/compiler/rustc_mir_transform/src/gvn.rs
+++ b/compiler/rustc_mir_transform/src/gvn.rs
@@ -240,8 +240,6 @@ struct VnState<'body, 'tcx> {
     next_opaque: usize,
     /// Cache the deref values.
     derefs: Vec<VnIndex>,
-    /// Cache the value of the `unsized_locals` features, to avoid fetching it repeatedly in a loop.
-    feature_unsized_locals: bool,
     ssa: &'body SsaLocals,
     dominators: Dominators<BasicBlock>,
     reused_locals: DenseBitSet<Local>,
@@ -273,7 +271,6 @@ impl<'body, 'tcx> VnState<'body, 'tcx> {
             evaluated: IndexVec::with_capacity(num_values),
             next_opaque: 1,
             derefs: Vec::new(),
-            feature_unsized_locals: tcx.features().unsized_locals(),
             ssa,
             dominators,
             reused_locals: DenseBitSet::new_empty(local_decls.len()),
@@ -329,13 +326,7 @@ impl<'body, 'tcx> VnState<'body, 'tcx> {
     fn assign(&mut self, local: Local, value: VnIndex) {
         debug_assert!(self.ssa.is_ssa(local));
         self.locals[local] = Some(value);
-
-        // Only register the value if its type is `Sized`, as we will emit copies of it.
-        let is_sized = !self.feature_unsized_locals
-            || self.local_decls[local].ty.is_sized(self.tcx, self.typing_env());
-        if is_sized {
-            self.rev_locals[value].push(local);
-        }
+        self.rev_locals[value].push(local);
     }
 
     fn insert_constant(&mut self, value: Const<'tcx>) -> VnIndex {
diff --git a/compiler/rustc_mir_transform/src/lower_intrinsics.rs b/compiler/rustc_mir_transform/src/lower_intrinsics.rs
index 52f4c39c09b..fa29ab985b7 100644
--- a/compiler/rustc_mir_transform/src/lower_intrinsics.rs
+++ b/compiler/rustc_mir_transform/src/lower_intrinsics.rs
@@ -150,12 +150,12 @@ impl<'tcx> crate::MirPass<'tcx> for LowerIntrinsics {
                         });
                         terminator.kind = TerminatorKind::Goto { target };
                     }
-                    sym::size_of | sym::min_align_of => {
+                    sym::size_of | sym::align_of => {
                         let target = target.unwrap();
                         let tp_ty = generic_args.type_at(0);
                         let null_op = match intrinsic.name {
                             sym::size_of => NullOp::SizeOf,
-                            sym::min_align_of => NullOp::AlignOf,
+                            sym::align_of => NullOp::AlignOf,
                             _ => bug!("unexpected intrinsic"),
                         };
                         block.statements.push(Statement {
diff --git a/compiler/rustc_mir_transform/src/simplify.rs b/compiler/rustc_mir_transform/src/simplify.rs
index 8f88228d9bb..a54e548ad70 100644
--- a/compiler/rustc_mir_transform/src/simplify.rs
+++ b/compiler/rustc_mir_transform/src/simplify.rs
@@ -74,7 +74,11 @@ impl SimplifyCfg {
 }
 
 pub(super) fn simplify_cfg<'tcx>(tcx: TyCtxt<'tcx>, body: &mut Body<'tcx>) {
-    CfgSimplifier::new(tcx, body).simplify();
+    if CfgSimplifier::new(tcx, body).simplify() {
+        // `simplify` returns that it changed something. We must invalidate the CFG caches as they
+        // are not consistent with the modified CFG any more.
+        body.basic_blocks.invalidate_cfg_cache();
+    }
     remove_dead_blocks(body);
 
     // FIXME: Should probably be moved into some kind of pass manager
@@ -121,12 +125,16 @@ impl<'a, 'tcx> CfgSimplifier<'a, 'tcx> {
         // Preserve `SwitchInt` reads on built and analysis MIR, or if `-Zmir-preserve-ub`.
         let preserve_switch_reads = matches!(body.phase, MirPhase::Built | MirPhase::Analysis(_))
             || tcx.sess.opts.unstable_opts.mir_preserve_ub;
-        let basic_blocks = body.basic_blocks_mut();
+        // Do not clear caches yet. The caller to `simplify` will do it if anything changed.
+        let basic_blocks = body.basic_blocks.as_mut_preserves_cfg();
 
         CfgSimplifier { preserve_switch_reads, basic_blocks, pred_count }
     }
 
-    fn simplify(mut self) {
+    /// Returns whether we actually simplified anything. In that case, the caller *must* invalidate
+    /// the CFG caches of the MIR body.
+    #[must_use]
+    fn simplify(mut self) -> bool {
         self.strip_nops();
 
         // Vec of the blocks that should be merged. We store the indices here, instead of the
@@ -134,6 +142,7 @@ impl<'a, 'tcx> CfgSimplifier<'a, 'tcx> {
         // We do not push the statements directly into the target block (`bb`) as that is slower
         // due to additional reallocations
         let mut merged_blocks = Vec::new();
+        let mut outer_changed = false;
         loop {
             let mut changed = false;
 
@@ -177,7 +186,11 @@ impl<'a, 'tcx> CfgSimplifier<'a, 'tcx> {
             if !changed {
                 break;
             }
+
+            outer_changed = true;
         }
+
+        outer_changed
     }
 
     /// This function will return `None` if
diff --git a/compiler/rustc_monomorphize/messages.ftl b/compiler/rustc_monomorphize/messages.ftl
index 35bedf4318f..2bd19e81b01 100644
--- a/compiler/rustc_monomorphize/messages.ftl
+++ b/compiler/rustc_monomorphize/messages.ftl
@@ -60,11 +60,4 @@ monomorphize_start_not_found = using `fn main` requires the standard library
 
 monomorphize_symbol_already_defined = symbol `{$symbol}` is already defined
 
-monomorphize_wasm_c_abi_transition =
-    this function {$is_call ->
-      [true] call
-      *[false] definition
-    } involves an argument of type `{$ty}` which is affected by the wasm ABI transition
-    .help = the "C" ABI Rust uses on wasm32-unknown-unknown will change to align with the standard "C" ABI for this target
-
 monomorphize_written_to_path = the full type name has been written to '{$path}'
diff --git a/compiler/rustc_monomorphize/src/errors.rs b/compiler/rustc_monomorphize/src/errors.rs
index acf77b5916e..938c427b56c 100644
--- a/compiler/rustc_monomorphize/src/errors.rs
+++ b/compiler/rustc_monomorphize/src/errors.rs
@@ -100,12 +100,3 @@ pub(crate) struct AbiRequiredTargetFeature<'a> {
     /// Whether this is a problem at a call site or at a declaration.
     pub is_call: bool,
 }
-
-#[derive(LintDiagnostic)]
-#[diag(monomorphize_wasm_c_abi_transition)]
-#[help]
-pub(crate) struct WasmCAbiTransition<'a> {
-    pub ty: Ty<'a>,
-    /// Whether this is a problem at a call site or at a declaration.
-    pub is_call: bool,
-}
diff --git a/compiler/rustc_monomorphize/src/mono_checks/abi_check.rs b/compiler/rustc_monomorphize/src/mono_checks/abi_check.rs
index 8dbbb4d1713..b8c001d357e 100644
--- a/compiler/rustc_monomorphize/src/mono_checks/abi_check.rs
+++ b/compiler/rustc_monomorphize/src/mono_checks/abi_check.rs
@@ -3,13 +3,10 @@
 use rustc_abi::{BackendRepr, CanonAbi, RegKind, X86Call};
 use rustc_hir::{CRATE_HIR_ID, HirId};
 use rustc_middle::mir::{self, Location, traversal};
-use rustc_middle::ty::layout::LayoutCx;
-use rustc_middle::ty::{self, Instance, InstanceKind, Ty, TyCtxt, TypingEnv};
-use rustc_session::lint::builtin::WASM_C_ABI;
+use rustc_middle::ty::{self, Instance, InstanceKind, Ty, TyCtxt};
 use rustc_span::def_id::DefId;
 use rustc_span::{DUMMY_SP, Span, Symbol, sym};
-use rustc_target::callconv::{ArgAbi, FnAbi, PassMode};
-use rustc_target::spec::{HasWasmCAbiOpt, WasmCAbi};
+use rustc_target::callconv::{FnAbi, PassMode};
 
 use crate::errors;
 
@@ -81,73 +78,6 @@ fn do_check_simd_vector_abi<'tcx>(
     }
 }
 
-/// Determines whether the given argument is passed the same way on the old and new wasm ABIs.
-fn wasm_abi_safe<'tcx>(tcx: TyCtxt<'tcx>, arg: &ArgAbi<'tcx, Ty<'tcx>>) -> bool {
-    if matches!(arg.layout.backend_repr, BackendRepr::Scalar(_)) {
-        return true;
-    }
-
-    // Both the old and the new ABIs treat vector types like `v128` the same
-    // way.
-    if uses_vector_registers(&arg.mode, &arg.layout.backend_repr) {
-        return true;
-    }
-
-    // This matches `unwrap_trivial_aggregate` in the wasm ABI logic.
-    if arg.layout.is_aggregate() {
-        let cx = LayoutCx::new(tcx, TypingEnv::fully_monomorphized());
-        if let Some(unit) = arg.layout.homogeneous_aggregate(&cx).ok().and_then(|ha| ha.unit()) {
-            let size = arg.layout.size;
-            // Ensure there's just a single `unit` element in `arg`.
-            if unit.size == size {
-                return true;
-            }
-        }
-    }
-
-    // Zero-sized types are dropped in both ABIs, so they're safe
-    if arg.layout.is_zst() {
-        return true;
-    }
-
-    false
-}
-
-/// Warns against usage of `extern "C"` on wasm32-unknown-unknown that is affected by the
-/// ABI transition.
-fn do_check_wasm_abi<'tcx>(
-    tcx: TyCtxt<'tcx>,
-    abi: &FnAbi<'tcx, Ty<'tcx>>,
-    is_call: bool,
-    loc: impl Fn() -> (Span, HirId),
-) {
-    // Only proceed for `extern "C" fn` on wasm32-unknown-unknown (same check as what
-    // `adjust_for_foreign_abi` uses to call `compute_wasm_abi_info`), and only proceed if
-    // `wasm_c_abi_opt` indicates we should emit the lint.
-    if !(tcx.sess.target.arch == "wasm32"
-        && tcx.sess.target.os == "unknown"
-        && tcx.wasm_c_abi_opt() == WasmCAbi::Legacy { with_lint: true }
-        && abi.conv == CanonAbi::C)
-    {
-        return;
-    }
-    // Warn against all types whose ABI will change. Return values are not affected by this change.
-    for arg_abi in abi.args.iter() {
-        if wasm_abi_safe(tcx, arg_abi) {
-            continue;
-        }
-        let (span, hir_id) = loc();
-        tcx.emit_node_span_lint(
-            WASM_C_ABI,
-            hir_id,
-            span,
-            errors::WasmCAbiTransition { ty: arg_abi.layout.ty, is_call },
-        );
-        // Let's only warn once per function.
-        break;
-    }
-}
-
 /// Checks that the ABI of a given instance of a function does not contain vector-passed arguments
 /// or return values for which the corresponding target feature is not enabled.
 fn check_instance_abi<'tcx>(tcx: TyCtxt<'tcx>, instance: Instance<'tcx>) {
@@ -173,7 +103,6 @@ fn check_instance_abi<'tcx>(tcx: TyCtxt<'tcx>, instance: Instance<'tcx>) {
         )
     };
     do_check_simd_vector_abi(tcx, abi, instance.def_id(), /*is_call*/ false, loc);
-    do_check_wasm_abi(tcx, abi, /*is_call*/ false, loc);
 }
 
 /// Checks that a call expression does not try to pass a vector-passed argument which requires a
@@ -212,7 +141,6 @@ fn check_call_site_abi<'tcx>(
         return;
     };
     do_check_simd_vector_abi(tcx, callee_abi, caller.def_id(), /*is_call*/ true, loc);
-    do_check_wasm_abi(tcx, callee_abi, /*is_call*/ true, loc);
 }
 
 fn check_callees_abi<'tcx>(tcx: TyCtxt<'tcx>, instance: Instance<'tcx>, body: &mir::Body<'tcx>) {
diff --git a/compiler/rustc_next_trait_solver/src/canonicalizer.rs b/compiler/rustc_next_trait_solver/src/canonicalizer.rs
index cea77533178..47ed9e87244 100644
--- a/compiler/rustc_next_trait_solver/src/canonicalizer.rs
+++ b/compiler/rustc_next_trait_solver/src/canonicalizer.rs
@@ -435,13 +435,13 @@ impl<'a, D: SolverDelegate<Interner = I>, I: Interner> Canonicalizer<'a, D, I> {
             },
             ty::Placeholder(placeholder) => match self.canonicalize_mode {
                 CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderTy(
-                    PlaceholderLike::new(placeholder.universe(), self.variables.len().into()),
+                    PlaceholderLike::new_anon(placeholder.universe(), self.variables.len().into()),
                 ),
                 CanonicalizeMode::Response { .. } => CanonicalVarKind::PlaceholderTy(placeholder),
             },
             ty::Param(_) => match self.canonicalize_mode {
                 CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderTy(
-                    PlaceholderLike::new(ty::UniverseIndex::ROOT, self.variables.len().into()),
+                    PlaceholderLike::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()),
                 ),
                 CanonicalizeMode::Response { .. } => panic!("param ty in response: {t:?}"),
             },
@@ -594,7 +594,7 @@ impl<D: SolverDelegate<Interner = I>, I: Interner> TypeFolder<I> for Canonicaliz
             },
             ty::ConstKind::Placeholder(placeholder) => match self.canonicalize_mode {
                 CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderConst(
-                    PlaceholderLike::new(placeholder.universe(), self.variables.len().into()),
+                    PlaceholderLike::new_anon(placeholder.universe(), self.variables.len().into()),
                 ),
                 CanonicalizeMode::Response { .. } => {
                     CanonicalVarKind::PlaceholderConst(placeholder)
@@ -602,7 +602,7 @@ impl<D: SolverDelegate<Interner = I>, I: Interner> TypeFolder<I> for Canonicaliz
             },
             ty::ConstKind::Param(_) => match self.canonicalize_mode {
                 CanonicalizeMode::Input { .. } => CanonicalVarKind::PlaceholderConst(
-                    PlaceholderLike::new(ty::UniverseIndex::ROOT, self.variables.len().into()),
+                    PlaceholderLike::new_anon(ty::UniverseIndex::ROOT, self.variables.len().into()),
                 ),
                 CanonicalizeMode::Response { .. } => panic!("param ty in response: {c:?}"),
             },
diff --git a/compiler/rustc_next_trait_solver/src/lib.rs b/compiler/rustc_next_trait_solver/src/lib.rs
index 92cdc28a37b..e3f42c181fa 100644
--- a/compiler/rustc_next_trait_solver/src/lib.rs
+++ b/compiler/rustc_next_trait_solver/src/lib.rs
@@ -7,10 +7,12 @@
 // tidy-alphabetical-start
 #![allow(rustc::usage_of_type_ir_inherent)]
 #![allow(rustc::usage_of_type_ir_traits)]
+#![cfg_attr(not(bootstrap), allow(rustc::direct_use_of_rustc_type_ir))]
 // tidy-alphabetical-end
 
 pub mod canonicalizer;
 pub mod coherence;
 pub mod delegate;
+pub mod placeholder;
 pub mod resolve;
 pub mod solve;
diff --git a/compiler/rustc_next_trait_solver/src/placeholder.rs b/compiler/rustc_next_trait_solver/src/placeholder.rs
new file mode 100644
index 00000000000..c88fb8defae
--- /dev/null
+++ b/compiler/rustc_next_trait_solver/src/placeholder.rs
@@ -0,0 +1,158 @@
+use core::panic;
+
+use rustc_type_ir::data_structures::IndexMap;
+use rustc_type_ir::inherent::*;
+use rustc_type_ir::{
+    self as ty, InferCtxtLike, Interner, TypeFoldable, TypeFolder, TypeSuperFoldable,
+    TypeVisitableExt,
+};
+
+pub struct BoundVarReplacer<'a, Infcx, I = <Infcx as InferCtxtLike>::Interner>
+where
+    Infcx: InferCtxtLike<Interner = I>,
+    I: Interner,
+{
+    infcx: &'a Infcx,
+    // These three maps track the bound variable that were replaced by placeholders. It might be
+    // nice to remove these since we already have the `kind` in the placeholder; we really just need
+    // the `var` (but we *could* bring that into scope if we were to track them as we pass them).
+    mapped_regions: IndexMap<I::PlaceholderRegion, I::BoundRegion>,
+    mapped_types: IndexMap<I::PlaceholderTy, I::BoundTy>,
+    mapped_consts: IndexMap<I::PlaceholderConst, I::BoundConst>,
+    // The current depth relative to *this* folding, *not* the entire normalization. In other words,
+    // the depth of binders we've passed here.
+    current_index: ty::DebruijnIndex,
+    // The `UniverseIndex` of the binding levels above us. These are optional, since we are lazy:
+    // we don't actually create a universe until we see a bound var we have to replace.
+    universe_indices: &'a mut Vec<Option<ty::UniverseIndex>>,
+}
+
+impl<'a, Infcx, I> BoundVarReplacer<'a, Infcx, I>
+where
+    Infcx: InferCtxtLike<Interner = I>,
+    I: Interner,
+{
+    /// Returns `Some` if we *were* able to replace bound vars. If there are any bound vars that
+    /// use a binding level above `universe_indices.len()`, we fail.
+    pub fn replace_bound_vars<T: TypeFoldable<I>>(
+        infcx: &'a Infcx,
+        universe_indices: &'a mut Vec<Option<ty::UniverseIndex>>,
+        value: T,
+    ) -> (
+        T,
+        IndexMap<I::PlaceholderRegion, I::BoundRegion>,
+        IndexMap<I::PlaceholderTy, I::BoundTy>,
+        IndexMap<I::PlaceholderConst, I::BoundConst>,
+    ) {
+        let mut replacer = BoundVarReplacer {
+            infcx,
+            mapped_regions: Default::default(),
+            mapped_types: Default::default(),
+            mapped_consts: Default::default(),
+            current_index: ty::INNERMOST,
+            universe_indices,
+        };
+
+        let value = value.fold_with(&mut replacer);
+
+        (value, replacer.mapped_regions, replacer.mapped_types, replacer.mapped_consts)
+    }
+
+    fn universe_for(&mut self, debruijn: ty::DebruijnIndex) -> ty::UniverseIndex {
+        let infcx = self.infcx;
+        let index =
+            self.universe_indices.len() + self.current_index.as_usize() - debruijn.as_usize() - 1;
+        let universe = self.universe_indices[index].unwrap_or_else(|| {
+            for i in self.universe_indices.iter_mut().take(index + 1) {
+                *i = i.or_else(|| Some(infcx.create_next_universe()))
+            }
+            self.universe_indices[index].unwrap()
+        });
+        universe
+    }
+}
+
+impl<Infcx, I> TypeFolder<I> for BoundVarReplacer<'_, Infcx, I>
+where
+    Infcx: InferCtxtLike<Interner = I>,
+    I: Interner,
+{
+    fn cx(&self) -> I {
+        self.infcx.cx()
+    }
+
+    fn fold_binder<T: TypeFoldable<I>>(&mut self, t: ty::Binder<I, T>) -> ty::Binder<I, T> {
+        self.current_index.shift_in(1);
+        let t = t.super_fold_with(self);
+        self.current_index.shift_out(1);
+        t
+    }
+
+    fn fold_region(&mut self, r: I::Region) -> I::Region {
+        match r.kind() {
+            ty::ReBound(debruijn, _)
+                if debruijn.as_usize()
+                    >= self.current_index.as_usize() + self.universe_indices.len() =>
+            {
+                panic!(
+                    "Bound vars {r:#?} outside of `self.universe_indices`: {:#?}",
+                    self.universe_indices
+                );
+            }
+            ty::ReBound(debruijn, br) if debruijn >= self.current_index => {
+                let universe = self.universe_for(debruijn);
+                let p = PlaceholderLike::new(universe, br);
+                self.mapped_regions.insert(p, br);
+                Region::new_placeholder(self.cx(), p)
+            }
+            _ => r,
+        }
+    }
+
+    fn fold_ty(&mut self, t: I::Ty) -> I::Ty {
+        match t.kind() {
+            ty::Bound(debruijn, _)
+                if debruijn.as_usize() + 1
+                    > self.current_index.as_usize() + self.universe_indices.len() =>
+            {
+                panic!(
+                    "Bound vars {t:#?} outside of `self.universe_indices`: {:#?}",
+                    self.universe_indices
+                );
+            }
+            ty::Bound(debruijn, bound_ty) if debruijn >= self.current_index => {
+                let universe = self.universe_for(debruijn);
+                let p = PlaceholderLike::new(universe, bound_ty);
+                self.mapped_types.insert(p, bound_ty);
+                Ty::new_placeholder(self.cx(), p)
+            }
+            _ if t.has_vars_bound_at_or_above(self.current_index) => t.super_fold_with(self),
+            _ => t,
+        }
+    }
+
+    fn fold_const(&mut self, ct: I::Const) -> I::Const {
+        match ct.kind() {
+            ty::ConstKind::Bound(debruijn, _)
+                if debruijn.as_usize() + 1
+                    > self.current_index.as_usize() + self.universe_indices.len() =>
+            {
+                panic!(
+                    "Bound vars {ct:#?} outside of `self.universe_indices`: {:#?}",
+                    self.universe_indices
+                );
+            }
+            ty::ConstKind::Bound(debruijn, bound_const) if debruijn >= self.current_index => {
+                let universe = self.universe_for(debruijn);
+                let p = PlaceholderLike::new(universe, bound_const);
+                self.mapped_consts.insert(p, bound_const);
+                Const::new_placeholder(self.cx(), p)
+            }
+            _ => ct.super_fold_with(self),
+        }
+    }
+
+    fn fold_predicate(&mut self, p: I::Predicate) -> I::Predicate {
+        if p.has_vars_bound_at_or_above(self.current_index) { p.super_fold_with(self) } else { p }
+    }
+}
diff --git a/compiler/rustc_next_trait_solver/src/solve/assembly/mod.rs b/compiler/rustc_next_trait_solver/src/solve/assembly/mod.rs
index 542e212e1bf..a300558c0c9 100644
--- a/compiler/rustc_next_trait_solver/src/solve/assembly/mod.rs
+++ b/compiler/rustc_next_trait_solver/src/solve/assembly/mod.rs
@@ -8,6 +8,7 @@ use std::ops::ControlFlow;
 use derive_where::derive_where;
 use rustc_type_ir::inherent::*;
 use rustc_type_ir::lang_items::TraitSolverLangItem;
+use rustc_type_ir::solve::SizedTraitKind;
 use rustc_type_ir::{
     self as ty, Interner, TypeFoldable, TypeSuperVisitable, TypeVisitable, TypeVisitableExt as _,
     TypeVisitor, TypingMode, Upcast as _, elaborate,
@@ -203,13 +204,15 @@ where
         goal: Goal<I, Self>,
     ) -> Result<Candidate<I>, NoSolution>;
 
-    /// A type is `Sized` if its tail component is `Sized`.
+    /// A type is `Sized` if its tail component is `Sized` and a type is `MetaSized` if its tail
+    /// component is `MetaSized`.
     ///
     /// These components are given by built-in rules from
-    /// [`structural_traits::instantiate_constituent_tys_for_sized_trait`].
-    fn consider_builtin_sized_candidate(
+    /// [`structural_traits::instantiate_constituent_tys_for_sizedness_trait`].
+    fn consider_builtin_sizedness_candidates(
         ecx: &mut EvalCtxt<'_, D>,
         goal: Goal<I, Self>,
+        sizedness: SizedTraitKind,
     ) -> Result<Candidate<I>, NoSolution>;
 
     /// A type is `Copy` or `Clone` if its components are `Copy` or `Clone`.
@@ -466,7 +469,15 @@ where
             G::consider_trait_alias_candidate(self, goal)
         } else {
             match cx.as_lang_item(trait_def_id) {
-                Some(TraitSolverLangItem::Sized) => G::consider_builtin_sized_candidate(self, goal),
+                Some(TraitSolverLangItem::Sized) => {
+                    G::consider_builtin_sizedness_candidates(self, goal, SizedTraitKind::Sized)
+                }
+                Some(TraitSolverLangItem::MetaSized) => {
+                    G::consider_builtin_sizedness_candidates(self, goal, SizedTraitKind::MetaSized)
+                }
+                Some(TraitSolverLangItem::PointeeSized) => {
+                    unreachable!("`PointeeSized` is removed during lowering");
+                }
                 Some(TraitSolverLangItem::Copy | TraitSolverLangItem::Clone) => {
                     G::consider_builtin_copy_clone_candidate(self, goal)
                 }
@@ -1014,7 +1025,11 @@ where
             return Ok(CandidateSource::ParamEnv(ParamEnvSource::NonGlobal));
         }
 
-        match assumption.visit_with(&mut FindParamInClause { ecx: self, param_env }) {
+        match assumption.visit_with(&mut FindParamInClause {
+            ecx: self,
+            param_env,
+            universes: vec![],
+        }) {
             ControlFlow::Break(Err(NoSolution)) => Err(NoSolution),
             ControlFlow::Break(Ok(())) => Ok(CandidateSource::ParamEnv(ParamEnvSource::NonGlobal)),
             ControlFlow::Continue(()) => Ok(CandidateSource::ParamEnv(ParamEnvSource::Global)),
@@ -1025,6 +1040,7 @@ where
 struct FindParamInClause<'a, 'b, D: SolverDelegate<Interner = I>, I: Interner> {
     ecx: &'a mut EvalCtxt<'b, D>,
     param_env: I::ParamEnv,
+    universes: Vec<Option<ty::UniverseIndex>>,
 }
 
 impl<D, I> TypeVisitor<I> for FindParamInClause<'_, '_, D, I>
@@ -1034,31 +1050,42 @@ where
 {
     type Result = ControlFlow<Result<(), NoSolution>>;
 
-    fn visit_binder<T: TypeFoldable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
-        self.ecx.enter_forall(t.clone(), |ecx, v| {
-            v.visit_with(&mut FindParamInClause { ecx, param_env: self.param_env })
-        })
+    fn visit_binder<T: TypeVisitable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
+        self.universes.push(None);
+        t.super_visit_with(self)?;
+        self.universes.pop();
+        ControlFlow::Continue(())
     }
 
     fn visit_ty(&mut self, ty: I::Ty) -> Self::Result {
+        let ty = self.ecx.replace_bound_vars(ty, &mut self.universes);
         let Ok(ty) = self.ecx.structurally_normalize_ty(self.param_env, ty) else {
             return ControlFlow::Break(Err(NoSolution));
         };
 
-        if let ty::Placeholder(_) = ty.kind() {
-            ControlFlow::Break(Ok(()))
+        if let ty::Placeholder(p) = ty.kind() {
+            if p.universe() == ty::UniverseIndex::ROOT {
+                ControlFlow::Break(Ok(()))
+            } else {
+                ControlFlow::Continue(())
+            }
         } else {
             ty.super_visit_with(self)
         }
     }
 
     fn visit_const(&mut self, ct: I::Const) -> Self::Result {
+        let ct = self.ecx.replace_bound_vars(ct, &mut self.universes);
         let Ok(ct) = self.ecx.structurally_normalize_const(self.param_env, ct) else {
             return ControlFlow::Break(Err(NoSolution));
         };
 
-        if let ty::ConstKind::Placeholder(_) = ct.kind() {
-            ControlFlow::Break(Ok(()))
+        if let ty::ConstKind::Placeholder(p) = ct.kind() {
+            if p.universe() == ty::UniverseIndex::ROOT {
+                ControlFlow::Break(Ok(()))
+            } else {
+                ControlFlow::Continue(())
+            }
         } else {
             ct.super_visit_with(self)
         }
@@ -1066,10 +1093,17 @@ where
 
     fn visit_region(&mut self, r: I::Region) -> Self::Result {
         match self.ecx.eager_resolve_region(r).kind() {
-            ty::ReStatic | ty::ReError(_) => ControlFlow::Continue(()),
-            ty::ReVar(_) | ty::RePlaceholder(_) => ControlFlow::Break(Ok(())),
-            ty::ReErased | ty::ReEarlyParam(_) | ty::ReLateParam(_) | ty::ReBound(..) => {
-                unreachable!()
+            ty::ReStatic | ty::ReError(_) | ty::ReBound(..) => ControlFlow::Continue(()),
+            ty::RePlaceholder(p) => {
+                if p.universe() == ty::UniverseIndex::ROOT {
+                    ControlFlow::Break(Ok(()))
+                } else {
+                    ControlFlow::Continue(())
+                }
+            }
+            ty::ReVar(_) => ControlFlow::Break(Ok(())),
+            ty::ReErased | ty::ReEarlyParam(_) | ty::ReLateParam(_) => {
+                unreachable!("unexpected region in param-env clause")
             }
         }
     }
diff --git a/compiler/rustc_next_trait_solver/src/solve/assembly/structural_traits.rs b/compiler/rustc_next_trait_solver/src/solve/assembly/structural_traits.rs
index 4a2a7761f7f..f39d3226009 100644
--- a/compiler/rustc_next_trait_solver/src/solve/assembly/structural_traits.rs
+++ b/compiler/rustc_next_trait_solver/src/solve/assembly/structural_traits.rs
@@ -5,6 +5,7 @@ use derive_where::derive_where;
 use rustc_type_ir::data_structures::HashMap;
 use rustc_type_ir::inherent::*;
 use rustc_type_ir::lang_items::TraitSolverLangItem;
+use rustc_type_ir::solve::SizedTraitKind;
 use rustc_type_ir::solve::inspect::ProbeKind;
 use rustc_type_ir::{
     self as ty, FallibleTypeFolder, Interner, Movability, Mutability, TypeFoldable,
@@ -104,8 +105,9 @@ where
 }
 
 #[instrument(level = "trace", skip(ecx), ret)]
-pub(in crate::solve) fn instantiate_constituent_tys_for_sized_trait<D, I>(
+pub(in crate::solve) fn instantiate_constituent_tys_for_sizedness_trait<D, I>(
     ecx: &EvalCtxt<'_, D>,
+    sizedness: SizedTraitKind,
     ty: I::Ty,
 ) -> Result<ty::Binder<I, Vec<I::Ty>>, NoSolution>
 where
@@ -113,8 +115,9 @@ where
     I: Interner,
 {
     match ty.kind() {
-        // impl Sized for u*, i*, bool, f*, FnDef, FnPtr, *(const/mut) T, char, &mut? T, [T; N], dyn* Trait, !
-        // impl Sized for Coroutine, CoroutineWitness, Closure, CoroutineClosure
+        // impl {Meta,}Sized for u*, i*, bool, f*, FnDef, FnPtr, *(const/mut) T, char
+        // impl {Meta,}Sized for &mut? T, [T; N], dyn* Trait, !, Coroutine, CoroutineWitness
+        // impl {Meta,}Sized for Closure, CoroutineClosure
         ty::Infer(ty::IntVar(_) | ty::FloatVar(_))
         | ty::Uint(_)
         | ty::Int(_)
@@ -135,13 +138,16 @@ where
         | ty::Dynamic(_, _, ty::DynStar)
         | ty::Error(_) => Ok(ty::Binder::dummy(vec![])),
 
-        ty::Str
-        | ty::Slice(_)
-        | ty::Dynamic(..)
-        | ty::Foreign(..)
-        | ty::Alias(..)
-        | ty::Param(_)
-        | ty::Placeholder(..) => Err(NoSolution),
+        // impl {Meta,}Sized for str, [T], dyn Trait
+        ty::Str | ty::Slice(_) | ty::Dynamic(..) => match sizedness {
+            SizedTraitKind::Sized => Err(NoSolution),
+            SizedTraitKind::MetaSized => Ok(ty::Binder::dummy(vec![])),
+        },
+
+        // impl {} for extern type
+        ty::Foreign(..) => Err(NoSolution),
+
+        ty::Alias(..) | ty::Param(_) | ty::Placeholder(..) => Err(NoSolution),
 
         ty::Bound(..)
         | ty::Infer(ty::TyVar(_) | ty::FreshTy(_) | ty::FreshIntTy(_) | ty::FreshFloatTy(_)) => {
@@ -150,22 +156,27 @@ where
 
         ty::UnsafeBinder(bound_ty) => Ok(bound_ty.map_bound(|ty| vec![ty])),
 
-        // impl Sized for ()
-        // impl Sized for (T1, T2, .., Tn) where Tn: Sized if n >= 1
+        // impl {Meta,}Sized for ()
+        // impl {Meta,}Sized for (T1, T2, .., Tn) where Tn: {Meta,}Sized if n >= 1
         ty::Tuple(tys) => Ok(ty::Binder::dummy(tys.last().map_or_else(Vec::new, |ty| vec![ty]))),
 
-        // impl Sized for Adt<Args...> where sized_constraint(Adt)<Args...>: Sized
-        //   `sized_constraint(Adt)` is the deepest struct trail that can be determined
-        //   by the definition of `Adt`, independent of the generic args.
-        // impl Sized for Adt<Args...> if sized_constraint(Adt) == None
-        //   As a performance optimization, `sized_constraint(Adt)` can return `None`
-        //   if the ADTs definition implies that it is sized by for all possible args.
+        // impl {Meta,}Sized for Adt<Args...>
+        //   where {meta,pointee,}sized_constraint(Adt)<Args...>: {Meta,}Sized
+        //
+        //   `{meta,pointee,}sized_constraint(Adt)` is the deepest struct trail that can be
+        //   determined by the definition of `Adt`, independent of the generic args.
+        //
+        // impl {Meta,}Sized for Adt<Args...>
+        //   if {meta,pointee,}sized_constraint(Adt) == None
+        //
+        //   As a performance optimization, `{meta,pointee,}sized_constraint(Adt)` can return `None`
+        //   if the ADTs definition implies that it is {meta,}sized by for all possible args.
         //   In this case, the builtin impl will have no nested subgoals. This is a
-        //   "best effort" optimization and `sized_constraint` may return `Some`, even
-        //   if the ADT is sized for all possible args.
+        //   "best effort" optimization and `{meta,pointee,}sized_constraint` may return `Some`,
+        //   even if the ADT is {meta,pointee,}sized for all possible args.
         ty::Adt(def, args) => {
-            if let Some(sized_crit) = def.sized_constraint(ecx.cx()) {
-                Ok(ty::Binder::dummy(vec![sized_crit.instantiate(ecx.cx(), args)]))
+            if let Some(crit) = def.sizedness_constraint(ecx.cx(), sizedness) {
+                Ok(ty::Binder::dummy(vec![crit.instantiate(ecx.cx(), args)]))
             } else {
                 Ok(ty::Binder::dummy(vec![]))
             }
diff --git a/compiler/rustc_next_trait_solver/src/solve/effect_goals.rs b/compiler/rustc_next_trait_solver/src/solve/effect_goals.rs
index 8413c2abbb9..1690c908d12 100644
--- a/compiler/rustc_next_trait_solver/src/solve/effect_goals.rs
+++ b/compiler/rustc_next_trait_solver/src/solve/effect_goals.rs
@@ -4,6 +4,7 @@
 use rustc_type_ir::fast_reject::DeepRejectCtxt;
 use rustc_type_ir::inherent::*;
 use rustc_type_ir::lang_items::TraitSolverLangItem;
+use rustc_type_ir::solve::SizedTraitKind;
 use rustc_type_ir::solve::inspect::ProbeKind;
 use rustc_type_ir::{self as ty, Interner, elaborate};
 use tracing::instrument;
@@ -198,11 +199,12 @@ where
         unreachable!("trait aliases are never const")
     }
 
-    fn consider_builtin_sized_candidate(
+    fn consider_builtin_sizedness_candidates(
         _ecx: &mut EvalCtxt<'_, D>,
         _goal: Goal<I, Self>,
+        _sizedness: SizedTraitKind,
     ) -> Result<Candidate<I>, NoSolution> {
-        unreachable!("Sized is never const")
+        unreachable!("Sized/MetaSized is never const")
     }
 
     fn consider_builtin_copy_clone_candidate(
diff --git a/compiler/rustc_next_trait_solver/src/solve/eval_ctxt/mod.rs b/compiler/rustc_next_trait_solver/src/solve/eval_ctxt/mod.rs
index 345ece20b7e..7ead0a6d6b7 100644
--- a/compiler/rustc_next_trait_solver/src/solve/eval_ctxt/mod.rs
+++ b/compiler/rustc_next_trait_solver/src/solve/eval_ctxt/mod.rs
@@ -19,6 +19,7 @@ use tracing::{debug, instrument, trace};
 use super::has_only_region_constraints;
 use crate::coherence;
 use crate::delegate::SolverDelegate;
+use crate::placeholder::BoundVarReplacer;
 use crate::solve::inspect::{self, ProofTreeBuilder};
 use crate::solve::search_graph::SearchGraph;
 use crate::solve::{
@@ -1232,6 +1233,14 @@ where
     ) -> Result<Certainty, NoSolution> {
         self.delegate.is_transmutable(dst, src, assume)
     }
+
+    pub(super) fn replace_bound_vars<T: TypeFoldable<I>>(
+        &self,
+        t: T,
+        universes: &mut Vec<Option<ty::UniverseIndex>>,
+    ) -> T {
+        BoundVarReplacer::replace_bound_vars(&**self.delegate, universes, t).0
+    }
 }
 
 /// Eagerly replace aliases with inference variables, emitting `AliasRelate`
diff --git a/compiler/rustc_next_trait_solver/src/solve/normalizes_to/mod.rs b/compiler/rustc_next_trait_solver/src/solve/normalizes_to/mod.rs
index 2fddc0044cb..d51c87fe68e 100644
--- a/compiler/rustc_next_trait_solver/src/solve/normalizes_to/mod.rs
+++ b/compiler/rustc_next_trait_solver/src/solve/normalizes_to/mod.rs
@@ -6,6 +6,7 @@ mod opaque_types;
 use rustc_type_ir::fast_reject::DeepRejectCtxt;
 use rustc_type_ir::inherent::*;
 use rustc_type_ir::lang_items::TraitSolverLangItem;
+use rustc_type_ir::solve::SizedTraitKind;
 use rustc_type_ir::{self as ty, Interner, NormalizesTo, PredicateKind, Upcast as _};
 use tracing::instrument;
 
@@ -413,11 +414,12 @@ where
         panic!("trait aliases do not have associated types: {:?}", goal);
     }
 
-    fn consider_builtin_sized_candidate(
+    fn consider_builtin_sizedness_candidates(
         _ecx: &mut EvalCtxt<'_, D>,
         goal: Goal<I, Self>,
+        _sizedness: SizedTraitKind,
     ) -> Result<Candidate<I>, NoSolution> {
-        panic!("`Sized` does not have an associated type: {:?}", goal);
+        panic!("`Sized`/`MetaSized` does not have an associated type: {:?}", goal);
     }
 
     fn consider_builtin_copy_clone_candidate(
diff --git a/compiler/rustc_next_trait_solver/src/solve/trait_goals.rs b/compiler/rustc_next_trait_solver/src/solve/trait_goals.rs
index 110c67a8e21..8ee116b090d 100644
--- a/compiler/rustc_next_trait_solver/src/solve/trait_goals.rs
+++ b/compiler/rustc_next_trait_solver/src/solve/trait_goals.rs
@@ -4,9 +4,9 @@ use rustc_type_ir::data_structures::IndexSet;
 use rustc_type_ir::fast_reject::DeepRejectCtxt;
 use rustc_type_ir::inherent::*;
 use rustc_type_ir::lang_items::TraitSolverLangItem;
-use rustc_type_ir::solve::CanonicalResponse;
+use rustc_type_ir::solve::{CanonicalResponse, SizedTraitKind};
 use rustc_type_ir::{
-    self as ty, Interner, Movability, TraitPredicate, TypeVisitableExt as _, TypingMode,
+    self as ty, Interner, Movability, TraitPredicate, TraitRef, TypeVisitableExt as _, TypingMode,
     Upcast as _, elaborate,
 };
 use tracing::{debug, instrument, trace};
@@ -131,9 +131,11 @@ where
         assumption: I::Clause,
     ) -> Result<(), NoSolution> {
         if let Some(trait_clause) = assumption.as_trait_clause() {
-            if trait_clause.def_id() == goal.predicate.def_id()
-                && trait_clause.polarity() == goal.predicate.polarity
-            {
+            if trait_clause.polarity() != goal.predicate.polarity {
+                return Err(NoSolution);
+            }
+
+            if trait_clause.def_id() == goal.predicate.def_id() {
                 if DeepRejectCtxt::relate_rigid_rigid(ecx.cx()).args_may_unify(
                     goal.predicate.trait_ref.args,
                     trait_clause.skip_binder().trait_ref.args,
@@ -141,6 +143,17 @@ where
                     return Ok(());
                 }
             }
+
+            // PERF(sized-hierarchy): Sizedness supertraits aren't elaborated to improve perf, so
+            // check for a `Sized` subtrait when looking for `MetaSized`. `PointeeSized` bounds
+            // are syntactic sugar for a lack of bounds so don't need this.
+            if ecx.cx().is_lang_item(goal.predicate.def_id(), TraitSolverLangItem::MetaSized)
+                && ecx.cx().is_lang_item(trait_clause.def_id(), TraitSolverLangItem::Sized)
+            {
+                let meta_sized_clause =
+                    trait_predicate_with_def_id(ecx.cx(), trait_clause, goal.predicate.def_id());
+                return Self::fast_reject_assumption(ecx, goal, meta_sized_clause);
+            }
         }
 
         Err(NoSolution)
@@ -154,6 +167,17 @@ where
     ) -> QueryResult<I> {
         let trait_clause = assumption.as_trait_clause().unwrap();
 
+        // PERF(sized-hierarchy): Sizedness supertraits aren't elaborated to improve perf, so
+        // check for a `Sized` subtrait when looking for `MetaSized`. `PointeeSized` bounds
+        // are syntactic sugar for a lack of bounds so don't need this.
+        if ecx.cx().is_lang_item(goal.predicate.def_id(), TraitSolverLangItem::MetaSized)
+            && ecx.cx().is_lang_item(trait_clause.def_id(), TraitSolverLangItem::Sized)
+        {
+            let meta_sized_clause =
+                trait_predicate_with_def_id(ecx.cx(), trait_clause, goal.predicate.def_id());
+            return Self::match_assumption(ecx, goal, meta_sized_clause, then);
+        }
+
         let assumption_trait_pred = ecx.instantiate_binder_with_infer(trait_clause);
         ecx.eq(goal.param_env, goal.predicate.trait_ref, assumption_trait_pred.trait_ref)?;
 
@@ -245,9 +269,10 @@ where
         })
     }
 
-    fn consider_builtin_sized_candidate(
+    fn consider_builtin_sizedness_candidates(
         ecx: &mut EvalCtxt<'_, D>,
         goal: Goal<I, Self>,
+        sizedness: SizedTraitKind,
     ) -> Result<Candidate<I>, NoSolution> {
         if goal.predicate.polarity != ty::PredicatePolarity::Positive {
             return Err(NoSolution);
@@ -256,7 +281,11 @@ where
         ecx.probe_and_evaluate_goal_for_constituent_tys(
             CandidateSource::BuiltinImpl(BuiltinImplSource::Trivial),
             goal,
-            structural_traits::instantiate_constituent_tys_for_sized_trait,
+            |ecx, ty| {
+                structural_traits::instantiate_constituent_tys_for_sizedness_trait(
+                    ecx, sizedness, ty,
+                )
+            },
         )
     }
 
@@ -812,6 +841,25 @@ where
     }
 }
 
+/// Small helper function to change the `def_id` of a trait predicate - this is not normally
+/// something that you want to do, as different traits will require different args and so making
+/// it easy to change the trait is something of a footgun, but it is useful in the narrow
+/// circumstance of changing from `MetaSized` to `Sized`, which happens as part of the lazy
+/// elaboration of sizedness candidates.
+#[inline(always)]
+fn trait_predicate_with_def_id<I: Interner>(
+    cx: I,
+    clause: ty::Binder<I, ty::TraitPredicate<I>>,
+    did: I::DefId,
+) -> I::Clause {
+    clause
+        .map_bound(|c| TraitPredicate {
+            trait_ref: TraitRef::new_from_args(cx, did, c.trait_ref.args),
+            polarity: c.polarity,
+        })
+        .upcast(cx)
+}
+
 impl<D, I> EvalCtxt<'_, D>
 where
     D: SolverDelegate<Interner = I>,
diff --git a/compiler/rustc_parse/messages.ftl b/compiler/rustc_parse/messages.ftl
index 1f221b4bf78..f6e0b08b140 100644
--- a/compiler/rustc_parse/messages.ftl
+++ b/compiler/rustc_parse/messages.ftl
@@ -299,10 +299,12 @@ parse_float_literal_unsupported_base = {$base} float literal is not supported
 parse_fn_pointer_cannot_be_async = an `fn` pointer type cannot be `async`
     .label = `async` because of this
     .suggestion = remove the `async` qualifier
+    .note = allowed qualifiers are: `unsafe` and `extern`
 
 parse_fn_pointer_cannot_be_const = an `fn` pointer type cannot be `const`
     .label = `const` because of this
     .suggestion = remove the `const` qualifier
+    .note = allowed qualifiers are: `unsafe` and `extern`
 
 parse_fn_ptr_with_generics = function pointer types may not have generic parameters
     .suggestion = consider moving the lifetime {$arity ->
diff --git a/compiler/rustc_parse/src/errors.rs b/compiler/rustc_parse/src/errors.rs
index 2dba568a258..0f0c5434800 100644
--- a/compiler/rustc_parse/src/errors.rs
+++ b/compiler/rustc_parse/src/errors.rs
@@ -2938,22 +2938,22 @@ pub(crate) struct DynAfterMut {
 
 #[derive(Diagnostic)]
 #[diag(parse_fn_pointer_cannot_be_const)]
+#[note]
 pub(crate) struct FnPointerCannotBeConst {
     #[primary_span]
-    pub span: Span,
     #[label]
-    pub qualifier: Span,
+    pub span: Span,
     #[suggestion(code = "", applicability = "maybe-incorrect", style = "verbose")]
     pub suggestion: Span,
 }
 
 #[derive(Diagnostic)]
 #[diag(parse_fn_pointer_cannot_be_async)]
+#[note]
 pub(crate) struct FnPointerCannotBeAsync {
     #[primary_span]
-    pub span: Span,
     #[label]
-    pub qualifier: Span,
+    pub span: Span,
     #[suggestion(code = "", applicability = "maybe-incorrect", style = "verbose")]
     pub suggestion: Span,
 }
diff --git a/compiler/rustc_parse/src/parser/diagnostics.rs b/compiler/rustc_parse/src/parser/diagnostics.rs
index b49a13ce584..a64bb424117 100644
--- a/compiler/rustc_parse/src/parser/diagnostics.rs
+++ b/compiler/rustc_parse/src/parser/diagnostics.rs
@@ -686,23 +686,34 @@ impl<'a> Parser<'a> {
         }
 
         if let token::DocComment(kind, style, _) = self.token.kind {
-            // We have something like `expr //!val` where the user likely meant `expr // !val`
-            let pos = self.token.span.lo() + BytePos(2);
-            let span = self.token.span.with_lo(pos).with_hi(pos);
-            err.span_suggestion_verbose(
-                span,
-                format!(
-                    "add a space before {} to write a regular comment",
-                    match (kind, style) {
-                        (token::CommentKind::Line, ast::AttrStyle::Inner) => "`!`",
-                        (token::CommentKind::Block, ast::AttrStyle::Inner) => "`!`",
-                        (token::CommentKind::Line, ast::AttrStyle::Outer) => "the last `/`",
-                        (token::CommentKind::Block, ast::AttrStyle::Outer) => "the last `*`",
-                    },
-                ),
-                " ".to_string(),
-                Applicability::MachineApplicable,
-            );
+            // This is to avoid suggesting converting a doc comment to a regular comment
+            // when missing a comma before the doc comment in lists (#142311):
+            //
+            // ```
+            // enum Foo{
+            //     A /// xxxxxxx
+            //     B,
+            // }
+            // ```
+            if !expected.contains(&TokenType::Comma) {
+                // We have something like `expr //!val` where the user likely meant `expr // !val`
+                let pos = self.token.span.lo() + BytePos(2);
+                let span = self.token.span.with_lo(pos).with_hi(pos);
+                err.span_suggestion_verbose(
+                    span,
+                    format!(
+                        "add a space before {} to write a regular comment",
+                        match (kind, style) {
+                            (token::CommentKind::Line, ast::AttrStyle::Inner) => "`!`",
+                            (token::CommentKind::Block, ast::AttrStyle::Inner) => "`!`",
+                            (token::CommentKind::Line, ast::AttrStyle::Outer) => "the last `/`",
+                            (token::CommentKind::Block, ast::AttrStyle::Outer) => "the last `*`",
+                        },
+                    ),
+                    " ".to_string(),
+                    Applicability::MaybeIncorrect,
+                );
+            }
         }
 
         let sp = if self.token == token::Eof {
@@ -2273,23 +2284,18 @@ impl<'a> Parser<'a> {
                     ),
                     // Also catches `fn foo(&a)`.
                     PatKind::Ref(ref inner_pat, mutab)
-                        if matches!(inner_pat.clone().kind, PatKind::Ident(..)) =>
+                        if let PatKind::Ident(_, ident, _) = inner_pat.clone().kind =>
                     {
-                        match inner_pat.clone().kind {
-                            PatKind::Ident(_, ident, _) => {
-                                let mutab = mutab.prefix_str();
-                                (
-                                    ident,
-                                    "self: ",
-                                    format!("{ident}: &{mutab}TypeName"),
-                                    "_: ",
-                                    pat.span.shrink_to_lo(),
-                                    pat.span,
-                                    pat.span.shrink_to_lo(),
-                                )
-                            }
-                            _ => unreachable!(),
-                        }
+                        let mutab = mutab.prefix_str();
+                        (
+                            ident,
+                            "self: ",
+                            format!("{ident}: &{mutab}TypeName"),
+                            "_: ",
+                            pat.span.shrink_to_lo(),
+                            pat.span,
+                            pat.span.shrink_to_lo(),
+                        )
                     }
                     _ => {
                         // Otherwise, try to get a type and emit a suggestion.
diff --git a/compiler/rustc_parse/src/parser/expr.rs b/compiler/rustc_parse/src/parser/expr.rs
index 93489aa8ee9..93c76c47f06 100644
--- a/compiler/rustc_parse/src/parser/expr.rs
+++ b/compiler/rustc_parse/src/parser/expr.rs
@@ -4087,7 +4087,7 @@ impl<'a> CondChecker<'a> {
 }
 
 impl MutVisitor for CondChecker<'_> {
-    fn visit_expr(&mut self, e: &mut P<Expr>) {
+    fn visit_expr(&mut self, e: &mut Expr) {
         self.depth += 1;
         use ForbiddenLetReason::*;
 
diff --git a/compiler/rustc_parse/src/parser/item.rs b/compiler/rustc_parse/src/parser/item.rs
index a325c2a57ab..658ed4bd41c 100644
--- a/compiler/rustc_parse/src/parser/item.rs
+++ b/compiler/rustc_parse/src/parser/item.rs
@@ -23,7 +23,7 @@ use super::{
     AttrWrapper, ExpKeywordPair, ExpTokenPair, FollowedByType, ForceCollect, Parser, PathStyle,
     Recovered, Trailing, UsePreAttrPos,
 };
-use crate::errors::{self, MacroExpandsToAdtField};
+use crate::errors::{self, FnPointerCannotBeAsync, FnPointerCannotBeConst, MacroExpandsToAdtField};
 use crate::{exp, fluent_generated as fluent};
 
 impl<'a> Parser<'a> {
@@ -2402,7 +2402,7 @@ impl<'a> Parser<'a> {
         case: Case,
     ) -> PResult<'a, (Ident, FnSig, Generics, Option<P<FnContract>>, Option<P<Block>>)> {
         let fn_span = self.token.span;
-        let header = self.parse_fn_front_matter(vis, case)?; // `const ... fn`
+        let header = self.parse_fn_front_matter(vis, case, FrontMatterParsingMode::Function)?; // `const ... fn`
         let ident = self.parse_ident()?; // `foo`
         let mut generics = self.parse_generics()?; // `<'a, T, ...>`
         let decl = match self.parse_fn_decl(
@@ -2658,16 +2658,37 @@ impl<'a> Parser<'a> {
     ///
     /// `vis` represents the visibility that was already parsed, if any. Use
     /// `Visibility::Inherited` when no visibility is known.
+    ///
+    /// If `parsing_mode` is `FrontMatterParsingMode::FunctionPtrType`, we error on `const` and `async` qualifiers,
+    /// which are not allowed in function pointer types.
     pub(super) fn parse_fn_front_matter(
         &mut self,
         orig_vis: &Visibility,
         case: Case,
+        parsing_mode: FrontMatterParsingMode,
     ) -> PResult<'a, FnHeader> {
         let sp_start = self.token.span;
         let constness = self.parse_constness(case);
+        if parsing_mode == FrontMatterParsingMode::FunctionPtrType
+            && let Const::Yes(const_span) = constness
+        {
+            self.dcx().emit_err(FnPointerCannotBeConst {
+                span: const_span,
+                suggestion: const_span.until(self.token.span),
+            });
+        }
 
         let async_start_sp = self.token.span;
         let coroutine_kind = self.parse_coroutine_kind(case);
+        if parsing_mode == FrontMatterParsingMode::FunctionPtrType
+            && let Some(ast::CoroutineKind::Async { span: async_span, .. }) = coroutine_kind
+        {
+            self.dcx().emit_err(FnPointerCannotBeAsync {
+                span: async_span,
+                suggestion: async_span.until(self.token.span),
+            });
+        }
+        // FIXME(gen_blocks): emit a similar error for `gen fn()`
 
         let unsafe_start_sp = self.token.span;
         let safety = self.parse_safety(case);
@@ -2703,6 +2724,11 @@ impl<'a> Parser<'a> {
                     enum WrongKw {
                         Duplicated(Span),
                         Misplaced(Span),
+                        /// `MisplacedDisallowedQualifier` is only used instead of `Misplaced`,
+                        /// when the misplaced keyword is disallowed by the current `FrontMatterParsingMode`.
+                        /// In this case, we avoid generating the suggestion to swap around the keywords,
+                        /// as we already generated a suggestion to remove the keyword earlier.
+                        MisplacedDisallowedQualifier,
                     }
 
                     // We may be able to recover
@@ -2716,7 +2742,21 @@ impl<'a> Parser<'a> {
                             Const::Yes(sp) => Some(WrongKw::Duplicated(sp)),
                             Const::No => {
                                 recover_constness = Const::Yes(self.token.span);
-                                Some(WrongKw::Misplaced(async_start_sp))
+                                match parsing_mode {
+                                    FrontMatterParsingMode::Function => {
+                                        Some(WrongKw::Misplaced(async_start_sp))
+                                    }
+                                    FrontMatterParsingMode::FunctionPtrType => {
+                                        self.dcx().emit_err(FnPointerCannotBeConst {
+                                            span: self.token.span,
+                                            suggestion: self
+                                                .token
+                                                .span
+                                                .with_lo(self.prev_token.span.hi()),
+                                        });
+                                        Some(WrongKw::MisplacedDisallowedQualifier)
+                                    }
+                                }
                             }
                         }
                     } else if self.check_keyword(exp!(Async)) {
@@ -2742,7 +2782,21 @@ impl<'a> Parser<'a> {
                                     closure_id: DUMMY_NODE_ID,
                                     return_impl_trait_id: DUMMY_NODE_ID,
                                 });
-                                Some(WrongKw::Misplaced(unsafe_start_sp))
+                                match parsing_mode {
+                                    FrontMatterParsingMode::Function => {
+                                        Some(WrongKw::Misplaced(async_start_sp))
+                                    }
+                                    FrontMatterParsingMode::FunctionPtrType => {
+                                        self.dcx().emit_err(FnPointerCannotBeAsync {
+                                            span: self.token.span,
+                                            suggestion: self
+                                                .token
+                                                .span
+                                                .with_lo(self.prev_token.span.hi()),
+                                        });
+                                        Some(WrongKw::MisplacedDisallowedQualifier)
+                                    }
+                                }
                             }
                         }
                     } else if self.check_keyword(exp!(Unsafe)) {
@@ -2840,14 +2894,20 @@ impl<'a> Parser<'a> {
 
                     // FIXME(gen_blocks): add keyword recovery logic for genness
 
-                    if wrong_kw.is_some()
+                    if let Some(wrong_kw) = wrong_kw
                         && self.may_recover()
                         && self.look_ahead(1, |tok| tok.is_keyword_case(kw::Fn, case))
                     {
                         // Advance past the misplaced keyword and `fn`
                         self.bump();
                         self.bump();
-                        err.emit();
+                        // When we recover from a `MisplacedDisallowedQualifier`, we already emitted an error for the disallowed qualifier
+                        // So we don't emit another error that the qualifier is unexpected.
+                        if matches!(wrong_kw, WrongKw::MisplacedDisallowedQualifier) {
+                            err.cancel();
+                        } else {
+                            err.emit();
+                        }
                         return Ok(FnHeader {
                             constness: recover_constness,
                             safety: recover_safety,
@@ -3194,3 +3254,12 @@ enum IsMacroRulesItem {
     Yes { has_bang: bool },
     No,
 }
+
+#[derive(Copy, Clone, PartialEq, Eq)]
+pub(super) enum FrontMatterParsingMode {
+    /// Parse the front matter of a function declaration
+    Function,
+    /// Parse the front matter of a function pointet type.
+    /// For function pointer types, the `const` and `async` keywords are not permitted.
+    FunctionPtrType,
+}
diff --git a/compiler/rustc_parse/src/parser/pat.rs b/compiler/rustc_parse/src/parser/pat.rs
index 7a226136e23..64653ee2a04 100644
--- a/compiler/rustc_parse/src/parser/pat.rs
+++ b/compiler/rustc_parse/src/parser/pat.rs
@@ -1094,7 +1094,7 @@ impl<'a> Parser<'a> {
     fn make_all_value_bindings_mutable(pat: &mut P<Pat>) -> bool {
         struct AddMut(bool);
         impl MutVisitor for AddMut {
-            fn visit_pat(&mut self, pat: &mut P<Pat>) {
+            fn visit_pat(&mut self, pat: &mut Pat) {
                 if let PatKind::Ident(BindingMode(ByRef::No, m @ Mutability::Not), ..) =
                     &mut pat.kind
                 {
diff --git a/compiler/rustc_parse/src/parser/ty.rs b/compiler/rustc_parse/src/parser/ty.rs
index 9ddfc179e9b..620a34044d1 100644
--- a/compiler/rustc_parse/src/parser/ty.rs
+++ b/compiler/rustc_parse/src/parser/ty.rs
@@ -15,10 +15,11 @@ use thin_vec::{ThinVec, thin_vec};
 use super::{Parser, PathStyle, SeqSep, TokenType, Trailing};
 use crate::errors::{
     self, DynAfterMut, ExpectedFnPathFoundFnKeyword, ExpectedMutOrConstInRawPointerType,
-    FnPointerCannotBeAsync, FnPointerCannotBeConst, FnPtrWithGenerics, FnPtrWithGenericsSugg,
-    HelpUseLatestEdition, InvalidDynKeyword, LifetimeAfterMut, NeedPlusAfterTraitObjectLifetime,
-    NestedCVariadicType, ReturnTypesUseThinArrow,
+    FnPtrWithGenerics, FnPtrWithGenericsSugg, HelpUseLatestEdition, InvalidDynKeyword,
+    LifetimeAfterMut, NeedPlusAfterTraitObjectLifetime, NestedCVariadicType,
+    ReturnTypesUseThinArrow,
 };
+use crate::parser::item::FrontMatterParsingMode;
 use crate::{exp, maybe_recover_from_interpolated_ty_qpath};
 
 /// Signals whether parsing a type should allow `+`.
@@ -669,62 +670,16 @@ impl<'a> Parser<'a> {
             tokens: None,
         };
         let span_start = self.token.span;
-        let ast::FnHeader { ext, safety, constness, coroutine_kind } =
-            self.parse_fn_front_matter(&inherited_vis, Case::Sensitive)?;
-        let fn_start_lo = self.prev_token.span.lo();
+        let ast::FnHeader { ext, safety, .. } = self.parse_fn_front_matter(
+            &inherited_vis,
+            Case::Sensitive,
+            FrontMatterParsingMode::FunctionPtrType,
+        )?;
         if self.may_recover() && self.token == TokenKind::Lt {
             self.recover_fn_ptr_with_generics(lo, &mut params, param_insertion_point)?;
         }
         let decl = self.parse_fn_decl(|_| false, AllowPlus::No, recover_return_sign)?;
-        let whole_span = lo.to(self.prev_token.span);
-
-        // Order/parsing of "front matter" follows:
-        // `<constness> <coroutine_kind> <safety> <extern> fn()`
-        //  ^           ^                ^        ^        ^
-        //  |           |                |        |        fn_start_lo
-        //  |           |                |        ext_sp.lo
-        //  |           |                safety_sp.lo
-        //  |           coroutine_sp.lo
-        //  const_sp.lo
-        if let ast::Const::Yes(const_span) = constness {
-            let next_token_lo = if let Some(
-                ast::CoroutineKind::Async { span, .. }
-                | ast::CoroutineKind::Gen { span, .. }
-                | ast::CoroutineKind::AsyncGen { span, .. },
-            ) = coroutine_kind
-            {
-                span.lo()
-            } else if let ast::Safety::Unsafe(span) | ast::Safety::Safe(span) = safety {
-                span.lo()
-            } else if let ast::Extern::Implicit(span) | ast::Extern::Explicit(_, span) = ext {
-                span.lo()
-            } else {
-                fn_start_lo
-            };
-            let sugg_span = const_span.with_hi(next_token_lo);
-            self.dcx().emit_err(FnPointerCannotBeConst {
-                span: whole_span,
-                qualifier: const_span,
-                suggestion: sugg_span,
-            });
-        }
-        if let Some(ast::CoroutineKind::Async { span: async_span, .. }) = coroutine_kind {
-            let next_token_lo = if let ast::Safety::Unsafe(span) | ast::Safety::Safe(span) = safety
-            {
-                span.lo()
-            } else if let ast::Extern::Implicit(span) | ast::Extern::Explicit(_, span) = ext {
-                span.lo()
-            } else {
-                fn_start_lo
-            };
-            let sugg_span = async_span.with_hi(next_token_lo);
-            self.dcx().emit_err(FnPointerCannotBeAsync {
-                span: whole_span,
-                qualifier: async_span,
-                suggestion: sugg_span,
-            });
-        }
-        // FIXME(gen_blocks): emit a similar error for `gen fn()`
+
         let decl_span = span_start.to(self.prev_token.span);
         Ok(TyKind::BareFn(P(BareFnTy { ext, safety, generic_params: params, decl, decl_span })))
     }
diff --git a/compiler/rustc_parse/src/validate_attr.rs b/compiler/rustc_parse/src/validate_attr.rs
index 378cbb84637..b3096e46b09 100644
--- a/compiler/rustc_parse/src/validate_attr.rs
+++ b/compiler/rustc_parse/src/validate_attr.rs
@@ -180,9 +180,14 @@ pub fn check_attribute_safety(
             let diag_span = attr_item.span();
 
             // Attributes can be safe in earlier editions, and become unsafe in later ones.
+            //
+            // Use the span of the attribute's name to determine the edition: the span of the
+            // attribute as a whole may be inaccurate if it was emitted by a macro.
+            //
+            // See https://github.com/rust-lang/rust/issues/142182.
             let emit_error = match unsafe_since {
                 None => true,
-                Some(unsafe_since) => attr.span.edition() >= unsafe_since,
+                Some(unsafe_since) => path_span.edition() >= unsafe_since,
             };
 
             if emit_error {
@@ -277,11 +282,22 @@ fn emit_malformed_attribute(
     name: Symbol,
     template: AttributeTemplate,
 ) {
+    // attrs with new parsers are locally validated so excluded here
+    if matches!(
+        name,
+        sym::inline
+            | sym::rustc_force_inline
+            | sym::rustc_confusables
+            | sym::repr
+            | sym::deprecated
+    ) {
+        return;
+    }
+
     // Some of previously accepted forms were used in practice,
     // report them as warnings for now.
-    let should_warn = |name| {
-        matches!(name, sym::doc | sym::ignore | sym::inline | sym::link | sym::test | sym::bench)
-    };
+    let should_warn =
+        |name| matches!(name, sym::doc | sym::ignore | sym::link | sym::test | sym::bench);
 
     let error_msg = format!("malformed `{name}` attribute input");
     let mut suggestions = vec![];
diff --git a/compiler/rustc_parse_format/src/lib.rs b/compiler/rustc_parse_format/src/lib.rs
index 9dd064aca66..42bd0f5d847 100644
--- a/compiler/rustc_parse_format/src/lib.rs
+++ b/compiler/rustc_parse_format/src/lib.rs
@@ -29,58 +29,45 @@ pub enum ParseMode {
     Format,
     /// An inline assembly template string for `asm!`.
     InlineAsm,
+    /// A format string for use in diagnostic attributes.
+    ///
+    /// Similar to `format_args!`, however only named ("captured") arguments
+    /// are allowed, and no format modifiers are permitted.
+    Diagnostic,
 }
 
 /// A piece is a portion of the format string which represents the next part
 /// to emit. These are emitted as a stream by the `Parser` class.
 #[derive(Clone, Debug, PartialEq)]
-pub enum Piece<'a> {
+pub enum Piece<'input> {
     /// A literal string which should directly be emitted
-    Lit(&'a str),
+    Lit(&'input str),
     /// This describes that formatting should process the next argument (as
     /// specified inside) for emission.
-    NextArgument(Box<Argument<'a>>),
+    NextArgument(Box<Argument<'input>>),
 }
 
 /// Representation of an argument specification.
 #[derive(Clone, Debug, PartialEq)]
-pub struct Argument<'a> {
+pub struct Argument<'input> {
     /// Where to find this argument
-    pub position: Position<'a>,
+    pub position: Position<'input>,
     /// The span of the position indicator. Includes any whitespace in implicit
     /// positions (`{  }`).
     pub position_span: Range<usize>,
     /// How to format the argument
-    pub format: FormatSpec<'a>,
+    pub format: FormatSpec<'input>,
 }
 
-impl<'a> Argument<'a> {
+impl<'input> Argument<'input> {
     pub fn is_identifier(&self) -> bool {
-        matches!(self.position, Position::ArgumentNamed(_))
-            && matches!(
-                self.format,
-                FormatSpec {
-                    fill: None,
-                    fill_span: None,
-                    align: AlignUnknown,
-                    sign: None,
-                    alternate: false,
-                    zero_pad: false,
-                    debug_hex: None,
-                    precision: CountImplied,
-                    precision_span: None,
-                    width: CountImplied,
-                    width_span: None,
-                    ty: "",
-                    ty_span: None,
-                },
-            )
+        matches!(self.position, Position::ArgumentNamed(_)) && self.format == FormatSpec::default()
     }
 }
 
 /// Specification for the formatting of an argument in the format string.
-#[derive(Clone, Debug, PartialEq)]
-pub struct FormatSpec<'a> {
+#[derive(Clone, Debug, PartialEq, Default)]
+pub struct FormatSpec<'input> {
     /// Optionally specified character to fill alignment with.
     pub fill: Option<char>,
     /// Span of the optionally specified fill character.
@@ -96,30 +83,30 @@ pub struct FormatSpec<'a> {
     /// The `x` or `X` flag. (Only for `Debug`.)
     pub debug_hex: Option<DebugHex>,
     /// The integer precision to use.
-    pub precision: Count<'a>,
+    pub precision: Count<'input>,
     /// The span of the precision formatting flag (for diagnostics).
     pub precision_span: Option<Range<usize>>,
     /// The string width requested for the resulting format.
-    pub width: Count<'a>,
+    pub width: Count<'input>,
     /// The span of the width formatting flag (for diagnostics).
     pub width_span: Option<Range<usize>>,
     /// The descriptor string representing the name of the format desired for
     /// this argument, this can be empty or any number of characters, although
     /// it is required to be one word.
-    pub ty: &'a str,
+    pub ty: &'input str,
     /// The span of the descriptor string (for diagnostics).
     pub ty_span: Option<Range<usize>>,
 }
 
 /// Enum describing where an argument for a format can be located.
 #[derive(Clone, Debug, PartialEq)]
-pub enum Position<'a> {
+pub enum Position<'input> {
     /// The argument is implied to be located at an index
     ArgumentImplicitlyIs(usize),
     /// The argument is located at a specific index given in the format,
     ArgumentIs(usize),
     /// The argument has a name.
-    ArgumentNamed(&'a str),
+    ArgumentNamed(&'input str),
 }
 
 impl Position<'_> {
@@ -132,7 +119,7 @@ impl Position<'_> {
 }
 
 /// Enum of alignments which are supported.
-#[derive(Copy, Clone, Debug, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialEq, Default)]
 pub enum Alignment {
     /// The value will be aligned to the left.
     AlignLeft,
@@ -141,6 +128,7 @@ pub enum Alignment {
     /// The value will be aligned in the center.
     AlignCenter,
     /// The value will take on a default alignment.
+    #[default]
     AlignUnknown,
 }
 
@@ -164,17 +152,18 @@ pub enum DebugHex {
 
 /// A count is used for the precision and width parameters of an integer, and
 /// can reference either an argument or a literal integer.
-#[derive(Clone, Debug, PartialEq)]
-pub enum Count<'a> {
+#[derive(Clone, Debug, PartialEq, Default)]
+pub enum Count<'input> {
     /// The count is specified explicitly.
     CountIs(u16),
     /// The count is specified by the argument with the given name.
-    CountIsName(&'a str, Range<usize>),
+    CountIsName(&'input str, Range<usize>),
     /// The count is specified by the argument at the given index.
     CountIsParam(usize),
     /// The count is specified by a star (like in `{:.*}`) that refers to the argument at the given index.
     CountIsStar(usize),
     /// The count is implied and cannot be explicitly specified.
+    #[default]
     CountImplied,
 }
 
@@ -208,10 +197,10 @@ pub enum Suggestion {
 ///
 /// This is a recursive-descent parser for the sake of simplicity, and if
 /// necessary there's probably lots of room for improvement performance-wise.
-pub struct Parser<'a> {
+pub struct Parser<'input> {
     mode: ParseMode,
     /// Input to be parsed
-    input: &'a str,
+    input: &'input str,
     /// Tuples of the span in the code snippet (input as written before being unescaped), the pos in input, and the char in input
     input_vec: Vec<(Range<usize>, usize, char)>,
     /// Index into input_vec
@@ -237,15 +226,15 @@ pub struct Parser<'a> {
     pub line_spans: Vec<Range<usize>>,
 }
 
-impl<'a> Iterator for Parser<'a> {
-    type Item = Piece<'a>;
+impl<'input> Iterator for Parser<'input> {
+    type Item = Piece<'input>;
 
-    fn next(&mut self) -> Option<Piece<'a>> {
-        if let Some(&(Range { start, end }, idx, ch)) = self.input_vec.get(self.input_vec_index) {
+    fn next(&mut self) -> Option<Piece<'input>> {
+        if let Some((Range { start, end }, idx, ch)) = self.peek() {
             match ch {
                 '{' => {
                     self.input_vec_index += 1;
-                    if let Some(&(_, i, '{')) = self.input_vec.get(self.input_vec_index) {
+                    if let Some((_, i, '{')) = self.peek() {
                         self.input_vec_index += 1;
                         // double open brace escape: "{{"
                         // next state after this is either end-of-input or seen-a-brace
@@ -254,25 +243,21 @@ impl<'a> Iterator for Parser<'a> {
                         // single open brace
                         self.last_open_brace = Some(start..end);
                         let arg = self.argument();
-                        if let Some(close_brace_range) = self.consume_closing_brace(&arg) {
+                        self.ws();
+                        if let Some((close_brace_range, _)) = self.consume_pos('}') {
                             if self.is_source_literal {
                                 self.arg_places.push(start..close_brace_range.end);
                             }
-                        } else if let Some(&(_, _, c)) = self.input_vec.get(self.input_vec_index) {
-                            match c {
-                                '?' => self.suggest_format_debug(),
-                                '<' | '^' | '>' => self.suggest_format_align(c),
-                                _ => {
-                                    self.suggest_positional_arg_instead_of_captured_arg(arg.clone())
-                                }
-                            }
+                        } else {
+                            self.missing_closing_brace(&arg);
                         }
+
                         Some(Piece::NextArgument(Box::new(arg)))
                     }
                 }
                 '}' => {
                     self.input_vec_index += 1;
-                    if let Some(&(_, i, '}')) = self.input_vec.get(self.input_vec_index) {
+                    if let Some((_, i, '}')) = self.peek() {
                         self.input_vec_index += 1;
                         // double close brace escape: "}}"
                         // next state after this is either end-of-input or start
@@ -307,14 +292,14 @@ impl<'a> Iterator for Parser<'a> {
     }
 }
 
-impl<'a> Parser<'a> {
+impl<'input> Parser<'input> {
     /// Creates a new parser for the given unescaped input string and
     /// optional code snippet (the input as written before being unescaped),
     /// where `style` is `Some(nr_hashes)` when the snippet is a raw string with that many hashes.
     /// If the input comes via `println` or `panic`, then it has a newline already appended,
     /// which is reflected in the `appended_newline` parameter.
     pub fn new(
-        input: &'a str,
+        input: &'input str,
         style: Option<usize>,
         snippet: Option<String>,
         appended_newline: bool,
@@ -406,6 +391,16 @@ impl<'a> Parser<'a> {
         }
     }
 
+    /// Peeks at the current position, without incrementing the pointer.
+    pub fn peek(&self) -> Option<(Range<usize>, usize, char)> {
+        self.input_vec.get(self.input_vec_index).cloned()
+    }
+
+    /// Peeks at the current position + 1, without incrementing the pointer.
+    pub fn peek_ahead(&self) -> Option<(Range<usize>, usize, char)> {
+        self.input_vec.get(self.input_vec_index + 1).cloned()
+    }
+
     /// Optionally consumes the specified character. If the character is not at
     /// the current position, then the current iterator isn't moved and `false` is
     /// returned, otherwise the character is consumed and `true` is returned.
@@ -418,27 +413,19 @@ impl<'a> Parser<'a> {
     /// returned, otherwise the character is consumed and the current position is
     /// returned.
     fn consume_pos(&mut self, ch: char) -> Option<(Range<usize>, usize)> {
-        if let Some((r, i, c)) = self.input_vec.get(self.input_vec_index) {
-            if ch == *c {
-                self.input_vec_index += 1;
-                return Some((r.clone(), *i));
-            }
+        if let Some((r, i, c)) = self.peek()
+            && ch == c
+        {
+            self.input_vec_index += 1;
+            return Some((r, i));
         }
+
         None
     }
 
-    /// Forces consumption of the specified character. If the character is not
-    /// found, an error is emitted.
-    fn consume_closing_brace(&mut self, arg: &Argument<'_>) -> Option<Range<usize>> {
-        self.ws();
-
-        let (range, description) = if let Some((r, _, c)) = self.input_vec.get(self.input_vec_index)
-        {
-            if *c == '}' {
-                self.input_vec_index += 1;
-                return Some(r.clone());
-            }
-            // or r.clone()?
+    /// Called if a closing brace was not found.
+    fn missing_closing_brace(&mut self, arg: &Argument<'_>) {
+        let (range, description) = if let Some((r, _, c)) = self.peek() {
             (r.start..r.start, format!("expected `}}`, found `{}`", c.escape_debug()))
         } else {
             (
@@ -471,7 +458,13 @@ impl<'a> Parser<'a> {
             suggestion: Suggestion::None,
         });
 
-        None
+        if let Some((_, _, c)) = self.peek() {
+            match c {
+                '?' => self.suggest_format_debug(),
+                '<' | '^' | '>' => self.suggest_format_align(c),
+                _ => self.suggest_positional_arg_instead_of_captured_arg(arg),
+            }
+        }
     }
 
     /// Consumes all whitespace characters until the first non-whitespace character
@@ -483,11 +476,11 @@ impl<'a> Parser<'a> {
 
     /// Parses all of a string which is to be considered a "raw literal" in a
     /// format string. This is everything outside of the braces.
-    fn string(&mut self, start: usize) -> &'a str {
-        while let Some((r, i, c)) = self.input_vec.get(self.input_vec_index) {
+    fn string(&mut self, start: usize) -> &'input str {
+        while let Some((r, i, c)) = self.peek() {
             match c {
                 '{' | '}' => {
-                    return &self.input[start..*i];
+                    return &self.input[start..i];
                 }
                 '\n' if self.is_source_literal => {
                     self.input_vec_index += 1;
@@ -507,7 +500,7 @@ impl<'a> Parser<'a> {
     }
 
     /// Parses an `Argument` structure, or what's contained within braces inside the format string.
-    fn argument(&mut self) -> Argument<'a> {
+    fn argument(&mut self) -> Argument<'input> {
         let start_idx = self.input_vec_index;
 
         let position = self.position();
@@ -518,6 +511,7 @@ impl<'a> Parser<'a> {
         let format = match self.mode {
             ParseMode::Format => self.format(),
             ParseMode::InlineAsm => self.inline_asm(),
+            ParseMode::Diagnostic => self.diagnostic(),
         };
 
         // Resolve position after parsing format spec.
@@ -536,31 +530,27 @@ impl<'a> Parser<'a> {
     /// integer index of an argument, a named argument, or a blank string.
     /// Returns `Some(parsed_position)` if the position is not implicitly
     /// consuming a macro argument, `None` if it's the case.
-    fn position(&mut self) -> Option<Position<'a>> {
+    fn position(&mut self) -> Option<Position<'input>> {
         if let Some(i) = self.integer() {
             Some(ArgumentIs(i.into()))
         } else {
-            match self.input_vec.get(self.input_vec_index) {
-                Some((range, _, c)) if rustc_lexer::is_id_start(*c) => {
+            match self.peek() {
+                Some((range, _, c)) if rustc_lexer::is_id_start(c) => {
                     let start = range.start;
                     let word = self.word();
 
                     // Recover from `r#ident` in format strings.
-                    // FIXME: use a let chain
-                    if word == "r" {
-                        if let Some((r, _, '#')) = self.input_vec.get(self.input_vec_index) {
-                            if self
-                                .input_vec
-                                .get(self.input_vec_index + 1)
-                                .is_some_and(|(_, _, c)| rustc_lexer::is_id_start(*c))
-                            {
-                                self.input_vec_index += 1;
-                                let prefix_end = r.end;
-                                let word = self.word();
-                                let prefix_span = start..prefix_end;
-                                let full_span =
-                                    start..self.input_vec_index2range(self.input_vec_index).start;
-                                self.errors.insert(0, ParseError {
+                    if word == "r"
+                        && let Some((r, _, '#')) = self.peek()
+                        && self.peek_ahead().is_some_and(|(_, _, c)| rustc_lexer::is_id_start(c))
+                    {
+                        self.input_vec_index += 1;
+                        let prefix_end = r.end;
+                        let word = self.word();
+                        let prefix_span = start..prefix_end;
+                        let full_span =
+                            start..self.input_vec_index2range(self.input_vec_index).start;
+                        self.errors.insert(0, ParseError {
                                     description: "raw identifiers are not supported".to_owned(),
                                     note: Some("identifiers in format strings can be keywords and don't need to be prefixed with `r#`".to_string()),
                                     label: "raw identifier used here".to_owned(),
@@ -568,9 +558,7 @@ impl<'a> Parser<'a> {
                                     secondary_label: None,
                                     suggestion: Suggestion::RemoveRawIdent(prefix_span),
                                 });
-                                return Some(ArgumentNamed(word));
-                            }
-                        }
+                        return Some(ArgumentNamed(word));
                     }
 
                     Some(ArgumentNamed(word))
@@ -584,7 +572,7 @@ impl<'a> Parser<'a> {
     }
 
     fn input_vec_index2pos(&self, index: usize) -> usize {
-        if let Some(&(_, pos, _)) = self.input_vec.get(index) { pos } else { self.input.len() }
+        if let Some((_, pos, _)) = self.input_vec.get(index) { *pos } else { self.input.len() }
     }
 
     fn input_vec_index2range(&self, index: usize) -> Range<usize> {
@@ -597,33 +585,18 @@ impl<'a> Parser<'a> {
 
     /// Parses a format specifier at the current position, returning all of the
     /// relevant information in the `FormatSpec` struct.
-    fn format(&mut self) -> FormatSpec<'a> {
-        let mut spec = FormatSpec {
-            fill: None,
-            fill_span: None,
-            align: AlignUnknown,
-            sign: None,
-            alternate: false,
-            zero_pad: false,
-            debug_hex: None,
-            precision: CountImplied,
-            precision_span: None,
-            width: CountImplied,
-            width_span: None,
-            ty: &self.input[..0],
-            ty_span: None,
-        };
+    fn format(&mut self) -> FormatSpec<'input> {
+        let mut spec = FormatSpec::default();
+
         if !self.consume(':') {
             return spec;
         }
 
         // fill character
-        if let Some(&(ref r, _, c)) = self.input_vec.get(self.input_vec_index) {
-            if let Some((_, _, '>' | '<' | '^')) = self.input_vec.get(self.input_vec_index + 1) {
-                self.input_vec_index += 1;
-                spec.fill = Some(c);
-                spec.fill_span = Some(r.clone());
-            }
+        if let (Some((r, _, c)), Some((_, _, '>' | '<' | '^'))) = (self.peek(), self.peek_ahead()) {
+            self.input_vec_index += 1;
+            spec.fill = Some(c);
+            spec.fill_span = Some(r);
         }
         // Alignment
         if self.consume('<') {
@@ -701,24 +674,21 @@ impl<'a> Parser<'a> {
             }
         } else if let Some((range, _)) = self.consume_pos('?') {
             spec.ty = "?";
-            if let Some((r, _, c)) = self.input_vec.get(self.input_vec_index) {
-                match c {
-                    '#' | 'x' | 'X' => self.errors.insert(
-                        0,
-                        ParseError {
-                            description: format!("expected `}}`, found `{c}`"),
-                            note: None,
-                            label: "expected `'}'`".into(),
-                            span: r.clone(),
-                            secondary_label: None,
-                            suggestion: Suggestion::ReorderFormatParameter(
-                                range.start..r.end,
-                                format!("{c}?"),
-                            ),
-                        },
-                    ),
-                    _ => (),
-                }
+            if let Some((r, _, c @ ('#' | 'x' | 'X'))) = self.peek() {
+                self.errors.insert(
+                    0,
+                    ParseError {
+                        description: format!("expected `}}`, found `{c}`"),
+                        note: None,
+                        label: "expected `'}'`".into(),
+                        span: r.clone(),
+                        secondary_label: None,
+                        suggestion: Suggestion::ReorderFormatParameter(
+                            range.start..r.end,
+                            format!("{c}?"),
+                        ),
+                    },
+                );
             }
         } else {
             spec.ty = self.word();
@@ -733,22 +703,9 @@ impl<'a> Parser<'a> {
 
     /// Parses an inline assembly template modifier at the current position, returning the modifier
     /// in the `ty` field of the `FormatSpec` struct.
-    fn inline_asm(&mut self) -> FormatSpec<'a> {
-        let mut spec = FormatSpec {
-            fill: None,
-            fill_span: None,
-            align: AlignUnknown,
-            sign: None,
-            alternate: false,
-            zero_pad: false,
-            debug_hex: None,
-            precision: CountImplied,
-            precision_span: None,
-            width: CountImplied,
-            width_span: None,
-            ty: &self.input[..0],
-            ty_span: None,
-        };
+    fn inline_asm(&mut self) -> FormatSpec<'input> {
+        let mut spec = FormatSpec::default();
+
         if !self.consume(':') {
             return spec;
         }
@@ -764,10 +721,26 @@ impl<'a> Parser<'a> {
         spec
     }
 
+    /// Always returns an empty `FormatSpec`
+    fn diagnostic(&mut self) -> FormatSpec<'input> {
+        let mut spec = FormatSpec::default();
+
+        let Some((Range { start, .. }, start_idx)) = self.consume_pos(':') else {
+            return spec;
+        };
+
+        spec.ty = self.string(start_idx);
+        spec.ty_span = {
+            let end = self.input_vec_index2range(self.input_vec_index).start;
+            Some(start..end)
+        };
+        spec
+    }
+
     /// Parses a `Count` parameter at the current position. This does not check
     /// for 'CountIsNextParam' because that is only used in precision, not
     /// width.
-    fn count(&mut self) -> Count<'a> {
+    fn count(&mut self) -> Count<'input> {
         if let Some(i) = self.integer() {
             if self.consume('$') { CountIsParam(i.into()) } else { CountIs(i) }
         } else {
@@ -786,10 +759,10 @@ impl<'a> Parser<'a> {
 
     /// Parses a word starting at the current position. A word is the same as a
     /// Rust identifier, except that it can't start with `_` character.
-    fn word(&mut self) -> &'a str {
+    fn word(&mut self) -> &'input str {
         let index = self.input_vec_index;
-        match self.input_vec.get(self.input_vec_index) {
-            Some(&(ref r, i, c)) if rustc_lexer::is_id_start(c) => {
+        match self.peek() {
+            Some((ref r, i, c)) if rustc_lexer::is_id_start(c) => {
                 self.input_vec_index += 1;
                 (r.start, i)
             }
@@ -798,7 +771,7 @@ impl<'a> Parser<'a> {
             }
         };
         let (err_end, end): (usize, usize) = loop {
-            if let Some(&(ref r, i, c)) = self.input_vec.get(self.input_vec_index) {
+            if let Some((ref r, i, c)) = self.peek() {
                 if rustc_lexer::is_id_continue(c) {
                     self.input_vec_index += 1;
                 } else {
@@ -828,7 +801,7 @@ impl<'a> Parser<'a> {
         let mut found = false;
         let mut overflow = false;
         let start_index = self.input_vec_index;
-        while let Some(&(_, _, c)) = self.input_vec.get(self.input_vec_index) {
+        while let Some((_, _, c)) = self.peek() {
             if let Some(i) = c.to_digit(10) {
                 self.input_vec_index += 1;
                 let (tmp, mul_overflow) = cur.overflowing_mul(10);
@@ -897,7 +870,7 @@ impl<'a> Parser<'a> {
         }
     }
 
-    fn suggest_positional_arg_instead_of_captured_arg(&mut self, arg: Argument<'a>) {
+    fn suggest_positional_arg_instead_of_captured_arg(&mut self, arg: &Argument<'_>) {
         // If the argument is not an identifier, it is not a field access.
         if !arg.is_identifier() {
             return;
diff --git a/compiler/rustc_parse_format/src/tests.rs b/compiler/rustc_parse_format/src/tests.rs
index e6a7f24034a..a6c7e1890ab 100644
--- a/compiler/rustc_parse_format/src/tests.rs
+++ b/compiler/rustc_parse_format/src/tests.rs
@@ -553,3 +553,45 @@ fn asm_concat() {
     assert_eq!(parser.by_ref().collect::<Vec<Piece<'static>>>(), &[Lit(asm)]);
     assert_eq!(parser.line_spans, &[]);
 }
+
+#[test]
+fn diagnostic_format_flags() {
+    let lit = "{thing:blah}";
+    let mut parser = Parser::new(lit, None, None, false, ParseMode::Diagnostic);
+    assert!(!parser.is_source_literal);
+
+    let [NextArgument(arg)] = &*parser.by_ref().collect::<Vec<Piece<'static>>>() else { panic!() };
+
+    assert_eq!(
+        **arg,
+        Argument {
+            position: ArgumentNamed("thing"),
+            position_span: 2..7,
+            format: FormatSpec { ty: ":blah", ty_span: Some(7..12), ..Default::default() },
+        }
+    );
+
+    assert_eq!(parser.line_spans, &[]);
+    assert!(parser.errors.is_empty());
+}
+
+#[test]
+fn diagnostic_format_mod() {
+    let lit = "{thing:+}";
+    let mut parser = Parser::new(lit, None, None, false, ParseMode::Diagnostic);
+    assert!(!parser.is_source_literal);
+
+    let [NextArgument(arg)] = &*parser.by_ref().collect::<Vec<Piece<'static>>>() else { panic!() };
+
+    assert_eq!(
+        **arg,
+        Argument {
+            position: ArgumentNamed("thing"),
+            position_span: 2..7,
+            format: FormatSpec { ty: ":+", ty_span: Some(7..9), ..Default::default() },
+        }
+    );
+
+    assert_eq!(parser.line_spans, &[]);
+    assert!(parser.errors.is_empty());
+}
diff --git a/compiler/rustc_passes/messages.ftl b/compiler/rustc_passes/messages.ftl
index a4ef065ea2c..7c237d708c0 100644
--- a/compiler/rustc_passes/messages.ftl
+++ b/compiler/rustc_passes/messages.ftl
@@ -290,6 +290,9 @@ passes_duplicate_lang_item_crate_depends =
     .first_definition_path = first definition in `{$orig_crate_name}` loaded from {$orig_path}
     .second_definition_path = second definition in `{$crate_name}` loaded from {$path}
 
+passes_enum_variant_same_name =
+    it is impossible to refer to the {$descr} `{$dead_name}` because it is shadowed by this enum variant with the same name
+
 passes_export_name =
     attribute should be applied to a free function, impl method or static
     .label = not a free function, impl method or static
@@ -716,6 +719,9 @@ passes_unknown_external_lang_item =
 passes_unknown_feature =
     unknown feature `{$feature}`
 
+passes_unknown_feature_alias =
+    feature `{$alias}` has been renamed to `{$feature}`
+
 passes_unknown_lang_item =
     definition of an unknown lang item: `{$name}`
     .label = definition of unknown lang item `{$name}`
diff --git a/compiler/rustc_passes/src/check_attr.rs b/compiler/rustc_passes/src/check_attr.rs
index 4e2be8ff0b8..5ce803aa1f8 100644
--- a/compiler/rustc_passes/src/check_attr.rs
+++ b/compiler/rustc_passes/src/check_attr.rs
@@ -10,7 +10,7 @@ use std::collections::hash_map::Entry;
 
 use rustc_abi::{Align, ExternAbi, Size};
 use rustc_ast::{AttrStyle, LitKind, MetaItemInner, MetaItemKind, MetaItemLit, ast};
-use rustc_attr_data_structures::{AttributeKind, ReprAttr, find_attr};
+use rustc_attr_data_structures::{AttributeKind, InlineAttr, ReprAttr, find_attr};
 use rustc_data_structures::fx::FxHashMap;
 use rustc_errors::{Applicability, DiagCtxtHandle, IntoDiagArg, MultiSpan, StashKey};
 use rustc_feature::{AttributeDuplicates, AttributeType, BUILTIN_ATTRIBUTE_MAP, BuiltinAttribute};
@@ -124,6 +124,10 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                     AttributeKind::Stability { span, .. }
                     | AttributeKind::ConstStability { span, .. },
                 ) => self.check_stability_promotable(*span, target),
+                Attribute::Parsed(AttributeKind::Inline(InlineAttr::Force { .. }, ..)) => {} // handled separately below
+                Attribute::Parsed(AttributeKind::Inline(kind, attr_span)) => {
+                    self.check_inline(hir_id, *attr_span, span, kind, target)
+                }
                 Attribute::Parsed(AttributeKind::AllowInternalUnstable(syms)) => self
                     .check_allow_internal_unstable(
                         hir_id,
@@ -147,6 +151,9 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                     | AttributeKind::ConstStabilityIndirect
                     | AttributeKind::MacroTransparency(_),
                 ) => { /* do nothing  */ }
+                Attribute::Parsed(AttributeKind::AsPtr(attr_span)) => {
+                    self.check_applied_to_fn_or_method(hir_id, *attr_span, span, target)
+                }
                 Attribute::Unparsed(_) => {
                     match attr.path().as_slice() {
                         [sym::diagnostic, sym::do_not_recommend, ..] => {
@@ -155,7 +162,6 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                         [sym::diagnostic, sym::on_unimplemented, ..] => {
                             self.check_diagnostic_on_unimplemented(attr.span(), hir_id, target)
                         }
-                        [sym::inline, ..] => self.check_inline(hir_id, attr, span, target),
                         [sym::coverage, ..] => self.check_coverage(attr, span, target),
                         [sym::optimize, ..] => self.check_optimize(hir_id, attr, span, target),
                         [sym::no_sanitize, ..] => {
@@ -188,26 +194,23 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                             self.check_rustc_std_internal_symbol(attr, span, target)
                         }
                         [sym::naked, ..] => self.check_naked(hir_id, attr, span, target, attrs),
-                        [sym::rustc_as_ptr, ..] => {
-                            self.check_applied_to_fn_or_method(hir_id, attr, span, target)
-                        }
                         [sym::rustc_no_implicit_autorefs, ..] => {
-                            self.check_applied_to_fn_or_method(hir_id, attr, span, target)
+                            self.check_applied_to_fn_or_method(hir_id, attr.span(), span, target)
                         }
                         [sym::rustc_never_returns_null_ptr, ..] => {
-                            self.check_applied_to_fn_or_method(hir_id, attr, span, target)
+                            self.check_applied_to_fn_or_method(hir_id, attr.span(), span, target)
                         }
                         [sym::rustc_legacy_const_generics, ..] => {
                             self.check_rustc_legacy_const_generics(hir_id, attr, span, target, item)
                         }
                         [sym::rustc_lint_query_instability, ..] => {
-                            self.check_applied_to_fn_or_method(hir_id, attr, span, target)
+                            self.check_applied_to_fn_or_method(hir_id, attr.span(), span, target)
                         }
                         [sym::rustc_lint_untracked_query_information, ..] => {
-                            self.check_applied_to_fn_or_method(hir_id, attr, span, target)
+                            self.check_applied_to_fn_or_method(hir_id, attr.span(), span, target)
                         }
                         [sym::rustc_lint_diagnostics, ..] => {
-                            self.check_applied_to_fn_or_method(hir_id, attr, span, target)
+                            self.check_applied_to_fn_or_method(hir_id, attr.span(), span, target)
                         }
                         [sym::rustc_lint_opt_ty, ..] => self.check_rustc_lint_opt_ty(attr, span, target),
                         [sym::rustc_lint_opt_deny_field_access, ..] => {
@@ -367,11 +370,11 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
         self.check_rustc_force_inline(hir_id, attrs, span, target);
     }
 
-    fn inline_attr_str_error_with_macro_def(&self, hir_id: HirId, attr: &Attribute, sym: &str) {
+    fn inline_attr_str_error_with_macro_def(&self, hir_id: HirId, attr_span: Span, sym: &str) {
         self.tcx.emit_node_span_lint(
             UNUSED_ATTRIBUTES,
             hir_id,
-            attr.span(),
+            attr_span,
             errors::IgnoredAttrWithMacro { sym },
         );
     }
@@ -431,7 +434,14 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
     }
 
     /// Checks if an `#[inline]` is applied to a function or a closure.
-    fn check_inline(&self, hir_id: HirId, attr: &Attribute, span: Span, target: Target) {
+    fn check_inline(
+        &self,
+        hir_id: HirId,
+        attr_span: Span,
+        defn_span: Span,
+        kind: &InlineAttr,
+        target: Target,
+    ) {
         match target {
             Target::Fn
             | Target::Closure
@@ -440,7 +450,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                 self.tcx.emit_node_span_lint(
                     UNUSED_ATTRIBUTES,
                     hir_id,
-                    attr.span(),
+                    attr_span,
                     errors::IgnoredInlineAttrFnProto,
                 )
             }
@@ -451,25 +461,22 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             Target::AssocConst => self.tcx.emit_node_span_lint(
                 UNUSED_ATTRIBUTES,
                 hir_id,
-                attr.span(),
+                attr_span,
                 errors::IgnoredInlineAttrConstants,
             ),
             // FIXME(#80564): Same for fields, arms, and macro defs
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "inline")
+                self.inline_attr_str_error_with_macro_def(hir_id, attr_span, "inline")
             }
             _ => {
-                self.dcx().emit_err(errors::InlineNotFnOrClosure {
-                    attr_span: attr.span(),
-                    defn_span: span,
-                });
+                self.dcx().emit_err(errors::InlineNotFnOrClosure { attr_span, defn_span });
             }
         }
 
         // `#[inline]` is ignored if the symbol must be codegened upstream because it's exported.
         if let Some(did) = hir_id.as_owner()
             && self.tcx.def_kind(did).has_codegen_attrs()
-            && !matches!(attr.meta_item_list().as_deref(), Some([item]) if item.has_name(sym::never))
+            && kind != &InlineAttr::Never
         {
             let attrs = self.tcx.codegen_fn_attrs(did);
             // Not checking naked as `#[inline]` is forbidden for naked functions anyways.
@@ -477,7 +484,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                 self.tcx.emit_node_span_lint(
                     UNUSED_ATTRIBUTES,
                     hir_id,
-                    attr.span(),
+                    attr_span,
                     errors::InlineIgnoredForExported {},
                 );
             }
@@ -676,6 +683,16 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                         ) => {
                             continue;
                         }
+                        Attribute::Parsed(AttributeKind::Inline(.., span)) => {
+                            self.dcx().emit_err(errors::NakedFunctionIncompatibleAttribute {
+                                span: *span,
+                                naked_span: attr.span(),
+                                attr: sym::inline.to_string(),
+                            });
+
+                            return;
+                        }
+                        // FIXME(jdonszelmann): make exhaustive
                         _ => {}
                     }
 
@@ -787,7 +804,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
                 for attr in attrs {
-                    self.inline_attr_str_error_with_macro_def(hir_id, attr, "track_caller");
+                    self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "track_caller");
                 }
             }
             _ => {
@@ -830,7 +847,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "non_exhaustive");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "non_exhaustive");
             }
             _ => {
                 self.dcx().emit_err(errors::NonExhaustiveWrongLocation {
@@ -850,7 +867,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "marker");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "marker");
             }
             _ => {
                 self.dcx().emit_err(errors::AttrShouldBeAppliedToTrait {
@@ -904,7 +921,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "target_feature");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "target_feature");
             }
             _ => {
                 self.dcx().emit_err(errors::AttrShouldBeAppliedToFn {
@@ -1619,7 +1636,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "cold");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "cold");
             }
             _ => {
                 // FIXME: #[cold] was previously allowed on non-functions and some crates used
@@ -1661,7 +1678,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "link_name");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "link_name");
             }
             _ => {
                 // FIXME: #[cold] was previously allowed on non-functions/statics and some crates
@@ -1695,7 +1712,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "no_link");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "no_link");
             }
             _ => {
                 self.dcx().emit_err(errors::NoLink { attr_span: attr.span(), span });
@@ -1717,7 +1734,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "export_name");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "export_name");
             }
             _ => {
                 self.dcx().emit_err(errors::ExportName { attr_span: attr.span(), span });
@@ -1825,15 +1842,15 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
     fn check_applied_to_fn_or_method(
         &self,
         hir_id: HirId,
-        attr: &Attribute,
-        span: Span,
+        attr_span: Span,
+        defn_span: Span,
         target: Target,
     ) {
         let is_function = matches!(target, Target::Fn | Target::Method(..));
         if !is_function {
             self.dcx().emit_err(errors::AttrShouldBeAppliedToFn {
-                attr_span: attr.span(),
-                defn_span: span,
+                attr_span,
+                defn_span,
                 on_crate: hir_id == CRATE_HIR_ID,
             });
         }
@@ -1891,7 +1908,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "link_section");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "link_section");
             }
             _ => {
                 // FIXME: #[link_section] was previously allowed on non-functions/statics and some
@@ -1916,7 +1933,7 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
             Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "no_mangle");
+                self.inline_attr_str_error_with_macro_def(hir_id, attr.span(), "no_mangle");
             }
             // FIXME: #[no_mangle] was previously allowed on non-functions/statics, this should be an error
             // The error should specify that the item that is wrong is specifically a *foreign* fn/static
@@ -2263,9 +2280,12 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
             // `#[allow_internal_unstable]` attribute with just a lint, because we previously
             // erroneously allowed it and some crates used it accidentally, to be compatible
             // with crates depending on them, we can't throw an error here.
-            Target::Field | Target::Arm | Target::MacroDef => {
-                self.inline_attr_str_error_with_macro_def(hir_id, attr, "allow_internal_unstable")
-            }
+            Target::Field | Target::Arm | Target::MacroDef => self
+                .inline_attr_str_error_with_macro_def(
+                    hir_id,
+                    attr.span(),
+                    "allow_internal_unstable",
+                ),
             _ => {
                 self.tcx
                     .dcx()
@@ -2638,8 +2658,10 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
         span: Span,
         target: Target,
     ) {
-        let force_inline_attr = attrs.iter().find(|attr| attr.has_name(sym::rustc_force_inline));
-        match (target, force_inline_attr) {
+        match (
+            target,
+            find_attr!(attrs, AttributeKind::Inline(InlineAttr::Force { attr_span, .. }, _) => *attr_span),
+        ) {
             (Target::Closure, None) => {
                 let is_coro = matches!(
                     self.tcx.hir_expect_expr(hir_id).kind,
@@ -2651,20 +2673,19 @@ impl<'tcx> CheckAttrVisitor<'tcx> {
                 );
                 let parent_did = self.tcx.hir_get_parent_item(hir_id).to_def_id();
                 let parent_span = self.tcx.def_span(parent_did);
-                let parent_force_inline_attr =
-                    self.tcx.get_attr(parent_did, sym::rustc_force_inline);
-                if let Some(attr) = parent_force_inline_attr
-                    && is_coro
+
+                if let Some(attr_span) = find_attr!(
+                    self.tcx.get_all_attrs(parent_did),
+                    AttributeKind::Inline(InlineAttr::Force { attr_span, .. }, _) => *attr_span
+                ) && is_coro
                 {
-                    self.dcx().emit_err(errors::RustcForceInlineCoro {
-                        attr_span: attr.span(),
-                        span: parent_span,
-                    });
+                    self.dcx()
+                        .emit_err(errors::RustcForceInlineCoro { attr_span, span: parent_span });
                 }
             }
             (Target::Fn, _) => (),
-            (_, Some(attr)) => {
-                self.dcx().emit_err(errors::RustcForceInline { attr_span: attr.span(), span });
+            (_, Some(attr_span)) => {
+                self.dcx().emit_err(errors::RustcForceInline { attr_span, span });
             }
             (_, None) => (),
         }
@@ -2885,10 +2906,9 @@ fn check_invalid_crate_level_attr(tcx: TyCtxt<'_>, attrs: &[Attribute]) {
 fn check_non_exported_macro_for_invalid_attrs(tcx: TyCtxt<'_>, item: &Item<'_>) {
     let attrs = tcx.hir_attrs(item.hir_id());
 
-    for attr in attrs {
-        if attr.has_name(sym::inline) {
-            tcx.dcx().emit_err(errors::NonExportedMacroInvalidAttrs { attr_span: attr.span() });
-        }
+    if let Some(attr_span) = find_attr!(attrs, AttributeKind::Inline(i, span) if !matches!(i, InlineAttr::Force{..}) => *span)
+    {
+        tcx.dcx().emit_err(errors::NonExportedMacroInvalidAttrs { attr_span });
     }
 }
 
@@ -2908,6 +2928,7 @@ pub(crate) fn provide(providers: &mut Providers) {
     *providers = Providers { check_mod_attrs, ..*providers };
 }
 
+// FIXME(jdonszelmann): remove, check during parsing
 fn check_duplicates(
     tcx: TyCtxt<'_>,
     attr: &Attribute,
diff --git a/compiler/rustc_passes/src/check_export.rs b/compiler/rustc_passes/src/check_export.rs
index b9a3849f32f..f8f489d7d06 100644
--- a/compiler/rustc_passes/src/check_export.rs
+++ b/compiler/rustc_passes/src/check_export.rs
@@ -53,11 +53,11 @@ impl<'tcx> ExportableItemCollector<'tcx> {
         let is_pub = visibilities.is_directly_public(def_id);
 
         if has_attr && !is_pub {
-            let vis = visibilities.effective_vis(def_id).cloned().unwrap_or(
+            let vis = visibilities.effective_vis(def_id).cloned().unwrap_or_else(|| {
                 EffectiveVisibility::from_vis(Visibility::Restricted(
                     self.tcx.parent_module_from_def_id(def_id).to_local_def_id(),
-                )),
-            );
+                ))
+            });
             let vis = vis.at_level(Level::Direct);
             let span = self.tcx.def_span(def_id);
 
diff --git a/compiler/rustc_passes/src/dead.rs b/compiler/rustc_passes/src/dead.rs
index e597c819a3a..4257d8e8d16 100644
--- a/compiler/rustc_passes/src/dead.rs
+++ b/compiler/rustc_passes/src/dead.rs
@@ -14,7 +14,7 @@ use rustc_errors::MultiSpan;
 use rustc_hir::def::{CtorOf, DefKind, Res};
 use rustc_hir::def_id::{DefId, LocalDefId, LocalModDefId};
 use rustc_hir::intravisit::{self, Visitor};
-use rustc_hir::{self as hir, Node, PatKind, QPath, TyKind};
+use rustc_hir::{self as hir, ImplItem, ImplItemKind, Node, PatKind, QPath, TyKind};
 use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 use rustc_middle::middle::privacy::Level;
 use rustc_middle::query::Providers;
@@ -936,7 +936,9 @@ enum ShouldWarnAboutField {
 
 #[derive(Debug, Copy, Clone, PartialEq, Eq)]
 enum ReportOn {
+    /// Report on something that hasn't got a proper name to refer to
     TupleField,
+    /// Report on something that has got a name, which could be a field but also a method
     NamedField,
 }
 
@@ -1061,6 +1063,31 @@ impl<'tcx> DeadVisitor<'tcx> {
                 None
             };
 
+        let enum_variants_with_same_name = dead_codes
+            .iter()
+            .filter_map(|dead_item| {
+                if let Node::ImplItem(ImplItem {
+                    kind: ImplItemKind::Fn(..) | ImplItemKind::Const(..),
+                    ..
+                }) = tcx.hir_node_by_def_id(dead_item.def_id)
+                    && let Some(impl_did) = tcx.opt_parent(dead_item.def_id.to_def_id())
+                    && let DefKind::Impl { of_trait: false } = tcx.def_kind(impl_did)
+                    && let ty::Adt(maybe_enum, _) = tcx.type_of(impl_did).skip_binder().kind()
+                    && maybe_enum.is_enum()
+                    && let Some(variant) =
+                        maybe_enum.variants().iter().find(|i| i.name == dead_item.name)
+                {
+                    Some(crate::errors::EnumVariantSameName {
+                        descr: tcx.def_descr(dead_item.def_id.to_def_id()),
+                        dead_name: dead_item.name,
+                        variant_span: tcx.def_span(variant.def_id),
+                    })
+                } else {
+                    None
+                }
+            })
+            .collect();
+
         let diag = match report_on {
             ReportOn::TupleField => {
                 let tuple_fields = if let Some(parent_id) = parent_item
@@ -1114,6 +1141,7 @@ impl<'tcx> DeadVisitor<'tcx> {
                 name_list,
                 parent_info,
                 ignored_derived_impls,
+                enum_variants_with_same_name,
             },
         };
 
diff --git a/compiler/rustc_passes/src/diagnostic_items.rs b/compiler/rustc_passes/src/diagnostic_items.rs
index 17a729f422a..8f572af02c2 100644
--- a/compiler/rustc_passes/src/diagnostic_items.rs
+++ b/compiler/rustc_passes/src/diagnostic_items.rs
@@ -10,7 +10,7 @@
 //! * Compiler internal types like `Ty` and `TyCtxt`
 
 use rustc_hir::diagnostic_items::DiagnosticItems;
-use rustc_hir::{Attribute, OwnerId};
+use rustc_hir::{Attribute, CRATE_OWNER_ID, OwnerId};
 use rustc_middle::query::{LocalCrate, Providers};
 use rustc_middle::ty::TyCtxt;
 use rustc_span::def_id::{DefId, LOCAL_CRATE};
@@ -67,7 +67,7 @@ fn diagnostic_items(tcx: TyCtxt<'_>, _: LocalCrate) -> DiagnosticItems {
 
     // Collect diagnostic items in this crate.
     let crate_items = tcx.hir_crate_items(());
-    for id in crate_items.owners() {
+    for id in crate_items.owners().chain(std::iter::once(CRATE_OWNER_ID)) {
         observe_item(tcx, &mut diagnostic_items, id);
     }
 
diff --git a/compiler/rustc_passes/src/errors.rs b/compiler/rustc_passes/src/errors.rs
index 74ce92624bd..f0d4b610f63 100644
--- a/compiler/rustc_passes/src/errors.rs
+++ b/compiler/rustc_passes/src/errors.rs
@@ -1435,6 +1435,15 @@ pub(crate) struct UnknownFeature {
 }
 
 #[derive(Diagnostic)]
+#[diag(passes_unknown_feature_alias, code = E0635)]
+pub(crate) struct RenamedFeature {
+    #[primary_span]
+    pub span: Span,
+    pub feature: Symbol,
+    pub alias: Symbol,
+}
+
+#[derive(Diagnostic)]
 #[diag(passes_implied_feature_not_exist)]
 pub(crate) struct ImpliedFeatureNotExist {
     #[primary_span]
@@ -1478,6 +1487,9 @@ pub(crate) enum MultipleDeadCodes<'tcx> {
         participle: &'tcx str,
         name_list: DiagSymbolList,
         #[subdiagnostic]
+        // only on DeadCodes since it's never a problem for tuple struct fields
+        enum_variants_with_same_name: Vec<EnumVariantSameName<'tcx>>,
+        #[subdiagnostic]
         parent_info: Option<ParentInfo<'tcx>>,
         #[subdiagnostic]
         ignored_derived_impls: Option<IgnoredDerivedImpls>,
@@ -1499,6 +1511,15 @@ pub(crate) enum MultipleDeadCodes<'tcx> {
 }
 
 #[derive(Subdiagnostic)]
+#[note(passes_enum_variant_same_name)]
+pub(crate) struct EnumVariantSameName<'tcx> {
+    #[primary_span]
+    pub variant_span: Span,
+    pub dead_name: Symbol,
+    pub descr: &'tcx str,
+}
+
+#[derive(Subdiagnostic)]
 #[label(passes_parent_info)]
 pub(crate) struct ParentInfo<'tcx> {
     pub num: usize,
diff --git a/compiler/rustc_passes/src/input_stats.rs b/compiler/rustc_passes/src/input_stats.rs
index 6852153a2e7..46e6c0bf7da 100644
--- a/compiler/rustc_passes/src/input_stats.rs
+++ b/compiler/rustc_passes/src/input_stats.rs
@@ -5,7 +5,7 @@
 use rustc_ast::visit::BoundKind;
 use rustc_ast::{self as ast, NodeId, visit as ast_visit};
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
-use rustc_data_structures::thousands::format_with_underscores;
+use rustc_data_structures::thousands::usize_with_underscores;
 use rustc_hir::{self as hir, AmbigArg, HirId, intravisit as hir_visit};
 use rustc_middle::ty::TyCtxt;
 use rustc_span::Span;
@@ -140,10 +140,10 @@ impl<'k> StatCollector<'k> {
                 "{} {:<18}{:>10} ({:4.1}%){:>14}{:>14}",
                 prefix,
                 label,
-                format_with_underscores(size),
+                usize_with_underscores(size),
                 percent(size, total_size),
-                format_with_underscores(node.stats.count),
-                format_with_underscores(node.stats.size)
+                usize_with_underscores(node.stats.count),
+                usize_with_underscores(node.stats.size)
             );
             if !node.subnodes.is_empty() {
                 // We will soon sort, so the initial order does not matter.
@@ -159,9 +159,9 @@ impl<'k> StatCollector<'k> {
                         "{} - {:<18}{:>10} ({:4.1}%){:>14}",
                         prefix,
                         label,
-                        format_with_underscores(size),
+                        usize_with_underscores(size),
                         percent(size, total_size),
-                        format_with_underscores(subnode.count),
+                        usize_with_underscores(subnode.count),
                     );
                 }
             }
@@ -171,8 +171,8 @@ impl<'k> StatCollector<'k> {
             "{} {:<18}{:>10}        {:>14}",
             prefix,
             "Total",
-            format_with_underscores(total_size),
-            format_with_underscores(total_count),
+            usize_with_underscores(total_size),
+            usize_with_underscores(total_count),
         );
         eprintln!("{prefix}");
     }
diff --git a/compiler/rustc_passes/src/lib_features.rs b/compiler/rustc_passes/src/lib_features.rs
index b3e6ee9512c..127e0df1332 100644
--- a/compiler/rustc_passes/src/lib_features.rs
+++ b/compiler/rustc_passes/src/lib_features.rs
@@ -40,7 +40,7 @@ impl<'tcx> LibFeatureCollector<'tcx> {
         };
 
         let feature_stability = match level {
-            StabilityLevel::Unstable { .. } => FeatureStability::Unstable,
+            StabilityLevel::Unstable { old_name, .. } => FeatureStability::Unstable { old_name },
             StabilityLevel::Stable { since, .. } => FeatureStability::AcceptedSince(match since {
                 StableSince::Version(v) => Symbol::intern(&v.to_string()),
                 StableSince::Current => sym::env_CFG_RELEASE,
@@ -71,7 +71,7 @@ impl<'tcx> LibFeatureCollector<'tcx> {
                     });
                 }
             }
-            (FeatureStability::AcceptedSince(_), Some((FeatureStability::Unstable, _))) => {
+            (FeatureStability::AcceptedSince(_), Some((FeatureStability::Unstable { .. }, _))) => {
                 self.tcx.dcx().emit_err(FeaturePreviouslyDeclared {
                     span,
                     feature,
@@ -79,7 +79,7 @@ impl<'tcx> LibFeatureCollector<'tcx> {
                     prev_declared: "unstable",
                 });
             }
-            (FeatureStability::Unstable, Some((FeatureStability::AcceptedSince(_), _))) => {
+            (FeatureStability::Unstable { .. }, Some((FeatureStability::AcceptedSince(_), _))) => {
                 self.tcx.dcx().emit_err(FeaturePreviouslyDeclared {
                     span,
                     feature,
@@ -88,7 +88,7 @@ impl<'tcx> LibFeatureCollector<'tcx> {
                 });
             }
             // duplicate `unstable` feature is ok.
-            (FeatureStability::Unstable, Some((FeatureStability::Unstable, _))) => {}
+            (FeatureStability::Unstable { .. }, Some((FeatureStability::Unstable { .. }, _))) => {}
         }
     }
 }
diff --git a/compiler/rustc_passes/src/stability.rs b/compiler/rustc_passes/src/stability.rs
index 45e26c8999a..56d9f5bf785 100644
--- a/compiler/rustc_passes/src/stability.rs
+++ b/compiler/rustc_passes/src/stability.rs
@@ -718,6 +718,7 @@ fn stability_index(tcx: TyCtxt<'_>, (): ()) -> Index {
                     issue: NonZero::new(27812),
                     is_soft: false,
                     implied_by: None,
+                    old_name: None,
                 },
                 feature: sym::rustc_private,
             };
@@ -1161,8 +1162,8 @@ pub fn check_unused_or_stable_features(tcx: TyCtxt<'_>) {
         defined_features: &LibFeatures,
         all_implications: &UnordMap<Symbol, Symbol>,
     ) {
-        for (feature, since) in defined_features.to_sorted_vec() {
-            if let FeatureStability::AcceptedSince(since) = since
+        for (feature, stability) in defined_features.to_sorted_vec() {
+            if let FeatureStability::AcceptedSince(since) = stability
                 && let Some(span) = remaining_lib_features.get(&feature)
             {
                 // Warn if the user has enabled an already-stable lib feature.
@@ -1181,6 +1182,12 @@ pub fn check_unused_or_stable_features(tcx: TyCtxt<'_>) {
             // implications from this crate.
             remaining_implications.remove(&feature);
 
+            if let FeatureStability::Unstable { old_name: Some(alias) } = stability {
+                if let Some(span) = remaining_lib_features.swap_remove(&alias) {
+                    tcx.dcx().emit_err(errors::RenamedFeature { span, feature, alias });
+                }
+            }
+
             if remaining_lib_features.is_empty() && remaining_implications.is_empty() {
                 break;
             }
diff --git a/compiler/rustc_query_system/src/ich/hcx.rs b/compiler/rustc_query_system/src/ich/hcx.rs
index e1b6adc6cc1..96d0c02c4a6 100644
--- a/compiler/rustc_query_system/src/ich/hcx.rs
+++ b/compiler/rustc_query_system/src/ich/hcx.rs
@@ -1,5 +1,3 @@
-use std::sync::Arc;
-
 use rustc_ast as ast;
 use rustc_data_structures::stable_hasher::{HashStable, HashingControls, StableHasher};
 use rustc_hir::def_id::{DefId, LocalDefId};
@@ -7,7 +5,9 @@ use rustc_hir::definitions::DefPathHash;
 use rustc_session::Session;
 use rustc_session::cstore::Untracked;
 use rustc_span::source_map::SourceMap;
-use rustc_span::{BytePos, CachingSourceMapView, DUMMY_SP, SourceFile, Span, SpanData, Symbol};
+use rustc_span::{
+    BytePos, CachingSourceMapView, DUMMY_SP, Span, SpanData, StableSourceFileId, Symbol,
+};
 
 use crate::ich;
 
@@ -118,7 +118,7 @@ impl<'a> rustc_span::HashStableContext for StableHashingContext<'a> {
     fn span_data_to_lines_and_cols(
         &mut self,
         span: &SpanData,
-    ) -> Option<(Arc<SourceFile>, usize, BytePos, usize, BytePos)> {
+    ) -> Option<(StableSourceFileId, usize, BytePos, usize, BytePos)> {
         self.source_map().span_data_to_lines_and_cols(span)
     }
 
diff --git a/compiler/rustc_resolve/messages.ftl b/compiler/rustc_resolve/messages.ftl
index 38cdfa72a14..58942474e32 100644
--- a/compiler/rustc_resolve/messages.ftl
+++ b/compiler/rustc_resolve/messages.ftl
@@ -119,7 +119,7 @@ resolve_const_param_in_enum_discriminant =
     const parameters may not be used in enum discriminant values
 
 resolve_const_param_in_non_trivial_anon_const =
-    const parameters may only be used as standalone arguments, i.e. `{$name}`
+    const parameters may only be used as standalone arguments here, i.e. `{$name}`
 
 resolve_constructor_private_if_any_field_private =
     a constructor is private if any of the fields is private
diff --git a/compiler/rustc_resolve/src/build_reduced_graph.rs b/compiler/rustc_resolve/src/build_reduced_graph.rs
index c30ed781f35..650a827ba56 100644
--- a/compiler/rustc_resolve/src/build_reduced_graph.rs
+++ b/compiler/rustc_resolve/src/build_reduced_graph.rs
@@ -1098,22 +1098,20 @@ impl<'a, 'ra, 'tcx> BuildReducedGraphVisitor<'a, 'ra, 'tcx> {
             self.r.potentially_unused_imports.push(import);
             module.for_each_child(self, |this, ident, ns, binding| {
                 if ns == MacroNS {
-                    let imported_binding =
-                        if this.r.is_accessible_from(binding.vis, this.parent_scope.module) {
-                            this.r.import(binding, import)
-                        } else if !this.r.is_builtin_macro(binding.res())
-                            && !this.r.macro_use_prelude.contains_key(&ident.name)
-                        {
-                            // - `!r.is_builtin_macro(res)` excluding the built-in macros such as `Debug` or `Hash`.
-                            // - `!r.macro_use_prelude.contains_key(name)` excluding macros defined in other extern
-                            //    crates such as `std`.
-                            // FIXME: This branch should eventually be removed.
-                            let import = macro_use_import(this, span, true);
-                            this.r.import(binding, import)
-                        } else {
+                    let import = if this.r.is_accessible_from(binding.vis, this.parent_scope.module)
+                    {
+                        import
+                    } else {
+                        // FIXME: This branch is used for reporting the `private_macro_use` lint
+                        // and should eventually be removed.
+                        if this.r.macro_use_prelude.contains_key(&ident.name) {
+                            // Do not override already existing entries with compatibility entries.
                             return;
-                        };
-                    this.add_macro_use_binding(ident.name, imported_binding, span, allow_shadowing);
+                        }
+                        macro_use_import(this, span, true)
+                    };
+                    let import_binding = this.r.import(binding, import);
+                    this.add_macro_use_binding(ident.name, import_binding, span, allow_shadowing);
                 }
             });
         } else {
diff --git a/compiler/rustc_resolve/src/def_collector.rs b/compiler/rustc_resolve/src/def_collector.rs
index dc16fe212b1..f8e0a6936a0 100644
--- a/compiler/rustc_resolve/src/def_collector.rs
+++ b/compiler/rustc_resolve/src/def_collector.rs
@@ -128,7 +128,7 @@ impl<'a, 'ra, 'tcx> visit::Visitor<'a> for DefCollector<'a, 'ra, 'tcx> {
                 // FIXME(jdonszelmann) make one of these in the resolver?
                 // FIXME(jdonszelmann) don't care about tools here maybe? Just parse what we can.
                 // Does that prevents errors from happening? maybe
-                let parser = AttributeParser::new(
+                let mut parser = AttributeParser::new_early(
                     &self.resolver.tcx.sess,
                     self.resolver.tcx.features(),
                     Vec::new(),
@@ -136,8 +136,14 @@ impl<'a, 'ra, 'tcx> visit::Visitor<'a> for DefCollector<'a, 'ra, 'tcx> {
                 let attrs = parser.parse_attribute_list(
                     &i.attrs,
                     i.span,
+                    i.id,
                     OmitDoc::Skip,
                     std::convert::identity,
+                    |_l| {
+                        // FIXME(jdonszelmann): emit lints here properly
+                        // NOTE that before new attribute parsing, they didn't happen either
+                        // but it would be nice if we could change that.
+                    },
                 );
 
                 let macro_data =
diff --git a/compiler/rustc_resolve/src/diagnostics.rs b/compiler/rustc_resolve/src/diagnostics.rs
index 201b1c0a493..9149974a617 100644
--- a/compiler/rustc_resolve/src/diagnostics.rs
+++ b/compiler/rustc_resolve/src/diagnostics.rs
@@ -7,7 +7,7 @@ use rustc_ast::{
 use rustc_ast_pretty::pprust;
 use rustc_attr_data_structures::{self as attr, Stability};
 use rustc_data_structures::fx::{FxHashMap, FxHashSet};
-use rustc_data_structures::unord::UnordSet;
+use rustc_data_structures::unord::{UnordMap, UnordSet};
 use rustc_errors::codes::*;
 use rustc_errors::{
     Applicability, Diag, DiagCtxtHandle, ErrorGuaranteed, MultiSpan, SuggestionStyle,
@@ -1054,6 +1054,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
                                 false,
                                 false,
                                 None,
+                                None,
                             ) else {
                                 continue;
                             };
@@ -1482,7 +1483,35 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         parent_scope: &ParentScope<'ra>,
         ident: Ident,
         krate: &Crate,
+        sugg_span: Option<Span>,
     ) {
+        // Bring imported but unused `derive` macros into `macro_map` so we ensure they can be used
+        // for suggestions.
+        self.visit_scopes(
+            ScopeSet::Macro(MacroKind::Derive),
+            &parent_scope,
+            ident.span.ctxt(),
+            |this, scope, _use_prelude, _ctxt| {
+                let Scope::Module(m, _) = scope else {
+                    return None;
+                };
+                for (_, resolution) in this.resolutions(m).borrow().iter() {
+                    let Some(binding) = resolution.borrow().binding else {
+                        continue;
+                    };
+                    let Res::Def(DefKind::Macro(MacroKind::Derive | MacroKind::Attr), def_id) =
+                        binding.res()
+                    else {
+                        continue;
+                    };
+                    // By doing this all *imported* macros get added to the `macro_map` even if they
+                    // are *unused*, which makes the later suggestions find them and work.
+                    let _ = this.get_macro_by_def_id(def_id);
+                }
+                None::<()>
+            },
+        );
+
         let is_expected = &|res: Res| res.macro_kind() == Some(macro_kind);
         let suggestion = self.early_lookup_typo_candidate(
             ScopeSet::Macro(macro_kind),
@@ -1490,7 +1519,9 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
             ident,
             is_expected,
         );
-        self.add_typo_suggestion(err, suggestion, ident.span);
+        if !self.add_typo_suggestion(err, suggestion, ident.span) {
+            self.detect_derive_attribute(err, ident, parent_scope, sugg_span);
+        }
 
         let import_suggestions =
             self.lookup_import_candidates(ident, Namespace::MacroNS, parent_scope, is_expected);
@@ -1623,6 +1654,105 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         }
     }
 
+    /// Given an attribute macro that failed to be resolved, look for `derive` macros that could
+    /// provide it, either as-is or with small typos.
+    fn detect_derive_attribute(
+        &self,
+        err: &mut Diag<'_>,
+        ident: Ident,
+        parent_scope: &ParentScope<'ra>,
+        sugg_span: Option<Span>,
+    ) {
+        // Find all of the `derive`s in scope and collect their corresponding declared
+        // attributes.
+        // FIXME: this only works if the crate that owns the macro that has the helper_attr
+        // has already been imported.
+        let mut derives = vec![];
+        let mut all_attrs: UnordMap<Symbol, Vec<_>> = UnordMap::default();
+        // We're collecting these in a hashmap, and handle ordering the output further down.
+        #[allow(rustc::potential_query_instability)]
+        for (def_id, data) in &self.macro_map {
+            for helper_attr in &data.ext.helper_attrs {
+                let item_name = self.tcx.item_name(*def_id);
+                all_attrs.entry(*helper_attr).or_default().push(item_name);
+                if helper_attr == &ident.name {
+                    derives.push(item_name);
+                }
+            }
+        }
+        let kind = MacroKind::Derive.descr();
+        if !derives.is_empty() {
+            // We found an exact match for the missing attribute in a `derive` macro. Suggest it.
+            let mut derives: Vec<String> = derives.into_iter().map(|d| d.to_string()).collect();
+            derives.sort();
+            derives.dedup();
+            let msg = match &derives[..] {
+                [derive] => format!(" `{derive}`"),
+                [start @ .., last] => format!(
+                    "s {} and `{last}`",
+                    start.iter().map(|d| format!("`{d}`")).collect::<Vec<_>>().join(", ")
+                ),
+                [] => unreachable!("we checked for this to be non-empty 10 lines above!?"),
+            };
+            let msg = format!(
+                "`{}` is an attribute that can be used by the {kind}{msg}, you might be \
+                     missing a `derive` attribute",
+                ident.name,
+            );
+            let sugg_span = if let ModuleKind::Def(DefKind::Enum, id, _) = parent_scope.module.kind
+            {
+                let span = self.def_span(id);
+                if span.from_expansion() {
+                    None
+                } else {
+                    // For enum variants sugg_span is empty but we can get the enum's Span.
+                    Some(span.shrink_to_lo())
+                }
+            } else {
+                // For items this `Span` will be populated, everything else it'll be None.
+                sugg_span
+            };
+            match sugg_span {
+                Some(span) => {
+                    err.span_suggestion_verbose(
+                        span,
+                        msg,
+                        format!("#[derive({})]\n", derives.join(", ")),
+                        Applicability::MaybeIncorrect,
+                    );
+                }
+                None => {
+                    err.note(msg);
+                }
+            }
+        } else {
+            // We didn't find an exact match. Look for close matches. If any, suggest fixing typo.
+            let all_attr_names = all_attrs.keys().map(|s| *s).into_sorted_stable_ord();
+            if let Some(best_match) = find_best_match_for_name(&all_attr_names, ident.name, None)
+                && let Some(macros) = all_attrs.get(&best_match)
+            {
+                let mut macros: Vec<String> = macros.into_iter().map(|d| d.to_string()).collect();
+                macros.sort();
+                macros.dedup();
+                let msg = match &macros[..] {
+                    [] => return,
+                    [name] => format!(" `{name}` accepts"),
+                    [start @ .., end] => format!(
+                        "s {} and `{end}` accept",
+                        start.iter().map(|m| format!("`{m}`")).collect::<Vec<_>>().join(", "),
+                    ),
+                };
+                let msg = format!("the {kind}{msg} the similarly named `{best_match}` attribute");
+                err.span_suggestion_verbose(
+                    ident.span,
+                    msg,
+                    best_match,
+                    Applicability::MaybeIncorrect,
+                );
+            }
+        }
+    }
+
     pub(crate) fn add_typo_suggestion(
         &self,
         err: &mut Diag<'_>,
diff --git a/compiler/rustc_resolve/src/ident.rs b/compiler/rustc_resolve/src/ident.rs
index 180d6af219d..68fbe48ebcb 100644
--- a/compiler/rustc_resolve/src/ident.rs
+++ b/compiler/rustc_resolve/src/ident.rs
@@ -460,6 +460,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
                                 true,
                                 force,
                                 ignore_import,
+                                None,
                             ) {
                                 Ok((Some(ext), _)) => {
                                     if ext.helper_attrs.contains(&ident.name) {
diff --git a/compiler/rustc_resolve/src/imports.rs b/compiler/rustc_resolve/src/imports.rs
index 816efd0d5fa..e989209e177 100644
--- a/compiler/rustc_resolve/src/imports.rs
+++ b/compiler/rustc_resolve/src/imports.rs
@@ -133,7 +133,9 @@ impl<'ra> std::fmt::Debug for ImportKind<'ra> {
                 .field("target", target)
                 .field("id", id)
                 .finish(),
-            MacroUse { .. } => f.debug_struct("MacroUse").finish(),
+            MacroUse { warn_private } => {
+                f.debug_struct("MacroUse").field("warn_private", warn_private).finish()
+            }
             MacroExport => f.debug_struct("MacroExport").finish(),
         }
     }
diff --git a/compiler/rustc_resolve/src/late.rs b/compiler/rustc_resolve/src/late.rs
index 3dc285fdab6..338d9edcd22 100644
--- a/compiler/rustc_resolve/src/late.rs
+++ b/compiler/rustc_resolve/src/late.rs
@@ -415,24 +415,24 @@ pub(crate) enum AliasPossibility {
 }
 
 #[derive(Copy, Clone, Debug)]
-pub(crate) enum PathSource<'a, 'c> {
+pub(crate) enum PathSource<'a, 'ast, 'ra> {
     /// Type paths `Path`.
     Type,
     /// Trait paths in bounds or impls.
     Trait(AliasPossibility),
     /// Expression paths `path`, with optional parent context.
-    Expr(Option<&'a Expr>),
+    Expr(Option<&'ast Expr>),
     /// Paths in path patterns `Path`.
     Pat,
     /// Paths in struct expressions and patterns `Path { .. }`.
     Struct,
     /// Paths in tuple struct patterns `Path(..)`.
-    TupleStruct(Span, &'a [Span]),
+    TupleStruct(Span, &'ra [Span]),
     /// `m::A::B` in `<T as m::A>::B::C`.
     ///
     /// Second field holds the "cause" of this one, i.e. the context within
     /// which the trait item is resolved. Used for diagnostics.
-    TraitItem(Namespace, &'c PathSource<'a, 'c>),
+    TraitItem(Namespace, &'a PathSource<'a, 'ast, 'ra>),
     /// Paths in delegation item
     Delegation,
     /// An arg in a `use<'a, N>` precise-capturing bound.
@@ -443,7 +443,7 @@ pub(crate) enum PathSource<'a, 'c> {
     DefineOpaques,
 }
 
-impl<'a> PathSource<'a, '_> {
+impl PathSource<'_, '_, '_> {
     fn namespace(self) -> Namespace {
         match self {
             PathSource::Type
@@ -773,7 +773,7 @@ struct LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
 }
 
 /// Walks the whole crate in DFS order, visiting each item, resolving names as it goes.
-impl<'ra: 'ast, 'ast, 'tcx> Visitor<'ast> for LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
+impl<'ast, 'ra, 'tcx> Visitor<'ast> for LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn visit_attribute(&mut self, _: &'ast Attribute) {
         // We do not want to resolve expressions that appear in attributes,
         // as they do not correspond to actual code.
@@ -1462,7 +1462,7 @@ impl<'ra: 'ast, 'ast, 'tcx> Visitor<'ast> for LateResolutionVisitor<'_, 'ast, 'r
     }
 }
 
-impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
+impl<'a, 'ast, 'ra, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
     fn new(resolver: &'a mut Resolver<'ra, 'tcx>) -> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
         // During late resolution we only track the module component of the parent scope,
         // although it may be useful to track other components as well for diagnostics.
@@ -2010,7 +2010,7 @@ impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
         &mut self,
         partial_res: PartialRes,
         path: &[Segment],
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path_span: Span,
     ) {
         let proj_start = path.len() - partial_res.unresolved_segments();
@@ -4161,7 +4161,7 @@ impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
         id: NodeId,
         qself: &Option<P<QSelf>>,
         path: &Path,
-        source: PathSource<'ast, '_>,
+        source: PathSource<'_, 'ast, '_>,
     ) {
         self.smart_resolve_path_fragment(
             qself,
@@ -4178,7 +4178,7 @@ impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
         &mut self,
         qself: &Option<P<QSelf>>,
         path: &[Segment],
-        source: PathSource<'ast, '_>,
+        source: PathSource<'_, 'ast, '_>,
         finalize: Finalize,
         record_partial_res: RecordPartialRes,
         parent_qself: Option<&QSelf>,
@@ -4482,7 +4482,7 @@ impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
         span: Span,
         defer_to_typeck: bool,
         finalize: Finalize,
-        source: PathSource<'ast, '_>,
+        source: PathSource<'_, 'ast, '_>,
     ) -> Result<Option<PartialRes>, Spanned<ResolutionError<'ra>>> {
         let mut fin_res = None;
 
@@ -4509,7 +4509,7 @@ impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
             let path_seg = |seg: &Segment| PathSegment::from_ident(seg.ident);
             let path = Path { segments: path.iter().map(path_seg).collect(), span, tokens: None };
             if let Ok((_, res)) =
-                self.r.resolve_macro_path(&path, None, &self.parent_scope, false, false, None)
+                self.r.resolve_macro_path(&path, None, &self.parent_scope, false, false, None, None)
             {
                 return Ok(Some(PartialRes::new(res)));
             }
@@ -4525,7 +4525,7 @@ impl<'a, 'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'a, 'ast, 'ra, 'tcx> {
         path: &[Segment],
         ns: Namespace,
         finalize: Finalize,
-        source: PathSource<'ast, '_>,
+        source: PathSource<'_, 'ast, '_>,
     ) -> Result<Option<PartialRes>, Spanned<ResolutionError<'ra>>> {
         debug!(
             "resolve_qpath(qself={:?}, path={:?}, ns={:?}, finalize={:?})",
diff --git a/compiler/rustc_resolve/src/late/diagnostics.rs b/compiler/rustc_resolve/src/late/diagnostics.rs
index 2f6aed35f25..d5dd3bdb6cd 100644
--- a/compiler/rustc_resolve/src/late/diagnostics.rs
+++ b/compiler/rustc_resolve/src/late/diagnostics.rs
@@ -170,12 +170,12 @@ impl TypoCandidate {
     }
 }
 
-impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
+impl<'ast, 'ra, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn make_base_error(
         &mut self,
         path: &[Segment],
         span: Span,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         res: Option<Res>,
     ) -> BaseError {
         // Make the base error.
@@ -421,7 +421,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
         path: &[Segment],
         following_seg: Option<&Segment>,
         span: Span,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         res: Option<Res>,
         qself: Option<&QSelf>,
     ) -> (Diag<'tcx>, Vec<ImportSuggestion>) {
@@ -539,7 +539,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
         path: &[Segment],
         following_seg: Option<&Segment>,
         span: Span,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         res: Option<Res>,
         qself: Option<&QSelf>,
     ) {
@@ -650,7 +650,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn try_lookup_name_relaxed(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         following_seg: Option<&Segment>,
         span: Span,
@@ -940,7 +940,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_trait_and_bounds(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         res: Option<Res>,
         span: Span,
         base_error: &BaseError,
@@ -1017,7 +1017,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_typo(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         following_seg: Option<&Segment>,
         span: Span,
@@ -1063,7 +1063,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_shadowed(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         following_seg: Option<&Segment>,
         span: Span,
@@ -1096,7 +1096,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn err_code_special_cases(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         span: Span,
     ) {
@@ -1141,7 +1141,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_self_ty(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         span: Span,
     ) -> bool {
@@ -1164,7 +1164,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_self_value(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         span: Span,
     ) -> bool {
@@ -1332,7 +1332,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_swapping_misplaced_self_ty_and_trait(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         res: Option<Res>,
         span: Span,
     ) {
@@ -1361,7 +1361,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
         &mut self,
         err: &mut Diag<'_>,
         res: Option<Res>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
     ) {
         let PathSource::TupleStruct(_, _) = source else { return };
         let Some(Res::Def(DefKind::Fn, _)) = res else { return };
@@ -1373,7 +1373,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
         &mut self,
         err: &mut Diag<'_>,
         res: Option<Res>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         span: Span,
     ) {
         let PathSource::Trait(_) = source else { return };
@@ -1422,7 +1422,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_pattern_match_with_let(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         span: Span,
     ) -> bool {
         if let PathSource::Expr(_) = source
@@ -1448,7 +1448,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn get_single_associated_item(
         &mut self,
         path: &[Segment],
-        source: &PathSource<'_, '_>,
+        source: &PathSource<'_, '_, '_>,
         filter_fn: &impl Fn(Res) -> bool,
     ) -> Option<TypoSuggestion> {
         if let crate::PathSource::TraitItem(_, _) = source {
@@ -1556,7 +1556,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
 
     /// Check if the source is call expression and the first argument is `self`. If true,
     /// return the span of whole call and the span for all arguments expect the first one (`self`).
-    fn call_has_self_arg(&self, source: PathSource<'_, '_>) -> Option<(Span, Option<Span>)> {
+    fn call_has_self_arg(&self, source: PathSource<'_, '_, '_>) -> Option<(Span, Option<Span>)> {
         let mut has_self_arg = None;
         if let PathSource::Expr(Some(parent)) = source
             && let ExprKind::Call(_, args) = &parent.kind
@@ -1614,7 +1614,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
         &mut self,
         err: &mut Diag<'_>,
         span: Span,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         path: &[Segment],
         res: Res,
         path_str: &str,
@@ -1666,7 +1666,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
             }
         };
 
-        let find_span = |source: &PathSource<'_, '_>, err: &mut Diag<'_>| {
+        let find_span = |source: &PathSource<'_, '_, '_>, err: &mut Diag<'_>| {
             match source {
                 PathSource::Expr(Some(Expr { span, kind: ExprKind::Call(_, _), .. }))
                 | PathSource::TupleStruct(span, _) => {
@@ -2699,7 +2699,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     fn suggest_using_enum_variant(
         &mut self,
         err: &mut Diag<'_>,
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
         def_id: DefId,
         span: Span,
     ) {
@@ -2877,7 +2877,7 @@ impl<'ast, 'ra: 'ast, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
     pub(crate) fn suggest_adding_generic_parameter(
         &self,
         path: &[Segment],
-        source: PathSource<'_, '_>,
+        source: PathSource<'_, '_, '_>,
     ) -> Option<(Span, &'static str, String, Applicability)> {
         let (ident, span) = match path {
             [segment]
diff --git a/compiler/rustc_resolve/src/lib.rs b/compiler/rustc_resolve/src/lib.rs
index 9ba70abd4d9..f0540725416 100644
--- a/compiler/rustc_resolve/src/lib.rs
+++ b/compiler/rustc_resolve/src/lib.rs
@@ -1139,7 +1139,7 @@ pub struct Resolver<'ra, 'tcx> {
     proc_macro_stubs: FxHashSet<LocalDefId>,
     /// Traces collected during macro resolution and validated when it's complete.
     single_segment_macro_resolutions:
-        Vec<(Ident, MacroKind, ParentScope<'ra>, Option<NameBinding<'ra>>)>,
+        Vec<(Ident, MacroKind, ParentScope<'ra>, Option<NameBinding<'ra>>, Option<Span>)>,
     multi_segment_macro_resolutions:
         Vec<(Vec<Segment>, Span, MacroKind, ParentScope<'ra>, Option<Res>, Namespace)>,
     builtin_attrs: Vec<(Ident, ParentScope<'ra>)>,
@@ -1934,12 +1934,26 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         }
         if let NameBindingKind::Import { import, binding } = used_binding.kind {
             if let ImportKind::MacroUse { warn_private: true } = import.kind {
-                self.lint_buffer().buffer_lint(
-                    PRIVATE_MACRO_USE,
-                    import.root_id,
-                    ident.span,
-                    BuiltinLintDiag::MacroIsPrivate(ident),
-                );
+                // Do not report the lint if the macro name resolves in stdlib prelude
+                // even without the problematic `macro_use` import.
+                let found_in_stdlib_prelude = self.prelude.is_some_and(|prelude| {
+                    self.maybe_resolve_ident_in_module(
+                        ModuleOrUniformRoot::Module(prelude),
+                        ident,
+                        MacroNS,
+                        &ParentScope::module(self.empty_module, self),
+                        None,
+                    )
+                    .is_ok()
+                });
+                if !found_in_stdlib_prelude {
+                    self.lint_buffer().buffer_lint(
+                        PRIVATE_MACRO_USE,
+                        import.root_id,
+                        ident.span,
+                        BuiltinLintDiag::MacroIsPrivate(ident),
+                    );
+                }
             }
             // Avoid marking `extern crate` items that refer to a name from extern prelude,
             // but not introduce it, as used if they are accessed from lexical scope.
diff --git a/compiler/rustc_resolve/src/macros.rs b/compiler/rustc_resolve/src/macros.rs
index ee905065b96..1b82e9c9799 100644
--- a/compiler/rustc_resolve/src/macros.rs
+++ b/compiler/rustc_resolve/src/macros.rs
@@ -12,7 +12,8 @@ use rustc_attr_data_structures::StabilityLevel;
 use rustc_data_structures::intern::Interned;
 use rustc_errors::{Applicability, DiagCtxtHandle, StashKey};
 use rustc_expand::base::{
-    DeriveResolution, Indeterminate, ResolverExpand, SyntaxExtension, SyntaxExtensionKind,
+    Annotatable, DeriveResolution, Indeterminate, ResolverExpand, SyntaxExtension,
+    SyntaxExtensionKind,
 };
 use rustc_expand::compile_declarative_macro;
 use rustc_expand::expand::{
@@ -294,6 +295,14 @@ impl<'ra, 'tcx> ResolverExpand for Resolver<'ra, 'tcx> {
                     && self.tcx.def_kind(mod_def_id) == DefKind::Mod
             })
             .map(|&InvocationParent { parent_def: mod_def_id, .. }| mod_def_id);
+        let sugg_span = match &invoc.kind {
+            InvocationKind::Attr { item: Annotatable::Item(item), .. }
+                if !item.span.from_expansion() =>
+            {
+                Some(item.span.shrink_to_lo())
+            }
+            _ => None,
+        };
         let (ext, res) = self.smart_resolve_macro_path(
             path,
             kind,
@@ -304,6 +313,7 @@ impl<'ra, 'tcx> ResolverExpand for Resolver<'ra, 'tcx> {
             force,
             deleg_impl,
             looks_like_invoc_in_mod_inert_attr,
+            sugg_span,
         )?;
 
         let span = invoc.span();
@@ -386,6 +396,7 @@ impl<'ra, 'tcx> ResolverExpand for Resolver<'ra, 'tcx> {
                         true,
                         force,
                         None,
+                        None,
                     ) {
                         Ok((Some(ext), _)) => {
                             if !ext.helper_attrs.is_empty() {
@@ -528,6 +539,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         force: bool,
         deleg_impl: Option<LocalDefId>,
         invoc_in_mod_inert_attr: Option<LocalDefId>,
+        suggestion_span: Option<Span>,
     ) -> Result<(Arc<SyntaxExtension>, Res), Indeterminate> {
         let (ext, res) = match self.resolve_macro_or_delegation_path(
             path,
@@ -538,6 +550,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
             deleg_impl,
             invoc_in_mod_inert_attr.map(|def_id| (def_id, node_id)),
             None,
+            suggestion_span,
         ) {
             Ok((Some(ext), res)) => (ext, res),
             Ok((None, res)) => (self.dummy_ext(kind), res),
@@ -681,6 +694,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         trace: bool,
         force: bool,
         ignore_import: Option<Import<'ra>>,
+        suggestion_span: Option<Span>,
     ) -> Result<(Option<Arc<SyntaxExtension>>, Res), Determinacy> {
         self.resolve_macro_or_delegation_path(
             path,
@@ -691,6 +705,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
             None,
             None,
             ignore_import,
+            suggestion_span,
         )
     }
 
@@ -704,6 +719,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         deleg_impl: Option<LocalDefId>,
         invoc_in_mod_inert_attr: Option<(LocalDefId, NodeId)>,
         ignore_import: Option<Import<'ra>>,
+        suggestion_span: Option<Span>,
     ) -> Result<(Option<Arc<SyntaxExtension>>, Res), Determinacy> {
         let path_span = ast_path.span;
         let mut path = Segment::from_path(ast_path);
@@ -768,6 +784,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
                     kind,
                     *parent_scope,
                     binding.ok(),
+                    suggestion_span,
                 ));
             }
 
@@ -905,7 +922,7 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
         }
 
         let macro_resolutions = mem::take(&mut self.single_segment_macro_resolutions);
-        for (ident, kind, parent_scope, initial_binding) in macro_resolutions {
+        for (ident, kind, parent_scope, initial_binding, sugg_span) in macro_resolutions {
             match self.early_resolve_ident_in_lexical_scope(
                 ident,
                 ScopeSet::Macro(kind),
@@ -946,7 +963,14 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
                         expected,
                         ident,
                     });
-                    self.unresolved_macro_suggestions(&mut err, kind, &parent_scope, ident, krate);
+                    self.unresolved_macro_suggestions(
+                        &mut err,
+                        kind,
+                        &parent_scope,
+                        ident,
+                        krate,
+                        sugg_span,
+                    );
                     err.emit();
                 }
             }
@@ -974,7 +998,8 @@ impl<'ra, 'tcx> Resolver<'ra, 'tcx> {
     ) {
         let span = path.span;
         if let Some(stability) = &ext.stability {
-            if let StabilityLevel::Unstable { reason, issue, is_soft, implied_by } = stability.level
+            if let StabilityLevel::Unstable { reason, issue, is_soft, implied_by, .. } =
+                stability.level
             {
                 let feature = stability.feature;
 
diff --git a/compiler/rustc_serialize/src/lib.rs b/compiler/rustc_serialize/src/lib.rs
index 34be35e36ac..656ecfcab36 100644
--- a/compiler/rustc_serialize/src/lib.rs
+++ b/compiler/rustc_serialize/src/lib.rs
@@ -3,6 +3,7 @@
 // tidy-alphabetical-start
 #![allow(internal_features)]
 #![allow(rustc::internal)]
+#![cfg_attr(not(bootstrap), feature(sized_hierarchy))]
 #![cfg_attr(test, feature(test))]
 #![doc(
     html_root_url = "https://doc.rust-lang.org/nightly/nightly-rustc/",
@@ -27,3 +28,19 @@ mod serialize;
 pub mod int_overflow;
 pub mod leb128;
 pub mod opaque;
+
+// This has nothing to do with `rustc_serialize` but it is convenient to define it in one place
+// for the rest of the compiler so that `cfg(bootstrap)` doesn't need to be littered throughout
+// the compiler wherever `PointeeSized` would be used. `rustc_serialize` happens to be the deepest
+// crate in the crate graph which uses `PointeeSized`.
+//
+// When bootstrap bumps, remove both the `cfg(not(bootstrap))` and `cfg(bootstrap)` lines below
+// and just import `std::marker::PointeeSized` whereever this item was used.
+
+#[cfg(not(bootstrap))]
+pub use std::marker::PointeeSized;
+
+#[cfg(bootstrap)]
+pub trait PointeeSized {}
+#[cfg(bootstrap)]
+impl<T: ?Sized> PointeeSized for T {}
diff --git a/compiler/rustc_serialize/src/serialize.rs b/compiler/rustc_serialize/src/serialize.rs
index 1eefd76f92b..8940d10696d 100644
--- a/compiler/rustc_serialize/src/serialize.rs
+++ b/compiler/rustc_serialize/src/serialize.rs
@@ -142,7 +142,7 @@ pub trait Decoder {
 ///   `rustc_metadata::rmeta::Lazy`.
 /// * `TyEncodable` should be used for types that are only serialized in crate
 ///   metadata or the incremental cache. This is most types in `rustc_middle`.
-pub trait Encodable<S: Encoder> {
+pub trait Encodable<S: Encoder>: crate::PointeeSized {
     fn encode(&self, s: &mut S);
 }
 
@@ -198,7 +198,7 @@ direct_serialize_impls! {
     char emit_char read_char
 }
 
-impl<S: Encoder, T: ?Sized> Encodable<S> for &T
+impl<S: Encoder, T: ?Sized + crate::PointeeSized> Encodable<S> for &T
 where
     T: Encodable<S>,
 {
diff --git a/compiler/rustc_session/messages.ftl b/compiler/rustc_session/messages.ftl
index 528c52eace7..61953614c77 100644
--- a/compiler/rustc_session/messages.ftl
+++ b/compiler/rustc_session/messages.ftl
@@ -40,6 +40,11 @@ session_file_is_not_writeable = output file {$file} is not writeable -- check it
 
 session_file_write_fail = failed to write `{$path}` due to error `{$err}`
 
+session_forbidden_ctarget_feature =
+    target feature `{$feature}` cannot be {$enabled} with `-Ctarget-feature`: {$reason}
+    .note = this was previously accepted by the compiler but is being phased out; it will become a hard error in a future release!
+session_forbidden_ctarget_feature_issue = for more information, see issue #116344 <https://github.com/rust-lang/rust/issues/116344>
+
 session_function_return_requires_x86_or_x86_64 = `-Zfunction-return` (except `keep`) is only supported on x86 and x86_64
 
 session_function_return_thunk_extern_requires_non_large_code_model = `-Zfunction-return=thunk-extern` is only supported on non-large code models
@@ -132,6 +137,9 @@ session_target_stack_protector_not_supported = `-Z stack-protector={$stack_prote
 session_unleashed_feature_help_named = skipping check for `{$gate}` feature
 session_unleashed_feature_help_unnamed = skipping check that does not even have a feature gate
 
+session_unstable_ctarget_feature =
+    unstable feature specified for `-Ctarget-feature`: `{$feature}`
+    .note = this feature is not stably supported; its behavior can change in the future
 session_unstable_virtual_function_elimination = `-Zvirtual-function-elimination` requires `-Clto`
 
 session_unsupported_crate_type_for_target =
diff --git a/compiler/rustc_session/src/config.rs b/compiler/rustc_session/src/config.rs
index 60e1b465ba9..87e4b0a17aa 100644
--- a/compiler/rustc_session/src/config.rs
+++ b/compiler/rustc_session/src/config.rs
@@ -1364,8 +1364,10 @@ impl Default for Options {
             cli_forced_local_thinlto_off: false,
             remap_path_prefix: Vec::new(),
             real_rust_source_base_dir: None,
+            real_rustc_dev_source_base_dir: None,
             edition: DEFAULT_EDITION,
             json_artifact_notifications: false,
+            json_timings: false,
             json_unused_externs: JsonUnusedExterns::No,
             json_future_incompat: false,
             pretty: None,
@@ -1880,6 +1882,9 @@ pub struct JsonConfig {
     pub json_rendered: HumanReadableErrorType,
     pub json_color: ColorConfig,
     json_artifact_notifications: bool,
+    /// Output start and end timestamps of several high-level compilation sections
+    /// (frontend, backend, linker).
+    json_timings: bool,
     pub json_unused_externs: JsonUnusedExterns,
     json_future_incompat: bool,
 }
@@ -1921,6 +1926,7 @@ pub fn parse_json(early_dcx: &EarlyDiagCtxt, matches: &getopts::Matches) -> Json
     let mut json_artifact_notifications = false;
     let mut json_unused_externs = JsonUnusedExterns::No;
     let mut json_future_incompat = false;
+    let mut json_timings = false;
     for option in matches.opt_strs("json") {
         // For now conservatively forbid `--color` with `--json` since `--json`
         // won't actually be emitting any colors and anything colorized is
@@ -1937,6 +1943,7 @@ pub fn parse_json(early_dcx: &EarlyDiagCtxt, matches: &getopts::Matches) -> Json
                 }
                 "diagnostic-rendered-ansi" => json_color = ColorConfig::Always,
                 "artifacts" => json_artifact_notifications = true,
+                "timings" => json_timings = true,
                 "unused-externs" => json_unused_externs = JsonUnusedExterns::Loud,
                 "unused-externs-silent" => json_unused_externs = JsonUnusedExterns::Silent,
                 "future-incompat" => json_future_incompat = true,
@@ -1949,6 +1956,7 @@ pub fn parse_json(early_dcx: &EarlyDiagCtxt, matches: &getopts::Matches) -> Json
         json_rendered,
         json_color,
         json_artifact_notifications,
+        json_timings,
         json_unused_externs,
         json_future_incompat,
     }
@@ -2476,6 +2484,7 @@ pub fn build_session_options(early_dcx: &mut EarlyDiagCtxt, matches: &getopts::M
         json_rendered,
         json_color,
         json_artifact_notifications,
+        json_timings,
         json_unused_externs,
         json_future_incompat,
     } = parse_json(early_dcx, matches);
@@ -2497,6 +2506,10 @@ pub fn build_session_options(early_dcx: &mut EarlyDiagCtxt, matches: &getopts::M
     let mut unstable_opts = UnstableOptions::build(early_dcx, matches, &mut target_modifiers);
     let (lint_opts, describe_lints, lint_cap) = get_cmd_lint_options(early_dcx, matches);
 
+    if !unstable_opts.unstable_options && json_timings {
+        early_dcx.early_fatal("--json=timings is unstable and requires using `-Zunstable-options`");
+    }
+
     check_error_format_stability(early_dcx, &unstable_opts, error_format);
 
     let output_types = parse_output_types(early_dcx, &unstable_opts, matches);
@@ -2649,6 +2662,15 @@ pub fn build_session_options(early_dcx: &mut EarlyDiagCtxt, matches: &getopts::M
 
     let prints = collect_print_requests(early_dcx, &mut cg, &unstable_opts, matches);
 
+    // -Zretpoline-external-thunk also requires -Zretpoline
+    if unstable_opts.retpoline_external_thunk {
+        unstable_opts.retpoline = true;
+        target_modifiers.insert(
+            OptionsTargetModifiers::UnstableOptions(UnstableOptionsTargetModifiers::retpoline),
+            "true".to_string(),
+        );
+    }
+
     let cg = cg;
 
     let sysroot_opt = matches.opt_str("sysroot").map(|m| PathBuf::from(&m));
@@ -2692,9 +2714,8 @@ pub fn build_session_options(early_dcx: &mut EarlyDiagCtxt, matches: &getopts::M
 
     let sysroot = filesearch::materialize_sysroot(sysroot_opt);
 
-    let real_rust_source_base_dir = {
-        // This is the location used by the `rust-src` `rustup` component.
-        let mut candidate = sysroot.join("lib/rustlib/src/rust");
+    let real_source_base_dir = |suffix: &str, confirm: &str| {
+        let mut candidate = sysroot.join(suffix);
         if let Ok(metadata) = candidate.symlink_metadata() {
             // Replace the symlink bootstrap creates, with its destination.
             // We could try to use `fs::canonicalize` instead, but that might
@@ -2707,9 +2728,17 @@ pub fn build_session_options(early_dcx: &mut EarlyDiagCtxt, matches: &getopts::M
         }
 
         // Only use this directory if it has a file we can expect to always find.
-        candidate.join("library/std/src/lib.rs").is_file().then_some(candidate)
+        candidate.join(confirm).is_file().then_some(candidate)
     };
 
+    let real_rust_source_base_dir =
+        // This is the location used by the `rust-src` `rustup` component.
+        real_source_base_dir("lib/rustlib/src/rust", "library/std/src/lib.rs");
+
+    let real_rustc_dev_source_base_dir =
+        // This is the location used by the `rustc-dev` `rustup` component.
+        real_source_base_dir("lib/rustlib/rustc-src/rust", "compiler/rustc/src/main.rs");
+
     let mut search_paths = vec![];
     for s in &matches.opt_strs("L") {
         search_paths.push(SearchPath::from_cli_opt(
@@ -2763,8 +2792,10 @@ pub fn build_session_options(early_dcx: &mut EarlyDiagCtxt, matches: &getopts::M
         cli_forced_local_thinlto_off: disable_local_thinlto,
         remap_path_prefix,
         real_rust_source_base_dir,
+        real_rustc_dev_source_base_dir,
         edition,
         json_artifact_notifications,
+        json_timings,
         json_unused_externs,
         json_future_incompat,
         pretty,
@@ -3057,7 +3088,7 @@ pub(crate) mod dep_tracking {
     use rustc_target::spec::{
         CodeModel, FramePointer, MergeFunctions, OnBrokenPipe, PanicStrategy, RelocModel,
         RelroLevel, SanitizerSet, SplitDebuginfo, StackProtector, SymbolVisibility, TargetTuple,
-        TlsModel, WasmCAbi,
+        TlsModel,
     };
 
     use super::{
@@ -3109,6 +3140,7 @@ pub(crate) mod dep_tracking {
     }
 
     impl_dep_tracking_hash_via_hash!(
+        (),
         AutoDiff,
         bool,
         usize,
@@ -3168,7 +3200,6 @@ pub(crate) mod dep_tracking {
         Polonius,
         InliningThreshold,
         FunctionReturn,
-        WasmCAbi,
         Align,
     );
 
diff --git a/compiler/rustc_session/src/errors.rs b/compiler/rustc_session/src/errors.rs
index bf95014843d..9c591dcf619 100644
--- a/compiler/rustc_session/src/errors.rs
+++ b/compiler/rustc_session/src/errors.rs
@@ -501,3 +501,20 @@ pub(crate) struct SoftFloatIgnored;
 #[note]
 #[note(session_soft_float_deprecated_issue)]
 pub(crate) struct SoftFloatDeprecated;
+
+#[derive(Diagnostic)]
+#[diag(session_forbidden_ctarget_feature)]
+#[note]
+#[note(session_forbidden_ctarget_feature_issue)]
+pub(crate) struct ForbiddenCTargetFeature<'a> {
+    pub feature: &'a str,
+    pub enabled: &'a str,
+    pub reason: &'a str,
+}
+
+#[derive(Diagnostic)]
+#[diag(session_unstable_ctarget_feature)]
+#[note]
+pub(crate) struct UnstableCTargetFeature<'a> {
+    pub feature: &'a str,
+}
diff --git a/compiler/rustc_session/src/features.rs b/compiler/rustc_session/src/features.rs
new file mode 100644
index 00000000000..70a088a236f
--- /dev/null
+++ b/compiler/rustc_session/src/features.rs
@@ -0,0 +1,59 @@
+use rustc_target::target_features::Stability;
+
+use crate::Session;
+use crate::errors::{ForbiddenCTargetFeature, UnstableCTargetFeature};
+
+pub trait StabilityExt {
+    /// Returns whether the feature may be toggled via `#[target_feature]` or `-Ctarget-feature`.
+    /// Otherwise, some features also may only be enabled by flag (target modifier).
+    /// (It might still be nightly-only even if this returns `true`, so make sure to also check
+    /// `requires_nightly`.)
+    fn is_toggle_permitted(&self, sess: &Session) -> Result<(), &'static str>;
+
+    /// Check that feature is correctly enabled/disabled by command line flag (emits warnings)
+    fn verify_feature_enabled_by_flag(&self, sess: &Session, enable: bool, feature: &str);
+}
+
+impl StabilityExt for Stability {
+    fn is_toggle_permitted(&self, sess: &Session) -> Result<(), &'static str> {
+        match self {
+            Stability::Forbidden { reason } => Err(reason),
+            Stability::TargetModifierOnly { reason, flag } => {
+                if !sess.opts.target_feature_flag_enabled(*flag) { Err(reason) } else { Ok(()) }
+            }
+            _ => Ok(()),
+        }
+    }
+    fn verify_feature_enabled_by_flag(&self, sess: &Session, enable: bool, feature: &str) {
+        if let Err(reason) = self.is_toggle_permitted(sess) {
+            sess.dcx().emit_warn(ForbiddenCTargetFeature {
+                feature,
+                enabled: if enable { "enabled" } else { "disabled" },
+                reason,
+            });
+        } else if self.requires_nightly().is_some() {
+            // An unstable feature. Warn about using it. It makes little sense
+            // to hard-error here since we just warn about fully unknown
+            // features above.
+            sess.dcx().emit_warn(UnstableCTargetFeature { feature });
+        }
+    }
+}
+
+pub fn retpoline_features_by_flags(sess: &Session, features: &mut Vec<&str>) {
+    // -Zretpoline without -Zretpoline-external-thunk enables
+    // retpoline-indirect-branches and retpoline-indirect-calls target features
+    let unstable_opts = &sess.opts.unstable_opts;
+    if unstable_opts.retpoline && !unstable_opts.retpoline_external_thunk {
+        features.push("+retpoline-indirect-branches");
+        features.push("+retpoline-indirect-calls");
+    }
+    // -Zretpoline-external-thunk (maybe, with -Zretpoline too) enables
+    // retpoline-external-thunk, retpoline-indirect-branches and
+    // retpoline-indirect-calls target features
+    if unstable_opts.retpoline_external_thunk {
+        features.push("+retpoline-external-thunk");
+        features.push("+retpoline-indirect-branches");
+        features.push("+retpoline-indirect-calls");
+    }
+}
diff --git a/compiler/rustc_session/src/filesearch.rs b/compiler/rustc_session/src/filesearch.rs
index def2cc97f06..4f8c3926207 100644
--- a/compiler/rustc_session/src/filesearch.rs
+++ b/compiler/rustc_session/src/filesearch.rs
@@ -209,10 +209,9 @@ pub fn get_or_default_sysroot() -> PathBuf {
         //
         // use `parent` twice to chop off the file name and then also the
         // directory containing the dll
-        let dir = dll.parent().and_then(|p| p.parent()).ok_or(format!(
-            "Could not move 2 levels upper using `parent()` on {}",
-            dll.display()
-        ))?;
+        let dir = dll.parent().and_then(|p| p.parent()).ok_or_else(|| {
+            format!("Could not move 2 levels upper using `parent()` on {}", dll.display())
+        })?;
 
         // if `dir` points to target's dir, move up to the sysroot
         let mut sysroot_dir = if dir.ends_with(crate::config::host_tuple()) {
@@ -265,5 +264,6 @@ pub fn get_or_default_sysroot() -> PathBuf {
         rustlib_path.exists().then_some(p)
     }
 
-    from_env_args_next().unwrap_or(default_from_rustc_driver_dll().expect("Failed finding sysroot"))
+    from_env_args_next()
+        .unwrap_or_else(|| default_from_rustc_driver_dll().expect("Failed finding sysroot"))
 }
diff --git a/compiler/rustc_session/src/lib.rs b/compiler/rustc_session/src/lib.rs
index 5e5872ee068..4added19e56 100644
--- a/compiler/rustc_session/src/lib.rs
+++ b/compiler/rustc_session/src/lib.rs
@@ -29,6 +29,7 @@ pub use session::*;
 pub mod output;
 
 pub use getopts;
+pub mod features;
 
 rustc_fluent_macro::fluent_messages! { "../messages.ftl" }
 
diff --git a/compiler/rustc_session/src/options.rs b/compiler/rustc_session/src/options.rs
index 12fa05118ca..31b4237d3b2 100644
--- a/compiler/rustc_session/src/options.rs
+++ b/compiler/rustc_session/src/options.rs
@@ -16,7 +16,7 @@ use rustc_span::{RealFileName, SourceFileHashAlgorithm};
 use rustc_target::spec::{
     CodeModel, FramePointer, LinkerFlavorCli, MergeFunctions, OnBrokenPipe, PanicStrategy,
     RelocModel, RelroLevel, SanitizerSet, SplitDebuginfo, StackProtector, SymbolVisibility,
-    TargetTuple, TlsModel, WasmCAbi,
+    TargetTuple, TlsModel,
 };
 
 use crate::config::*;
@@ -290,6 +290,14 @@ macro_rules! top_level_options {
                 mods.sort_by(|a, b| a.opt.cmp(&b.opt));
                 mods
             }
+
+            pub fn target_feature_flag_enabled(&self, flag: &str) -> bool {
+                match flag {
+                    "retpoline" => self.unstable_opts.retpoline,
+                    "retpoline-external-thunk" => self.unstable_opts.retpoline_external_thunk,
+                    _ => false,
+                }
+            }
         }
     );
 }
@@ -387,21 +395,35 @@ top_level_options!(
 
         /// Remap source path prefixes in all output (messages, object files, debug, etc.).
         remap_path_prefix: Vec<(PathBuf, PathBuf)> [TRACKED_NO_CRATE_HASH],
-        /// Base directory containing the `src/` for the Rust standard library, and
-        /// potentially `rustc` as well, if we can find it. Right now it's always
-        /// `$sysroot/lib/rustlib/src/rust` (i.e. the `rustup` `rust-src` component).
+
+        /// Base directory containing the `library/` directory for the Rust standard library.
+        /// Right now it's always `$sysroot/lib/rustlib/src/rust`
+        /// (i.e. the `rustup` `rust-src` component).
         ///
         /// This directory is what the virtual `/rustc/$hash` is translated back to,
         /// if Rust was built with path remapping to `/rustc/$hash` enabled
         /// (the `rust.remap-debuginfo` option in `bootstrap.toml`).
         real_rust_source_base_dir: Option<PathBuf> [TRACKED_NO_CRATE_HASH],
 
+        /// Base directory containing the `compiler/` directory for the rustc sources.
+        /// Right now it's always `$sysroot/lib/rustlib/rustc-src/rust`
+        /// (i.e. the `rustup` `rustc-dev` component).
+        ///
+        /// This directory is what the virtual `/rustc-dev/$hash` is translated back to,
+        /// if Rust was built with path remapping to `/rustc/$hash` enabled
+        /// (the `rust.remap-debuginfo` option in `bootstrap.toml`).
+        real_rustc_dev_source_base_dir: Option<PathBuf> [TRACKED_NO_CRATE_HASH],
+
         edition: Edition [TRACKED],
 
         /// `true` if we're emitting JSON blobs about each artifact produced
         /// by the compiler.
         json_artifact_notifications: bool [TRACKED],
 
+        /// `true` if we're emitting JSON timings with the start and end of
+        /// high-level compilation sections
+        json_timings: bool [UNTRACKED],
+
         /// `true` if we're emitting a JSON blob containing the unused externs
         json_unused_externs: JsonUnusedExterns [UNTRACKED],
 
@@ -794,7 +816,7 @@ mod desc {
         "either a boolean (`yes`, `no`, `on`, `off`, etc), or a non-negative number";
     pub(crate) const parse_llvm_module_flag: &str = "<key>:<type>:<value>:<behavior>. Type must currently be `u32`. Behavior should be one of (`error`, `warning`, `require`, `override`, `append`, `appendunique`, `max`, `min`)";
     pub(crate) const parse_function_return: &str = "`keep` or `thunk-extern`";
-    pub(crate) const parse_wasm_c_abi: &str = "`legacy` or `spec`";
+    pub(crate) const parse_wasm_c_abi: &str = "`spec`";
     pub(crate) const parse_mir_include_spans: &str =
         "either a boolean (`yes`, `no`, `on`, `off`, etc), or `nll` (default: `nll`)";
     pub(crate) const parse_align: &str = "a number that is a power of 2 between 1 and 2^29";
@@ -1890,14 +1912,8 @@ pub mod parse {
         true
     }
 
-    pub(crate) fn parse_wasm_c_abi(slot: &mut WasmCAbi, v: Option<&str>) -> bool {
-        match v {
-            Some("spec") => *slot = WasmCAbi::Spec,
-            // Explicitly setting the `-Z` flag suppresses the lint.
-            Some("legacy") => *slot = WasmCAbi::Legacy { with_lint: false },
-            _ => return false,
-        }
-        true
+    pub(crate) fn parse_wasm_c_abi(_slot: &mut (), v: Option<&str>) -> bool {
+        v == Some("spec")
     }
 
     pub(crate) fn parse_mir_include_spans(slot: &mut MirIncludeSpans, v: Option<&str>) -> bool {
@@ -2233,6 +2249,8 @@ options! {
         environment variable `RUSTC_GRAPHVIZ_FONT` (default: `Courier, monospace`)"),
     has_thread_local: Option<bool> = (None, parse_opt_bool, [TRACKED],
         "explicitly enable the `cfg(target_thread_local)` directive"),
+    hint_mostly_unused: bool = (false, parse_bool, [TRACKED],
+        "hint that most of this crate will go unused, to minimize work for uncalled functions"),
     human_readable_cgu_names: bool = (false, parse_bool, [TRACKED],
         "generate human-readable, predictable names for codegen units (default: no)"),
     identify_regions: bool = (false, parse_bool, [UNTRACKED],
@@ -2305,6 +2323,8 @@ options! {
         (space separated)"),
     macro_backtrace: bool = (false, parse_bool, [UNTRACKED],
         "show macro backtraces (default: no)"),
+    macro_stats: bool = (false, parse_bool, [UNTRACKED],
+        "print some statistics about macro expansions (default: no)"),
     maximal_hir_to_mir_coverage: bool = (false, parse_bool, [TRACKED],
         "save as much information as possible about the correspondence between MIR and HIR \
         as source scopes (default: no)"),
@@ -2446,6 +2466,11 @@ options! {
     remark_dir: Option<PathBuf> = (None, parse_opt_pathbuf, [UNTRACKED],
         "directory into which to write optimization remarks (if not specified, they will be \
 written to standard error output)"),
+    retpoline: bool = (false, parse_bool, [TRACKED TARGET_MODIFIER],
+        "enables retpoline-indirect-branches and retpoline-indirect-calls target features (default: no)"),
+    retpoline_external_thunk: bool = (false, parse_bool, [TRACKED TARGET_MODIFIER],
+        "enables retpoline-external-thunk, retpoline-indirect-branches and retpoline-indirect-calls \
+        target features (default: no)"),
     sanitizer: SanitizerSet = (SanitizerSet::empty(), parse_sanitizers, [TRACKED],
         "use a sanitizer"),
     sanitizer_cfi_canonical_jump_tables: Option<bool> = (Some(true), parse_opt_bool, [TRACKED],
@@ -2627,8 +2652,11 @@ written to standard error output)"),
         Requires `-Clto[=[fat,yes]]`"),
     wasi_exec_model: Option<WasiExecModel> = (None, parse_wasi_exec_model, [TRACKED],
         "whether to build a wasi command or reactor"),
-    wasm_c_abi: WasmCAbi = (WasmCAbi::Legacy { with_lint: true }, parse_wasm_c_abi, [TRACKED],
-        "use spec-compliant C ABI for `wasm32-unknown-unknown` (default: legacy)"),
+    // This option only still exists to provide a more gradual transition path for people who need
+    // the spec-complaint C ABI to be used.
+    // FIXME remove this after a couple releases
+    wasm_c_abi: () = ((), parse_wasm_c_abi, [TRACKED],
+        "use spec-compliant C ABI for `wasm32-unknown-unknown` (deprecated, always enabled)"),
     write_long_types_to_disk: bool = (true, parse_bool, [UNTRACKED],
         "whether long type names should be written to files instead of being printed in errors"),
     // tidy-alphabetical-end
diff --git a/compiler/rustc_session/src/parse.rs b/compiler/rustc_session/src/parse.rs
index 1fe521bd32d..87c848cf857 100644
--- a/compiler/rustc_session/src/parse.rs
+++ b/compiler/rustc_session/src/parse.rs
@@ -17,7 +17,7 @@ use rustc_feature::{GateIssue, UnstableFeatures, find_feature_issue};
 use rustc_span::edition::Edition;
 use rustc_span::hygiene::ExpnId;
 use rustc_span::source_map::{FilePathMapping, SourceMap};
-use rustc_span::{Span, Symbol};
+use rustc_span::{Span, Symbol, sym};
 
 use crate::Session;
 use crate::config::{Cfg, CheckCfg};
@@ -192,8 +192,11 @@ pub fn add_feature_diagnostics_for_issue<G: EmissionGuarantee>(
         } else {
             err.subdiagnostic(FeatureDiagnosticHelp { feature });
         }
-
-        if sess.opts.unstable_opts.ui_testing {
+        if feature == sym::rustc_attrs {
+            // We're unlikely to stabilize something out of `rustc_attrs`
+            // without at least renaming it, so pointing out how old
+            // the compiler is will do little good.
+        } else if sess.opts.unstable_opts.ui_testing {
             err.subdiagnostic(SuggestUpgradeCompiler::ui_testing());
         } else if let Some(suggestion) = SuggestUpgradeCompiler::new() {
             err.subdiagnostic(suggestion);
diff --git a/compiler/rustc_session/src/session.rs b/compiler/rustc_session/src/session.rs
index 6b85e0abc86..ca42c5a4256 100644
--- a/compiler/rustc_session/src/session.rs
+++ b/compiler/rustc_session/src/session.rs
@@ -18,6 +18,7 @@ use rustc_errors::emitter::{
     DynEmitter, HumanEmitter, HumanReadableErrorType, OutputTheme, stderr_destination,
 };
 use rustc_errors::json::JsonEmitter;
+use rustc_errors::timings::TimingSectionHandler;
 use rustc_errors::{
     Diag, DiagCtxt, DiagCtxtHandle, DiagMessage, Diagnostic, ErrorGuaranteed, FatalAbort,
     FluentBundle, LazyFallbackBundle, TerminalUrl, fallback_fluent_bundle,
@@ -156,6 +157,9 @@ pub struct Session {
     /// Used by `-Z self-profile`.
     pub prof: SelfProfilerRef,
 
+    /// Used to emit section timings events (enabled by `--json=timings`).
+    pub timings: TimingSectionHandler,
+
     /// Data about code being compiled, gathered during compilation.
     pub code_stats: CodeStats,
 
@@ -215,13 +219,6 @@ pub struct Session {
     pub invocation_temp: Option<String>,
 }
 
-#[derive(PartialEq, Eq, PartialOrd, Ord)]
-pub enum MetadataKind {
-    None,
-    Uncompressed,
-    Compressed,
-}
-
 #[derive(Clone, Copy)]
 pub enum CodegenUnits {
     /// Specified by the user. In this case we try fairly hard to produce the
@@ -1133,6 +1130,8 @@ pub fn build_session(
         .as_ref()
         .map(|_| rng().next_u32().to_base_fixed_len(CASE_INSENSITIVE).to_string());
 
+    let timings = TimingSectionHandler::new(sopts.json_timings);
+
     let sess = Session {
         target,
         host,
@@ -1143,6 +1142,7 @@ pub fn build_session(
         io,
         incr_comp_session: RwLock::new(IncrCompSession::NotInitialized),
         prof,
+        timings,
         code_stats: Default::default(),
         lint_store: None,
         driver_lint_caps,
diff --git a/compiler/rustc_smir/src/lib.rs b/compiler/rustc_smir/src/lib.rs
index 771ff98d58d..63623cfad72 100644
--- a/compiler/rustc_smir/src/lib.rs
+++ b/compiler/rustc_smir/src/lib.rs
@@ -9,6 +9,7 @@
 // tidy-alphabetical-start
 #![allow(internal_features)]
 #![allow(rustc::usage_of_ty_tykind)]
+#![cfg_attr(not(bootstrap), feature(sized_hierarchy))]
 #![doc(
     html_root_url = "https://doc.rust-lang.org/nightly/nightly-rustc/",
     test(attr(allow(unused_variables), deny(warnings)))
diff --git a/compiler/rustc_smir/src/rustc_internal/internal.rs b/compiler/rustc_smir/src/rustc_internal/internal.rs
index 6e13b87c41d..a4c6f186222 100644
--- a/compiler/rustc_smir/src/rustc_internal/internal.rs
+++ b/compiler/rustc_smir/src/rustc_internal/internal.rs
@@ -496,6 +496,7 @@ impl RustcInternal for Abi {
             Abi::RustCold => rustc_abi::ExternAbi::RustCold,
             Abi::RiscvInterruptM => rustc_abi::ExternAbi::RiscvInterruptM,
             Abi::RiscvInterruptS => rustc_abi::ExternAbi::RiscvInterruptS,
+            Abi::Custom => rustc_abi::ExternAbi::Custom,
         }
     }
 }
diff --git a/compiler/rustc_smir/src/rustc_smir/context.rs b/compiler/rustc_smir/src/rustc_smir/context.rs
index ef8c88355f6..baa4c0681e8 100644
--- a/compiler/rustc_smir/src/rustc_smir/context.rs
+++ b/compiler/rustc_smir/src/rustc_smir/context.rs
@@ -12,7 +12,8 @@ use rustc_middle::ty::layout::{
 };
 use rustc_middle::ty::print::{with_forced_trimmed_paths, with_no_trimmed_paths};
 use rustc_middle::ty::{
-    GenericPredicates, Instance, List, ScalarInt, TyCtxt, TypeVisitableExt, ValTree,
+    CoroutineArgsExt, GenericPredicates, Instance, List, ScalarInt, TyCtxt, TypeVisitableExt,
+    ValTree,
 };
 use rustc_middle::{mir, ty};
 use rustc_span::def_id::LOCAL_CRATE;
@@ -22,9 +23,9 @@ use stable_mir::mir::mono::{InstanceDef, StaticDef};
 use stable_mir::mir::{BinOp, Body, Place, UnOp};
 use stable_mir::target::{MachineInfo, MachineSize};
 use stable_mir::ty::{
-    AdtDef, AdtKind, Allocation, ClosureDef, ClosureKind, FieldDef, FnDef, ForeignDef,
-    ForeignItemKind, GenericArgs, IntrinsicDef, LineInfo, MirConst, PolyFnSig, RigidTy, Span, Ty,
-    TyConst, TyKind, UintTy, VariantDef,
+    AdtDef, AdtKind, Allocation, ClosureDef, ClosureKind, CoroutineDef, Discr, FieldDef, FnDef,
+    ForeignDef, ForeignItemKind, GenericArgs, IntrinsicDef, LineInfo, MirConst, PolyFnSig, RigidTy,
+    Span, Ty, TyConst, TyKind, UintTy, VariantDef, VariantIdx,
 };
 use stable_mir::{Crate, CrateDef, CrateItem, CrateNum, DefId, Error, Filename, ItemKind, Symbol};
 
@@ -447,6 +448,30 @@ impl<'tcx> SmirCtxt<'tcx> {
         def.internal(&mut *tables, tcx).variants().len()
     }
 
+    /// Discriminant for a given variant index of AdtDef
+    pub fn adt_discr_for_variant(&self, adt: AdtDef, variant: VariantIdx) -> Discr {
+        let mut tables = self.0.borrow_mut();
+        let tcx = tables.tcx;
+        let adt = adt.internal(&mut *tables, tcx);
+        let variant = variant.internal(&mut *tables, tcx);
+        adt.discriminant_for_variant(tcx, variant).stable(&mut *tables)
+    }
+
+    /// Discriminant for a given variand index and args of a coroutine
+    pub fn coroutine_discr_for_variant(
+        &self,
+        coroutine: CoroutineDef,
+        args: &GenericArgs,
+        variant: VariantIdx,
+    ) -> Discr {
+        let mut tables = self.0.borrow_mut();
+        let tcx = tables.tcx;
+        let coroutine = coroutine.def_id().internal(&mut *tables, tcx);
+        let args = args.internal(&mut *tables, tcx);
+        let variant = variant.internal(&mut *tables, tcx);
+        args.as_coroutine().discriminant_for_variant(coroutine, tcx, variant).stable(&mut *tables)
+    }
+
     /// The name of a variant.
     pub fn variant_name(&self, def: VariantDef) -> Symbol {
         let mut tables = self.0.borrow_mut();
diff --git a/compiler/rustc_smir/src/rustc_smir/convert/abi.rs b/compiler/rustc_smir/src/rustc_smir/convert/abi.rs
index 46f1ca61cec..35d5b7fb89a 100644
--- a/compiler/rustc_smir/src/rustc_smir/convert/abi.rs
+++ b/compiler/rustc_smir/src/rustc_smir/convert/abi.rs
@@ -101,6 +101,7 @@ impl<'tcx> Stable<'tcx> for CanonAbi {
             CanonAbi::C => CallConvention::C,
             CanonAbi::Rust => CallConvention::Rust,
             CanonAbi::RustCold => CallConvention::Cold,
+            CanonAbi::Custom => CallConvention::Custom,
             CanonAbi::Arm(arm_call) => match arm_call {
                 ArmCall::Aapcs => CallConvention::ArmAapcs,
                 ArmCall::CCmseNonSecureCall => CallConvention::CCmseNonSecureCall,
diff --git a/compiler/rustc_smir/src/rustc_smir/convert/ty.rs b/compiler/rustc_smir/src/rustc_smir/convert/ty.rs
index b0c9dba78a6..b4239ddd896 100644
--- a/compiler/rustc_smir/src/rustc_smir/convert/ty.rs
+++ b/compiler/rustc_smir/src/rustc_smir/convert/ty.rs
@@ -879,6 +879,7 @@ impl<'tcx> Stable<'tcx> for rustc_abi::ExternAbi {
             ExternAbi::RustCold => Abi::RustCold,
             ExternAbi::RiscvInterruptM => Abi::RiscvInterruptM,
             ExternAbi::RiscvInterruptS => Abi::RiscvInterruptS,
+            ExternAbi::Custom => Abi::Custom,
         }
     }
 }
@@ -959,3 +960,11 @@ impl<'tcx> Stable<'tcx> for ty::ImplTraitInTraitData {
         }
     }
 }
+
+impl<'tcx> Stable<'tcx> for rustc_middle::ty::util::Discr<'tcx> {
+    type T = stable_mir::ty::Discr;
+
+    fn stable(&self, tables: &mut Tables<'_>) -> Self::T {
+        stable_mir::ty::Discr { val: self.val, ty: self.ty.stable(tables) }
+    }
+}
diff --git a/compiler/rustc_smir/src/rustc_smir/mod.rs b/compiler/rustc_smir/src/rustc_smir/mod.rs
index b5003baaf63..64fe181c26d 100644
--- a/compiler/rustc_smir/src/rustc_smir/mod.rs
+++ b/compiler/rustc_smir/src/rustc_smir/mod.rs
@@ -9,6 +9,7 @@
 
 use std::ops::RangeInclusive;
 
+use rustc_data_structures::PointeeSized;
 use rustc_hir::def::DefKind;
 use rustc_middle::mir;
 use rustc_middle::mir::interpret::AllocId;
@@ -158,7 +159,7 @@ pub(crate) fn new_item_kind(kind: DefKind) -> ItemKind {
 }
 
 /// Trait used to convert between an internal MIR type to a Stable MIR type.
-pub trait Stable<'cx> {
+pub trait Stable<'cx>: PointeeSized {
     /// The stable representation of the type implementing Stable.
     type T;
     /// Converts an object to the equivalent Stable MIR representation.
diff --git a/compiler/rustc_smir/src/stable_mir/abi.rs b/compiler/rustc_smir/src/stable_mir/abi.rs
index 347c6ed16a2..d8a2b97662c 100644
--- a/compiler/rustc_smir/src/stable_mir/abi.rs
+++ b/compiler/rustc_smir/src/stable_mir/abi.rs
@@ -430,6 +430,8 @@ pub enum CallConvention {
     PreserveMost,
     PreserveAll,
 
+    Custom,
+
     // Target-specific calling conventions.
     ArmAapcs,
     CCmseNonSecureCall,
diff --git a/compiler/rustc_smir/src/stable_mir/compiler_interface.rs b/compiler/rustc_smir/src/stable_mir/compiler_interface.rs
index 3967ad13eeb..2668fba9f4f 100644
--- a/compiler/rustc_smir/src/stable_mir/compiler_interface.rs
+++ b/compiler/rustc_smir/src/stable_mir/compiler_interface.rs
@@ -13,10 +13,10 @@ use stable_mir::mir::mono::{Instance, InstanceDef, StaticDef};
 use stable_mir::mir::{BinOp, Body, Place, UnOp};
 use stable_mir::target::MachineInfo;
 use stable_mir::ty::{
-    AdtDef, AdtKind, Allocation, ClosureDef, ClosureKind, FieldDef, FnDef, ForeignDef,
-    ForeignItemKind, ForeignModule, ForeignModuleDef, GenericArgs, GenericPredicates, Generics,
-    ImplDef, ImplTrait, IntrinsicDef, LineInfo, MirConst, PolyFnSig, RigidTy, Span, TraitDecl,
-    TraitDef, Ty, TyConst, TyConstId, TyKind, UintTy, VariantDef,
+    AdtDef, AdtKind, Allocation, ClosureDef, ClosureKind, CoroutineDef, Discr, FieldDef, FnDef,
+    ForeignDef, ForeignItemKind, ForeignModule, ForeignModuleDef, GenericArgs, GenericPredicates,
+    Generics, ImplDef, ImplTrait, IntrinsicDef, LineInfo, MirConst, PolyFnSig, RigidTy, Span,
+    TraitDecl, TraitDef, Ty, TyConst, TyConstId, TyKind, UintTy, VariantDef, VariantIdx,
 };
 use stable_mir::{
     AssocItems, Crate, CrateItem, CrateItems, CrateNum, DefId, Error, Filename, ImplTraitDecls,
@@ -230,6 +230,21 @@ impl<'tcx> SmirInterface<'tcx> {
         self.cx.adt_variants_len(def)
     }
 
+    /// Discriminant for a given variant index of AdtDef
+    pub(crate) fn adt_discr_for_variant(&self, adt: AdtDef, variant: VariantIdx) -> Discr {
+        self.cx.adt_discr_for_variant(adt, variant)
+    }
+
+    /// Discriminant for a given variand index and args of a coroutine
+    pub(crate) fn coroutine_discr_for_variant(
+        &self,
+        coroutine: CoroutineDef,
+        args: &GenericArgs,
+        variant: VariantIdx,
+    ) -> Discr {
+        self.cx.coroutine_discr_for_variant(coroutine, args, variant)
+    }
+
     /// The name of a variant.
     pub(crate) fn variant_name(&self, def: VariantDef) -> Symbol {
         self.cx.variant_name(def)
diff --git a/compiler/rustc_smir/src/stable_mir/ty.rs b/compiler/rustc_smir/src/stable_mir/ty.rs
index 4461b4ae125..4415cd6e2e3 100644
--- a/compiler/rustc_smir/src/stable_mir/ty.rs
+++ b/compiler/rustc_smir/src/stable_mir/ty.rs
@@ -743,11 +743,25 @@ crate_def! {
     pub ClosureDef;
 }
 
+impl ClosureDef {
+    /// Retrieves the body of the closure definition. Returns None if the body
+    /// isn't available.
+    pub fn body(&self) -> Option<Body> {
+        with(|ctx| ctx.has_body(self.0).then(|| ctx.mir_body(self.0)))
+    }
+}
+
 crate_def! {
     #[derive(Serialize)]
     pub CoroutineDef;
 }
 
+impl CoroutineDef {
+    pub fn discriminant_for_variant(&self, args: &GenericArgs, idx: VariantIdx) -> Discr {
+        with(|cx| cx.coroutine_discr_for_variant(*self, args, idx))
+    }
+}
+
 crate_def! {
     #[derive(Serialize)]
     pub CoroutineClosureDef;
@@ -823,6 +837,15 @@ impl AdtDef {
     pub fn repr(&self) -> ReprOptions {
         with(|cx| cx.adt_repr(*self))
     }
+
+    pub fn discriminant_for_variant(&self, idx: VariantIdx) -> Discr {
+        with(|cx| cx.adt_discr_for_variant(*self, idx))
+    }
+}
+
+pub struct Discr {
+    pub val: u128,
+    pub ty: Ty,
 }
 
 /// Definition of a variant, which can be either a struct / union field or an enum variant.
@@ -1103,6 +1126,7 @@ pub enum Abi {
     RustCold,
     RiscvInterruptM,
     RiscvInterruptS,
+    Custom,
 }
 
 /// A binder represents a possibly generic type and its bound vars.
diff --git a/compiler/rustc_span/src/caching_source_map_view.rs b/compiler/rustc_span/src/caching_source_map_view.rs
index d8a4cc2f2e2..a887b50ec1e 100644
--- a/compiler/rustc_span/src/caching_source_map_view.rs
+++ b/compiler/rustc_span/src/caching_source_map_view.rs
@@ -2,7 +2,7 @@ use std::ops::Range;
 use std::sync::Arc;
 
 use crate::source_map::SourceMap;
-use crate::{BytePos, Pos, RelativeBytePos, SourceFile, SpanData};
+use crate::{BytePos, Pos, RelativeBytePos, SourceFile, SpanData, StableSourceFileId};
 
 #[derive(Clone)]
 struct CacheEntry {
@@ -114,7 +114,7 @@ impl<'sm> CachingSourceMapView<'sm> {
     pub fn span_data_to_lines_and_cols(
         &mut self,
         span_data: &SpanData,
-    ) -> Option<(Arc<SourceFile>, usize, BytePos, usize, BytePos)> {
+    ) -> Option<(StableSourceFileId, usize, BytePos, usize, BytePos)> {
         self.time_stamp += 1;
 
         // Check if lo and hi are in the cached lines.
@@ -132,7 +132,7 @@ impl<'sm> CachingSourceMapView<'sm> {
                 }
 
                 (
-                    Arc::clone(&lo.file),
+                    lo.file.stable_id,
                     lo.line_number,
                     span_data.lo - lo.line.start,
                     hi.line_number,
@@ -226,7 +226,7 @@ impl<'sm> CachingSourceMapView<'sm> {
         assert_eq!(lo.file_index, hi.file_index);
 
         Some((
-            Arc::clone(&lo.file),
+            lo.file.stable_id,
             lo.line_number,
             span_data.lo - lo.line.start,
             hi.line_number,
diff --git a/compiler/rustc_span/src/hygiene.rs b/compiler/rustc_span/src/hygiene.rs
index b621920d62b..315dedec107 100644
--- a/compiler/rustc_span/src/hygiene.rs
+++ b/compiler/rustc_span/src/hygiene.rs
@@ -1135,7 +1135,7 @@ impl ExpnKind {
 }
 
 /// The kind of macro invocation or definition.
-#[derive(Clone, Copy, PartialEq, Eq, Encodable, Decodable, Hash, Debug)]
+#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Encodable, Decodable, Hash, Debug)]
 #[derive(HashStable_Generic)]
 pub enum MacroKind {
     /// A bang macro `foo!()`.
diff --git a/compiler/rustc_span/src/lib.rs b/compiler/rustc_span/src/lib.rs
index ed74dea5f1e..c8a29a2f68f 100644
--- a/compiler/rustc_span/src/lib.rs
+++ b/compiler/rustc_span/src/lib.rs
@@ -2600,7 +2600,7 @@ pub trait HashStableContext {
     fn span_data_to_lines_and_cols(
         &mut self,
         span: &SpanData,
-    ) -> Option<(Arc<SourceFile>, usize, BytePos, usize, BytePos)>;
+    ) -> Option<(StableSourceFileId, usize, BytePos, usize, BytePos)>;
     fn hashing_controls(&self) -> HashingControls;
 }
 
@@ -2657,7 +2657,7 @@ where
         };
 
         Hash::hash(&TAG_VALID_SPAN, hasher);
-        Hash::hash(&file.stable_id, hasher);
+        Hash::hash(&file, hasher);
 
         // Hash both the length and the end location (line/column) of a span. If we
         // hash only the length, for example, then two otherwise equal spans with
diff --git a/compiler/rustc_span/src/symbol.rs b/compiler/rustc_span/src/symbol.rs
index d66f98871b9..812a254990c 100644
--- a/compiler/rustc_span/src/symbol.rs
+++ b/compiler/rustc_span/src/symbol.rs
@@ -407,6 +407,7 @@ symbols! {
         abi_amdgpu_kernel,
         abi_avr_interrupt,
         abi_c_cmse_nonsecure_call,
+        abi_custom,
         abi_efiapi,
         abi_gpu_kernel,
         abi_msp430_interrupt,
@@ -429,6 +430,8 @@ symbols! {
         aggregate_raw_ptr,
         alias,
         align,
+        align_of,
+        align_of_val,
         alignment,
         all,
         alloc,
@@ -1352,9 +1355,8 @@ symbols! {
         memtag,
         message,
         meta,
+        meta_sized,
         metadata_type,
-        min_align_of,
-        min_align_of_val,
         min_const_fn,
         min_const_generics,
         min_const_unsafe_fn,
@@ -1512,6 +1514,7 @@ symbols! {
         offset_of_nested,
         offset_of_slice,
         ok_or_else,
+        old_name,
         omit_gdb_pretty_printer_section,
         on,
         on_unimplemented,
@@ -1611,6 +1614,7 @@ symbols! {
         plugin_registrar,
         plugins,
         pointee,
+        pointee_sized,
         pointee_trait,
         pointer,
         pointer_like,
@@ -2014,6 +2018,7 @@ symbols! {
         size_of,
         size_of_val,
         sized,
+        sized_hierarchy,
         skip,
         slice,
         slice_from_raw_parts,
@@ -2178,6 +2183,7 @@ symbols! {
         type_changing_struct_update,
         type_const,
         type_id,
+        type_ir,
         type_ir_infer_ctxt_like,
         type_ir_inherent,
         type_ir_interner,
@@ -2288,6 +2294,7 @@ symbols! {
         usize_legacy_fn_max_value,
         usize_legacy_fn_min_value,
         usize_legacy_mod,
+        v1,
         v8plus,
         va_arg,
         va_copy,
@@ -2675,7 +2682,7 @@ impl Interner {
         assert_eq!(
             strings.len(),
             init.len() + extra.len(),
-            "`init` or `extra` contain duplicate symbols",
+            "there are duplicate symbols in the rustc symbol list and the extra symbols added by the driver",
         );
         Interner(Lock::new(InternerInner { arena: Default::default(), strings }))
     }
diff --git a/compiler/rustc_symbol_mangling/src/v0.rs b/compiler/rustc_symbol_mangling/src/v0.rs
index 49a5e20d7cf..1db8ad72b32 100644
--- a/compiler/rustc_symbol_mangling/src/v0.rs
+++ b/compiler/rustc_symbol_mangling/src/v0.rs
@@ -85,10 +85,6 @@ pub fn mangle_internal_symbol<'tcx>(tcx: TyCtxt<'tcx>, item_name: &str) -> Strin
     if item_name == "rust_eh_personality" {
         // rust_eh_personality must not be renamed as LLVM hard-codes the name
         return "rust_eh_personality".to_owned();
-    } else if item_name == "__rust_no_alloc_shim_is_unstable" {
-        // Temporary back compat hack to give people the chance to migrate to
-        // include #[rustc_std_internal_symbol].
-        return "__rust_no_alloc_shim_is_unstable".to_owned();
     }
 
     let prefix = "_R";
diff --git a/compiler/rustc_target/src/asm/loongarch.rs b/compiler/rustc_target/src/asm/loongarch.rs
index b4ea6fc592a..51e7ee8daa4 100644
--- a/compiler/rustc_target/src/asm/loongarch.rs
+++ b/compiler/rustc_target/src/asm/loongarch.rs
@@ -34,11 +34,15 @@ impl LoongArchInlineAsmRegClass {
 
     pub fn supported_types(
         self,
-        _arch: InlineAsmArch,
+        arch: InlineAsmArch,
     ) -> &'static [(InlineAsmType, Option<Symbol>)] {
-        match self {
-            Self::reg => types! { _: I8, I16, I32, I64, F32, F64; },
-            Self::freg => types! { f: F32; d: F64; },
+        match (self, arch) {
+            (Self::reg, InlineAsmArch::LoongArch64) => {
+                types! { _: I8, I16, I32, I64, F16, F32, F64; }
+            }
+            (Self::reg, InlineAsmArch::LoongArch32) => types! { _: I8, I16, I32, F16, F32; },
+            (Self::freg, _) => types! { f: F16, F32; d: F64; },
+            _ => unreachable!("unsupported register class"),
         }
     }
 }
diff --git a/compiler/rustc_target/src/callconv/mips64.rs b/compiler/rustc_target/src/callconv/mips64.rs
index 89f324bc313..77c0cf06fc1 100644
--- a/compiler/rustc_target/src/callconv/mips64.rs
+++ b/compiler/rustc_target/src/callconv/mips64.rs
@@ -2,9 +2,7 @@ use rustc_abi::{
     BackendRepr, FieldsShape, Float, HasDataLayout, Primitive, Reg, Size, TyAbiInterface,
 };
 
-use crate::callconv::{
-    ArgAbi, ArgAttribute, ArgAttributes, ArgExtension, CastTarget, FnAbi, PassMode, Uniform,
-};
+use crate::callconv::{ArgAbi, ArgExtension, CastTarget, FnAbi, PassMode, Uniform};
 
 fn extend_integer_width_mips<Ty>(arg: &mut ArgAbi<'_, Ty>, bits: u64) {
     // Always sign extend u32 values on 64-bit mips
@@ -140,16 +138,7 @@ where
 
     // Extract first 8 chunks as the prefix
     let rest_size = size - Size::from_bytes(8) * prefix_index as u64;
-    arg.cast_to(CastTarget {
-        prefix,
-        rest: Uniform::new(Reg::i64(), rest_size),
-        attrs: ArgAttributes {
-            regular: ArgAttribute::default(),
-            arg_ext: ArgExtension::None,
-            pointee_size: Size::ZERO,
-            pointee_align: None,
-        },
-    });
+    arg.cast_to(CastTarget::prefixed(prefix, Uniform::new(Reg::i64(), rest_size)));
 }
 
 pub(crate) fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
diff --git a/compiler/rustc_target/src/callconv/mod.rs b/compiler/rustc_target/src/callconv/mod.rs
index f9ecf02f857..71cc2a45563 100644
--- a/compiler/rustc_target/src/callconv/mod.rs
+++ b/compiler/rustc_target/src/callconv/mod.rs
@@ -7,7 +7,7 @@ use rustc_abi::{
 use rustc_macros::HashStable_Generic;
 
 pub use crate::spec::AbiMap;
-use crate::spec::{HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, WasmCAbi};
+use crate::spec::{HasTargetSpec, HasX86AbiOpt};
 
 mod aarch64;
 mod amdgpu;
@@ -197,6 +197,17 @@ impl ArgAttributes {
     }
 }
 
+impl From<ArgAttribute> for ArgAttributes {
+    fn from(value: ArgAttribute) -> Self {
+        Self {
+            regular: value,
+            arg_ext: ArgExtension::None,
+            pointee_size: Size::ZERO,
+            pointee_align: None,
+        }
+    }
+}
+
 /// An argument passed entirely registers with the
 /// same kind (e.g., HFA / HVA on PPC64 and AArch64).
 #[derive(Clone, Copy, PartialEq, Eq, Hash, Debug, HashStable_Generic)]
@@ -251,6 +262,9 @@ impl Uniform {
 #[derive(Clone, PartialEq, Eq, Hash, Debug, HashStable_Generic)]
 pub struct CastTarget {
     pub prefix: [Option<Reg>; 8],
+    /// The offset of `rest` from the start of the value. Currently only implemented for a `Reg`
+    /// pair created by the `offset_pair` method.
+    pub rest_offset: Option<Size>,
     pub rest: Uniform,
     pub attrs: ArgAttributes,
 }
@@ -263,42 +277,45 @@ impl From<Reg> for CastTarget {
 
 impl From<Uniform> for CastTarget {
     fn from(uniform: Uniform) -> CastTarget {
-        CastTarget {
-            prefix: [None; 8],
-            rest: uniform,
-            attrs: ArgAttributes {
-                regular: ArgAttribute::default(),
-                arg_ext: ArgExtension::None,
-                pointee_size: Size::ZERO,
-                pointee_align: None,
-            },
-        }
+        Self::prefixed([None; 8], uniform)
     }
 }
 
 impl CastTarget {
-    pub fn pair(a: Reg, b: Reg) -> CastTarget {
-        CastTarget {
+    pub fn prefixed(prefix: [Option<Reg>; 8], rest: Uniform) -> Self {
+        Self { prefix, rest_offset: None, rest, attrs: ArgAttributes::new() }
+    }
+
+    pub fn offset_pair(a: Reg, offset_from_start: Size, b: Reg) -> Self {
+        Self {
             prefix: [Some(a), None, None, None, None, None, None, None],
-            rest: Uniform::from(b),
-            attrs: ArgAttributes {
-                regular: ArgAttribute::default(),
-                arg_ext: ArgExtension::None,
-                pointee_size: Size::ZERO,
-                pointee_align: None,
-            },
+            rest_offset: Some(offset_from_start),
+            rest: b.into(),
+            attrs: ArgAttributes::new(),
         }
     }
 
+    pub fn with_attrs(mut self, attrs: ArgAttributes) -> Self {
+        self.attrs = attrs;
+        self
+    }
+
+    pub fn pair(a: Reg, b: Reg) -> CastTarget {
+        Self::prefixed([Some(a), None, None, None, None, None, None, None], Uniform::from(b))
+    }
+
     /// When you only access the range containing valid data, you can use this unaligned size;
     /// otherwise, use the safer `size` method.
     pub fn unaligned_size<C: HasDataLayout>(&self, _cx: &C) -> Size {
         // Prefix arguments are passed in specific designated registers
-        let prefix_size = self
-            .prefix
-            .iter()
-            .filter_map(|x| x.map(|reg| reg.size))
-            .fold(Size::ZERO, |acc, size| acc + size);
+        let prefix_size = if let Some(offset_from_start) = self.rest_offset {
+            offset_from_start
+        } else {
+            self.prefix
+                .iter()
+                .filter_map(|x| x.map(|reg| reg.size))
+                .fold(Size::ZERO, |acc, size| acc + size)
+        };
         // Remaining arguments are passed in chunks of the unit size
         let rest_size =
             self.rest.unit.size * self.rest.total.bytes().div_ceil(self.rest.unit.size.bytes());
@@ -322,9 +339,22 @@ impl CastTarget {
     /// Checks if these two `CastTarget` are equal enough to be considered "the same for all
     /// function call ABIs".
     pub fn eq_abi(&self, other: &Self) -> bool {
-        let CastTarget { prefix: prefix_l, rest: rest_l, attrs: attrs_l } = self;
-        let CastTarget { prefix: prefix_r, rest: rest_r, attrs: attrs_r } = other;
-        prefix_l == prefix_r && rest_l == rest_r && attrs_l.eq_abi(attrs_r)
+        let CastTarget {
+            prefix: prefix_l,
+            rest_offset: rest_offset_l,
+            rest: rest_l,
+            attrs: attrs_l,
+        } = self;
+        let CastTarget {
+            prefix: prefix_r,
+            rest_offset: rest_offset_r,
+            rest: rest_r,
+            attrs: attrs_r,
+        } = other;
+        prefix_l == prefix_r
+            && rest_offset_l == rest_offset_r
+            && rest_l == rest_r
+            && attrs_l.eq_abi(attrs_r)
     }
 }
 
@@ -593,7 +623,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
     pub fn adjust_for_foreign_abi<C>(&mut self, cx: &C, abi: ExternAbi)
     where
         Ty: TyAbiInterface<'a, C> + Copy,
-        C: HasDataLayout + HasTargetSpec + HasWasmCAbiOpt + HasX86AbiOpt,
+        C: HasDataLayout + HasTargetSpec + HasX86AbiOpt,
     {
         if abi == ExternAbi::X86Interrupt {
             if let Some(arg) = self.args.first_mut() {
@@ -669,14 +699,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
             "hexagon" => hexagon::compute_abi_info(self),
             "xtensa" => xtensa::compute_abi_info(cx, self),
             "riscv32" | "riscv64" => riscv::compute_abi_info(cx, self),
-            "wasm32" => {
-                if spec.os == "unknown" && matches!(cx.wasm_c_abi_opt(), WasmCAbi::Legacy { .. }) {
-                    wasm::compute_wasm_abi_info(self)
-                } else {
-                    wasm::compute_c_abi_info(cx, self)
-                }
-            }
-            "wasm64" => wasm::compute_c_abi_info(cx, self),
+            "wasm32" | "wasm64" => wasm::compute_abi_info(cx, self),
             "bpf" => bpf::compute_abi_info(self),
             arch => panic!("no lowering implemented for {arch}"),
         }
diff --git a/compiler/rustc_target/src/callconv/nvptx64.rs b/compiler/rustc_target/src/callconv/nvptx64.rs
index a26e7dac5ba..44977de7fcb 100644
--- a/compiler/rustc_target/src/callconv/nvptx64.rs
+++ b/compiler/rustc_target/src/callconv/nvptx64.rs
@@ -1,6 +1,6 @@
 use rustc_abi::{HasDataLayout, Reg, Size, TyAbiInterface};
 
-use super::{ArgAttribute, ArgAttributes, ArgExtension, CastTarget};
+use super::CastTarget;
 use crate::callconv::{ArgAbi, FnAbi, Uniform};
 
 fn classify_ret<Ty>(ret: &mut ArgAbi<'_, Ty>) {
@@ -34,16 +34,10 @@ fn classify_aggregate<Ty>(arg: &mut ArgAbi<'_, Ty>) {
     };
 
     if align_bytes == size.bytes() {
-        arg.cast_to(CastTarget {
-            prefix: [Some(reg), None, None, None, None, None, None, None],
-            rest: Uniform::new(Reg::i8(), Size::from_bytes(0)),
-            attrs: ArgAttributes {
-                regular: ArgAttribute::default(),
-                arg_ext: ArgExtension::None,
-                pointee_size: Size::ZERO,
-                pointee_align: None,
-            },
-        });
+        arg.cast_to(CastTarget::prefixed(
+            [Some(reg), None, None, None, None, None, None, None],
+            Uniform::new(Reg::i8(), Size::ZERO),
+        ));
     } else {
         arg.cast_to(Uniform::new(reg, size));
     }
@@ -78,11 +72,10 @@ where
     };
     if arg.layout.size.bytes() / align_bytes == 1 {
         // Make sure we pass the struct as array at the LLVM IR level and not as a single integer.
-        arg.cast_to(CastTarget {
-            prefix: [Some(unit), None, None, None, None, None, None, None],
-            rest: Uniform::new(unit, Size::ZERO),
-            attrs: ArgAttributes::new(),
-        });
+        arg.cast_to(CastTarget::prefixed(
+            [Some(unit), None, None, None, None, None, None, None],
+            Uniform::new(unit, Size::ZERO),
+        ));
     } else {
         arg.cast_to(Uniform::new(unit, arg.layout.size));
     }
diff --git a/compiler/rustc_target/src/callconv/riscv.rs b/compiler/rustc_target/src/callconv/riscv.rs
index cd1d3cd1eee..6a2038f9381 100644
--- a/compiler/rustc_target/src/callconv/riscv.rs
+++ b/compiler/rustc_target/src/callconv/riscv.rs
@@ -14,16 +14,16 @@ use crate::spec::HasTargetSpec;
 
 #[derive(Copy, Clone)]
 enum RegPassKind {
-    Float(Reg),
-    Integer(Reg),
+    Float { offset_from_start: Size, ty: Reg },
+    Integer { offset_from_start: Size, ty: Reg },
     Unknown,
 }
 
 #[derive(Copy, Clone)]
 enum FloatConv {
-    FloatPair(Reg, Reg),
+    FloatPair { first_ty: Reg, second_ty_offset_from_start: Size, second_ty: Reg },
     Float(Reg),
-    MixedPair(Reg, Reg),
+    MixedPair { first_ty: Reg, second_ty_offset_from_start: Size, second_ty: Reg },
 }
 
 #[derive(Copy, Clone)]
@@ -43,6 +43,7 @@ fn should_use_fp_conv_helper<'a, Ty, C>(
     flen: u64,
     field1_kind: &mut RegPassKind,
     field2_kind: &mut RegPassKind,
+    offset_from_start: Size,
 ) -> Result<(), CannotUseFpConv>
 where
     Ty: TyAbiInterface<'a, C> + Copy,
@@ -55,16 +56,16 @@ where
                 }
                 match (*field1_kind, *field2_kind) {
                     (RegPassKind::Unknown, _) => {
-                        *field1_kind = RegPassKind::Integer(Reg {
-                            kind: RegKind::Integer,
-                            size: arg_layout.size,
-                        });
+                        *field1_kind = RegPassKind::Integer {
+                            offset_from_start,
+                            ty: Reg { kind: RegKind::Integer, size: arg_layout.size },
+                        };
                     }
-                    (RegPassKind::Float(_), RegPassKind::Unknown) => {
-                        *field2_kind = RegPassKind::Integer(Reg {
-                            kind: RegKind::Integer,
-                            size: arg_layout.size,
-                        });
+                    (RegPassKind::Float { .. }, RegPassKind::Unknown) => {
+                        *field2_kind = RegPassKind::Integer {
+                            offset_from_start,
+                            ty: Reg { kind: RegKind::Integer, size: arg_layout.size },
+                        };
                     }
                     _ => return Err(CannotUseFpConv),
                 }
@@ -75,12 +76,16 @@ where
                 }
                 match (*field1_kind, *field2_kind) {
                     (RegPassKind::Unknown, _) => {
-                        *field1_kind =
-                            RegPassKind::Float(Reg { kind: RegKind::Float, size: arg_layout.size });
+                        *field1_kind = RegPassKind::Float {
+                            offset_from_start,
+                            ty: Reg { kind: RegKind::Float, size: arg_layout.size },
+                        };
                     }
                     (_, RegPassKind::Unknown) => {
-                        *field2_kind =
-                            RegPassKind::Float(Reg { kind: RegKind::Float, size: arg_layout.size });
+                        *field2_kind = RegPassKind::Float {
+                            offset_from_start,
+                            ty: Reg { kind: RegKind::Float, size: arg_layout.size },
+                        };
                     }
                     _ => return Err(CannotUseFpConv),
                 }
@@ -102,13 +107,14 @@ where
                             flen,
                             field1_kind,
                             field2_kind,
+                            offset_from_start,
                         );
                     }
                     return Err(CannotUseFpConv);
                 }
             }
             FieldsShape::Array { count, .. } => {
-                for _ in 0..count {
+                for i in 0..count {
                     let elem_layout = arg_layout.field(cx, 0);
                     should_use_fp_conv_helper(
                         cx,
@@ -117,6 +123,7 @@ where
                         flen,
                         field1_kind,
                         field2_kind,
+                        offset_from_start + elem_layout.size * i,
                     )?;
                 }
             }
@@ -127,7 +134,15 @@ where
                 }
                 for i in arg_layout.fields.index_by_increasing_offset() {
                     let field = arg_layout.field(cx, i);
-                    should_use_fp_conv_helper(cx, &field, xlen, flen, field1_kind, field2_kind)?;
+                    should_use_fp_conv_helper(
+                        cx,
+                        &field,
+                        xlen,
+                        flen,
+                        field1_kind,
+                        field2_kind,
+                        offset_from_start + arg_layout.fields.offset(i),
+                    )?;
                 }
             }
         },
@@ -146,14 +161,52 @@ where
 {
     let mut field1_kind = RegPassKind::Unknown;
     let mut field2_kind = RegPassKind::Unknown;
-    if should_use_fp_conv_helper(cx, arg, xlen, flen, &mut field1_kind, &mut field2_kind).is_err() {
+    if should_use_fp_conv_helper(
+        cx,
+        arg,
+        xlen,
+        flen,
+        &mut field1_kind,
+        &mut field2_kind,
+        Size::ZERO,
+    )
+    .is_err()
+    {
         return None;
     }
     match (field1_kind, field2_kind) {
-        (RegPassKind::Integer(l), RegPassKind::Float(r)) => Some(FloatConv::MixedPair(l, r)),
-        (RegPassKind::Float(l), RegPassKind::Integer(r)) => Some(FloatConv::MixedPair(l, r)),
-        (RegPassKind::Float(l), RegPassKind::Float(r)) => Some(FloatConv::FloatPair(l, r)),
-        (RegPassKind::Float(f), RegPassKind::Unknown) => Some(FloatConv::Float(f)),
+        (
+            RegPassKind::Integer { offset_from_start, .. }
+            | RegPassKind::Float { offset_from_start, .. },
+            _,
+        ) if offset_from_start != Size::ZERO => {
+            panic!("type {:?} has a first field with non-zero offset {offset_from_start:?}", arg.ty)
+        }
+        (
+            RegPassKind::Integer { ty: first_ty, .. },
+            RegPassKind::Float { offset_from_start, ty: second_ty },
+        ) => Some(FloatConv::MixedPair {
+            first_ty,
+            second_ty_offset_from_start: offset_from_start,
+            second_ty,
+        }),
+        (
+            RegPassKind::Float { ty: first_ty, .. },
+            RegPassKind::Integer { offset_from_start, ty: second_ty },
+        ) => Some(FloatConv::MixedPair {
+            first_ty,
+            second_ty_offset_from_start: offset_from_start,
+            second_ty,
+        }),
+        (
+            RegPassKind::Float { ty: first_ty, .. },
+            RegPassKind::Float { offset_from_start, ty: second_ty },
+        ) => Some(FloatConv::FloatPair {
+            first_ty,
+            second_ty_offset_from_start: offset_from_start,
+            second_ty,
+        }),
+        (RegPassKind::Float { ty, .. }, RegPassKind::Unknown) => Some(FloatConv::Float(ty)),
         _ => None,
     }
 }
@@ -171,11 +224,19 @@ where
             FloatConv::Float(f) => {
                 arg.cast_to(f);
             }
-            FloatConv::FloatPair(l, r) => {
-                arg.cast_to(CastTarget::pair(l, r));
+            FloatConv::FloatPair { first_ty, second_ty_offset_from_start, second_ty } => {
+                arg.cast_to(CastTarget::offset_pair(
+                    first_ty,
+                    second_ty_offset_from_start,
+                    second_ty,
+                ));
             }
-            FloatConv::MixedPair(l, r) => {
-                arg.cast_to(CastTarget::pair(l, r));
+            FloatConv::MixedPair { first_ty, second_ty_offset_from_start, second_ty } => {
+                arg.cast_to(CastTarget::offset_pair(
+                    first_ty,
+                    second_ty_offset_from_start,
+                    second_ty,
+                ));
             }
         }
         return false;
@@ -239,15 +300,27 @@ fn classify_arg<'a, Ty, C>(
                 arg.cast_to(f);
                 return;
             }
-            Some(FloatConv::FloatPair(l, r)) if *avail_fprs >= 2 => {
+            Some(FloatConv::FloatPair { first_ty, second_ty_offset_from_start, second_ty })
+                if *avail_fprs >= 2 =>
+            {
                 *avail_fprs -= 2;
-                arg.cast_to(CastTarget::pair(l, r));
+                arg.cast_to(CastTarget::offset_pair(
+                    first_ty,
+                    second_ty_offset_from_start,
+                    second_ty,
+                ));
                 return;
             }
-            Some(FloatConv::MixedPair(l, r)) if *avail_fprs >= 1 && *avail_gprs >= 1 => {
+            Some(FloatConv::MixedPair { first_ty, second_ty_offset_from_start, second_ty })
+                if *avail_fprs >= 1 && *avail_gprs >= 1 =>
+            {
                 *avail_gprs -= 1;
                 *avail_fprs -= 1;
-                arg.cast_to(CastTarget::pair(l, r));
+                arg.cast_to(CastTarget::offset_pair(
+                    first_ty,
+                    second_ty_offset_from_start,
+                    second_ty,
+                ));
                 return;
             }
             _ => (),
diff --git a/compiler/rustc_target/src/callconv/sparc64.rs b/compiler/rustc_target/src/callconv/sparc64.rs
index 7ca0031fc59..186826c08fc 100644
--- a/compiler/rustc_target/src/callconv/sparc64.rs
+++ b/compiler/rustc_target/src/callconv/sparc64.rs
@@ -5,9 +5,7 @@ use rustc_abi::{
     TyAndLayout,
 };
 
-use crate::callconv::{
-    ArgAbi, ArgAttribute, ArgAttributes, ArgExtension, CastTarget, FnAbi, Uniform,
-};
+use crate::callconv::{ArgAbi, ArgAttribute, CastTarget, FnAbi, Uniform};
 use crate::spec::HasTargetSpec;
 
 #[derive(Clone, Debug)]
@@ -197,16 +195,10 @@ where
                     rest_size = rest_size - Reg::i32().size;
                 }
 
-                arg.cast_to(CastTarget {
-                    prefix: data.prefix,
-                    rest: Uniform::new(Reg::i64(), rest_size),
-                    attrs: ArgAttributes {
-                        regular: data.arg_attribute,
-                        arg_ext: ArgExtension::None,
-                        pointee_size: Size::ZERO,
-                        pointee_align: None,
-                    },
-                });
+                arg.cast_to(
+                    CastTarget::prefixed(data.prefix, Uniform::new(Reg::i64(), rest_size))
+                        .with_attrs(data.arg_attribute.into()),
+                );
                 return;
             }
         }
diff --git a/compiler/rustc_target/src/callconv/wasm.rs b/compiler/rustc_target/src/callconv/wasm.rs
index 881168c98c3..a308f378ee8 100644
--- a/compiler/rustc_target/src/callconv/wasm.rs
+++ b/compiler/rustc_target/src/callconv/wasm.rs
@@ -59,7 +59,7 @@ where
 }
 
 /// The purpose of this ABI is to match the C ABI (aka clang) exactly.
-pub(crate) fn compute_c_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
+pub(crate) fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
 where
     Ty: TyAbiInterface<'a, C> + Copy,
     C: HasDataLayout,
@@ -75,43 +75,3 @@ where
         classify_arg(cx, arg);
     }
 }
-
-/// The purpose of this ABI is for matching the WebAssembly standard. This
-/// intentionally diverges from the C ABI and is specifically crafted to take
-/// advantage of LLVM's support of multiple returns in WebAssembly.
-///
-/// This ABI is *bad*! It uses `PassMode::Direct` for `abi::Aggregate` types, which leaks LLVM
-/// implementation details into the ABI. It's just hard to fix because ABIs are hard to change.
-/// Also see <https://github.com/rust-lang/rust/issues/115666>.
-pub(crate) fn compute_wasm_abi_info<Ty>(fn_abi: &mut FnAbi<'_, Ty>) {
-    if !fn_abi.ret.is_ignore() {
-        classify_ret_wasm_abi(&mut fn_abi.ret);
-    }
-
-    for arg in fn_abi.args.iter_mut() {
-        if arg.is_ignore() {
-            continue;
-        }
-        classify_arg_wasm_abi(arg);
-    }
-
-    fn classify_ret_wasm_abi<Ty>(ret: &mut ArgAbi<'_, Ty>) {
-        if !ret.layout.is_sized() {
-            // Not touching this...
-            return;
-        }
-        // FIXME: this is bad! https://github.com/rust-lang/rust/issues/115666
-        ret.make_direct_deprecated();
-        ret.extend_integer_width_to(32);
-    }
-
-    fn classify_arg_wasm_abi<Ty>(arg: &mut ArgAbi<'_, Ty>) {
-        if !arg.layout.is_sized() {
-            // Not touching this...
-            return;
-        }
-        // FIXME: this is bad! https://github.com/rust-lang/rust/issues/115666
-        arg.make_direct_deprecated();
-        arg.extend_integer_width_to(32);
-    }
-}
diff --git a/compiler/rustc_target/src/callconv/x86_64.rs b/compiler/rustc_target/src/callconv/x86_64.rs
index 300b19f62e7..700ee73c8fd 100644
--- a/compiler/rustc_target/src/callconv/x86_64.rs
+++ b/compiler/rustc_target/src/callconv/x86_64.rs
@@ -7,6 +7,7 @@ use rustc_abi::{
 };
 
 use crate::callconv::{ArgAbi, CastTarget, FnAbi};
+use crate::spec::HasTargetSpec;
 
 /// Classification of "eightbyte" components.
 // N.B., the order of the variants is from general to specific,
@@ -175,7 +176,7 @@ const MAX_SSE_REGS: usize = 8; // XMM0-7
 pub(crate) fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
 where
     Ty: TyAbiInterface<'a, C> + Copy,
-    C: HasDataLayout,
+    C: HasDataLayout + HasTargetSpec,
 {
     let mut int_regs = MAX_INT_REGS;
     let mut sse_regs = MAX_SSE_REGS;
@@ -236,7 +237,7 @@ where
                 if arg.layout.is_aggregate() {
                     let size = arg.layout.size;
                     arg.cast_to(cast_target(cls, size));
-                } else {
+                } else if is_arg || cx.target_spec().is_like_darwin {
                     arg.extend_integer_width_to(32);
                 }
             }
diff --git a/compiler/rustc_target/src/spec/abi_map.rs b/compiler/rustc_target/src/spec/abi_map.rs
index c4978a8e52a..4659bbdb890 100644
--- a/compiler/rustc_target/src/spec/abi_map.rs
+++ b/compiler/rustc_target/src/spec/abi_map.rs
@@ -71,6 +71,8 @@ impl AbiMap {
             (ExternAbi::RustCold, _) if self.os == OsKind::Windows => CanonAbi::Rust,
             (ExternAbi::RustCold, _) => CanonAbi::RustCold,
 
+            (ExternAbi::Custom, _) => CanonAbi::Custom,
+
             (ExternAbi::System { .. }, Arch::X86) if os == OsKind::Windows && !has_c_varargs => {
                 CanonAbi::X86(X86Call::Stdcall)
             }
diff --git a/compiler/rustc_target/src/spec/base/xtensa.rs b/compiler/rustc_target/src/spec/base/xtensa.rs
index 47a532dfdd4..a7cc748973c 100644
--- a/compiler/rustc_target/src/spec/base/xtensa.rs
+++ b/compiler/rustc_target/src/spec/base/xtensa.rs
@@ -6,7 +6,7 @@ pub(crate) fn opts() -> TargetOptions {
     TargetOptions {
         os: "none".into(),
         endian: Endian::Little,
-        c_int_width: "32".into(),
+        c_int_width: 32,
         linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
         executables: true,
         panic_strategy: PanicStrategy::Abort,
diff --git a/compiler/rustc_target/src/spec/json.rs b/compiler/rustc_target/src/spec/json.rs
index 039056a5a25..6c716f87125 100644
--- a/compiler/rustc_target/src/spec/json.rs
+++ b/compiler/rustc_target/src/spec/json.rs
@@ -80,6 +80,12 @@ impl Target {
                     base.$key_name = s;
                 }
             } );
+            ($key_name:ident = $json_name:expr, u64 as $int_ty:ty) => ( {
+                let name = $json_name;
+                if let Some(s) = obj.remove(name).and_then(|b| b.as_u64()) {
+                    base.$key_name = s as $int_ty;
+                }
+            } );
             ($key_name:ident, bool) => ( {
                 let name = (stringify!($key_name)).replace("_", "-");
                 if let Some(s) = obj.remove(&name).and_then(|b| b.as_bool()) {
@@ -554,7 +560,7 @@ impl Target {
             }
         }
 
-        key!(c_int_width = "target-c-int-width");
+        key!(c_int_width = "target-c-int-width", u64 as u16);
         key!(c_enum_min_bits, Option<u64>); // if None, matches c_int_width
         key!(os);
         key!(env);
diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs
index 6ceb5e80f21..7a49f004072 100644
--- a/compiler/rustc_target/src/spec/mod.rs
+++ b/compiler/rustc_target/src/spec/mod.rs
@@ -6,33 +6,36 @@
 //! to a new platform, and allows for an unprecedented level of control over how
 //! the compiler works.
 //!
-//! # Using custom targets
+//! # Using targets and target.json
 //!
-//! A target tuple, as passed via `rustc --target=TUPLE`, will first be
-//! compared against the list of built-in targets. This is to ease distributing
-//! rustc (no need for configuration files) and also to hold these built-in
-//! targets as immutable and sacred. If `TUPLE` is not one of the built-in
-//! targets, rustc will check if a file named `TUPLE` exists. If it does, it
-//! will be loaded as the target configuration. If the file does not exist,
-//! rustc will search each directory in the environment variable
-//! `RUST_TARGET_PATH` for a file named `TUPLE.json`. The first one found will
-//! be loaded. If no file is found in any of those directories, a fatal error
-//! will be given.
+//! Invoking "rustc --target=${TUPLE}" will result in rustc initiating the [`Target::search`] by
+//! - checking if "$TUPLE" is a complete path to a json (ending with ".json") and loading if so
+//! - checking builtin targets for "${TUPLE}"
+//! - checking directories in "${RUST_TARGET_PATH}" for "${TUPLE}.json"
+//! - checking for "${RUSTC_SYSROOT}/lib/rustlib/${TUPLE}/target.json"
 //!
-//! Projects defining their own targets should use
-//! `--target=path/to/my-awesome-platform.json` instead of adding to
-//! `RUST_TARGET_PATH`.
+//! Code will then be compiled using the first discovered target spec.
 //!
 //! # Defining a new target
 //!
-//! Targets are defined using [JSON](https://json.org/). The `Target` struct in
-//! this module defines the format the JSON file should take, though each
-//! underscore in the field names should be replaced with a hyphen (`-`) in the
-//! JSON file. Some fields are required in every target specification, such as
-//! `llvm-target`, `target-endian`, `target-pointer-width`, `data-layout`,
-//! `arch`, and `os`. In general, options passed to rustc with `-C` override
-//! the target's settings, though `target-feature` and `link-args` will *add*
-//! to the list specified by the target, rather than replace.
+//! Targets are defined using a struct which additionally has serialization to and from [JSON].
+//! The `Target` struct in this module loosely corresponds with the format the JSON takes.
+//! We usually try to make the fields equivalent but we have given up on a 1:1 correspondence
+//! between the JSON and the actual structure itself.
+//!
+//! Some fields are required in every target spec, and they should be embedded in Target directly.
+//! Optional keys are in TargetOptions, but Target derefs to it, for no practical difference.
+//! Most notable is the "data-layout" field which specifies Rust's notion of sizes and alignments
+//! for several key types, such as f64, pointers, and so on.
+//!
+//! At one point we felt `-C` options should override the target's settings, like in C compilers,
+//! but that was an essentially-unmarked route for making code incorrect and Rust unsound.
+//! Confronted with programmers who prefer a compiler with a good UX instead of a lethal weapon,
+//! we have almost-entirely recanted that notion, though we hope "target modifiers" will offer
+//! a way to have a decent UX yet still extend the necessary compiler controls, without
+//! requiring a new target spec for each and every single possible target micro-variant.
+//!
+//! [JSON]: https://json.org
 
 use std::borrow::Cow;
 use std::collections::BTreeMap;
@@ -2213,18 +2216,10 @@ impl Target {
             });
         }
 
-        dl.c_enum_min_size = self
-            .c_enum_min_bits
-            .map_or_else(
-                || {
-                    self.c_int_width
-                        .parse()
-                        .map_err(|_| String::from("failed to parse c_int_width"))
-                },
-                Ok,
-            )
-            .and_then(|i| Integer::from_size(Size::from_bits(i)))
-            .map_err(|err| TargetDataLayoutErrors::InvalidBitsSize { err })?;
+        dl.c_enum_min_size = Integer::from_size(Size::from_bits(
+            self.c_enum_min_bits.unwrap_or(self.c_int_width as _),
+        ))
+        .map_err(|err| TargetDataLayoutErrors::InvalidBitsSize { err })?;
 
         Ok(dl)
     }
@@ -2241,22 +2236,6 @@ impl HasTargetSpec for Target {
     }
 }
 
-/// Which C ABI to use for `wasm32-unknown-unknown`.
-#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
-pub enum WasmCAbi {
-    /// Spec-compliant C ABI.
-    Spec,
-    /// Legacy ABI. Which is non-spec-compliant.
-    Legacy {
-        /// Indicates whether the `wasm_c_abi` lint should be emitted.
-        with_lint: bool,
-    },
-}
-
-pub trait HasWasmCAbiOpt {
-    fn wasm_c_abi_opt(&self) -> WasmCAbi;
-}
-
 /// x86 (32-bit) abi options.
 #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
 pub struct X86Abi {
@@ -2286,7 +2265,7 @@ pub struct TargetOptions {
     /// Used as the `target_endian` `cfg` variable. Defaults to little endian.
     pub endian: Endian,
     /// Width of c_int type. Defaults to "32".
-    pub c_int_width: StaticCow<str>,
+    pub c_int_width: u16,
     /// OS name to use for conditional compilation (`target_os`). Defaults to "none".
     /// "none" implies a bare metal target without `std` library.
     /// A couple of targets having `std` also use "unknown" as an `os` value,
@@ -2783,7 +2762,7 @@ impl Default for TargetOptions {
     fn default() -> TargetOptions {
         TargetOptions {
             endian: Endian::Little,
-            c_int_width: "32".into(),
+            c_int_width: 32,
             os: "none".into(),
             env: "".into(),
             abi: "".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
index 6a83835059e..4902dc37d13 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
@@ -31,7 +31,7 @@ pub(crate) fn target() -> Target {
         options: TargetOptions {
             os: "vita".into(),
             endian: Endian::Little,
-            c_int_width: "32".into(),
+            c_int_width: 32,
             env: "newlib".into(),
             vendor: "sony".into(),
             abi: "eabihf".into(),
diff --git a/compiler/rustc_target/src/spec/targets/avr_none.rs b/compiler/rustc_target/src/spec/targets/avr_none.rs
index 91d3197d099..07ed2a37803 100644
--- a/compiler/rustc_target/src/spec/targets/avr_none.rs
+++ b/compiler/rustc_target/src/spec/targets/avr_none.rs
@@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
         llvm_target: "avr-unknown-unknown".into(),
         pointer_width: 16,
         options: TargetOptions {
-            c_int_width: "16".into(),
+            c_int_width: 16,
             exe_suffix: ".elf".into(),
             linker: Some("avr-gcc".into()),
             eh_frame_header: false,
diff --git a/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs b/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs
index b067ac1e54a..caf77bb8669 100644
--- a/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs
+++ b/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs
@@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
         arch: "msp430".into(),
 
         options: TargetOptions {
-            c_int_width: "16".into(),
+            c_int_width: 16,
 
             // The LLVM backend currently can't generate object files. To
             // workaround this LLVM generates assembly files which then we feed
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs
index dba45776c94..66733d5d4b8 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs
@@ -10,6 +10,7 @@ pub(crate) fn target() -> Target {
     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
     base.max_atomic_width = Some(64);
     base.stack_probes = StackProbeType::Inline;
+    base.llvm_abiname = "elfv2".into();
 
     Target {
         llvm_target: "powerpc64-unknown-freebsd".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs
index 1f67bc7f3c2..ecf68ddff8c 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs
@@ -10,6 +10,7 @@ pub(crate) fn target() -> Target {
     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
     base.max_atomic_width = Some(64);
     base.stack_probes = StackProbeType::Inline;
+    base.llvm_abiname = "elfv1".into();
 
     Target {
         llvm_target: "powerpc64-unknown-linux-gnu".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs
index 49413d27a45..e205aef8285 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs
@@ -12,6 +12,7 @@ pub(crate) fn target() -> Target {
     base.stack_probes = StackProbeType::Inline;
     // FIXME(compiler-team#422): musl targets should be dynamically linked by default.
     base.crt_static_default = true;
+    base.llvm_abiname = "elfv2".into();
 
     Target {
         llvm_target: "powerpc64-unknown-linux-musl".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs
index f5ca54291c6..bcb328020ee 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs
@@ -10,6 +10,7 @@ pub(crate) fn target() -> Target {
     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
     base.max_atomic_width = Some(64);
     base.stack_probes = StackProbeType::Inline;
+    base.llvm_abiname = "elfv2".into();
 
     Target {
         llvm_target: "powerpc64-unknown-openbsd".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs
index 3e4a58f568a..37c888ba514 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs
@@ -10,6 +10,7 @@ pub(crate) fn target() -> Target {
     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
     base.max_atomic_width = Some(64);
     base.stack_probes = StackProbeType::Inline;
+    base.llvm_abiname = "elfv1".into();
 
     Target {
         llvm_target: "powerpc64-unknown-linux-gnu".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs
index 4640d537e8e..3096c4d14ad 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs
@@ -8,6 +8,7 @@ pub(crate) fn target() -> Target {
     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
     base.max_atomic_width = Some(64);
     base.stack_probes = StackProbeType::Inline;
+    base.llvm_abiname = "elfv2".into();
 
     Target {
         llvm_target: "powerpc64le-unknown-freebsd".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs
index dd3f660d81e..9e406af53b5 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs
@@ -8,6 +8,7 @@ pub(crate) fn target() -> Target {
     base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
     base.max_atomic_width = Some(64);
     base.stack_probes = StackProbeType::Inline;
+    base.llvm_abiname = "elfv2".into();
 
     Target {
         llvm_target: "powerpc64le-unknown-linux-gnu".into(),
diff --git a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs
index 9e2bfe2c56f..f145c5b8c14 100644
--- a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs
+++ b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs
@@ -10,6 +10,7 @@ pub(crate) fn target() -> Target {
     base.stack_probes = StackProbeType::Inline;
     // FIXME(compiler-team#422): musl targets should be dynamically linked by default.
     base.crt_static_default = true;
+    base.llvm_abiname = "elfv2".into();
 
     Target {
         llvm_target: "powerpc64le-unknown-linux-musl".into(),
diff --git a/compiler/rustc_target/src/spec/targets/xtensa_esp32_espidf.rs b/compiler/rustc_target/src/spec/targets/xtensa_esp32_espidf.rs
index c5b4d472fad..8a6773811e8 100644
--- a/compiler/rustc_target/src/spec/targets/xtensa_esp32_espidf.rs
+++ b/compiler/rustc_target/src/spec/targets/xtensa_esp32_espidf.rs
@@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
 
         options: TargetOptions {
             endian: Endian::Little,
-            c_int_width: "32".into(),
+            c_int_width: 32,
             families: cvs!["unix"],
             os: "espidf".into(),
             env: "newlib".into(),
diff --git a/compiler/rustc_target/src/spec/targets/xtensa_esp32s2_espidf.rs b/compiler/rustc_target/src/spec/targets/xtensa_esp32s2_espidf.rs
index cffdaa90727..f38d771f257 100644
--- a/compiler/rustc_target/src/spec/targets/xtensa_esp32s2_espidf.rs
+++ b/compiler/rustc_target/src/spec/targets/xtensa_esp32s2_espidf.rs
@@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
 
         options: TargetOptions {
             endian: Endian::Little,
-            c_int_width: "32".into(),
+            c_int_width: 32,
             families: cvs!["unix"],
             os: "espidf".into(),
             env: "newlib".into(),
diff --git a/compiler/rustc_target/src/spec/targets/xtensa_esp32s3_espidf.rs b/compiler/rustc_target/src/spec/targets/xtensa_esp32s3_espidf.rs
index 2e4afc00541..4ec6e319fd4 100644
--- a/compiler/rustc_target/src/spec/targets/xtensa_esp32s3_espidf.rs
+++ b/compiler/rustc_target/src/spec/targets/xtensa_esp32s3_espidf.rs
@@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
 
         options: TargetOptions {
             endian: Endian::Little,
-            c_int_width: "32".into(),
+            c_int_width: 32,
             families: cvs!["unix"],
             os: "espidf".into(),
             env: "newlib".into(),
diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs
index 5d1182fce48..a1eac1fba25 100644
--- a/compiler/rustc_target/src/target_features.rs
+++ b/compiler/rustc_target/src/target_features.rs
@@ -34,6 +34,9 @@ pub enum Stability {
     /// particular for features are actually ABI configuration flags (not all targets are as nice as
     /// RISC-V and have an explicit way to set the ABI separate from target features).
     Forbidden { reason: &'static str },
+    /// This feature can not be set via `-Ctarget-feature` or `#[target_feature]`, it can only be set
+    /// by target modifier flag. Target modifier flags are tracked to be consistent in linked modules.
+    TargetModifierOnly { reason: &'static str, flag: &'static str },
 }
 use Stability::*;
 
@@ -49,6 +52,7 @@ impl<CTX> HashStable<CTX> for Stability {
             Stability::Forbidden { reason } => {
                 reason.hash_stable(hcx, hasher);
             }
+            Stability::TargetModifierOnly { .. } => {}
         }
     }
 }
@@ -74,16 +78,7 @@ impl Stability {
             Stability::Unstable(nightly_feature) => Some(nightly_feature),
             Stability::Stable { .. } => None,
             Stability::Forbidden { .. } => panic!("forbidden features should not reach this far"),
-        }
-    }
-
-    /// Returns whether the feature may be toggled via `#[target_feature]` or `-Ctarget-feature`.
-    /// (It might still be nightly-only even if this returns `true`, so make sure to also check
-    /// `requires_nightly`.)
-    pub fn toggle_allowed(&self) -> Result<(), &'static str> {
-        match self {
-            Stability::Forbidden { reason } => Err(reason),
-            _ => Ok(()),
+            Stability::TargetModifierOnly { .. } => None,
         }
     }
 }
@@ -453,6 +448,30 @@ static X86_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
     ("prfchw", Unstable(sym::prfchw_target_feature), &[]),
     ("rdrand", Stable, &[]),
     ("rdseed", Stable, &[]),
+    (
+        "retpoline-external-thunk",
+        Stability::TargetModifierOnly {
+            reason: "use `retpoline-external-thunk` target modifier flag instead",
+            flag: "retpoline-external-thunk",
+        },
+        &[],
+    ),
+    (
+        "retpoline-indirect-branches",
+        Stability::TargetModifierOnly {
+            reason: "use `retpoline` target modifier flag instead",
+            flag: "retpoline",
+        },
+        &[],
+    ),
+    (
+        "retpoline-indirect-calls",
+        Stability::TargetModifierOnly {
+            reason: "use `retpoline` target modifier flag instead",
+            flag: "retpoline",
+        },
+        &[],
+    ),
     ("rtm", Unstable(sym::rtm_target_feature), &[]),
     ("sha", Stable, &["sse2"]),
     ("sha512", Stable, &["avx2"]),
diff --git a/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs b/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs
index b8207c4f816..5c669678ccc 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/infer/region.rs
@@ -891,7 +891,7 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> {
             (b'a'..=b'z')
                 .map(|c| format!("'{}", c as char))
                 .find(|candidate| !used_names.iter().any(|e| e.as_str() == candidate))
-                .unwrap_or("'lt".to_string())
+                .unwrap_or_else(|| "'lt".to_string())
         };
 
         let mut visitor = LifetimeReplaceVisitor {
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/ambiguity.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/ambiguity.rs
index 275b580d794..39f115ce0cd 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/ambiguity.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/ambiguity.rs
@@ -199,7 +199,10 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> {
                 // avoid inundating the user with unnecessary errors, but we now
                 // check upstream for type errors and don't add the obligations to
                 // begin with in those cases.
-                if self.tcx.is_lang_item(trait_pred.def_id(), LangItem::Sized) {
+                if matches!(
+                    self.tcx.as_lang_item(trait_pred.def_id()),
+                    Some(LangItem::Sized | LangItem::MetaSized)
+                ) {
                     match self.tainted_by_errors() {
                         None => {
                             let err = self.emit_inference_failure_err(
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/fulfillment_errors.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/fulfillment_errors.rs
index fc5be111144..0c88bd3dcbc 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/fulfillment_errors.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/fulfillment_errors.rs
@@ -2558,32 +2558,31 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> {
                         rustc_transmute::Reason::SrcIsNotYetSupported => {
                             format!("analyzing the transmutability of `{src}` is not yet supported")
                         }
-
                         rustc_transmute::Reason::DstIsNotYetSupported => {
                             format!("analyzing the transmutability of `{dst}` is not yet supported")
                         }
-
                         rustc_transmute::Reason::DstIsBitIncompatible => {
                             format!(
                                 "at least one value of `{src}` isn't a bit-valid value of `{dst}`"
                             )
                         }
-
                         rustc_transmute::Reason::DstUninhabited => {
                             format!("`{dst}` is uninhabited")
                         }
-
                         rustc_transmute::Reason::DstMayHaveSafetyInvariants => {
                             format!("`{dst}` may carry safety invariants")
                         }
                         rustc_transmute::Reason::DstIsTooBig => {
                             format!("the size of `{src}` is smaller than the size of `{dst}`")
                         }
-                        rustc_transmute::Reason::DstRefIsTooBig { src, dst } => {
-                            let src_size = src.size;
-                            let dst_size = dst.size;
+                        rustc_transmute::Reason::DstRefIsTooBig {
+                            src,
+                            src_size,
+                            dst,
+                            dst_size,
+                        } => {
                             format!(
-                                "the referent size of `{src}` ({src_size} bytes) \
+                                "the size of `{src}` ({src_size} bytes) \
                         is smaller than that of `{dst}` ({dst_size} bytes)"
                             )
                         }
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/mod.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/mod.rs
index 78f9287b407..d4cc1ceb280 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/mod.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/mod.rs
@@ -13,7 +13,7 @@ use rustc_data_structures::fx::{FxIndexMap, FxIndexSet};
 use rustc_errors::{Applicability, Diag, E0038, E0276, MultiSpan, struct_span_code_err};
 use rustc_hir::def_id::{DefId, LocalDefId};
 use rustc_hir::intravisit::Visitor;
-use rustc_hir::{self as hir, AmbigArg, LangItem};
+use rustc_hir::{self as hir, AmbigArg};
 use rustc_infer::traits::solve::Goal;
 use rustc_infer::traits::{
     DynCompatibilityViolation, Obligation, ObligationCause, ObligationCauseCode,
@@ -160,17 +160,24 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> {
             })
             .collect();
 
-        // Ensure `T: Sized` and `T: WF` obligations come last. This lets us display diagnostics
-        // with more relevant type information and hide redundant E0282 errors.
-        errors.sort_by_key(|e| match e.obligation.predicate.kind().skip_binder() {
-            ty::PredicateKind::Clause(ty::ClauseKind::Trait(pred))
-                if self.tcx.is_lang_item(pred.def_id(), LangItem::Sized) =>
-            {
-                1
+        // Ensure `T: Sized`, `T: MetaSized`, `T: PointeeSized` and `T: WF` obligations come last.
+        // This lets us display diagnostics with more relevant type information and hide redundant
+        // E0282 errors.
+        errors.sort_by_key(|e| {
+            let maybe_sizedness_did = match e.obligation.predicate.kind().skip_binder() {
+                ty::PredicateKind::Clause(ty::ClauseKind::Trait(pred)) => Some(pred.def_id()),
+                ty::PredicateKind::Clause(ty::ClauseKind::HostEffect(pred)) => Some(pred.def_id()),
+                _ => None,
+            };
+
+            match e.obligation.predicate.kind().skip_binder() {
+                _ if maybe_sizedness_did == self.tcx.lang_items().sized_trait() => 1,
+                _ if maybe_sizedness_did == self.tcx.lang_items().meta_sized_trait() => 2,
+                _ if maybe_sizedness_did == self.tcx.lang_items().pointee_sized_trait() => 3,
+                ty::PredicateKind::Coerce(_) => 4,
+                ty::PredicateKind::Clause(ty::ClauseKind::WellFormed(_)) => 5,
+                _ => 0,
             }
-            ty::PredicateKind::Coerce(_) => 2,
-            ty::PredicateKind::Clause(ty::ClauseKind::WellFormed(_)) => 3,
-            _ => 0,
         });
 
         for (index, error) in errors.iter().enumerate() {
@@ -327,19 +334,26 @@ pub(crate) fn to_pretty_impl_header(tcx: TyCtxt<'_>, impl_def_id: DefId) -> Opti
     let trait_ref = tcx.impl_trait_ref(impl_def_id)?.instantiate_identity();
     let mut w = "impl".to_owned();
 
-    let args = ty::GenericArgs::identity_for_item(tcx, impl_def_id);
+    #[derive(Debug, Default)]
+    struct SizednessFound {
+        sized: bool,
+        meta_sized: bool,
+    }
 
-    // FIXME: Currently only handles ?Sized.
-    //        Needs to support ?Move and ?DynSized when they are implemented.
-    let mut types_without_default_bounds = FxIndexSet::default();
-    let sized_trait = tcx.lang_items().sized_trait();
+    let mut types_with_sizedness_bounds = FxIndexMap::<_, SizednessFound>::default();
+
+    let args = ty::GenericArgs::identity_for_item(tcx, impl_def_id);
 
     let arg_names = args.iter().map(|k| k.to_string()).filter(|k| k != "'_").collect::<Vec<_>>();
     if !arg_names.is_empty() {
-        types_without_default_bounds.extend(args.types());
         w.push('<');
         w.push_str(&arg_names.join(", "));
         w.push('>');
+
+        for ty in args.types() {
+            // `PointeeSized` params might have no predicates.
+            types_with_sizedness_bounds.insert(ty, SizednessFound::default());
+        }
     }
 
     write!(
@@ -351,24 +365,47 @@ pub(crate) fn to_pretty_impl_header(tcx: TyCtxt<'_>, impl_def_id: DefId) -> Opti
     )
     .unwrap();
 
-    // The predicates will contain default bounds like `T: Sized`. We need to
-    // remove these bounds, and add `T: ?Sized` to any untouched type parameters.
     let predicates = tcx.predicates_of(impl_def_id).predicates;
-    let mut pretty_predicates =
-        Vec::with_capacity(predicates.len() + types_without_default_bounds.len());
+    let mut pretty_predicates = Vec::with_capacity(predicates.len());
+
+    let sized_trait = tcx.lang_items().sized_trait();
+    let meta_sized_trait = tcx.lang_items().meta_sized_trait();
 
     for (p, _) in predicates {
-        if let Some(poly_trait_ref) = p.as_trait_clause() {
-            if Some(poly_trait_ref.def_id()) == sized_trait {
-                // FIXME(#120456) - is `swap_remove` correct?
-                types_without_default_bounds.swap_remove(&poly_trait_ref.self_ty().skip_binder());
+        // Accumulate the sizedness bounds for each self ty.
+        if let Some(trait_clause) = p.as_trait_clause() {
+            let self_ty = trait_clause.self_ty().skip_binder();
+            let sizedness_of = types_with_sizedness_bounds.entry(self_ty).or_default();
+            if Some(trait_clause.def_id()) == sized_trait {
+                sizedness_of.sized = true;
+                continue;
+            } else if Some(trait_clause.def_id()) == meta_sized_trait {
+                sizedness_of.meta_sized = true;
                 continue;
             }
         }
+
         pretty_predicates.push(p.to_string());
     }
 
-    pretty_predicates.extend(types_without_default_bounds.iter().map(|ty| format!("{ty}: ?Sized")));
+    for (ty, sizedness) in types_with_sizedness_bounds {
+        if !tcx.features().sized_hierarchy() {
+            if sizedness.sized {
+                // Maybe a default bound, don't write anything.
+            } else {
+                pretty_predicates.push(format!("{ty}: ?Sized"));
+            }
+        } else {
+            if sizedness.sized {
+                // Maybe a default bound, don't write anything.
+                pretty_predicates.push(format!("{ty}: Sized"));
+            } else if sizedness.meta_sized {
+                pretty_predicates.push(format!("{ty}: MetaSized"));
+            } else {
+                pretty_predicates.push(format!("{ty}: PointeeSized"));
+            }
+        }
+    }
 
     if !pretty_predicates.is_empty() {
         write!(w, "\n  where {}", pretty_predicates.join(", ")).unwrap();
@@ -519,7 +556,7 @@ fn attempt_dyn_to_enum_suggestion(
             let Some(impl_type) = tcx.type_of(*impl_id).no_bound_vars() else { return None };
 
             // Obviously unsized impl types won't be usable in an enum.
-            // Note: this doesn't use `Ty::is_trivially_sized` because that function
+            // Note: this doesn't use `Ty::has_trivial_sizedness` because that function
             // defaults to assuming that things are *not* sized, whereas we want to
             // fall back to assuming that things may be sized.
             match impl_type.kind() {
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented.rs
index 37968386e9a..89dab90dc68 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented.rs
@@ -810,7 +810,8 @@ impl<'tcx> OnUnimplementedFormatString {
 
         let mut result = Ok(());
 
-        match FormatString::parse(self.symbol, self.span, &ctx) {
+        let snippet = tcx.sess.source_map().span_to_snippet(self.span).ok();
+        match FormatString::parse(self.symbol, snippet, self.span, &ctx) {
             // Warnings about format specifiers, deprecated parameters, wrong parameters etc.
             // In other words we'd like to let the author know, but we can still try to format the string later
             Ok(FormatString { warnings, .. }) => {
@@ -848,34 +849,27 @@ impl<'tcx> OnUnimplementedFormatString {
                     }
                 }
             }
-            // Errors from the underlying `rustc_parse_format::Parser`
-            Err(errors) => {
+            // Error from the underlying `rustc_parse_format::Parser`
+            Err(e) => {
                 // we cannot return errors from processing the format string as hard error here
                 // as the diagnostic namespace guarantees that malformed input cannot cause an error
                 //
                 // if we encounter any error while processing we nevertheless want to show it as warning
                 // so that users are aware that something is not correct
-                for e in errors {
-                    if self.is_diagnostic_namespace_variant {
-                        if let Some(trait_def_id) = trait_def_id.as_local() {
-                            tcx.emit_node_span_lint(
-                                UNKNOWN_OR_MALFORMED_DIAGNOSTIC_ATTRIBUTES,
-                                tcx.local_def_id_to_hir_id(trait_def_id),
-                                self.span,
-                                WrappedParserError { description: e.description, label: e.label },
-                            );
-                        }
-                    } else {
-                        let reported = struct_span_code_err!(
-                            tcx.dcx(),
+                if self.is_diagnostic_namespace_variant {
+                    if let Some(trait_def_id) = trait_def_id.as_local() {
+                        tcx.emit_node_span_lint(
+                            UNKNOWN_OR_MALFORMED_DIAGNOSTIC_ATTRIBUTES,
+                            tcx.local_def_id_to_hir_id(trait_def_id),
                             self.span,
-                            E0231,
-                            "{}",
-                            e.description,
-                        )
-                        .emit();
-                        result = Err(reported);
+                            WrappedParserError { description: e.description, label: e.label },
+                        );
                     }
+                } else {
+                    let reported =
+                        struct_span_code_err!(tcx.dcx(), self.span, E0231, "{}", e.description,)
+                            .emit();
+                    result = Err(reported);
                 }
             }
         }
@@ -896,7 +890,8 @@ impl<'tcx> OnUnimplementedFormatString {
             Ctx::RustcOnUnimplemented { tcx, trait_def_id }
         };
 
-        if let Ok(s) = FormatString::parse(self.symbol, self.span, &ctx) {
+        // No point passing a snippet here, we already did that in `verify`
+        if let Ok(s) = FormatString::parse(self.symbol, None, self.span, &ctx) {
             s.format(args)
         } else {
             // we cannot return errors from processing the format string as hard error here
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_condition.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_condition.rs
index e8ea9f2d23e..171d05230d4 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_condition.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_condition.rs
@@ -198,7 +198,7 @@ enum LitOrArg {
 
 impl FilterFormatString {
     fn parse(input: Symbol) -> Self {
-        let pieces = Parser::new(input.as_str(), None, None, false, ParseMode::Format)
+        let pieces = Parser::new(input.as_str(), None, None, false, ParseMode::Diagnostic)
             .map(|p| match p {
                 Piece::Lit(s) => LitOrArg::Lit(s.to_owned()),
                 // We just ignore formatspecs here
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_format.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_format.rs
index 7c1dfc1728f..3e8b906fa93 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_format.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/on_unimplemented_format.rs
@@ -5,12 +5,11 @@ use errors::*;
 use rustc_middle::ty::print::TraitRefPrintSugared;
 use rustc_middle::ty::{GenericParamDefKind, TyCtxt};
 use rustc_parse_format::{
-    Alignment, Argument, Count, FormatSpec, ParseError, ParseMode, Parser, Piece as RpfPiece,
-    Position,
+    Argument, FormatSpec, ParseError, ParseMode, Parser, Piece as RpfPiece, Position,
 };
 use rustc_session::lint::builtin::UNKNOWN_OR_MALFORMED_DIAGNOSTIC_ATTRIBUTES;
 use rustc_span::def_id::DefId;
-use rustc_span::{BytePos, Pos, Span, Symbol, kw, sym};
+use rustc_span::{InnerSpan, Span, Symbol, kw, sym};
 
 /// Like [std::fmt::Arguments] this is a string that has been parsed into "pieces",
 /// either as string pieces or dynamic arguments.
@@ -160,32 +159,32 @@ impl FormatString {
 
     pub fn parse<'tcx>(
         input: Symbol,
+        snippet: Option<String>,
         span: Span,
         ctx: &Ctx<'tcx>,
-    ) -> Result<Self, Vec<ParseError>> {
+    ) -> Result<Self, ParseError> {
         let s = input.as_str();
-        let mut parser = Parser::new(s, None, None, false, ParseMode::Format);
-        let mut pieces = Vec::new();
+        let mut parser = Parser::new(s, None, snippet, false, ParseMode::Diagnostic);
+        let pieces: Vec<_> = parser.by_ref().collect();
+
+        if let Some(err) = parser.errors.into_iter().next() {
+            return Err(err);
+        }
         let mut warnings = Vec::new();
 
-        for piece in &mut parser {
-            match piece {
-                RpfPiece::Lit(lit) => {
-                    pieces.push(Piece::Lit(lit.into()));
-                }
+        let pieces = pieces
+            .into_iter()
+            .map(|piece| match piece {
+                RpfPiece::Lit(lit) => Piece::Lit(lit.into()),
                 RpfPiece::NextArgument(arg) => {
-                    warn_on_format_spec(arg.format.clone(), &mut warnings, span);
-                    let arg = parse_arg(&arg, ctx, &mut warnings, span);
-                    pieces.push(Piece::Arg(arg));
+                    warn_on_format_spec(&arg.format, &mut warnings, span, parser.is_source_literal);
+                    let arg = parse_arg(&arg, ctx, &mut warnings, span, parser.is_source_literal);
+                    Piece::Arg(arg)
                 }
-            }
-        }
+            })
+            .collect();
 
-        if parser.errors.is_empty() {
-            Ok(FormatString { input, pieces, span, warnings })
-        } else {
-            Err(parser.errors)
-        }
+        Ok(FormatString { input, pieces, span, warnings })
     }
 
     pub fn format(&self, args: &FormatArgs<'_>) -> String {
@@ -229,11 +228,12 @@ fn parse_arg<'tcx>(
     ctx: &Ctx<'tcx>,
     warnings: &mut Vec<FormatWarning>,
     input_span: Span,
+    is_source_literal: bool,
 ) -> FormatArg {
     let (Ctx::RustcOnUnimplemented { tcx, trait_def_id }
     | Ctx::DiagnosticOnUnimplemented { tcx, trait_def_id }) = ctx;
 
-    let span = slice_span(input_span, arg.position_span.clone());
+    let span = slice_span(input_span, arg.position_span.clone(), is_source_literal);
 
     match arg.position {
         // Something like "hello {name}"
@@ -283,39 +283,24 @@ fn parse_arg<'tcx>(
 
 /// `#[rustc_on_unimplemented]` and `#[diagnostic::...]` don't actually do anything
 /// with specifiers, so emit a warning if they are used.
-fn warn_on_format_spec(spec: FormatSpec<'_>, warnings: &mut Vec<FormatWarning>, input_span: Span) {
-    if !matches!(
-        spec,
-        FormatSpec {
-            fill: None,
-            fill_span: None,
-            align: Alignment::AlignUnknown,
-            sign: None,
-            alternate: false,
-            zero_pad: false,
-            debug_hex: None,
-            precision: Count::CountImplied,
-            precision_span: None,
-            width: Count::CountImplied,
-            width_span: None,
-            ty: _,
-            ty_span: _,
-        },
-    ) {
-        let span = spec.ty_span.map(|inner| slice_span(input_span, inner)).unwrap_or(input_span);
+fn warn_on_format_spec(
+    spec: &FormatSpec<'_>,
+    warnings: &mut Vec<FormatWarning>,
+    input_span: Span,
+    is_source_literal: bool,
+) {
+    if spec.ty != "" {
+        let span = spec
+            .ty_span
+            .as_ref()
+            .map(|inner| slice_span(input_span, inner.clone(), is_source_literal))
+            .unwrap_or(input_span);
         warnings.push(FormatWarning::InvalidSpecifier { span, name: spec.ty.into() })
     }
 }
 
-fn slice_span(input: Span, range: Range<usize>) -> Span {
-    let span = input.data();
-
-    Span::new(
-        span.lo + BytePos::from_usize(range.start),
-        span.lo + BytePos::from_usize(range.end),
-        span.ctxt,
-        span.parent,
-    )
+fn slice_span(input: Span, Range { start, end }: Range<usize>, is_source_literal: bool) -> Span {
+    if is_source_literal { input.from_inner(InnerSpan { start, end }) } else { input }
 }
 
 pub mod errors {
diff --git a/compiler/rustc_trait_selection/src/error_reporting/traits/suggestions.rs b/compiler/rustc_trait_selection/src/error_reporting/traits/suggestions.rs
index 68bd9440538..ee5a5b247ce 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/traits/suggestions.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/traits/suggestions.rs
@@ -2995,9 +2995,6 @@ impl<'a, 'tcx> TypeErrCtxt<'a, 'tcx> {
                 if local {
                     err.note("all local variables must have a statically known size");
                 }
-                if !tcx.features().unsized_locals() {
-                    err.help("unsized locals are gated as an unstable feature");
-                }
             }
             ObligationCauseCode::SizedArgumentType(hir_id) => {
                 let mut ty = None;
diff --git a/compiler/rustc_trait_selection/src/solve/delegate.rs b/compiler/rustc_trait_selection/src/solve/delegate.rs
index 69a0c0809b5..b247c2c2968 100644
--- a/compiler/rustc_trait_selection/src/solve/delegate.rs
+++ b/compiler/rustc_trait_selection/src/solve/delegate.rs
@@ -12,7 +12,7 @@ use rustc_infer::traits::solve::Goal;
 use rustc_middle::traits::query::NoSolution;
 use rustc_middle::traits::solve::Certainty;
 use rustc_middle::ty::{
-    self, Ty, TyCtxt, TypeFlags, TypeFoldable, TypeVisitableExt as _, TypingMode,
+    self, SizedTraitKind, Ty, TyCtxt, TypeFlags, TypeFoldable, TypeVisitableExt as _, TypingMode,
 };
 use rustc_span::{DUMMY_SP, ErrorGuaranteed, Span};
 
@@ -79,7 +79,14 @@ impl<'tcx> rustc_next_trait_solver::delegate::SolverDelegate for SolverDelegate<
                     Some(LangItem::Sized)
                         if self
                             .resolve_vars_if_possible(trait_pred.self_ty().skip_binder())
-                            .is_trivially_sized(self.0.tcx) =>
+                            .has_trivial_sizedness(self.0.tcx, SizedTraitKind::Sized) =>
+                    {
+                        return Some(Certainty::Yes);
+                    }
+                    Some(LangItem::MetaSized)
+                        if self
+                            .resolve_vars_if_possible(trait_pred.self_ty().skip_binder())
+                            .has_trivial_sizedness(self.0.tcx, SizedTraitKind::MetaSized) =>
                     {
                         return Some(Certainty::Yes);
                     }
diff --git a/compiler/rustc_trait_selection/src/solve/inspect/analyse.rs b/compiler/rustc_trait_selection/src/solve/inspect/analyse.rs
index d5d318ee490..b0c8fa1f217 100644
--- a/compiler/rustc_trait_selection/src/solve/inspect/analyse.rs
+++ b/compiler/rustc_trait_selection/src/solve/inspect/analyse.rs
@@ -11,7 +11,8 @@
 
 use std::assert_matches::assert_matches;
 
-use rustc_infer::infer::{DefineOpaqueTypes, InferCtxt, InferOk};
+use rustc_infer::infer::InferCtxt;
+use rustc_infer::traits::Obligation;
 use rustc_macros::extension;
 use rustc_middle::traits::ObligationCause;
 use rustc_middle::traits::solve::{Certainty, Goal, GoalSource, NoSolution, QueryResult};
@@ -20,7 +21,7 @@ use rustc_middle::{bug, ty};
 use rustc_next_trait_solver::resolve::eager_resolve_vars;
 use rustc_next_trait_solver::solve::inspect::{self, instantiate_canonical_state};
 use rustc_next_trait_solver::solve::{GenerateProofTree, MaybeCause, SolverDelegateEvalExt as _};
-use rustc_span::{DUMMY_SP, Span};
+use rustc_span::Span;
 use tracing::instrument;
 
 use crate::solve::delegate::SolverDelegate;
@@ -60,28 +61,29 @@ impl<'tcx> NormalizesToTermHack<'tcx> {
     /// Relate the `term` with the new `unconstrained_term` created
     /// when computing the proof tree for this `NormalizesTo` goals.
     /// This handles nested obligations.
-    fn constrain(
-        self,
+    fn constrain_and(
+        &self,
         infcx: &InferCtxt<'tcx>,
         span: Span,
         param_env: ty::ParamEnv<'tcx>,
+        f: impl FnOnce(&ObligationCtxt<'_, 'tcx>),
     ) -> Result<Certainty, NoSolution> {
-        infcx
-            .at(&ObligationCause::dummy_with_span(span), param_env)
-            .eq(DefineOpaqueTypes::Yes, self.term, self.unconstrained_term)
-            .map_err(|_| NoSolution)
-            .and_then(|InferOk { value: (), obligations }| {
-                let ocx = ObligationCtxt::new(infcx);
-                ocx.register_obligations(obligations);
-                let errors = ocx.select_all_or_error();
-                if errors.is_empty() {
-                    Ok(Certainty::Yes)
-                } else if errors.iter().all(|e| !e.is_true_error()) {
-                    Ok(Certainty::AMBIGUOUS)
-                } else {
-                    Err(NoSolution)
-                }
-            })
+        let ocx = ObligationCtxt::new(infcx);
+        ocx.eq(
+            &ObligationCause::dummy_with_span(span),
+            param_env,
+            self.term,
+            self.unconstrained_term,
+        )?;
+        f(&ocx);
+        let errors = ocx.select_all_or_error();
+        if errors.is_empty() {
+            Ok(Certainty::Yes)
+        } else if errors.iter().all(|e| !e.is_true_error()) {
+            Ok(Certainty::AMBIGUOUS)
+        } else {
+            Err(NoSolution)
+        }
     }
 }
 
@@ -160,11 +162,11 @@ impl<'a, 'tcx> InspectCandidate<'a, 'tcx> {
         let () =
             instantiate_canonical_state(infcx, span, param_env, &mut orig_values, self.final_state);
 
-        if let Some(term_hack) = self.goal.normalizes_to_term_hack {
+        if let Some(term_hack) = &self.goal.normalizes_to_term_hack {
             // FIXME: We ignore the expected term of `NormalizesTo` goals
             // when computing the result of its candidates. This is
             // scuffed.
-            let _ = term_hack.constrain(infcx, span, param_env);
+            let _ = term_hack.constrain_and(infcx, span, param_env, |_| {});
         }
 
         instantiated_goals
@@ -240,13 +242,39 @@ impl<'a, 'tcx> InspectCandidate<'a, 'tcx> {
                 // building their proof tree, the expected term was unconstrained, but when
                 // instantiating the candidate it is already constrained to the result of another
                 // candidate.
-                let proof_tree = infcx
-                    .probe(|_| infcx.evaluate_root_goal_raw(goal, GenerateProofTree::Yes, None).1);
+                let normalizes_to_term_hack = NormalizesToTermHack { term, unconstrained_term };
+                let (proof_tree, nested_goals_result) = infcx.probe(|_| {
+                    // Here, if we have any nested goals, then we make sure to apply them
+                    // considering the constrained RHS, and pass the resulting certainty to
+                    // `InspectGoal::new` so that the goal has the right result (and maintains
+                    // the impression that we don't do this normalizes-to infer hack at all).
+                    let (nested, proof_tree) =
+                        infcx.evaluate_root_goal_raw(goal, GenerateProofTree::Yes, None);
+                    let proof_tree = proof_tree.unwrap();
+                    let nested_goals_result = nested.and_then(|(nested, _)| {
+                        normalizes_to_term_hack.constrain_and(
+                            infcx,
+                            span,
+                            proof_tree.uncanonicalized_goal.param_env,
+                            |ocx| {
+                                ocx.register_obligations(nested.0.into_iter().map(|(_, goal)| {
+                                    Obligation::new(
+                                        infcx.tcx,
+                                        ObligationCause::dummy_with_span(span),
+                                        goal.param_env,
+                                        goal.predicate,
+                                    )
+                                }));
+                            },
+                        )
+                    });
+                    (proof_tree, nested_goals_result)
+                });
                 InspectGoal::new(
                     infcx,
                     self.goal.depth + 1,
-                    proof_tree.unwrap(),
-                    Some(NormalizesToTermHack { term, unconstrained_term }),
+                    proof_tree,
+                    Some((normalizes_to_term_hack, nested_goals_result)),
                     source,
                 )
             }
@@ -393,20 +421,21 @@ impl<'a, 'tcx> InspectGoal<'a, 'tcx> {
         infcx: &'a InferCtxt<'tcx>,
         depth: usize,
         root: inspect::GoalEvaluation<TyCtxt<'tcx>>,
-        normalizes_to_term_hack: Option<NormalizesToTermHack<'tcx>>,
+        term_hack_and_nested_certainty: Option<(
+            NormalizesToTermHack<'tcx>,
+            Result<Certainty, NoSolution>,
+        )>,
         source: GoalSource,
     ) -> Self {
         let infcx = <&SolverDelegate<'tcx>>::from(infcx);
 
         let inspect::GoalEvaluation { uncanonicalized_goal, orig_values, evaluation } = root;
+        // If there's a normalizes-to goal, AND the evaluation result with the result of
+        // constraining the normalizes-to RHS and computing the nested goals.
         let result = evaluation.result.and_then(|ok| {
-            if let Some(term_hack) = normalizes_to_term_hack {
-                infcx
-                    .probe(|_| term_hack.constrain(infcx, DUMMY_SP, uncanonicalized_goal.param_env))
-                    .map(|certainty| ok.value.certainty.and(certainty))
-            } else {
-                Ok(ok.value.certainty)
-            }
+            let nested_goals_certainty =
+                term_hack_and_nested_certainty.map_or(Ok(Certainty::Yes), |(_, c)| c)?;
+            Ok(ok.value.certainty.and(nested_goals_certainty))
         });
 
         InspectGoal {
@@ -416,7 +445,7 @@ impl<'a, 'tcx> InspectGoal<'a, 'tcx> {
             goal: eager_resolve_vars(infcx, uncanonicalized_goal),
             result,
             evaluation_kind: evaluation.kind,
-            normalizes_to_term_hack,
+            normalizes_to_term_hack: term_hack_and_nested_certainty.map(|(n, _)| n),
             source,
         }
     }
diff --git a/compiler/rustc_trait_selection/src/traits/coherence.rs b/compiler/rustc_trait_selection/src/traits/coherence.rs
index 93c7dae9c5b..81893cdcc7e 100644
--- a/compiler/rustc_trait_selection/src/traits/coherence.rs
+++ b/compiler/rustc_trait_selection/src/traits/coherence.rs
@@ -462,6 +462,7 @@ fn impl_intersection_has_negative_obligation(
     let param_env = infcx.resolve_vars_if_possible(param_env);
 
     util::elaborate(tcx, tcx.predicates_of(impl2_def_id).instantiate(tcx, impl2_header.impl_args))
+        .elaborate_sized()
         .any(|(clause, _)| try_prove_negated_where_clause(infcx, clause, param_env))
 }
 
diff --git a/compiler/rustc_trait_selection/src/traits/dyn_compatibility.rs b/compiler/rustc_trait_selection/src/traits/dyn_compatibility.rs
index 220a847cc23..ee30956295a 100644
--- a/compiler/rustc_trait_selection/src/traits/dyn_compatibility.rs
+++ b/compiler/rustc_trait_selection/src/traits/dyn_compatibility.rs
@@ -7,15 +7,15 @@
 use std::ops::ControlFlow;
 
 use rustc_errors::FatalError;
-use rustc_hir as hir;
 use rustc_hir::def_id::DefId;
+use rustc_hir::{self as hir, LangItem};
 use rustc_middle::query::Providers;
 use rustc_middle::ty::{
     self, EarlyBinder, GenericArgs, Ty, TyCtxt, TypeFoldable, TypeFolder, TypeSuperFoldable,
     TypeSuperVisitable, TypeVisitable, TypeVisitableExt, TypeVisitor, TypingMode, Upcast,
     elaborate,
 };
-use rustc_span::Span;
+use rustc_span::{DUMMY_SP, Span};
 use smallvec::SmallVec;
 use tracing::{debug, instrument};
 
@@ -414,8 +414,8 @@ fn virtual_call_violations_for_method<'tcx>(
 
     let receiver_ty = tcx.liberate_late_bound_regions(method.def_id, sig.input(0));
 
-    // Until `unsized_locals` is fully implemented, `self: Self` can't be dispatched on.
-    // However, this is already considered dyn compatible. We allow it as a special case here.
+    // `self: Self` can't be dispatched on.
+    // However, this is considered dyn compatible. We allow it as a special case here.
     // FIXME(mikeyhew) get rid of this `if` statement once `receiver_is_dispatchable` allows
     // `Receiver: Unsize<Receiver[Self => dyn Trait]>`.
     if receiver_ty != tcx.types.self_param {
@@ -543,11 +543,11 @@ fn receiver_for_self_ty<'tcx>(
 /// In practice, we cannot use `dyn Trait` explicitly in the obligation because it would result in
 /// a new check that `Trait` is dyn-compatible, creating a cycle.
 /// Instead, we emulate a placeholder by introducing a new type parameter `U` such that
-/// `Self: Unsize<U>` and `U: Trait + ?Sized`, and use `U` in place of `dyn Trait`.
+/// `Self: Unsize<U>` and `U: Trait + MetaSized`, and use `U` in place of `dyn Trait`.
 ///
 /// Written as a chalk-style query:
 /// ```ignore (not-rust)
-/// forall (U: Trait + ?Sized) {
+/// forall (U: Trait + MetaSized) {
 ///     if (Self: Unsize<U>) {
 ///         Receiver: DispatchFromDyn<Receiver[Self => U]>
 ///     }
@@ -567,9 +567,10 @@ fn receiver_is_dispatchable<'tcx>(
 ) -> bool {
     debug!("receiver_is_dispatchable: method = {:?}, receiver_ty = {:?}", method, receiver_ty);
 
-    let traits = (tcx.lang_items().unsize_trait(), tcx.lang_items().dispatch_from_dyn_trait());
-    let (Some(unsize_did), Some(dispatch_from_dyn_did)) = traits else {
-        debug!("receiver_is_dispatchable: Missing Unsize or DispatchFromDyn traits");
+    let (Some(unsize_did), Some(dispatch_from_dyn_did)) =
+        (tcx.lang_items().unsize_trait(), tcx.lang_items().dispatch_from_dyn_trait())
+    else {
+        debug!("receiver_is_dispatchable: Missing `Unsize` or `DispatchFromDyn` traits");
         return false;
     };
 
@@ -583,7 +584,7 @@ fn receiver_is_dispatchable<'tcx>(
         receiver_for_self_ty(tcx, receiver_ty, unsized_self_ty, method.def_id);
 
     // create a modified param env, with `Self: Unsize<U>` and `U: Trait` (and all of
-    // its supertraits) added to caller bounds. `U: ?Sized` is already implied here.
+    // its supertraits) added to caller bounds. `U: MetaSized` is already implied here.
     let param_env = {
         // N.B. We generally want to emulate the construction of the `unnormalized_param_env`
         // in the param-env query here. The fact that we don't just start with the clauses
@@ -612,6 +613,12 @@ fn receiver_is_dispatchable<'tcx>(
         let trait_predicate = ty::TraitRef::new_from_args(tcx, trait_def_id, args);
         predicates.push(trait_predicate.upcast(tcx));
 
+        let meta_sized_predicate = {
+            let meta_sized_did = tcx.require_lang_item(LangItem::MetaSized, DUMMY_SP);
+            ty::TraitRef::new(tcx, meta_sized_did, [unsized_self_ty]).upcast(tcx)
+        };
+        predicates.push(meta_sized_predicate);
+
         normalize_param_env_or_error(
             tcx,
             ty::ParamEnv::new(tcx.mk_clauses(&predicates)),
diff --git a/compiler/rustc_trait_selection/src/traits/normalize.rs b/compiler/rustc_trait_selection/src/traits/normalize.rs
index 35a43b294ee..9e02ce32b21 100644
--- a/compiler/rustc_trait_selection/src/traits/normalize.rs
+++ b/compiler/rustc_trait_selection/src/traits/normalize.rs
@@ -224,7 +224,7 @@ impl<'a, 'b, 'tcx> AssocTypeNormalizer<'a, 'b, 'tcx> {
             )
             .ok()
             .flatten()
-            .unwrap_or(proj.to_term(infcx.tcx));
+            .unwrap_or_else(|| proj.to_term(infcx.tcx));
 
             PlaceholderReplacer::replace_placeholders(
                 infcx,
diff --git a/compiler/rustc_trait_selection/src/traits/query/normalize.rs b/compiler/rustc_trait_selection/src/traits/query/normalize.rs
index eb34cb10c68..a54eb80fedc 100644
--- a/compiler/rustc_trait_selection/src/traits/query/normalize.rs
+++ b/compiler/rustc_trait_selection/src/traits/query/normalize.rs
@@ -9,7 +9,7 @@ use rustc_macros::extension;
 pub use rustc_middle::traits::query::NormalizationResult;
 use rustc_middle::ty::{
     self, FallibleTypeFolder, Ty, TyCtxt, TypeFoldable, TypeSuperFoldable, TypeSuperVisitable,
-    TypeVisitableExt, TypeVisitor, TypingMode,
+    TypeVisitable, TypeVisitableExt, TypeVisitor, TypingMode,
 };
 use rustc_span::DUMMY_SP;
 use tracing::{debug, info, instrument};
@@ -127,7 +127,7 @@ struct MaxEscapingBoundVarVisitor {
 }
 
 impl<'tcx> TypeVisitor<TyCtxt<'tcx>> for MaxEscapingBoundVarVisitor {
-    fn visit_binder<T: TypeFoldable<TyCtxt<'tcx>>>(&mut self, t: &ty::Binder<'tcx, T>) {
+    fn visit_binder<T: TypeVisitable<TyCtxt<'tcx>>>(&mut self, t: &ty::Binder<'tcx, T>) {
         self.outer_index.shift_in(1);
         t.super_visit_with(self);
         self.outer_index.shift_out(1);
diff --git a/compiler/rustc_trait_selection/src/traits/select/candidate_assembly.rs b/compiler/rustc_trait_selection/src/traits/select/candidate_assembly.rs
index 97ecf9702e6..81ce58a93fa 100644
--- a/compiler/rustc_trait_selection/src/traits/select/candidate_assembly.rs
+++ b/compiler/rustc_trait_selection/src/traits/select/candidate_assembly.rs
@@ -14,7 +14,7 @@ use rustc_data_structures::fx::{FxHashSet, FxIndexSet};
 use rustc_hir::{self as hir, CoroutineDesugaring, CoroutineKind};
 use rustc_infer::traits::{Obligation, PolyTraitObligation, SelectionError};
 use rustc_middle::ty::fast_reject::DeepRejectCtxt;
-use rustc_middle::ty::{self, Ty, TypeVisitableExt, TypingMode, elaborate};
+use rustc_middle::ty::{self, SizedTraitKind, Ty, TypeVisitableExt, TypingMode, elaborate};
 use rustc_middle::{bug, span_bug};
 use tracing::{debug, instrument, trace};
 
@@ -87,7 +87,21 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
                     candidates.vec.push(BuiltinCandidate { has_nested: false });
                 }
                 Some(LangItem::Sized) => {
-                    self.assemble_builtin_sized_candidate(obligation, &mut candidates);
+                    self.assemble_builtin_sized_candidate(
+                        obligation,
+                        &mut candidates,
+                        SizedTraitKind::Sized,
+                    );
+                }
+                Some(LangItem::MetaSized) => {
+                    self.assemble_builtin_sized_candidate(
+                        obligation,
+                        &mut candidates,
+                        SizedTraitKind::MetaSized,
+                    );
+                }
+                Some(LangItem::PointeeSized) => {
+                    bug!("`PointeeSized` is removed during lowering");
                 }
                 Some(LangItem::Unsize) => {
                     self.assemble_candidates_for_unsizing(obligation, &mut candidates);
@@ -201,6 +215,12 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
                     }
 
                     selcx.infcx.probe(|_| {
+                        let bound = util::lazily_elaborate_sizedness_candidate(
+                            selcx.infcx,
+                            obligation,
+                            bound,
+                        );
+
                         // We checked the polarity already
                         match selcx.match_normalize_trait_ref(
                             obligation,
@@ -245,14 +265,21 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
             .caller_bounds()
             .iter()
             .filter_map(|p| p.as_trait_clause())
-            // Micro-optimization: filter out predicates relating to different traits.
-            .filter(|p| p.def_id() == stack.obligation.predicate.def_id())
+            // Micro-optimization: filter out predicates with different polarities.
             .filter(|p| p.polarity() == stack.obligation.predicate.polarity());
 
         let drcx = DeepRejectCtxt::relate_rigid_rigid(self.tcx());
         let obligation_args = stack.obligation.predicate.skip_binder().trait_ref.args;
         // Keep only those bounds which may apply, and propagate overflow if it occurs.
         for bound in bounds {
+            let bound =
+                util::lazily_elaborate_sizedness_candidate(self.infcx, stack.obligation, bound);
+
+            // Micro-optimization: filter out predicates relating to different traits.
+            if bound.def_id() != stack.obligation.predicate.def_id() {
+                continue;
+            }
+
             let bound_trait_ref = bound.map_bound(|t| t.trait_ref);
             if !drcx.args_may_unify(obligation_args, bound_trait_ref.skip_binder().args) {
                 continue;
@@ -1086,15 +1113,15 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
         }
     }
 
-    /// Assembles the trait which are built-in to the language itself:
-    /// `Copy`, `Clone` and `Sized`.
+    /// Assembles the `Sized` and `MetaSized` traits which are built-in to the language itself.
     #[instrument(level = "debug", skip(self, candidates))]
     fn assemble_builtin_sized_candidate(
         &mut self,
         obligation: &PolyTraitObligation<'tcx>,
         candidates: &mut SelectionCandidateSet<'tcx>,
+        sizedness: SizedTraitKind,
     ) {
-        match self.sized_conditions(obligation) {
+        match self.sizedness_conditions(obligation, sizedness) {
             BuiltinImplConditions::Where(nested) => {
                 candidates
                     .vec
diff --git a/compiler/rustc_trait_selection/src/traits/select/confirmation.rs b/compiler/rustc_trait_selection/src/traits/select/confirmation.rs
index 7acf0f990d1..80f71c78993 100644
--- a/compiler/rustc_trait_selection/src/traits/select/confirmation.rs
+++ b/compiler/rustc_trait_selection/src/traits/select/confirmation.rs
@@ -9,13 +9,14 @@
 
 use std::ops::ControlFlow;
 
-use rustc_ast::Mutability;
 use rustc_data_structures::stack::ensure_sufficient_stack;
 use rustc_hir::lang_items::LangItem;
 use rustc_infer::infer::{DefineOpaqueTypes, HigherRankedType, InferOk};
 use rustc_infer::traits::ObligationCauseCode;
 use rustc_middle::traits::{BuiltinImplSource, SignatureMismatchData};
-use rustc_middle::ty::{self, GenericArgsRef, Ty, TyCtxt, Upcast, elaborate};
+use rustc_middle::ty::{
+    self, GenericArgsRef, Region, SizedTraitKind, Ty, TyCtxt, Upcast, elaborate,
+};
 use rustc_middle::{bug, span_bug};
 use rustc_span::def_id::DefId;
 use thin_vec::thin_vec;
@@ -165,10 +166,13 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
             )
             .break_value()
             .expect("expected to index into clause that exists");
-        let candidate = candidate_predicate
+        let candidate_predicate = candidate_predicate
             .as_trait_clause()
-            .expect("projection candidate is not a trait predicate")
-            .map_bound(|t| t.trait_ref);
+            .expect("projection candidate is not a trait predicate");
+        let candidate_predicate =
+            util::lazily_elaborate_sizedness_candidate(self.infcx, obligation, candidate_predicate);
+
+        let candidate = candidate_predicate.map_bound(|t| t.trait_ref);
 
         let candidate = self.infcx.instantiate_binder_with_fresh_vars(
             obligation.cause.span,
@@ -225,6 +229,13 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
     ) -> PredicateObligations<'tcx> {
         debug!(?obligation, ?param, "confirm_param_candidate");
 
+        let param = util::lazily_elaborate_sizedness_candidate(
+            self.infcx,
+            obligation,
+            param.upcast(self.infcx.tcx),
+        )
+        .map_bound(|p| p.trait_ref);
+
         // During evaluation, we already checked that this
         // where-clause trait-ref could be unified with the obligation
         // trait-ref. Repeat that unification now without any
@@ -252,7 +263,15 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
         let obligations = if has_nested {
             let trait_def = obligation.predicate.def_id();
             let conditions = match tcx.as_lang_item(trait_def) {
-                Some(LangItem::Sized) => self.sized_conditions(obligation),
+                Some(LangItem::Sized) => {
+                    self.sizedness_conditions(obligation, SizedTraitKind::Sized)
+                }
+                Some(LangItem::MetaSized) => {
+                    self.sizedness_conditions(obligation, SizedTraitKind::MetaSized)
+                }
+                Some(LangItem::PointeeSized) => {
+                    bug!("`PointeeSized` is removing during lowering");
+                }
                 Some(LangItem::Copy | LangItem::Clone) => self.copy_clone_conditions(obligation),
                 Some(LangItem::FusedIterator) => self.fused_iterator_conditions(obligation),
                 other => bug!("unexpected builtin trait {trait_def:?} ({other:?})"),
@@ -286,99 +305,12 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
     ) -> Result<PredicateObligations<'tcx>, SelectionError<'tcx>> {
         use rustc_transmute::{Answer, Assume, Condition};
 
-        /// Generate sub-obligations for reference-to-reference transmutations.
-        fn reference_obligations<'tcx>(
-            tcx: TyCtxt<'tcx>,
-            obligation: &PolyTraitObligation<'tcx>,
-            (src_lifetime, src_ty, src_mut): (ty::Region<'tcx>, Ty<'tcx>, Mutability),
-            (dst_lifetime, dst_ty, dst_mut): (ty::Region<'tcx>, Ty<'tcx>, Mutability),
-            assume: Assume,
-        ) -> PredicateObligations<'tcx> {
-            let make_transmute_obl = |src, dst| {
-                let transmute_trait = obligation.predicate.def_id();
-                let assume = obligation.predicate.skip_binder().trait_ref.args.const_at(2);
-                let trait_ref = ty::TraitRef::new(
-                    tcx,
-                    transmute_trait,
-                    [
-                        ty::GenericArg::from(dst),
-                        ty::GenericArg::from(src),
-                        ty::GenericArg::from(assume),
-                    ],
-                );
-                Obligation::with_depth(
-                    tcx,
-                    obligation.cause.clone(),
-                    obligation.recursion_depth + 1,
-                    obligation.param_env,
-                    trait_ref,
-                )
-            };
-
-            let make_freeze_obl = |ty| {
-                let trait_ref = ty::TraitRef::new(
-                    tcx,
-                    tcx.require_lang_item(LangItem::Freeze, obligation.cause.span),
-                    [ty::GenericArg::from(ty)],
-                );
-                Obligation::with_depth(
-                    tcx,
-                    obligation.cause.clone(),
-                    obligation.recursion_depth + 1,
-                    obligation.param_env,
-                    trait_ref,
-                )
-            };
-
-            let make_outlives_obl = |target, region| {
-                let outlives = ty::OutlivesPredicate(target, region);
-                Obligation::with_depth(
-                    tcx,
-                    obligation.cause.clone(),
-                    obligation.recursion_depth + 1,
-                    obligation.param_env,
-                    outlives,
-                )
-            };
-
-            // Given a transmutation from `&'a (mut) Src` and `&'dst (mut) Dst`,
-            // it is always the case that `Src` must be transmutable into `Dst`,
-            // and that that `'src` must outlive `'dst`.
-            let mut obls = PredicateObligations::with_capacity(1);
-            obls.push(make_transmute_obl(src_ty, dst_ty));
-            if !assume.lifetimes {
-                obls.push(make_outlives_obl(src_lifetime, dst_lifetime));
-            }
-
-            // Given a transmutation from `&Src`, both `Src` and `Dst` must be
-            // `Freeze`, otherwise, using the transmuted value could lead to
-            // data races.
-            if src_mut == Mutability::Not {
-                obls.extend([make_freeze_obl(src_ty), make_freeze_obl(dst_ty)])
-            }
-
-            // Given a transmutation into `&'dst mut Dst`, it also must be the
-            // case that `Dst` is transmutable into `Src`. For example,
-            // transmuting bool -> u8 is OK as long as you can't update that u8
-            // to be > 1, because you could later transmute the u8 back to a
-            // bool and get undefined behavior. It also must be the case that
-            // `'dst` lives exactly as long as `'src`.
-            if dst_mut == Mutability::Mut {
-                obls.push(make_transmute_obl(dst_ty, src_ty));
-                if !assume.lifetimes {
-                    obls.push(make_outlives_obl(dst_lifetime, src_lifetime));
-                }
-            }
-
-            obls
-        }
-
         /// Flatten the `Condition` tree into a conjunction of obligations.
         #[instrument(level = "debug", skip(tcx, obligation))]
         fn flatten_answer_tree<'tcx>(
             tcx: TyCtxt<'tcx>,
             obligation: &PolyTraitObligation<'tcx>,
-            cond: Condition<rustc_transmute::layout::rustc::Ref<'tcx>>,
+            cond: Condition<Region<'tcx>, Ty<'tcx>>,
             assume: Assume,
         ) -> PredicateObligations<'tcx> {
             match cond {
@@ -388,13 +320,50 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
                     .into_iter()
                     .flat_map(|cond| flatten_answer_tree(tcx, obligation, cond, assume))
                     .collect(),
-                Condition::IfTransmutable { src, dst } => reference_obligations(
-                    tcx,
-                    obligation,
-                    (src.lifetime, src.ty, src.mutability),
-                    (dst.lifetime, dst.ty, dst.mutability),
-                    assume,
-                ),
+                Condition::Immutable { ty } => {
+                    let trait_ref = ty::TraitRef::new(
+                        tcx,
+                        tcx.require_lang_item(LangItem::Freeze, obligation.cause.span),
+                        [ty::GenericArg::from(ty)],
+                    );
+                    thin_vec![Obligation::with_depth(
+                        tcx,
+                        obligation.cause.clone(),
+                        obligation.recursion_depth + 1,
+                        obligation.param_env,
+                        trait_ref,
+                    )]
+                }
+                Condition::Outlives { long, short } => {
+                    let outlives = ty::OutlivesPredicate(long, short);
+                    thin_vec![Obligation::with_depth(
+                        tcx,
+                        obligation.cause.clone(),
+                        obligation.recursion_depth + 1,
+                        obligation.param_env,
+                        outlives,
+                    )]
+                }
+                Condition::Transmutable { src, dst } => {
+                    let transmute_trait = obligation.predicate.def_id();
+                    let assume = obligation.predicate.skip_binder().trait_ref.args.const_at(2);
+                    let trait_ref = ty::TraitRef::new(
+                        tcx,
+                        transmute_trait,
+                        [
+                            ty::GenericArg::from(dst),
+                            ty::GenericArg::from(src),
+                            ty::GenericArg::from(assume),
+                        ],
+                    );
+                    thin_vec![Obligation::with_depth(
+                        tcx,
+                        obligation.cause.clone(),
+                        obligation.recursion_depth + 1,
+                        obligation.param_env,
+                        trait_ref,
+                    )]
+                }
             }
         }
 
diff --git a/compiler/rustc_trait_selection/src/traits/select/mod.rs b/compiler/rustc_trait_selection/src/traits/select/mod.rs
index 3a2f9e8ca17..9c0ccb26e53 100644
--- a/compiler/rustc_trait_selection/src/traits/select/mod.rs
+++ b/compiler/rustc_trait_selection/src/traits/select/mod.rs
@@ -27,8 +27,8 @@ use rustc_middle::ty::abstract_const::NotConstEvaluatable;
 use rustc_middle::ty::error::TypeErrorToStringExt;
 use rustc_middle::ty::print::{PrintTraitRefExt as _, with_no_trimmed_paths};
 use rustc_middle::ty::{
-    self, DeepRejectCtxt, GenericArgsRef, PolyProjectionPredicate, Ty, TyCtxt, TypeFoldable,
-    TypeVisitableExt, TypingMode, Upcast, elaborate,
+    self, DeepRejectCtxt, GenericArgsRef, PolyProjectionPredicate, SizedTraitKind, Ty, TyCtxt,
+    TypeFoldable, TypeVisitableExt, TypingMode, Upcast, elaborate,
 };
 use rustc_span::{Symbol, sym};
 use tracing::{debug, instrument, trace};
@@ -1919,12 +1919,23 @@ impl<'tcx> SelectionContext<'_, 'tcx> {
         // impl `impl<T: ?Sized> Any for T { .. }`. This really shouldn't exist but is
         // necessary due to #57893. We again arbitrarily prefer the applicable candidate
         // with the lowest index.
+        //
+        // We do not want to use these impls to guide inference in case a user-written impl
+        // may also apply.
         let object_bound = candidates
             .iter()
             .filter_map(|c| if let ObjectCandidate(i) = c.candidate { Some(i) } else { None })
             .try_reduce(|c1, c2| if has_non_region_infer { None } else { Some(c1.min(c2)) });
         match object_bound {
-            Some(Some(index)) => return Some(ObjectCandidate(index)),
+            Some(Some(index)) => {
+                return if has_non_region_infer
+                    && candidates.iter().any(|c| matches!(c.candidate, ImplCandidate(_)))
+                {
+                    None
+                } else {
+                    Some(ObjectCandidate(index))
+                };
+            }
             Some(None) => {}
             None => return None,
         }
@@ -2083,9 +2094,10 @@ impl<'tcx> SelectionContext<'_, 'tcx> {
 }
 
 impl<'tcx> SelectionContext<'_, 'tcx> {
-    fn sized_conditions(
+    fn sizedness_conditions(
         &mut self,
         obligation: &PolyTraitObligation<'tcx>,
+        sizedness: SizedTraitKind,
     ) -> BuiltinImplConditions<'tcx> {
         use self::BuiltinImplConditions::{Ambiguous, None, Where};
 
@@ -2115,7 +2127,12 @@ impl<'tcx> SelectionContext<'_, 'tcx> {
                 Where(ty::Binder::dummy(Vec::new()))
             }
 
-            ty::Str | ty::Slice(_) | ty::Dynamic(..) | ty::Foreign(..) => None,
+            ty::Str | ty::Slice(_) | ty::Dynamic(..) => match sizedness {
+                SizedTraitKind::Sized => None,
+                SizedTraitKind::MetaSized => Where(ty::Binder::dummy(Vec::new())),
+            },
+
+            ty::Foreign(..) => None,
 
             ty::Tuple(tys) => Where(
                 obligation.predicate.rebind(tys.last().map_or_else(Vec::new, |&last| vec![last])),
@@ -2124,11 +2141,9 @@ impl<'tcx> SelectionContext<'_, 'tcx> {
             ty::Pat(ty, _) => Where(obligation.predicate.rebind(vec![*ty])),
 
             ty::Adt(def, args) => {
-                if let Some(sized_crit) = def.sized_constraint(self.tcx()) {
+                if let Some(crit) = def.sizedness_constraint(self.tcx(), sizedness) {
                     // (*) binder moved here
-                    Where(
-                        obligation.predicate.rebind(vec![sized_crit.instantiate(self.tcx(), args)]),
-                    )
+                    Where(obligation.predicate.rebind(vec![crit.instantiate(self.tcx(), args)]))
                 } else {
                     Where(ty::Binder::dummy(Vec::new()))
                 }
diff --git a/compiler/rustc_trait_selection/src/traits/util.rs b/compiler/rustc_trait_selection/src/traits/util.rs
index 035fd38c48a..a05bae53566 100644
--- a/compiler/rustc_trait_selection/src/traits/util.rs
+++ b/compiler/rustc_trait_selection/src/traits/util.rs
@@ -1,14 +1,18 @@
-use std::collections::{BTreeMap, VecDeque};
+use std::collections::VecDeque;
 
 use rustc_data_structures::fx::{FxHashSet, FxIndexMap};
 use rustc_hir::LangItem;
 use rustc_hir::def_id::DefId;
 use rustc_infer::infer::InferCtxt;
+use rustc_infer::traits::PolyTraitObligation;
 pub use rustc_infer::traits::util::*;
 use rustc_middle::bug;
+use rustc_middle::ty::fast_reject::DeepRejectCtxt;
 use rustc_middle::ty::{
-    self, Ty, TyCtxt, TypeFoldable, TypeFolder, TypeSuperFoldable, TypeVisitableExt,
+    self, PolyTraitPredicate, SizedTraitKind, TraitPredicate, TraitRef, Ty, TyCtxt, TypeFoldable,
+    TypeFolder, TypeSuperFoldable, TypeVisitableExt,
 };
+pub use rustc_next_trait_solver::placeholder::BoundVarReplacer;
 use rustc_span::Span;
 use smallvec::{SmallVec, smallvec};
 use tracing::debug;
@@ -212,158 +216,12 @@ pub fn with_replaced_escaping_bound_vars<
     }
 }
 
-pub struct BoundVarReplacer<'a, 'tcx> {
-    infcx: &'a InferCtxt<'tcx>,
-    // These three maps track the bound variable that were replaced by placeholders. It might be
-    // nice to remove these since we already have the `kind` in the placeholder; we really just need
-    // the `var` (but we *could* bring that into scope if we were to track them as we pass them).
-    mapped_regions: FxIndexMap<ty::PlaceholderRegion, ty::BoundRegion>,
-    mapped_types: FxIndexMap<ty::PlaceholderType, ty::BoundTy>,
-    mapped_consts: BTreeMap<ty::PlaceholderConst, ty::BoundVar>,
-    // The current depth relative to *this* folding, *not* the entire normalization. In other words,
-    // the depth of binders we've passed here.
-    current_index: ty::DebruijnIndex,
-    // The `UniverseIndex` of the binding levels above us. These are optional, since we are lazy:
-    // we don't actually create a universe until we see a bound var we have to replace.
-    universe_indices: &'a mut Vec<Option<ty::UniverseIndex>>,
-}
-
-impl<'a, 'tcx> BoundVarReplacer<'a, 'tcx> {
-    /// Returns `Some` if we *were* able to replace bound vars. If there are any bound vars that
-    /// use a binding level above `universe_indices.len()`, we fail.
-    pub fn replace_bound_vars<T: TypeFoldable<TyCtxt<'tcx>>>(
-        infcx: &'a InferCtxt<'tcx>,
-        universe_indices: &'a mut Vec<Option<ty::UniverseIndex>>,
-        value: T,
-    ) -> (
-        T,
-        FxIndexMap<ty::PlaceholderRegion, ty::BoundRegion>,
-        FxIndexMap<ty::PlaceholderType, ty::BoundTy>,
-        BTreeMap<ty::PlaceholderConst, ty::BoundVar>,
-    ) {
-        let mapped_regions: FxIndexMap<ty::PlaceholderRegion, ty::BoundRegion> =
-            FxIndexMap::default();
-        let mapped_types: FxIndexMap<ty::PlaceholderType, ty::BoundTy> = FxIndexMap::default();
-        let mapped_consts: BTreeMap<ty::PlaceholderConst, ty::BoundVar> = BTreeMap::new();
-
-        let mut replacer = BoundVarReplacer {
-            infcx,
-            mapped_regions,
-            mapped_types,
-            mapped_consts,
-            current_index: ty::INNERMOST,
-            universe_indices,
-        };
-
-        let value = value.fold_with(&mut replacer);
-
-        (value, replacer.mapped_regions, replacer.mapped_types, replacer.mapped_consts)
-    }
-
-    fn universe_for(&mut self, debruijn: ty::DebruijnIndex) -> ty::UniverseIndex {
-        let infcx = self.infcx;
-        let index =
-            self.universe_indices.len() + self.current_index.as_usize() - debruijn.as_usize() - 1;
-        let universe = self.universe_indices[index].unwrap_or_else(|| {
-            for i in self.universe_indices.iter_mut().take(index + 1) {
-                *i = i.or_else(|| Some(infcx.create_next_universe()))
-            }
-            self.universe_indices[index].unwrap()
-        });
-        universe
-    }
-}
-
-impl<'tcx> TypeFolder<TyCtxt<'tcx>> for BoundVarReplacer<'_, 'tcx> {
-    fn cx(&self) -> TyCtxt<'tcx> {
-        self.infcx.tcx
-    }
-
-    fn fold_binder<T: TypeFoldable<TyCtxt<'tcx>>>(
-        &mut self,
-        t: ty::Binder<'tcx, T>,
-    ) -> ty::Binder<'tcx, T> {
-        self.current_index.shift_in(1);
-        let t = t.super_fold_with(self);
-        self.current_index.shift_out(1);
-        t
-    }
-
-    fn fold_region(&mut self, r: ty::Region<'tcx>) -> ty::Region<'tcx> {
-        match r.kind() {
-            ty::ReBound(debruijn, _)
-                if debruijn.as_usize()
-                    >= self.current_index.as_usize() + self.universe_indices.len() =>
-            {
-                bug!(
-                    "Bound vars {r:#?} outside of `self.universe_indices`: {:#?}",
-                    self.universe_indices
-                );
-            }
-            ty::ReBound(debruijn, br) if debruijn >= self.current_index => {
-                let universe = self.universe_for(debruijn);
-                let p = ty::PlaceholderRegion { universe, bound: br };
-                self.mapped_regions.insert(p, br);
-                ty::Region::new_placeholder(self.infcx.tcx, p)
-            }
-            _ => r,
-        }
-    }
-
-    fn fold_ty(&mut self, t: Ty<'tcx>) -> Ty<'tcx> {
-        match *t.kind() {
-            ty::Bound(debruijn, _)
-                if debruijn.as_usize() + 1
-                    > self.current_index.as_usize() + self.universe_indices.len() =>
-            {
-                bug!(
-                    "Bound vars {t:#?} outside of `self.universe_indices`: {:#?}",
-                    self.universe_indices
-                );
-            }
-            ty::Bound(debruijn, bound_ty) if debruijn >= self.current_index => {
-                let universe = self.universe_for(debruijn);
-                let p = ty::PlaceholderType { universe, bound: bound_ty };
-                self.mapped_types.insert(p, bound_ty);
-                Ty::new_placeholder(self.infcx.tcx, p)
-            }
-            _ if t.has_vars_bound_at_or_above(self.current_index) => t.super_fold_with(self),
-            _ => t,
-        }
-    }
-
-    fn fold_const(&mut self, ct: ty::Const<'tcx>) -> ty::Const<'tcx> {
-        match ct.kind() {
-            ty::ConstKind::Bound(debruijn, _)
-                if debruijn.as_usize() + 1
-                    > self.current_index.as_usize() + self.universe_indices.len() =>
-            {
-                bug!(
-                    "Bound vars {ct:#?} outside of `self.universe_indices`: {:#?}",
-                    self.universe_indices
-                );
-            }
-            ty::ConstKind::Bound(debruijn, bound_const) if debruijn >= self.current_index => {
-                let universe = self.universe_for(debruijn);
-                let p = ty::PlaceholderConst { universe, bound: bound_const };
-                self.mapped_consts.insert(p, bound_const);
-                ty::Const::new_placeholder(self.infcx.tcx, p)
-            }
-            _ => ct.super_fold_with(self),
-        }
-    }
-
-    fn fold_predicate(&mut self, p: ty::Predicate<'tcx>) -> ty::Predicate<'tcx> {
-        if p.has_vars_bound_at_or_above(self.current_index) { p.super_fold_with(self) } else { p }
-    }
-}
-
 /// The inverse of [`BoundVarReplacer`]: replaces placeholders with the bound vars from which they came.
 pub struct PlaceholderReplacer<'a, 'tcx> {
     infcx: &'a InferCtxt<'tcx>,
     mapped_regions: FxIndexMap<ty::PlaceholderRegion, ty::BoundRegion>,
     mapped_types: FxIndexMap<ty::PlaceholderType, ty::BoundTy>,
-    mapped_consts: BTreeMap<ty::PlaceholderConst, ty::BoundVar>,
+    mapped_consts: FxIndexMap<ty::PlaceholderConst, ty::BoundVar>,
     universe_indices: &'a [Option<ty::UniverseIndex>],
     current_index: ty::DebruijnIndex,
 }
@@ -373,7 +231,7 @@ impl<'a, 'tcx> PlaceholderReplacer<'a, 'tcx> {
         infcx: &'a InferCtxt<'tcx>,
         mapped_regions: FxIndexMap<ty::PlaceholderRegion, ty::BoundRegion>,
         mapped_types: FxIndexMap<ty::PlaceholderType, ty::BoundTy>,
-        mapped_consts: BTreeMap<ty::PlaceholderConst, ty::BoundVar>,
+        mapped_consts: FxIndexMap<ty::PlaceholderConst, ty::BoundVar>,
         universe_indices: &'a [Option<ty::UniverseIndex>],
         value: T,
     ) -> T {
@@ -507,15 +365,19 @@ impl<'tcx> TypeFolder<TyCtxt<'tcx>> for PlaceholderReplacer<'_, 'tcx> {
 }
 
 pub fn sizedness_fast_path<'tcx>(tcx: TyCtxt<'tcx>, predicate: ty::Predicate<'tcx>) -> bool {
-    // Proving `Sized` very often on "obviously sized" types like `&T`, accounts for about 60%
-    // percentage of the predicates we have to prove. No need to canonicalize and all that for
-    // such cases.
+    // Proving `Sized`/`MetaSized`, very often on "obviously sized" types like
+    // `&T`, accounts for about 60% percentage of the predicates we have to prove. No need to
+    // canonicalize and all that for such cases.
     if let ty::PredicateKind::Clause(ty::ClauseKind::Trait(trait_ref)) =
         predicate.kind().skip_binder()
     {
-        if tcx.is_lang_item(trait_ref.def_id(), LangItem::Sized)
-            && trait_ref.self_ty().is_trivially_sized(tcx)
-        {
+        let sizedness = match tcx.as_lang_item(trait_ref.def_id()) {
+            Some(LangItem::Sized) => SizedTraitKind::Sized,
+            Some(LangItem::MetaSized) => SizedTraitKind::MetaSized,
+            _ => return false,
+        };
+
+        if trait_ref.self_ty().has_trivial_sizedness(tcx, sizedness) {
             debug!("fast path -- trivial sizedness");
             return true;
         }
@@ -523,3 +385,39 @@ pub fn sizedness_fast_path<'tcx>(tcx: TyCtxt<'tcx>, predicate: ty::Predicate<'tc
 
     false
 }
+
+/// To improve performance, sizedness traits are not elaborated and so special-casing is required
+/// in the trait solver to find a `Sized` candidate for a `MetaSized` obligation. Returns the
+/// predicate to used in the candidate for such a `obligation`, given a `candidate`.
+pub(crate) fn lazily_elaborate_sizedness_candidate<'tcx>(
+    infcx: &InferCtxt<'tcx>,
+    obligation: &PolyTraitObligation<'tcx>,
+    candidate: PolyTraitPredicate<'tcx>,
+) -> PolyTraitPredicate<'tcx> {
+    if !infcx.tcx.is_lang_item(obligation.predicate.def_id(), LangItem::MetaSized)
+        || !infcx.tcx.is_lang_item(candidate.def_id(), LangItem::Sized)
+    {
+        return candidate;
+    }
+
+    if obligation.predicate.polarity() != candidate.polarity() {
+        return candidate;
+    }
+
+    let drcx = DeepRejectCtxt::relate_rigid_rigid(infcx.tcx);
+    if !drcx.args_may_unify(
+        obligation.predicate.skip_binder().trait_ref.args,
+        candidate.skip_binder().trait_ref.args,
+    ) {
+        return candidate;
+    }
+
+    candidate.map_bound(|c| TraitPredicate {
+        trait_ref: TraitRef::new_from_args(
+            infcx.tcx,
+            obligation.predicate.def_id(),
+            c.trait_ref.args,
+        ),
+        polarity: c.polarity,
+    })
+}
diff --git a/compiler/rustc_trait_selection/src/traits/wf.rs b/compiler/rustc_trait_selection/src/traits/wf.rs
index 416865e861e..d4e6a23f0eb 100644
--- a/compiler/rustc_trait_selection/src/traits/wf.rs
+++ b/compiler/rustc_trait_selection/src/traits/wf.rs
@@ -567,6 +567,14 @@ impl<'a, 'tcx> WfPredicates<'a, 'tcx> {
         def_id: DefId,
         args: GenericArgsRef<'tcx>,
     ) -> PredicateObligations<'tcx> {
+        // PERF: `Sized`'s predicates include `MetaSized`, but both are compiler implemented marker
+        // traits, so `MetaSized` will always be WF if `Sized` is WF and vice-versa. Determining
+        // the nominal obligations of `Sized` would in-effect just elaborate `MetaSized` and make
+        // the compiler do a bunch of work needlessly.
+        if self.tcx().is_lang_item(def_id, LangItem::Sized) {
+            return Default::default();
+        }
+
         let predicates = self.tcx().predicates_of(def_id);
         let mut origins = vec![def_id; predicates.predicates.len()];
         let mut head = predicates;
diff --git a/compiler/rustc_transmute/src/layout/dfa.rs b/compiler/rustc_transmute/src/layout/dfa.rs
index 6d072c336af..6fc40ce42d8 100644
--- a/compiler/rustc_transmute/src/layout/dfa.rs
+++ b/compiler/rustc_transmute/src/layout/dfa.rs
@@ -2,32 +2,35 @@ use std::fmt;
 use std::iter::Peekable;
 use std::sync::atomic::{AtomicU32, Ordering};
 
-use super::{Byte, Ref, Tree, Uninhabited};
+use super::{Byte, Reference, Region, Tree, Type, Uninhabited};
 use crate::{Map, Set};
 
 #[derive(PartialEq)]
 #[cfg_attr(test, derive(Clone))]
-pub(crate) struct Dfa<R>
+pub(crate) struct Dfa<R, T>
 where
-    R: Ref,
+    R: Region,
+    T: Type,
 {
-    pub(crate) transitions: Map<State, Transitions<R>>,
+    pub(crate) transitions: Map<State, Transitions<R, T>>,
     pub(crate) start: State,
     pub(crate) accept: State,
 }
 
 #[derive(PartialEq, Clone, Debug)]
-pub(crate) struct Transitions<R>
+pub(crate) struct Transitions<R, T>
 where
-    R: Ref,
+    R: Region,
+    T: Type,
 {
     byte_transitions: EdgeSet<State>,
-    ref_transitions: Map<R, State>,
+    ref_transitions: Map<Reference<R, T>, State>,
 }
 
-impl<R> Default for Transitions<R>
+impl<R, T> Default for Transitions<R, T>
 where
-    R: Ref,
+    R: Region,
+    T: Type,
 {
     fn default() -> Self {
         Self { byte_transitions: EdgeSet::empty(), ref_transitions: Map::default() }
@@ -51,9 +54,10 @@ impl fmt::Debug for State {
     }
 }
 
-impl<R> Dfa<R>
+impl<R, T> Dfa<R, T>
 where
-    R: Ref,
+    R: Region,
+    T: Type,
 {
     #[cfg(test)]
     pub(crate) fn bool() -> Self {
@@ -64,7 +68,7 @@ where
     }
 
     pub(crate) fn unit() -> Self {
-        let transitions: Map<State, Transitions<R>> = Map::default();
+        let transitions: Map<State, Transitions<R, T>> = Map::default();
         let start = State::new();
         let accept = start;
 
@@ -78,21 +82,21 @@ where
         })
     }
 
-    pub(crate) fn from_ref(r: R) -> Self {
+    pub(crate) fn from_ref(r: Reference<R, T>) -> Self {
         Self::from_transitions(|accept| Transitions {
             byte_transitions: EdgeSet::empty(),
             ref_transitions: [(r, accept)].into_iter().collect(),
         })
     }
 
-    fn from_transitions(f: impl FnOnce(State) -> Transitions<R>) -> Self {
+    fn from_transitions(f: impl FnOnce(State) -> Transitions<R, T>) -> Self {
         let start = State::new();
         let accept = State::new();
 
         Self { transitions: [(start, f(accept))].into_iter().collect(), start, accept }
     }
 
-    pub(crate) fn from_tree(tree: Tree<!, R>) -> Result<Self, Uninhabited> {
+    pub(crate) fn from_tree(tree: Tree<!, R, T>) -> Result<Self, Uninhabited> {
         Ok(match tree {
             Tree::Byte(b) => Self::from_byte(b),
             Tree::Ref(r) => Self::from_ref(r),
@@ -125,7 +129,7 @@ where
         let start = self.start;
         let accept = other.accept;
 
-        let mut transitions: Map<State, Transitions<R>> = self.transitions;
+        let mut transitions: Map<State, Transitions<R, T>> = self.transitions;
 
         for (source, transition) in other.transitions {
             let fix_state = |state| if state == other.start { self.accept } else { state };
@@ -169,7 +173,7 @@ where
         };
 
         let start = mapped((Some(a.start), Some(b.start)));
-        let mut transitions: Map<State, Transitions<R>> = Map::default();
+        let mut transitions: Map<State, Transitions<R, T>> = Map::default();
         let empty_transitions = Transitions::default();
 
         struct WorkQueue {
@@ -257,7 +261,7 @@ where
             .flat_map(|transitions| transitions.byte_transitions.iter())
     }
 
-    pub(crate) fn refs_from(&self, start: State) -> impl Iterator<Item = (R, State)> {
+    pub(crate) fn refs_from(&self, start: State) -> impl Iterator<Item = (Reference<R, T>, State)> {
         self.transitions
             .get(&start)
             .into_iter()
@@ -297,9 +301,10 @@ where
 }
 
 /// Serialize the DFA using the Graphviz DOT format.
-impl<R> fmt::Debug for Dfa<R>
+impl<R, T> fmt::Debug for Dfa<R, T>
 where
-    R: Ref,
+    R: Region,
+    T: Type,
 {
     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         writeln!(f, "digraph {{")?;
diff --git a/compiler/rustc_transmute/src/layout/mod.rs b/compiler/rustc_transmute/src/layout/mod.rs
index c08bf440734..acbce258f39 100644
--- a/compiler/rustc_transmute/src/layout/mod.rs
+++ b/compiler/rustc_transmute/src/layout/mod.rs
@@ -78,16 +78,41 @@ impl From<u8> for Byte {
     }
 }
 
+/// A reference, i.e., `&'region T` or `&'region mut T`.
+#[derive(Debug, Hash, Eq, PartialEq, Ord, PartialOrd, Clone, Copy)]
+pub(crate) struct Reference<R, T>
+where
+    R: Region,
+    T: Type,
+{
+    pub(crate) region: R,
+    pub(crate) is_mut: bool,
+    pub(crate) referent: T,
+    pub(crate) referent_size: usize,
+    pub(crate) referent_align: usize,
+}
+
+impl<R, T> fmt::Display for Reference<R, T>
+where
+    R: Region,
+    T: Type,
+{
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        f.write_str("&")?;
+        if self.is_mut {
+            f.write_str("mut ")?;
+        }
+        self.referent.fmt(f)
+    }
+}
+
 pub(crate) trait Def: Debug + Hash + Eq + PartialEq + Copy + Clone {
     fn has_safety_invariants(&self) -> bool;
 }
-pub trait Ref: Debug + Hash + Eq + PartialEq + Copy + Clone {
-    fn min_align(&self) -> usize;
 
-    fn size(&self) -> usize;
+pub(crate) trait Region: Debug + Hash + Eq + PartialEq + Copy + Clone {}
 
-    fn is_mutable(&self) -> bool;
-}
+pub(crate) trait Type: Debug + Hash + Eq + PartialEq + Copy + Clone {}
 
 impl Def for ! {
     fn has_safety_invariants(&self) -> bool {
@@ -95,79 +120,21 @@ impl Def for ! {
     }
 }
 
-impl Ref for ! {
-    fn min_align(&self) -> usize {
-        unreachable!()
-    }
-    fn size(&self) -> usize {
-        unreachable!()
-    }
-    fn is_mutable(&self) -> bool {
-        unreachable!()
-    }
-}
+impl Region for ! {}
 
-#[cfg(test)]
-impl<const N: usize> Ref for [(); N] {
-    fn min_align(&self) -> usize {
-        N
-    }
+impl Type for ! {}
 
-    fn size(&self) -> usize {
-        N
-    }
+#[cfg(test)]
+impl Region for usize {}
 
-    fn is_mutable(&self) -> bool {
-        false
-    }
-}
+#[cfg(test)]
+impl Type for () {}
 
 #[cfg(feature = "rustc")]
 pub mod rustc {
-    use std::fmt::{self, Write};
-
     use rustc_abi::Layout;
-    use rustc_middle::mir::Mutability;
     use rustc_middle::ty::layout::{HasTyCtxt, LayoutCx, LayoutError};
-    use rustc_middle::ty::{self, Ty};
-
-    /// A reference in the layout.
-    #[derive(Debug, Hash, Eq, PartialEq, Clone, Copy)]
-    pub struct Ref<'tcx> {
-        pub lifetime: ty::Region<'tcx>,
-        pub ty: Ty<'tcx>,
-        pub mutability: Mutability,
-        pub align: usize,
-        pub size: usize,
-    }
-
-    impl<'tcx> super::Ref for Ref<'tcx> {
-        fn min_align(&self) -> usize {
-            self.align
-        }
-
-        fn size(&self) -> usize {
-            self.size
-        }
-
-        fn is_mutable(&self) -> bool {
-            match self.mutability {
-                Mutability::Mut => true,
-                Mutability::Not => false,
-            }
-        }
-    }
-    impl<'tcx> Ref<'tcx> {}
-
-    impl<'tcx> fmt::Display for Ref<'tcx> {
-        fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-            f.write_char('&')?;
-            if self.mutability == Mutability::Mut {
-                f.write_str("mut ")?;
-            }
-            self.ty.fmt(f)
-        }
-    }
+    use rustc_middle::ty::{self, Region, Ty};
 
     /// A visibility node in the layout.
     #[derive(Debug, Hash, Eq, PartialEq, Clone, Copy)]
@@ -187,6 +154,10 @@ pub mod rustc {
         }
     }
 
+    impl<'tcx> super::Region for Region<'tcx> {}
+
+    impl<'tcx> super::Type for Ty<'tcx> {}
+
     pub(crate) fn layout_of<'tcx>(
         cx: LayoutCx<'tcx>,
         ty: Ty<'tcx>,
diff --git a/compiler/rustc_transmute/src/layout/tree.rs b/compiler/rustc_transmute/src/layout/tree.rs
index ff665695b5a..372b4f5353a 100644
--- a/compiler/rustc_transmute/src/layout/tree.rs
+++ b/compiler/rustc_transmute/src/layout/tree.rs
@@ -1,6 +1,6 @@
 use std::ops::{ControlFlow, RangeInclusive};
 
-use super::{Byte, Def, Ref};
+use super::{Byte, Def, Reference, Region, Type};
 
 #[cfg(test)]
 mod tests;
@@ -15,10 +15,11 @@ mod tests;
 /// 2. A `Seq` is never directly nested beneath another `Seq`.
 /// 3. `Seq`s and `Alt`s with a single member do not exist.
 #[derive(Clone, Debug, Hash, PartialEq, Eq)]
-pub(crate) enum Tree<D, R>
+pub(crate) enum Tree<D, R, T>
 where
     D: Def,
-    R: Ref,
+    R: Region,
+    T: Type,
 {
     /// A sequence of successive layouts.
     Seq(Vec<Self>),
@@ -27,7 +28,7 @@ where
     /// A definition node.
     Def(D),
     /// A reference node.
-    Ref(R),
+    Ref(Reference<R, T>),
     /// A byte node.
     Byte(Byte),
 }
@@ -48,10 +49,11 @@ impl From<rustc_abi::Endian> for Endian {
     }
 }
 
-impl<D, R> Tree<D, R>
+impl<D, R, T> Tree<D, R, T>
 where
     D: Def,
-    R: Ref,
+    R: Region,
+    T: Type,
 {
     /// A `Tree` consisting only of a definition node.
     pub(crate) fn def(def: D) -> Self {
@@ -138,7 +140,7 @@ where
 
     /// Remove all `Def` nodes, and all branches of the layout for which `f`
     /// produces `true`.
-    pub(crate) fn prune<F>(self, f: &F) -> Tree<!, R>
+    pub(crate) fn prune<F>(self, f: &F) -> Tree<!, R, T>
     where
         F: Fn(D) -> bool,
     {
@@ -198,13 +200,13 @@ where
 
     /// Produces a `Tree` where each of the trees in `trees` are sequenced one
     /// after another.
-    pub(crate) fn seq<const N: usize>(trees: [Tree<D, R>; N]) -> Self {
+    pub(crate) fn seq<const N: usize>(trees: [Tree<D, R, T>; N]) -> Self {
         trees.into_iter().fold(Tree::unit(), Self::then)
     }
 
     /// Produces a `Tree` where each of the trees in `trees` are accepted as
     /// alternative layouts.
-    pub(crate) fn alt<const N: usize>(trees: [Tree<D, R>; N]) -> Self {
+    pub(crate) fn alt<const N: usize>(trees: [Tree<D, R, T>; N]) -> Self {
         trees.into_iter().fold(Tree::uninhabited(), Self::or)
     }
 
@@ -251,11 +253,14 @@ pub(crate) mod rustc {
         FieldIdx, FieldsShape, Layout, Size, TagEncoding, TyAndLayout, VariantIdx, Variants,
     };
     use rustc_middle::ty::layout::{HasTyCtxt, LayoutCx, LayoutError};
-    use rustc_middle::ty::{self, AdtDef, AdtKind, List, ScalarInt, Ty, TyCtxt, TypeVisitableExt};
+    use rustc_middle::ty::{
+        self, AdtDef, AdtKind, List, Region, ScalarInt, Ty, TyCtxt, TypeVisitableExt,
+    };
     use rustc_span::ErrorGuaranteed;
 
     use super::Tree;
-    use crate::layout::rustc::{Def, Ref, layout_of};
+    use crate::layout::Reference;
+    use crate::layout::rustc::{Def, layout_of};
 
     #[derive(Debug, Copy, Clone)]
     pub(crate) enum Err {
@@ -281,7 +286,7 @@ pub(crate) mod rustc {
         }
     }
 
-    impl<'tcx> Tree<Def<'tcx>, Ref<'tcx>> {
+    impl<'tcx> Tree<Def<'tcx>, Region<'tcx>, Ty<'tcx>> {
         pub(crate) fn from_ty(ty: Ty<'tcx>, cx: LayoutCx<'tcx>) -> Result<Self, Err> {
             use rustc_abi::HasDataLayout;
             let layout = layout_of(cx, ty)?;
@@ -353,16 +358,17 @@ pub(crate) mod rustc {
                     }
                 }
 
-                ty::Ref(lifetime, ty, mutability) => {
+                ty::Ref(region, ty, mutability) => {
                     let layout = layout_of(cx, *ty)?;
-                    let align = layout.align.abi.bytes_usize();
-                    let size = layout.size.bytes_usize();
-                    Ok(Tree::Ref(Ref {
-                        lifetime: *lifetime,
-                        ty: *ty,
-                        mutability: *mutability,
-                        align,
-                        size,
+                    let referent_align = layout.align.abi.bytes_usize();
+                    let referent_size = layout.size.bytes_usize();
+
+                    Ok(Tree::Ref(Reference {
+                        region: *region,
+                        is_mut: mutability.is_mut(),
+                        referent: *ty,
+                        referent_align,
+                        referent_size,
                     }))
                 }
 
diff --git a/compiler/rustc_transmute/src/layout/tree/tests.rs b/compiler/rustc_transmute/src/layout/tree/tests.rs
index 8c3dbbe37ab..bc47b19c681 100644
--- a/compiler/rustc_transmute/src/layout/tree/tests.rs
+++ b/compiler/rustc_transmute/src/layout/tree/tests.rs
@@ -20,13 +20,13 @@ mod prune {
 
         #[test]
         fn seq_1() {
-            let layout: Tree<Def, !> = Tree::def(Def::NoSafetyInvariants).then(Tree::byte(0x00));
+            let layout: Tree<Def, !, !> = Tree::def(Def::NoSafetyInvariants).then(Tree::byte(0x00));
             assert_eq!(layout.prune(&|d| matches!(d, Def::HasSafetyInvariants)), Tree::byte(0x00));
         }
 
         #[test]
         fn seq_2() {
-            let layout: Tree<Def, !> =
+            let layout: Tree<Def, !, !> =
                 Tree::byte(0x00).then(Tree::def(Def::NoSafetyInvariants)).then(Tree::byte(0x01));
 
             assert_eq!(
@@ -41,7 +41,7 @@ mod prune {
 
         #[test]
         fn invisible_def() {
-            let layout: Tree<Def, !> = Tree::def(Def::HasSafetyInvariants);
+            let layout: Tree<Def, !, !> = Tree::def(Def::HasSafetyInvariants);
             assert_eq!(
                 layout.prune(&|d| matches!(d, Def::HasSafetyInvariants)),
                 Tree::uninhabited()
@@ -50,7 +50,7 @@ mod prune {
 
         #[test]
         fn invisible_def_in_seq_len_2() {
-            let layout: Tree<Def, !> =
+            let layout: Tree<Def, !, !> =
                 Tree::def(Def::NoSafetyInvariants).then(Tree::def(Def::HasSafetyInvariants));
             assert_eq!(
                 layout.prune(&|d| matches!(d, Def::HasSafetyInvariants)),
@@ -60,7 +60,7 @@ mod prune {
 
         #[test]
         fn invisible_def_in_seq_len_3() {
-            let layout: Tree<Def, !> = Tree::def(Def::NoSafetyInvariants)
+            let layout: Tree<Def, !, !> = Tree::def(Def::NoSafetyInvariants)
                 .then(Tree::byte(0x00))
                 .then(Tree::def(Def::HasSafetyInvariants));
             assert_eq!(
@@ -75,20 +75,20 @@ mod prune {
 
         #[test]
         fn visible_def() {
-            let layout: Tree<Def, !> = Tree::def(Def::NoSafetyInvariants);
+            let layout: Tree<Def, !, !> = Tree::def(Def::NoSafetyInvariants);
             assert_eq!(layout.prune(&|d| matches!(d, Def::HasSafetyInvariants)), Tree::unit());
         }
 
         #[test]
         fn visible_def_in_seq_len_2() {
-            let layout: Tree<Def, !> =
+            let layout: Tree<Def, !, !> =
                 Tree::def(Def::NoSafetyInvariants).then(Tree::def(Def::NoSafetyInvariants));
             assert_eq!(layout.prune(&|d| matches!(d, Def::HasSafetyInvariants)), Tree::unit());
         }
 
         #[test]
         fn visible_def_in_seq_len_3() {
-            let layout: Tree<Def, !> = Tree::def(Def::NoSafetyInvariants)
+            let layout: Tree<Def, !, !> = Tree::def(Def::NoSafetyInvariants)
                 .then(Tree::byte(0x00))
                 .then(Tree::def(Def::NoSafetyInvariants));
             assert_eq!(layout.prune(&|d| matches!(d, Def::HasSafetyInvariants)), Tree::byte(0x00));
diff --git a/compiler/rustc_transmute/src/lib.rs b/compiler/rustc_transmute/src/lib.rs
index ce18dad5517..36281ff16bc 100644
--- a/compiler/rustc_transmute/src/lib.rs
+++ b/compiler/rustc_transmute/src/lib.rs
@@ -19,23 +19,29 @@ pub struct Assume {
 /// Either transmutation is allowed, we have an error, or we have an optional
 /// Condition that must hold.
 #[derive(Debug, Hash, Eq, PartialEq, Clone)]
-pub enum Answer<R> {
+pub enum Answer<R, T> {
     Yes,
-    No(Reason<R>),
-    If(Condition<R>),
+    No(Reason<T>),
+    If(Condition<R, T>),
 }
 
 /// A condition which must hold for safe transmutation to be possible.
 #[derive(Debug, Hash, Eq, PartialEq, Clone)]
-pub enum Condition<R> {
+pub enum Condition<R, T> {
     /// `Src` is transmutable into `Dst`, if `src` is transmutable into `dst`.
-    IfTransmutable { src: R, dst: R },
+    Transmutable { src: T, dst: T },
+
+    /// The region `long` must outlive `short`.
+    Outlives { long: R, short: R },
+
+    /// The `ty` is immutable.
+    Immutable { ty: T },
 
     /// `Src` is transmutable into `Dst`, if all of the enclosed requirements are met.
-    IfAll(Vec<Condition<R>>),
+    IfAll(Vec<Condition<R, T>>),
 
     /// `Src` is transmutable into `Dst` if any of the enclosed requirements are met.
-    IfAny(Vec<Condition<R>>),
+    IfAny(Vec<Condition<R, T>>),
 }
 
 /// Answers "why wasn't the source type transmutable into the destination type?"
@@ -53,12 +59,16 @@ pub enum Reason<T> {
     DstMayHaveSafetyInvariants,
     /// `Dst` is larger than `Src`, and the excess bytes were not exclusively uninitialized.
     DstIsTooBig,
-    /// A referent of `Dst` is larger than a referent in `Src`.
+    /// `Dst` is larger `Src`.
     DstRefIsTooBig {
         /// The referent of the source type.
         src: T,
+        /// The size of the source type's referent.
+        src_size: usize,
         /// The too-large referent of the destination type.
         dst: T,
+        /// The size of the destination type's referent.
+        dst_size: usize,
     },
     /// Src should have a stricter alignment than Dst, but it does not.
     DstHasStricterAlignment { src_min_align: usize, dst_min_align: usize },
@@ -79,7 +89,7 @@ pub enum Reason<T> {
 #[cfg(feature = "rustc")]
 mod rustc {
     use rustc_hir::lang_items::LangItem;
-    use rustc_middle::ty::{Const, Ty, TyCtxt};
+    use rustc_middle::ty::{Const, Region, Ty, TyCtxt};
 
     use super::*;
 
@@ -105,7 +115,7 @@ mod rustc {
             &mut self,
             types: Types<'tcx>,
             assume: crate::Assume,
-        ) -> crate::Answer<crate::layout::rustc::Ref<'tcx>> {
+        ) -> crate::Answer<Region<'tcx>, Ty<'tcx>> {
             crate::maybe_transmutable::MaybeTransmutableQuery::new(
                 types.src, types.dst, assume, self.tcx,
             )
diff --git a/compiler/rustc_transmute/src/maybe_transmutable/mod.rs b/compiler/rustc_transmute/src/maybe_transmutable/mod.rs
index f76abe50ed3..062de4b5d08 100644
--- a/compiler/rustc_transmute/src/maybe_transmutable/mod.rs
+++ b/compiler/rustc_transmute/src/maybe_transmutable/mod.rs
@@ -5,7 +5,7 @@ pub(crate) mod query_context;
 #[cfg(test)]
 mod tests;
 
-use crate::layout::{self, Def, Dfa, Ref, Tree, dfa, union};
+use crate::layout::{self, Def, Dfa, Reference, Tree, dfa, union};
 use crate::maybe_transmutable::query_context::QueryContext;
 use crate::{Answer, Condition, Map, Reason};
 
@@ -41,7 +41,10 @@ mod rustc {
         /// This method begins by converting `src` and `dst` from `Ty`s to `Tree`s,
         /// then computes an answer using those trees.
         #[instrument(level = "debug", skip(self), fields(src = ?self.src, dst = ?self.dst))]
-        pub(crate) fn answer(self) -> Answer<<TyCtxt<'tcx> as QueryContext>::Ref> {
+        pub(crate) fn answer(
+            self,
+        ) -> Answer<<TyCtxt<'tcx> as QueryContext>::Region, <TyCtxt<'tcx> as QueryContext>::Type>
+        {
             let Self { src, dst, assume, context } = self;
 
             let layout_cx = LayoutCx::new(context, TypingEnv::fully_monomorphized());
@@ -67,7 +70,11 @@ mod rustc {
     }
 }
 
-impl<C> MaybeTransmutableQuery<Tree<<C as QueryContext>::Def, <C as QueryContext>::Ref>, C>
+impl<C>
+    MaybeTransmutableQuery<
+        Tree<<C as QueryContext>::Def, <C as QueryContext>::Region, <C as QueryContext>::Type>,
+        C,
+    >
 where
     C: QueryContext,
 {
@@ -77,7 +84,7 @@ where
     /// then converts `src` and `dst` to `Dfa`s, and computes an answer using those DFAs.
     #[inline(always)]
     #[instrument(level = "debug", skip(self), fields(src = ?self.src, dst = ?self.dst))]
-    pub(crate) fn answer(self) -> Answer<<C as QueryContext>::Ref> {
+    pub(crate) fn answer(self) -> Answer<<C as QueryContext>::Region, <C as QueryContext>::Type> {
         let Self { src, dst, assume, context } = self;
 
         // Unconditionally remove all `Def` nodes from `src`, without pruning away the
@@ -130,12 +137,12 @@ where
     }
 }
 
-impl<C> MaybeTransmutableQuery<Dfa<<C as QueryContext>::Ref>, C>
+impl<C> MaybeTransmutableQuery<Dfa<<C as QueryContext>::Region, <C as QueryContext>::Type>, C>
 where
     C: QueryContext,
 {
     /// Answers whether a `Dfa` is transmutable into another `Dfa`.
-    pub(crate) fn answer(self) -> Answer<<C as QueryContext>::Ref> {
+    pub(crate) fn answer(self) -> Answer<<C as QueryContext>::Region, <C as QueryContext>::Type> {
         self.answer_memo(&mut Map::default(), self.src.start, self.dst.start)
     }
 
@@ -143,10 +150,13 @@ where
     #[instrument(level = "debug", skip(self))]
     fn answer_memo(
         &self,
-        cache: &mut Map<(dfa::State, dfa::State), Answer<<C as QueryContext>::Ref>>,
+        cache: &mut Map<
+            (dfa::State, dfa::State),
+            Answer<<C as QueryContext>::Region, <C as QueryContext>::Type>,
+        >,
         src_state: dfa::State,
         dst_state: dfa::State,
-    ) -> Answer<<C as QueryContext>::Ref> {
+    ) -> Answer<<C as QueryContext>::Region, <C as QueryContext>::Type> {
         if let Some(answer) = cache.get(&(src_state, dst_state)) {
             answer.clone()
         } else {
@@ -160,10 +170,13 @@ where
 
     fn answer_impl(
         &self,
-        cache: &mut Map<(dfa::State, dfa::State), Answer<<C as QueryContext>::Ref>>,
+        cache: &mut Map<
+            (dfa::State, dfa::State),
+            Answer<<C as QueryContext>::Region, <C as QueryContext>::Type>,
+        >,
         src_state: dfa::State,
         dst_state: dfa::State,
-    ) -> Answer<<C as QueryContext>::Ref> {
+    ) -> Answer<<C as QueryContext>::Region, <C as QueryContext>::Type> {
         debug!(?src_state, ?dst_state);
         debug!(src = ?self.src);
         debug!(dst = ?self.dst);
@@ -247,27 +260,51 @@ where
                     // ...there exists a reference transition out of `dst_state`...
                     Quantifier::ThereExists.apply(self.dst.refs_from(dst_state).map(
                         |(dst_ref, dst_state_prime)| {
-                            if !src_ref.is_mutable() && dst_ref.is_mutable() {
+                            if !src_ref.is_mut && dst_ref.is_mut {
                                 Answer::No(Reason::DstIsMoreUnique)
                             } else if !self.assume.alignment
-                                && src_ref.min_align() < dst_ref.min_align()
+                                && src_ref.referent_align < dst_ref.referent_align
                             {
                                 Answer::No(Reason::DstHasStricterAlignment {
-                                    src_min_align: src_ref.min_align(),
-                                    dst_min_align: dst_ref.min_align(),
+                                    src_min_align: src_ref.referent_align,
+                                    dst_min_align: dst_ref.referent_align,
+                                })
+                            } else if dst_ref.referent_size > src_ref.referent_size {
+                                Answer::No(Reason::DstRefIsTooBig {
+                                    src: src_ref.referent,
+                                    src_size: src_ref.referent_size,
+                                    dst: dst_ref.referent,
+                                    dst_size: dst_ref.referent_size,
                                 })
-                            } else if dst_ref.size() > src_ref.size() {
-                                Answer::No(Reason::DstRefIsTooBig { src: src_ref, dst: dst_ref })
                             } else {
-                                // ...such that `src` is transmutable into `dst`, if
-                                // `src_ref` is transmutability into `dst_ref`.
-                                and(
-                                    Answer::If(Condition::IfTransmutable {
-                                        src: src_ref,
-                                        dst: dst_ref,
-                                    }),
-                                    self.answer_memo(cache, src_state_prime, dst_state_prime),
-                                )
+                                let mut conditions = Vec::with_capacity(4);
+                                let mut is_transmutable =
+                                    |src: Reference<_, _>, dst: Reference<_, _>| {
+                                        conditions.push(Condition::Transmutable {
+                                            src: src.referent,
+                                            dst: dst.referent,
+                                        });
+                                        if !self.assume.lifetimes {
+                                            conditions.push(Condition::Outlives {
+                                                long: src.region,
+                                                short: dst.region,
+                                            });
+                                        }
+                                    };
+
+                                is_transmutable(src_ref, dst_ref);
+
+                                if dst_ref.is_mut {
+                                    is_transmutable(dst_ref, src_ref);
+                                } else {
+                                    conditions.push(Condition::Immutable { ty: dst_ref.referent });
+                                }
+
+                                Answer::If(Condition::IfAll(conditions)).and(self.answer_memo(
+                                    cache,
+                                    src_state_prime,
+                                    dst_state_prime,
+                                ))
                             }
                         },
                     ))
@@ -275,67 +312,65 @@ where
             );
 
             if self.assume.validity {
-                or(bytes_answer, refs_answer)
+                bytes_answer.or(refs_answer)
             } else {
-                and(bytes_answer, refs_answer)
+                bytes_answer.and(refs_answer)
             }
         }
     }
 }
 
-fn and<R>(lhs: Answer<R>, rhs: Answer<R>) -> Answer<R>
-where
-    R: PartialEq,
-{
-    match (lhs, rhs) {
-        // If both are errors, then we should return the more specific one
-        (Answer::No(Reason::DstIsBitIncompatible), Answer::No(reason))
-        | (Answer::No(reason), Answer::No(_))
-        // If either is an error, return it
-        | (Answer::No(reason), _) | (_, Answer::No(reason)) => Answer::No(reason),
-        // If only one side has a condition, pass it along
-        | (Answer::Yes, other) | (other, Answer::Yes) => other,
-        // If both sides have IfAll conditions, merge them
-        (Answer::If(Condition::IfAll(mut lhs)), Answer::If(Condition::IfAll(ref mut rhs))) => {
-            lhs.append(rhs);
-            Answer::If(Condition::IfAll(lhs))
-        }
-        // If only one side is an IfAll, add the other Condition to it
-        (Answer::If(cond), Answer::If(Condition::IfAll(mut conds)))
-        | (Answer::If(Condition::IfAll(mut conds)), Answer::If(cond)) => {
-            conds.push(cond);
-            Answer::If(Condition::IfAll(conds))
+impl<R, T> Answer<R, T> {
+    fn and(self, rhs: Answer<R, T>) -> Answer<R, T> {
+        let lhs = self;
+        match (lhs, rhs) {
+            // If both are errors, then we should return the more specific one
+            (Answer::No(Reason::DstIsBitIncompatible), Answer::No(reason))
+            | (Answer::No(reason), Answer::No(_))
+            // If either is an error, return it
+            | (Answer::No(reason), _) | (_, Answer::No(reason)) => Answer::No(reason),
+            // If only one side has a condition, pass it along
+            | (Answer::Yes, other) | (other, Answer::Yes) => other,
+            // If both sides have IfAll conditions, merge them
+            (Answer::If(Condition::IfAll(mut lhs)), Answer::If(Condition::IfAll(ref mut rhs))) => {
+                lhs.append(rhs);
+                Answer::If(Condition::IfAll(lhs))
+            }
+            // If only one side is an IfAll, add the other Condition to it
+            (Answer::If(cond), Answer::If(Condition::IfAll(mut conds)))
+            | (Answer::If(Condition::IfAll(mut conds)), Answer::If(cond)) => {
+                conds.push(cond);
+                Answer::If(Condition::IfAll(conds))
+            }
+            // Otherwise, both lhs and rhs conditions can be combined in a parent IfAll
+            (Answer::If(lhs), Answer::If(rhs)) => Answer::If(Condition::IfAll(vec![lhs, rhs])),
         }
-        // Otherwise, both lhs and rhs conditions can be combined in a parent IfAll
-        (Answer::If(lhs), Answer::If(rhs)) => Answer::If(Condition::IfAll(vec![lhs, rhs])),
     }
-}
 
-fn or<R>(lhs: Answer<R>, rhs: Answer<R>) -> Answer<R>
-where
-    R: PartialEq,
-{
-    match (lhs, rhs) {
-        // If both are errors, then we should return the more specific one
-        (Answer::No(Reason::DstIsBitIncompatible), Answer::No(reason))
-        | (Answer::No(reason), Answer::No(_)) => Answer::No(reason),
-        // Otherwise, errors can be ignored for the rest of the pattern matching
-        (Answer::No(_), other) | (other, Answer::No(_)) => or(other, Answer::Yes),
-        // If only one side has a condition, pass it along
-        (Answer::Yes, other) | (other, Answer::Yes) => other,
-        // If both sides have IfAny conditions, merge them
-        (Answer::If(Condition::IfAny(mut lhs)), Answer::If(Condition::IfAny(ref mut rhs))) => {
-            lhs.append(rhs);
-            Answer::If(Condition::IfAny(lhs))
-        }
-        // If only one side is an IfAny, add the other Condition to it
-        (Answer::If(cond), Answer::If(Condition::IfAny(mut conds)))
-        | (Answer::If(Condition::IfAny(mut conds)), Answer::If(cond)) => {
-            conds.push(cond);
-            Answer::If(Condition::IfAny(conds))
+    fn or(self, rhs: Answer<R, T>) -> Answer<R, T> {
+        let lhs = self;
+        match (lhs, rhs) {
+            // If both are errors, then we should return the more specific one
+            (Answer::No(Reason::DstIsBitIncompatible), Answer::No(reason))
+            | (Answer::No(reason), Answer::No(_)) => Answer::No(reason),
+            // Otherwise, errors can be ignored for the rest of the pattern matching
+            (Answer::No(_), other) | (other, Answer::No(_)) => other.or(Answer::Yes),
+            // If only one side has a condition, pass it along
+            (Answer::Yes, other) | (other, Answer::Yes) => other,
+            // If both sides have IfAny conditions, merge them
+            (Answer::If(Condition::IfAny(mut lhs)), Answer::If(Condition::IfAny(ref mut rhs))) => {
+                lhs.append(rhs);
+                Answer::If(Condition::IfAny(lhs))
+            }
+            // If only one side is an IfAny, add the other Condition to it
+            (Answer::If(cond), Answer::If(Condition::IfAny(mut conds)))
+            | (Answer::If(Condition::IfAny(mut conds)), Answer::If(cond)) => {
+                conds.push(cond);
+                Answer::If(Condition::IfAny(conds))
+            }
+            // Otherwise, both lhs and rhs conditions can be combined in a parent IfAny
+            (Answer::If(lhs), Answer::If(rhs)) => Answer::If(Condition::IfAny(vec![lhs, rhs])),
         }
-        // Otherwise, both lhs and rhs conditions can be combined in a parent IfAny
-        (Answer::If(lhs), Answer::If(rhs)) => Answer::If(Condition::IfAny(vec![lhs, rhs])),
     }
 }
 
@@ -345,24 +380,25 @@ enum Quantifier {
 }
 
 impl Quantifier {
-    fn apply<R, I>(&self, iter: I) -> Answer<R>
+    fn apply<R, T, I>(&self, iter: I) -> Answer<R, T>
     where
-        R: layout::Ref,
-        I: IntoIterator<Item = Answer<R>>,
+        R: layout::Region,
+        T: layout::Type,
+        I: IntoIterator<Item = Answer<R, T>>,
     {
         use std::ops::ControlFlow::{Break, Continue};
 
         let (init, try_fold_f): (_, fn(_, _) -> _) = match self {
             Self::ThereExists => {
-                (Answer::No(Reason::DstIsBitIncompatible), |accum: Answer<R>, next| {
-                    match or(accum, next) {
-                        Answer::Yes => Break(Answer::Yes),
-                        maybe => Continue(maybe),
-                    }
+                (Answer::No(Reason::DstIsBitIncompatible), |accum: Answer<R, T>, next| match accum
+                    .or(next)
+                {
+                    Answer::Yes => Break(Answer::Yes),
+                    maybe => Continue(maybe),
                 })
             }
-            Self::ForAll => (Answer::Yes, |accum: Answer<R>, next| {
-                let answer = and(accum, next);
+            Self::ForAll => (Answer::Yes, |accum: Answer<R, T>, next| {
+                let answer = accum.and(next);
                 match answer {
                     Answer::No(_) => Break(answer),
                     maybe => Continue(maybe),
diff --git a/compiler/rustc_transmute/src/maybe_transmutable/query_context.rs b/compiler/rustc_transmute/src/maybe_transmutable/query_context.rs
index 214da101be3..6be0cb11904 100644
--- a/compiler/rustc_transmute/src/maybe_transmutable/query_context.rs
+++ b/compiler/rustc_transmute/src/maybe_transmutable/query_context.rs
@@ -3,7 +3,8 @@ use crate::layout;
 /// Context necessary to answer the question "Are these types transmutable?".
 pub(crate) trait QueryContext {
     type Def: layout::Def;
-    type Ref: layout::Ref;
+    type Region: layout::Region;
+    type Type: layout::Type;
 }
 
 #[cfg(test)]
@@ -12,9 +13,9 @@ pub(crate) mod test {
 
     use super::QueryContext;
 
-    pub(crate) struct UltraMinimal<R = !>(PhantomData<R>);
+    pub(crate) struct UltraMinimal<R = !, T = !>(PhantomData<(R, T)>);
 
-    impl<R> Default for UltraMinimal<R> {
+    impl<R, T> Default for UltraMinimal<R, T> {
         fn default() -> Self {
             Self(PhantomData)
         }
@@ -32,20 +33,26 @@ pub(crate) mod test {
         }
     }
 
-    impl<R: crate::layout::Ref> QueryContext for UltraMinimal<R> {
+    impl<R, T> QueryContext for UltraMinimal<R, T>
+    where
+        R: crate::layout::Region,
+        T: crate::layout::Type,
+    {
         type Def = Def;
-        type Ref = R;
+        type Region = R;
+        type Type = T;
     }
 }
 
 #[cfg(feature = "rustc")]
 mod rustc {
-    use rustc_middle::ty::TyCtxt;
+    use rustc_middle::ty::{Region, Ty, TyCtxt};
 
     use super::*;
 
     impl<'tcx> super::QueryContext for TyCtxt<'tcx> {
         type Def = layout::rustc::Def<'tcx>;
-        type Ref = layout::rustc::Ref<'tcx>;
+        type Region = Region<'tcx>;
+        type Type = Ty<'tcx>;
     }
 }
diff --git a/compiler/rustc_transmute/src/maybe_transmutable/tests.rs b/compiler/rustc_transmute/src/maybe_transmutable/tests.rs
index 0227ad71ae6..8440ace2608 100644
--- a/compiler/rustc_transmute/src/maybe_transmutable/tests.rs
+++ b/compiler/rustc_transmute/src/maybe_transmutable/tests.rs
@@ -3,17 +3,17 @@ extern crate test;
 use itertools::Itertools;
 
 use super::query_context::test::{Def, UltraMinimal};
-use crate::{Answer, Assume, Reason, layout};
+use crate::{Answer, Assume, Condition, Reason, layout};
 
-type Tree = layout::Tree<Def, !>;
-type Dfa = layout::Dfa<!>;
+type Tree = layout::Tree<Def, !, !>;
+type Dfa = layout::Dfa<!, !>;
 
 trait Representation {
-    fn is_transmutable(src: Self, dst: Self, assume: Assume) -> Answer<!>;
+    fn is_transmutable(src: Self, dst: Self, assume: Assume) -> Answer<!, !>;
 }
 
 impl Representation for Tree {
-    fn is_transmutable(src: Self, dst: Self, assume: Assume) -> Answer<!> {
+    fn is_transmutable(src: Self, dst: Self, assume: Assume) -> Answer<!, !> {
         crate::maybe_transmutable::MaybeTransmutableQuery::new(
             src,
             dst,
@@ -25,7 +25,7 @@ impl Representation for Tree {
 }
 
 impl Representation for Dfa {
-    fn is_transmutable(src: Self, dst: Self, assume: Assume) -> Answer<!> {
+    fn is_transmutable(src: Self, dst: Self, assume: Assume) -> Answer<!, !> {
         crate::maybe_transmutable::MaybeTransmutableQuery::new(
             src,
             dst,
@@ -40,7 +40,7 @@ fn is_transmutable<R: Representation + Clone>(
     src: &R,
     dst: &R,
     assume: Assume,
-) -> crate::Answer<!> {
+) -> crate::Answer<!, !> {
     let src = src.clone();
     let dst = dst.clone();
     // The only dimension of the transmutability analysis we want to test
@@ -53,7 +53,7 @@ mod safety {
     use super::*;
     use crate::Answer;
 
-    const DST_HAS_SAFETY_INVARIANTS: Answer<!> =
+    const DST_HAS_SAFETY_INVARIANTS: Answer<!, !> =
         Answer::No(crate::Reason::DstMayHaveSafetyInvariants);
 
     #[test]
@@ -177,14 +177,15 @@ mod bool {
 
     #[test]
     fn should_permit_validity_expansion_and_reject_contraction() {
-        let b0 = layout::Tree::<Def, !>::byte(0);
-        let b1 = layout::Tree::<Def, !>::byte(1);
-        let b2 = layout::Tree::<Def, !>::byte(2);
+        let b0 = layout::Tree::<Def, !, !>::byte(0);
+        let b1 = layout::Tree::<Def, !, !>::byte(1);
+        let b2 = layout::Tree::<Def, !, !>::byte(2);
 
         let alts = [b0, b1, b2];
 
         let into_layout = |alts: Vec<_>| {
-            alts.into_iter().fold(layout::Tree::<Def, !>::uninhabited(), layout::Tree::<Def, !>::or)
+            alts.into_iter()
+                .fold(layout::Tree::<Def, !, !>::uninhabited(), layout::Tree::<Def, !, !>::or)
         };
 
         let into_set = |alts: Vec<_>| {
@@ -277,7 +278,7 @@ mod alt {
 
     #[test]
     fn should_permit_identity_transmutation() {
-        type Tree = layout::Tree<Def, !>;
+        type Tree = layout::Tree<Def, !, !>;
 
         let x = Tree::Seq(vec![Tree::byte(0), Tree::byte(0)]);
         let y = Tree::Seq(vec![Tree::bool(), Tree::byte(1)]);
@@ -331,7 +332,7 @@ mod char {
     fn should_permit_valid_transmutation() {
         for order in [Endian::Big, Endian::Little] {
             use Answer::*;
-            let char_layout = layout::Tree::<Def, !>::char(order);
+            let char_layout = layout::Tree::<Def, !, !>::char(order);
 
             // `char`s can be in the following ranges:
             // - [0, 0xD7FF]
@@ -353,7 +354,7 @@ mod char {
                 (0xFFFFFFFF, no),
             ] {
                 let src_layout =
-                    layout::tree::Tree::<Def, !>::from_big_endian(order, src.to_be_bytes());
+                    layout::tree::Tree::<Def, !, !>::from_big_endian(order, src.to_be_bytes());
 
                 let a = is_transmutable(&src_layout, &char_layout, Assume::default());
                 assert_eq!(a, answer, "endian:{order:?},\nsrc:{src:x}");
@@ -371,7 +372,7 @@ mod nonzero {
     #[test]
     fn should_permit_identity_transmutation() {
         for width in NONZERO_BYTE_WIDTHS {
-            let layout = layout::Tree::<Def, !>::nonzero(width);
+            let layout = layout::Tree::<Def, !, !>::nonzero(width);
             assert_eq!(is_transmutable(&layout, &layout, Assume::default()), Answer::Yes);
         }
     }
@@ -381,8 +382,8 @@ mod nonzero {
         for width in NONZERO_BYTE_WIDTHS {
             use Answer::*;
 
-            let num = layout::Tree::<Def, !>::number(width);
-            let nz = layout::Tree::<Def, !>::nonzero(width);
+            let num = layout::Tree::<Def, !, !>::number(width);
+            let nz = layout::Tree::<Def, !, !>::nonzero(width);
 
             let a = is_transmutable(&num, &nz, Assume::default());
             assert_eq!(a, No(Reason::DstIsBitIncompatible), "width:{width}");
@@ -395,13 +396,23 @@ mod nonzero {
 
 mod r#ref {
     use super::*;
+    use crate::layout::Reference;
 
     #[test]
     fn should_permit_identity_transmutation() {
-        type Tree = crate::layout::Tree<Def, [(); 1]>;
+        type Tree = crate::layout::Tree<Def, usize, ()>;
 
         for validity in [false, true] {
-            let layout = Tree::Seq(vec![Tree::byte(0x00), Tree::Ref([()])]);
+            let layout = Tree::Seq(vec![
+                Tree::byte(0x00),
+                Tree::Ref(Reference {
+                    region: 42,
+                    is_mut: false,
+                    referent: (),
+                    referent_size: 0,
+                    referent_align: 1,
+                }),
+            ]);
 
             let assume = Assume { validity, ..Assume::default() };
 
@@ -414,7 +425,11 @@ mod r#ref {
             .answer();
             assert_eq!(
                 answer,
-                Answer::If(crate::Condition::IfTransmutable { src: [()], dst: [()] })
+                Answer::If(Condition::IfAll(vec![
+                    Condition::Transmutable { src: (), dst: () },
+                    Condition::Outlives { long: 42, short: 42 },
+                    Condition::Immutable { ty: () },
+                ]))
             );
         }
     }
diff --git a/compiler/rustc_ty_utils/src/abi.rs b/compiler/rustc_ty_utils/src/abi.rs
index bb5187e4f5c..f0ff50318ab 100644
--- a/compiler/rustc_ty_utils/src/abi.rs
+++ b/compiler/rustc_ty_utils/src/abi.rs
@@ -403,28 +403,18 @@ fn fn_abi_sanity_check<'tcx>(
                         // For an unsized type we'd only pass the sized prefix, so there is no universe
                         // in which we ever want to allow this.
                         assert!(sized, "`PassMode::Direct` for unsized type in ABI: {:#?}", fn_abi);
+
                         // This really shouldn't happen even for sized aggregates, since
                         // `immediate_llvm_type` will use `layout.fields` to turn this Rust type into an
                         // LLVM type. This means all sorts of Rust type details leak into the ABI.
-                        // However wasm sadly *does* currently use this mode for it's "C" ABI so we
-                        // have to allow it -- but we absolutely shouldn't let any more targets do
-                        // that. (Also see <https://github.com/rust-lang/rust/issues/115666>.)
-                        //
-                        // The unadjusted ABI also uses Direct for all args and is ill-specified,
+                        // The unadjusted ABI however uses Direct for all args. It is ill-specified,
                         // but unfortunately we need it for calling certain LLVM intrinsics.
-
-                        match spec_abi {
-                            ExternAbi::Unadjusted => {}
-                            ExternAbi::C { unwind: _ }
-                                if matches!(&*tcx.sess.target.arch, "wasm32" | "wasm64") => {}
-                            _ => {
-                                panic!(
-                                    "`PassMode::Direct` for aggregates only allowed for \"unadjusted\" functions and on wasm\n\
-                                      Problematic type: {:#?}",
-                                    arg.layout,
-                                );
-                            }
-                        }
+                        assert!(
+                            matches!(spec_abi, ExternAbi::Unadjusted),
+                            "`PassMode::Direct` for aggregates only allowed for \"unadjusted\"\n\
+                             Problematic type: {:#?}",
+                            arg.layout,
+                        );
                     }
                 }
             }
diff --git a/compiler/rustc_ty_utils/src/layout.rs b/compiler/rustc_ty_utils/src/layout.rs
index 9774263e4c9..d5222822461 100644
--- a/compiler/rustc_ty_utils/src/layout.rs
+++ b/compiler/rustc_ty_utils/src/layout.rs
@@ -896,10 +896,9 @@ fn variant_info_for_coroutine<'tcx>(
                     variant_size = variant_size.max(offset + field_layout.size);
                     FieldInfo {
                         kind: FieldKind::CoroutineLocal,
-                        name: field_name.unwrap_or(Symbol::intern(&format!(
-                            ".coroutine_field{}",
-                            local.as_usize()
-                        ))),
+                        name: field_name.unwrap_or_else(|| {
+                            Symbol::intern(&format!(".coroutine_field{}", local.as_usize()))
+                        }),
                         offset: offset.bytes(),
                         size: field_layout.size.bytes(),
                         align: field_layout.align.abi.bytes(),
diff --git a/compiler/rustc_ty_utils/src/ty.rs b/compiler/rustc_ty_utils/src/ty.rs
index 79ac622df32..d996ee2b60a 100644
--- a/compiler/rustc_ty_utils/src/ty.rs
+++ b/compiler/rustc_ty_utils/src/ty.rs
@@ -1,13 +1,12 @@
 use rustc_data_structures::fx::FxHashSet;
 use rustc_hir as hir;
-use rustc_hir::LangItem;
 use rustc_hir::def::DefKind;
 use rustc_index::bit_set::DenseBitSet;
 use rustc_infer::infer::TyCtxtInferExt;
 use rustc_middle::bug;
 use rustc_middle::query::Providers;
 use rustc_middle::ty::{
-    self, Ty, TyCtxt, TypeFoldable, TypeSuperVisitable, TypeVisitable, TypeVisitor, Upcast,
+    self, SizedTraitKind, Ty, TyCtxt, TypeSuperVisitable, TypeVisitable, TypeVisitor, Upcast,
     fold_regions,
 };
 use rustc_span::DUMMY_SP;
@@ -15,10 +14,16 @@ use rustc_span::def_id::{CRATE_DEF_ID, DefId, LocalDefId};
 use rustc_trait_selection::traits;
 use tracing::instrument;
 
+/// If `ty` implements the given `sizedness` trait, returns `None`. Otherwise, returns the type
+/// that must implement the given `sizedness` for `ty` to implement it.
 #[instrument(level = "debug", skip(tcx), ret)]
-fn sized_constraint_for_ty<'tcx>(tcx: TyCtxt<'tcx>, ty: Ty<'tcx>) -> Option<Ty<'tcx>> {
+fn sizedness_constraint_for_ty<'tcx>(
+    tcx: TyCtxt<'tcx>,
+    sizedness: SizedTraitKind,
+    ty: Ty<'tcx>,
+) -> Option<Ty<'tcx>> {
     match ty.kind() {
-        // these are always sized
+        // Always `Sized` or `MetaSized`
         ty::Bool
         | ty::Char
         | ty::Int(..)
@@ -36,31 +41,40 @@ fn sized_constraint_for_ty<'tcx>(tcx: TyCtxt<'tcx>, ty: Ty<'tcx>) -> Option<Ty<'
         | ty::Never
         | ty::Dynamic(_, _, ty::DynStar) => None,
 
-        // these are never sized
-        ty::Str | ty::Slice(..) | ty::Dynamic(_, _, ty::Dyn) | ty::Foreign(..) => Some(ty),
-
-        ty::Pat(ty, _) => sized_constraint_for_ty(tcx, *ty),
-
-        ty::Tuple(tys) => tys.last().and_then(|&ty| sized_constraint_for_ty(tcx, ty)),
-
-        // recursive case
-        ty::Adt(adt, args) => adt.sized_constraint(tcx).and_then(|intermediate| {
-            let ty = intermediate.instantiate(tcx, args);
-            sized_constraint_for_ty(tcx, ty)
-        }),
+        ty::Str | ty::Slice(..) | ty::Dynamic(_, _, ty::Dyn) => match sizedness {
+            // Never `Sized`
+            SizedTraitKind::Sized => Some(ty),
+            // Always `MetaSized`
+            SizedTraitKind::MetaSized => None,
+        },
 
-        // these can be sized or unsized.
+        // Maybe `Sized` or `MetaSized`
         ty::Param(..) | ty::Alias(..) | ty::Error(_) => Some(ty),
 
         // We cannot instantiate the binder, so just return the *original* type back,
         // but only if the inner type has a sized constraint. Thus we skip the binder,
         // but don't actually use the result from `sized_constraint_for_ty`.
         ty::UnsafeBinder(inner_ty) => {
-            sized_constraint_for_ty(tcx, inner_ty.skip_binder()).map(|_| ty)
+            sizedness_constraint_for_ty(tcx, sizedness, inner_ty.skip_binder()).map(|_| ty)
+        }
+
+        // Never `MetaSized` or `Sized`
+        ty::Foreign(..) => Some(ty),
+
+        // Recursive cases
+        ty::Pat(ty, _) => sizedness_constraint_for_ty(tcx, sizedness, *ty),
+
+        ty::Tuple(tys) => {
+            tys.last().and_then(|&ty| sizedness_constraint_for_ty(tcx, sizedness, ty))
         }
 
+        ty::Adt(adt, args) => adt.sizedness_constraint(tcx, sizedness).and_then(|intermediate| {
+            let ty = intermediate.instantiate(tcx, args);
+            sizedness_constraint_for_ty(tcx, sizedness, ty)
+        }),
+
         ty::Placeholder(..) | ty::Bound(..) | ty::Infer(..) => {
-            bug!("unexpected type `{ty:?}` in sized_constraint_for_ty")
+            bug!("unexpected type `{ty:?}` in `sizedness_constraint_for_ty`")
         }
     }
 }
@@ -76,15 +90,22 @@ fn defaultness(tcx: TyCtxt<'_>, def_id: LocalDefId) -> hir::Defaultness {
     }
 }
 
-/// Calculates the `Sized` constraint.
+/// Returns the type of the last field of a struct ("the constraint") which must implement the
+/// `sizedness` trait for the whole ADT to be considered to implement that `sizedness` trait.
+/// `def_id` is assumed to be the `AdtDef` of a struct and will panic otherwise.
+///
+/// For `Sized`, there are only a few options for the types in the constraint:
+///     - an meta-sized type (str, slices, trait objects, etc)
+///     - an pointee-sized type (extern types)
+///     - a type parameter or projection whose sizedness can't be known
 ///
-/// In fact, there are only a few options for the types in the constraint:
-///     - an obviously-unsized type
+/// For `MetaSized`, there are only a few options for the types in the constraint:
+///     - an pointee-sized type (extern types)
 ///     - a type parameter or projection whose sizedness can't be known
 #[instrument(level = "debug", skip(tcx), ret)]
-fn adt_sized_constraint<'tcx>(
+fn adt_sizedness_constraint<'tcx>(
     tcx: TyCtxt<'tcx>,
-    def_id: DefId,
+    (def_id, sizedness): (DefId, SizedTraitKind),
 ) -> Option<ty::EarlyBinder<'tcx, Ty<'tcx>>> {
     if let Some(def_id) = def_id.as_local() {
         if let ty::Representability::Infinite(_) = tcx.representability(def_id) {
@@ -94,21 +115,21 @@ fn adt_sized_constraint<'tcx>(
     let def = tcx.adt_def(def_id);
 
     if !def.is_struct() {
-        bug!("`adt_sized_constraint` called on non-struct type: {def:?}");
+        bug!("`adt_sizedness_constraint` called on non-struct type: {def:?}");
     }
 
     let tail_def = def.non_enum_variant().tail_opt()?;
     let tail_ty = tcx.type_of(tail_def.did).instantiate_identity();
 
-    let constraint_ty = sized_constraint_for_ty(tcx, tail_ty)?;
+    let constraint_ty = sizedness_constraint_for_ty(tcx, sizedness, tail_ty)?;
 
-    // perf hack: if there is a `constraint_ty: Sized` bound, then we know
+    // perf hack: if there is a `constraint_ty: {Meta,}Sized` bound, then we know
     // that the type is sized and do not need to check it on the impl.
-    let sized_trait_def_id = tcx.require_lang_item(LangItem::Sized, DUMMY_SP);
+    let sizedness_trait_def_id = sizedness.require_lang_item(tcx);
     let predicates = tcx.predicates_of(def.did()).predicates;
     if predicates.iter().any(|(p, _)| {
         p.as_trait_clause().is_some_and(|trait_pred| {
-            trait_pred.def_id() == sized_trait_def_id
+            trait_pred.def_id() == sizedness_trait_def_id
                 && trait_pred.self_ty().skip_binder() == constraint_ty
         })
     }) {
@@ -186,7 +207,7 @@ struct ImplTraitInTraitFinder<'a, 'tcx> {
 }
 
 impl<'tcx> TypeVisitor<TyCtxt<'tcx>> for ImplTraitInTraitFinder<'_, 'tcx> {
-    fn visit_binder<T: TypeFoldable<TyCtxt<'tcx>>>(&mut self, binder: &ty::Binder<'tcx, T>) {
+    fn visit_binder<T: TypeVisitable<TyCtxt<'tcx>>>(&mut self, binder: &ty::Binder<'tcx, T>) {
         self.depth.shift_in(1);
         binder.super_visit_with(self);
         self.depth.shift_out(1);
@@ -370,7 +391,7 @@ fn impl_self_is_guaranteed_unsized<'tcx>(tcx: TyCtxt<'tcx>, impl_def_id: DefId)
 pub(crate) fn provide(providers: &mut Providers) {
     *providers = Providers {
         asyncness,
-        adt_sized_constraint,
+        adt_sizedness_constraint,
         param_env,
         typing_env_normalized_for_post_analysis,
         defaultness,
diff --git a/compiler/rustc_type_ir/Cargo.toml b/compiler/rustc_type_ir/Cargo.toml
index 83d3d78298e..4bd7bfe79be 100644
--- a/compiler/rustc_type_ir/Cargo.toml
+++ b/compiler/rustc_type_ir/Cargo.toml
@@ -9,7 +9,7 @@ bitflags = "2.4.1"
 derive-where = "1.2.7"
 ena = "0.14.3"
 indexmap = "2.0.0"
-rustc-hash = "1.1.0"
+rustc-hash = "2.0.0"
 rustc_ast_ir = { path = "../rustc_ast_ir", default-features = false }
 rustc_data_structures = { path = "../rustc_data_structures", optional = true }
 rustc_index = { path = "../rustc_index", default-features = false }
diff --git a/compiler/rustc_type_ir/src/binder.rs b/compiler/rustc_type_ir/src/binder.rs
index 55c0a3bba9f..927a2ce84ea 100644
--- a/compiler/rustc_type_ir/src/binder.rs
+++ b/compiler/rustc_type_ir/src/binder.rs
@@ -128,7 +128,7 @@ impl<I: Interner, T: TypeFoldable<I>> TypeFoldable<I> for Binder<I, T> {
     }
 }
 
-impl<I: Interner, T: TypeFoldable<I>> TypeVisitable<I> for Binder<I, T> {
+impl<I: Interner, T: TypeVisitable<I>> TypeVisitable<I> for Binder<I, T> {
     fn visit_with<V: TypeVisitor<I>>(&self, visitor: &mut V) -> V::Result {
         visitor.visit_binder(self)
     }
@@ -147,7 +147,7 @@ impl<I: Interner, T: TypeFoldable<I>> TypeSuperFoldable<I> for Binder<I, T> {
     }
 }
 
-impl<I: Interner, T: TypeFoldable<I>> TypeSuperVisitable<I> for Binder<I, T> {
+impl<I: Interner, T: TypeVisitable<I>> TypeSuperVisitable<I> for Binder<I, T> {
     fn super_visit_with<V: TypeVisitor<I>>(&self, visitor: &mut V) -> V::Result {
         self.as_ref().skip_binder().visit_with(visitor)
     }
@@ -292,7 +292,7 @@ impl<I: Interner> ValidateBoundVars<I> {
 impl<I: Interner> TypeVisitor<I> for ValidateBoundVars<I> {
     type Result = ControlFlow<()>;
 
-    fn visit_binder<T: TypeFoldable<I>>(&mut self, t: &Binder<I, T>) -> Self::Result {
+    fn visit_binder<T: TypeVisitable<I>>(&mut self, t: &Binder<I, T>) -> Self::Result {
         self.binder_index.shift_in(1);
         let result = t.super_visit_with(self);
         self.binder_index.shift_out(1);
diff --git a/compiler/rustc_type_ir/src/elaborate.rs b/compiler/rustc_type_ir/src/elaborate.rs
index b11bcff1d8b..852949d707b 100644
--- a/compiler/rustc_type_ir/src/elaborate.rs
+++ b/compiler/rustc_type_ir/src/elaborate.rs
@@ -4,6 +4,7 @@ use smallvec::smallvec;
 
 use crate::data_structures::HashSet;
 use crate::inherent::*;
+use crate::lang_items::TraitSolverLangItem;
 use crate::outlives::{Component, push_outlives_components};
 use crate::{self as ty, Interner, Upcast as _};
 
@@ -18,6 +19,7 @@ pub struct Elaborator<I: Interner, O> {
     stack: Vec<O>,
     visited: HashSet<ty::Binder<I, ty::PredicateKind<I>>>,
     mode: Filter,
+    elaborate_sized: ElaborateSized,
 }
 
 enum Filter {
@@ -25,6 +27,12 @@ enum Filter {
     OnlySelf,
 }
 
+#[derive(Eq, PartialEq)]
+enum ElaborateSized {
+    Yes,
+    No,
+}
+
 /// Describes how to elaborate an obligation into a sub-obligation.
 pub trait Elaboratable<I: Interner> {
     fn predicate(&self) -> I::Predicate;
@@ -77,13 +85,19 @@ pub fn elaborate<I: Interner, O: Elaboratable<I>>(
     cx: I,
     obligations: impl IntoIterator<Item = O>,
 ) -> Elaborator<I, O> {
-    let mut elaborator =
-        Elaborator { cx, stack: Vec::new(), visited: HashSet::default(), mode: Filter::All };
+    let mut elaborator = Elaborator {
+        cx,
+        stack: Vec::new(),
+        visited: HashSet::default(),
+        mode: Filter::All,
+        elaborate_sized: ElaborateSized::No,
+    };
     elaborator.extend_deduped(obligations);
     elaborator
 }
 
 impl<I: Interner, O: Elaboratable<I>> Elaborator<I, O> {
+    /// Adds `obligations` to the stack.
     fn extend_deduped(&mut self, obligations: impl IntoIterator<Item = O>) {
         // Only keep those bounds that we haven't already seen.
         // This is necessary to prevent infinite recursion in some
@@ -103,6 +117,13 @@ impl<I: Interner, O: Elaboratable<I>> Elaborator<I, O> {
         self
     }
 
+    /// Start elaborating `Sized` - reqd during coherence checking, normally skipped to improve
+    /// compiler performance.
+    pub fn elaborate_sized(mut self) -> Self {
+        self.elaborate_sized = ElaborateSized::Yes;
+        self
+    }
+
     fn elaborate(&mut self, elaboratable: &O) {
         let cx = self.cx;
 
@@ -111,6 +132,19 @@ impl<I: Interner, O: Elaboratable<I>> Elaborator<I, O> {
             return;
         };
 
+        // PERF(sized-hierarchy): To avoid iterating over sizedness supertraits in
+        // parameter environments, as an optimisation, sizedness supertraits aren't
+        // elaborated, so check if a `Sized` obligation is being elaborated to a
+        // `MetaSized` obligation and emit it. Candidate assembly and confirmation
+        // are modified to check for the `Sized` subtrait when a `MetaSized` obligation
+        // is present.
+        if self.elaborate_sized == ElaborateSized::No
+            && let Some(did) = clause.as_trait_clause().map(|c| c.def_id())
+            && self.cx.is_lang_item(did, TraitSolverLangItem::Sized)
+        {
+            return;
+        }
+
         let bound_clause = clause.kind();
         match bound_clause.skip_binder() {
             ty::ClauseKind::Trait(data) => {
diff --git a/compiler/rustc_type_ir/src/fast_reject.rs b/compiler/rustc_type_ir/src/fast_reject.rs
index 615d07707b9..fa5e8d43702 100644
--- a/compiler/rustc_type_ir/src/fast_reject.rs
+++ b/compiler/rustc_type_ir/src/fast_reject.rs
@@ -237,9 +237,6 @@ impl<I: Interner, const INSTANTIATE_LHS_WITH_INFER: bool, const INSTANTIATE_RHS_
     }
 
     pub fn types_may_unify(self, lhs: I::Ty, rhs: I::Ty) -> bool {
-        if lhs == rhs {
-            return true;
-        }
         self.types_may_unify_inner(lhs, rhs, Self::STARTING_DEPTH)
     }
 
@@ -268,6 +265,10 @@ impl<I: Interner, const INSTANTIATE_LHS_WITH_INFER: bool, const INSTANTIATE_RHS_
     }
 
     fn types_may_unify_inner(self, lhs: I::Ty, rhs: I::Ty, depth: usize) -> bool {
+        if lhs == rhs {
+            return true;
+        }
+
         match rhs.kind() {
             // Start by checking whether the `rhs` type may unify with
             // pretty much everything. Just return `true` in that case.
diff --git a/compiler/rustc_type_ir/src/inherent.rs b/compiler/rustc_type_ir/src/inherent.rs
index fa88bcb891a..608efc7515c 100644
--- a/compiler/rustc_type_ir/src/inherent.rs
+++ b/compiler/rustc_type_ir/src/inherent.rs
@@ -11,7 +11,7 @@ use rustc_ast_ir::Mutability;
 use crate::elaborate::Elaboratable;
 use crate::fold::{TypeFoldable, TypeSuperFoldable};
 use crate::relate::Relate;
-use crate::solve::AdtDestructorKind;
+use crate::solve::{AdtDestructorKind, SizedTraitKind};
 use crate::visit::{Flags, TypeSuperVisitable, TypeVisitable};
 use crate::{self as ty, CollectAndApply, Interner, UpcastFrom};
 
@@ -228,6 +228,8 @@ pub trait Region<I: Interner<Region = Self>>:
 
     fn new_static(interner: I) -> Self;
 
+    fn new_placeholder(interner: I, var: I::PlaceholderRegion) -> Self;
+
     fn is_bound(self) -> bool {
         matches!(self.kind(), ty::ReBound(..))
     }
@@ -254,6 +256,8 @@ pub trait Const<I: Interner<Const = Self>>:
 
     fn new_anon_bound(interner: I, debruijn: ty::DebruijnIndex, var: ty::BoundVar) -> Self;
 
+    fn new_placeholder(interner: I, param: I::PlaceholderConst) -> Self;
+
     fn new_unevaluated(interner: I, uv: ty::UnevaluatedConst<I>) -> Self;
 
     fn new_expr(interner: I, expr: I::ExprConst) -> Self;
@@ -524,13 +528,14 @@ pub trait Clauses<I: Interner<Clauses = Self>>:
 }
 
 /// Common capabilities of placeholder kinds
-pub trait PlaceholderLike: Copy + Debug + Hash + Eq {
+pub trait PlaceholderLike<I: Interner>: Copy + Debug + Hash + Eq {
     fn universe(self) -> ty::UniverseIndex;
     fn var(self) -> ty::BoundVar;
 
+    type Bound: BoundVarLike<I>;
+    fn new(ui: ty::UniverseIndex, bound: Self::Bound) -> Self;
+    fn new_anon(ui: ty::UniverseIndex, var: ty::BoundVar) -> Self;
     fn with_updated_universe(self, ui: ty::UniverseIndex) -> Self;
-
-    fn new(ui: ty::UniverseIndex, var: ty::BoundVar) -> Self;
 }
 
 pub trait IntoKind {
@@ -539,13 +544,13 @@ pub trait IntoKind {
     fn kind(self) -> Self::Kind;
 }
 
-pub trait BoundVarLike<I: Interner> {
+pub trait BoundVarLike<I: Interner>: Copy + Debug + Hash + Eq {
     fn var(self) -> ty::BoundVar;
 
     fn assert_eq(self, var: I::BoundVarKind);
 }
 
-pub trait ParamLike {
+pub trait ParamLike: Copy + Debug + Hash + Eq {
     fn index(self) -> u32;
 }
 
@@ -566,7 +571,11 @@ pub trait AdtDef<I: Interner>: Copy + Debug + Hash + Eq {
     // FIXME: perhaps use `all_fields` and expose `FieldDef`.
     fn all_field_tys(self, interner: I) -> ty::EarlyBinder<I, impl IntoIterator<Item = I::Ty>>;
 
-    fn sized_constraint(self, interner: I) -> Option<ty::EarlyBinder<I, I::Ty>>;
+    fn sizedness_constraint(
+        self,
+        interner: I,
+        sizedness: SizedTraitKind,
+    ) -> Option<ty::EarlyBinder<I, I::Ty>>;
 
     fn is_fundamental(self) -> bool;
 
diff --git a/compiler/rustc_type_ir/src/interner.rs b/compiler/rustc_type_ir/src/interner.rs
index cc0925b2c32..033d2579678 100644
--- a/compiler/rustc_type_ir/src/interner.rs
+++ b/compiler/rustc_type_ir/src/interner.rs
@@ -103,9 +103,9 @@ pub trait Interner:
     type Ty: Ty<Self>;
     type Tys: Tys<Self>;
     type FnInputTys: Copy + Debug + Hash + Eq + SliceLike<Item = Self::Ty> + TypeVisitable<Self>;
-    type ParamTy: Copy + Debug + Hash + Eq + ParamLike;
-    type BoundTy: Copy + Debug + Hash + Eq + BoundVarLike<Self>;
-    type PlaceholderTy: PlaceholderLike;
+    type ParamTy: ParamLike;
+    type BoundTy: BoundVarLike<Self>;
+    type PlaceholderTy: PlaceholderLike<Self, Bound = Self::BoundTy>;
 
     // Things stored inside of tys
     type ErrorGuaranteed: Copy + Debug + Hash + Eq;
@@ -131,19 +131,19 @@ pub trait Interner:
 
     // Kinds of consts
     type Const: Const<Self>;
-    type PlaceholderConst: PlaceholderLike;
     type ParamConst: Copy + Debug + Hash + Eq + ParamLike;
-    type BoundConst: Copy + Debug + Hash + Eq + BoundVarLike<Self>;
+    type BoundConst: BoundVarLike<Self>;
+    type PlaceholderConst: PlaceholderLike<Self, Bound = Self::BoundConst>;
     type ValueConst: ValueConst<Self>;
     type ExprConst: ExprConst<Self>;
     type ValTree: Copy + Debug + Hash + Eq;
 
     // Kinds of regions
     type Region: Region<Self>;
-    type EarlyParamRegion: Copy + Debug + Hash + Eq + ParamLike;
+    type EarlyParamRegion: ParamLike;
     type LateParamRegion: Copy + Debug + Hash + Eq;
-    type BoundRegion: Copy + Debug + Hash + Eq + BoundVarLike<Self>;
-    type PlaceholderRegion: PlaceholderLike;
+    type BoundRegion: BoundVarLike<Self>;
+    type PlaceholderRegion: PlaceholderLike<Self, Bound = Self::BoundRegion>;
 
     // Predicates
     type ParamEnv: ParamEnv<Self>;
diff --git a/compiler/rustc_type_ir/src/lang_items.rs b/compiler/rustc_type_ir/src/lang_items.rs
index 699dd82fb22..3ee6e07b7a5 100644
--- a/compiler/rustc_type_ir/src/lang_items.rs
+++ b/compiler/rustc_type_ir/src/lang_items.rs
@@ -30,7 +30,9 @@ pub enum TraitSolverLangItem {
     FutureOutput,
     Iterator,
     Metadata,
+    MetaSized,
     Option,
+    PointeeSized,
     PointeeTrait,
     Poll,
     Sized,
diff --git a/compiler/rustc_type_ir/src/lib.rs b/compiler/rustc_type_ir/src/lib.rs
index 792090effcf..3863a6d7c5a 100644
--- a/compiler/rustc_type_ir/src/lib.rs
+++ b/compiler/rustc_type_ir/src/lib.rs
@@ -1,3 +1,4 @@
+#![cfg_attr(feature = "nightly", rustc_diagnostic_item = "type_ir")]
 // tidy-alphabetical-start
 #![allow(rustc::usage_of_ty_tykind)]
 #![allow(rustc::usage_of_type_ir_inherent)]
@@ -7,6 +8,7 @@
     feature(associated_type_defaults, never_type, rustc_attrs, negative_impls)
 )]
 #![cfg_attr(feature = "nightly", allow(internal_features))]
+#![cfg_attr(not(bootstrap), allow(rustc::direct_use_of_rustc_type_ir))]
 // tidy-alphabetical-end
 
 extern crate self as rustc_type_ir;
diff --git a/compiler/rustc_type_ir/src/search_graph/global_cache.rs b/compiler/rustc_type_ir/src/search_graph/global_cache.rs
index 0ce927b58bb..a2442660259 100644
--- a/compiler/rustc_type_ir/src/search_graph/global_cache.rs
+++ b/compiler/rustc_type_ir/src/search_graph/global_cache.rs
@@ -4,7 +4,7 @@ use super::{AvailableDepth, Cx, NestedGoals};
 use crate::data_structures::HashMap;
 
 struct Success<X: Cx> {
-    additional_depth: usize,
+    required_depth: usize,
     nested_goals: NestedGoals<X>,
     result: X::Tracked<X::Result>,
 }
@@ -28,7 +28,7 @@ struct CacheEntry<X: Cx> {
 #[derive_where(Debug; X: Cx)]
 pub(super) struct CacheData<'a, X: Cx> {
     pub(super) result: X::Result,
-    pub(super) additional_depth: usize,
+    pub(super) required_depth: usize,
     pub(super) encountered_overflow: bool,
     pub(super) nested_goals: &'a NestedGoals<X>,
 }
@@ -47,7 +47,7 @@ impl<X: Cx> GlobalCache<X> {
         origin_result: X::Result,
         dep_node: X::DepNodeIndex,
 
-        additional_depth: usize,
+        required_depth: usize,
         encountered_overflow: bool,
         nested_goals: NestedGoals<X>,
     ) {
@@ -55,13 +55,13 @@ impl<X: Cx> GlobalCache<X> {
         let entry = self.map.entry(input).or_default();
         if encountered_overflow {
             let with_overflow = WithOverflow { nested_goals, result };
-            let prev = entry.with_overflow.insert(additional_depth, with_overflow);
+            let prev = entry.with_overflow.insert(required_depth, with_overflow);
             if let Some(prev) = &prev {
                 assert!(cx.evaluation_is_concurrent());
                 assert_eq!(cx.get_tracked(&prev.result), origin_result);
             }
         } else {
-            let prev = entry.success.replace(Success { additional_depth, nested_goals, result });
+            let prev = entry.success.replace(Success { required_depth, nested_goals, result });
             if let Some(prev) = &prev {
                 assert!(cx.evaluation_is_concurrent());
                 assert_eq!(cx.get_tracked(&prev.result), origin_result);
@@ -81,13 +81,13 @@ impl<X: Cx> GlobalCache<X> {
         mut candidate_is_applicable: impl FnMut(&NestedGoals<X>) -> bool,
     ) -> Option<CacheData<'a, X>> {
         let entry = self.map.get(&input)?;
-        if let Some(Success { additional_depth, ref nested_goals, ref result }) = entry.success {
-            if available_depth.cache_entry_is_applicable(additional_depth)
+        if let Some(Success { required_depth, ref nested_goals, ref result }) = entry.success {
+            if available_depth.cache_entry_is_applicable(required_depth)
                 && candidate_is_applicable(nested_goals)
             {
                 return Some(CacheData {
                     result: cx.get_tracked(&result),
-                    additional_depth,
+                    required_depth,
                     encountered_overflow: false,
                     nested_goals,
                 });
@@ -101,7 +101,7 @@ impl<X: Cx> GlobalCache<X> {
             if candidate_is_applicable(nested_goals) {
                 return Some(CacheData {
                     result: cx.get_tracked(result),
-                    additional_depth,
+                    required_depth: additional_depth,
                     encountered_overflow: true,
                     nested_goals,
                 });
diff --git a/compiler/rustc_type_ir/src/search_graph/mod.rs b/compiler/rustc_type_ir/src/search_graph/mod.rs
index 1acd5d5c2af..b59b4f92854 100644
--- a/compiler/rustc_type_ir/src/search_graph/mod.rs
+++ b/compiler/rustc_type_ir/src/search_graph/mod.rs
@@ -19,13 +19,14 @@ use std::hash::Hash;
 use std::marker::PhantomData;
 
 use derive_where::derive_where;
-use rustc_index::{Idx, IndexVec};
 #[cfg(feature = "nightly")]
 use rustc_macros::{Decodable_NoContext, Encodable_NoContext, HashStable_NoContext};
 use tracing::debug;
 
 use crate::data_structures::HashMap;
 
+mod stack;
+use stack::{Stack, StackDepth, StackEntry};
 mod global_cache;
 use global_cache::CacheData;
 pub use global_cache::GlobalCache;
@@ -225,9 +226,9 @@ impl AvailableDepth {
     /// in case there is exponential blowup.
     fn allowed_depth_for_nested<D: Delegate>(
         root_depth: AvailableDepth,
-        stack: &IndexVec<StackDepth, StackEntry<D::Cx>>,
+        stack: &Stack<D::Cx>,
     ) -> Option<AvailableDepth> {
-        if let Some(last) = stack.raw.last() {
+        if let Some(last) = stack.last() {
             if last.available_depth.0 == 0 {
                 return None;
             }
@@ -433,50 +434,6 @@ impl<X: Cx> NestedGoals<X> {
     }
 }
 
-rustc_index::newtype_index! {
-    #[orderable]
-    #[gate_rustc_only]
-    pub struct StackDepth {}
-}
-
-/// Stack entries of the evaluation stack. Its fields tend to be lazily
-/// when popping a child goal or completely immutable.
-#[derive_where(Debug; X: Cx)]
-struct StackEntry<X: Cx> {
-    input: X::Input,
-
-    /// Whether proving this goal is a coinductive step.
-    ///
-    /// This is used when encountering a trait solver cycle to
-    /// decide whether the initial provisional result of the cycle.
-    step_kind_from_parent: PathKind,
-
-    /// The available depth of a given goal, immutable.
-    available_depth: AvailableDepth,
-
-    /// The maximum depth reached by this stack entry, only up-to date
-    /// for the top of the stack and lazily updated for the rest.
-    reached_depth: StackDepth,
-
-    /// All cycle heads this goal depends on. Lazily updated and only
-    /// up-to date for the top of the stack.
-    heads: CycleHeads,
-
-    /// Whether evaluating this goal encountered overflow. Lazily updated.
-    encountered_overflow: bool,
-
-    /// Whether this goal has been used as the root of a cycle. This gets
-    /// eagerly updated when encountering a cycle.
-    has_been_used: Option<UsageKind>,
-
-    /// The nested goals of this goal, see the doc comment of the type.
-    nested_goals: NestedGoals<X>,
-
-    /// Starts out as `None` and gets set when rerunning this
-    /// goal in case we encounter a cycle.
-    provisional_result: Option<X::Result>,
-}
-
 /// A provisional result of an already computed goals which depends on other
 /// goals still on the stack.
 #[derive_where(Debug; X: Cx)]
@@ -498,7 +455,7 @@ pub struct SearchGraph<D: Delegate<Cx = X>, X: Cx = <D as Delegate>::Cx> {
     /// The stack of goals currently being computed.
     ///
     /// An element is *deeper* in the stack if its index is *lower*.
-    stack: IndexVec<StackDepth, StackEntry<X>>,
+    stack: Stack<X>,
     /// The provisional cache contains entries for already computed goals which
     /// still depend on goals higher-up in the stack. We don't move them to the
     /// global cache and track them locally instead. A provisional cache entry
@@ -537,16 +494,16 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
     /// and using existing global cache entries to make sure they
     /// have the same impact on the remaining evaluation.
     fn update_parent_goal(
-        stack: &mut IndexVec<StackDepth, StackEntry<X>>,
+        stack: &mut Stack<X>,
         step_kind_from_parent: PathKind,
-        reached_depth: StackDepth,
+        required_depth_for_nested: usize,
         heads: &CycleHeads,
         encountered_overflow: bool,
         context: UpdateParentGoalCtxt<'_, X>,
     ) {
         if let Some(parent_index) = stack.last_index() {
             let parent = &mut stack[parent_index];
-            parent.reached_depth = parent.reached_depth.max(reached_depth);
+            parent.required_depth = parent.required_depth.max(required_depth_for_nested + 1);
             parent.encountered_overflow |= encountered_overflow;
 
             parent.heads.extend_from_child(parent_index, step_kind_from_parent, heads);
@@ -588,13 +545,11 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
     /// the stack which completes the cycle. This given an inductive step AB which then cycles
     /// coinductively with A, we need to treat this cycle as coinductive.
     fn cycle_path_kind(
-        stack: &IndexVec<StackDepth, StackEntry<X>>,
+        stack: &Stack<X>,
         step_kind_to_head: PathKind,
         head: StackDepth,
     ) -> PathKind {
-        stack.raw[head.index() + 1..]
-            .iter()
-            .fold(step_kind_to_head, |curr, entry| curr.extend(entry.step_kind_from_parent))
+        stack.cycle_step_kinds(head).fold(step_kind_to_head, |curr, step| curr.extend(step))
     }
 
     /// Probably the most involved method of the whole solver.
@@ -656,20 +611,18 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
             return result;
         }
 
-        // Unfortunate, it looks like we actually have to compute this goalrar.
-        let depth = self.stack.next_index();
-        let entry = StackEntry {
+        // Unfortunate, it looks like we actually have to compute this goal.
+        self.stack.push(StackEntry {
             input,
             step_kind_from_parent,
             available_depth,
-            reached_depth: depth,
+            required_depth: 0,
             heads: Default::default(),
             encountered_overflow: false,
             has_been_used: None,
             nested_goals: Default::default(),
             provisional_result: None,
-        };
-        assert_eq!(self.stack.push(entry), depth);
+        });
 
         // This is for global caching, so we properly track query dependencies.
         // Everything that affects the `result` should be performed within this
@@ -686,7 +639,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         Self::update_parent_goal(
             &mut self.stack,
             final_entry.step_kind_from_parent,
-            final_entry.reached_depth,
+            final_entry.required_depth,
             &final_entry.heads,
             final_entry.encountered_overflow,
             UpdateParentGoalCtxt::Ordinary(&final_entry.nested_goals),
@@ -700,7 +653,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
                 // the global cache.
                 assert_eq!(result, expected, "input={input:?}");
             } else if D::inspect_is_noop(inspect) {
-                self.insert_global_cache(cx, input, final_entry, result, dep_node)
+                self.insert_global_cache(cx, final_entry, result, dep_node)
             }
         } else if D::ENABLE_PROVISIONAL_CACHE {
             debug_assert!(validate_cache.is_none(), "unexpected non-root: {input:?}");
@@ -728,7 +681,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         input: X::Input,
         inspect: &mut D::ProofTreeBuilder,
     ) -> X::Result {
-        if let Some(last) = self.stack.raw.last_mut() {
+        if let Some(last) = self.stack.last_mut() {
             last.encountered_overflow = true;
             // If computing a goal `B` depends on another goal `A` and
             // `A` has a nested goal which overflows, then computing `B`
@@ -859,7 +812,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
                 // apply provisional cache entries which encountered overflow once the
                 // current goal is already part of the same cycle. This check could be
                 // improved but seems to be good enough for now.
-                let last = self.stack.raw.last().unwrap();
+                let last = self.stack.last().unwrap();
                 if last.heads.opt_lowest_cycle_head().is_none_or(|lowest| lowest > head) {
                     continue;
                 }
@@ -868,14 +821,10 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
             // A provisional cache entry is only valid if the current path from its
             // highest cycle head to the goal is the same.
             if path_from_head == Self::cycle_path_kind(&self.stack, step_kind_from_parent, head) {
-                // While we don't have to track the full depth of the provisional cache entry,
-                // we do have to increment the required depth by one as we'd have already failed
-                // with overflow otherwise
-                let next_index = self.stack.next_index();
                 Self::update_parent_goal(
                     &mut self.stack,
                     step_kind_from_parent,
-                    next_index,
+                    0,
                     heads,
                     encountered_overflow,
                     UpdateParentGoalCtxt::ProvisionalCacheHit,
@@ -893,9 +842,8 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
     /// evaluating this entry would not have ended up depending on either a goal
     /// already on the stack or a provisional cache entry.
     fn candidate_is_applicable(
-        stack: &IndexVec<StackDepth, StackEntry<X>>,
+        &self,
         step_kind_from_parent: PathKind,
-        provisional_cache: &HashMap<X::Input, Vec<ProvisionalCacheEntry<X>>>,
         nested_goals: &NestedGoals<X>,
     ) -> bool {
         // If the global cache entry didn't depend on any nested goals, it always
@@ -906,7 +854,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
 
         // If a nested goal of the global cache entry is on the stack, we would
         // definitely encounter a cycle.
-        if stack.iter().any(|e| nested_goals.contains(e.input)) {
+        if self.stack.iter().any(|e| nested_goals.contains(e.input)) {
             debug!("cache entry not applicable due to stack");
             return false;
         }
@@ -915,7 +863,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         // would apply for any of its nested goals.
         #[allow(rustc::potential_query_instability)]
         for (input, path_from_global_entry) in nested_goals.iter() {
-            let Some(entries) = provisional_cache.get(&input) else {
+            let Some(entries) = self.provisional_cache.get(&input) else {
                 continue;
             };
 
@@ -941,7 +889,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
                 // We check if any of the paths taken while computing the global goal
                 // would end up with an applicable provisional cache entry.
                 let head = heads.highest_cycle_head();
-                let head_to_curr = Self::cycle_path_kind(stack, step_kind_from_parent, head);
+                let head_to_curr = Self::cycle_path_kind(&self.stack, step_kind_from_parent, head);
                 let full_paths = path_from_global_entry.extend_with(head_to_curr);
                 if full_paths.contains(head_to_provisional.into()) {
                     debug!(
@@ -969,12 +917,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         cx.with_global_cache(|cache| {
             cache
                 .get(cx, input, available_depth, |nested_goals| {
-                    Self::candidate_is_applicable(
-                        &self.stack,
-                        step_kind_from_parent,
-                        &self.provisional_cache,
-                        nested_goals,
-                    )
+                    self.candidate_is_applicable(step_kind_from_parent, nested_goals)
                 })
                 .map(|c| c.result)
         })
@@ -991,33 +934,24 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         available_depth: AvailableDepth,
     ) -> Option<X::Result> {
         cx.with_global_cache(|cache| {
-            let CacheData { result, additional_depth, encountered_overflow, nested_goals } = cache
+            let CacheData { result, required_depth, encountered_overflow, nested_goals } = cache
                 .get(cx, input, available_depth, |nested_goals| {
-                    Self::candidate_is_applicable(
-                        &self.stack,
-                        step_kind_from_parent,
-                        &self.provisional_cache,
-                        nested_goals,
-                    )
+                    self.candidate_is_applicable(step_kind_from_parent, nested_goals)
                 })?;
 
-            // Update the reached depth of the current goal to make sure
-            // its state is the same regardless of whether we've used the
-            // global cache or not.
-            let reached_depth = self.stack.next_index().plus(additional_depth);
             // We don't move cycle participants to the global cache, so the
             // cycle heads are always empty.
             let heads = Default::default();
             Self::update_parent_goal(
                 &mut self.stack,
                 step_kind_from_parent,
-                reached_depth,
+                required_depth,
                 &heads,
                 encountered_overflow,
                 UpdateParentGoalCtxt::Ordinary(nested_goals),
             );
 
-            debug!(?additional_depth, "global cache hit");
+            debug!(?required_depth, "global cache hit");
             Some(result)
         })
     }
@@ -1028,7 +962,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         input: X::Input,
         step_kind_from_parent: PathKind,
     ) -> Option<X::Result> {
-        let (head, _stack_entry) = self.stack.iter_enumerated().find(|(_, e)| e.input == input)?;
+        let head = self.stack.find(input)?;
         // We have a nested goal which directly relies on a goal deeper in the stack.
         //
         // We start by tagging all cycle participants, as that's necessary for caching.
@@ -1043,10 +977,9 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
 
         // Subtle: when encountering a cyclic goal, we still first checked for overflow,
         // so we have to update the reached depth.
-        let next_index = self.stack.next_index();
         let last_index = self.stack.last_index().unwrap();
         let last = &mut self.stack[last_index];
-        last.reached_depth = last.reached_depth.max(next_index);
+        last.required_depth = last.required_depth.max(1);
 
         last.nested_goals.insert(input, step_kind_from_parent.into());
         last.nested_goals.insert(last.input, PathsToNested::EMPTY);
@@ -1095,7 +1028,7 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
         let mut i = 0;
         loop {
             let result = evaluate_goal(self, inspect);
-            let stack_entry = self.stack.pop().unwrap();
+            let stack_entry = self.stack.pop();
             debug_assert_eq!(stack_entry.input, input);
 
             // If the current goal is not the root of a cycle, we are done.
@@ -1176,20 +1109,18 @@ impl<D: Delegate<Cx = X>, X: Cx> SearchGraph<D> {
     fn insert_global_cache(
         &mut self,
         cx: X,
-        input: X::Input,
         final_entry: StackEntry<X>,
         result: X::Result,
         dep_node: X::DepNodeIndex,
     ) {
-        let additional_depth = final_entry.reached_depth.as_usize() - self.stack.len();
         debug!(?final_entry, ?result, "insert global cache");
         cx.with_global_cache(|cache| {
             cache.insert(
                 cx,
-                input,
+                final_entry.input,
                 result,
                 dep_node,
-                additional_depth,
+                final_entry.required_depth,
                 final_entry.encountered_overflow,
                 final_entry.nested_goals,
             )
diff --git a/compiler/rustc_type_ir/src/search_graph/stack.rs b/compiler/rustc_type_ir/src/search_graph/stack.rs
new file mode 100644
index 00000000000..8bb247bf055
--- /dev/null
+++ b/compiler/rustc_type_ir/src/search_graph/stack.rs
@@ -0,0 +1,113 @@
+use std::ops::{Index, IndexMut};
+
+use derive_where::derive_where;
+use rustc_index::IndexVec;
+
+use super::{AvailableDepth, Cx, CycleHeads, NestedGoals, PathKind, UsageKind};
+
+rustc_index::newtype_index! {
+    #[orderable]
+    #[gate_rustc_only]
+    pub(super) struct StackDepth {}
+}
+
+/// Stack entries of the evaluation stack. Its fields tend to be lazily
+/// when popping a child goal or completely immutable.
+#[derive_where(Debug; X: Cx)]
+pub(super) struct StackEntry<X: Cx> {
+    pub input: X::Input,
+
+    /// Whether proving this goal is a coinductive step.
+    ///
+    /// This is used when encountering a trait solver cycle to
+    /// decide whether the initial provisional result of the cycle.
+    pub step_kind_from_parent: PathKind,
+
+    /// The available depth of a given goal, immutable.
+    pub available_depth: AvailableDepth,
+
+    /// The maximum depth required while evaluating this goal.
+    pub required_depth: usize,
+
+    /// All cycle heads this goal depends on. Lazily updated and only
+    /// up-to date for the top of the stack.
+    pub heads: CycleHeads,
+
+    /// Whether evaluating this goal encountered overflow. Lazily updated.
+    pub encountered_overflow: bool,
+
+    /// Whether this goal has been used as the root of a cycle. This gets
+    /// eagerly updated when encountering a cycle.
+    pub has_been_used: Option<UsageKind>,
+
+    /// The nested goals of this goal, see the doc comment of the type.
+    pub nested_goals: NestedGoals<X>,
+
+    /// Starts out as `None` and gets set when rerunning this
+    /// goal in case we encounter a cycle.
+    pub provisional_result: Option<X::Result>,
+}
+
+#[derive_where(Default; X: Cx)]
+pub(super) struct Stack<X: Cx> {
+    entries: IndexVec<StackDepth, StackEntry<X>>,
+}
+
+impl<X: Cx> Stack<X> {
+    pub(super) fn is_empty(&self) -> bool {
+        self.entries.is_empty()
+    }
+
+    pub(super) fn len(&self) -> usize {
+        self.entries.len()
+    }
+
+    pub(super) fn last_index(&self) -> Option<StackDepth> {
+        self.entries.last_index()
+    }
+
+    pub(super) fn last(&self) -> Option<&StackEntry<X>> {
+        self.entries.raw.last()
+    }
+
+    pub(super) fn last_mut(&mut self) -> Option<&mut StackEntry<X>> {
+        self.entries.raw.last_mut()
+    }
+
+    pub(super) fn next_index(&self) -> StackDepth {
+        self.entries.next_index()
+    }
+
+    pub(super) fn push(&mut self, entry: StackEntry<X>) -> StackDepth {
+        self.entries.push(entry)
+    }
+
+    pub(super) fn pop(&mut self) -> StackEntry<X> {
+        self.entries.pop().unwrap()
+    }
+
+    pub(super) fn cycle_step_kinds(&self, head: StackDepth) -> impl Iterator<Item = PathKind> {
+        self.entries.raw[head.index() + 1..].iter().map(|entry| entry.step_kind_from_parent)
+    }
+
+    pub(super) fn iter(&self) -> impl Iterator<Item = &StackEntry<X>> {
+        self.entries.iter()
+    }
+
+    pub(super) fn find(&self, input: X::Input) -> Option<StackDepth> {
+        self.entries.iter_enumerated().find(|(_, e)| e.input == input).map(|(idx, _)| idx)
+    }
+}
+
+impl<X: Cx> Index<StackDepth> for Stack<X> {
+    type Output = StackEntry<X>;
+    fn index(&self, index: StackDepth) -> &StackEntry<X> {
+        &self.entries[index]
+    }
+}
+
+impl<X: Cx> IndexMut<StackDepth> for Stack<X> {
+    fn index_mut(&mut self, index: StackDepth) -> &mut Self::Output {
+        &mut self.entries[index]
+    }
+}
diff --git a/compiler/rustc_type_ir/src/solve/mod.rs b/compiler/rustc_type_ir/src/solve/mod.rs
index 2e05c23a645..bbbeaa29f84 100644
--- a/compiler/rustc_type_ir/src/solve/mod.rs
+++ b/compiler/rustc_type_ir/src/solve/mod.rs
@@ -8,6 +8,7 @@ use derive_where::derive_where;
 use rustc_macros::{Decodable_NoContext, Encodable_NoContext, HashStable_NoContext};
 use rustc_type_ir_macros::{Lift_Generic, TypeFoldable_Generic, TypeVisitable_Generic};
 
+use crate::lang_items::TraitSolverLangItem;
 use crate::search_graph::PathKind;
 use crate::{self as ty, Canonical, CanonicalVarValues, Interner, Upcast};
 
@@ -236,6 +237,14 @@ pub struct ExternalConstraintsData<I: Interner> {
     pub normalization_nested_goals: NestedNormalizationGoals<I>,
 }
 
+impl<I: Interner> ExternalConstraintsData<I> {
+    pub fn is_empty(&self) -> bool {
+        self.region_constraints.is_empty()
+            && self.opaque_types.is_empty()
+            && self.normalization_nested_goals.is_empty()
+    }
+}
+
 #[derive_where(Clone, Hash, PartialEq, Eq, Debug, Default; I: Interner)]
 #[derive(TypeVisitable_Generic, TypeFoldable_Generic)]
 #[cfg_attr(feature = "nightly", derive(HashStable_NoContext))]
@@ -358,3 +367,24 @@ pub enum AdtDestructorKind {
     NotConst,
     Const,
 }
+
+/// Which sizedness trait - `Sized`, `MetaSized`? `PointeeSized` is omitted as it is removed during
+/// lowering.
+#[derive(Copy, Clone, Debug, Eq, Hash, PartialEq)]
+#[cfg_attr(feature = "nightly", derive(HashStable_NoContext))]
+pub enum SizedTraitKind {
+    /// `Sized` trait
+    Sized,
+    /// `MetaSized` trait
+    MetaSized,
+}
+
+impl SizedTraitKind {
+    /// Returns `DefId` of corresponding language item.
+    pub fn require_lang_item<I: Interner>(self, cx: I) -> I::DefId {
+        cx.require_lang_item(match self {
+            SizedTraitKind::Sized => TraitSolverLangItem::Sized,
+            SizedTraitKind::MetaSized => TraitSolverLangItem::MetaSized,
+        })
+    }
+}
diff --git a/compiler/rustc_type_ir/src/ty_kind/closure.rs b/compiler/rustc_type_ir/src/ty_kind/closure.rs
index 8ba985d2d19..d1ca9bdb7fb 100644
--- a/compiler/rustc_type_ir/src/ty_kind/closure.rs
+++ b/compiler/rustc_type_ir/src/ty_kind/closure.rs
@@ -342,7 +342,7 @@ struct HasRegionsBoundAt {
 // FIXME: Could be optimized to not walk into components with no escaping bound vars.
 impl<I: Interner> TypeVisitor<I> for HasRegionsBoundAt {
     type Result = ControlFlow<()>;
-    fn visit_binder<T: TypeFoldable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
+    fn visit_binder<T: TypeVisitable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
         self.binder.shift_in(1);
         t.super_visit_with(self)?;
         self.binder.shift_out(1);
diff --git a/compiler/rustc_type_ir/src/visit.rs b/compiler/rustc_type_ir/src/visit.rs
index fc3864dd5ae..a96ac97f785 100644
--- a/compiler/rustc_type_ir/src/visit.rs
+++ b/compiler/rustc_type_ir/src/visit.rs
@@ -52,7 +52,7 @@ use smallvec::SmallVec;
 use thin_vec::ThinVec;
 
 use crate::inherent::*;
-use crate::{self as ty, Interner, TypeFlags, TypeFoldable};
+use crate::{self as ty, Interner, TypeFlags};
 
 /// This trait is implemented for every type that can be visited,
 /// providing the skeleton of the traversal.
@@ -94,7 +94,7 @@ pub trait TypeVisitor<I: Interner>: Sized {
     #[cfg(not(feature = "nightly"))]
     type Result: VisitorResult;
 
-    fn visit_binder<T: TypeFoldable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
+    fn visit_binder<T: TypeVisitable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
         t.super_visit_with(self)
     }
 
@@ -401,7 +401,7 @@ impl std::fmt::Debug for HasTypeFlagsVisitor {
 impl<I: Interner> TypeVisitor<I> for HasTypeFlagsVisitor {
     type Result = ControlFlow<FoundFlags>;
 
-    fn visit_binder<T: TypeFoldable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
+    fn visit_binder<T: TypeVisitable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
         // If we're looking for the HAS_BINDER_VARS flag, check if the
         // binder has vars. This won't be present in the binder's bound
         // value, so we need to check here too.
@@ -510,7 +510,7 @@ struct HasEscapingVarsVisitor {
 impl<I: Interner> TypeVisitor<I> for HasEscapingVarsVisitor {
     type Result = ControlFlow<FoundEscapingVars>;
 
-    fn visit_binder<T: TypeFoldable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
+    fn visit_binder<T: TypeVisitable<I>>(&mut self, t: &ty::Binder<I, T>) -> Self::Result {
         self.outer_index.shift_in(1);
         let result = t.super_visit_with(self);
         self.outer_index.shift_out(1);