Add tracking issues for feature detection

9 files changed, 86 insertions, 74 deletions

diff --git a/library/stdarch/crates/std_detect/src/detect/arch/arm.rs b/library/stdarch/crates/std_detect/src/detect/arch/arm.rs
index fd332e0b2ca..50e77fde59a 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/arm.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/arm.rs
@@ -6,23 +6,23 @@ features! {
     @MACRO_NAME: is_arm_feature_detected;
     @MACRO_ATTRS:
     /// Checks if `arm` feature is enabled.
-    #[unstable(feature = "stdsimd", issue = "27731")]
+    #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")]
     @NO_RUNTIME_DETECTION: "v7";
     @NO_RUNTIME_DETECTION: "vfp2";
     @NO_RUNTIME_DETECTION: "vfp3";
     @NO_RUNTIME_DETECTION: "vfp4";
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] neon: "neon";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] neon: "neon";
     /// ARM Advanced SIMD (NEON) - Aarch32
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] pmull: "pmull";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] pmull: "pmull";
     /// Polynomial Multiply
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] crc: "crc";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] crc: "crc";
     /// CRC32 (Cyclic Redundancy Check)
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] aes: "aes";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] aes: "aes";
     /// FEAT_AES (AES instructions)
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] sha2: "sha2";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] sha2: "sha2";
     /// FEAT_SHA1 & FEAT_SHA256 (SHA1 & SHA2-256 instructions)
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] i8mm: "i8mm";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] i8mm: "i8mm";
     /// FEAT_I8MM (integer matrix multiplication, plus ASIMD support)
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] dotprod: "dotprod";
+    @FEATURE: #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")] dotprod: "dotprod";
     /// FEAT_DotProd (Vector Dot-Product - ASIMDDP)
 }
diff --git a/library/stdarch/crates/std_detect/src/detect/arch/mips.rs b/library/stdarch/crates/std_detect/src/detect/arch/mips.rs
index ae27d0093c6..e185fdfcaac 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/mips.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/mips.rs
@@ -6,7 +6,7 @@ features! {
     @MACRO_NAME: is_mips_feature_detected;
     @MACRO_ATTRS:
     /// Checks if `mips` feature is enabled.
-    #[unstable(feature = "stdsimd", issue = "27731")]
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] msa: "msa";
+    #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")]
+    @FEATURE: #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] msa: "msa";
     /// MIPS SIMD Architecture (MSA)
 }
diff --git a/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs b/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs
index 7182ec2da4e..69fe4869d30 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/mips64.rs
@@ -6,7 +6,7 @@ features! {
     @MACRO_NAME: is_mips64_feature_detected;
     @MACRO_ATTRS:
     /// Checks if `mips64` feature is enabled.
-    #[unstable(feature = "stdsimd", issue = "27731")]
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] msa: "msa";
+    #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")]
+    @FEATURE: #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")] msa: "msa";
     /// MIPS SIMD Architecture (MSA)
 }
diff --git a/library/stdarch/crates/std_detect/src/detect/arch/mod.rs b/library/stdarch/crates/std_detect/src/detect/arch/mod.rs
index 81a1f23e873..af8222dc2b2 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/mod.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/mod.rs
@@ -22,20 +22,28 @@ mod mips64;
 
 cfg_if! {
     if #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] {
+        #[stable(feature = "simd_x86", since = "1.27.0")]
         pub use x86::*;
     } else if #[cfg(target_arch = "arm")] {
+        #[unstable(feature = "stdarch_arm_feature_detection", issue = "111190")]
         pub use arm::*;
     } else if #[cfg(target_arch = "aarch64")] {
+        #[stable(feature = "simd_aarch64", since = "1.60.0")]
         pub use aarch64::*;
     } else if #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))] {
+        #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")]
         pub use riscv::*;
     } else if #[cfg(target_arch = "powerpc")] {
+        #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")]
         pub use powerpc::*;
     } else if #[cfg(target_arch = "powerpc64")] {
+        #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")]
         pub use powerpc64::*;
     } else if #[cfg(target_arch = "mips")] {
+        #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")]
         pub use mips::*;
     } else if #[cfg(target_arch = "mips64")] {
+        #[unstable(feature = "stdarch_mips_feature_detection", issue = "111188")]
         pub use mips64::*;
     } else {
         // Unimplemented architecture:
@@ -44,6 +52,7 @@ cfg_if! {
             Null
         }
         #[doc(hidden)]
+        #[unstable(feature = "stdarch_internal", issue = "none")]
         pub mod __is_feature_detected {}
 
         impl Feature {
diff --git a/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs b/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs
index d135cd95de2..fc2ac8963f0 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/powerpc.rs
@@ -6,11 +6,11 @@ features! {
     @MACRO_NAME: is_powerpc_feature_detected;
     @MACRO_ATTRS:
     /// Checks if `powerpc` feature is enabled.
-    #[unstable(feature = "stdsimd", issue = "27731")]
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] altivec: "altivec";
+    #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")]
+    @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] altivec: "altivec";
     /// Altivec
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] vsx: "vsx";
+    @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] vsx: "vsx";
     /// VSX
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] power8: "power8";
+    @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8: "power8";
     /// Power8
 }
diff --git a/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs b/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs
index 773afd6ceb4..579bdc50ca8 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/powerpc64.rs
@@ -6,11 +6,11 @@ features! {
     @MACRO_NAME: is_powerpc64_feature_detected;
     @MACRO_ATTRS:
     /// Checks if `powerpc` feature is enabled.
-    #[unstable(feature = "stdsimd", issue = "27731")]
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] altivec: "altivec";
+    #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")]
+    @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] altivec: "altivec";
     /// Altivec
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] vsx: "vsx";
+    @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] vsx: "vsx";
     /// VSX
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] power8: "power8";
+    @FEATURE: #[unstable(feature = "stdarch_powerpc_feature_detection", issue = "111191")] power8: "power8";
     /// Power8
 }
diff --git a/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs b/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs
index 5ea36e7c1c9..1d2d32a014f 100644
--- a/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs
+++ b/library/stdarch/crates/std_detect/src/detect/arch/riscv.rs
@@ -99,108 +99,108 @@ features! {
     /// * Zkt: `"zkt"`
     ///
     /// [ISA manual]: https://github.com/riscv/riscv-isa-manual/
-    #[unstable(feature = "stdsimd", issue = "27731")]
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rv32i: "rv32i";
+    #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")]
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv32i: "rv32i";
     /// RV32I Base Integer Instruction Set
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zifencei: "zifencei";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zifencei: "zifencei";
     /// "Zifencei" Instruction-Fetch Fence
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zihintpause: "zihintpause";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintpause: "zihintpause";
     /// "Zihintpause" Pause Hint
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rv64i: "rv64i";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv64i: "rv64i";
     /// RV64I Base Integer Instruction Set
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] m: "m";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] m: "m";
     /// "M" Standard Extension for Integer Multiplication and Division
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] a: "a";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] a: "a";
     /// "A" Standard Extension for Atomic Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zicsr: "zicsr";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicsr: "zicsr";
     /// "Zicsr", Control and Status Register (CSR) Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zicntr: "zicntr";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicntr: "zicntr";
     /// "Zicntr", Standard Extension for Base Counters and Timers
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zihpm: "zihpm";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihpm: "zihpm";
     /// "Zihpm", Standard Extension for Hardware Performance Counters
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] f: "f";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] f: "f";
     /// "F" Standard Extension for Single-Precision Floating-Point
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] d: "d";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] d: "d";
     /// "D" Standard Extension for Double-Precision Floating-Point
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] q: "q";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] q: "q";
     /// "Q" Standard Extension for Quad-Precision Floating-Point
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] c: "c";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] c: "c";
     /// "C" Standard Extension for Compressed Instructions
 
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zfinx: "zfinx";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfinx: "zfinx";
     /// "Zfinx" Standard Extension for Single-Precision Floating-Point in Integer Registers
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zdinx: "zdinx";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zdinx: "zdinx";
     /// "Zdinx" Standard Extension for Double-Precision Floating-Point in Integer Registers
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zhinx: "zhinx";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zhinx: "zhinx";
     /// "Zhinx" Standard Extension for Half-Precision Floating-Point in Integer Registers
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zhinxmin: "zhinxmin";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zhinxmin: "zhinxmin";
     /// "Zhinxmin" Standard Extension for Minimal Half-Precision Floating-Point in Integer Registers
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] ztso: "ztso";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] ztso: "ztso";
     /// "Ztso" Standard Extension for Total Store Ordering
 
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rv32e: "rv32e";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv32e: "rv32e";
     /// RV32E Base Integer Instruction Set
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] rv128i: "rv128i";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] rv128i: "rv128i";
     /// RV128I Base Integer Instruction Set
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zfh: "zfh";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfh: "zfh";
     /// "Zfh" Standard Extension for 16-Bit Half-Precision Floating-Point
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zfhmin: "zfhmin";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zfhmin: "zfhmin";
     /// "Zfhmin" Standard Extension for Minimal Half-Precision Floating-Point Support
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] b: "b";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] b: "b";
     /// "B" Standard Extension for Bit Manipulation
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] j: "j";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] j: "j";
     /// "J" Standard Extension for Dynamically Translated Languages
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] p: "p";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] p: "p";
     /// "P" Standard Extension for Packed-SIMD Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] v: "v";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] v: "v";
     /// "V" Standard Extension for Vector Operations
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zam: "zam";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zam: "zam";
     /// "Zam" Standard Extension for Misaligned Atomics
 
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] s: "s";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] s: "s";
     /// Supervisor-Level ISA
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] svnapot: "svnapot";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] svnapot: "svnapot";
     /// "Svnapot" Standard Extension for NAPOT Translation Contiguity
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] svpbmt: "svpbmt";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] svpbmt: "svpbmt";
     /// "Svpbmt" Standard Extension for Page-Based Memory Types
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] svinval: "svinval";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] svinval: "svinval";
     /// "Svinval" Standard Extension for Fine-Grained Address-Translation Cache Invalidation
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] h: "h";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] h: "h";
     /// Hypervisor Extension
 
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zba: "zba";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zba: "zba";
     /// "Zba" Standard Extension for Address Generation Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zbb: "zbb";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zbb: "zbb";
     /// "Zbb" Standard Extension for Basic Bit-Manipulation
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zbc: "zbc";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zbc: "zbc";
     /// "Zbc" Standard Extension for Carry-less Multiplication
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zbs: "zbs";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zbs: "zbs";
     /// "Zbs" Standard Extension for Single-Bit instructions
 
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zbkb: "zbkb";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zbkb: "zbkb";
     /// "Zbkb" Standard Extension for Bitmanip instructions for Cryptography
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zbkc: "zbkc";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zbkc: "zbkc";
     /// "Zbkc" Standard Extension for Carry-less multiply instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zbkx: "zbkx";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zbkx: "zbkx";
     /// "Zbkx" Standard Extension for Crossbar permutation instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zknd: "zknd";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zknd: "zknd";
     /// "Zknd" Standard Extension for NIST Suite: AES Decryption
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zkne: "zkne";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zkne: "zkne";
     /// "Zkne" Standard Extension for NIST Suite: AES Encryption
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zknh: "zknh";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zknh: "zknh";
     /// "Zknh" Standard Extension for NIST Suite: Hash Function Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zksed: "zksed";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zksed: "zksed";
     /// "Zksed" Standard Extension for ShangMi Suite: SM4 Block Cipher Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zksh: "zksh";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zksh: "zksh";
     /// "Zksh" Standard Extension for ShangMi Suite: SM3 Hash Function Instructions
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zkr: "zkr";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zkr: "zkr";
     /// "Zkr" Standard Extension for Entropy Source Extension
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zkn: "zkn";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zkn: "zkn";
     /// "Zkn" Standard Extension for NIST Algorithm Suite
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zks: "zks";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zks: "zks";
     /// "Zks" Standard Extension for ShangMi Algorithm Suite
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zk: "zk";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zk: "zk";
     /// "Zk" Standard Extension for Standard scalar cryptography extension
-    @FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] zkt: "zkt";
+    @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zkt: "zkt";
     /// "Zkt" Standard Extension for Data Independent Execution Latency
 }
diff --git a/library/stdarch/crates/std_detect/src/detect/macros.rs b/library/stdarch/crates/std_detect/src/detect/macros.rs
index 45feec79fc9..d1bc990dd2c 100644
--- a/library/stdarch/crates/std_detect/src/detect/macros.rs
+++ b/library/stdarch/crates/std_detect/src/detect/macros.rs
@@ -1,5 +1,6 @@
 #[macro_export]
-#[allow_internal_unstable(stdsimd)]
+#[allow_internal_unstable(stdarch_internal)]
+#[unstable(feature = "stdarch_internal", issue = "none")]
 macro_rules! detect_feature {
     ($feature:tt, $feature_lit:tt) => {
         $crate::detect_feature!($feature, $feature_lit : $feature_lit)
@@ -25,7 +26,7 @@ macro_rules! features {
     ) => {
         #[macro_export]
         $(#[$macro_attrs])*
-        #[allow_internal_unstable(stdsimd_internal, stdsimd)]
+        #[allow_internal_unstable(stdarch_internal, stdsimd)]
         #[cfg($cfg)]
         #[doc(cfg($cfg))]
         macro_rules! $macro_name {
@@ -120,7 +121,7 @@ macro_rules! features {
         #[allow(non_camel_case_types)]
         #[derive(Copy, Clone)]
         #[repr(u8)]
-        #[unstable(feature = "stdsimd_internal", issue = "none")]
+        #[unstable(feature = "stdarch_internal", issue = "none")]
         #[cfg($cfg)]
         pub(crate) enum Feature {
             $(
@@ -157,6 +158,7 @@ macro_rules! features {
         /// to change.
         #[doc(hidden)]
         #[cfg($cfg)]
+        #[unstable(feature = "stdarch_internal", issue = "none")]
         pub mod __is_feature_detected {
             $(
 
diff --git a/library/stdarch/crates/std_detect/src/detect/mod.rs b/library/stdarch/crates/std_detect/src/detect/mod.rs
index db7018232d4..75a2f70db8e 100644
--- a/library/stdarch/crates/std_detect/src/detect/mod.rs
+++ b/library/stdarch/crates/std_detect/src/detect/mod.rs
@@ -27,6 +27,7 @@ mod arch;
 // This module needs to be public because the `is_{arch}_feature_detected!`
 // macros expand calls to items within it in user crates.
 #[doc(hidden)]
+#[unstable(feature = "stdarch_internal", issue = "none")]
 pub use self::arch::__is_feature_detected;
 
 pub(crate) use self::arch::Feature;
@@ -81,7 +82,7 @@ fn check_for(x: Feature) -> bool {
 /// Returns an `Iterator<Item=(&'static str, bool)>` where
 /// `Item.0` is the feature name, and `Item.1` is a `bool` which
 /// is `true` if the feature is supported by the host and `false` otherwise.
-#[unstable(feature = "stdsimd", issue = "27731")]
+#[unstable(feature = "stdarch_internal", issue = "none")]
 pub fn features() -> impl Iterator<Item = (&'static str, bool)> {
     cfg_if! {
         if #[cfg(any(