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| author | Tsukasa OI <floss_rust@irq.a4lg.com> | 2025-04-11 01:13:44 +0000 |
|---|---|---|
| committer | Amanieu d'Antras <amanieu@gmail.com> | 2025-04-16 00:56:48 +0000 |
| commit | 5c0c7ac77c4f73a5e60f65771c57b2bbc73759ee (patch) | |
| tree | a89331503891bda56b9fa51830a8ba5bf430313d /library/stdarch/crates/std_detect/src/detect | |
| parent | e35bc48a60b590d68013a1b5b1a8fd2692edaa30 (diff) | |
| download | rust-5c0c7ac77c4f73a5e60f65771c57b2bbc73759ee.tar.gz rust-5c0c7ac77c4f73a5e60f65771c57b2bbc73759ee.zip | |
RISC-V: tidying: Make auxvec-based enablement a block
Because this function will be no longer auxvec-only, this commit adds a comment to mark auxvec-based part. It *does not* add a comment to "base ISA" part because it may also use `riscv_hwprobe`-based results.
Diffstat (limited to 'library/stdarch/crates/std_detect/src/detect')
| -rw-r--r-- | library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs b/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs index 3e406b2c364..6d77c89b475 100644 --- a/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs +++ b/library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs @@ -19,6 +19,7 @@ pub(crate) fn detect_features() -> cache::Initializer { } }; + // Use auxiliary vector to enable single-letter ISA extensions and Zicsr. // The values are part of the platform-specific [asm/hwcap.h][hwcap] // // [hwcap]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/include/uapi/asm/hwcap.h?h=v6.14 |