Disable NEON intrinsics on big-endian ARM

These are currently broken because the order of elements inside
vectors is reversed on big-endian systems: the ARM ABI requires that
element 0 is located at the highest address of the vector type. However
LLVM intrinsics expect element 0 to be located at the lowest address.

See https://llvm.org/docs/BigEndianNEON.html and `arm_neon.h` in
Clang for more details.

Although this is a breaking change, this is acceptable for 2 reasons:
- big endian ARM targets are only tier 3.
- it is preferable to stop existing code from compiling than to let it
run and produce incorrect results.

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