Update repo name

96 files changed, 179 insertions, 184 deletions

diff --git a/library/stdarch/crates/assert-instr-macro/src/lib.rs b/library/stdarch/crates/assert-instr-macro/src/lib.rs
index 61986411211..0e739605846 100644
--- a/library/stdarch/crates/assert-instr-macro/src/lib.rs
+++ b/library/stdarch/crates/assert-instr-macro/src/lib.rs
@@ -1,6 +1,6 @@
 //! Implementation of the `#[assert_instr]` macro
 //!
-//! This macro is used when testing the `stdsimd` crate and is used to generate
+//! This macro is used when testing the `stdarch` crate and is used to generate
 //! test cases to assert that functions do indeed contain the instructions that
 //! we're expecting them to contain.
 //!
@@ -41,7 +41,7 @@ pub fn assert_instr(
     // Disable assert_instr for x86 targets compiled with avx enabled, which
     // causes LLVM to generate different intrinsics that the ones we are
     // testing for.
-    let disable_assert_instr = std::env::var("STDSIMD_DISABLE_ASSERT_INSTR").is_ok();
+    let disable_assert_instr = std::env::var("STDARCH_DISABLE_ASSERT_INSTR").is_ok();
 
     // If instruction tests are disabled avoid emitting this shim at all, just
     // return the original item without our attribute.
@@ -57,7 +57,7 @@ pub fn assert_instr(
     let assert_name = syn::Ident::new(&format!("assert_{}_{}", name, instr_str), name.span());
     // These name has to be unique enough for us to find it in the disassembly later on:
     let shim_name = syn::Ident::new(
-        &format!("stdsimd_test_shim_{}_{}", name, instr_str),
+        &format!("stdarch_test_shim_{}_{}", name, instr_str),
         name.span(),
     );
     let mut inputs = Vec::new();
@@ -123,7 +123,7 @@ pub fn assert_instr(
             // generate some code that's hopefully very tight in terms of
             // codegen but is otherwise unique to prevent code from being
             // folded.
-            ::stdsimd_test::_DONT_DEDUP.store(
+            ::stdarch_test::_DONT_DEDUP.store(
                 std::mem::transmute(#shim_name_str.as_bytes().as_ptr()),
                 std::sync::atomic::Ordering::Relaxed,
             );
@@ -142,7 +142,7 @@ pub fn assert_instr(
             // code:
             unsafe { asm!("" : : "r"(#shim_name as usize) : "memory" : "volatile") };
 
-            ::stdsimd_test::assert(#shim_name as usize,
+            ::stdarch_test::assert(#shim_name as usize,
                                    stringify!(#shim_name),
                                    #instr);
         }
diff --git a/library/stdarch/crates/core_arch/Cargo.toml b/library/stdarch/crates/core_arch/Cargo.toml
index e3fe73c4692..c67e3e15c9c 100644
--- a/library/stdarch/crates/core_arch/Cargo.toml
+++ b/library/stdarch/crates/core_arch/Cargo.toml
@@ -8,8 +8,8 @@ authors = [
 ]
 description = "`core::arch` - Rust's core library architecture-specific intrinsics."
 documentation = "https://docs.rs/core_arch"
-homepage = "https://github.com/rust-lang-nursery/stdsimd"
-repository = "https://github.com/rust-lang-nursery/stdsimd"
+homepage = "https://github.com/rust-lang/stdarch"
+repository = "https://github.com/rust-lang/stdarch"
 readme = "README.md"
 keywords = ["core", "simd", "arch", "intrinsics"]
 categories = ["hardware-support", "no-std"]
@@ -18,14 +18,14 @@ build = "build.rs"
 edition = "2018"
 
 [badges]
-travis-ci = { repository = "rust-lang-nursery/stdsimd" }
-appveyor = { repository = "rust-lang-nursery/stdsimd"  }
-is-it-maintained-issue-resolution = { repository = "rust-lang-nursery/stdsimd" }
-is-it-maintained-open-issues = { repository = "rust-lang-nursery/stdsimd" }
+travis-ci = { repository = "rust-lang/stdarch" }
+appveyor = { repository = "rust-lang/stdarch"  }
+is-it-maintained-issue-resolution = { repository = "rust-lang/stdarch" }
+is-it-maintained-open-issues = { repository = "rust-lang/stdarch" }
 maintenance = { status = "experimental" }
 
 [dev-dependencies]
-stdsimd-test = { version = "0.*", path = "../stdsimd-test" }
+stdarch-test = { version = "0.*", path = "../stdarch-test" }
 std_detect = { version = "0.*", path = "../std_detect" }
 
 [target.wasm32-unknown-unknown.dev-dependencies]
diff --git a/library/stdarch/crates/core_arch/README.md b/library/stdarch/crates/core_arch/README.md
index f8d10b4d620..89f03b7527d 100644
--- a/library/stdarch/crates/core_arch/README.md
+++ b/library/stdarch/crates/core_arch/README.md
@@ -39,14 +39,14 @@ are:
 * [How to get started][contrib]
 * [How to help implement intrinsics][help-implement]
 
-[contrib]: https://github.com/rust-lang-nursery/stdsimd/blob/master/CONTRIBUTING.md
-[help-implement]: https://github.com/rust-lang-nursery/stdsimd/issues/40
-[i686]: https://rust-lang-nursery.github.io/stdsimd/i686/core_arch/
-[x86_64]: https://rust-lang-nursery.github.io/stdsimd/x86_64/core_arch/
-[arm]: https://rust-lang-nursery.github.io/stdsimd/arm/core_arch/
-[aarch64]: https://rust-lang-nursery.github.io/stdsimd/aarch64/core_arch/
-[powerpc]: https://rust-lang-nursery.github.io/stdsimd/powerpc/core_arch/
-[powerpc64]: https://rust-lang-nursery.github.io/stdsimd/powerpc64/core_arch/
+[contrib]: https://github.com/rust-lang/stdarch/blob/master/CONTRIBUTING.md
+[help-implement]: https://github.com/rust-lang/stdarch/issues/40
+[i686]: https://rust-lang.github.io/stdarch/i686/core_arch/
+[x86_64]: https://rust-lang.github.io/stdarch/x86_64/core_arch/
+[arm]: https://rust-lang.github.io/stdarch/arm/core_arch/
+[aarch64]: https://rust-lang.github.io/stdarch/aarch64/core_arch/
+[powerpc]: https://rust-lang.github.io/stdarch/powerpc/core_arch/
+[powerpc64]: https://rust-lang.github.io/stdarch/powerpc64/core_arch/
 
 # License
 
@@ -62,9 +62,9 @@ Unless you explicitly state otherwise, any contribution intentionally submitted
 for inclusion in `core_arch` by you, as defined in the Apache-2.0 license,
 shall be dual licensed as above, without any additional terms or conditions.
 
-[travis]: https://travis-ci.com/rust-lang-nursery/stdsimd
-[Travis-CI Status]: https://travis-ci.com/rust-lang-nursery/stdsimd.svg?branch=master
-[appveyor]: https://ci.appveyor.com/project/rust-lang-libs/stdsimd/branch/master
+[travis]: https://travis-ci.com/rust-lang/stdarch
+[Travis-CI Status]: https://travis-ci.com/rust-lang/stdarch.svg?branch=master
+[appveyor]: https://ci.appveyor.com/project/rust-lang-libs/stdarch/branch/master
 [Appveyor Status]: https://ci.appveyor.com/api/projects/status/ix74qhmilpibn00x/branch/master?svg=true
 [core_arch_crate_badge]: https://img.shields.io/crates/v/core_arch.svg
 [core_arch_crate_link]: https://crates.io/crates/core_arch
diff --git a/library/stdarch/crates/core_arch/src/aarch64/crc.rs b/library/stdarch/crates/core_arch/src/aarch64/crc.rs
index 18307d295d4..278a7856271 100644
--- a/library/stdarch/crates/core_arch/src/aarch64/crc.rs
+++ b/library/stdarch/crates/core_arch/src/aarch64/crc.rs
@@ -19,7 +19,7 @@ extern "C" {
 }
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// CRC32 single round checksum for bytes (8 bits).
 #[inline]
@@ -89,7 +89,7 @@ pub unsafe fn __crc32cd(crc: u32, data: u64) -> u32 {
 mod tests {
     use crate::core_arch::{aarch64::*, simd::*};
     use std::mem;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "crc")]
     unsafe fn test_crc32b() {
diff --git a/library/stdarch/crates/core_arch/src/aarch64/crypto.rs b/library/stdarch/crates/core_arch/src/aarch64/crypto.rs
index 5d46070b233..91269d8052f 100644
--- a/library/stdarch/crates/core_arch/src/aarch64/crypto.rs
+++ b/library/stdarch/crates/core_arch/src/aarch64/crypto.rs
@@ -35,7 +35,7 @@ extern "C" {
 }
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// AES single round encryption.
 #[inline]
@@ -165,7 +165,7 @@ pub unsafe fn vsha256su1q_u32(
 mod tests {
     use crate::core_arch::{aarch64::*, simd::*};
     use std::mem;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "crypto")]
     unsafe fn test_vaeseq_u8() {
diff --git a/library/stdarch/crates/core_arch/src/aarch64/mod.rs b/library/stdarch/crates/core_arch/src/aarch64/mod.rs
index 0f2f9da11a3..e33dc7eaf5b 100644
--- a/library/stdarch/crates/core_arch/src/aarch64/mod.rs
+++ b/library/stdarch/crates/core_arch/src/aarch64/mod.rs
@@ -21,7 +21,7 @@ pub use self::crc::*;
 pub use super::acle::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Generates the trap instruction `BRK 1`
 #[cfg_attr(test, assert_instr(brk))]
diff --git a/library/stdarch/crates/core_arch/src/aarch64/neon.rs b/library/stdarch/crates/core_arch/src/aarch64/neon.rs
index b96f7ac3cfe..46af4567b3b 100644
--- a/library/stdarch/crates/core_arch/src/aarch64/neon.rs
+++ b/library/stdarch/crates/core_arch/src/aarch64/neon.rs
@@ -9,7 +9,7 @@ use crate::{
     mem::{transmute, zeroed},
 };
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 types! {
     /// ARM-specific 64-bit wide vector of one packed `f64`.
@@ -1546,7 +1546,7 @@ pub unsafe fn vqtbx4q_p8(a: poly8x16_t, t: poly8x16x4_t, idx: uint8x16_t) -> pol
 mod tests {
     use crate::core_arch::{aarch64::*, simd::*};
     use std::mem::transmute;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "neon")]
     unsafe fn test_vadd_f64() {
diff --git a/library/stdarch/crates/core_arch/src/aarch64/v8.rs b/library/stdarch/crates/core_arch/src/aarch64/v8.rs
index f44f43d34f4..778721c6851 100644
--- a/library/stdarch/crates/core_arch/src/aarch64/v8.rs
+++ b/library/stdarch/crates/core_arch/src/aarch64/v8.rs
@@ -6,7 +6,7 @@
 //! ddi0487a.k_10775/index.html
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Reverse the order of the bytes.
 #[inline]
diff --git a/library/stdarch/crates/core_arch/src/acle/dsp.rs b/library/stdarch/crates/core_arch/src/acle/dsp.rs
index c87363ea030..03cc082697a 100644
--- a/library/stdarch/crates/core_arch/src/acle/dsp.rs
+++ b/library/stdarch/crates/core_arch/src/acle/dsp.rs
@@ -21,7 +21,7 @@
 //! - \[x\] __smlawt
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 use crate::mem::transmute;
 
@@ -241,7 +241,7 @@ mod tests {
         simd::{i16x2, i8x4, u8x4},
     };
     use std::{i32, mem::transmute};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[test]
     fn smulbb() {
diff --git a/library/stdarch/crates/core_arch/src/acle/registers/aarch32.rs b/library/stdarch/crates/core_arch/src/acle/registers/aarch32.rs
index 5cc66308be2..e0b71218a7f 100644
--- a/library/stdarch/crates/core_arch/src/acle/registers/aarch32.rs
+++ b/library/stdarch/crates/core_arch/src/acle/registers/aarch32.rs
@@ -3,7 +3,7 @@ pub struct APSR;
 
 // Note (@Lokathor): Because this breaks the use of Rust on the Game Boy
 // Advance, this change must be reverted until Rust learns to handle cpu state
-// properly. See also: https://github.com/rust-lang-nursery/stdsimd/issues/702
+// properly. See also: https://github.com/rust-lang/stdarch/issues/702
 
 //#[cfg(any(not(target_feature = "thumb-state"), target_feature = "v6t2"))]
 //rsr!(APSR);
diff --git a/library/stdarch/crates/core_arch/src/acle/simd32.rs b/library/stdarch/crates/core_arch/src/acle/simd32.rs
index fe5a818fd09..678324f1065 100644
--- a/library/stdarch/crates/core_arch/src/acle/simd32.rs
+++ b/library/stdarch/crates/core_arch/src/acle/simd32.rs
@@ -63,7 +63,7 @@
 //! - \[x\] __smusdx
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 use crate::{core_arch::acle::dsp::int16x2_t, mem::transmute};
 
@@ -465,7 +465,7 @@ pub unsafe fn __usada8(a: int8x4_t, b: int8x4_t, c: u32) -> u32 {
 mod tests {
     use crate::core_arch::simd::{i16x2, i8x4, u8x4};
     use std::{i16, i8, mem::transmute};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[test]
     fn qadd8() {
diff --git a/library/stdarch/crates/core_arch/src/arm/armclang.rs b/library/stdarch/crates/core_arch/src/arm/armclang.rs
index 36a3a2fe9a3..2e0a82ade3e 100644
--- a/library/stdarch/crates/core_arch/src/arm/armclang.rs
+++ b/library/stdarch/crates/core_arch/src/arm/armclang.rs
@@ -7,7 +7,7 @@
 //! [arm_comp_ref]: https://developer.arm.com/docs/100067/0610
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Inserts a breakpoint instruction.
 ///
diff --git a/library/stdarch/crates/core_arch/src/arm/mod.rs b/library/stdarch/crates/core_arch/src/arm/mod.rs
index 6829a8523c4..a467c2ce854 100644
--- a/library/stdarch/crates/core_arch/src/arm/mod.rs
+++ b/library/stdarch/crates/core_arch/src/arm/mod.rs
@@ -37,7 +37,7 @@ pub use self::neon::*;
 pub use crate::core_arch::acle::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Generates the trap instruction `UDF`
 #[cfg(target_arch = "arm")]
diff --git a/library/stdarch/crates/core_arch/src/arm/neon.rs b/library/stdarch/crates/core_arch/src/arm/neon.rs
index 99097b229de..73391c84ebe 100644
--- a/library/stdarch/crates/core_arch/src/arm/neon.rs
+++ b/library/stdarch/crates/core_arch/src/arm/neon.rs
@@ -2,7 +2,7 @@
 
 use crate::{core_arch::simd_llvm::*, mem::transmute};
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 types! {
     /// ARM-specific 64-bit wide vector of eight packed `i8`.
@@ -978,7 +978,7 @@ pub unsafe fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t
 mod tests {
     use crate::core_arch::{arm::*, simd::*};
     use std::{i16, i32, i8, mem::transmute, u16, u32, u8};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "neon")]
     unsafe fn test_vadd_s8() {
diff --git a/library/stdarch/crates/core_arch/src/arm/table_lookup_tests.rs b/library/stdarch/crates/core_arch/src/arm/table_lookup_tests.rs
index 5b8b4878f6c..15aa2f2695d 100644
--- a/library/stdarch/crates/core_arch/src/arm/table_lookup_tests.rs
+++ b/library/stdarch/crates/core_arch/src/arm/table_lookup_tests.rs
@@ -12,7 +12,7 @@ use crate::core_arch::arm::*;
 
 use crate::core_arch::simd::*;
 use std::mem;
-use stdsimd_test::simd_test;
+use stdarch_test::simd_test;
 
 macro_rules! test_vtbl {
     ($test_name:ident => $fn_id:ident:
diff --git a/library/stdarch/crates/core_arch/src/arm/v6.rs b/library/stdarch/crates/core_arch/src/arm/v6.rs
index c7ec7d411df..5df30cd623b 100644
--- a/library/stdarch/crates/core_arch/src/arm/v6.rs
+++ b/library/stdarch/crates/core_arch/src/arm/v6.rs
@@ -7,7 +7,7 @@
 //! html
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Reverse the order of the bytes.
 #[inline]
diff --git a/library/stdarch/crates/core_arch/src/arm/v7.rs b/library/stdarch/crates/core_arch/src/arm/v7.rs
index 9ee4a461827..e7507f9b953 100644
--- a/library/stdarch/crates/core_arch/src/arm/v7.rs
+++ b/library/stdarch/crates/core_arch/src/arm/v7.rs
@@ -10,13 +10,13 @@
 pub use super::v6::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Count Leading Zeros.
 #[inline]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(clz))]
-// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/382
+// FIXME: https://github.com/rust-lang/stdarch/issues/382
 // #[cfg_attr(all(test, target_arch = "arm"), assert_instr(clz))]
 pub unsafe fn _clz_u8(x: u8) -> u8 {
     x.leading_zeros() as u8
@@ -26,7 +26,7 @@ pub unsafe fn _clz_u8(x: u8) -> u8 {
 #[inline]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(clz))]
-// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/382
+// FIXME: https://github.com/rust-lang/stdarch/issues/382
 // #[cfg_attr(all(test, target_arch = "arm"), assert_instr(clz))]
 pub unsafe fn _clz_u16(x: u16) -> u16 {
     x.leading_zeros() as u16
@@ -36,7 +36,7 @@ pub unsafe fn _clz_u16(x: u16) -> u16 {
 #[inline]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(clz))]
-// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/382
+// FIXME: https://github.com/rust-lang/stdarch/issues/382
 // #[cfg_attr(all(test, target_arch = "arm"), assert_instr(clz))]
 pub unsafe fn _clz_u32(x: u32) -> u32 {
     x.leading_zeros() as u32
diff --git a/library/stdarch/crates/core_arch/src/lib.rs b/library/stdarch/crates/core_arch/src/lib.rs
index 424a185f88e..3be5859671c 100644
--- a/library/stdarch/crates/core_arch/src/lib.rs
+++ b/library/stdarch/crates/core_arch/src/lib.rs
@@ -1,5 +1,4 @@
 #![doc(include = "core_arch_docs.md")]
-#![cfg_attr(stdsimd_strict, deny(warnings))]
 #![allow(dead_code)]
 #![allow(unused_features)]
 #![feature(
@@ -65,7 +64,7 @@ extern crate std;
 #[macro_use]
 extern crate std_detect;
 #[cfg(test)]
-extern crate stdsimd_test;
+extern crate stdarch_test;
 
 #[cfg(all(test, target_arch = "wasm32"))]
 extern crate wasm_bindgen_test;
diff --git a/library/stdarch/crates/core_arch/src/mips/mod.rs b/library/stdarch/crates/core_arch/src/mips/mod.rs
index d7ab34f5c3f..efde97f4df7 100644
--- a/library/stdarch/crates/core_arch/src/mips/mod.rs
+++ b/library/stdarch/crates/core_arch/src/mips/mod.rs
@@ -4,7 +4,7 @@ mod msa;
 pub use self::msa::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Generates the trap instruction `BREAK`
 #[cfg_attr(test, assert_instr(break))]
diff --git a/library/stdarch/crates/core_arch/src/mips/msa.rs b/library/stdarch/crates/core_arch/src/mips/msa.rs
index 18e1e78d983..46c9bd089af 100644
--- a/library/stdarch/crates/core_arch/src/mips/msa.rs
+++ b/library/stdarch/crates/core_arch/src/mips/msa.rs
@@ -6,7 +6,7 @@
 //! [msa_ref]: http://cdn2.imgtec.com/documentation/MD00866-2B-MSA32-AFP-01.12.pdf
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 use crate::mem;
 
@@ -9235,7 +9235,7 @@ mod tests {
         mem,
     };
     use std::{f32, f64};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "msa")]
     unsafe fn test_msa_add_a_b() {
diff --git a/library/stdarch/crates/core_arch/src/mod.rs b/library/stdarch/crates/core_arch/src/mod.rs
index 940f6398614..88603024b95 100644
--- a/library/stdarch/crates/core_arch/src/mod.rs
+++ b/library/stdarch/crates/core_arch/src/mod.rs
@@ -10,7 +10,7 @@ mod simd;
 
 #[cfg_attr(
     bootstrap,
-    doc(include = "../stdsimd/crates/core_arch/src/core_arch_docs.md")
+    doc(include = "../stdarch/crates/core_arch/src/core_arch_docs.md")
 )]
 #[cfg_attr(not(bootstrap), doc(include = "core_arch_docs.md"))]
 #[stable(feature = "simd_arch", since = "1.27.0")]
diff --git a/library/stdarch/crates/core_arch/src/powerpc/altivec.rs b/library/stdarch/crates/core_arch/src/powerpc/altivec.rs
index 2bcec9374b8..2f56ecf8f3d 100644
--- a/library/stdarch/crates/core_arch/src/powerpc/altivec.rs
+++ b/library/stdarch/crates/core_arch/src/powerpc/altivec.rs
@@ -19,7 +19,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 types! {
     /// PowerPC-specific 128-bit wide vector of sixteen packed `i8`
@@ -1714,7 +1714,7 @@ mod tests {
     use std::mem::transmute;
 
     use crate::core_arch::simd::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     macro_rules! test_vec_2 {
         { $name: ident, $fn:ident, $ty: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
diff --git a/library/stdarch/crates/core_arch/src/powerpc/mod.rs b/library/stdarch/crates/core_arch/src/powerpc/mod.rs
index 4bfee70e1fc..9765d11d1f4 100644
--- a/library/stdarch/crates/core_arch/src/powerpc/mod.rs
+++ b/library/stdarch/crates/core_arch/src/powerpc/mod.rs
@@ -9,7 +9,7 @@ mod vsx;
 pub use self::vsx::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Generates the trap instruction `TRAP`
 #[cfg_attr(test, assert_instr(trap))]
diff --git a/library/stdarch/crates/core_arch/src/powerpc/vsx.rs b/library/stdarch/crates/core_arch/src/powerpc/vsx.rs
index 77b7306b027..394c9a7043b 100644
--- a/library/stdarch/crates/core_arch/src/powerpc/vsx.rs
+++ b/library/stdarch/crates/core_arch/src/powerpc/vsx.rs
@@ -11,7 +11,7 @@
 use crate::core_arch::simd_llvm::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 use crate::mem;
 
@@ -93,7 +93,7 @@ mod tests {
 
     use super::mem;
     use crate::core_arch::simd::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     macro_rules! test_vec_xxpermdi {
         {$name:ident, $shorttype:ident, $longtype:ident, [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
diff --git a/library/stdarch/crates/core_arch/src/wasm32/atomic.rs b/library/stdarch/crates/core_arch/src/wasm32/atomic.rs
index 4ebbaa19bd2..b8ffaeac0e2 100644
--- a/library/stdarch/crates/core_arch/src/wasm32/atomic.rs
+++ b/library/stdarch/crates/core_arch/src/wasm32/atomic.rs
@@ -9,7 +9,7 @@
 #![cfg(any(target_feature = "atomics", dox))]
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 #[cfg(test)]
 use wasm_bindgen_test::wasm_bindgen_test;
 
diff --git a/library/stdarch/crates/core_arch/src/wasm32/memory.rs b/library/stdarch/crates/core_arch/src/wasm32/memory.rs
index 0ccc104c63b..f2c7fa54c3d 100644
--- a/library/stdarch/crates/core_arch/src/wasm32/memory.rs
+++ b/library/stdarch/crates/core_arch/src/wasm32/memory.rs
@@ -1,5 +1,5 @@
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 #[cfg(test)]
 use wasm_bindgen_test::wasm_bindgen_test;
 
diff --git a/library/stdarch/crates/core_arch/src/wasm32/mod.rs b/library/stdarch/crates/core_arch/src/wasm32/mod.rs
index d95eb0890da..5e7a9d85f4e 100644
--- a/library/stdarch/crates/core_arch/src/wasm32/mod.rs
+++ b/library/stdarch/crates/core_arch/src/wasm32/mod.rs
@@ -1,7 +1,7 @@
 //! WASM32 intrinsics
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 #[cfg(test)]
 use wasm_bindgen_test::wasm_bindgen_test;
 
diff --git a/library/stdarch/crates/core_arch/src/wasm32/simd128.rs b/library/stdarch/crates/core_arch/src/wasm32/simd128.rs
index 7bf579f38e3..99d02a0a441 100644
--- a/library/stdarch/crates/core_arch/src/wasm32/simd128.rs
+++ b/library/stdarch/crates/core_arch/src/wasm32/simd128.rs
@@ -13,7 +13,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 #[cfg(test)]
 use wasm_bindgen_test::wasm_bindgen_test;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/abm.rs b/library/stdarch/crates/core_arch/src/x86/abm.rs
index 9ee69f46e66..50912f77423 100644
--- a/library/stdarch/crates/core_arch/src/x86/abm.rs
+++ b/library/stdarch/crates/core_arch/src/x86/abm.rs
@@ -18,7 +18,7 @@
 //! https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Counts the leading most significant zero bits.
 ///
@@ -46,7 +46,7 @@ pub unsafe fn _popcnt32(x: i32) -> i32 {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/adx.rs b/library/stdarch/crates/core_arch/src/x86/adx.rs
index 3bcb4d8ba25..6df321c049b 100644
--- a/library/stdarch/crates/core_arch/src/x86/adx.rs
+++ b/library/stdarch/crates/core_arch/src/x86/adx.rs
@@ -1,5 +1,5 @@
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "unadjusted" {
@@ -48,7 +48,7 @@ pub unsafe fn _subborrow_u32(c_in: u8, a: u32, b: u32, out: &mut u32) -> u8 {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/aes.rs b/library/stdarch/crates/core_arch/src/x86/aes.rs
index bc45fc39da5..603744aef6e 100644
--- a/library/stdarch/crates/core_arch/src/x86/aes.rs
+++ b/library/stdarch/crates/core_arch/src/x86/aes.rs
@@ -10,7 +10,7 @@
 use crate::core_arch::x86::__m128i;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -111,7 +111,7 @@ mod tests {
     // __m128i happens to be defined in terms of signed integers.
     #![allow(overflowing_literals)]
 
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/avx.rs b/library/stdarch/crates/core_arch/src/x86/avx.rs
index 180b6e72387..56067ba5c93 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx.rs
@@ -21,7 +21,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Adds packed double-precision (64-bit) floating-point elements
 /// in `a` and `b`.
@@ -54,7 +54,7 @@ pub unsafe fn _mm256_add_ps(a: __m256, b: __m256) -> __m256 {
 #[inline]
 #[target_feature(enable = "avx")]
 // FIXME: Should be 'vandpd' instuction.
-// See https://github.com/rust-lang-nursery/stdsimd/issues/71
+// See https://github.com/rust-lang/stdarch/issues/71
 #[cfg_attr(test, assert_instr(vandps))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub unsafe fn _mm256_and_pd(a: __m256d, b: __m256d) -> __m256d {
@@ -84,7 +84,7 @@ pub unsafe fn _mm256_and_ps(a: __m256, b: __m256) -> __m256 {
 #[inline]
 #[target_feature(enable = "avx")]
 // FIXME: should be `vorpd` instuction.
-// See <https://github.com/rust-lang-nursery/stdsimd/issues/71>.
+// See <https://github.com/rust-lang/stdarch/issues/71>.
 #[cfg_attr(test, assert_instr(vorps))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub unsafe fn _mm256_or_pd(a: __m256d, b: __m256d) -> __m256d {
@@ -3309,7 +3309,7 @@ extern "C" {
 #[cfg(test)]
 mod tests {
     use crate::hint::black_box;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/avx2.rs b/library/stdarch/crates/core_arch/src/x86/avx2.rs
index fcc1fdfd087..84f3364b922 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx2.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx2.rs
@@ -24,7 +24,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Computes the absolute values of packed 32-bit integers in `a`.
 ///
@@ -4057,7 +4057,7 @@ extern "C" {
 #[cfg(test)]
 mod tests {
     use std;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/avx512f.rs b/library/stdarch/crates/core_arch/src/x86/avx512f.rs
index ad1a5a40704..f38583102b9 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx512f.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx512f.rs
@@ -4,7 +4,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Computes the absolute values of packed 32-bit integers in `a`.
 ///
@@ -97,7 +97,7 @@ pub unsafe fn _mm512_set1_epi64(a: i64) -> __m512i {
 #[cfg(test)]
 mod tests {
     use std;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/avx512ifma.rs b/library/stdarch/crates/core_arch/src/x86/avx512ifma.rs
index ad3a21a796c..425d0ff7e5e 100644
--- a/library/stdarch/crates/core_arch/src/x86/avx512ifma.rs
+++ b/library/stdarch/crates/core_arch/src/x86/avx512ifma.rs
@@ -1,7 +1,7 @@
 use crate::core_arch::x86::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Multiply packed unsigned 52-bit integers in each 64-bit element of
 /// `b` and `c` to form a 104-bit intermediate result. Add the high 52-bit
@@ -106,7 +106,7 @@ extern "C" {
 #[cfg(test)]
 mod tests {
     use std;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/bmi1.rs b/library/stdarch/crates/core_arch/src/x86/bmi1.rs
index f9df86b50a3..0f769f33b0f 100644
--- a/library/stdarch/crates/core_arch/src/x86/bmi1.rs
+++ b/library/stdarch/crates/core_arch/src/x86/bmi1.rs
@@ -10,7 +10,7 @@
 //! [wikipedia_bmi]: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Extracts bits in range [`start`, `start` + `length`) from `a` into
 /// the least significant bits of the result.
@@ -118,7 +118,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/bmi2.rs b/library/stdarch/crates/core_arch/src/x86/bmi2.rs
index b709d1187d3..b08b8733c2f 100644
--- a/library/stdarch/crates/core_arch/src/x86/bmi2.rs
+++ b/library/stdarch/crates/core_arch/src/x86/bmi2.rs
@@ -11,7 +11,7 @@
 //! https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Unsigned multiply without affecting flags.
 ///
@@ -77,7 +77,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/bswap.rs b/library/stdarch/crates/core_arch/src/x86/bswap.rs
index 2896781f847..20e3aa6fc35 100644
--- a/library/stdarch/crates/core_arch/src/x86/bswap.rs
+++ b/library/stdarch/crates/core_arch/src/x86/bswap.rs
@@ -2,7 +2,7 @@
 #![allow(clippy::module_name_repetitions)]
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Returns an integer with the reversed byte order of x
 ///
diff --git a/library/stdarch/crates/core_arch/src/x86/bt.rs b/library/stdarch/crates/core_arch/src/x86/bt.rs
index 8ecc87fe4cb..6e42828dd7c 100644
--- a/library/stdarch/crates/core_arch/src/x86/bt.rs
+++ b/library/stdarch/crates/core_arch/src/x86/bt.rs
@@ -1,5 +1,5 @@
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Returns the bit in position `b` of the memory addressed by `p`.
 #[inline]
diff --git a/library/stdarch/crates/core_arch/src/x86/cpuid.rs b/library/stdarch/crates/core_arch/src/x86/cpuid.rs
index c52157599c6..32a13b532e5 100644
--- a/library/stdarch/crates/core_arch/src/x86/cpuid.rs
+++ b/library/stdarch/crates/core_arch/src/x86/cpuid.rs
@@ -2,7 +2,7 @@
 #![allow(clippy::module_name_repetitions)]
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Result of the `cpuid` instruction.
 #[allow(clippy::missing_inline_in_public_items)]
diff --git a/library/stdarch/crates/core_arch/src/x86/f16c.rs b/library/stdarch/crates/core_arch/src/x86/f16c.rs
index 195485914b3..503bd41d2fd 100644
--- a/library/stdarch/crates/core_arch/src/x86/f16c.rs
+++ b/library/stdarch/crates/core_arch/src/x86/f16c.rs
@@ -9,7 +9,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "unadjusted" {
@@ -110,7 +110,7 @@ pub unsafe fn _mm256_cvtps_ph(a: __m256, imm_rounding: i32) -> __m128i {
 #[cfg(test)]
 mod tests {
     use crate::{core_arch::x86::*, mem::transmute};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "f16c")]
     unsafe fn test_mm_cvtph_ps() {
diff --git a/library/stdarch/crates/core_arch/src/x86/fma.rs b/library/stdarch/crates/core_arch/src/x86/fma.rs
index de4e589fe14..48abe9f49a9 100644
--- a/library/stdarch/crates/core_arch/src/x86/fma.rs
+++ b/library/stdarch/crates/core_arch/src/x86/fma.rs
@@ -21,7 +21,7 @@
 use crate::core_arch::x86::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Multiplies packed double-precision (64-bit) floating-point elements in `a`
 /// and `b`, and add the intermediate result to packed elements in `c`.
@@ -508,7 +508,7 @@ extern "C" {
 #[cfg(test)]
 mod tests {
     use std;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/fxsr.rs b/library/stdarch/crates/core_arch/src/x86/fxsr.rs
index eeca495e0b4..83d53f4773d 100644
--- a/library/stdarch/crates/core_arch/src/x86/fxsr.rs
+++ b/library/stdarch/crates/core_arch/src/x86/fxsr.rs
@@ -1,7 +1,7 @@
 //! FXSR floating-point context fast save and restor.
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -59,7 +59,7 @@ pub unsafe fn _fxrstor(mem_addr: *const u8) {
 mod tests {
     use crate::core_arch::x86::*;
     use std::{cmp::PartialEq, fmt};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[repr(align(16))]
     struct FxsaveArea {
diff --git a/library/stdarch/crates/core_arch/src/x86/mmx.rs b/library/stdarch/crates/core_arch/src/x86/mmx.rs
index 96a3c2d881d..ff4f8277e25 100644
--- a/library/stdarch/crates/core_arch/src/x86/mmx.rs
+++ b/library/stdarch/crates/core_arch/src/x86/mmx.rs
@@ -14,7 +14,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Constructs a 64-bit integer vector initialized to zero.
 #[inline]
@@ -532,7 +532,7 @@ extern "C" {
 #[cfg(test)]
 mod tests {
     use crate::core_arch::x86::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "mmx")]
     unsafe fn test_mm_setzero_si64() {
diff --git a/library/stdarch/crates/core_arch/src/x86/mod.rs b/library/stdarch/crates/core_arch/src/x86/mod.rs
index bed9e4a020e..68965ad93de 100644
--- a/library/stdarch/crates/core_arch/src/x86/mod.rs
+++ b/library/stdarch/crates/core_arch/src/x86/mod.rs
@@ -519,14 +519,14 @@ pub use self::bmi1::*;
 mod bmi2;
 pub use self::bmi2::*;
 
-#[cfg(not(stdsimd_intel_sde))]
+#[cfg(not(stdarch_intel_sde))]
 mod sse4a;
-#[cfg(not(stdsimd_intel_sde))]
+#[cfg(not(stdarch_intel_sde))]
 pub use self::sse4a::*;
 
-#[cfg(not(stdsimd_intel_sde))]
+#[cfg(not(stdarch_intel_sde))]
 mod tbm;
-#[cfg(not(stdsimd_intel_sde))]
+#[cfg(not(stdarch_intel_sde))]
 pub use self::tbm::*;
 
 mod mmx;
@@ -548,7 +548,7 @@ mod adx;
 pub use self::adx::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Generates the trap instruction `UD2`
 #[cfg_attr(test, assert_instr(ud2))]
diff --git a/library/stdarch/crates/core_arch/src/x86/pclmulqdq.rs b/library/stdarch/crates/core_arch/src/x86/pclmulqdq.rs
index 9b9d21c9add..0e1bebae9ee 100644
--- a/library/stdarch/crates/core_arch/src/x86/pclmulqdq.rs
+++ b/library/stdarch/crates/core_arch/src/x86/pclmulqdq.rs
@@ -8,7 +8,7 @@
 use crate::core_arch::x86::__m128i;
 
 #[cfg(test)]
-use crate::stdsimd_test::assert_instr;
+use crate::stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -48,7 +48,7 @@ mod tests {
     // __m128i happens to be defined in terms of signed integers.
     #![allow(overflowing_literals)]
 
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/rdrand.rs b/library/stdarch/crates/core_arch/src/x86/rdrand.rs
index a1252933522..c6bab914892 100644
--- a/library/stdarch/crates/core_arch/src/x86/rdrand.rs
+++ b/library/stdarch/crates/core_arch/src/x86/rdrand.rs
@@ -16,7 +16,7 @@ extern "unadjusted" {
 }
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Read a hardware generated 16-bit random value and store the result in val.
 /// Returns 1 if a random value was generated, and 0 otherwise.
diff --git a/library/stdarch/crates/core_arch/src/x86/rdtsc.rs b/library/stdarch/crates/core_arch/src/x86/rdtsc.rs
index a92ff4b3ece..67f6e48fa7b 100644
--- a/library/stdarch/crates/core_arch/src/x86/rdtsc.rs
+++ b/library/stdarch/crates/core_arch/src/x86/rdtsc.rs
@@ -1,7 +1,7 @@
 //! RDTSC instructions.
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Reads the current value of the processor’s time-stamp counter.
 ///
@@ -60,7 +60,7 @@ extern "C" {
 #[cfg(test)]
 mod tests {
     use crate::core_arch::x86::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse2")]
     unsafe fn _rdtsc() {
diff --git a/library/stdarch/crates/core_arch/src/x86/rtm.rs b/library/stdarch/crates/core_arch/src/x86/rtm.rs
index ebe3ed80da7..1e532b4efe7 100644
--- a/library/stdarch/crates/core_arch/src/x86/rtm.rs
+++ b/library/stdarch/crates/core_arch/src/x86/rtm.rs
@@ -14,7 +14,7 @@
 //! [intel_consid]: https://software.intel.com/en-us/cpp-compiler-developer-guide-and-reference-intel-transactional-synchronization-extensions-intel-tsx-programming-considerations
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 extern "C" {
     #[link_name = "llvm.x86.xbegin"]
@@ -107,7 +107,7 @@ pub const fn _xabort_code(status: u32) -> u32 {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/sha.rs b/library/stdarch/crates/core_arch/src/x86/sha.rs
index c6cbc5324f5..362a97ccd36 100644
--- a/library/stdarch/crates/core_arch/src/x86/sha.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sha.rs
@@ -22,7 +22,7 @@ extern "C" {
 }
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Performs an intermediate calculation for the next four SHA1 message values
 /// (unsigned 32-bit integers) using previous message values from `a` and `b`,
@@ -141,7 +141,7 @@ mod tests {
         core_arch::{simd::*, x86::*},
         hint::black_box,
     };
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sha")]
     #[allow(overflowing_literals)]
diff --git a/library/stdarch/crates/core_arch/src/x86/sse.rs b/library/stdarch/crates/core_arch/src/x86/sse.rs
index f03773d1ea0..3160ac57b80 100644
--- a/library/stdarch/crates/core_arch/src/x86/sse.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sse.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Adds the first component of `a` and `b`, the other components are copied
 /// from `a`.
@@ -978,7 +978,7 @@ pub unsafe fn _mm_setzero_ps() -> __m128 {
 /// permute intrinsics.
 #[inline]
 #[allow(non_snake_case)]
-#[unstable(feature = "stdsimd", issue = "27731")]
+#[unstable(feature = "stdarch", issue = "27731")]
 pub const fn _MM_SHUFFLE(z: u32, y: u32, x: u32, w: u32) -> i32 {
     ((z << 6) | (y << 4) | (x << 2) | w) as i32
 }
@@ -2499,7 +2499,7 @@ pub unsafe fn _mm_cvtps_pi8(a: __m128) -> __m64 {
 mod tests {
     use crate::{hint::black_box, mem::transmute};
     use std::{boxed, f32::NAN};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::{simd::*, x86::*};
 
diff --git a/library/stdarch/crates/core_arch/src/x86/sse2.rs b/library/stdarch/crates/core_arch/src/x86/sse2.rs
index 2c621b21fc7..21a3b4a0816 100644
--- a/library/stdarch/crates/core_arch/src/x86/sse2.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sse2.rs
@@ -1,7 +1,7 @@
 //! Streaming SIMD Extensions 2 (SSE2)
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 use crate::{
     core_arch::{simd::*, simd_llvm::*, x86::*},
@@ -3193,7 +3193,7 @@ mod tests {
         i32,
         mem::{self, transmute},
     };
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[test]
     fn test_mm_pause() {
diff --git a/library/stdarch/crates/core_arch/src/x86/sse3.rs b/library/stdarch/crates/core_arch/src/x86/sse3.rs
index 9e335e12c8d..977de1dc17a 100644
--- a/library/stdarch/crates/core_arch/src/x86/sse3.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sse3.rs
@@ -10,7 +10,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Alternatively add and subtract packed single-precision (32-bit)
 /// floating-point elements in `a` to/from packed elements in `b`.
@@ -165,7 +165,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/sse41.rs b/library/stdarch/crates/core_arch/src/x86/sse41.rs
index 2e0a0acb461..f8616296718 100644
--- a/library/stdarch/crates/core_arch/src/x86/sse41.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sse41.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 // SSE4 rounding constans
 /// round to nearest
@@ -1194,7 +1194,7 @@ extern "C" {
 mod tests {
     use crate::core_arch::x86::*;
     use std::mem;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse4.1")]
     unsafe fn test_mm_blendv_epi8() {
diff --git a/library/stdarch/crates/core_arch/src/x86/sse42.rs b/library/stdarch/crates/core_arch/src/x86/sse42.rs
index eca71233ad5..d4d8aa644e4 100644
--- a/library/stdarch/crates/core_arch/src/x86/sse42.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sse42.rs
@@ -3,7 +3,7 @@
 //! Extends SSE4.1 with STTNI (String and Text New Instructions).
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 use crate::{
     core_arch::{simd::*, simd_llvm::*, x86::*},
@@ -707,7 +707,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
     use std::ptr;
diff --git a/library/stdarch/crates/core_arch/src/x86/sse4a.rs b/library/stdarch/crates/core_arch/src/x86/sse4a.rs
index 51401e783f7..e6345d0da90 100644
--- a/library/stdarch/crates/core_arch/src/x86/sse4a.rs
+++ b/library/stdarch/crates/core_arch/src/x86/sse4a.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -84,7 +84,7 @@ pub unsafe fn _mm_stream_ss(p: *mut f32, a: __m128) {
 #[cfg(test)]
 mod tests {
     use crate::core_arch::x86::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse4a")]
     unsafe fn test_mm_extract_si64() {
diff --git a/library/stdarch/crates/core_arch/src/x86/ssse3.rs b/library/stdarch/crates/core_arch/src/x86/ssse3.rs
index 07eb620534c..6a45603e441 100644
--- a/library/stdarch/crates/core_arch/src/x86/ssse3.rs
+++ b/library/stdarch/crates/core_arch/src/x86/ssse3.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Computes the absolute value of packed 8-bit signed integers in `a` and
 /// return the unsigned results.
@@ -560,7 +560,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/tbm.rs b/library/stdarch/crates/core_arch/src/x86/tbm.rs
index dd8f800c68a..d1102a11693 100644
--- a/library/stdarch/crates/core_arch/src/x86/tbm.rs
+++ b/library/stdarch/crates/core_arch/src/x86/tbm.rs
@@ -11,7 +11,7 @@
 //! https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 // FIXME(blocked on #248)
 // TODO: LLVM-CODEGEN ERROR: LLVM ERROR: Cannot select:
@@ -279,7 +279,7 @@ pub unsafe fn _tzmsk_u64(x: u64) -> u64 {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86/xsave.rs b/library/stdarch/crates/core_arch/src/x86/xsave.rs
index 124cb39b78d..f3814dd7f62 100644
--- a/library/stdarch/crates/core_arch/src/x86/xsave.rs
+++ b/library/stdarch/crates/core_arch/src/x86/xsave.rs
@@ -2,7 +2,7 @@
 #![allow(clippy::module_name_repetitions)]
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -165,7 +165,7 @@ mod tests {
     use std::{fmt, prelude::v1::*};
 
     use crate::core_arch::x86::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[repr(align(64))]
     struct XsaveArea {
@@ -209,7 +209,7 @@ mod tests {
         }
     }
 
-    // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
+    // FIXME: https://github.com/rust-lang/stdarch/issues/209
     /*
     #[simd_test(enable = "xsave")]
     unsafe fn xsave() {
@@ -237,7 +237,7 @@ mod tests {
         assert_eq!(xcr, xcr_cpy);
     }
 
-    // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
+    // FIXME: https://github.com/rust-lang/stdarch/issues/209
     /*
     #[simd_test(enable = "xsave,xsaveopt")]
     unsafe fn xsaveopt() {
@@ -253,7 +253,7 @@ mod tests {
     */
 
     // FIXME: this looks like a bug in Intel's SDE:
-    #[cfg(not(stdsimd_intel_sde))]
+    #[cfg(not(stdarch_intel_sde))]
     #[simd_test(enable = "xsave,xsavec")]
     unsafe fn xsavec() {
         let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
@@ -266,7 +266,7 @@ mod tests {
         assert_eq!(a, b);
     }
 
-    // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
+    // FIXME: https://github.com/rust-lang/stdarch/issues/209
     /*
     #[simd_test(enable = "xsave,xsaves")]
     unsafe fn xsaves() {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/abm.rs b/library/stdarch/crates/core_arch/src/x86_64/abm.rs
index b5a2b267a6e..988074d673d 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/abm.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/abm.rs
@@ -18,7 +18,7 @@
 //! https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Counts the leading most significant zero bits.
 ///
@@ -46,7 +46,7 @@ pub unsafe fn _popcnt64(x: i64) -> i32 {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::arch::x86_64::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86_64/adx.rs b/library/stdarch/crates/core_arch/src/x86_64/adx.rs
index d1d295d7728..57efe75ddd7 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/adx.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/adx.rs
@@ -1,5 +1,5 @@
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "unadjusted" {
@@ -48,7 +48,7 @@ pub unsafe fn _subborrow_u64(c_in: u8, a: u64, b: u64, out: &mut u64) -> u8 {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86_64::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86_64/avx.rs b/library/stdarch/crates/core_arch/src/x86_64/avx.rs
index 082913e9353..5215fd6fbf3 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/avx.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/avx.rs
@@ -33,7 +33,7 @@ pub unsafe fn _mm256_insert_epi64(a: __m256i, i: i64, index: i32) -> __m256i {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86_64/avx2.rs b/library/stdarch/crates/core_arch/src/x86_64/avx2.rs
index f31c018f547..7cc3fb6efec 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/avx2.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/avx2.rs
@@ -36,7 +36,7 @@ pub unsafe fn _mm256_extract_epi64(a: __m256i, imm8: i32) -> i64 {
 #[cfg(test)]
 mod tests {
     use crate::core_arch::arch::x86_64::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "avx2")]
     unsafe fn test_mm256_extract_epi64() {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/bmi.rs b/library/stdarch/crates/core_arch/src/x86_64/bmi.rs
index 6e1296d5fed..9f71a8d3885 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/bmi.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/bmi.rs
@@ -10,7 +10,7 @@
 //! [wikipedia_bmi]: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Extracts bits in range [`start`, `start` + `length`) from `a` into
 /// the least significant bits of the result.
@@ -123,7 +123,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::{x86::*, x86_64::*};
 
diff --git a/library/stdarch/crates/core_arch/src/x86_64/bmi2.rs b/library/stdarch/crates/core_arch/src/x86_64/bmi2.rs
index 99b7fa0256e..356d95a3d13 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/bmi2.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/bmi2.rs
@@ -11,7 +11,7 @@
 //! https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Unsigned multiply without affecting flags.
 ///
@@ -79,7 +79,7 @@ extern "C" {
 
 #[cfg(test)]
 mod tests {
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     use crate::core_arch::x86_64::*;
 
diff --git a/library/stdarch/crates/core_arch/src/x86_64/bswap.rs b/library/stdarch/crates/core_arch/src/x86_64/bswap.rs
index 08bf1d2f87b..9e8e76d4f70 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/bswap.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/bswap.rs
@@ -3,7 +3,7 @@
 #![allow(clippy::module_name_repetitions)]
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Returns an integer with the reversed byte order of x
 ///
diff --git a/library/stdarch/crates/core_arch/src/x86_64/bt.rs b/library/stdarch/crates/core_arch/src/x86_64/bt.rs
index c6de6b28d5c..9c6dcf7b61b 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/bt.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/bt.rs
@@ -1,5 +1,5 @@
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Returns the bit in position `b` of the memory addressed by `p`.
 #[inline]
diff --git a/library/stdarch/crates/core_arch/src/x86_64/cmpxchg16b.rs b/library/stdarch/crates/core_arch/src/x86_64/cmpxchg16b.rs
index 3c4d4f6421e..391daed20ee 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/cmpxchg16b.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/cmpxchg16b.rs
@@ -1,7 +1,7 @@
 use crate::sync::atomic::Ordering;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Compares and exchange 16 bytes (128 bits) of data atomically.
 ///
diff --git a/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs b/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs
index 543ed6dcee0..0b26fb6d04f 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/fxsr.rs
@@ -1,7 +1,7 @@
 //! FXSR floating-point context fast save and restor.
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -59,7 +59,7 @@ pub unsafe fn _fxrstor64(mem_addr: *const u8) {
 mod tests {
     use crate::core_arch::x86_64::*;
     use std::{cmp::PartialEq, fmt};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[repr(align(16))]
     struct FxsaveArea {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs b/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs
index 7b6d0de01f8..e5ec933fb93 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs
@@ -13,7 +13,7 @@ extern "unadjusted" {
 }
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Read a hardware generated 64-bit random value and store the result in val.
 /// Returns 1 if a random value was generated, and 0 otherwise.
diff --git a/library/stdarch/crates/core_arch/src/x86_64/sse.rs b/library/stdarch/crates/core_arch/src/x86_64/sse.rs
index 066d22fa664..a93215072ab 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/sse.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/sse.rs
@@ -3,7 +3,7 @@
 use crate::core_arch::x86::*;
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -72,7 +72,7 @@ pub unsafe fn _mm_cvtsi64_ss(a: __m128, b: i64) -> __m128 {
 mod tests {
     use crate::core_arch::arch::x86_64::*;
     use std::{f32::NAN, i64::MIN};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse")]
     unsafe fn test_mm_cvtss_si64() {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/sse2.rs b/library/stdarch/crates/core_arch/src/x86_64/sse2.rs
index 37bfc45cf82..94a919d4fe7 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/sse2.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/sse2.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -149,7 +149,7 @@ pub unsafe fn _mm_cvtsi64x_sd(a: __m128d, b: i64) -> __m128d {
 mod tests {
     use crate::core_arch::arch::x86_64::*;
     use std::{boxed, f64, i64};
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse2")]
     unsafe fn test_mm_cvtsd_si64() {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/sse41.rs b/library/stdarch/crates/core_arch/src/x86_64/sse41.rs
index 36e498888ab..18c315c90fe 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/sse41.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/sse41.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 /// Extracts an 64-bit integer from `a` selected with `imm8`
 ///
@@ -37,7 +37,7 @@ pub unsafe fn _mm_insert_epi64(a: __m128i, i: i64, imm8: i32) -> __m128i {
 #[cfg(test)]
 mod tests {
     use crate::core_arch::arch::x86_64::*;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse4.1")]
     unsafe fn test_mm_extract_epi64() {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/sse42.rs b/library/stdarch/crates/core_arch/src/x86_64/sse42.rs
index 03db7aca384..405073261ce 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/sse42.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/sse42.rs
@@ -1,7 +1,7 @@
 //! `x86_64`'s Streaming SIMD Extensions 4.2 (SSE4.2)
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -25,7 +25,7 @@ pub unsafe fn _mm_crc32_u64(crc: u64, v: u64) -> u64 {
 mod tests {
     use crate::core_arch::arch::x86_64::*;
 
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
 
     #[simd_test(enable = "sse4.2")]
     unsafe fn test_mm_crc32_u64() {
diff --git a/library/stdarch/crates/core_arch/src/x86_64/xsave.rs b/library/stdarch/crates/core_arch/src/x86_64/xsave.rs
index 964a24d12e2..8296695058b 100644
--- a/library/stdarch/crates/core_arch/src/x86_64/xsave.rs
+++ b/library/stdarch/crates/core_arch/src/x86_64/xsave.rs
@@ -3,7 +3,7 @@
 #![allow(clippy::module_name_repetitions)]
 
 #[cfg(test)]
-use stdsimd_test::assert_instr;
+use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
 extern "C" {
@@ -124,16 +124,16 @@ pub unsafe fn _xrstors64(mem_addr: *const u8, rs_mask: u64) {
     xrstors64(mem_addr, (rs_mask >> 32) as u32, rs_mask as u32);
 }
 
-// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
+// FIXME: https://github.com/rust-lang/stdarch/issues/209
 // All these tests fail with Intel SDE.
 /*
 #[cfg(test)]
 mod tests {
     use crate::core_arch::x86::x86_64::xsave;
-    use stdsimd_test::simd_test;
+    use stdarch_test::simd_test;
     use std::fmt;
 
-    // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
+    // FIXME: https://github.com/rust-lang/stdarch/issues/209
     #[repr(align(64))]
     struct XsaveArea {
         // max size for 256-bit registers is 800 bytes:
diff --git a/library/stdarch/crates/core_arch/tests/cpu-detection.rs b/library/stdarch/crates/core_arch/tests/cpu-detection.rs
index 321f24e9fc2..07b56c616d6 100644
--- a/library/stdarch/crates/core_arch/tests/cpu-detection.rs
+++ b/library/stdarch/crates/core_arch/tests/cpu-detection.rs
@@ -1,5 +1,4 @@
 #![feature(stdsimd)]
-#![cfg_attr(stdsimd_strict, deny(warnings))]
 #![allow(clippy::option_unwrap_used, clippy::print_stdout, clippy::use_debug)]
 
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
diff --git a/library/stdarch/crates/simd-test-macro/src/lib.rs b/library/stdarch/crates/simd-test-macro/src/lib.rs
index 67f3059ebee..4d1170cc7e9 100644
--- a/library/stdarch/crates/simd-test-macro/src/lib.rs
+++ b/library/stdarch/crates/simd-test-macro/src/lib.rs
@@ -126,7 +126,7 @@ pub fn simd_test(
                 #emms
                 return v;
             } else {
-                ::stdsimd_test::assert_skip_test_ok(stringify!(#name));
+                ::stdarch_test::assert_skip_test_ok(stringify!(#name));
             }
 
             #[target_feature(enable = #enable_feature)]
diff --git a/library/stdarch/crates/std_detect/Cargo.toml b/library/stdarch/crates/std_detect/Cargo.toml
index ae633566591..8902868c623 100644
--- a/library/stdarch/crates/std_detect/Cargo.toml
+++ b/library/stdarch/crates/std_detect/Cargo.toml
@@ -8,8 +8,8 @@ authors = [
 ]
 description = "`std::detect` - Rust's standard library run-time CPU feature detection."
 documentation = "https://docs.rs/std_detect"
-homepage = "https://github.com/rust-lang-nursery/stdsimd"
-repository = "https://github.com/rust-lang-nursery/stdsimd"
+homepage = "https://github.com/rust-lang/stdarch"
+repository = "https://github.com/rust-lang/stdarch"
 readme = "README.md"
 keywords = ["std", "run-time", "feature", "detection"]
 categories = ["hardware-support"]
@@ -17,10 +17,10 @@ license = "MIT/Apache-2.0"
 edition = "2015"
 
 [badges]
-travis-ci = { repository = "rust-lang-nursery/stdsimd" }
-appveyor = { repository = "rust-lang-nursery/stdsimd"  }
-is-it-maintained-issue-resolution = { repository = "rust-lang-nursery/stdsimd" }
-is-it-maintained-open-issues = { repository = "rust-lang-nursery/stdsimd" }
+travis-ci = { repository = "rust-lang/stdarch" }
+appveyor = { repository = "rust-lang/stdarch"  }
+is-it-maintained-issue-resolution = { repository = "rust-lang/stdarch" }
+is-it-maintained-open-issues = { repository = "rust-lang/stdarch" }
 maintenance = { status = "experimental" }
 
 [dependencies]
diff --git a/library/stdarch/crates/std_detect/README.md b/library/stdarch/crates/std_detect/README.md
index 4d2ec7d3448..1c83a54b80d 100644
--- a/library/stdarch/crates/std_detect/README.md
+++ b/library/stdarch/crates/std_detect/README.md
@@ -75,9 +75,9 @@ Unless you explicitly state otherwise, any contribution intentionally submitted
 for inclusion in `std_detect` by you, as defined in the Apache-2.0 license,
 shall be dual licensed as above, without any additional terms or conditions.
 
-[travis]: https://travis-ci.com/rust-lang-nursery/stdsimd
-[Travis-CI Status]: https://travis-ci.com/rust-lang-nursery/stdsimd.svg?branch=master
-[appveyor]: https://ci.appveyor.com/project/rust-lang-libs/stdsimd/branch/master
+[travis]: https://travis-ci.com/rust-lang/stdarch
+[Travis-CI Status]: https://travis-ci.com/rust-lang/stdarch.svg?branch=master
+[appveyor]: https://ci.appveyor.com/project/rust-lang-libs/stdarch/branch/master
 [Appveyor Status]: https://ci.appveyor.com/api/projects/status/ix74qhmilpibn00x/branch/master?svg=true
 [std_detect_crate_badge]: https://img.shields.io/crates/v/std_detect.svg
 [std_detect_crate_link]: https://crates.io/crates/std_detect
diff --git a/library/stdarch/crates/std_detect/src/lib.rs b/library/stdarch/crates/std_detect/src/lib.rs
index 8b3bb304f1c..7737719c3b0 100644
--- a/library/stdarch/crates/std_detect/src/lib.rs
+++ b/library/stdarch/crates/std_detect/src/lib.rs
@@ -17,7 +17,6 @@
 #![deny(clippy::missing_inline_in_public_items)]
 #![cfg_attr(target_os = "linux", feature(linkage))]
 #![cfg_attr(all(target_os = "freebsd", target_arch = "aarch64"), feature(asm))]
-#![cfg_attr(stdsimd_strict, deny(warnings))]
 #![cfg_attr(test, allow(unused_imports))]
 #![no_std]
 
diff --git a/library/stdarch/crates/std_detect/tests/cpu-detection.rs b/library/stdarch/crates/std_detect/tests/cpu-detection.rs
index 0aae39e2947..d0c9901c4cd 100644
--- a/library/stdarch/crates/std_detect/tests/cpu-detection.rs
+++ b/library/stdarch/crates/std_detect/tests/cpu-detection.rs
@@ -1,5 +1,4 @@
 #![feature(stdsimd)]
-#![cfg_attr(stdsimd_strict, deny(warnings))]
 #![allow(clippy::option_unwrap_used, clippy::use_debug, clippy::print_stdout)]
 
 #[cfg(any(
diff --git a/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs b/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs
index df03e6555aa..e950523d0e5 100644
--- a/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs
+++ b/library/stdarch/crates/std_detect/tests/macro_trailing_commas.rs
@@ -1,5 +1,4 @@
 #![feature(stdsimd)]
-#![cfg_attr(stdsimd_strict, deny(warnings))]
 #![allow(clippy::option_unwrap_used, clippy::use_debug, clippy::print_stdout)]
 
 #[cfg(any(
diff --git a/library/stdarch/crates/stdsimd-test/Cargo.toml b/library/stdarch/crates/stdarch-test/Cargo.toml
index b60a09677b6..2b445f8dc5b 100644
--- a/library/stdarch/crates/stdsimd-test/Cargo.toml
+++ b/library/stdarch/crates/stdarch-test/Cargo.toml
@@ -1,5 +1,5 @@
 [package]
-name = "stdsimd-test"
+name = "stdarch-test"
 version = "0.1.0"
 authors = ["Alex Crichton <alex@alexcrichton.com>"]
 
diff --git a/library/stdarch/crates/stdsimd-test/src/disassembly.rs b/library/stdarch/crates/stdarch-test/src/disassembly.rs
index d38f91c0f32..23ebd92e740 100644
--- a/library/stdarch/crates/stdsimd-test/src/disassembly.rs
+++ b/library/stdarch/crates/stdarch-test/src/disassembly.rs
@@ -108,7 +108,7 @@ fn parse(output: &str) -> HashSet<Function> {
     let mut functions = HashSet::new();
     let mut cached_header = None;
     while let Some(header) = cached_header.take().or_else(|| lines.next()) {
-        if !header.ends_with(':') || !header.contains("stdsimd_test_shim") {
+        if !header.ends_with(':') || !header.contains("stdarch_test_shim") {
             continue
         }
         let symbol = normalize(header);
diff --git a/library/stdarch/crates/stdsimd-test/src/lib.rs b/library/stdarch/crates/stdarch-test/src/lib.rs
index 1deb3acc88b..a284697d6bc 100644
--- a/library/stdarch/crates/stdsimd-test/src/lib.rs
+++ b/library/stdarch/crates/stdarch-test/src/lib.rs
@@ -1,4 +1,4 @@
-//! Runtime support needed for testing the stdsimd crate.
+//! Runtime support needed for testing the stdarch crate.
 //!
 //! This basically just disassembles the current executable and then parses the
 //! output once globally and then provides the `assert` function which makes
@@ -104,7 +104,7 @@ pub fn assert(_fnptr: usize, fnname: &str, expected: &str) {
         s[0].contains("call") && (!cfg!(target_arch = "x86") || s[1].contains("pop"))
     });
 
-    let instruction_limit = std::env::var("STDSIMD_ASSERT_INSTR_LIMIT")
+    let instruction_limit = std::env::var("STDARCH_ASSERT_INSTR_LIMIT")
         .ok()
         .map_or_else(
             || match expected {
@@ -168,7 +168,7 @@ pub fn assert(_fnptr: usize, fnname: &str, expected: &str) {
 }
 
 pub fn assert_skip_test_ok(name: &str) {
-    if env::var("STDSIMD_TEST_EVERYTHING").is_err() {
+    if env::var("STDARCH_TEST_EVERYTHING").is_err() {
         return;
     }
     panic!("skipped test `{}` when it shouldn't be skipped", name);
diff --git a/library/stdarch/crates/stdsimd-test/src/wasm.rs b/library/stdarch/crates/stdarch-test/src/wasm.rs
index 36664061bbd..b31051bc68f 100644
--- a/library/stdarch/crates/stdsimd-test/src/wasm.rs
+++ b/library/stdarch/crates/stdarch-test/src/wasm.rs
@@ -78,7 +78,7 @@ pub(crate) fn disassemble_myself() -> HashSet<Function> {
             function.name = function.name[1..].to_string()
         }
 
-        if !function.name.contains("stdsimd_test_shim") {
+        if !function.name.contains("stdarch_test_shim") {
             continue;
         }
 
diff --git a/library/stdarch/crates/stdsimd-verify/.gitattributes b/library/stdarch/crates/stdarch-verify/.gitattributes
index 621fdea6f7d..621fdea6f7d 100644
--- a/library/stdarch/crates/stdsimd-verify/.gitattributes
+++ b/library/stdarch/crates/stdarch-verify/.gitattributes
diff --git a/library/stdarch/crates/stdsimd-verify/Cargo.toml b/library/stdarch/crates/stdarch-verify/Cargo.toml
index 9d3d951723f..1414b110070 100644
--- a/library/stdarch/crates/stdsimd-verify/Cargo.toml
+++ b/library/stdarch/crates/stdarch-verify/Cargo.toml
@@ -1,5 +1,5 @@
 [package]
-name = "stdsimd-verify"
+name = "stdarch-verify"
 version = "0.1.0"
 authors = ["Alex Crichton <alex@alexcrichton.com>"]
 edition = "2018"
diff --git a/library/stdarch/crates/stdsimd-verify/arm-intrinsics.html b/library/stdarch/crates/stdarch-verify/arm-intrinsics.html
index ac246c6bae2..ac246c6bae2 100644
--- a/library/stdarch/crates/stdsimd-verify/arm-intrinsics.html
+++ b/library/stdarch/crates/stdarch-verify/arm-intrinsics.html
diff --git a/library/stdarch/crates/stdsimd-verify/build.rs b/library/stdarch/crates/stdarch-verify/build.rs
index c0dc81b6a61..c0dc81b6a61 100644
--- a/library/stdarch/crates/stdsimd-verify/build.rs
+++ b/library/stdarch/crates/stdarch-verify/build.rs
diff --git a/library/stdarch/crates/stdsimd-verify/mips-msa.h b/library/stdarch/crates/stdarch-verify/mips-msa.h
index 881f1918f6b..881f1918f6b 100644
--- a/library/stdarch/crates/stdsimd-verify/mips-msa.h
+++ b/library/stdarch/crates/stdarch-verify/mips-msa.h
diff --git a/library/stdarch/crates/stdsimd-verify/src/lib.rs b/library/stdarch/crates/stdarch-verify/src/lib.rs
index cbe0530970b..cbe0530970b 100644
--- a/library/stdarch/crates/stdsimd-verify/src/lib.rs
+++ b/library/stdarch/crates/stdarch-verify/src/lib.rs
diff --git a/library/stdarch/crates/stdsimd-verify/tests/arm.rs b/library/stdarch/crates/stdarch-verify/tests/arm.rs
index 05acd241b51..6f92933bc73 100644
--- a/library/stdarch/crates/stdsimd-verify/tests/arm.rs
+++ b/library/stdarch/crates/stdarch-verify/tests/arm.rs
@@ -167,7 +167,7 @@ enum Type {
     Never,
 }
 
-stdsimd_verify::arm_functions!(static FUNCTIONS);
+stdarch_verify::arm_functions!(static FUNCTIONS);
 
 macro_rules! bail {
     ($($t:tt)*) => (return Err(format!($($t)*)))
diff --git a/library/stdarch/crates/stdsimd-verify/tests/mips.rs b/library/stdarch/crates/stdarch-verify/tests/mips.rs
index 334b001566e..9dba12b95a7 100644
--- a/library/stdarch/crates/stdsimd-verify/tests/mips.rs
+++ b/library/stdarch/crates/stdarch-verify/tests/mips.rs
@@ -6,7 +6,7 @@
 // https://gcc.gnu.org/onlinedocs//gcc/MIPS-SIMD-Architecture-Built-in-Functions.html
 static HEADER: &str = include_str!("../mips-msa.h");
 
-stdsimd_verify::mips_functions!(static FUNCTIONS);
+stdarch_verify::mips_functions!(static FUNCTIONS);
 
 struct Function {
     name: &'static str,
diff --git a/library/stdarch/crates/stdsimd-verify/tests/x86-intel.rs b/library/stdarch/crates/stdarch-verify/tests/x86-intel.rs
index 0b1eee07c47..4a40dbb8bf8 100644
--- a/library/stdarch/crates/stdsimd-verify/tests/x86-intel.rs
+++ b/library/stdarch/crates/stdarch-verify/tests/x86-intel.rs
@@ -81,7 +81,7 @@ enum Type {
     Ordering,
 }
 
-stdsimd_verify::x86_functions!(static FUNCTIONS);
+stdarch_verify::x86_functions!(static FUNCTIONS);
 
 #[derive(Deserialize)]
 struct Data {
@@ -142,7 +142,7 @@ fn verify_all_signatures() {
         match rust.name {
             // These aren't defined by Intel but they're defined by what appears
             // to be all other compilers. For more information see
-            // rust-lang-nursery/stdsimd#307, and otherwise these signatures
+            // rust-lang/stdarch#307, and otherwise these signatures
             // have all been manually verified.
             "__readeflags" |
             "__writeeflags" |
@@ -299,7 +299,7 @@ fn matches(rust: &Function, intel: &Intrinsic) -> Result<(), String> {
             // The XML file names IFMA as "avx512ifma52", while Rust calls
             // it "avx512ifma".
             "avx512ifma52" => String::from("avx512ifma"),
-            // See: https://github.com/rust-lang-nursery/stdsimd/issues/738
+            // See: https://github.com/rust-lang/stdarch/issues/738
             // The intrinsics guide calls `f16c` `fp16c` in disagreement with
             // Intel's architecture manuals.
             "fp16c" => String::from("f16c"),
@@ -509,7 +509,7 @@ fn equate(t: &Type, intel: &str, intrinsic: &str, is_const: bool) -> Result<(),
         (&Type::MutPtr(&Type::M128), "__m128") if intrinsic == "_MM_TRANSPOSE4_PS" => {}
 
         // The _rdtsc intrinsic uses a __int64 return type, but this is a bug in
-        // the intrinsics guide: https://github.com/rust-lang-nursery/stdsimd/issues/559
+        // the intrinsics guide: https://github.com/rust-lang/stdarch/issues/559
         // We have manually fixed the bug by changing the return type to `u64`.
         (&Type::PrimUnsigned(64), "__int64") if intrinsic == "_rdtsc" => {}
 
diff --git a/library/stdarch/crates/stdsimd-verify/x86-intel.xml b/library/stdarch/crates/stdarch-verify/x86-intel.xml
index c22a3adaeca..c22a3adaeca 100644
--- a/library/stdarch/crates/stdsimd-verify/x86-intel.xml
+++ b/library/stdarch/crates/stdarch-verify/x86-intel.xml