Add tracking issue for 32-bit ARM DSP instrinsics

5 files changed, 51 insertions, 2 deletions

diff --git a/library/stdarch/crates/core_arch/src/arm/dsp.rs b/library/stdarch/crates/core_arch/src/arm/dsp.rs
index 6720f97a532..6d9c0138a1e 100644
--- a/library/stdarch/crates/core_arch/src/arm/dsp.rs
+++ b/library/stdarch/crates/core_arch/src/arm/dsp.rs
@@ -27,8 +27,10 @@ use crate::mem::transmute;
 
 types! {
     /// ARM-specific 32-bit wide vector of two packed `i16`.
+    #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
     pub struct int16x2_t(i16, i16);
     /// ARM-specific 32-bit wide vector of two packed `u16`.
+    #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
     pub struct uint16x2_t(u16, u16);
 }
 
@@ -82,6 +84,7 @@ extern "unadjusted" {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smulbb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulbb(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smulbb(transmute(a), transmute(b))
 }
@@ -92,6 +95,7 @@ pub unsafe fn __smulbb(a: int16x2_t, b: int16x2_t) -> i32 {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smultb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smultb(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smultb(transmute(a), transmute(b))
 }
@@ -102,6 +106,7 @@ pub unsafe fn __smultb(a: int16x2_t, b: int16x2_t) -> i32 {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smulbt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulbt(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smulbt(transmute(a), transmute(b))
 }
@@ -112,6 +117,7 @@ pub unsafe fn __smulbt(a: int16x2_t, b: int16x2_t) -> i32 {
 /// where \[0\] is the lower 16 bits and \[1\] is the upper 16 bits.
 #[inline]
 #[cfg_attr(test, assert_instr(smultt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smultt(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smultt(transmute(a), transmute(b))
 }
@@ -123,6 +129,7 @@ pub unsafe fn __smultt(a: int16x2_t, b: int16x2_t) -> i32 {
 /// Return the top 32 bits of the 48-bit product
 #[inline]
 #[cfg_attr(test, assert_instr(smulwb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulwb(a: int16x2_t, b: i32) -> i32 {
     arm_smulwb(transmute(a), b)
 }
@@ -134,6 +141,7 @@ pub unsafe fn __smulwb(a: int16x2_t, b: i32) -> i32 {
 /// Return the top 32 bits of the 48-bit product
 #[inline]
 #[cfg_attr(test, assert_instr(smulwt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smulwt(a: int16x2_t, b: i32) -> i32 {
     arm_smulwt(transmute(a), b)
 }
@@ -144,6 +152,7 @@ pub unsafe fn __smulwt(a: int16x2_t, b: i32) -> i32 {
 /// Sets the Q flag if saturation occurs.
 #[inline]
 #[cfg_attr(test, assert_instr(qadd))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qadd(a: i32, b: i32) -> i32 {
     arm_qadd(a, b)
 }
@@ -154,6 +163,7 @@ pub unsafe fn __qadd(a: i32, b: i32) -> i32 {
 /// Sets the Q flag if saturation occurs.
 #[inline]
 #[cfg_attr(test, assert_instr(qsub))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qsub(a: i32, b: i32) -> i32 {
     arm_qsub(a, b)
 }
@@ -164,6 +174,7 @@ pub unsafe fn __qsub(a: i32, b: i32) -> i32 {
 /// Sets the Q flag if saturation occurs.
 #[inline]
 #[cfg_attr(test, assert_instr(qadd))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qdbl(a: i32) -> i32 {
     arm_qadd(a, a)
 }
@@ -175,6 +186,7 @@ pub unsafe fn __qdbl(a: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlabb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlabb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlabb(transmute(a), transmute(b), c)
 }
@@ -186,6 +198,7 @@ pub unsafe fn __smlabb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlabt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlabt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlabt(transmute(a), transmute(b), c)
 }
@@ -197,6 +210,7 @@ pub unsafe fn __smlabt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlatb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlatb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlatb(transmute(a), transmute(b), c)
 }
@@ -208,6 +222,7 @@ pub unsafe fn __smlatb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlatt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlatt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlatt(transmute(a), transmute(b), c)
 }
@@ -219,6 +234,7 @@ pub unsafe fn __smlatt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlawb))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlawb(a: i32, b: int16x2_t, c: i32) -> i32 {
     arm_smlawb(a, transmute(b), c)
 }
@@ -230,6 +246,7 @@ pub unsafe fn __smlawb(a: i32, b: int16x2_t, c: i32) -> i32 {
 /// Sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smlawt))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlawt(a: i32, b: int16x2_t, c: i32) -> i32 {
     arm_smlawt(a, transmute(b), c)
 }
diff --git a/library/stdarch/crates/core_arch/src/arm/mod.rs b/library/stdarch/crates/core_arch/src/arm/mod.rs
index 6b1fe0bbaea..d994508e817 100644
--- a/library/stdarch/crates/core_arch/src/arm/mod.rs
+++ b/library/stdarch/crates/core_arch/src/arm/mod.rs
@@ -25,7 +25,7 @@ pub use self::sat::*;
     all(target_feature = "mclass", target_feature = "dsp"),
     doc,
 ))]
-pub mod dsp;
+mod dsp;
 
 #[cfg(any(
     // >= v5TE but excludes v7-M
@@ -34,6 +34,7 @@ pub mod dsp;
     all(target_feature = "mclass", target_feature = "dsp"),
     doc,
 ))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub use self::dsp::*;
 
 // Deprecated in ACLE 2.0 for the A profile but fully supported on the M and R profiles, says
@@ -54,8 +55,10 @@ mod simd32;
     all(target_feature = "mclass", target_feature = "dsp"),
     doc,
 ))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub use self::simd32::*;
 
+#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
 pub use crate::core_arch::arm_shared::*;
 
 #[cfg(test)]
@@ -67,4 +70,5 @@ use stdarch_test::assert_instr;
 pub(crate) mod neon;
 #[cfg(target_endian = "little")]
 #[cfg(any(target_feature = "v7", doc))]
+#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
 pub use neon::*;
diff --git a/library/stdarch/crates/core_arch/src/arm/simd32.rs b/library/stdarch/crates/core_arch/src/arm/simd32.rs
index 2d867acc83e..e81ad02a915 100644
--- a/library/stdarch/crates/core_arch/src/arm/simd32.rs
+++ b/library/stdarch/crates/core_arch/src/arm/simd32.rs
@@ -69,8 +69,10 @@ use crate::{core_arch::arm::dsp::int16x2_t, mem::transmute};
 
 types! {
     /// ARM-specific 32-bit wide vector of four packed `i8`.
+    #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
     pub struct int8x4_t(i8, i8, i8, i8);
     /// ARM-specific 32-bit wide vector of four packed `u8`.
+    #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
     pub struct uint8x4_t(u8, u8, u8, u8);
 }
 
@@ -161,6 +163,7 @@ extern "unadjusted" {
 /// res\[3\] = a\[3\] + b\[3\]
 #[inline]
 #[cfg_attr(test, assert_instr(qadd8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qadd8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_qadd8, a, b)
 }
@@ -175,6 +178,7 @@ pub unsafe fn __qadd8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res\[3\] = a\[3\] - b\[3\]
 #[inline]
 #[cfg_attr(test, assert_instr(qsub8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qsub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_qsub8, a, b)
 }
@@ -187,6 +191,7 @@ pub unsafe fn __qsub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res\[1\] = a\[1\] - b\[1\]
 #[inline]
 #[cfg_attr(test, assert_instr(qsub16))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qsub16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_qsub16, a, b)
 }
@@ -199,6 +204,7 @@ pub unsafe fn __qsub16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// res\[1\] = a\[1\] + b\[1\]
 #[inline]
 #[cfg_attr(test, assert_instr(qadd16))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qadd16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_qadd16, a, b)
 }
@@ -209,6 +215,7 @@ pub unsafe fn __qadd16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// res\[1\] = a\[1\] + b\[0\]
 #[inline]
 #[cfg_attr(test, assert_instr(qasx))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qasx(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_qasx, a, b)
 }
@@ -219,6 +226,7 @@ pub unsafe fn __qasx(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// res\[1\] = a\[1\] - b\[0\]
 #[inline]
 #[cfg_attr(test, assert_instr(qsax))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __qsax(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_qsax, a, b)
 }
@@ -231,6 +239,7 @@ pub unsafe fn __qsax(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// and the GE bits of the APSR are set.
 #[inline]
 #[cfg_attr(test, assert_instr(sadd16))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __sadd16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_sadd16, a, b)
 }
@@ -245,6 +254,7 @@ pub unsafe fn __sadd16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// and the GE bits of the APSR are set.
 #[inline]
 #[cfg_attr(test, assert_instr(sadd8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __sadd8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_sadd8, a, b)
 }
@@ -256,6 +266,7 @@ pub unsafe fn __sadd8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res = a\[0\] * b\[0\] + a\[1\] * b\[1\] + c
 #[inline]
 #[cfg_attr(test, assert_instr(smlad))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlad(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlad(transmute(a), transmute(b), c)
 }
@@ -267,6 +278,7 @@ pub unsafe fn __smlad(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// res = a\[0\] * b\[0\] - a\[1\] * b\[1\] + c
 #[inline]
 #[cfg_attr(test, assert_instr(smlsd))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smlsd(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
     arm_smlsd(transmute(a), transmute(b), c)
 }
@@ -279,6 +291,7 @@ pub unsafe fn __smlsd(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 /// and the GE bits of the APSR are set.
 #[inline]
 #[cfg_attr(test, assert_instr(sasx))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __sasx(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_sasx, a, b)
 }
@@ -295,6 +308,7 @@ pub unsafe fn __sasx(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// where GE are bits of APSR
 #[inline]
 #[cfg_attr(test, assert_instr(sel))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __sel(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_sel, a, b)
 }
@@ -309,6 +323,7 @@ pub unsafe fn __sel(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res\[3\] = (a\[3\] + b\[3\]) / 2
 #[inline]
 #[cfg_attr(test, assert_instr(shadd8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __shadd8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_shadd8, a, b)
 }
@@ -321,6 +336,7 @@ pub unsafe fn __shadd8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res\[1\] = (a\[1\] + b\[1\]) / 2
 #[inline]
 #[cfg_attr(test, assert_instr(shadd16))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __shadd16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_shadd16, a, b)
 }
@@ -335,6 +351,7 @@ pub unsafe fn __shadd16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// res\[3\] = (a\[3\] - b\[3\]) / 2
 #[inline]
 #[cfg_attr(test, assert_instr(shsub8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __shsub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_shsub8, a, b)
 }
@@ -352,6 +369,7 @@ pub unsafe fn __shsub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// The GE bits of the APSR are set.
 #[inline]
 #[cfg_attr(test, assert_instr(usub8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __usub8(a: uint8x4_t, b: uint8x4_t) -> uint8x4_t {
     dsp_call!(arm_usub8, a, b)
 }
@@ -369,6 +387,7 @@ pub unsafe fn __usub8(a: uint8x4_t, b: uint8x4_t) -> uint8x4_t {
 /// The GE bits of the APSR are set.
 #[inline]
 #[cfg_attr(test, assert_instr(ssub8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __ssub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
     dsp_call!(arm_ssub8, a, b)
 }
@@ -381,6 +400,7 @@ pub unsafe fn __ssub8(a: int8x4_t, b: int8x4_t) -> int8x4_t {
 /// res\[1\] = (a\[1\] - b\[1\]) / 2
 #[inline]
 #[cfg_attr(test, assert_instr(shsub16))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __shsub16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
     dsp_call!(arm_shsub16, a, b)
 }
@@ -394,6 +414,7 @@ pub unsafe fn __shsub16(a: int16x2_t, b: int16x2_t) -> int16x2_t {
 /// and sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smuad))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smuad(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smuad(transmute(a), transmute(b))
 }
@@ -407,6 +428,7 @@ pub unsafe fn __smuad(a: int16x2_t, b: int16x2_t) -> i32 {
 /// and sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smuadx))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smuadx(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smuadx(transmute(a), transmute(b))
 }
@@ -420,6 +442,7 @@ pub unsafe fn __smuadx(a: int16x2_t, b: int16x2_t) -> i32 {
 /// and sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smusd))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smusd(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smusd(transmute(a), transmute(b))
 }
@@ -433,6 +456,7 @@ pub unsafe fn __smusd(a: int16x2_t, b: int16x2_t) -> i32 {
 /// and sets the Q flag if overflow occurs on the addition.
 #[inline]
 #[cfg_attr(test, assert_instr(smusdx))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __smusdx(a: int16x2_t, b: int16x2_t) -> i32 {
     arm_smusdx(transmute(a), transmute(b))
 }
@@ -445,6 +469,7 @@ pub unsafe fn __smusdx(a: int16x2_t, b: int16x2_t) -> i32 {
 ///          (a\[2\] - b\[2\]) + (a\[3\] - b\[3\])
 #[inline]
 #[cfg_attr(test, assert_instr(usad8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __usad8(a: int8x4_t, b: int8x4_t) -> u32 {
     arm_usad8(transmute(a), transmute(b))
 }
@@ -457,6 +482,7 @@ pub unsafe fn __usad8(a: int8x4_t, b: int8x4_t) -> u32 {
 ///          (a\[2\] - b\[2\]) + (a\[3\] - b\[3\]) + c
 #[inline]
 #[cfg_attr(test, assert_instr(usad8))]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
 pub unsafe fn __usada8(a: int8x4_t, b: int8x4_t, c: u32) -> u32 {
     __usad8(a, b) + c
 }
diff --git a/library/stdarch/crates/core_arch/src/lib.rs b/library/stdarch/crates/core_arch/src/lib.rs
index a23f13b486b..2a2a8e24357 100644
--- a/library/stdarch/crates/core_arch/src/lib.rs
+++ b/library/stdarch/crates/core_arch/src/lib.rs
@@ -57,6 +57,7 @@
     test(attr(deny(warnings))),
     test(attr(allow(dead_code, deprecated, unused_variables, unused_mut)))
 )]
+#![cfg_attr(test, feature(stdarch_arm_feature_detection))]
 
 #[cfg(test)]
 #[macro_use]
diff --git a/library/stdarch/crates/core_arch/src/mod.rs b/library/stdarch/crates/core_arch/src/mod.rs
index fe2085d05e7..e72d9abf9cc 100644
--- a/library/stdarch/crates/core_arch/src/mod.rs
+++ b/library/stdarch/crates/core_arch/src/mod.rs
@@ -43,8 +43,9 @@ pub mod arch {
     /// See the [module documentation](../index.html) for more details.
     #[cfg(any(target_arch = "arm", doc))]
     #[doc(cfg(target_arch = "arm"))]
-    #[unstable(feature = "stdsimd", issue = "27731")]
+    #[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
     pub mod arm {
+        #[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
         pub use crate::core_arch::arm::*;
     }