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| author | gnzlbg <gonzalobg88@gmail.com> | 2019-01-21 16:59:10 +0100 |
|---|---|---|
| committer | gnzlbg <gnzlbg@users.noreply.github.com> | 2019-01-22 17:04:25 +0100 |
| commit | 11c624e488663f4f7554d1f92a072c7caee3908e (patch) | |
| tree | 0523ed5fac723731d10ef7110a0c36923cb545a2 /library/stdarch/examples/hex.rs | |
| parent | 3ca14c6fecdf36ad5c5beca759d2ed7f6a0e1e5f (diff) | |
| download | rust-11c624e488663f4f7554d1f92a072c7caee3908e.tar.gz rust-11c624e488663f4f7554d1f92a072c7caee3908e.zip | |
Refactor stdsimd
This commit:
* renames `coresimd` to `core_arch` and `stdsimd` to `std_detect`
* `std_detect` does no longer depend on `core_arch` - it is a freestanding
`no_std` library that only depends on `core` - it is renamed to `std_detect`
* moves the top-level coresimd and stdsimd directories into the appropriate
crates/... directories - this simplifies creating crate.io releases of these crates
* moves the top-level `coresimd` and `stdsimd` sub-directories into their
corresponding crates in `crates/{core_arch, std_detect}`.
Diffstat (limited to 'library/stdarch/examples/hex.rs')
| -rw-r--r-- | library/stdarch/examples/hex.rs | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/library/stdarch/examples/hex.rs b/library/stdarch/examples/hex.rs index 28b85819858..37f2ce70160 100644 --- a/library/stdarch/examples/hex.rs +++ b/library/stdarch/examples/hex.rs @@ -8,7 +8,7 @@ //! //! You can test out this program via: //! -//! echo test | cargo +nightly run --release --example hex -p stdsimd +//! echo test | cargo +nightly run --release hex //! //! and you should see `746573740a` get printed out. @@ -28,11 +28,10 @@ )] #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] -#[macro_use] -extern crate stdsimd; +#[macro_use(is_x86_feature_detected)] +extern crate std_detect; -#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))] -extern crate stdsimd; +extern crate core_arch; #[cfg(test)] #[macro_use] @@ -42,9 +41,9 @@ use std::io::{self, Read}; use std::str; #[cfg(target_arch = "x86")] -use stdsimd::arch::x86::*; +use core_arch::arch::x86::*; #[cfg(target_arch = "x86_64")] -use stdsimd::arch::x86_64::*; +use core_arch::arch::x86_64::*; fn main() { let mut input = Vec::new(); @@ -290,8 +289,9 @@ mod benches { len: usize, f: for<'a> unsafe fn(&[u8], &'a mut [u8]) -> Result<&'a str, usize>, ) { - let input = rand::thread_rng() - .gen_iter::<u8>() + let mut rng = rand::thread_rng(); + let input = std::iter::repeat(()) + .map(|()| rng.gen::<u8>()) .take(len) .collect::<Vec<_>>(); let mut dst = vec![0; input.len() * 2]; |
