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authorClaude-Alban RANÉLY-VERGÉ-DÉPRÉ <claude.alban.ranely@gmail.com>2019-05-17 23:55:04 +0200
committerClaude-Alban RANÉLY-VERGÉ-DÉPRÉ <claude.alban.ranely@gmail.com>2019-05-28 19:17:51 +0200
commit6e5e0daff2aee5ec5832ed22499417ffdf4b3827 (patch)
tree8de6ded25937f0e23f60c96dcd63f291bb385317 /src/librustc_codegen_llvm/debuginfo
parent7da118581c9dc839c8bf3fbb622bab9ce32bbf38 (diff)
downloadrust-6e5e0daff2aee5ec5832ed22499417ffdf4b3827.tar.gz
rust-6e5e0daff2aee5ec5832ed22499417ffdf4b3827.zip
Changes the type `mir::Mir` into `mir::Body`
The commit should have changed comments as well.
At the time of writting, it passes the tidy and check tool.

Revisions asked by eddyb :
- Renamed of all the occurences of {visit/super}_mir
- Renamed test structures `CachedMir` to `Cached`

Fixing the missing import on `AggregateKind`
Diffstat (limited to 'src/librustc_codegen_llvm/debuginfo')
-rw-r--r--src/librustc_codegen_llvm/debuginfo/create_scope_map.rs6
-rw-r--r--src/librustc_codegen_llvm/debuginfo/mod.rs4
2 files changed, 5 insertions, 5 deletions
diff --git a/src/librustc_codegen_llvm/debuginfo/create_scope_map.rs b/src/librustc_codegen_llvm/debuginfo/create_scope_map.rs
index c8ddf733ecf..8b3ed5b0c62 100644
--- a/src/librustc_codegen_llvm/debuginfo/create_scope_map.rs
+++ b/src/librustc_codegen_llvm/debuginfo/create_scope_map.rs
@@ -5,7 +5,7 @@ use super::utils::{DIB, span_start};
 use crate::llvm;
 use crate::llvm::debuginfo::{DIScope, DISubprogram};
 use crate::common::CodegenCx;
-use rustc::mir::{Mir, SourceScope};
+use rustc::mir::{Body, SourceScope};
 
 use libc::c_uint;
 
@@ -20,7 +20,7 @@ use syntax_pos::BytePos;
 /// If debuginfo is disabled, the returned vector is empty.
 pub fn create_mir_scopes(
     cx: &CodegenCx<'ll, '_>,
-    mir: &Mir<'_>,
+    mir: &Body<'_>,
     debug_context: &FunctionDebugContext<&'ll DISubprogram>,
 ) -> IndexVec<SourceScope, MirDebugScope<&'ll DIScope>> {
     let null_scope = MirDebugScope {
@@ -55,7 +55,7 @@ pub fn create_mir_scopes(
 }
 
 fn make_mir_scope(cx: &CodegenCx<'ll, '_>,
-                  mir: &Mir<'_>,
+                  mir: &Body<'_>,
                   has_variables: &BitSet<SourceScope>,
                   debug_context: &FunctionDebugContextData<&'ll DISubprogram>,
                   scope: SourceScope,
diff --git a/src/librustc_codegen_llvm/debuginfo/mod.rs b/src/librustc_codegen_llvm/debuginfo/mod.rs
index 527290392ff..6fa594d4453 100644
--- a/src/librustc_codegen_llvm/debuginfo/mod.rs
+++ b/src/librustc_codegen_llvm/debuginfo/mod.rs
@@ -239,7 +239,7 @@ impl DebugInfoMethods<'tcx> for CodegenCx<'ll, 'tcx> {
         instance: Instance<'tcx>,
         sig: ty::FnSig<'tcx>,
         llfn: &'ll Value,
-        mir: &mir::Mir<'_>,
+        mir: &mir::Body<'_>,
     ) -> FunctionDebugContext<&'ll DISubprogram> {
         if self.sess().opts.debuginfo == DebugInfo::None {
             return FunctionDebugContext::DebugInfoDisabled;
@@ -523,7 +523,7 @@ impl DebugInfoMethods<'tcx> for CodegenCx<'ll, 'tcx> {
 
     fn create_mir_scopes(
         &self,
-        mir: &mir::Mir<'_>,
+        mir: &mir::Body<'_>,
         debug_context: &mut FunctionDebugContext<&'ll DISubprogram>,
     ) -> IndexVec<mir::SourceScope, MirDebugScope<&'ll DIScope>> {
         create_scope_map::create_mir_scopes(self, mir, debug_context)