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authorbors <bors@rust-lang.org>2020-06-08 20:10:07 +0000
committerbors <bors@rust-lang.org>2020-06-08 20:10:07 +0000
commitfd4b177aabb9749dfb562c48e47379cea81dc277 (patch)
tree9fa5a5888e7b0c05aa9b798a43c471fd4e106a7f /src/libstd/sys
parentbc10b68e798477066d4b1ec4886a3b1cdc4feb7e (diff)
parentea48f2e4da5c6b120c337466e55b307a26c189b2 (diff)
downloadrust-fd4b177aabb9749dfb562c48e47379cea81dc277.tar.gz
rust-fd4b177aabb9749dfb562c48e47379cea81dc277.zip
Auto merge of #72655 - jethrogb:sgx-lvi-hardening, r=petrochenkov
Enable LVI hardening for x86_64-fortanix-unknown-sgx

This implements mitigations for the Load Value Injection vulnerability (CVE-2020-0551) for the `x86_64-fortanix-unknown-sgx` target by enabling new LLVM passes. More information about LVI and mitigations may be found at https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection.

This PR unconditionally enables the mitigations for `x86_64-fortanix-unknown-sgx` since there is no available hardware that doesn't require the mitigations. This may be reconsidered in the future.

* [x] This depends on https://github.com/rust-lang/compiler-builtins/pull/359/
Diffstat (limited to 'src/libstd/sys')
-rw-r--r--src/libstd/sys/sgx/abi/entry.S20
1 files changed, 15 insertions, 5 deletions
diff --git a/src/libstd/sys/sgx/abi/entry.S b/src/libstd/sys/sgx/abi/entry.S
index 1f06c9da3a9..2badfc973c9 100644
--- a/src/libstd/sys/sgx/abi/entry.S
+++ b/src/libstd/sys/sgx/abi/entry.S
@@ -324,7 +324,9 @@ usercall:
 /*  return */
     mov %rsi,%rax /*  RAX = return value */
     /* NOP: mov %rdx,%rdx */ /*  RDX = return value */
-    ret
+    pop %r11
+    lfence
+    jmp *%r11
 
 /*
 The following functions need to be defined externally:
@@ -343,20 +345,28 @@ extern "C" fn entry(p1: u64, p2: u64, p3: u64, secondary: bool, p4: u64, p5: u64
 .global get_tcs_addr
 get_tcs_addr:
     mov %gs:tcsls_tcs_addr,%rax
-    ret
+    pop %r11
+    lfence
+    jmp *%r11
 
 .global get_tls_ptr
 get_tls_ptr:
     mov %gs:tcsls_tls_ptr,%rax
-    ret
+    pop %r11
+    lfence
+    jmp *%r11
 
 .global set_tls_ptr
 set_tls_ptr:
     mov %rdi,%gs:tcsls_tls_ptr
-    ret
+    pop %r11
+    lfence
+    jmp *%r11
 
 .global take_debug_panic_buf_ptr
 take_debug_panic_buf_ptr:
     xor %rax,%rax
     xchg %gs:tcsls_debug_panic_buf_ptr,%rax
-    ret
+    pop %r11
+    lfence
+    jmp *%r11