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| author | bors <bors@rust-lang.org> | 2022-07-05 17:46:53 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2022-07-05 17:46:53 +0000 |
| commit | 41ad4d9b2dbb895666337d162eda52619a6056db (patch) | |
| tree | bbe8e06be0e99de6988b7b2e3a38cbdcd9bfdf55 /src/test/codegen | |
| parent | efb171e2350de2bec6dd1f035b99bc00535c1c15 (diff) | |
| parent | 720eb123af7badab651fda19dbbfb4716f56b6de (diff) | |
| download | rust-41ad4d9b2dbb895666337d162eda52619a6056db.tar.gz rust-41ad4d9b2dbb895666337d162eda52619a6056db.zip | |
Auto merge of #98936 - matthiaskrgr:rollup-dvr0ucm, r=matthiaskrgr
Rollup of 6 pull requests Successful merges: - #98860 (adjust dangling-int-ptr error message) - #98888 (interpret: fix CheckedBinOp behavior when overflow checking is disabled) - #98889 (Add regression test for #79467) - #98895 (bootstrap.py: Always use `.exe` for Windows) - #98920 (adapt issue-37945 codegen test to accept any order of ops) - #98921 (Refactor: remove a redundant mutable variable) Failed merges: r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'src/test/codegen')
| -rw-r--r-- | src/test/codegen/issue-37945.rs | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/test/codegen/issue-37945.rs b/src/test/codegen/issue-37945.rs index 4234c26b5e8..12fa1e9e56b 100644 --- a/src/test/codegen/issue-37945.rs +++ b/src/test/codegen/issue-37945.rs @@ -17,7 +17,9 @@ pub fn is_empty_1(xs: Iter<f32>) -> bool { // CHECK-NEXT: start: // CHECK-NEXT: [[A:%.*]] = icmp ne {{i32\*|ptr}} %xs.1, null // CHECK-NEXT: tail call void @llvm.assume(i1 [[A]]) -// CHECK-NEXT: [[B:%.*]] = icmp eq {{i32\*|ptr}} %xs.1, %xs.0 +// The order between %xs.0 and %xs.1 on the next line doesn't matter +// and different LLVM versions produce different order. +// CHECK-NEXT: [[B:%.*]] = icmp eq {{i32\*|ptr}} {{%xs.0, %xs.1|%xs.1, %xs.0}} // CHECK-NEXT: ret i1 [[B:%.*]] {xs}.next().is_none() } @@ -28,7 +30,9 @@ pub fn is_empty_2(xs: Iter<f32>) -> bool { // CHECK-NEXT: start: // CHECK-NEXT: [[C:%.*]] = icmp ne {{i32\*|ptr}} %xs.1, null // CHECK-NEXT: tail call void @llvm.assume(i1 [[C]]) -// CHECK-NEXT: [[D:%.*]] = icmp eq {{i32\*|ptr}} %xs.1, %xs.0 +// The order between %xs.0 and %xs.1 on the next line doesn't matter +// and different LLVM versions produce different order. +// CHECK-NEXT: [[D:%.*]] = icmp eq {{i32\*|ptr}} {{%xs.0, %xs.1|%xs.1, %xs.0}} // CHECK-NEXT: ret i1 [[D:%.*]] xs.map(|&x| x).next().is_none() } |