Auto merge of #87570 - nikic:llvm-13, r=nagisa

Upgrade to LLVM 13

Work in progress update to LLVM 13. Main changes:

 * InlineAsm diagnostics reported using SrcMgr diagnostic kind are now handled. Previously these used a separate diag handler.
 * Codegen tests are updated for additional attributes.
 * Some data layouts have changed.
 * Switch `#[used]` attribute from `llvm.used` to `llvm.compiler.used` to avoid SHF_GNU_RETAIN flag introduced in https://reviews.llvm.org/D97448, which appears to trigger a bug in older versions of gold.
 * Set `LLVM_INCLUDE_TESTS=OFF` to avoid Python 3.6 requirement.

Upstream issues:

 * ~~https://bugs.llvm.org/show_bug.cgi?id=51210 (InlineAsm diagnostic reporting for module asm)~~ Fixed by https://github.com/llvm/llvm-project/commit/1558bb80c01b695ce12642527cbfccf16cf54ece.
 * ~~https://bugs.llvm.org/show_bug.cgi?id=51476 (Miscompile on AArch64 due to incorrect comparison elimination)~~ Fixed by https://github.com/llvm/llvm-project/commit/81b106584f2baf33e09be2362c35c1bf2f6bfe94.
 * https://bugs.llvm.org/show_bug.cgi?id=51207 (Can't set custom section flags anymore). Problematic change reverted in our fork, https://reviews.llvm.org/D107216 posted for upstream revert.
 * https://bugs.llvm.org/show_bug.cgi?id=51211 (Regression in codegen for #83623). This is an optimization regression that we may likely have to eat for this release. The fix for #83623 was based on an incorrect premise, and this needs to be properly addressed in the MergeICmps pass.

The [compile-time impact](https://perf.rust-lang.org/compare.html?start=ef9549b6c0efb7525c9b012148689c8d070f9bc0&end=0983094463497eec22d550dad25576a894687002) is mixed, but quite positive as LLVM upgrades go.

The LLVM 13 final release is scheduled for Sep 21st. The current nightly is scheduled for stable release on Oct 21st.

r? `@ghost`

3 files changed, 3 insertions, 49 deletions

diff --git a/src/test/codegen/array-equality.rs b/src/test/codegen/array-equality.rs
index 4b60fa4b0bf..fefc232b490 100644
--- a/src/test/codegen/array-equality.rs
+++ b/src/test/codegen/array-equality.rs
@@ -29,7 +29,7 @@ pub fn array_eq_value_still_passed_by_pointer(a: [u16; 9], b: [u16; 9]) -> bool
     // CHECK-NEXT: start:
     // CHECK-NEXT: bitcast
     // CHECK-NEXT: bitcast
-    // CHECK-NEXT: %[[CMP:.+]] = tail call i32 @{{bcmp|memcmp}}(i8* nonnull dereferenceable(18) %{{.+}}, i8* nonnull dereferenceable(18) %{{.+}}, i64 18)
+    // CHECK-NEXT: %[[CMP:.+]] = tail call i32 @{{bcmp|memcmp}}(i8* {{.*}} dereferenceable(18) %{{.+}}, i8* {{.*}} dereferenceable(18) %{{.+}}, i64 18)
     // CHECK-NEXT: %[[EQ:.+]] = icmp eq i32 %[[CMP]], 0
     // CHECK-NEXT: ret i1 %[[EQ]]
     a == b
@@ -41,7 +41,7 @@ pub fn array_eq_long(a: &[u16; 1234], b: &[u16; 1234]) -> bool {
     // CHECK-NEXT: start:
     // CHECK-NEXT: bitcast
     // CHECK-NEXT: bitcast
-    // CHECK-NEXT: %[[CMP:.+]] = tail call i32 @{{bcmp|memcmp}}(i8* nonnull dereferenceable(2468) %{{.+}}, i8* nonnull dereferenceable(2468) %{{.+}}, i64 2468)
+    // CHECK-NEXT: %[[CMP:.+]] = tail call i32 @{{bcmp|memcmp}}(i8* {{.*}} dereferenceable(2468) %{{.+}}, i8* {{.*}} dereferenceable(2468) %{{.+}}, i64 2468)
     // CHECK-NEXT: %[[EQ:.+]] = icmp eq i32 %[[CMP]], 0
     // CHECK-NEXT: ret i1 %[[EQ]]
     a == b
diff --git a/src/test/codegen/issue-83623-SIMD-PartialEq.rs b/src/test/codegen/issue-83623-SIMD-PartialEq.rs
deleted file mode 100644
index b22b7f52402..00000000000
--- a/src/test/codegen/issue-83623-SIMD-PartialEq.rs
+++ /dev/null
@@ -1,46 +0,0 @@
-// This test checks that jumps generated by logical operators can be optimized away
-
-// compile-flags: -Copt-level=3
-// only-64bit
-
-#![crate_type="lib"]
-
-pub struct Blueprint {
-    pub fuel_tank_size: u32,
-    pub payload: u32,
-    pub wheel_diameter: u32,
-    pub wheel_width: u32,
-    pub storage: u32,
-}
-
-// && chains should not prevent SIMD optimizations for primitives
-impl PartialEq for Blueprint{
-    fn eq(&self, other: &Self)->bool{
-       // CHECK-NOT: call{{.*}}bcmp
-       // CHECK-NOT: call{{.*}}memcmp
-       // CHECK-NOT: br {{.*}}
-       self.fuel_tank_size == other.fuel_tank_size
-            && self.payload == other.payload
-            && self.wheel_diameter == other.wheel_diameter
-            && self.wheel_width == other.wheel_width
-            && self.storage == other.storage
-    }
-}
-
-#[derive(PartialEq)]
-pub struct Blueprint2 {
-    pub fuel_tank_size: u32,
-    pub payload: u32,
-    pub wheel_diameter: u32,
-    pub wheel_width: u32,
-    pub storage: u32,
-}
-
-// Derived PartialEq should not generate jumps and should use SIMD
-#[no_mangle]
-pub fn partial_eq_should_not_jump(a: &Blueprint2, b:&Blueprint2)->bool{
-    // CHECK-NOT: call{{.*}}bcmp
-    // CHECK-NOT: call{{.*}}memcmp
-    // CHECK-NOT: br {{.*}}
-    a==b
-}
diff --git a/src/test/codegen/repeat-trusted-len.rs b/src/test/codegen/repeat-trusted-len.rs
index 9e904fc82ab..cb2d0ef809a 100644
--- a/src/test/codegen/repeat-trusted-len.rs
+++ b/src/test/codegen/repeat-trusted-len.rs
@@ -8,6 +8,6 @@ use std::iter;
 // CHECK-LABEL: @repeat_take_collect
 #[no_mangle]
 pub fn repeat_take_collect() -> Vec<u8> {
-// CHECK: call void @llvm.memset.p0i8.i{{[0-9]+}}(i8* {{(nonnull )?}}align 1{{.*}} %{{[0-9]+}}, i8 42, i{{[0-9]+}} 100000, i1 false)
+// CHECK: call void @llvm.memset.p0i8.i{{[0-9]+}}(i8* {{.*}}align 1{{.*}} %{{[0-9]+}}, i8 42, i{{[0-9]+}} 100000, i1 false)
     iter::repeat(42).take(100000).collect()
 }