about summary refs log tree commit diff
path: root/src/test/run-pass/thinlto
diff options
context:
space:
mode:
authorbors <bors@rust-lang.org>2016-10-04 08:29:41 -0700
committerGitHub <noreply@github.com>2016-10-04 08:29:41 -0700
commita5dac7a2af3ee444817eb7bfbba3539be8c06cf1 (patch)
treeb6505ae6342fe65dc6f9ab2778572419e41eb7e2 /src/test/run-pass/thinlto
parent4a9af010ebc728bc4798b1ba30de0322c1f0138a (diff)
parent6136069609f40e2436d810d4a35433d42266fadc (diff)
downloadrust-a5dac7a2af3ee444817eb7bfbba3539be8c06cf1.tar.gz
rust-a5dac7a2af3ee444817eb7bfbba3539be8c06cf1.zip
Auto merge of #36874 - japaric:thumbs, r=alexcrichton
add Thumbs to the compiler

this commit adds 4 new target definitions to the compiler for easier
cross compilation to ARM Cortex-M devices.

- `thumbv6m-none-eabi`
  - For the Cortex-M0, Cortex-M0+ and Cortex-M1
  - This architecture doesn't have hardware support (instructions) for
    atomics. Hence, the `Atomic*` structs are not available for this
    target.
- `thumbv7m-none-eabi`
  - For the Cortex-M3
- `thumbv7em-none-eabi`
  - For the FPU-less variants of the Cortex-M4 and Cortex-M7
  - On this target, all the floating point operations will be lowered
    software routines (intrinsics)
- `thumbv7em-none-eabihf`
  - For the variants of the Cortex-M4 and Cortex-M7 that do have a FPU.
  - On this target, all the floating point operations will be lowered
    to hardware instructions

No binary releases of standard crates, like `core`, are planned for
these targets because Cargo, in the future, will compile e.g. the `core`
crate on the fly as part of the `cargo build` process. In the meantime,
you'll have to compile the `core` crate yourself. [Xargo] is the easiest
way to do that as in handles the compilation of `core` automatically and
can be used just like Cargo: `xargo build --target thumbv6m-none-eabi`
is all that's needed.

[Xargo]: https://crates.io/crates/xargo

---

cc @brson @alexcrichton
Diffstat (limited to 'src/test/run-pass/thinlto')
0 files changed, 0 insertions, 0 deletions