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authorbors <bors@rust-lang.org>2016-12-06 07:35:21 +0000
committerbors <bors@rust-lang.org>2016-12-06 07:35:21 +0000
commitff261d3a6b5964e1e3744d055238de624afc5d76 (patch)
tree9560fef7b90152ce605f9c215e53ef94b9088b43 /src/test/run-pass/thinlto
parentf7c93c07b8533e1d38395cc2d9d37cd2d9bec978 (diff)
parent296ec5f9b7bf5aec05ed6672d3499079d35e4594 (diff)
downloadrust-ff261d3a6b5964e1e3744d055238de624afc5d76.tar.gz
rust-ff261d3a6b5964e1e3744d055238de624afc5d76.zip
Auto merge of #38097 - Mark-Simulacrum:fn-sig-slice, r=eddyb
Refactor ty::FnSig to contain a &'tcx Slice<Ty<'tcx>>

We refactor this in order to achieve the following wins:

 - Decrease the size of `FnSig` (`Vec` + `bool`: 32, `&Slice` + `bool`: 24).
 - Potentially decrease total allocated memory due to arena-allocating `FnSig` inputs/output; since they are allocated in the type list arena, other users of type lists can reuse the same allocation for an equivalent type list.
 - Remove the last part of the type system which needs drop glue (#37965 removed the other remaining part). This makes arenas containing `FnSig` faster to drop (since we don't need to drop a Vec for each one), and makes reusing them without clearing/dropping potentially possible.

r? @eddyb
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