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| author | Mazdak Farrokhzad <twingoow@gmail.com> | 2019-04-23 21:51:00 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-04-23 21:51:00 +0200 |
| commit | 0353fa5b90d74520052158d27578ed41fcc229e4 (patch) | |
| tree | 4c16f95720b55ef5c1e387e81cae2c010a3427b3 /src/test/ui/thinlto | |
| parent | b16556efa06ac5705d91d026e947dd2052659147 (diff) | |
| parent | 2d401fb4dc89eaef5b8f31330636094f9c26b4c4 (diff) | |
| download | rust-0353fa5b90d74520052158d27578ed41fcc229e4.tar.gz rust-0353fa5b90d74520052158d27578ed41fcc229e4.zip | |
Rollup merge of #60191 - gnzlbg:f16c, r=alexcrichton
Add f16c target_feature This is requires for Intel 16-bit half-precision float intrinsics: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=fp16&expand=1769 - see companion stdsimd PR: https://github.com/rust-lang-nursery/stdsimd/pull/737. LLVM, Wikipedia CPUID page, and the Intel Dev Manual all call this CPUID feature "F16C", but the Intel intrinsics guide calls this "FP16C" - this is probably a bug in the intrinsics guide which we are tracking here: https://github.com/rust-lang-nursery/stdsimd/issues/738 r? @alexcrichton
Diffstat (limited to 'src/test/ui/thinlto')
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