Auto merge of #26025 - alexcrichton:update-llvm, r=brson

This commit updates the LLVM submodule in use to the current HEAD of the LLVM
repository. This is primarily being done to start picking up unwinding support
for MSVC, which is currently unimplemented in the revision of LLVM we are using.
Along the way a few changes had to be made:

* As usual, lots of C++ debuginfo bindings in LLVM changed, so there were some
  significant changes to our RustWrapper.cpp
* As usual, some pass management changed in LLVM, so clang was re-scrutinized to
  ensure that we're doing the same thing as clang.
* Some optimization options are now passed directly into the
  `PassManagerBuilder` instead of through CLI switches to LLVM.
* The `NoFramePointerElim` option was removed from LLVM, favoring instead the
  `no-frame-pointer-elim` function attribute instead.
* The `LoopVectorize` option of the LLVM optimization passes has been disabled
  as it causes a divide-by-zero exception to happen in LLVM for zero-sized
  types. This is reported as https://llvm.org/bugs/show_bug.cgi?id=23763

Additionally, LLVM has picked up some new optimizations which required fixing an
existing soundness hole in the IR we generate. It appears that the current LLVM
we use does not expose this hole. When an enum is moved, the previous slot in
memory is overwritten with a bit pattern corresponding to "dropped". When the
drop glue for this slot is run, however, the switch on the discriminant can
often start executing the `unreachable` block of the switch due to the
discriminant now being outside the normal range. This was patched over locally
for now by having the `unreachable` block just change to a `ret void`.

4 files changed, 8 insertions, 9 deletions

diff --git a/src/test/auxiliary/llvm_pass_plugin.rs b/src/test/auxiliary/llvm_pass_plugin.rs
index d61f47fd7ef..bacc1acd3c4 100644
--- a/src/test/auxiliary/llvm_pass_plugin.rs
+++ b/src/test/auxiliary/llvm_pass_plugin.rs
@@ -24,5 +24,5 @@ pub fn plugin_registrar(reg: &mut Registry) {
     // Normally, we would name a pass that was registered through
     // C++ static object constructors in the same .so file as the
     // plugin registrar.
-    reg.register_llvm_pass("inline");
+    reg.register_llvm_pass("gvn");
 }
diff --git a/src/test/codegen/loads.rs b/src/test/codegen/loads.rs
index 20a55740bb7..45b8731c3b1 100644
--- a/src/test/codegen/loads.rs
+++ b/src/test/codegen/loads.rs
@@ -20,14 +20,14 @@ pub struct Bytes {
 // CHECK-LABEL: @borrow
 #[no_mangle]
 pub fn borrow(x: &i32) -> &i32 {
-// CHECK: load i32** %x{{.*}}, !nonnull
+// CHECK: load i32*, i32** %x{{.*}}, !nonnull
     x
 }
 
 // CHECK-LABEL: @_box
 #[no_mangle]
 pub fn _box(x: Box<i32>) -> i32 {
-// CHECK: load i32** %x{{.*}}, !nonnull
+// CHECK: load i32*, i32** %x{{.*}}, !nonnull
     *x
 }
 
@@ -36,7 +36,7 @@ pub fn _box(x: Box<i32>) -> i32 {
 // dependent alignment
 #[no_mangle]
 pub fn small_array_alignment(x: [i8; 4]) -> [i8; 4] {
-// CHECK: [[VAR:%[0-9]+]] = load i32* %{{.*}}, align 1
+// CHECK: [[VAR:%[0-9]+]] = load i32, i32* %{{.*}}, align 1
 // CHECK: ret i32 [[VAR]]
     x
 }
@@ -46,7 +46,7 @@ pub fn small_array_alignment(x: [i8; 4]) -> [i8; 4] {
 // dependent alignment
 #[no_mangle]
 pub fn small_struct_alignment(x: Bytes) -> Bytes {
-// CHECK: [[VAR:%[0-9]+]] = load i32* %{{.*}}, align 1
+// CHECK: [[VAR:%[0-9]+]] = load i32, i32* %{{.*}}, align 1
 // CHECK: ret i32 [[VAR]]
     x
 }
diff --git a/src/test/codegen/stores.rs b/src/test/codegen/stores.rs
index 32337b085cd..15cf76b2ab1 100644
--- a/src/test/codegen/stores.rs
+++ b/src/test/codegen/stores.rs
@@ -22,7 +22,7 @@ pub struct Bytes {
 // dependent alignment
 #[no_mangle]
 pub fn small_array_alignment(x: &mut [i8; 4]) {
-// CHECK: [[VAR:%[0-9]+]] = load [4 x i8]** %x
+// CHECK: [[VAR:%[0-9]+]] = load [4 x i8]*, [4 x i8]** %x
 // CHECK: [[VAR2:%[0-9]+]] = bitcast [4 x i8]* [[VAR]] to i32*
 // CHECK: store i32 %{{.*}}, i32* [[VAR2]], align 1
     *x = [0; 4];
@@ -33,7 +33,7 @@ pub fn small_array_alignment(x: &mut [i8; 4]) {
 // dependent alignment
 #[no_mangle]
 pub fn small_struct_alignment(x: &mut Bytes) {
-// CHECK: [[VAR:%[0-9]+]] = load %Bytes** %x
+// CHECK: [[VAR:%[0-9]+]] = load %Bytes*, %Bytes** %x
 // CHECK: [[VAR2:%[0-9]+]] = bitcast %Bytes* [[VAR]] to i32*
 // CHECK: store i32 %{{.*}}, i32* [[VAR2]], align 1
     *x = Bytes {
diff --git a/src/test/run-pass/asm-in-out-operand.rs b/src/test/run-pass/asm-in-out-operand.rs
index 3eebc7acb0f..243ecf86e9c 100644
--- a/src/test/run-pass/asm-in-out-operand.rs
+++ b/src/test/run-pass/asm-in-out-operand.rs
@@ -8,14 +8,13 @@
 // option. This file may not be copied, modified, or distributed
 // except according to those terms.
 
-
 #![feature(asm)]
 
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 unsafe fn next_power_of_2(n: u32) -> u32 {
     let mut tmp = n;
     asm!("dec $0" : "+rm"(tmp) :: "cc");
-    let mut shift = 1_usize;
+    let mut shift = 1_u32;
     while shift <= 16 {
         asm!(
             "shr %cl, $2