#[cfg(target_has_atomic_cas)] -> #[cfg(target_has_atomic = "cas")]

8 files changed, 34 insertions, 33 deletions

diff --git a/src/liballoc/lib.rs b/src/liballoc/lib.rs
index 66bf8de1993..35bf8d1b792 100644
--- a/src/liballoc/lib.rs
+++ b/src/liballoc/lib.rs
@@ -86,7 +86,6 @@
 #![feature(box_patterns)]
 #![feature(box_syntax)]
 #![feature(cfg_target_has_atomic)]
-#![cfg_attr(not(stage0), feature(cfg_target_has_atomic_cas))]
 #![feature(coerce_unsized)]
 #![feature(collections_range)]
 #![feature(const_fn)]
@@ -163,8 +162,10 @@ mod boxed {
 #[cfg(test)]
 mod boxed_test;
 pub mod collections;
-#[cfg_attr(stage0, cfg(target_has_atomic = "ptr"))]
-#[cfg_attr(not(stage0), cfg(all(target_has_atomic = "ptr", target_has_atomic_cas)))]
+#[cfg(any(
+    all(stage0, target_has_atomic = "ptr"),
+    all(not(stage0), target_has_atomic = "ptr", target_has_atomic = "cas")
+))]
 pub mod sync;
 pub mod rc;
 pub mod raw_vec;
diff --git a/src/liballoc/task.rs b/src/liballoc/task.rs
index c8e3e770ed2..9792d52dd66 100644
--- a/src/liballoc/task.rs
+++ b/src/liballoc/task.rs
@@ -12,12 +12,16 @@
 
 pub use core::task::*;
 
-#[cfg_attr(stage0, cfg(target_has_atomic = "ptr"))]
-#[cfg_attr(not(stage0), cfg(all(target_has_atomic = "ptr", target_has_atomic_cas)))]
+#[cfg(any(
+    all(stage0, target_has_atomic = "ptr"),
+    all(not(stage0), target_has_atomic = "ptr", target_has_atomic = "cas")
+))]
 pub use self::if_arc::*;
 
-#[cfg_attr(stage0, cfg(target_has_atomic = "ptr"))]
-#[cfg_attr(not(stage0), cfg(all(target_has_atomic = "ptr", target_has_atomic_cas)))]
+#[cfg(any(
+    all(stage0, target_has_atomic = "ptr"),
+    all(not(stage0), target_has_atomic = "ptr", target_has_atomic = "cas")
+))]
 mod if_arc {
     use super::*;
     use core::marker::PhantomData;
@@ -49,8 +53,10 @@ mod if_arc {
         }
     }
 
-    #[cfg_attr(stage0, cfg(target_has_atomic = "ptr"))]
-    #[cfg_attr(not(stage0), cfg(all(target_has_atomic = "ptr", target_has_atomic_cas)))]
+    #[cfg(any(
+        all(stage0, target_has_atomic = "ptr"),
+        all(not(stage0), target_has_atomic = "ptr", target_has_atomic = "cas")
+    ))]
     struct ArcWrapped<T>(PhantomData<T>);
 
     unsafe impl<T: Wake + 'static> UnsafeWake for ArcWrapped<T> {
diff --git a/src/libcore/lib.rs b/src/libcore/lib.rs
index fe328bdd107..b2b38820a89 100644
--- a/src/libcore/lib.rs
+++ b/src/libcore/lib.rs
@@ -79,7 +79,6 @@
 #![feature(associated_type_defaults)]
 #![feature(attr_literals)]
 #![feature(cfg_target_has_atomic)]
-#![cfg_attr(not(stage0), feature(cfg_target_has_atomic_cas))]
 #![feature(concat_idents)]
 #![feature(const_fn)]
 #![feature(const_int_ops)]
diff --git a/src/libcore/sync/atomic.rs b/src/libcore/sync/atomic.rs
index 647bf4fb40a..e9d1fb89115 100644
--- a/src/libcore/sync/atomic.rs
+++ b/src/libcore/sync/atomic.rs
@@ -371,7 +371,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn swap(&self, val: bool, order: Ordering) -> bool {
         unsafe { atomic_swap(self.v.get(), val as u8, order) != 0 }
     }
@@ -402,7 +402,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn compare_and_swap(&self, current: bool, new: bool, order: Ordering) -> bool {
         match self.compare_exchange(current, new, order, strongest_failure_ordering(order)) {
             Ok(x) => x,
@@ -448,7 +448,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "extended_compare_and_swap", since = "1.10.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn compare_exchange(&self,
                             current: bool,
                             new: bool,
@@ -540,7 +540,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn fetch_and(&self, val: bool, order: Ordering) -> bool {
         unsafe { atomic_and(self.v.get(), val as u8, order) != 0 }
     }
@@ -572,7 +572,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn fetch_nand(&self, val: bool, order: Ordering) -> bool {
         // We can't use atomic_nand here because it can result in a bool with
         // an invalid value. This happens because the atomic operation is done
@@ -615,7 +615,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn fetch_or(&self, val: bool, order: Ordering) -> bool {
         unsafe { atomic_or(self.v.get(), val as u8, order) != 0 }
     }
@@ -646,7 +646,7 @@ impl AtomicBool {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn fetch_xor(&self, val: bool, order: Ordering) -> bool {
         unsafe { atomic_xor(self.v.get(), val as u8, order) != 0 }
     }
@@ -793,7 +793,7 @@ impl<T> AtomicPtr<T> {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn swap(&self, ptr: *mut T, order: Ordering) -> *mut T {
         unsafe { atomic_swap(self.p.get() as *mut usize, ptr as usize, order) as *mut T }
     }
@@ -823,7 +823,7 @@ impl<T> AtomicPtr<T> {
     /// ```
     #[inline]
     #[stable(feature = "rust1", since = "1.0.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn compare_and_swap(&self, current: *mut T, new: *mut T, order: Ordering) -> *mut T {
         match self.compare_exchange(current, new, order, strongest_failure_ordering(order)) {
             Ok(x) => x,
@@ -862,7 +862,7 @@ impl<T> AtomicPtr<T> {
     /// ```
     #[inline]
     #[stable(feature = "extended_compare_and_swap", since = "1.10.0")]
-    #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+    #[cfg(any(stage0, target_has_atomic = "cas"))]
     pub fn compare_exchange(&self,
                             current: *mut T,
                             new: *mut T,
@@ -1148,7 +1148,7 @@ assert_eq!(some_var.swap(10, Ordering::Relaxed), 5);
 ```"),
                 #[inline]
                 #[$stable]
-                #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+                #[cfg(any(stage0, target_has_atomic = "cas"))]
                 pub fn swap(&self, val: $int_type, order: Ordering) -> $int_type {
                     unsafe { atomic_swap(self.v.get(), val, order) }
                 }
@@ -1181,7 +1181,7 @@ assert_eq!(some_var.load(Ordering::Relaxed), 10);
 ```"),
                 #[inline]
                 #[$stable]
-                #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+                #[cfg(any(stage0, target_has_atomic = "cas"))]
                 pub fn compare_and_swap(&self,
                                         current: $int_type,
                                         new: $int_type,
@@ -1235,7 +1235,7 @@ assert_eq!(some_var.load(Ordering::Relaxed), 10);
 ```"),
                 #[inline]
                 #[$stable_cxchg]
-                #[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+                #[cfg(any(stage0, target_has_atomic = "cas"))]
                 pub fn compare_exchange(&self,
                                         current: $int_type,
                                         new: $int_type,
@@ -1690,7 +1690,7 @@ atomic_int!{
 }
 
 #[inline]
-#[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+#[cfg(any(stage0, target_has_atomic = "cas"))]
 fn strongest_failure_ordering(order: Ordering) -> Ordering {
     match order {
         Release => Relaxed,
@@ -1727,7 +1727,7 @@ unsafe fn atomic_load<T>(dst: *const T, order: Ordering) -> T {
 }
 
 #[inline]
-#[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+#[cfg(any(stage0, target_has_atomic = "cas"))]
 unsafe fn atomic_swap<T>(dst: *mut T, val: T, order: Ordering) -> T {
     match order {
         Acquire => intrinsics::atomic_xchg_acq(dst, val),
@@ -1766,7 +1766,7 @@ unsafe fn atomic_sub<T>(dst: *mut T, val: T, order: Ordering) -> T {
 }
 
 #[inline]
-#[cfg_attr(not(stage0), cfg(target_has_atomic_cas))]
+#[cfg(any(stage0, target_has_atomic = "cas"))]
 unsafe fn atomic_compare_exchange<T>(dst: *mut T,
                                      old: T,
                                      new: T,
diff --git a/src/librustc/session/config.rs b/src/librustc/session/config.rs
index 93bfe1fc638..342799d41bb 100644
--- a/src/librustc/session/config.rs
+++ b/src/librustc/session/config.rs
@@ -1408,7 +1408,7 @@ pub fn default_configuration(sess: &Session) -> ast::CrateConfig {
         }
     }
     if atomic_cas {
-        ret.insert((Symbol::intern("target_has_atomic_cas"), None));
+        ret.insert((Symbol::intern("target_has_atomic"), Some(Symbol::intern("cas"))));
     }
     if sess.opts.debug_assertions {
         ret.insert((Symbol::intern("debug_assertions"), None));
diff --git a/src/librustc_target/spec/msp430_none_elf.rs b/src/librustc_target/spec/msp430_none_elf.rs
index 291511dd429..3ac4c459c63 100644
--- a/src/librustc_target/spec/msp430_none_elf.rs
+++ b/src/librustc_target/spec/msp430_none_elf.rs
@@ -37,7 +37,6 @@ pub fn target() -> TargetResult {
             // There are no atomic CAS instructions available in the MSP430
             // instruction set
             max_atomic_width: Some(16),
-
             atomic_cas: false,
 
             // Because these devices have very little resources having an
diff --git a/src/librustc_target/spec/thumbv6m_none_eabi.rs b/src/librustc_target/spec/thumbv6m_none_eabi.rs
index 0c45178b47a..26812501814 100644
--- a/src/librustc_target/spec/thumbv6m_none_eabi.rs
+++ b/src/librustc_target/spec/thumbv6m_none_eabi.rs
@@ -29,7 +29,7 @@ pub fn target() -> TargetResult {
             // The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
             // with +strict-align.
             features: "+strict-align".to_string(),
-            // There are no atomic instructions available in the instruction set of the ARMv6-M
+            // There are no atomic CAS instructions available in the instruction set of the ARMv6-M
             // architecture
             atomic_cas: false,
             .. super::thumb_base::opts()
diff --git a/src/libsyntax/feature_gate.rs b/src/libsyntax/feature_gate.rs
index 59418f8bf2a..2ae0e669fd0 100644
--- a/src/libsyntax/feature_gate.rs
+++ b/src/libsyntax/feature_gate.rs
@@ -479,9 +479,6 @@ declare_features! (
 
     // Allows async and await syntax
     (active, async_await, "1.28.0", Some(50547), None),
-
-    // Allows async and await syntax
-    (active, cfg_target_has_atomic_cas, "1.28.0", Some(0), None),
 );
 
 declare_features! (
@@ -1102,7 +1099,6 @@ const GATED_CFGS: &[(&str, &str, fn(&Features) -> bool)] = &[
     ("target_vendor", "cfg_target_vendor", cfg_fn!(cfg_target_vendor)),
     ("target_thread_local", "cfg_target_thread_local", cfg_fn!(cfg_target_thread_local)),
     ("target_has_atomic", "cfg_target_has_atomic", cfg_fn!(cfg_target_has_atomic)),
-    ("target_has_atomic_cas", "cfg_target_has_atomic_cas", cfg_fn!(cfg_target_has_atomic_cas)),
 ];
 
 #[derive(Debug, Eq, PartialEq)]