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authorbjorn3 <bjorn3@users.noreply.github.com>2020-08-15 20:55:03 +0200
committerbjorn3 <bjorn3@users.noreply.github.com>2020-08-15 20:55:03 +0200
commit3d46a30469c4156fefb7ef046953ea19c4d6a2f2 (patch)
tree6d7e828e4cd31e4c8cd9333adf82923f59789db4 /src
parentc1a68b1386c26b92f2c6126bee8cc808f4ff93a5 (diff)
downloadrust-3d46a30469c4156fefb7ef046953ea19c4d6a2f2.tar.gz
rust-3d46a30469c4156fefb7ef046953ea19c4d6a2f2.zip
Fix ppv-lite86 with simd enabled
This fixes older rand versions that enable the simd feature of ppv-lite86
Diffstat (limited to 'src')
-rw-r--r--src/intrinsics/llvm.rs25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/intrinsics/llvm.rs b/src/intrinsics/llvm.rs
index b99a3dffa11..c85daaa0e2e 100644
--- a/src/intrinsics/llvm.rs
+++ b/src/intrinsics/llvm.rs
@@ -94,6 +94,31 @@ pub(crate) fn codegen_llvm_intrinsic_call<'tcx>(
                 bool_to_zero_or_max_uint(fx, res_lane_layout, res_lane)
             });
         };
+        llvm.x86.sse2.psrli.d, (c a, o imm8) {
+            let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8).expect("llvm.x86.sse2.psrli.d imm8 not const");
+            simd_for_each_lane(fx, a, ret, |fx, _lane_layout, res_lane_layout, lane| {
+                let res_lane = match imm8.val.try_to_bits(Size::from_bytes(4)).expect(&format!("imm8 not scalar: {:?}", imm8)) {
+                    imm8 if imm8 < 32 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
+                    _ => fx.bcx.ins().iconst(types::I32, 0),
+                };
+                CValue::by_val(res_lane, res_lane_layout)
+            });
+        };
+        llvm.x86.sse2.pslli.d, (c a, o imm8) {
+            let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8).expect("llvm.x86.sse2.psrli.d imm8 not const");
+            simd_for_each_lane(fx, a, ret, |fx, _lane_layout, res_lane_layout, lane| {
+                let res_lane = match imm8.val.try_to_bits(Size::from_bytes(4)).expect(&format!("imm8 not scalar: {:?}", imm8)) {
+                    imm8 if imm8 < 32 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
+                    _ => fx.bcx.ins().iconst(types::I32, 0),
+                };
+                CValue::by_val(res_lane, res_lane_layout)
+            });
+        };
+        llvm.x86.sse2.storeu.dq, (v mem_addr, c a) {
+            // FIXME correctly handle the unalignment
+            let dest = CPlace::for_ptr(Pointer::new(mem_addr), a.layout());
+            dest.write_cvalue(fx, a);
+        };
     }
 
     if let Some((_, dest)) = destination {