diff options
| author | bors <bors@rust-lang.org> | 2024-03-24 09:04:01 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2024-03-24 09:04:01 +0000 |
| commit | 4a52e9cc2acf102da113d1b6c712afc5fcf4db13 (patch) | |
| tree | 9a03d8ea719bb6191d8b1efd0f2f067ae99e2d46 /src | |
| parent | 548e14b43963882fb758deb89e8258d9b8c2fc2a (diff) | |
| parent | c94d229337d89d828a061af5e58730667f6a3813 (diff) | |
Auto merge of #122980 - workingjubilee:rollup-r5i1rke, r=workingjubilee
Rollup of 7 pull requests Successful merges: - #120419 (Expand sys/os for UEFI) - #121940 (Mention Register Size in `#[warn(asm_sub_register)]`) - #122762 (fix typo of endianness) - #122797 (Fix compile of wasm64-unknown-unknown target) - #122875 (CFI: Support self_cell-like recursion) - #122879 (CFI: Strip auto traits off Virtual calls) - #122969 (Simplify an iterator search in borrowck diag) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'src')
| -rw-r--r-- | src/tools/miri/src/shims/intrinsics/simd.rs | 4 | ||||
| -rw-r--r-- | src/tools/miri/src/shims/unix/linux/fd/event.rs | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/tools/miri/src/shims/intrinsics/simd.rs b/src/tools/miri/src/shims/intrinsics/simd.rs index af98b38af8c..6973c0e9c35 100644 --- a/src/tools/miri/src/shims/intrinsics/simd.rs +++ b/src/tools/miri/src/shims/intrinsics/simd.rs @@ -457,7 +457,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let bitmask_len = u32::try_from(bitmask_len).unwrap(); // To read the mask, we transmute it to an integer. - // That does the right thing wrt endianess. + // That does the right thing wrt endianness. let mask_ty = this.machine.layouts.uint(mask.layout.size).unwrap(); let mask = mask.transmute(mask_ty, this)?; let mask: u64 = this.read_scalar(&mask)?.to_bits(mask_ty.size)?.try_into().unwrap(); @@ -509,7 +509,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { } } // We have to change the type of the place to be able to write `res` into it. This - // transmutes the integer to an array, which does the right thing wrt endianess. + // transmutes the integer to an array, which does the right thing wrt endianness. let dest = dest.transmute(this.machine.layouts.uint(dest.layout.size).unwrap(), this)?; this.write_int(res, &dest)?; diff --git a/src/tools/miri/src/shims/unix/linux/fd/event.rs b/src/tools/miri/src/shims/unix/linux/fd/event.rs index 1f17ffb88c8..49408fda3ae 100644 --- a/src/tools/miri/src/shims/unix/linux/fd/event.rs +++ b/src/tools/miri/src/shims/unix/linux/fd/event.rs @@ -38,7 +38,7 @@ impl FileDescriptor for Event { } /// A write call adds the 8-byte integer value supplied in - /// its buffer (in native endianess) to the counter. The maximum value that may be + /// its buffer (in native endianness) to the counter. The maximum value that may be /// stored in the counter is the largest unsigned 64-bit value /// minus 1 (i.e., 0xfffffffffffffffe). If the addition would /// cause the counter's value to exceed the maximum, then the @@ -57,7 +57,7 @@ impl FileDescriptor for Event { ) -> InterpResult<'tcx, io::Result<usize>> { let v1 = self.val.get(); let bytes: [u8; 8] = bytes.try_into().unwrap(); // FIXME fail gracefully when this has the wrong size - // Convert from target endianess to host endianess. + // Convert from target endianness to host endianness. let num = match tcx.sess.target.endian { Endian::Little => u64::from_le_bytes(bytes), Endian::Big => u64::from_be_bytes(bytes), |
