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authorkennytm <kennytm@gmail.com>2018-10-30 18:55:27 +0800
committerGitHub <noreply@github.com>2018-10-30 18:55:27 +0800
commit8c8581703e536ae584d6b46216e360fb587afb66 (patch)
tree927063ba76929940bfe2c0a97a8d6dd3035ebf64 /src
parent62f4316b01709865a6b5f94d68ec04a194b0264b (diff)
parentf67b4e07d861ae2c8317cbd644ec49a9d5720f80 (diff)
downloadrust-8c8581703e536ae584d6b46216e360fb587afb66.tar.gz
rust-8c8581703e536ae584d6b46216e360fb587afb66.zip
Rollup merge of #55450 - japaric:msp430, r=alexcrichton
msp430: remove the whole Atomic* API

PR #51953 enabled the Atomic*.{load,store} API on MSP430. Unfortunately,
the LLVM backend doesn't currently support those atomic operations, so this
commit removes the API and leaves instructions on how and when to enable it
in the future.

the second fixes compiling liballoc for msp430

closes #54511
r? @alexcrichton
cc @chernomor @awygle @cr1901 @pftbest
Diffstat (limited to 'src')
-rw-r--r--src/liballoc/collections/vec_deque.rs2
-rw-r--r--src/librustc_target/spec/msp430_none_elf.rs9
2 files changed, 9 insertions, 2 deletions
diff --git a/src/liballoc/collections/vec_deque.rs b/src/liballoc/collections/vec_deque.rs
index 571f35a2031..88e76033f27 100644
--- a/src/liballoc/collections/vec_deque.rs
+++ b/src/liballoc/collections/vec_deque.rs
@@ -36,6 +36,8 @@ use vec::Vec;
 
 const INITIAL_CAPACITY: usize = 7; // 2^3 - 1
 const MINIMUM_CAPACITY: usize = 1; // 2 - 1
+#[cfg(target_pointer_width = "16")]
+const MAXIMUM_ZST_CAPACITY: usize = 1 << (16 - 1); // Largest possible power of two
 #[cfg(target_pointer_width = "32")]
 const MAXIMUM_ZST_CAPACITY: usize = 1 << (32 - 1); // Largest possible power of two
 #[cfg(target_pointer_width = "64")]
diff --git a/src/librustc_target/spec/msp430_none_elf.rs b/src/librustc_target/spec/msp430_none_elf.rs
index 0958a958986..d9ab2384491 100644
--- a/src/librustc_target/spec/msp430_none_elf.rs
+++ b/src/librustc_target/spec/msp430_none_elf.rs
@@ -35,9 +35,14 @@ pub fn target() -> TargetResult {
             no_integrated_as: true,
 
             // There are no atomic CAS instructions available in the MSP430
-            // instruction set
-            max_atomic_width: Some(16),
+            // instruction set, and the LLVM backend doesn't currently support
+            // compiler fences so the Atomic* API is missing on this target.
+            // When the LLVM backend gains support for compile fences uncomment
+            // the `singlethread: true` line and set `max_atomic_width` to
+            // `Some(16)`.
+            max_atomic_width: Some(0),
             atomic_cas: false,
+            // singlethread: true,
 
             // Because these devices have very little resources having an
             // unwinder is too onerous so we default to "abort" because the