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authorMark Simulacrum <mark.simulacrum@gmail.com>2017-09-06 18:28:03 -0600
committerGitHub <noreply@github.com>2017-09-06 18:28:03 -0600
commitb0929aadadaf4cb46d5a7731cca63369f088728a (patch)
tree4e07703eed8b142ab021b011e13906c7b02bfb5c /src
parentae96d68605445947364e392f31bcc17225360e40 (diff)
parentc3041e8b9e2d2a21addb8afd346af293293f1d68 (diff)
Rollup merge of #44351 - lu-zero:master, r=nikomatsakis
More PowerPC Altivec intrinsics
Diffstat (limited to 'src')
-rw-r--r--src/etc/platform-intrinsics/powerpc.json63
-rw-r--r--src/librustc_platform_intrinsics/powerpc.rs60
2 files changed, 123 insertions, 0 deletions
diff --git a/src/etc/platform-intrinsics/powerpc.json b/src/etc/platform-intrinsics/powerpc.json
index d615037b632..62684381842 100644
--- a/src/etc/platform-intrinsics/powerpc.json
+++ b/src/etc/platform-intrinsics/powerpc.json
@@ -156,6 +156,69 @@
             "llvm": "vupkh{1.kind}{1.data_type_short}",
             "ret": "s(16-32)",
             "args": ["0N"]
+        },
+        {
+            "intrinsic": "madds",
+            "width": [128],
+            "llvm": "vmhaddshs",
+            "ret": "s16",
+            "args": ["0", "0", "0"]
+        },
+        {
+            "intrinsic": "msumu{1.data_type_short}m",
+            "width": [128],
+            "llvm": "vmsumu{1.data_type_short}m",
+            "ret": "u32",
+            "args": ["u(8-16)", "1", "u32"]
+        },
+        {
+            "intrinsic": "msummbm",
+            "width": [128],
+            "llvm": "vmsummbm",
+            "ret": "s32",
+            "args": ["s8", "u8", "s32"]
+        },
+        {
+            "intrinsic": "msumshm",
+            "width": [128],
+            "llvm": "vmsumshm",
+            "ret": "s32",
+            "args": ["s16", "s16", "s32"]
+        },
+        {
+            "intrinsic": "msum{0.kind}hs",
+            "width": [128],
+            "llvm": "vmsum{0.kind}hs",
+            "ret": "i32",
+            "args": ["0N", "0N", "0"]
+        },
+        {
+            "intrinsic": "sum2s",
+            "width": [128],
+            "llvm": "vsum2sws",
+            "ret": "s32",
+            "args": ["0", "0"]
+        },
+        {
+            "intrinsic": "sum4{0.kind}bs",
+            "width": [128],
+            "llvm": "vsum4{0.kind}bs",
+            "ret": "i32",
+            "args": ["0NN", "0"]
+        },
+        {
+            "intrinsic": "sum4shs",
+            "width": [128],
+            "llvm": "vsum4shs",
+            "ret": "s32",
+            "args": ["0N", "0"]
+        },
+        {
+            "intrinsic": "sums",
+            "width": [128],
+            "llvm": "vsumsws",
+            "ret": "s32",
+            "args": ["0", "0"]
         }
     ]
 }
diff --git a/src/librustc_platform_intrinsics/powerpc.rs b/src/librustc_platform_intrinsics/powerpc.rs
index 1a2e8e9c5d8..a9c56309aa8 100644
--- a/src/librustc_platform_intrinsics/powerpc.rs
+++ b/src/librustc_platform_intrinsics/powerpc.rs
@@ -337,6 +337,66 @@ pub fn find(name: &str) -> Option<Intrinsic> {
             output: &::I32x4,
             definition: Named("llvm.ppc.altivec.vupkhsh")
         },
+        "_vec_madds" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
+            output: &::I16x8,
+            definition: Named("llvm.ppc.altivec.vmhaddshs")
+        },
+        "_vec_msumubm" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U32x4]; &INPUTS },
+            output: &::U32x4,
+            definition: Named("llvm.ppc.altivec.vmsumubm")
+        },
+        "_vec_msumuhm" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
+            output: &::U32x4,
+            definition: Named("llvm.ppc.altivec.vmsumuhm")
+        },
+        "_vec_msummbm" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, &::U8x16, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vmsummbm")
+        },
+        "_vec_msumshm" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vmsumshm")
+        },
+        "_vec_msumshs" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vmsumshs")
+        },
+        "_vec_msumuhs" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
+            output: &::U32x4,
+            definition: Named("llvm.ppc.altivec.vmsumuhs")
+        },
+        "_vec_sum2s" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vsum2sws")
+        },
+        "_vec_sum4sbs" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vsum4sbs")
+        },
+        "_vec_sum4ubs" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U32x4]; &INPUTS },
+            output: &::U32x4,
+            definition: Named("llvm.ppc.altivec.vsum4ubs")
+        },
+        "_vec_sum4shs" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vsum4shs")
+        },
+        "_vec_sums" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vsumsws")
+        },
         _ => return None,
     })
 }