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authorbors <bors@rust-lang.org>2025-03-08 19:01:10 +0000
committerbors <bors@rust-lang.org>2025-03-08 19:01:10 +0000
commitefea9896f506baa08f40444e07774e827646d57a (patch)
tree7b8a36e021104db1e21b7b362e2ecc026f62ea72 /tests/codegen/enum
parent07292ccccde8b64d87036b2f90b70bc54ab68456 (diff)
parentd9432acfe12dfb44a88d186875cc105b1b93301f (diff)
downloadrust-efea9896f506baa08f40444e07774e827646d57a.tar.gz
rust-efea9896f506baa08f40444e07774e827646d57a.zip
Auto merge of #137500 - scottmcm:trunc-br, r=saethlin
Use `trunc nuw`+`br` for 0/1 branches even in optimized builds

Rather than needing to use `switch` for them to include the `unreachable` arm.
Diffstat (limited to 'tests/codegen/enum')
-rw-r--r--tests/codegen/enum/enum-two-variants-match.rs51
1 files changed, 51 insertions, 0 deletions
diff --git a/tests/codegen/enum/enum-two-variants-match.rs b/tests/codegen/enum/enum-two-variants-match.rs
new file mode 100644
index 00000000000..e5978bfc761
--- /dev/null
+++ b/tests/codegen/enum/enum-two-variants-match.rs
@@ -0,0 +1,51 @@
+//@ compile-flags: -Copt-level=3 -C no-prepopulate-passes
+//@ min-llvm-version: 19 (for trunc nuw)
+//@ only-x86_64 (because these discriminants are isize)
+
+#![crate_type = "lib"]
+
+// CHECK-LABEL: @option_match
+#[no_mangle]
+pub fn option_match(x: Option<i32>) -> u16 {
+    // CHECK: %x = alloca [8 x i8]
+    // CHECK: store i32 %0, ptr %x
+    // CHECK: %[[TAG:.+]] = load i32, ptr %x
+    // CHECK-SAME: !range ![[ZERO_ONE_32:[0-9]+]]
+    // CHECK: %[[DISCR:.+]] = zext i32 %[[TAG]] to i64
+    // CHECK: %[[COND:.+]] = trunc nuw i64 %[[DISCR]] to i1
+    // CHECK: br i1 %[[COND]], label %[[TRUE:[a-z0-9]+]], label %[[FALSE:[a-z0-9]+]]
+
+    // CHECK: [[TRUE]]:
+    // CHECK: store i16 13
+
+    // CHECK: [[FALSE]]:
+    // CHECK: store i16 42
+    match x {
+        Some(_) => 13,
+        None => 42,
+    }
+}
+
+// CHECK-LABEL: @result_match
+#[no_mangle]
+pub fn result_match(x: Result<u64, i64>) -> u16 {
+    // CHECK: %x = alloca [16 x i8]
+    // CHECK: store i64 %0, ptr %x
+    // CHECK: %[[DISCR:.+]] = load i64, ptr %x
+    // CHECK-SAME: !range ![[ZERO_ONE_64:[0-9]+]]
+    // CHECK: %[[COND:.+]] = trunc nuw i64 %[[DISCR]] to i1
+    // CHECK: br i1 %[[COND]], label %[[TRUE:[a-z0-9]+]], label %[[FALSE:[a-z0-9]+]]
+
+    // CHECK: [[TRUE]]:
+    // CHECK: store i16 13
+
+    // CHECK: [[FALSE]]:
+    // CHECK: store i16 42
+    match x {
+        Err(_) => 13,
+        Ok(_) => 42,
+    }
+}
+
+// CHECK: ![[ZERO_ONE_32]] = !{i32 0, i32 2}
+// CHECK: ![[ZERO_ONE_64]] = !{i64 0, i64 2}