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authorbors <bors@rust-lang.org>2025-02-20 09:05:22 +0000
committerbors <bors@rust-lang.org>2025-02-20 09:05:22 +0000
commitc62239aeb3ba7781a6d7f7055523c1e8c22b409c (patch)
tree13712efebce07a59086ef0ea920496ec9ea5786c /tests/codegen/simd/project-to-simd-array-field.rs
parenteeb9035117dc85fa4abe8e2abb09285fd65b0263 (diff)
parent6f9cfd694d67ad24af6c7e2235a2da5d22918df0 (diff)
downloadrust-c62239aeb3ba7781a6d7f7055523c1e8c22b409c.tar.gz
rust-c62239aeb3ba7781a6d7f7055523c1e8c22b409c.zip
Auto merge of #137058 - scottmcm:trunc-unchecked, r=nikic
Emit `trunc nuw` for unchecked shifts and `to_immediate_scalar`

- For shifts this shrinks the IR by no longer needing an `assume` while still providing the UB information
- Having this on the `i8`→`i1` truncations will hopefully help with some places that have to load `i8`s or pass those in LLVM structs without range information
Diffstat (limited to 'tests/codegen/simd/project-to-simd-array-field.rs')
-rw-r--r--tests/codegen/simd/project-to-simd-array-field.rs31
1 files changed, 31 insertions, 0 deletions
diff --git a/tests/codegen/simd/project-to-simd-array-field.rs b/tests/codegen/simd/project-to-simd-array-field.rs
new file mode 100644
index 00000000000..29fab640633
--- /dev/null
+++ b/tests/codegen/simd/project-to-simd-array-field.rs
@@ -0,0 +1,31 @@
+//@compile-flags: -Copt-level=3
+
+#![crate_type = "lib"]
+#![feature(repr_simd, core_intrinsics)]
+
+#[allow(non_camel_case_types)]
+#[derive(Clone, Copy)]
+#[repr(simd)]
+struct i32x4([i32; 4]);
+
+#[inline(always)]
+fn to_array4(a: i32x4) -> [i32; 4] {
+    a.0
+}
+
+// CHECK-LABEL: simd_add_self_then_return_array(
+// CHECK-SAME: ptr{{.+}}sret{{.+}}%[[RET:.+]],
+// CHECK-SAME: ptr{{.+}}%a)
+#[no_mangle]
+pub fn simd_add_self_then_return_array(a: &i32x4) -> [i32; 4] {
+    // It would be nice to just ban `.0` into simd types,
+    // but until we do this has to keep working.
+    // See also <https://github.com/rust-lang/rust/issues/105439>
+
+    // CHECK: %[[T1:.+]] = load <4 x i32>, ptr %a
+    // CHECK: %[[T2:.+]] = shl <4 x i32> %[[T1]], {{splat \(i32 1\)|<i32 1, i32 1, i32 1, i32 1>}}
+    // CHECK: store <4 x i32> %[[T2]], ptr %[[RET]]
+    let a = *a;
+    let b = unsafe { core::intrinsics::simd::simd_add(a, a) };
+    to_array4(b)
+}