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| author | Nicholas Thompson <NCGThompson@gmail.com> | 2024-01-23 12:03:50 -0500 |
|---|---|---|
| committer | Nicholas Thompson <NCGThompson@gmail.com> | 2024-01-23 12:03:50 -0500 |
| commit | 9dccd5dce11f2fcce81fc77f4271eaf2359e2626 (patch) | |
| tree | 9cfec256fc361b815e87b944d7d99b6e2c0c47d5 /tests/codegen | |
| parent | 971e37ff7e80cf2dbf4f95162d5957913803f30d (diff) | |
| download | rust-9dccd5dce11f2fcce81fc77f4271eaf2359e2626.tar.gz rust-9dccd5dce11f2fcce81fc77f4271eaf2359e2626.zip | |
Further Implement Power of Two Optimization
Diffstat (limited to 'tests/codegen')
| -rw-r--r-- | tests/codegen/pow_of_two.rs | 65 |
1 files changed, 26 insertions, 39 deletions
diff --git a/tests/codegen/pow_of_two.rs b/tests/codegen/pow_of_two.rs index 3bce5535c66..a8c0550e332 100644 --- a/tests/codegen/pow_of_two.rs +++ b/tests/codegen/pow_of_two.rs @@ -1,68 +1,55 @@ -// #[cfg(bootstrap)] -// ignore-stage1 -// compile-flags: --crate-type=lib -Zmerge-functions=disabled +// compile-flags: --crate-type=lib -Zmerge-functions=disabled -O -C overflow-checks=false // CHECK-LABEL: @a( #[no_mangle] pub fn a(exp: u32) -> u64 { - // CHECK: %[[R:.+]] = and i32 %exp, 63 - // CHECK: %[[R:.+]] = zext i32 %[[R:.+]] to i64 - // CHECK: %[[R:.+]] = shl nuw i64 %[[R:.+]].i, %[[R:.+]] - // CHECK: ret i64 %[[R:.+]] + // CHECK: %{{[^ ]+}} = icmp ugt i32 %exp, 64 + // CHECK: %{{[^ ]+}} = zext i32 %exp to i64 + // CHECK: %{{[^ ]+}} = shl nuw i64 {{[^ ]+}}, %{{[^ ]+}} + // CHECK: ret i64 %{{[^ ]+}} 2u64.pow(exp) } +// CHECK-LABEL: @b( #[no_mangle] pub fn b(exp: u32) -> i64 { - // CHECK: %[[R:.+]] = and i32 %exp, 63 - // CHECK: %[[R:.+]] = zext i32 %[[R:.+]] to i64 - // CHECK: %[[R:.+]] = shl nuw i64 %[[R:.+]].i, %[[R:.+]] - // CHECK: ret i64 %[[R:.+]] + // CHECK: %{{[^ ]+}} = icmp ugt i32 %exp, 64 + // CHECK: %{{[^ ]+}} = zext i32 %exp to i64 + // CHECK: %{{[^ ]+}} = shl nuw i64 {{[^ ]+}}, %{{[^ ]+}} + // CHECK: ret i64 %{{[^ ]+}} 2i64.pow(exp) } // CHECK-LABEL: @c( #[no_mangle] pub fn c(exp: u32) -> u32 { - // CHECK: %[[R:.+]].0.i = shl i32 %exp, 1 - // CHECK: %[[R:.+]].1.i = icmp sgt i32 %exp, -1 - // CHECK: %[[R:.+]].i = icmp ult i32 %[[R:.+]].0.i, 32 - // CHECK: %fine.i = and i1 %[[R:.+]].1.i, %[[R:.+]].i - // CHECK: %0 = and i32 %[[R:.+]].0.i, 30 - // CHECK: %[[R:.+]].i = zext i1 %fine.i to i32 - // CHECK: %[[R:.+]] = shl nuw nsw i32 %[[R:.+]].i, %0 - // CHECK: ret i32 %[[R:.+]] + // CHECK: %{{[^ ]+}} = icmp ugt i32 %exp, 16 + // CHECK: %{{[^ ]+}} = shl nuw nsw i32 %exp, 1 + // CHECK: %{{[^ ]+}} = shl nuw i32 1, %{{[^ ]+}} + // CHECK: %{{[^ ]+}} = select i1 %{{[^ ]+}}, i32 0, i32 %{{[^ ]+}} + // CHECK: ret i32 %{{[^ ]+}} 4u32.pow(exp) } // CHECK-LABEL: @d( #[no_mangle] pub fn d(exp: u32) -> u32 { - // CHECK: tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %exp, i32 5) - // CHECK: %[[R:.+]].0.i = extractvalue { i32, i1 } %[[R:.+]], 0 - // CHECK: %[[R:.+]].1.i = extractvalue { i32, i1 } %[[R:.+]], 1 - // CHECK: %[[R:.+]].i = xor i1 %[[R:.+]].1.i, true - // CHECK: %[[R:.+]].i = icmp ult i32 %[[R:.+]].0.i, 32 - // CHECK: %fine.i = and i1 %[[R:.+]].i, %[[R:.+]].i - // CHECK: %[[R:.+]] = and i32 %[[R:.+]].0.i, 31 - // CHECK: %[[R:.+]].i = zext i1 %fine.i to i32 - // CHECK: %[[R:.+]] = shl nuw i32 %[[R:.+]].i, %1 - // CHECK: ret i32 %[[R:.+]] + // CHECK: %{{[^ ]+}} = icmp ugt i32 %exp, 6 + // CHECK: %{{[^ ]+}} = mul nuw nsw i32 %exp, 5 + // CHECK: %{{[^ ]+}} = shl nuw nsw i32 1, %{{[^ ]+}} + // CHECK: %{{[^ ]+}} = select i1 {{[^ ]+}}, i32 0, i32 %{{[^ ]+}} + // CHECK: ret i32 %{{[^ ]+}} 32u32.pow(exp) } // CHECK-LABEL: @e( #[no_mangle] pub fn e(exp: u32) -> i32 { - // CHECK: tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %exp, i32 5) - // CHECK: %[[R:.+]].0.i = extractvalue { i32, i1 } %[[R:.+]], 0 - // CHECK: %[[R:.+]].i = icmp ult i32 %[[R:.+]].0.i, 32 - // CHECK: %[[R:.+]].1.i = extractvalue { i32, i1 } %[[R:.+]], 1 - // CHECK: %[[R:.+]].i = xor i1 %[[R:.+]].1.i, true - // CHECK: %fine.i = and i1 %[[R:.+]].i, %[[R:.+]].i - // CHECK: %[[R:.+]].i = zext i1 %fine.i to i32 - // CHECK: %[[R:.+]] = and i32 %[[R:.+]].0.i, 31 - // CHECK: %[[R:.+]] = shl nuw i32 %[[R:.+]].i, %1 - // CHECK: ret i32 %[[R:.+]] + // CHECK: %{{[^ ]+}} = icmp ugt i32 %exp, 6 + // CHECK: %{{[^ ]+}} = mul nuw {{(nsw )?}}i32 %exp, 5 + // CHECK: %{{[^ ]+}} = shl nuw {{(nsw )?}}i32 1, %{{[^ ]+}} + // CHECK: %{{[^ ]+}} = select i1 {{[^ ]+}}, i32 0, i32 %{{[^ ]+}} + // CHECK: ret i32 %{{[^ ]+}} 32i32.pow(exp) } +// note: d and e are expected to yield the same IR |