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| author | bors <bors@rust-lang.org> | 2023-09-06 22:26:37 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2023-09-06 22:26:37 +0000 |
| commit | b0d45536acf8be99036c6a1261359e3cf89f9d63 (patch) | |
| tree | 1230c8db99b224c763dc3b84db0c09bb66cc4245 /tests/ui/async-await/in-trait/async-example-desugared-extra.rs | |
| parent | e3abbd4994f72888f9e5e44dc89a4102e48c2a54 (diff) | |
| parent | 0b6ee86d378425c781264649dc0d637160e16762 (diff) | |
| download | rust-b0d45536acf8be99036c6a1261359e3cf89f9d63.tar.gz rust-b0d45536acf8be99036c6a1261359e3cf89f9d63.zip | |
Auto merge of #115580 - eduardosm:stdarch-intrinsics, r=davidtwco,bjorn3
Update stdarch submodule and remove special handling in cranelift codegen for some AVX and SSE2 LLVM intrinsics
https://github.com/rust-lang/stdarch/pull/1463 reimplemented some x86 intrinsics to avoid using some x86-specific LLVM intrinsics:
* Store unaligned (`_mm*_storeu_*`) use `<*mut _>::write_unaligned` instead of `llvm.x86.*.storeu.*`.
* Shift by immediate (`_mm*_s{ll,rl,ra}i_epi*`) use `if` (srl, sll) or `min` (sra) to simulate the behaviour when the RHS is out of range. RHS is constant, so the `if`/`min` will be optimized away.
This PR updates the stdarch submodule to pull these changes and removes special handling for those LLVM intrinsics from cranelift codegen. I left gcc codegen untouched because there are some autogenerated lists.
Diffstat (limited to 'tests/ui/async-await/in-trait/async-example-desugared-extra.rs')
0 files changed, 0 insertions, 0 deletions